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woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: RA4E2 On-Chip Peripherals
; @Props: Released
; @Author: KRZ
; @Changelog: 2023-08-29 KRZ
; @Manufacturer: RENESAS - Renesas Technology, Corp.
; @Doc: Generated (Trace32 Version N.2023.08.000162078), based on:
; R7FA4E2B9.svd (Ver. 1.10.01)
; @Core: Cortex-M33F
; @Chip: R7FA4E2B92CBB, R7FA4E2B92CBC, R7FA4E2B93CFM, R7FA4E2B93CNE, R7FA4E2B93CNH
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perra4e2.per 16571 2023-08-30 10:45:58Z kwisniewski $
tree.close "Core Registers (Cortex-M33F)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
group.long 0x08++0x03
line.long 0x00 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes"
bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
textline " "
bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes"
bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes"
group.long 0x0C++0x0F
line.long 0x00 "CPPWR,Coprocessor Power Control Register"
bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted"
line.long 0x04 "SYST_CSR,SysTick Control and Status Register"
rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core"
bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
textline " "
bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
line.long 0x08 "SYST_RVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
line.long 0x0C "SYST_CVR,SysTick Current Value Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value"
rgroup.long 0x1C++0x03
line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
rgroup.long 0xD00++0x03
line.long 0x00 "CPUID,CPUID Base Register"
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main extension"
textline " "
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Reserved,Reserved,Patch 2,?..."
group.long 0xD04++0x23
line.long 0x00 "ICSR,Interrupt Control and State Register"
setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
textline " "
bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
textline " "
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
line.long 0x04 "VTOR,Vector Table Offset Register"
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
textline " "
bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
line.long 0x0C "SCR,System Control Register"
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline " "
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
line.long 0x10 "CCR,Configuration and Control Register"
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
textline " "
bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
line.long 0x14 "SHPR1,System Handler Priority Register 1"
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault"
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault"
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault"
textline " "
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage"
line.long 0x18 "SHPR2,System Handler Priority Register 2"
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
line.long 0x1C "SHPR3,System Handler Priority Register 3"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
line.long 0x20 "SHCSR,System Handler Control and State Register"
bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
textline " "
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
textline " "
bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active"
bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active"
textline " "
bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
textline " "
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
group.byte 0xD28++0x1
line.byte 0x00 "MMFSR,MemManage Status Register"
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred"
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
line.byte 0x01 "BFSR,Bus Fault Status Register"
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred"
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
group.word 0xD2A++0x1
line.word 0x00 "UFSR,Usage Fault Status Register"
eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error"
textline " "
eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
textline " "
eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
group.long 0xD2C++0x03
line.long 0x00 "HFSR,HardFault Status Register"
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
group.long 0xD34++0x0B
line.long 0x00 "MMFAR,MemManage Fault Address Register"
line.long 0x04 "BFAR,BusFault Address Register"
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
group.long 0xD88++0x03
line.long 0x00 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48)
group.long 0xD8C++0x03
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled"
bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled"
bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled"
bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled"
bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled"
bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled"
bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled"
else
hgroup.long 0xD8C++0x03
hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)"
endif
wgroup.long 0xF00++0x03
line.long 0x00 "STIR,Software Triggered Interrupt Register"
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended"
tree "Memory System"
width 10.
rgroup.long 0xD78++0x03
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
textline " "
bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
textline " "
bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
textline " "
bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000)
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
textline " "
bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
endif
rgroup.long 0xD80++0x03
line.long 0x00 "CCSIDR,Cache Size ID Register"
bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
textline " "
bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
textline " "
bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
group.long 0xD84++0x03
line.long 0x00 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
wgroup.long 0xF50++0x03
line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
wgroup.long 0xF58++0x23
line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
tree.end
tree "Feature Registers"
width 10.
rgroup.long 0xD40++0x0B
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..."
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..."
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..."
rgroup.long 0xD4C++0x03
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long 0xD50++0x03
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..."
textline " "
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored"
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..."
rgroup.long 0xD54++0x03
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
rgroup.long 0xD58++0x03
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
rgroup.long 0xD5C++0x03
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..."
bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..."
bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..."
rgroup.long 0xD60++0x03
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
rgroup.long 0xD64++0x03
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
textline " "
bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..."
rgroup.long 0xD68++0x03
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..."
textline " "
bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..."
bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
textline " "
bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..."
rgroup.long 0xD6C++0x03
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
textline " "
bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..."
textline " "
bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..."
rgroup.long 0xD70++0x03
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..."
bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..."
bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..."
textline " "
bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..."
bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..."
tree.end
tree "CoreSight Identification Registers"
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 11.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "DPIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DPIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DPIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DPIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "PID4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DCIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DCIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DCIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Memory Protection Unit (MPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
rgroup.long 0xD90++0x03
line.long 0x00 "MPU_TYPE,MPU Type Register"
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
group.long 0xD94++0x03
line.long 0x00 "MPU_CTRL,MPU Control Register"
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
group.long 0xD98++0x03
line.long 0x00 "MPU_RNR,MPU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
tree.close "MPU regions"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
group.long 0xD9C++0x03 "Region 0"
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
group.long 0xD9C++0x03 "Region 1"
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
group.long 0xD9C++0x03 "Region 2"
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
group.long 0xD9C++0x03 "Region 3"
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
group.long 0xD9C++0x03 "Region 4"
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
group.long 0xD9C++0x03 "Region 5"
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
group.long 0xD9C++0x03 "Region 6"
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
group.long 0xD9C++0x03 "Region 7"
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
group.long 0xD9C++0x03 "Region 8"
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
group.long 0xD9C++0x03 "Region 9"
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
group.long 0xD9C++0x03 "Region 10"
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
group.long 0xD9C++0x03 "Region 11"
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
group.long 0xD9C++0x03 "Region 12"
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
group.long 0xD9C++0x03 "Region 13"
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
group.long 0xD9C++0x03 "Region 14"
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
group.long 0xD9C++0x03 "Region 15"
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
endif
tree.end
newline
group.long 0xDC0++0x07
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Security Attribution Unit (SAU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
group.long 0xDD0++0x03
line.long 0x00 "SAU_CTRL,SAU Control Register"
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
rgroup.long 0xDD4++0x03
line.long 0x00 "SAU_TYPE,SAU Type Register"
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..."
group.long 0xDD8++0x03
line.long 0x00 "SAU_RNR,SAU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
tree.close "SAU regions"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0
group.long 0xDDC++0x03 "Region 0"
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1
group.long 0xDDC++0x03 "Region 1"
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2
group.long 0xDDC++0x03 "Region 2"
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3
group.long 0xDDC++0x03 "Region 3"
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4
group.long 0xDDC++0x03 "Region 4"
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5
group.long 0xDDC++0x03 "Region 5"
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6
group.long 0xDDC++0x03 "Region 6"
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7
group.long 0xDDC++0x03 "Region 7"
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
else
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
tree.end
group.long 0xDE4++0x03
line.long 0x00 "SFSR,Secure Fault Status Register"
bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred"
bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid"
bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred"
bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred"
bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred"
bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred"
group.long 0xDE8++0x03
line.long 0x00 "SFAR,Secure Fault Address Register"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 6.
group.long 0x04++0x03
line.long 0x00 "ICTR,Interrupt Controller Type Register"
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511"
width 24.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x104++0x03
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x104++0x03
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x108++0x03
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x108++0x03
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x10C++0x03
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x10C++0x03
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x110++0x03
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x110++0x03
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x114++0x03
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x114++0x03
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x118++0x03
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x118++0x03
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x11C++0x03
line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x11C++0x03
hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x120++0x03
line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x120++0x03
hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x124++0x03
line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x124++0x03
hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x128++0x03
line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x128++0x03
hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x12C++0x03
line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x130++0x03
line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x130++0x03
hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x134++0x03
line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x134++0x03
hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x138++0x03
line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x138++0x03
hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x13C++0x03
line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x13C++0x03
hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
endif
tree.end
width 24.
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x204++0x03
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x204++0x03
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x208++0x03
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x208++0x03
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x20C++0x03
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x20C++0x03
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x210++0x03
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x210++0x03
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x214++0x03
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x214++0x03
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x218++0x03
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x218++0x03
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x21C++0x03
line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x21C++0x03
hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x220++0x03
line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x220++0x03
hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x224++0x03
line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x224++0x03
hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x228++0x03
line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x228++0x03
hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x22C++0x03
line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x22C++0x03
hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x230++0x03
line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x230++0x03
hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x234++0x03
line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x234++0x03
hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x238++0x03
line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x238++0x03
hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x23C++0x03
line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x23C++0x03
hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
endif
tree.end
width 11.
tree "Interrupt Active Bit Registers"
rgroup.long 0x300++0x03
line.long 0x00 "ACTIVE0,Active Bit Register 0"
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
rgroup.long 0x304++0x03
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x304++0x03
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
rgroup.long 0x308++0x03
line.long 0x00 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x308++0x03
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
rgroup.long 0x30C++0x03
line.long 0x00 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x30C++0x03
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
rgroup.long 0x310++0x03
line.long 0x00 "ACTIVE4,Active Bit Register 4"
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x310++0x03
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
rgroup.long 0x314++0x03
line.long 0x00 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x314++0x03
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
rgroup.long 0x318++0x03
line.long 0x00 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x318++0x03
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
rgroup.long 0x31C++0x03
line.long 0x00 "ACTIVE7,Active Bit Register 7"
bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x31C++0x03
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
rgroup.long 0x320++0x03
line.long 0x00 "ACTIVE8,Active Bit Register 8"
bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x320++0x03
hide.long 0x00 "ACTIVE8,Active Bit Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
rgroup.long 0x324++0x03
line.long 0x00 "ACTIVE9,Active Bit Register 9"
bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x324++0x03
hide.long 0x00 "ACTIVE9,Active Bit Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
rgroup.long 0x328++0x03
line.long 0x00 "ACTIVE10,Active Bit Register 10"
bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x328++0x03
hide.long 0x00 "ACTIVE10,Active Bit Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
rgroup.long 0x32C++0x03
line.long 0x00 "ACTIVE11,Active Bit Register 11"
bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x32C++0x03
hide.long 0x00 "ACTIVE11,Active Bit Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
rgroup.long 0x330++0x03
line.long 0x00 "ACTIVE12,Active Bit Register 12"
bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x330++0x03
hide.long 0x00 "ACTIVE12,Active Bit Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
rgroup.long 0x334++0x03
line.long 0x00 "ACTIVE13,Active Bit Register 13"
bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x334++0x03
hide.long 0x00 "ACTIVE13,Active Bit Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
rgroup.long 0x338++0x03
line.long 0x00 "ACTIVE14,Active Bit Register 14"
bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x338++0x03
hide.long 0x00 "ACTIVE14,Active Bit Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
rgroup.long 0x33C++0x03
line.long 0x00 "ACTIVE15,Active Bit Register 15"
bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x33C++0x03
hide.long 0x00 "ACTIVE15,Active Bit Register 15"
endif
tree.end
width 13.
tree "Interrupt Target Non-Secure Registers"
group.long 0x380++0x03
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x384++0x03
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
else
hgroup.long 0x384++0x03
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x388++0x03
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
else
hgroup.long 0x388++0x03
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x38C++0x03
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
else
hgroup.long 0x38C++0x03
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x390++0x03
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
else
hgroup.long 0x390++0x03
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x394++0x03
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
else
hgroup.long 0x394++0x03
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x398++0x03
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
else
hgroup.long 0x398++0x03
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x39C++0x03
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
else
hgroup.long 0x39C++0x03
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x3A0++0x03
line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure"
else
hgroup.long 0x3A0++0x03
hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x3A4++0x03
line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure"
else
hgroup.long 0x3A4++0x03
hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x3A8++0x03
line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure"
else
hgroup.long 0x3A8++0x03
hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x3AC++0x03
line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure"
else
hgroup.long 0x3AC++0x03
hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x3B0++0x03
line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure"
else
hgroup.long 0x3B0++0x03
hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x3B4++0x03
line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure"
else
hgroup.long 0x3B4++0x03
hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x3B8++0x03
line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure"
else
hgroup.long 0x3B8++0x03
hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F)
group.long 0x3BC++0x03
line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure"
else
hgroup.long 0x3BC++0x03
hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
endif
tree.end
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x420++0x1F
line.long 0x0 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
line.long 0x4 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
line.long 0x8 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
line.long 0xC "IPR11,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
line.long 0x10 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
line.long 0x14 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
line.long 0x18 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
line.long 0x1C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
else
hgroup.long 0x420++0x1F
hide.long 0x0 "IPR8,Interrupt Priority Register"
hide.long 0x4 "IPR9,Interrupt Priority Register"
hide.long 0x8 "IPR10,Interrupt Priority Register"
hide.long 0xC "IPR11,Interrupt Priority Register"
hide.long 0x10 "IPR12,Interrupt Priority Register"
hide.long 0x14 "IPR13,Interrupt Priority Register"
hide.long 0x18 "IPR14,Interrupt Priority Register"
hide.long 0x1C "IPR15,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x440++0x1F
line.long 0x0 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
line.long 0x4 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
line.long 0x8 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
line.long 0xC "IPR19,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
line.long 0x10 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
line.long 0x14 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
line.long 0x18 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
line.long 0x1C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
else
hgroup.long 0x440++0x1F
hide.long 0x0 "IPR16,Interrupt Priority Register"
hide.long 0x4 "IPR17,Interrupt Priority Register"
hide.long 0x8 "IPR18,Interrupt Priority Register"
hide.long 0xC "IPR19,Interrupt Priority Register"
hide.long 0x10 "IPR20,Interrupt Priority Register"
hide.long 0x14 "IPR21,Interrupt Priority Register"
hide.long 0x18 "IPR22,Interrupt Priority Register"
hide.long 0x1C "IPR23,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x460++0x1F
line.long 0x0 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
line.long 0x4 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
line.long 0x8 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
line.long 0xC "IPR27,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
line.long 0x10 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
line.long 0x14 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
line.long 0x18 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
line.long 0x1C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
else
hgroup.long 0x460++0x1F
hide.long 0x0 "IPR24,Interrupt Priority Register"
hide.long 0x4 "IPR25,Interrupt Priority Register"
hide.long 0x8 "IPR26,Interrupt Priority Register"
hide.long 0xC "IPR27,Interrupt Priority Register"
hide.long 0x10 "IPR28,Interrupt Priority Register"
hide.long 0x14 "IPR29,Interrupt Priority Register"
hide.long 0x18 "IPR30,Interrupt Priority Register"
hide.long 0x1C "IPR31,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x480++0x1F
line.long 0x0 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
line.long 0x4 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
line.long 0x8 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
line.long 0xC "IPR35,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
line.long 0x10 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
line.long 0x14 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
line.long 0x18 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
line.long 0x1C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
else
hgroup.long 0x480++0x1F
hide.long 0x0 "IPR32,Interrupt Priority Register"
hide.long 0x4 "IPR33,Interrupt Priority Register"
hide.long 0x8 "IPR34,Interrupt Priority Register"
hide.long 0xC "IPR35,Interrupt Priority Register"
hide.long 0x10 "IPR36,Interrupt Priority Register"
hide.long 0x14 "IPR37,Interrupt Priority Register"
hide.long 0x18 "IPR38,Interrupt Priority Register"
hide.long 0x1C "IPR39,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x4A0++0x1F
line.long 0x0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
line.long 0x4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
line.long 0x8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
line.long 0xC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
line.long 0x10 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
line.long 0x14 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
line.long 0x18 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
line.long 0x1C "IPR47,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
else
hgroup.long 0x4A0++0x1F
hide.long 0x0 "IPR40,Interrupt Priority Register"
hide.long 0x4 "IPR41,Interrupt Priority Register"
hide.long 0x8 "IPR42,Interrupt Priority Register"
hide.long 0xC "IPR43,Interrupt Priority Register"
hide.long 0x10 "IPR44,Interrupt Priority Register"
hide.long 0x14 "IPR45,Interrupt Priority Register"
hide.long 0x18 "IPR46,Interrupt Priority Register"
hide.long 0x1C "IPR47,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x4C0++0x1F
line.long 0x0 "IPR48,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
line.long 0x4 "IPR49,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
line.long 0x8 "IPR50,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
line.long 0xC "IPR51,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
line.long 0x10 "IPR52,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
line.long 0x14 "IPR53,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
line.long 0x18 "IPR54,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
line.long 0x1C "IPR55,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
else
hgroup.long 0x4C0++0x1F
hide.long 0x0 "IPR48,Interrupt Priority Register"
hide.long 0x4 "IPR49,Interrupt Priority Register"
hide.long 0x8 "IPR50,Interrupt Priority Register"
hide.long 0xC "IPR51,Interrupt Priority Register"
hide.long 0x10 "IPR52,Interrupt Priority Register"
hide.long 0x14 "IPR53,Interrupt Priority Register"
hide.long 0x18 "IPR54,Interrupt Priority Register"
hide.long 0x1C "IPR55,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x4E0++0x1F
line.long 0x0 "IPR56,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
line.long 0x4 "IPR57,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
line.long 0x8 "IPR58,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
line.long 0xC "IPR59,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
line.long 0x10 "IPR60,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority"
line.long 0x14 "IPR61,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority"
line.long 0x18 "IPR62,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority"
line.long 0x1C "IPR63,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority"
else
hgroup.long 0x4E0++0x1F
hide.long 0x0 "IPR56,Interrupt Priority Register"
hide.long 0x4 "IPR57,Interrupt Priority Register"
hide.long 0x8 "IPR58,Interrupt Priority Register"
hide.long 0xC "IPR59,Interrupt Priority Register"
hide.long 0x10 "IPR60,Interrupt Priority Register"
hide.long 0x14 "IPR61,Interrupt Priority Register"
hide.long 0x18 "IPR62,Interrupt Priority Register"
hide.long 0x1C "IPR63,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x500++0x1F
line.long 0x0 "IPR64,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority"
line.long 0x4 "IPR65,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority"
line.long 0x8 "IPR66,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority"
line.long 0xC "IPR67,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority"
line.long 0x10 "IPR68,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority"
line.long 0x14 "IPR69,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority"
line.long 0x18 "IPR70,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority"
line.long 0x1C "IPR71,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority"
else
hgroup.long 0x500++0x1F
hide.long 0x0 "IPR64,Interrupt Priority Register"
hide.long 0x4 "IPR65,Interrupt Priority Register"
hide.long 0x8 "IPR66,Interrupt Priority Register"
hide.long 0xC "IPR67,Interrupt Priority Register"
hide.long 0x10 "IPR68,Interrupt Priority Register"
hide.long 0x14 "IPR69,Interrupt Priority Register"
hide.long 0x18 "IPR70,Interrupt Priority Register"
hide.long 0x1C "IPR71,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x520++0x1F
line.long 0x0 "IPR72,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority"
line.long 0x4 "IPR73,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority"
line.long 0x8 "IPR74,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority"
line.long 0xC "IPR75,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority"
line.long 0x10 "IPR76,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority"
line.long 0x14 "IPR77,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority"
line.long 0x18 "IPR78,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority"
line.long 0x1C "IPR79,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority"
else
hgroup.long 0x520++0x1F
hide.long 0x0 "IPR72,Interrupt Priority Register"
hide.long 0x4 "IPR73,Interrupt Priority Register"
hide.long 0x8 "IPR74,Interrupt Priority Register"
hide.long 0xC "IPR75,Interrupt Priority Register"
hide.long 0x10 "IPR76,Interrupt Priority Register"
hide.long 0x14 "IPR77,Interrupt Priority Register"
hide.long 0x18 "IPR78,Interrupt Priority Register"
hide.long 0x1C "IPR79,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x540++0x1F
line.long 0x0 "IPR80,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority"
line.long 0x4 "IPR81,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority"
line.long 0x8 "IPR82,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority"
line.long 0xC "IPR83,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority"
line.long 0x10 "IPR84,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority"
line.long 0x14 "IPR85,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority"
line.long 0x18 "IPR86,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority"
line.long 0x1C "IPR87,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority"
else
hgroup.long 0x540++0x1F
hide.long 0x0 "IPR80,Interrupt Priority Register"
hide.long 0x4 "IPR81,Interrupt Priority Register"
hide.long 0x8 "IPR82,Interrupt Priority Register"
hide.long 0xC "IPR83,Interrupt Priority Register"
hide.long 0x10 "IPR84,Interrupt Priority Register"
hide.long 0x14 "IPR85,Interrupt Priority Register"
hide.long 0x18 "IPR86,Interrupt Priority Register"
hide.long 0x1C "IPR87,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x560++0x1F
line.long 0x0 "IPR88,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority"
line.long 0x4 "IPR89,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority"
line.long 0x8 "IPR90,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority"
line.long 0xC "IPR91,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority"
line.long 0x10 "IPR92,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority"
line.long 0x14 "IPR93,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority"
line.long 0x18 "IPR94,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority"
line.long 0x1C "IPR95,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority"
else
hgroup.long 0x560++0x1F
hide.long 0x0 "IPR88,Interrupt Priority Register"
hide.long 0x4 "IPR89,Interrupt Priority Register"
hide.long 0x8 "IPR90,Interrupt Priority Register"
hide.long 0xC "IPR91,Interrupt Priority Register"
hide.long 0x10 "IPR92,Interrupt Priority Register"
hide.long 0x14 "IPR93,Interrupt Priority Register"
hide.long 0x18 "IPR94,Interrupt Priority Register"
hide.long 0x1C "IPR95,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x580++0x1F
line.long 0x0 "IPR96,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority"
line.long 0x4 "IPR97,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority"
line.long 0x8 "IPR98,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority"
line.long 0xC "IPR99,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority"
line.long 0x10 "IPR100,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority"
line.long 0x14 "IPR101,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority"
line.long 0x18 "IPR102,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority"
line.long 0x1C "IPR103,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority"
else
hgroup.long 0x580++0x1F
hide.long 0x0 "IPR96,Interrupt Priority Register"
hide.long 0x4 "IPR97,Interrupt Priority Register"
hide.long 0x8 "IPR98,Interrupt Priority Register"
hide.long 0xC "IPR99,Interrupt Priority Register"
hide.long 0x10 "IPR100,Interrupt Priority Register"
hide.long 0x14 "IPR101,Interrupt Priority Register"
hide.long 0x18 "IPR102,Interrupt Priority Register"
hide.long 0x1C "IPR103,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x5A0++0x1F
line.long 0x0 "IPR104,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority"
line.long 0x4 "IPR105,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority"
line.long 0x8 "IPR106,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority"
line.long 0xC "IPR107,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority"
line.long 0x10 "IPR108,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority"
line.long 0x14 "IPR109,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority"
line.long 0x18 "IPR110,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority"
line.long 0x1C "IPR111,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority"
else
hgroup.long 0x5A0++0x1F
hide.long 0x0 "IPR104,Interrupt Priority Register"
hide.long 0x4 "IPR105,Interrupt Priority Register"
hide.long 0x8 "IPR106,Interrupt Priority Register"
hide.long 0xC "IPR107,Interrupt Priority Register"
hide.long 0x10 "IPR108,Interrupt Priority Register"
hide.long 0x14 "IPR109,Interrupt Priority Register"
hide.long 0x18 "IPR110,Interrupt Priority Register"
hide.long 0x1C "IPR111,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x5C0++0x1F
line.long 0x0 "IPR112,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority"
line.long 0x4 "IPR113,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority"
line.long 0x8 "IPR114,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority"
line.long 0xC "IPR115,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority"
line.long 0x10 "IPR116,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority"
line.long 0x14 "IPR117,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority"
line.long 0x18 "IPR118,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority"
line.long 0x1C "IPR119,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority"
else
hgroup.long 0x5C0++0x1F
hide.long 0x0 "IPR112,Interrupt Priority Register"
hide.long 0x4 "IPR113,Interrupt Priority Register"
hide.long 0x8 "IPR114,Interrupt Priority Register"
hide.long 0xC "IPR115,Interrupt Priority Register"
hide.long 0x10 "IPR116,Interrupt Priority Register"
hide.long 0x14 "IPR117,Interrupt Priority Register"
hide.long 0x18 "IPR118,Interrupt Priority Register"
hide.long 0x1C "IPR119,Interrupt Priority Register"
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
sif (CORENAME()=="CORTEXM33F")
tree "Floating-point Unit (FPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 8.
group.long 0xF34++0x0B
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored"
newline
bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled"
bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only"
bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able"
bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High"
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
newline
bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able"
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
newline
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure"
newline
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
newline
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
rgroup.long 0xF40++0x0B
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
newline
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
newline
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..."
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
endif
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 13.
group.long 0xD30++0x03
line.long 0x00 "DFSR,Debug Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
newline
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
newline
hgroup.long 0xDF0++0x03
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
in
newline
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
group.long 0xDF8++0x03
line.long 0x00 "DCRDR,Debug Core Register Data Register"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
else
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
endif
newline
group.long 0xE04++0x07
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
rgroup.long 0xFB8++0x03
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
newline
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Flash Patch and Breakpoint Unit (FPB)"
sif COMPonent.AVAILABLE("FPB")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
width 12.
group.long 0x00++0x03
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..."
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
textline " "
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000)
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address"
else
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
tree "CoreSight Identification Registers"
width 12.
rgroup.long 0xFCC++0x03
line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "FP_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "FP_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "FP_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0C "FP_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "FP_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "FP_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "FP_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "FPB component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 16.
group.long 0x00++0x03
line.long 0x00 "DWT_CTRL,Control Register"
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..."
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
textline " "
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
textline " "
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000)
group.long 0x04++0x03
line.long 0x00 "DWT_CYCCNT,Cycle Count register"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000)
group.long 0x08++0x17
line.long 0x00 "DWT_CPICNT,CPI Count register"
hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter"
line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register"
hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter"
line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register"
hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter"
line.long 0x10 "DWT_LSUCNT,LSU Count Register"
hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter"
line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register"
hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
endif
rgroup.long 0x1C++0x03
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
textline " "
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
endif
group.long (0x20+0x08)++0x03
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
endif
group.long (0x30+0x08)++0x03
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
endif
group.long (0x40+0x08)++0x03
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
endif
group.long (0x50+0x08)++0x03
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
tree "CoreSight Identification Registers"
width 13.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFCC++0x03
line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
rgroup.long 0xFE0++0x0F
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DWT_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DWT_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DWT_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
tree "ADC12 (12-bit A/D Converter)"
base ad:0x40170000
group.word 0x0++0x1
line.word 0x0 "ADCSR,A/D Control Register"
bitfld.word 0x0 15. "ADST,A/D Conversion Start" "0: Stop A/D conversion process.,1: Start A/D conversion process."
bitfld.word 0x0 13.--14. "ADCS,Scan Mode Select" "0: Single scan mode,1: Group scan mode,?,?"
newline
bitfld.word 0x0 9. "TRGE,Trigger Start Enable" "0: Disable A/D conversion to be started by the..,1: Enable A/D conversion to be started by the.."
bitfld.word 0x0 8. "EXTRG,Trigger Select" "0: Start A/D conversion by the synchronous trigger..,1: Start A/D conversion by the asynchronous trigger.."
newline
bitfld.word 0x0 7. "DBLE,Double Trigger Mode Select" "0: Deselect double-trigger mode.,1: Select double-trigger mode."
bitfld.word 0x0 6. "GBADIE,Group B Scan End Interrupt and ELC Event Enable" "0: Disable ADC120_GBADI interrupt generation on..,1: Enable ADC120_GBADI interrupt generation on.."
newline
hexmask.word.byte 0x0 0.--4. 1. "DBLANS,Double Trigger Channel Select"
group.word 0x4++0x7
line.word 0x0 "ADANSA0,A/D Channel Select Register A0"
bitfld.word 0x0 15. "ANSA15,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x0 14. "ANSA14,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x0 13. "ANSA13,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x0 12. "ANSA12,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x0 11. "ANSA11,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x0 10. "ANSA10,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x0 9. "ANSA09,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x0 8. "ANSA08,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x0 7. "ANSA07,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x0 6. "ANSA06,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x0 5. "ANSA05,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x0 4. "ANSA04,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x0 3. "ANSA03,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x0 2. "ANSA02,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x0 1. "ANSA01,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x0 0. "ANSA00,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
line.word 0x2 "ADANSA1,A/D Channel Select Register A1"
bitfld.word 0x2 15. "ANSA31,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x2 14. "ANSA30,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x2 13. "ANSA29,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x2 12. "ANSA28,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x2 11. "ANSA27,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x2 10. "ANSA26,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x2 9. "ANSA25,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x2 8. "ANSA24,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x2 7. "ANSA23,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x2 6. "ANSA22,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x2 5. "ANSA21,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x2 4. "ANSA20,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x2 3. "ANSA19,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x2 2. "ANSA18,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x2 1. "ANSA17,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x2 0. "ANSA16,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
line.word 0x4 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0"
bitfld.word 0x4 15. "ADS15,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x4 14. "ADS14,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x4 13. "ADS13,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x4 12. "ADS12,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x4 11. "ADS11,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x4 10. "ADS10,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x4 9. "ADS09,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x4 8. "ADS08,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x4 7. "ADS07,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x4 6. "ADS06,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x4 5. "ADS05,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x4 4. "ADS04,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x4 3. "ADS03,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x4 2. "ADS02,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x4 1. "ADS01,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x4 0. "ADS00,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
line.word 0x6 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1"
bitfld.word 0x6 15. "ADS31,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 14. "ADS30,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 13. "ADS29,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 12. "ADS28,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 11. "ADS27,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 10. "ADS26,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 9. "ADS25,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 8. "ADS24,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 7. "ADS23,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 6. "ADS22,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 5. "ADS21,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 4. "ADS20,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 3. "ADS19,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 2. "ADS18,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 1. "ADS17,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 0. "ADS16,A/D-Converted Value Addition/Average Channel Select" "0: Do not select associated input channel.,1: Select associated input channel."
group.byte 0xC++0x0
line.byte 0x0 "ADADC,A/D-Converted Value Addition/Average Count Select Register"
bitfld.byte 0x0 7. "AVEE,Average Mode Select" "0: Enable addition mode,1: Enable average mode"
bitfld.byte 0x0 0.--2. "ADC,Addition/Average Count Select" "0: Setting prohibited,1: 2-time conversion (1 addition),?,?,?,?,?,?"
group.word 0xE++0x9
line.word 0x0 "ADCER,A/D Control Extended Register"
bitfld.word 0x0 15. "ADRFMT,A/D Data Register Format Select" "0: Select right-justified for the A/D data register..,1: Select left-justified for the A/D data register.."
bitfld.word 0x0 11. "DIAGM,Self-Diagnosis Enable" "0: Disable ADC12 self-diagnosis,1: Enable ADC12 self-diagnosis"
newline
bitfld.word 0x0 10. "DIAGLD,Self-Diagnosis Mode Select" "0: Select rotation mode for self-diagnosis voltage,1: Select mixed mode for self-diagnosis voltage"
bitfld.word 0x0 8.--9. "DIAGVAL,Self-Diagnosis Conversion Voltage Select" "0: Setting prohibited when self-diagnosis is enabled,1: 0 volts,?,?"
newline
bitfld.word 0x0 5. "ACE,A/D Data Register Automatic Clearing Enable" "0: Disable automatic clearing,1: Enable automatic clearing"
bitfld.word 0x0 1.--2. "ADPRC," "0: 12-bit accuracy,1: 10-bit accuracy,?,?"
line.word 0x2 "ADSTRGR,A/D Conversion Start Trigger Select Register"
hexmask.word.byte 0x2 8.--13. 1. "TRSA,A/D Conversion Start Trigger Select"
hexmask.word.byte 0x2 0.--5. 1. "TRSB,A/D Conversion Start Trigger Select for Group B"
line.word 0x4 "ADEXICR,A/D Conversion Extended Input Control Registers"
bitfld.word 0x4 11. "OCSB,Internal Reference Voltage A/D Conversion Select for Group B" "0: Disable A/D conversion of internal reference..,1: Enable A/D conversion of internal reference.."
bitfld.word 0x4 10. "TSSB,Temperature Sensor Output A/D Conversion Select for Group B" "0: Disable A/D conversion of temperature sensor..,1: Enable A/D conversion of temperature sensor output"
newline
bitfld.word 0x4 9. "OCSA,Internal Reference Voltage A/D Conversion Select" "0: Disable A/D conversion of internal reference..,1: Enable A/D conversion of internal reference.."
bitfld.word 0x4 8. "TSSA,Temperature Sensor Output A/D Conversion Select" "0: Disable A/D conversion of temperature sensor..,1: Enable A/D conversion of temperature sensor output"
newline
bitfld.word 0x4 1. "OCSAD,Internal Reference Voltage A/D-Converted Value Addition/Average Mode Select" "0: Do not select addition/average mode for internal..,1: Select addition/average mode for internal.."
bitfld.word 0x4 0. "TSSAD,Temperature Sensor Output A/D-Converted Value Addition/Average Mode Select" "0: Do not select addition/average mode for..,1: Select addition/average mode for temperature.."
line.word 0x6 "ADANSB0,A/D Channel Select Register B0"
bitfld.word 0x6 15. "ANSB15,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 14. "ANSB14,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 13. "ANSB13,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 12. "ANSB12,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 11. "ANSB11,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 10. "ANSB10,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 9. "ANSB09,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 8. "ANSB08,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 7. "ANSB07,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 6. "ANSB06,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 5. "ANSB05,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 4. "ANSB04,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 3. "ANSB03,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 2. "ANSB02,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x6 1. "ANSB01,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x6 0. "ANSB00,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
line.word 0x8 "ADANSB1,A/D Channel Select Register B1"
bitfld.word 0x8 15. "ANSB31,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x8 14. "ANSB30,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x8 13. "ANSB29,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x8 12. "ANSB28,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x8 11. "ANSB27,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x8 10. "ANSB26,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x8 9. "ANSB25,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x8 8. "ANSB24,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x8 7. "ANSB23,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x8 6. "ANSB22,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x8 5. "ANSB21,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x8 4. "ANSB20,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x8 3. "ANSB19,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x8 2. "ANSB18,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
newline
bitfld.word 0x8 1. "ANSB17,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
bitfld.word 0x8 0. "ANSB16,A/D Conversion Channels Select" "0: Do not select associated input channel.,1: Select associated input channel."
rgroup.word 0x18++0x7
line.word 0x0 "ADDBLDR,A/D Data Duplexing Register"
hexmask.word 0x0 0.--15. 1. "ADDBLDR,Converted Value 15 to 0"
line.word 0x2 "ADTSDR,A/D Temperature Sensor Data Register"
hexmask.word 0x2 0.--15. 1. "ADTSDR,Converted Value 15 to 0"
line.word 0x4 "ADOCDR,A/D Internal Reference Voltage Data Register"
hexmask.word 0x4 0.--15. 1. "ADOCDR,Converted Value 15 to 0"
line.word 0x6 "ADRD,A/D Self-Diagnosis Data Register"
bitfld.word 0x6 14.--15. "DIAGST,Self-Diagnosis Status" "0: Self-diagnosis not executed after power-on.,1: Self-diagnosis was executed using the 0 V voltage.,?,?"
hexmask.word 0x6 0.--11. 1. "AD,Converted Value 11 to 0"
repeat 3. (increment 0x0 0x1)(increment 0x0 0x2)
rgroup.word ($2+0x20)++0x1
line.word 0x0 "ADDR$1,A/D Data Registers %s"
hexmask.word 0x0 0.--15. 1. "ADDR,Converted Value 15 to 0"
repeat.end
repeat 5. (increment 0x0 0x1)(increment 0x0 0x2)
rgroup.word ($2+0x28)++0x1
line.word 0x0 "ADDR$1,A/D Data Registers %s"
hexmask.word 0x0 0.--15. 1. "ADDR,Converted Value 15 to 0"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x2)
rgroup.word ($2+0x36)++0x1
line.word 0x0 "ADDR$1,A/D Data Registers %s"
hexmask.word 0x0 0.--15. 1. "ADDR,Converted Value 15 to 0"
repeat.end
rgroup.word 0x40++0x1
line.word 0x0 "ADDR16,A/D Data Registers 16"
hexmask.word 0x0 0.--15. 1. "ADDR,Converted Value 15 to 0"
group.byte 0x7A++0x0
line.byte 0x0 "ADDISCR,A/D Disconnection Detection Control Register"
bitfld.byte 0x0 4. "PCHG,Precharge/discharge select" "0: Discharge,1: Precharge"
hexmask.byte 0x0 0.--3. 1. "ADNDIS,Disconnection Detection Assist Setting"
group.word 0x80++0x1
line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register"
bitfld.word 0x0 15. "GBRP,Single Scan Continuous Start" "0: Single scan is not continuously activated.,1: Single scan for the group with the.."
bitfld.word 0x0 14. "LGRRS,Enabled only when PGS = 1 and GBRSCN = 1." "0: Start rescanning from the first channel for..,1: Start rescanning from the channel for which A/D.."
newline
bitfld.word 0x0 1. "GBRSCN,Lower-Priority Group Restart Setting" "0: Disable rescanning of the group that was stopped..,1: Enable rescanning of the group that was stopped.."
bitfld.word 0x0 0. "PGS,Group Priority Operation Setting" "0: Operate without group priority control.,1: Operate with group priority control."
rgroup.word 0x84++0x3
line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A"
hexmask.word 0x0 0.--15. 1. "ADDBLDR,Converted Value 15 to 0"
line.word 0x2 "ADDBLDRB,A/D Data Duplexing Register B"
hexmask.word 0x2 0.--15. 1. "ADDBLDR,Converted Value 15 to 0"
rgroup.byte 0x8C++0x0
line.byte 0x0 "ADWINMON,A/D Compare Function Window A/B Status Monitor Register"
bitfld.byte 0x0 5. "MONCMPB,Comparison Result Monitor B" "0: Window B comparison conditions are not met.,1: Window B comparison conditions are met."
bitfld.byte 0x0 4. "MONCMPA,Comparison Result Monitor A" "0: Window A comparison conditions are not met.,1: Window A comparison conditions are met."
newline
bitfld.byte 0x0 0. "MONCOMB,Combination Result Monitor" "0: Window A/B composite conditions are not met.,1: Window A/B composite conditions are met."
group.word 0x90++0x1
line.word 0x0 "ADCMPCR,A/D Compare Function Control Register"
bitfld.word 0x0 15. "CMPAIE,Compare A Interrupt Enable" "0: Disable ADC120_CMPAI interrupt when comparison..,1: Enable ADC120_CMPAI interrupt when comparison.."
bitfld.word 0x0 14. "WCMPE,Window Function Setting" "0: Disable window function Window A and window B..,1: Enable window function Window A and window B.."
newline
bitfld.word 0x0 13. "CMPBIE,Compare B Interrupt Enable" "0: Disable ADC120_CMPBI interrupt when comparison..,1: Enable ADC120_CMPBI interrupt when comparison.."
bitfld.word 0x0 11. "CMPAE,Compare Window A Operation Enable" "0: Disable compare window A operation. Disable..,1: Enable compare window A operation."
newline
bitfld.word 0x0 9. "CMPBE,Compare Window B Operation Enable" "0: Disable compare window B operation. Disable..,1: Enable compare window B operation."
bitfld.word 0x0 0.--1. "CMPAB,Window A/B Composite Conditions Setting" "0: Output ADC120_WCMPM when window A OR window B..,1: Output ADC120_WCMPM when window A EXOR window B..,?,?"
group.byte 0x92++0x1
line.byte 0x0 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register"
bitfld.byte 0x0 1. "CMPOCA,Internal Reference Voltage Compare Select" "0: Exclude the internal reference voltage from the..,1: Include the internal reference voltage in the.."
bitfld.byte 0x0 0. "CMPTSA,Temperature Sensor Output Compare Select" "0: Exclude the temperature sensor output from the..,1: Include the temperature sensor output in the.."
line.byte 0x1 "ADCMPLER,A/D Compare Function Window A Extended Input Comparison Condition Setting Register"
bitfld.byte 0x1 1. "CMPLOCA,Compare Window A Internal Reference Voltage Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.byte 0x1 0. "CMPLTSA,Compare Window A Temperature Sensor Output Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
group.word 0x94++0x7
line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0"
bitfld.word 0x0 15. "CMPCHA15,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x0 14. "CMPCHA14,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x0 13. "CMPCHA13,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x0 12. "CMPCHA12,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x0 11. "CMPCHA11,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x0 10. "CMPCHA10,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x0 9. "CMPCHA09,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x0 8. "CMPCHA08,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x0 7. "CMPCHA07,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x0 6. "CMPCHA06,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x0 5. "CMPCHA05,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x0 4. "CMPCHA04,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x0 3. "CMPCHA03,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x0 2. "CMPCHA02,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x0 1. "CMPCHA01,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x0 0. "CMPCHA00,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1"
bitfld.word 0x2 15. "CMPCHA31,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x2 14. "CMPCHA30,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x2 13. "CMPCHA29,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x2 12. "CMPCHA28,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x2 11. "CMPCHA27,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x2 10. "CMPCHA26,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x2 9. "CMPCHA25,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x2 8. "CMPCHA24,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x2 7. "CMPCHA23,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x2 6. "CMPCHA22,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x2 5. "CMPCHA21,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x2 4. "CMPCHA20,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x2 3. "CMPCHA19,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x2 2. "CMPCHA18,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
newline
bitfld.word 0x2 1. "CMPCHA17,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
bitfld.word 0x2 0. "CMPCHA16,Compare Window A Channel Select" "0: Disable compare function for associated input..,1: Enable compare function for associated input.."
line.word 0x4 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0"
bitfld.word 0x4 15. "CMPLCHA15,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x4 14. "CMPLCHA14,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x4 13. "CMPLCHA13,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x4 12. "CMPLCHA12,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x4 11. "CMPLCHA11,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x4 10. "CMPLCHA10,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x4 9. "CMPLCHA09,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x4 8. "CMPLCHA08,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x4 7. "CMPLCHA07,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x4 6. "CMPLCHA06,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x4 5. "CMPLCHA05,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x4 4. "CMPLCHA04,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x4 3. "CMPLCHA03,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x4 2. "CMPLCHA02,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x4 1. "CMPLCHA01,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x4 0. "CMPLCHA00,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
line.word 0x6 "ADCMPLR1,A/D Compare Function Window A Comparison Condition Setting Register 1"
bitfld.word 0x6 15. "CMPLCHA31,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x6 14. "CMPLCHA30,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x6 13. "CMPLCHA29,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x6 12. "CMPLCHA28,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x6 11. "CMPLCHA27,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x6 10. "CMPLCHA26,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x6 9. "CMPLCHA25,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x6 8. "CMPLCHA24,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x6 7. "CMPLCHA23,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x6 6. "CMPLCHA22,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x6 5. "CMPLCHA21,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x6 4. "CMPLCHA20,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x6 3. "CMPLCHA19,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x6 2. "CMPLCHA18,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
newline
bitfld.word 0x6 1. "CMPLCHA17,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
bitfld.word 0x6 0. "CMPLCHA16,Compare Window A Comparison Condition Select" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
group.word ($2+0x9C)++0x1
line.word 0x0 "ADCMPDR$1,A/D Compare Function Window A Lower-Side/Upper-Side Level Setting Register"
repeat.end
group.word 0xA0++0x3
line.word 0x0 "ADCMPSR0,A/D Compare Function Window A Channel Status Register 0"
bitfld.word 0x0 15. "CMPSTCHA15,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x0 14. "CMPSTCHA14,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x0 13. "CMPSTCHA13,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x0 12. "CMPSTCHA12,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x0 11. "CMPSTCHA11,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x0 10. "CMPSTCHA10,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x0 9. "CMPSTCHA09,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x0 8. "CMPSTCHA08,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x0 7. "CMPSTCHA07,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x0 6. "CMPSTCHA06,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x0 5. "CMPSTCHA05,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x0 4. "CMPSTCHA04,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x0 3. "CMPSTCHA03,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x0 2. "CMPSTCHA02,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x0 1. "CMPSTCHA01,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x0 0. "CMPSTCHA00,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
line.word 0x2 "ADCMPSR1,A/D Compare Function Window A Channel Status Register1"
bitfld.word 0x2 15. "CMPSTCHA31,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x2 14. "CMPSTCHA30,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x2 13. "CMPSTCHA29,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x2 12. "CMPSTCHA28,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x2 11. "CMPSTCHA27,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x2 10. "CMPSTCHA26,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x2 9. "CMPSTCHA25,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x2 8. "CMPSTCHA24,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x2 7. "CMPSTCHA23,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x2 6. "CMPSTCHA22,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x2 5. "CMPSTCHA21,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x2 4. "CMPSTCHA20,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x2 3. "CMPSTCHA19,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x2 2. "CMPSTCHA18,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
newline
bitfld.word 0x2 1. "CMPSTCHA17,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.word 0x2 0. "CMPSTCHA16,Compare Window A Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
group.byte 0xA4++0x0
line.byte 0x0 "ADCMPSER,A/D Compare Function Window A Extended Input Channel Status Register"
bitfld.byte 0x0 1. "CMPSTOCA,Compare Window A Internal Reference Voltage Compare Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
bitfld.byte 0x0 0. "CMPSTTSA,Compare Window A Temperature Sensor Output Compare Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
group.byte 0xA6++0x0
line.byte 0x0 "ADCMPBNSR,A/D Compare Function Window B Channel Select Register"
bitfld.byte 0x0 7. "CMPLB,Compare Window B Comparison Condition Setting" "0: When window function is disabled (ADCMPCR.WCMPE..,1: When window function is disabled (ADCMPCR.WCMPE.."
hexmask.byte 0x0 0.--5. 1. "CMPCHB,Compare Window B Channel Select"
group.word 0xA8++0x3
line.word 0x0 "ADWINLLB,A/D Compare Function Window B Lower-Side/Upper-Side Level Setting Register"
line.word 0x2 "ADWINULB,A/D Compare Function Window B Lower-Side/Upper-Side Level Setting Register"
group.byte 0xAC++0x0
line.byte 0x0 "ADCMPBSR,A/D Compare Function Window B Status Register"
bitfld.byte 0x0 0. "CMPSTB,Compare Window B Flag" "0: Comparison conditions are not met.,1: Comparison conditions are met."
repeat 16. (increment 0x0 0x1)(increment 0x0 0x2)
rgroup.word ($2+0xB0)++0x1
line.word 0x0 "ADBUF$1,A/D Data Buffer Registers %s"
hexmask.word 0x0 0.--15. 1. "ADBUF,Converted Value 15 to 0"
repeat.end
group.byte 0xD0++0x0
line.byte 0x0 "ADBUFEN,A/D Data Buffer Enable Register"
bitfld.byte 0x0 0. "BUFEN,Data Buffer Enable" "0: The data buffer is not used.,1: The data buffer is used."
group.byte 0xD2++0x0
line.byte 0x0 "ADBUFPTR,A/D Data Buffer Pointer Register"
bitfld.byte 0x0 4. "PTROVF,Pointer Overflow Flag" "0: The data buffer pointer has not overflowed.,1: The data buffer pointer has overflowed."
hexmask.byte 0x0 0.--3. 1. "BUFPTR,Data Buffer Pointer"
group.byte 0xDD++0x2
line.byte 0x0 "ADSSTRL,A/D Sampling State Register"
hexmask.byte 0x0 0.--7. 1. "SST,Sampling Time Setting"
line.byte 0x1 "ADSSTRT,A/D Sampling State Register"
hexmask.byte 0x1 0.--7. 1. "SST,Sampling Time Setting"
line.byte 0x2 "ADSSTRO,A/D Sampling State Register"
hexmask.byte 0x2 0.--7. 1. "SST,Sampling Time Setting"
repeat 3. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0xE0)++0x0
line.byte 0x0 "ADSSTR$1,A/D Sampling State Register"
hexmask.byte 0x0 0.--7. 1. "SST,Sampling Time Setting"
repeat.end
repeat 5. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0xE4)++0x0
line.byte 0x0 "ADSSTR$1,A/D Sampling State Register"
hexmask.byte 0x0 0.--7. 1. "SST,Sampling Time Setting"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0xEB)++0x0
line.byte 0x0 "ADSSTR$1,A/D Sampling State Register"
hexmask.byte 0x0 0.--7. 1. "SST,Sampling Time Setting"
repeat.end
tree.end
tree "AGTW (Low Power Asynchronous General Purpose Timer)"
base ad:0x0
tree "AGTW0"
base ad:0x400E8000
group.long 0x0++0xB
line.long 0x0 "AGT,AGT Counter Register"
line.long 0x4 "AGTCMA,AGT CounterCompare Match A Register"
line.long 0x8 "AGTCMB,AGT CounterCompare Match B Register"
group.byte 0xC++0x2
line.byte 0x0 "AGTCR,AGT Control Register"
bitfld.byte 0x0 7. "TCMBF,Compare Match B Flag" "0: No match,1: Match"
bitfld.byte 0x0 6. "TCMAF,Compare Match A Flag" "0: No match,1: Match"
newline
bitfld.byte 0x0 5. "TUNDF,Underflow Flag" "0: No underflow,1: Underflow"
bitfld.byte 0x0 4. "TEDGF,Active Edge Judgment Flag" "0: No active edge received,1: Active edge received"
newline
bitfld.byte 0x0 2. "TSTOP,AGT Count Forced Stop" "0: Writing is invalid,1: The count is forcibly stopped"
rbitfld.byte 0x0 1. "TCSTF,AGT Count Status Flag" "0: Count stopped,1: Count in progress"
newline
bitfld.byte 0x0 0. "TSTART,AGT Count Start" "0: Count stops,1: Count starts"
line.byte 0x1 "AGTMR1,AGT Mode Register 1"
bitfld.byte 0x1 4.--6. "TCK,Count Source" "0: Setting prohibited,1: PCLKB/8,?,?,?,?,?,?"
bitfld.byte 0x1 3. "TEDGPL,Edge Polarity" "0: Single-edge,1: Both-edge"
newline
bitfld.byte 0x1 0.--2. "TMOD,Operating Mode" "0: Setting prohibited,1: Pulse output mode,?,?,?,?,?,?"
line.byte 0x2 "AGTMR2,AGT Mode Register 2"
bitfld.byte 0x2 7. "LPM,Low Power Mode" "0: Normal mode,1: Low power mode"
bitfld.byte 0x2 0.--2. "CKS,AGTLCLK or AGTSCLK Count Source Clock Frequency Division Ratio" "0: 1/1,1: 1/2,?,?,?,?,?,?"
group.byte 0x10++0x3
line.byte 0x0 "AGTIOC,AGT I/O Control Register"
bitfld.byte 0x0 6.--7. "TIOGT,Count Control" "0: Setting prohibited,1: Event is counted during polarity period..,?,?"
bitfld.byte 0x0 4.--5. "TIPF,Input Filter" "0: No filter,1: Filter sampled at PCLKB,?,?"
newline
bitfld.byte 0x0 2. "TOE,AGTOn pin Output Enable" "0: AGTOn pin output disabled,1: AGTOn pin output enabled"
bitfld.byte 0x0 0. "TEDGSEL,I/O Polarity Switch" "0,1"
line.byte 0x1 "AGTISR,AGT Event Pin Select Register"
bitfld.byte 0x1 2. "EEPS,AGTEEn Polarity Selection" "0: An event is counted during the low-level period,1: An event is counted during the high-level period"
line.byte 0x2 "AGTCMSR,AGT Compare Match Function Select Register"
bitfld.byte 0x2 6. "TOPOLB,AGTOBn Pin Polarity Select" "0: AGTOBn pin output is started on low. i.e. normal..,1: AGTOBn pin output is started on high. i.e."
bitfld.byte 0x2 5. "TOEB,AGTOBn Pin Output Enable" "0: AGTOBn pin output disabled,1: AGTOBn pin output enabled"
newline
bitfld.byte 0x2 4. "TCMEB,AGT Compare Match B Register Enable" "0: Compare match B register disabled,1: Compare match B register enabled"
bitfld.byte 0x2 2. "TOPOLA,AGTOAn Pin Polarity Select" "0: AGTOAn pin output is started on low. i.e. normal..,1: AGTOAn pin output is started on high. i.e."
newline
bitfld.byte 0x2 1. "TOEA,AGTOAn Pin Output Enable" "0: AGTOAn pin output disabled,1: AGTOAn pin output enabled"
bitfld.byte 0x2 0. "TCMEA,AGT Compare Match A Register Enable" "0: AGT Compare match A register disabled,1: AGT Compare match A register enabled"
line.byte 0x3 "AGTIOSEL,AGT Pin Select Register"
bitfld.byte 0x3 4. "TIES,AGTIOn Pin Input Enable" "0: External event input is disabled during Software..,1: External event input is enabled during Software.."
bitfld.byte 0x3 0.--1. "SEL,AGTIOn Pin Select" "0: Select Pm/AGTIO as AGTIO. Pm/AGTIO can not be..,1: Setting prohibited,?,?"
tree.end
tree "AGTW1"
base ad:0x400E8100
group.long 0x0++0xB
line.long 0x0 "AGT,AGT Counter Register"
line.long 0x4 "AGTCMA,AGT CounterCompare Match A Register"
line.long 0x8 "AGTCMB,AGT CounterCompare Match B Register"
group.byte 0xC++0x2
line.byte 0x0 "AGTCR,AGT Control Register"
bitfld.byte 0x0 7. "TCMBF,Compare Match B Flag" "0: No match,1: Match"
bitfld.byte 0x0 6. "TCMAF,Compare Match A Flag" "0: No match,1: Match"
newline
bitfld.byte 0x0 5. "TUNDF,Underflow Flag" "0: No underflow,1: Underflow"
bitfld.byte 0x0 4. "TEDGF,Active Edge Judgment Flag" "0: No active edge received,1: Active edge received"
newline
bitfld.byte 0x0 2. "TSTOP,AGT Count Forced Stop" "0: Writing is invalid,1: The count is forcibly stopped"
rbitfld.byte 0x0 1. "TCSTF,AGT Count Status Flag" "0: Count stopped,1: Count in progress"
newline
bitfld.byte 0x0 0. "TSTART,AGT Count Start" "0: Count stops,1: Count starts"
line.byte 0x1 "AGTMR1,AGT Mode Register 1"
bitfld.byte 0x1 4.--6. "TCK,Count Source" "0: Setting prohibited,1: PCLKB/8,?,?,?,?,?,?"
bitfld.byte 0x1 3. "TEDGPL,Edge Polarity" "0: Single-edge,1: Both-edge"
newline
bitfld.byte 0x1 0.--2. "TMOD,Operating Mode" "0: Setting prohibited,1: Pulse output mode,?,?,?,?,?,?"
line.byte 0x2 "AGTMR2,AGT Mode Register 2"
bitfld.byte 0x2 7. "LPM,Low Power Mode" "0: Normal mode,1: Low power mode"
bitfld.byte 0x2 0.--2. "CKS,AGTLCLK or AGTSCLK Count Source Clock Frequency Division Ratio" "0: 1/1,1: 1/2,?,?,?,?,?,?"
group.byte 0x10++0x3
line.byte 0x0 "AGTIOC,AGT I/O Control Register"
bitfld.byte 0x0 6.--7. "TIOGT,Count Control" "0: Setting prohibited,1: Event is counted during polarity period..,?,?"
bitfld.byte 0x0 4.--5. "TIPF,Input Filter" "0: No filter,1: Filter sampled at PCLKB,?,?"
newline
bitfld.byte 0x0 2. "TOE,AGTOn pin Output Enable" "0: AGTOn pin output disabled,1: AGTOn pin output enabled"
bitfld.byte 0x0 0. "TEDGSEL,I/O Polarity Switch" "0,1"
line.byte 0x1 "AGTISR,AGT Event Pin Select Register"
bitfld.byte 0x1 2. "EEPS,AGTEEn Polarity Selection" "0: An event is counted during the low-level period,1: An event is counted during the high-level period"
line.byte 0x2 "AGTCMSR,AGT Compare Match Function Select Register"
bitfld.byte 0x2 6. "TOPOLB,AGTOBn Pin Polarity Select" "0: AGTOBn pin output is started on low. i.e. normal..,1: AGTOBn pin output is started on high. i.e."
bitfld.byte 0x2 5. "TOEB,AGTOBn Pin Output Enable" "0: AGTOBn pin output disabled,1: AGTOBn pin output enabled"
newline
bitfld.byte 0x2 4. "TCMEB,AGT Compare Match B Register Enable" "0: Compare match B register disabled,1: Compare match B register enabled"
bitfld.byte 0x2 2. "TOPOLA,AGTOAn Pin Polarity Select" "0: AGTOAn pin output is started on low. i.e. normal..,1: AGTOAn pin output is started on high. i.e."
newline
bitfld.byte 0x2 1. "TOEA,AGTOAn Pin Output Enable" "0: AGTOAn pin output disabled,1: AGTOAn pin output enabled"
bitfld.byte 0x2 0. "TCMEA,AGT Compare Match A Register Enable" "0: AGT Compare match A register disabled,1: AGT Compare match A register enabled"
line.byte 0x3 "AGTIOSEL,AGT Pin Select Register"
bitfld.byte 0x3 4. "TIES,AGTIOn Pin Input Enable" "0: External event input is disabled during Software..,1: External event input is enabled during Software.."
bitfld.byte 0x3 0.--1. "SEL,AGTIOn Pin Select" "0: Select Pm/AGTIO as AGTIO. Pm/AGTIO can not be..,1: Setting prohibited,?,?"
tree.end
tree.end
tree "BUS (Bus Control)"
base ad:0x40003000
group.word 0x1100++0x1
line.word 0x0 "BUSSCNTFHBIU,Slave Bus Control Register"
bitfld.word 0x0 0.--1. "ARBS,Arbitration Select for two masters" "0: Setting prohibited,1: DMAC/DTC <--> CPU,?,?"
group.word 0x1104++0x1
line.word 0x0 "BUSSCNTFLBIU,Slave Bus Control Register"
bitfld.word 0x0 0.--1. "ARBS,Arbitration Select for two masters" "0: Setting prohibited,1: DMAC/DTC <--> CPU,?,?"
group.word 0x1110++0x1
line.word 0x0 "BUSSCNTS0BIU,Slave Bus Control Register"
bitfld.word 0x0 0.--1. "ARBS,Arbitration Select for two masters" "0: Setting prohibited,1: DMAC/DTC <--> CPU,?,?"
group.word 0x1120++0x1
line.word 0x0 "BUSSCNTPSBIU,Slave Bus Control Register"
bitfld.word 0x0 0. "ARBS,Arbitration Select for two masters" "0: DMAC/DTC > CPU,1: DMAC/DTC <--> CPU"
group.word 0x1130++0x1
line.word 0x0 "BUSSCNTPLBIU,Slave Bus Control Register"
bitfld.word 0x0 0. "ARBS,Arbitration Select for two masters" "0: DMAC/DTC > CPU,1: DMAC/DTC <--> CPU"
group.word 0x1134++0x1
line.word 0x0 "BUSSCNTPHBIU,Slave Bus Control Register"
bitfld.word 0x0 0. "ARBS,Arbitration Select for two masters" "0: DMAC/DTC > CPU,1: DMAC/DTC <--> CPU"
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.long ($2+0x1800)++0x3
line.long 0x0 "BUS$1ERRADD,BUS Error Address Register"
hexmask.long 0x0 0.--31. 1. "BERAD,Bus Error Address"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x1804)++0x0
line.byte 0x0 "BUS$1ERRRW,BUS Error Read Write Register"
bitfld.byte 0x0 0. "RWSTAT,Error Access Read/Write Status" "0: Read access,1: Write access"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.long ($2+0x1900)++0x3
line.long 0x0 "BTZF$1ERRADD,BUS TZF Error Address Register"
hexmask.long 0x0 0.--31. 1. "BTZFERAD,Bus TrustZone Filter Error Address"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x1904)++0x0
line.byte 0x0 "BTZF$1ERRRW,BUS TZF Error Read Write Register"
bitfld.byte 0x0 0. "TRWSTAT,TrustZone filter error access Read/Write Status" "0: Read access,1: Write access"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x1A00)++0x0
line.byte 0x0 "BUS$1ERRSTAT,BUS Error Status Register %s"
bitfld.byte 0x0 4. "ILERRSTAT,Illegal address access Error Status" "0: No error occurred,1: Error occurred"
bitfld.byte 0x0 3. "MMERRSTAT,Master MPU Error Status" "0: No error occurred,1: Error occurred"
bitfld.byte 0x0 1. "STERRSTAT,Slave TrustZone filter Error Status" "0: No error occurred,1: Error occurred"
bitfld.byte 0x0 0. "SLERRSTAT,Slave bus Error Status" "0: No error occurred,1: Error occurred"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
group.byte ($2+0x1A08)++0x0
line.byte 0x0 "BUS$1ERRCLR,BUS Error Clear Register %s"
bitfld.byte 0x0 4. "ILERRCLR,Illegal Address Access Error Clear" "0,1"
bitfld.byte 0x0 3. "MMERRCLR,Master MPU Error Clear" "0,1"
bitfld.byte 0x0 1. "STERRCLR,Slave TrustZone filter Error Clear" "0,1"
bitfld.byte 0x0 0. "SLERRCLR,Slave bus Error Clear" "0,1"
repeat.end
rgroup.byte 0x1A24++0x0
line.byte 0x0 "DMACDTCERRSTAT,DMAC/DTC Error Status Register"
bitfld.byte 0x0 0. "MTERRSTAT,Master TrustZone Filter Error Status" "0: No error occurred,1: Error occurred"
group.byte 0x1A2C++0x0
line.byte 0x0 "DMACDTCERRCLR,DMAC/DTC Error Clear Register"
bitfld.byte 0x0 0. "MTERRCLR,Master TrustZone filter Error Clear" "0,1"
tree.end
tree "CAC (Clock Frequency Accuracy Measurement Circuit)"
base ad:0x40083600
group.byte 0x0++0x3
line.byte 0x0 "CACR0,CAC Control Register 0"
bitfld.byte 0x0 0. "CFME,Clock Frequency Measurement Enable" "0: Disable,1: Enable"
line.byte 0x1 "CACR1,CAC Control Register 1"
bitfld.byte 0x1 6.--7. "EDGES,Valid Edge Select" "0: Rising edge,1: Falling edge,?,?"
bitfld.byte 0x1 4.--5. "TCSS,Timer Count Clock Source Select" "0: No division,1: x 1/4 clock,?,?"
newline
bitfld.byte 0x1 1.--3. "FMCS,Measurement Target Clock Select" "0: Main clock oscillator,1: Sub-clock oscillator,?,?,?,?,?,?"
bitfld.byte 0x1 0. "CACREFE,CACREF Pin Input Enable" "0: Disable,1: Enable"
line.byte 0x2 "CACR2,CAC Control Register 2"
bitfld.byte 0x2 6.--7. "DFS,Digital Filter Select" "0: Disable digital filtering,1: Use sampling clock for the digital filter as the..,?,?"
bitfld.byte 0x2 4.--5. "RCDS,Measurement Reference Clock Frequency Division Ratio Select" "0: x 1/32 clock,1: x 1/128 clock,?,?"
newline
bitfld.byte 0x2 1.--3. "RSCS,Measurement Reference Clock Select" "0: Main clock oscillator,1: Sub-clock oscillator,?,?,?,?,?,?"
bitfld.byte 0x2 0. "RPS,Reference Signal Select" "0: CACREF pin input,1: Internal clock (internally generated signal)"
line.byte 0x3 "CAICR,CAC Interrupt Control Register"
bitfld.byte 0x3 6. "OVFFCL,OVFF Clear" "0: No effect,1: The CASTR.OVFF flag is cleared."
bitfld.byte 0x3 5. "MENDFCL,MENDF Clear" "0: No effect,1: The CASTR.MENDF flag is cleared"
newline
bitfld.byte 0x3 4. "FERRFCL,FERRF Clear" "0: No effect,1: The CASTR.FERRF flag is cleared"
bitfld.byte 0x3 2. "OVFIE,Overflow Interrupt Request Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x3 1. "MENDIE,Measurement End Interrupt Request Enable" "0: Disable,1: Enable"
bitfld.byte 0x3 0. "FERRIE,Frequency Error Interrupt Request Enable" "0: Disable,1: Enable"
rgroup.byte 0x4++0x0
line.byte 0x0 "CASTR,CAC Status Register"
bitfld.byte 0x0 2. "OVFF,Overflow Flag" "0: Counter has not overflowed,1: Counter overflowed"
bitfld.byte 0x0 1. "MENDF,Measurement End Flag" "0: Measurement is in progress,1: Measurement ended"
newline
bitfld.byte 0x0 0. "FERRF,Frequency Error Flag" "0: Clock frequency is within the allowable range,1: Clock frequency has deviated beyond the.."
group.word 0x6++0x3
line.word 0x0 "CAULVR,CAC Upper-Limit Value Setting Register"
line.word 0x2 "CALLVR,CAC Lower-Limit Value Setting Register"
rgroup.word 0xA++0x1
line.word 0x0 "CACNTBR,CAC Counter Buffer Register"
tree.end
tree "CACHE (Cache Control Registers)"
base ad:0x40007000
group.long 0x0++0xB
line.long 0x0 "CCACTL,C-Cache Control Register"
bitfld.long 0x0 0. "ENC,C-Cache Enable" "0: Disable C-cache,1: Enable C-cache"
line.long 0x4 "CCAFCT,C-Cache Flush Control Register"
bitfld.long 0x4 0. "FC,C-Cache Flush" "0: No action,1: C-cache line flush (all lines invalidated)"
line.long 0x8 "CCALCF,C-Cache Line Configuration Register"
bitfld.long 0x8 0.--1. "CC,C-Cache Line Size" "0: Prohibited,1: Cache line size 32 bytes,?,?"
group.long 0x40++0xB
line.long 0x0 "SCACTL,S-Cache Control Register"
bitfld.long 0x0 0. "ENS,S-Cache Enable" "0: Disable S-cache,1: Enable S-cache"
line.long 0x4 "SCAFCT,S-Cache Flush Control Register"
bitfld.long 0x4 0. "FS,S-Cache Flush" "0: No action,1: S-cache line flush (all lines invalidated)"
line.long 0x8 "SCALCF,S-Cache Line Configuration Register"
bitfld.long 0x8 0.--1. "CS,S-Cache Line Size" "0: Prohibited,1: Cache line size 32 bytes,?,?"
group.long 0x200++0x7
line.long 0x0 "CAPOAD,Cache Parity Error Operation After Detection Register"
bitfld.long 0x0 0. "OAD,Operation after Detection" "0: Non-maskable interrupt,1: Reset"
line.long 0x4 "CAPRCR,Cache Protection Register"
hexmask.long.byte 0x4 1.--7. 1. "KW,Write key code"
bitfld.long 0x4 0. "PRCR,Register Write Control" "0: Disable writes to protected registers,1: Enable writes to protected registers"
tree.end
tree "CANFD (CAN with Flexible Data-rate)"
base ad:0x400B0000
group.long 0x0++0xF
line.long 0x0 "CFDC0NCFG,Channel 0 Nominal Bitrate Configuration Register"
hexmask.long.byte 0x0 25.--31. 1. "NTSEG2,Timing Segment 2"
hexmask.long.byte 0x0 17.--24. 1. "NTSEG1,Timing Segment 1"
newline
hexmask.long.byte 0x0 10.--16. 1. "NSJW,Resynchronization Jump Width"
hexmask.long.word 0x0 0.--9. 1. "NBRP,Channel Nominal Baud Rate Prescaler"
line.long 0x4 "CFDC0CTR,Channel 0 Control Register"
bitfld.long 0x4 31. "ROM,Restricted Operation Mode" "0: Restricted operation mode disabled,1: Restricted operation mode enabled"
bitfld.long 0x4 30. "BFT,Bit Flip Test" "0: First data bit of reception stream not inverted,1: First data bit of reception stream inverted"
newline
bitfld.long 0x4 25.--26. "CTMS,Channel Test Mode Select" "0: Basic test mode,1: Listen-only mode,?,?"
bitfld.long 0x4 24. "CTME,Channel Test Mode Enable" "0: Channel test mode disabled,1: Channel test mode enabled"
newline
bitfld.long 0x4 23. "ERRD,Channel Error Display" "0: Only the first set of error codes displayed,1: Accumulated error codes displayed"
bitfld.long 0x4 21.--22. "BOM,Channel Bus-Off Mode" "0: Normal mode (comply with ISO 11898-1),1: Entry to Halt mode automatically at bus-off start,?,?"
newline
bitfld.long 0x4 19. "TDCVFIE,Transceiver Delay Compensation Violation Interrupt Enable" "0: Transceiver delay compensation violation..,1: Transceiver delay compensation violation.."
bitfld.long 0x4 18. "SOCOIE,Successful Occurrence Counter Overflow Interrupt Enable" "0: Successful occurrence counter overflow interrupt..,1: Successful occurrence counter overflow interrupt.."
newline
bitfld.long 0x4 17. "EOCOIE,Error Occurrence Counter Overflow Interrupt Enable" "0: Error occurrence counter overflow interrupt..,1: Error occurrence counter overflow interrupt.."
bitfld.long 0x4 16. "TAIE,Transmission Abort Interrupt Enable" "0: TX abort interrupt disabled,1: TX abort interrupt enabled"
newline
bitfld.long 0x4 15. "ALIE,Arbitration Lost Interrupt Enable" "0: Arbitration lost interrupt disabled,1: Arbitration lost interrupt enabled"
bitfld.long 0x4 14. "BLIE,Bus Lock Interrupt Enable" "0: Bus lock interrupt disabled,1: Bus lock interrupt enabled"
newline
bitfld.long 0x4 13. "OLIE,Overload Interrupt Enable" "0: Overload interrupt disabled,1: Overload interrupt enabled"
bitfld.long 0x4 12. "BORIE,Bus-Off Recovery Interrupt Enable" "0: Bus-off recovery interrupt disabled,1: Bus-off recovery interrupt enabled"
newline
bitfld.long 0x4 11. "BOEIE,Bus-Off Entry Interrupt Enable" "0: Bus-off entry interrupt disabled,1: Bus-off entry interrupt enabled"
bitfld.long 0x4 10. "EPIE,Error Passive Interrupt Enable" "0: Error passive interrupt disabled,1: Error passive interrupt enabled"
newline
bitfld.long 0x4 9. "EWIE,Error Warning Interrupt Enable" "0: Error warning interrupt disabled,1: Error warning interrupt enabled"
bitfld.long 0x4 8. "BEIE,Bus Error Interrupt Enable" "0: Bus error interrupt disabled,1: Bus error interrupt enabled"
newline
bitfld.long 0x4 3. "RTBO,Return from Bus-Off" "0: Channel is not forced to return from bus-off,1: Channel is forced to return from bus-off"
bitfld.long 0x4 2. "CSLPR,Channel Sleep Request" "0: Channel sleep request disabled,1: Channel sleep request enabled"
newline
bitfld.long 0x4 0.--1. "CHMDC,Channel Mode Control" "0: Channel operation mode request,1: Channel reset request,?,?"
line.long 0x8 "CFDC0STS,Channel 0 Status Register"
hexmask.long.byte 0x8 24.--31. 1. "TEC,Transmission Error Count"
hexmask.long.byte 0x8 16.--23. 1. "REC,Reception Error Count"
newline
bitfld.long 0x8 8. "ESIF,Error State Indication Flag" "0: No CANFD message has been received when the ESI..,1: At least one CANFD message was received when the.."
rbitfld.long 0x8 7. "COMSTS,Channel Communication Status" "0: Channel is not ready for communication,1: Channel is ready for communication"
newline
rbitfld.long 0x8 6. "RECSTS,Channel Receive Status" "0: Channel is not receiving,1: Channel is receiving"
rbitfld.long 0x8 5. "TRMSTS,Channel Transmit Status" "0: Channel is not transmitting,1: Channel is transmitting"
newline
rbitfld.long 0x8 4. "BOSTS,Channel Bus-Off Status" "0: Channel not in bus-off state,1: Channel in bus-off state"
rbitfld.long 0x8 3. "EPSTS,Channel Error Passive Status" "0: Channel not in error passive state,1: Channel in error passive state"
newline
rbitfld.long 0x8 2. "CSLPSTS,Channel Sleep Status" "0: Channel not in Sleep mode,1: Channel in Sleep mode"
rbitfld.long 0x8 1. "CHLTSTS,Channel Halt Status" "0: Channel not in Halt mode,1: Channel in Halt mode"
newline
rbitfld.long 0x8 0. "CRSTSTS,Channel Reset Status" "0: Channel not in Reset mode,1: Channel in Reset mode"
line.long 0xC "CFDC0ERFL,Channel 0 Error Flag Register"
hexmask.long.word 0xC 16.--30. 1. "CRCREG,CRC Register value"
bitfld.long 0xC 14. "ADERR,Acknowledge Delimiter Error" "0: Channel acknowledge delimiter error not detected,1: Channel acknowledge delimiter error detected"
newline
bitfld.long 0xC 13. "B0ERR,Bit 0 Error" "0: Channel bit 0 error not detected,1: Channel bit 0 error detected"
bitfld.long 0xC 12. "B1ERR,Bit 1 Error" "0: Channel bit 1 error not detected,1: Channel bit 1 error detected"
newline
bitfld.long 0xC 11. "CERR,CRC Error" "0: Channel CRC error not detected,1: Channel CRC error detected"
bitfld.long 0xC 10. "AERR,Acknowledge Error" "0: Channel acknowledge error not detected,1: Channel acknowledge error detected"
newline
bitfld.long 0xC 9. "FERR,Form Error" "0: Channel form error not detected,1: Channel form error detected"
bitfld.long 0xC 8. "SERR,Stuff Error" "0: Channel stuff error not detected,1: Channel stuff error detected"
newline
bitfld.long 0xC 7. "ALF,Arbitration Lost Flag" "0: Channel arbitration lost not detected,1: Channel arbitration lost detected"
bitfld.long 0xC 6. "BLF,Bus Lock Flag" "0: Channel bus lock not detected,1: Channel bus lock detected"
newline
bitfld.long 0xC 5. "OVLF,Overload Flag" "0: Channel overload not detected,1: Channel overload detected"
bitfld.long 0xC 4. "BORF,Bus-Off Recovery Flag" "0: Channel bus-off recovery not detected,1: Channel bus-off recovery detected"
newline
bitfld.long 0xC 3. "BOEF,Bus-Off Entry Flag" "0: Channel bus-off entry not detected,1: Channel bus-off entry detected"
bitfld.long 0xC 2. "EPF,Error Passive Flag" "0: Channel error passive not detected,1: Channel error passive detected"
newline
bitfld.long 0xC 1. "EWF,Error Warning Flag" "0: Channel error warning not detected,1: Channel error warning detected"
bitfld.long 0xC 0. "BEF,Bus Error Flag" "0: Channel bus error not detected,1: Channel bus error detected"
group.long 0x14++0x7
line.long 0x0 "CFDGCFG,Global Configuration Register"
hexmask.long.word 0x0 16.--31. 1. "ITRCP,Interval Timer Reference Clock Prescaler"
bitfld.long 0x0 12. "TSSS,Timestamp Source Select" "0: Source clock for timestamp counter is peripheral..,1: Source clock for timestamp counter is bit time.."
newline
hexmask.long.byte 0x0 8.--11. 1. "TSP,Timestamp Prescaler"
bitfld.long 0x0 5. "CMPOC,CANFD Message Payload Overflow Configuration" "0: Message is rejected,1: Message payload is cut to fit to configured.."
newline
bitfld.long 0x0 4. "DCS,Data Link Controller Clock Select" "0: Internal clean clock,1: External clock source connected to CANMCLK pin"
bitfld.long 0x0 3. "MME,Mirror Mode Enable" "0: Mirror mode disabled,1: Mirror mode enabled"
newline
bitfld.long 0x0 2. "DRE,DLC Replacement Enable" "0: DLC replacement disabled,1: DLC replacement enabled"
bitfld.long 0x0 1. "DCE,DLC Check Enable" "0: DLC check disabled,1: DLC check enabled"
newline
bitfld.long 0x0 0. "TPRI,Transmission Priority" "0: ID priority,1: Message buffer number priority"
line.long 0x4 "CFDGCTR,Global Control Register"
bitfld.long 0x4 16. "TSRST,Timestamp Reset" "0: Timestamp not reset,1: Timestamp reset"
bitfld.long 0x4 11. "CMPOFIE,CANFD Message Payload Overflow Flag Interrupt Enable" "0: CANFD message payload overflow flag interrupt..,1: CANFD message payload overflow flag interrupt.."
newline
bitfld.long 0x4 10. "THLEIE,TX History List Entry Lost Interrupt Enable" "0: TX history list entry lost interrupt disabled,1: TX history list entry lost interrupt enabled"
bitfld.long 0x4 9. "MEIE,Message Lost Error Interrupt Enable" "0: Message lost error interrupt disabled,1: Message lost error interrupt enabled"
newline
bitfld.long 0x4 8. "DEIE,DLC Check Interrupt Enable" "0: DLC check interrupt disabled,1: DLC check interrupt enabled"
bitfld.long 0x4 2. "GSLPR,Global Sleep Request" "0: Global sleep request disabled,1: Global sleep request enabled"
newline
bitfld.long 0x4 0.--1. "GMDC,Global Mode Control" "0: Global operation mode request,1: Global reset mode request,?,?"
rgroup.long 0x1C++0x3
line.long 0x0 "CFDGSTS,Global Status Register"
bitfld.long 0x0 3. "GRAMINIT,Global RAM Initialization" "0: RAM initialization is complete,1: RAM initialization is ongoing"
bitfld.long 0x0 2. "GSLPSTS,Global Sleep Status" "0: Not in Sleep mode,1: In Sleep mode"
newline
bitfld.long 0x0 1. "GHLTSTS,Global Halt Status" "0: Not in Halt mode,1: In Halt mode"
bitfld.long 0x0 0. "GRSTSTS,Global Reset Status" "0: Not in Reset mode,1: In Reset mode"
group.long 0x20++0x3
line.long 0x0 "CFDGERFL,Global Error Flag Register"
bitfld.long 0x0 16. "EEF0,ECC Error Flag" "0: ECC error not detected during TX-SCAN,1: ECC error detected during TX-SCAN"
bitfld.long 0x0 3. "CMPOF,CANFD Message Payload Overflow Flag" "0: CANFD message payload overflow not detected,1: CANFD message payload overflow detected"
newline
rbitfld.long 0x0 2. "THLES,TX History List Entry Lost Error Status" "0: TX history list entry lost error not detected,1: TX history list entry lost error detected"
rbitfld.long 0x0 1. "MES,Message Lost Error Status" "0: Message lost error not detected,1: Message lost error detected"
newline
bitfld.long 0x0 0. "DEF,DLC Error Flag" "0: DLC error not detected,1: DLC error detected"
rgroup.long 0x24++0x3
line.long 0x0 "CFDGTSC,Global Timestamp Counter Register"
hexmask.long.word 0x0 0.--15. 1. "TS,Timestamp value"
group.long 0x28++0x13
line.long 0x0 "CFDGAFLECTR,Global Acceptance Filter List Entry Control Register"
bitfld.long 0x0 8. "AFLDAE,Acceptance Filter List Data Access Enable" "0: Acceptance Filter List data access disabled,1: Acceptance Filter List data access enabled"
bitfld.long 0x0 0. "AFLPN,Acceptance Filter List Page Number" "0,1"
line.long 0x4 "CFDGAFLCFG,Global Acceptance Filter List Configuration Register"
hexmask.long.byte 0x4 16.--21. 1. "RNC0,Rule Number"
line.long 0x8 "CFDRMNB,RX Message Buffer Number Register"
bitfld.long 0x8 8.--10. "RMPLS,Reception Message Buffer Payload Data Size" "0: 8 bytes,1: 12 bytes,?,?,?,?,?,?"
hexmask.long.byte 0x8 0.--5. 1. "NRXMB,Number of RX Message Buffers"
line.long 0xC "CFDRMND,RX Message Buffer New Data Register"
hexmask.long 0xC 0.--31. 1. "RMNS,RX Message Buffer New Data Status"
line.long 0x10 "CFDRMIEC,RX Message Buffer Interrupt Enable Configuration Register"
hexmask.long 0x10 0.--31. 1. "RMIEg,RX Message Buffer Interrupt Enable"
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x3C)++0x3
line.long 0x0 "CFDRFCC$1,RX FIFO Configuration/Control Registers %s"
bitfld.long 0x0 13.--15. "RFIGCV,RX FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th full,1: Interrupt generated when FIFO is 1/4th full,?,?,?,?,?,?"
bitfld.long 0x0 12. "RFIM,RX FIFO Interrupt Mode" "0: Interrupt generated when RX FIFO counter reaches..,1: Interrupt generated at the end of every received.."
newline
bitfld.long 0x0 8.--10. "RFDC,RX FIFO Depth Configuration" "0: FIFO Depth = 0 message,1: FIFO Depth = 4 messages,?,?,?,?,?,?"
bitfld.long 0x0 4.--6. "RFPLS,Rx FIFO Payload Data Size Configuration" "0: 8 bytes,1: 12 bytes,?,?,?,?,?,?"
newline
bitfld.long 0x0 1. "RFIE,RX FIFO Interrupt Enable" "0: FIFO interrupt generation disabled,1: FIFO interrupt generation enabled"
bitfld.long 0x0 0. "RFE,RX FIFO Enable" "0: FIFO disabled,1: FIFO enabled"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x44)++0x3
line.long 0x0 "CFDRFSTS$1,RX FIFO Status Registers %s"
hexmask.long.byte 0x0 8.--13. 1. "RFMC,RX FIFO Message Count"
bitfld.long 0x0 3. "RFIF,RX FIFO Interrupt Flag" "0: FIFO interrupt condition not satisfied,1: FIFO interrupt condition satisfied"
newline
bitfld.long 0x0 2. "RFMLT,RX FIFO Message Lost" "0: No message lost in FIFO,1: FIFO message lost"
rbitfld.long 0x0 1. "RFFLL,RX FIFO Full" "0: FIFO not full,1: FIFO full"
newline
rbitfld.long 0x0 0. "RFEMP,RX FIFO Empty" "0: FIFO not empty,1: FIFO empty"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x4C)++0x3
line.long 0x0 "CFDRFPCTR$1,RX FIFO Pointer Control Registers %s"
hexmask.long.byte 0x0 0.--7. 1. "RFPC,RX FIFO Pointer Control"
repeat.end
group.long 0x54++0x7
line.long 0x0 "CFDCFCC,Common FIFO Configuration/Control Register"
hexmask.long.byte 0x0 24.--31. 1. "CFITT,Common FIFO Interval Transmission Time"
bitfld.long 0x0 21.--23. "CFDC,Common FIFO Depth Configuration" "0: FIFO Depth = 0 message,1: FIFO Depth = 4 messages,?,?,?,?,?,?"
newline
bitfld.long 0x0 16.--17. "CFTML,Common FIFO TX Message Buffer Link" "0,1,2,3"
bitfld.long 0x0 13.--15. "CFIGCV,Common FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th full,1: Interrupt generated when FIFO is 1/4th full,?,?,?,?,?,?"
newline
bitfld.long 0x0 12. "CFIM,Common FIFO Interrupt Mode" "0: RX FIFO mode: RX interrupt generated when Common..,1: RX FIFO mode: RX interrupt generated at the end.."
bitfld.long 0x0 11. "CFITR,Common FIFO Interval Timer Resolution" "0: Reference clock period x 1,1: Reference clock period x 10"
newline
bitfld.long 0x0 10. "CFITSS,Common FIFO Interval Timer Source Select" "0: Reference clock (x 1 / x 10 period),1: Bit time clock of related channel (FIFO is.."
bitfld.long 0x0 8. "CFM,Common FIFO Mode" "0: RX FIFO mode,1: TX FIFO mode"
newline
bitfld.long 0x0 4.--6. "CFPLS,Common FIFO Payload Data Size Configuration" "0: 8 bytes,1: 12 bytes,?,?,?,?,?,?"
bitfld.long 0x0 2. "CFTXIE,Common FIFO TX Interrupt Enable" "0: FIFO interrupt generation disabled for Frame TX,1: FIFO interrupt generation enabled for Frame TX"
newline
bitfld.long 0x0 1. "CFRXIE,Common FIFO RX Interrupt Enable" "0: FIFO interrupt generation disabled for Frame RX,1: FIFO interrupt generation enabled for Frame RX"
bitfld.long 0x0 0. "CFE,Common FIFO Enable" "0: FIFO disabled,1: FIFO enabled"
line.long 0x4 "CFDCFSTS,Common FIFO Status Register"
hexmask.long.byte 0x4 8.--13. 1. "CFMC,Common FIFO Message Count"
bitfld.long 0x4 4. "CFTXIF,Common TX FIFO Interrupt Flag" "0: FIFO interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after frame.."
newline
bitfld.long 0x4 3. "CFRXIF,Common RX FIFO Interrupt Flag" "0: FIFO interrupt condition not satisfied after..,1: FIFO interrupt condition satisfied after frame.."
bitfld.long 0x4 2. "CFMLT,Common FIFO Message Lost" "0: Number of message lost in FIFO,1: FIFO message lost"
newline
rbitfld.long 0x4 1. "CFFLL,Common FIFO Full" "0: FIFO not full,1: FIFO full"
rbitfld.long 0x4 0. "CFEMP,Common FIFO Empty" "0: FIFO not empty,1: FIFO empty"
wgroup.long 0x5C++0x3
line.long 0x0 "CFDCFPCTR,Common FIFO Pointer Control Register"
hexmask.long.byte 0x0 0.--7. 1. "CFPC,Common FIFO Pointer Control"
rgroup.long 0x60++0xF
line.long 0x0 "CFDFESTS,FIFO Empty Status Register"
bitfld.long 0x0 8. "CFEMP,Common FIFO Empty Status" "0: Corresponding FIFO not empty,1: Corresponding FIFO empty"
bitfld.long 0x0 0.--1. "RFXEMP,RX FIFO Empty Status" "0: Corresponding FIFO not empty,1: Corresponding FIFO empty,?,?"
line.long 0x4 "CFDFFSTS,FIFO Full Status Register"
bitfld.long 0x4 8. "CFFLL,Common FIF0 Full Status" "0: Corresponding FIFO not full,1: Corresponding FIFO full"
bitfld.long 0x4 0.--1. "RFXFLL,RX FIF0 Full Status" "0: Corresponding FIFO not full,1: Corresponding FIFO full,?,?"
line.long 0x8 "CFDFMSTS,FIFO Message Lost Status Register"
bitfld.long 0x8 8. "CFMLT,Common FIFO Message Lost Status" "0: Corresponding FIFO Message Lost flag not set,1: Corresponding FIFO Message Lost flag set"
bitfld.long 0x8 0.--1. "RFXMLT,RX FIFO Message Lost Status" "0: Corresponding FIFO Message Lost flag not set,1: Corresponding FIFO Message Lost flag set,?,?"
line.long 0xC "CFDRFISTS,RX FIFO Interrupt Flag Status Register"
bitfld.long 0xC 0.--1. "RFXIF,RX FIFO[x] Interrupt Flag Status" "0: Corresponding RX FIFO Interrupt flag not set,1: Corresponding RX FIFO Interrupt flag set,?,?"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x70)++0x0
line.byte 0x0 "CFDTMC$1,TX Message Buffer Control Registers %s"
bitfld.byte 0x0 2. "TMOM,TX Message Buffer One-shot Mode" "0: TX message buffer not configured in one-shot mode,1: TX message buffer configured in one-shot mode"
bitfld.byte 0x0 1. "TMTAR,TX Message Buffer Transmission Abort Request" "0: TX message buffer transmission request abort not..,1: TX message buffer transmission request abort.."
newline
bitfld.byte 0x0 0. "TMTR,TX Message Buffer Transmission Request" "0: TX Message buffer transmission not requested,1: TX message buffer transmission requested"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x74)++0x0
line.byte 0x0 "CFDTMSTS$1,TX Message Buffer Status Registers %s"
rbitfld.byte 0x0 4. "TMTARM,TX Message Buffer Transmission Abort Request Mirrored" "0: TX message buffer transmission request abort not..,1: TX message buffer transmission request abort.."
rbitfld.byte 0x0 3. "TMTRM,TX Message Buffer Transmission Request Mirrored" "0: TX message buffer transmission not requested,1: TX message buffer transmission requested"
newline
bitfld.byte 0x0 1.--2. "TMTRF,TX Message Buffer Transmission Result Flag" "0: No result,1: Transmission aborted from the TX message buffer,?,?"
rbitfld.byte 0x0 0. "TMTSTS,TX Message Buffer Transmission Status" "0: No on-going transmission,1: On-going transmission"
repeat.end
rgroup.long 0x78++0xF
line.long 0x0 "CFDTMTRSTS,TX Message Buffer Transmission Request Status Register"
hexmask.long.byte 0x0 0.--3. 1. "CFDTMTRSTS,TX Message Buffer Transmission Request Status"
line.long 0x4 "CFDTMTARSTS,TX Message Buffer Transmission Abort Request Status Register"
hexmask.long.byte 0x4 0.--3. 1. "CFDTMTARSTS,TX Message Buffer Transmission Abort Request Status"
line.long 0x8 "CFDTMTCSTS,TX Message Buffer Transmission Completion Status Register"
hexmask.long.byte 0x8 0.--3. 1. "CFDTMTCSTS,TX Message Buffer Transmission Completion Status"
line.long 0xC "CFDTMTASTS,TX Message Buffer Transmission Abort Status Register"
hexmask.long.byte 0xC 0.--3. 1. "CFDTMTASTS,TX Message Buffer Transmission Abort Status"
group.long 0x88++0xB
line.long 0x0 "CFDTMIEC,TX Message Buffer Interrupt Enable Configuration Register"
hexmask.long.byte 0x0 0.--3. 1. "TMIEg,TX Message Buffer Interrupt Enable"
line.long 0x4 "CFDTXQCC,TX Queue Configuration/Control Register"
bitfld.long 0x4 8.--9. "TXQDC,TX Queue Depth Configuration" "0: 0 messages,1: Reserved,?,?"
bitfld.long 0x4 7. "TXQIM,TX Queue Interrupt Mode" "0: When the last message is successfully transmitted,1: At every successful transmission"
newline
bitfld.long 0x4 5. "TXQTXIE,TX Queue TX Interrupt Enable" "0: TX Queue TX interrupt disabled,1: TX Queue TX interrupt enabled"
bitfld.long 0x4 0. "TXQE,TX Queue Enable" "0: TX Queue disabled,1: TX Queue enabled"
line.long 0x8 "CFDTXQSTS,TX Queue Status Register"
rbitfld.long 0x8 8.--10. "TXQMC,TX Queue Message Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 2. "TXQTXIF,TX Queue TX Interrupt Flag" "0: TX Queue interrupt condition not satisfied after..,1: TX Queue interrupt condition satisfied after a.."
newline
rbitfld.long 0x8 1. "TXQFLL,TX Queue Full" "0: TX Queue not full,1: TX Queue full"
rbitfld.long 0x8 0. "TXQEMP,TX Queue Empty" "0: TX Queue not empty,1: TX Queue empty"
wgroup.long 0x94++0x3
line.long 0x0 "CFDTXQPCTR,TX Queue Pointer Control Register"
hexmask.long.byte 0x0 0.--7. 1. "TXQPC,TX Queue Pointer Control"
group.long 0x98++0x7
line.long 0x0 "CFDTHLCC,TX History List Configuration/Control Register"
bitfld.long 0x0 10. "THLDTE,TX History List Dedicated TX Enable" "0: TX FIFO + TX Queue,1: Flat TX MB + TX FIFO + TX Queue"
bitfld.long 0x0 9. "THLIM,TX History List Interrupt Mode" "0: Interrupt generated if TX History List level..,1: Interrupt generated for every successfully.."
newline
bitfld.long 0x0 8. "THLIE,TX History List Interrupt Enable" "0: TX History List Interrupt disabled,1: TX History List Interrupt enabled"
bitfld.long 0x0 0. "THLE,TX History List Enable" "0: TX History List disabled,1: TX History List enabled"
line.long 0x4 "CFDTHLSTS,TX History List Status Register"
hexmask.long.byte 0x4 8.--11. 1. "THLMC,TX History List Message Count"
bitfld.long 0x4 3. "THLIF,TX History List Interrupt Flag" "0: TX History List interrupt condition not satisfied,1: TX History List interrupt condition satisfied"
newline
bitfld.long 0x4 2. "THLELT,TX History List Entry Lost" "0: No entry lost in TX History List,1: TX History List entry Lost"
rbitfld.long 0x4 1. "THLFLL,TX History List Full" "0: TX History List not full,1: TX History List full"
newline
rbitfld.long 0x4 0. "THLEMP,TX History List Empty" "0: TX History List not empty,1: TX History List empty"
wgroup.long 0xA0++0x3
line.long 0x0 "CFDTHLPCTR,TX History List Pointer Control Register"
hexmask.long.byte 0x0 0.--7. 1. "THLPC,TX History List Pointer Control"
rgroup.long 0xA4++0x3
line.long 0x0 "CFDGTINTSTS,Global TX Interrupt Status Register"
bitfld.long 0x0 4. "THIF0,TX History List Interrupt" "0: Channel n TX History List Interrupt flag not set,1: Channel n TX History List Interrupt flag set"
bitfld.long 0x0 3. "CFTIF0,COM FIFO TX Mode Interrupt Flag" "0: Channel n COM FIFO TX Mode Interrupt flag not set,1: Channel n COM FIFO TX Mode Interrupt flag set"
newline
bitfld.long 0x0 2. "TQIF0,TX Queue Interrupt Flag" "0: Channel n TX Queue Interrupt flag not set,1: Channel n TX Queue Interrupt flag set"
bitfld.long 0x0 1. "TAI0,TX Abort Interrupt Flag" "0: Channel n TX Abort Interrupt flag not set,1: Channel n TX Abort Interrupt flag set"
newline
bitfld.long 0x0 0. "TSIF0,TX Successful Interrupt Flag" "0: Channel n TX Successful Interrupt flag not set,1: Channel n TX Successful Interrupt flag set"
group.long 0xA8++0xB
line.long 0x0 "CFDGTSTCFG,Global Test Configuration Register"
hexmask.long.byte 0x0 16.--19. 1. "RTMPS,RAM Test Mode Page Select"
line.long 0x4 "CFDGTSTCTR,Global Test Control Register"
bitfld.long 0x4 2. "RTME,RAM Test Mode Enable" "0: RAM test mode disabled,1: RAM test mode enabled"
line.long 0x8 "CFDGFDCFG,Global FD Configuration Register"
bitfld.long 0x8 8.--9. "TSCCFG,Timestamp Capture Configuration" "0: Timestamp capture at the sample point of SOF..,1: Timestamp capture at frame valid indication,?,?"
bitfld.long 0x8 0. "RPED,RES Bit Protocol Exception Disable" "0: Protocol exception event detection enabled,1: Protocol exception event detection disabled"
wgroup.long 0xB8++0x3
line.long 0x0 "CFDGLOCKK,Global Lock Key Register"
hexmask.long.word 0x0 0.--15. 1. "LOCK,Lock Key"
group.long 0xC0++0xB
line.long 0x0 "CFDGAFLIGNENT,Global AFL Ignore Entry Register"
hexmask.long.byte 0x0 0.--4. 1. "IRN,Ignore Rule Number"
line.long 0x4 "CFDGAFLIGNCTR,Global AFL Ignore Control Register"
hexmask.long.byte 0x4 8.--15. 1. "KEY,Key Code"
bitfld.long 0x4 0. "IREN,Ignore Rule Enable" "0: AFL entry number is not ignored,1: AFL entry number is ignored"
line.long 0x8 "CFDCDTCT,DMA Transfer Control Register"
bitfld.long 0x8 8. "CFDMAE,DMA Transfer Enable for Common FIFO 0" "0: DMA transfer request disabled,1: DMA transfer request enabled"
bitfld.long 0x8 1. "RFDMAE1,DMA Transfer Enable for RXFIFO 1" "0: DMA transfer request disabled,1: DMA transfer request enabled"
newline
bitfld.long 0x8 0. "RFDMAE0,DMA Transfer Enable for RXFIFO 0" "0: DMA transfer request disabled,1: DMA transfer request enabled"
rgroup.long 0xCC++0x3
line.long 0x0 "CFDCDTSTS,DMA Transfer Status Register"
bitfld.long 0x0 8. "CFDMASTS,DMA Transfer Status only for Common FIFO" "0: DMA transfer stopped,1: DMA transfer on going"
bitfld.long 0x0 1. "RFDMASTS1,DMA Transfer Status for RX FIFO 1" "0: DMA transfer stopped,1: DMA transfer on going"
newline
bitfld.long 0x0 0. "RFDMASTS0,DMA Transfer Status for RX FIFO 0" "0: DMA transfer stopped,1: DMA transfer on going"
group.long 0xD8++0x3
line.long 0x0 "CFDGRSTC,Global SW reset Register"
hexmask.long.byte 0x0 8.--15. 1. "KEY,Key Code"
bitfld.long 0x0 0. "SRST,SW Reset" "0: Normal state,1: SW reset state"
group.long 0x100++0xF
line.long 0x0 "CFDC0DCFG,Channel 0 Data Bitrate Configuration Register"
hexmask.long.byte 0x0 24.--27. 1. "DSJW,Resynchronization Jump Width"
hexmask.long.byte 0x0 16.--19. 1. "DTSEG2,Timing Segment 2"
newline
hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Timing Segment 1"
hexmask.long.byte 0x0 0.--7. 1. "DBRP,Channel Data Baud Rate Prescaler"
line.long 0x4 "CFDC0FDCFG,Channel 0 CANFD Configuration Register"
bitfld.long 0x4 30. "CLOE,Classical CAN Enable" "0: Classical CAN mode disabled,1: Classical CAN mode enabled"
bitfld.long 0x4 29. "REFE,RX Edge Filter Enable" "0: RX edge filter disabled,1: RX edge filter enabled"
newline
bitfld.long 0x4 28. "FDOE,FD-Only Enable" "0: FD-only mode disabled,1: FD-only mode enabled"
hexmask.long.byte 0x4 16.--23. 1. "TDCO,Transceiver Delay Compensation Offset"
newline
bitfld.long 0x4 10. "ESIC,Error State Indication Configuration" "0: The ESI bit in the frame represents the error..,1: The ESI bit in the frame represents the error.."
bitfld.long 0x4 9. "TDCE,Transceiver Delay Compensation Enable" "0: Transceiver delay compensation disabled,1: Transceiver delay compensation enabled"
newline
bitfld.long 0x4 8. "TDCOC,Transceiver Delay Compensation Offset Configuration" "0: Measured + offset,1: Offset-only"
bitfld.long 0x4 0.--2. "EOCCFG,Error Occurrence Counter Configuration" "0: All transmitter or receiver CAN frames,1: All transmitter CAN frames,?,?,?,?,?,?"
line.long 0x8 "CFDC0FDCTR,Channel 0 CANFD Control Register"
bitfld.long 0x8 1. "SOCCLR,Successful Occurrence Counter Clear" "0: No successful occurrence counter clear,1: Clear successful occurrence counter"
bitfld.long 0x8 0. "EOCCLR,Error Occurrence Counter Clear" "0: No error occurrence counter clear,1: Clear error occurrence counter"
line.long 0xC "CFDC0FDSTS,Channel 0 CANFD Status Register"
hexmask.long.byte 0xC 24.--31. 1. "SOC,Successful occurrence counter"
hexmask.long.byte 0xC 16.--23. 1. "EOC,Error Occurrence Counter"
newline
bitfld.long 0xC 15. "TDCVF,Transceiver Delay Compensation Violation Flag" "0: Transceiver delay compensation violation has not..,1: Transceiver delay compensation violation has.."
bitfld.long 0xC 9. "SOCO,Successful Occurrence Counter Overflow" "0: Successful occurrence counter has not overflowed,1: Successful occurrence counter has overflowed"
newline
bitfld.long 0xC 8. "EOCO,Error Occurrence Counter Overflow" "0: Error occurrence counter has not overflowed,1: Error occurrence counter has overflowed"
hexmask.long.byte 0xC 0.--7. 1. "TDCR,Transceiver Delay Compensation Result"
rgroup.long 0x110++0x3
line.long 0x0 "CFDC0FDCRC,Channel 0 CANFD CRC Register"
hexmask.long.byte 0x0 24.--27. 1. "SCNT,Stuff bit count"
hexmask.long.tbyte 0x0 0.--20. 1. "CRCREG,CRC Register value"
repeat 16. (increment 0x0 0x1)(increment 0x0 0x10)
group.long ($2+0x120)++0x3
line.long 0x0 "CFDGAFLID$1,Global Acceptance Filter List ID Registers"
bitfld.long 0x0 31. "GAFLIDE,Global Acceptance Filter List Entry IDE Field" "0: Standard identifier of rule entry ID is valid..,1: Extended identifier of rule entry ID is valid.."
bitfld.long 0x0 30. "GAFLRTR,Global Acceptance Filter List Entry RTR Field" "0: Data frame,1: Remote frame"
newline
bitfld.long 0x0 29. "GAFLLB,Global Acceptance Filter List Entry Loopback Configuration" "0: Global Acceptance Filter List entry ID for..,1: Global Acceptance Filter List entry ID for.."
hexmask.long 0x0 0.--28. 1. "GAFLID,Global Acceptance Filter List Entry ID Field"
repeat.end
repeat 16. (increment 0x0 0x1)(increment 0x0 0x10)
group.long ($2+0x124)++0x3
line.long 0x0 "CFDGAFLM$1,Global Acceptance Filter List Mask Registers"
bitfld.long 0x0 31. "GAFLIDEM,Global Acceptance Filter List IDE Mask" "0: IDE bit is not used for ID matching,1: IDE bit is used for ID matching"
bitfld.long 0x0 30. "GAFLRTRM,Global Acceptance Filter List Entry RTR Mask" "0: RTR bit is not used for ID matching,1: RTR bit is used for ID matching"
newline
bitfld.long 0x0 29. "GAFLIFL1,Global Acceptance Filter List Information Label 1" "0,1"
hexmask.long 0x0 0.--28. 1. "GAFLIDM,Global Acceptance Filter List ID Mask Field"
repeat.end
repeat 16. (increment 0x0 0x1)(increment 0x0 0x10)
group.long ($2+0x128)++0x3
line.long 0x0 "CFDGAFLP0$1,Global Acceptance Filter List Pointer 0 Registers"
hexmask.long.word 0x0 16.--31. 1. "GAFLPTR,Global Acceptance Filter List Pointer"
bitfld.long 0x0 15. "GAFLRMV,Global Acceptance Filter List RX Message Buffer Valid" "0: Single message buffer direction pointer is invalid,1: Single message buffer direction pointer is valid"
newline
hexmask.long.byte 0x0 8.--12. 1. "GAFLRMDP,Global Acceptance Filter List RX Message Buffer Direction Pointer"
bitfld.long 0x0 7. "GAFLIFL0,Global Acceptance Filter List Information Label 0" "0,1"
newline
hexmask.long.byte 0x0 0.--3. 1. "GAFLDLC,Global Acceptance Filter List DLC Field"
repeat.end
repeat 16. (increment 0x0 0x1)(increment 0x0 0x10)
group.long ($2+0x12C)++0x3
line.long 0x0 "CFDGAFLP1$1,Global Acceptance Filter List Pointer 1 Registers"
bitfld.long 0x0 8. "GAFLFDP8,Global Acceptance Filter List FIFO Direction Pointer" "0: Disable Common FIFO as target for reception,1: Enable Common FIFO as target for reception"
bitfld.long 0x0 1. "GAFLFDP1,Global Acceptance Filter List FIFO Direction Pointer" "0: Disable RX FIFO 1 as target for reception,1: Enable RX FIFO 1 as target for reception"
newline
bitfld.long 0x0 0. "GAFLFDP0,Global Acceptance Filter List FIFO Direction Pointer" "0: Disable RX FIFO 0 as target for reception,1: Enable RX FIFO 0 as target for reception"
repeat.end
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "CFDRPGACC$1,RAM Test Page Access Registers %s"
hexmask.long 0x0 0.--31. 1. "RDTA,RAM Data Test Access"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x520)++0x3
line.long 0x0 "CFDRFID$1,RX FIFO Access ID Register %s"
bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE bit" "0: STD-ID has been received,1: EXT-ID has been received"
bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR bit" "0: Data frame,1: Remote frame"
newline
hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x524)++0x3
line.long 0x0 "CFDRFPTR$1,RX FIFO Access Pointer Register %s"
hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field"
hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x528)++0x3
line.long 0x0 "CFDRFFDSTS$1,RX FIFO Access CANFD Status Register %s"
hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field"
bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information Label Field" "0,1,2,3"
newline
bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CANFD frame received,1: CANFD frame received"
bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CANFD frame received with no bit rate switch,1: CANFD frame received with bit rate switch"
newline
bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CANFD frame received from error active node,1: CANFD frame received from error passive node"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x52C)++0x3
line.long 0x0 "CFDRFDF$1_0,RX FIFO Access Data Field 0 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x530)++0x3
line.long 0x0 "CFDRFDF$1_1,RX FIFO Access Data Field 1 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x534)++0x3
line.long 0x0 "CFDRFDF$1_2,RX FIFO Access Data Field 2 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x538)++0x3
line.long 0x0 "CFDRFDF$1_3,RX FIFO Access Data Field 3 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x53C)++0x3
line.long 0x0 "CFDRFDF$1_4,RX FIFO Access Data Field 4 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x540)++0x3
line.long 0x0 "CFDRFDF$1_5,RX FIFO Access Data Field 5 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x544)++0x3
line.long 0x0 "CFDRFDF$1_6,RX FIFO Access Data Field 6 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x548)++0x3
line.long 0x0 "CFDRFDF$1_7,RX FIFO Access Data Field 7 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x54C)++0x3
line.long 0x0 "CFDRFDF$1_8,RX FIFO Access Data Field 8 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x550)++0x3
line.long 0x0 "CFDRFDF$1_9,RX FIFO Access Data Field 9 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x554)++0x3
line.long 0x0 "CFDRFDF$1_10,RX FIFO Access Data Field 10 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x558)++0x3
line.long 0x0 "CFDRFDF$1_11,RX FIFO Access Data Field 11 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x55C)++0x3
line.long 0x0 "CFDRFDF$1_12,RX FIFO Access Data Field 12 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x560)++0x3
line.long 0x0 "CFDRFDF$1_13,RX FIFO Access Data Field 13 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x564)++0x3
line.long 0x0 "CFDRFDF$1_14,RX FIFO Access Data Field 14 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x568)++0x3
line.long 0x0 "CFDRFDF$1_15,RX FIFO Access Data Field 15 Register %s"
hexmask.long.byte 0x0 24.--31. 1. "RFDB_HH,RX FIFO Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RFDB_HL,RX FIFO Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RFDB_LH,RX FIFO Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RFDB_LL,RX FIFO Buffer Data Byte (p x 4)"
repeat.end
group.long 0x5B8++0xB
line.long 0x0 "CFDCFID,Common FIFO Access ID Register"
bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received"
bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame"
newline
bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX."
hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field"
line.long 0x4 "CFDCFPTR,Common FIFO Access Pointer Register"
hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field"
hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value"
line.long 0x8 "CFDCFFDCSTS,Common FIFO Access CANFD Control/Status Register"
hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field"
bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information Label Field" "0,1,2,3"
newline
bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CANFD frame received or to transmit,1: CANFD frame received or to transmit"
bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CANFD frame received or to transmit with no bit..,1: CANFD frame received or to transmit with bit.."
newline
bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CANFD frame received or to transmit by error..,1: CANFD frame received or to transmit by error.."
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x5C4)++0x3
line.long 0x0 "CFDCFDF$1,Common FIFO Access Data Field %s Registers"
hexmask.long.byte 0x0 24.--31. 1. "CFDB_HH,Common FIFO Buffer Data Bytes ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "CFDB_HL,Common FIFO Buffer Data Bytes ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "CFDB_LH,Common FIFO Buffer Data Bytes ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "CFDB_LL,Common FIFO Buffer Data Bytes (p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x604)++0x3
line.long 0x0 "CFDTMID$1,TX Message Buffer ID Registers"
bitfld.long 0x0 31. "TMIDE,TX Message Buffer IDE bit" "0: STD-ID is transmitted,1: EXT-ID is transmitted"
bitfld.long 0x0 30. "TMRTR,TX Message Buffer RTR bit" "0: Data frame,1: Remote frame"
newline
bitfld.long 0x0 29. "THLEN,Tx History List Entry" "0: Entry not stored in THL after successful TX,1: Entry stored in THL after successful TX"
hexmask.long 0x0 0.--28. 1. "TMID,TX Message Buffer ID Field"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x608)++0x3
line.long 0x0 "CFDTMPTR$1,TX Message Buffer Pointer Register"
hexmask.long.byte 0x0 28.--31. 1. "TMDLC,TX Message Buffer DLC Field"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x60C)++0x3
line.long 0x0 "CFDTMFDCTR$1,TX Message Buffer CANFD Control Register"
hexmask.long.word 0x0 16.--31. 1. "TMPTR,TX Message Buffer Pointer Field"
bitfld.long 0x0 8.--9. "TMIFL,TX Message Buffer Information Label Field" "0,1,2,3"
newline
bitfld.long 0x0 2. "TMFDF,CAN FD Format bit" "0: Non CANFD frame to transmit,1: CANFD frame to transmit"
bitfld.long 0x0 1. "TMBRS,Bit Rate Switch bit" "0: CANFD frame to transmit with no bit rate switch,1: CANFD frame to transmit with bit rate switch"
newline
bitfld.long 0x0 0. "TMESI,Error State Indicator bit" "0: CANFD frame to transmit by error active node,1: CANFD frame to transmit by error passive node"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x610)++0x3
line.long 0x0 "CFDTMDF$1_0,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x614)++0x3
line.long 0x0 "CFDTMDF$1_1,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x618)++0x3
line.long 0x0 "CFDTMDF$1_2,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x61C)++0x3
line.long 0x0 "CFDTMDF$1_3,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x620)++0x3
line.long 0x0 "CFDTMDF$1_4,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x624)++0x3
line.long 0x0 "CFDTMDF$1_5,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x628)++0x3
line.long 0x0 "CFDTMDF$1_6,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x62C)++0x3
line.long 0x0 "CFDTMDF$1_7,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x630)++0x3
line.long 0x0 "CFDTMDF$1_8,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x634)++0x3
line.long 0x0 "CFDTMDF$1_9,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x638)++0x3
line.long 0x0 "CFDTMDF$1_10,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x63C)++0x3
line.long 0x0 "CFDTMDF$1_11,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x640)++0x3
line.long 0x0 "CFDTMDF$1_12,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x644)++0x3
line.long 0x0 "CFDTMDF$1_13,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x648)++0x3
line.long 0x0 "CFDTMDF$1_14,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C)
group.long ($2+0x64C)++0x3
line.long 0x0 "CFDTMDF$1_15,TX Message Buffer Data Field Register"
hexmask.long.byte 0x0 24.--31. 1. "TMDB_HH,TX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "TMDB_HL,TX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "TMDB_LH,TX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "TMDB_LL,TX Message Buffer Data Byte ((p x 4)"
repeat.end
rgroup.long 0x740++0x7
line.long 0x0 "CFDTHLACC0,TX History List Access Register 0"
hexmask.long.word 0x0 16.--31. 1. "TMTS,Transmit Timestamp"
bitfld.long 0x0 3.--4. "BN,Buffer Number" "0,1,2,3"
newline
bitfld.long 0x0 0.--2. "BT,Buffer Type" "?,1: Flat TX message buffer,?,?,?,?,?,?"
line.long 0x4 "CFDTHLACC1,TX History List Access Register 1"
bitfld.long 0x4 16.--17. "TIFL,Transmit Information Label" "0,1,2,3"
hexmask.long.word 0x4 0.--15. 1. "TID,Transmit ID"
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x920)++0x3
line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers"
bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored"
bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data frame,1: Remote frame"
newline
hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x924)++0x3
line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers"
hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field"
hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x928)++0x3
line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CANFD Status Registers"
hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field"
bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information Label Field" "0,1,2,3"
newline
bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CANFD frame received,1: CANFD frame received"
bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CANFD frame received with no bit rate switch,1: CANFD frame received with bit rate switch"
newline
bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CANFD frame received from error active node,1: CANFD frame received from error passive node"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x92C)++0x3
line.long 0x0 "CFDRMDF$1_0,RX Message Buffer Data Field 0 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x930)++0x3
line.long 0x0 "CFDRMDF$1_1,RX Message Buffer Data Field 1 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x934)++0x3
line.long 0x0 "CFDRMDF$1_2,RX Message Buffer Data Field 2 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x938)++0x3
line.long 0x0 "CFDRMDF$1_3,RX Message Buffer Data Field 3 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x93C)++0x3
line.long 0x0 "CFDRMDF$1_4,RX Message Buffer Data Field 4 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x940)++0x3
line.long 0x0 "CFDRMDF$1_5,RX Message Buffer Data Field 5 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x944)++0x3
line.long 0x0 "CFDRMDF$1_6,RX Message Buffer Data Field 6 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x948)++0x3
line.long 0x0 "CFDRMDF$1_7,RX Message Buffer Data Field 7 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x94C)++0x3
line.long 0x0 "CFDRMDF$1_8,RX Message Buffer Data Field 8 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x950)++0x3
line.long 0x0 "CFDRMDF$1_9,RX Message Buffer Data Field 9 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x954)++0x3
line.long 0x0 "CFDRMDF$1_10,RX Message Buffer Data Field 10 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x958)++0x3
line.long 0x0 "CFDRMDF$1_11,RX Message Buffer Data Field 11 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x95C)++0x3
line.long 0x0 "CFDRMDF$1_12,RX Message Buffer Data Field 12 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x960)++0x3
line.long 0x0 "CFDRMDF$1_13,RX Message Buffer Data Field 13 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x964)++0x3
line.long 0x0 "CFDRMDF$1_14,RX Message Buffer Data Field 14 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x968)++0x3
line.long 0x0 "CFDRMDF$1_15,RX Message Buffer Data Field 15 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD20)++0x3
line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers"
bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored"
bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data frame,1: Remote frame"
newline
hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD24)++0x3
line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers"
hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field"
hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD28)++0x3
line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CANFD Status Registers"
hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field"
bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information Label Field" "0,1,2,3"
newline
bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CANFD frame received,1: CANFD frame received"
bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CANFD frame received with no bit rate switch,1: CANFD frame received with bit rate switch"
newline
bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CANFD frame received from error active node,1: CANFD frame received from error passive node"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD2C)++0x3
line.long 0x0 "CFDRMDF$1_0,RX Message Buffer Data Field 0 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD30)++0x3
line.long 0x0 "CFDRMDF$1_1,RX Message Buffer Data Field 1 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD34)++0x3
line.long 0x0 "CFDRMDF$1_2,RX Message Buffer Data Field 2 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD38)++0x3
line.long 0x0 "CFDRMDF$1_3,RX Message Buffer Data Field 3 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD3C)++0x3
line.long 0x0 "CFDRMDF$1_4,RX Message Buffer Data Field 4 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD40)++0x3
line.long 0x0 "CFDRMDF$1_5,RX Message Buffer Data Field 5 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD44)++0x3
line.long 0x0 "CFDRMDF$1_6,RX Message Buffer Data Field 6 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD48)++0x3
line.long 0x0 "CFDRMDF$1_7,RX Message Buffer Data Field 7 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD4C)++0x3
line.long 0x0 "CFDRMDF$1_8,RX Message Buffer Data Field 8 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD50)++0x3
line.long 0x0 "CFDRMDF$1_9,RX Message Buffer Data Field 9 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD54)++0x3
line.long 0x0 "CFDRMDF$1_10,RX Message Buffer Data Field 10 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD58)++0x3
line.long 0x0 "CFDRMDF$1_11,RX Message Buffer Data Field 11 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD5C)++0x3
line.long 0x0 "CFDRMDF$1_12,RX Message Buffer Data Field 12 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD60)++0x3
line.long 0x0 "CFDRMDF$1_13,RX Message Buffer Data Field 13 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD64)++0x3
line.long 0x0 "CFDRMDF$1_14,RX Message Buffer Data Field 14 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0xD68)++0x3
line.long 0x0 "CFDRMDF$1_15,RX Message Buffer Data Field 15 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1120)++0x3
line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers"
bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored"
bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data frame,1: Remote frame"
newline
hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1124)++0x3
line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers"
hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field"
hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1128)++0x3
line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CANFD Status Registers"
hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field"
bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information Label Field" "0,1,2,3"
newline
bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CANFD frame received,1: CANFD frame received"
bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CANFD frame received with no bit rate switch,1: CANFD frame received with bit rate switch"
newline
bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CANFD frame received from error active node,1: CANFD frame received from error passive node"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x112C)++0x3
line.long 0x0 "CFDRMDF$1_0,RX Message Buffer Data Field 0 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1130)++0x3
line.long 0x0 "CFDRMDF$1_1,RX Message Buffer Data Field 1 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1134)++0x3
line.long 0x0 "CFDRMDF$1_2,RX Message Buffer Data Field 2 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1138)++0x3
line.long 0x0 "CFDRMDF$1_3,RX Message Buffer Data Field 3 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x113C)++0x3
line.long 0x0 "CFDRMDF$1_4,RX Message Buffer Data Field 4 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1140)++0x3
line.long 0x0 "CFDRMDF$1_5,RX Message Buffer Data Field 5 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1144)++0x3
line.long 0x0 "CFDRMDF$1_6,RX Message Buffer Data Field 6 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1148)++0x3
line.long 0x0 "CFDRMDF$1_7,RX Message Buffer Data Field 7 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x114C)++0x3
line.long 0x0 "CFDRMDF$1_8,RX Message Buffer Data Field 8 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1150)++0x3
line.long 0x0 "CFDRMDF$1_9,RX Message Buffer Data Field 9 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1154)++0x3
line.long 0x0 "CFDRMDF$1_10,RX Message Buffer Data Field 10 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1158)++0x3
line.long 0x0 "CFDRMDF$1_11,RX Message Buffer Data Field 11 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x115C)++0x3
line.long 0x0 "CFDRMDF$1_12,RX Message Buffer Data Field 12 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1160)++0x3
line.long 0x0 "CFDRMDF$1_13,RX Message Buffer Data Field 13 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1164)++0x3
line.long 0x0 "CFDRMDF$1_14,RX Message Buffer Data Field 14 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1168)++0x3
line.long 0x0 "CFDRMDF$1_15,RX Message Buffer Data Field 15 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1520)++0x3
line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers"
bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored"
bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data frame,1: Remote frame"
newline
hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1524)++0x3
line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers"
hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field"
hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1528)++0x3
line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CANFD Status Registers"
hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field"
bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information Label Field" "0,1,2,3"
newline
bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CANFD frame received,1: CANFD frame received"
bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CANFD frame received with no bit rate switch,1: CANFD frame received with bit rate switch"
newline
bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CANFD frame received from error active node,1: CANFD frame received from error passive node"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x152C)++0x3
line.long 0x0 "CFDRMDF$1_0,RX Message Buffer Data Field 0 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1530)++0x3
line.long 0x0 "CFDRMDF$1_1,RX Message Buffer Data Field 1 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1534)++0x3
line.long 0x0 "CFDRMDF$1_2,RX Message Buffer Data Field 2 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1538)++0x3
line.long 0x0 "CFDRMDF$1_3,RX Message Buffer Data Field 3 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x153C)++0x3
line.long 0x0 "CFDRMDF$1_4,RX Message Buffer Data Field 4 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1540)++0x3
line.long 0x0 "CFDRMDF$1_5,RX Message Buffer Data Field 5 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1544)++0x3
line.long 0x0 "CFDRMDF$1_6,RX Message Buffer Data Field 6 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1548)++0x3
line.long 0x0 "CFDRMDF$1_7,RX Message Buffer Data Field 7 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x154C)++0x3
line.long 0x0 "CFDRMDF$1_8,RX Message Buffer Data Field 8 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1550)++0x3
line.long 0x0 "CFDRMDF$1_9,RX Message Buffer Data Field 9 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1554)++0x3
line.long 0x0 "CFDRMDF$1_10,RX Message Buffer Data Field 10 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1558)++0x3
line.long 0x0 "CFDRMDF$1_11,RX Message Buffer Data Field 11 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x155C)++0x3
line.long 0x0 "CFDRMDF$1_12,RX Message Buffer Data Field 12 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1560)++0x3
line.long 0x0 "CFDRMDF$1_13,RX Message Buffer Data Field 13 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1564)++0x3
line.long 0x0 "CFDRMDF$1_14,RX Message Buffer Data Field 14 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C)
rgroup.long ($2+0x1568)++0x3
line.long 0x0 "CFDRMDF$1_15,RX Message Buffer Data Field 15 Registers"
hexmask.long.byte 0x0 24.--31. 1. "RMDB_HH,RX Message Buffer Data Byte ((p x 4) + 3)"
hexmask.long.byte 0x0 16.--23. 1. "RMDB_HL,RX Message Buffer Data Byte ((p x 4) + 2)"
newline
hexmask.long.byte 0x0 8.--15. 1. "RMDB_LH,RX Message Buffer Data Byte ((p x 4) + 1)"
hexmask.long.byte 0x0 0.--7. 1. "RMDB_LL,RX Message Buffer Data Byte (p x 4)"
repeat.end
tree.end
tree "CEC (Consumer Electronics Control)"
base ad:0x400AC000
group.word 0x0++0x1
line.word 0x0 "CADR,CEC Local Address Setting Register"
bitfld.word 0x0 14. "ADR14,Local Address Setting at Address 14 (specific use)" "0: Does not set as local address.,1: Sets as local address."
bitfld.word 0x0 13. "ADR13,Local Address Setting at Address 13 (reserved)" "0: Does not set as local address.,1: Sets as local address."
newline
bitfld.word 0x0 12. "ADR12,Local Address Setting at Address 12 (reserved)" "0: Does not set as local address.,1: Sets as local address."
bitfld.word 0x0 11. "ADR11,Local Address Setting at Address 11 (playback device 3)" "0: Does not set as local address.,1: Sets as local address."
newline
bitfld.word 0x0 10. "ADR10,Local Address Setting at Address 10 (tuner 4)" "0: Does not set as local address.,1: Sets as local address."
bitfld.word 0x0 9. "ADR09,Local Address Setting at Address 9 (recording device 3)" "0: Does not set as local address.,1: Sets as local address."
newline
bitfld.word 0x0 8. "ADR08,Local Address Setting at Address 8 (playback device 2)" "0: Does not set as local address.,1: Sets as local address."
bitfld.word 0x0 7. "ADR07,Local Address Setting at Address 7 (tuner 3)" "0: Does not set as local address.,1: Sets as local address."
newline
bitfld.word 0x0 6. "ADR06,Local Address Setting at Address 6 (tuner 2)" "0: Does not set as local address.,1: Sets as local address."
bitfld.word 0x0 5. "ADR05,Local Address Setting at Address 5 (audio system)" "0: Does not set as local address.,1: Sets as local address."
newline
bitfld.word 0x0 4. "ADR04,Local Address Setting at Address 4 (playback device 1)" "0: Does not set as local address.,1: Sets as local address."
bitfld.word 0x0 3. "ADR03,Local Address Setting at Address 3 (tuner 1)" "0: Does not set as local address.,1: Sets as local address."
newline
bitfld.word 0x0 2. "ADR02,Local Address Setting at Address 2 (recording device 2)" "0: Does not set as local address.,1: Sets as local address."
bitfld.word 0x0 1. "ADR01,Local Address Setting at Address 1 (recording device 1)" "0: Does not set as local address.,1: Sets as local address."
newline
bitfld.word 0x0 0. "ADR00,Local Address at Address 0 (TV)" "0: Does not set as local address.,1: Sets as local address."
group.byte 0x2++0x0
line.byte 0x0 "CECCTL1,CEC Control Register 1"
bitfld.byte 0x0 7. "CDFC,Digital Filter Select" "0: Does not use a digital filter.,1: Uses a digital filter."
bitfld.byte 0x0 6. "CINTMK,CEC Data Interrupt (INTDA) Generation Select" "0: Does not generate an interrupt when the..,1: Generates an interrupt when the addresses do not.."
newline
bitfld.byte 0x0 5. "BLERRD,Bus Lock Detection Select" "0: Does not detect sticking of receive data to high..,1: Detects sticking of receive data to high or low."
bitfld.byte 0x0 4. "STERRD,Start Bit Error Detection Select" "0: Does not detect timing errors during start bit..,1: Detects timing errors during start bit reception."
newline
bitfld.byte 0x0 2.--3. "CESEL,Communication Complete Interrupt (INTCE) Generation Timing Select" "0: Generates communication complete interrupt once..,1: Generates communication complete interrupt after..,?,?"
bitfld.byte 0x0 0.--1. "SFT,Signal-Free Time Data Bit Width Select" "0: 3-data bit width,1: 5-data bit width,?,?"
group.word 0x4++0x21
line.word 0x0 "STATB,CEC Transmission Start Bit Width Setting Register"
hexmask.word 0x0 0.--8. 1. "STATB,CEC Transmission Start Bit Width Setting"
line.word 0x2 "STATL,CEC Transmission Start Bit Low Width Setting Register"
hexmask.word 0x2 0.--8. 1. "STATL,CEC Transmission Start Bit Low Width Setting"
line.word 0x4 "LGC0L,CEC Transmission Logical 0 Low Width Setting Register"
hexmask.word 0x4 0.--8. 1. "LGC0L,CEC Transmission Logical 0 Low Width Setting"
line.word 0x6 "LGC1L,CEC Transmission Logical 1 Low Width Setting Register"
hexmask.word 0x6 0.--8. 1. "LGC1L,CEC Transmission Logical 1 Low Width Setting"
line.word 0x8 "DATB,CEC Transmission Data Bit Width Setting Register"
hexmask.word 0x8 0.--8. 1. "DATB,CEC Transmission Data Bit Width Setting"
line.word 0xA "NOMT,CEC Reception Data Sampling Time Setting Register"
hexmask.word 0xA 0.--8. 1. "NOMT,CEC Reception Data Sampling Time Setting "
line.word 0xC "STATLL,CEC Reception Start Bit Minimum Low Width Setting Register"
hexmask.word 0xC 0.--8. 1. "STATLL,CEC Reception Start Bit Minimum Low Width Setting"
line.word 0xE "STATLH,CEC Reception Start Bit Maximum Low Width Setting Register"
hexmask.word 0xE 0.--8. 1. "STATLH,CEC Reception Start Bit Maximum Bit Width Setting"
line.word 0x10 "STATBL,CEC Reception Start Bit Minimum Bit Width Setting Register"
hexmask.word 0x10 0.--8. 1. "STATBL,CEC Reception Start Bit Minimum Bit Width Setting"
line.word 0x12 "STATBH,CEC Reception Start Bit Maximum Bit Width Setting Register"
hexmask.word 0x12 0.--8. 1. "STATBH,CEC Reception Start Bit Maximum Bit Width Setting"
line.word 0x14 "LGC0LL,CEC Reception Logical 0 Minimum Low Width Setting Register"
hexmask.word 0x14 0.--8. 1. "LGC0LL,CEC Reception Logical 0 Minimum Low Width Setting"
line.word 0x16 "LGC0LH,CEC Reception Logical 0 Maximum Low Width Setting Register"
hexmask.word 0x16 0.--8. 1. "LGC0LH,CEC Reception Logical 0 Minimum Low Width Setting"
line.word 0x18 "LGC1LL,CEC Reception Logical 1 Minimum Low Width Setting Register"
hexmask.word 0x18 0.--8. 1. "LGC1LL,CEC Reception Logical 1 Minimum Low Width Setting"
line.word 0x1A "LGC1LH,CEC Reception Logical 1 Maximum Low Width Setting Register"
hexmask.word 0x1A 0.--8. 1. "LGC1LH,CEC Reception Logical 1 Maximum Low Width Setting"
line.word 0x1C "DATBL,CEC Reception Data Bit Minimum Bit Width Setting Register"
hexmask.word 0x1C 0.--8. 1. "DATBL,CEC Reception Data Bit Minimum Bit Width Setting"
line.word 0x1E "DATBH,CEC Reception Data Bit Maximum Bit Width Setting Register"
hexmask.word 0x1E 0.--8. 1. "DATBH,CEC Reception Data Bit Maximum Bit Width Setting"
line.word 0x20 "NOMP,CEC Data Bit Reference Width Setting Register"
hexmask.word 0x20 0.--8. 1. "NOMP,CEC Data Bit Reference Width Setting"
group.byte 0x28++0x0
line.byte 0x0 "CECEXMD,CEC Extension Mode Register"
bitfld.byte 0x0 7. "RCVINTDSEL,INTDA Reception Interrupt Timing Change" "0: EOM timing (9th bit of data),1: ACK timing (10th bit of data)"
bitfld.byte 0x0 5. "RERCVEN,Start Detection Reception Restart Enable" "0: Does not restart reception when the start bit is..,1: Restarts reception when the start bit is.."
newline
bitfld.byte 0x0 4. "LERPLEN,Pulse Output Function Enable by Long Bit Width Error" "0: Detects only a long bit width error.,1: Detects a long bit width error and outputs an.."
rgroup.byte 0x2A++0x0
line.byte 0x0 "CECEXMON,CEC Extension Monitor Register"
bitfld.byte 0x0 1. "ACKF,ACK Flag" "0,1"
bitfld.byte 0x0 0. "CECLNMON,CEC Line Monitor" "0: Low level,1: High level"
group.byte 0x40++0x1
line.byte 0x0 "CTXD,CEC Transmission Buffer Register"
line.byte 0x1 "CRXD,CEC Reception Buffer Register"
rgroup.byte 0x42++0x1
line.byte 0x0 "CECES,CEC Communication Error Status Register"
bitfld.byte 0x0 6. "BLERR,Bus Lock Error Detection Flag" "0: No bus lock error has occurred.,1: A bus lock error has occurred."
bitfld.byte 0x0 5. "AERR,Arbitration Loss Detection Flag" "0: No arbitration loss has occurred.,1: An arbitration loss has occurred."
newline
bitfld.byte 0x0 4. "TXERR,Transmission Error Detection Flag" "0: No transmission error has occurred.,1: A transmission error has occurred."
bitfld.byte 0x0 3. "TERR,Timing Error Detection Flag" "0: No timing error has occurred.,1: A timing error has occurred."
newline
bitfld.byte 0x0 2. "ACKERR,ACK Error Detection Flag" "0: No ACK error has occurred.,1: An ACK error has occurred."
bitfld.byte 0x0 1. "UERR,Underrun Error Detection Flag" "0: No underrun error has occurred.,1: An underrun error has occurred."
newline
bitfld.byte 0x0 0. "OERR,Overrun Error Detection Flag" "0: No overrun error has occurred.,1: An overrun error has occurred."
line.byte 0x1 "CECS,CEC Communication Status Register"
bitfld.byte 0x1 7. "SFTST,Signal-Free Time Rewrite Disable Report Flag" "0: Enables rewriting CECCTL1.SFT[1:0].,1: Disables rewriting CECCTL1.SFT[1:0]."
bitfld.byte 0x1 4. "ITCEF,INTCE Generation Source Flag" "0: Generates a communication complete interrupt..,1: Generates INTCE if communication is complete or.."
newline
bitfld.byte 0x1 3. "EOMF,EOM Flag" "0: The EOM flag received immediately before is..,1: The EOM flag received immediately before is.."
bitfld.byte 0x1 2. "TXST,Transmission Status Flag" "0: During communication standby state or reception..,1: During transmission (an initiator is operating.)"
newline
bitfld.byte 0x1 1. "BUSST,Bus Busy Detection Flag" "0: Bus-free state,1: Bus-busy state"
bitfld.byte 0x1 0. "ADRF,Address Match Detection Flag" "0: During communication between other stations..,1: During local reception"
wgroup.byte 0x44++0x0
line.byte 0x0 "CECFC,CEC Communication Error Flag Clear Trigger Register"
bitfld.byte 0x0 6. "BLCTRG,Bus Lock Error Detection Flag Clear Trigger" "0: Does not clear bus lock error detection flag.,1: Clears bus lock error detection flag."
bitfld.byte 0x0 5. "ACTRG,Arbitration Loss Detection Flag Clear Trigger" "0: Does not clear arbitration loss detection flag.,1: Clears arbitration loss detection flag."
newline
bitfld.byte 0x0 4. "TXCTRG,Transmission Error Detection Flag Clear Trigger" "0: Does not clear transmission error detection flag.,1: Clears transmission error detection flag."
bitfld.byte 0x0 3. "TCTRG,Timing Error Detection Flag Clear Trigger" "0: Does not clear timing error detection flag.,1: Clears timing error detection flag."
newline
bitfld.byte 0x0 2. "ACKCTRG,ACK Error Detection Flag Clear Trigger" "0: Does not clear ACK error detection flag.,1: Clears ACK error detection flag."
bitfld.byte 0x0 1. "UCTRG,Underrun Error Detection Flag Clear Trigger" "0: Does not clear underrun error detection flag.,1: Clears underrun error detection flag."
newline
bitfld.byte 0x0 0. "OCTRG,Overrun Error Detection Flag Clear Trigger" "0: Does not clear overrun error detection flag.,1: Clears overrun error detection flag."
group.byte 0x45++0x0
line.byte 0x0 "CECCTL0,CEC Control Register 0"
bitfld.byte 0x0 7. "CECE,CEC Operation Enable Flag" "0: Disables CEC operation.,1: Enables CEC operation."
bitfld.byte 0x0 6. "ACKTEN,ACK Bit Timing Error (Bit Width) Check Enable" "0: Does not detect ACK bit timing errors.,1: Detects ACK bit timing errors."
newline
bitfld.byte 0x0 3.--5. "CCL,CEC Clock Select" "0: PCLKB/25,1: PCLKB/26,?,?,?,?,?,?"
bitfld.byte 0x0 2. "TXTRG,Transmission Start Trigger" "0: No effect,1: Starts CEC transmission."
newline
bitfld.byte 0x0 1. "CECRXEN,Reception Enable Control" "0: Disables continuing reception or reports..,1: Enables continuing reception or reports normal.."
bitfld.byte 0x0 0. "EOM,EOM Setting" "0: Continues transmission.,1: Last frame"
tree.end
tree "CNECC (CANFD ECC)"
base ad:0x4012F200
group.long 0x0++0x3
line.long 0x0 "EC710CTL,ECC Control Register"
rbitfld.long 0x0 17. "ECDEDF0,ECC Dual Bit Error Address Detection Flag" "0: There is no bit error in EC710EAD0 after reset..,1: Address captured in EC710EAD0 shows that 2-bit.."
rbitfld.long 0x0 16. "ECSEDF0,ECC Single bit Error Address Detection Flag" "0: There is no bit error in EC710EAD0 after reset..,1: Address captured in EC710EAD0 shows that 1-bit.."
newline
bitfld.long 0x0 14.--15. "EMCA,Access Control to ECC Mode Select bit" "0,1,2,3"
rbitfld.long 0x0 11. "ECOVFF,ECC Overflow Detection Flag" "0: No effect,1: ECC overflow detection flag"
newline
bitfld.long 0x0 10. "ECER2C,2-bit ECC Error Detection Flag Clear" "0: No effect,1: Clear 2-bit ECC error detection flag"
bitfld.long 0x0 9. "ECER1C,Accumulating ECC Error Detection and Correction Flag Clear" "0: No effect,1: Clear accumulating ECC error detection and.."
newline
bitfld.long 0x0 6. "ECERVF,ECC Error Judgment Enable Flag" "0: Error judgment disable,1: Error judgment enable"
bitfld.long 0x0 5. "EC1ECP,ECC 1-bit Error Correction Permission" "0: At 1-bit error detection the error correction is..,1: bit Error Correction Permission"
newline
bitfld.long 0x0 4. "EC2EDIC,ECC 2-bit Error Detection Interrupt Control" "0: Disable 2-bit error detection interrupt request,1: Enable 2-bit error detection interrupt request"
bitfld.long 0x0 3. "EC1EDIC,ECC 1-bit Error Detection Interrupt Control" "0: Disable 1-bit error detection interrupt request,1: bit Error Detection Interrupt Control"
newline
rbitfld.long 0x0 2. "ECER2F,2-bit ECC Error Detection Flag" "0: After clearing this bit 2-bit error has not..,1: 2-bit error has occurred"
rbitfld.long 0x0 1. "ECER1F,ECC Error Detection and Correction Flag" "0: After clearing this bit 1-bit error correction..,1: 1-bit error has occurred"
newline
rbitfld.long 0x0 0. "ECEMF,ECC Error Message Flag" "0: There is no bit error in present RAM output data,1: There is bit error in present RAM output data"
group.word 0x4++0x1
line.word 0x0 "EC710TMC,ECC Test Mode Control Register"
bitfld.word 0x0 14.--15. "ETMA,ECC Test Mode Bit Access Control" "0,1,2,3"
bitfld.word 0x0 7. "ECTMCE,ECC Test Mode Control Enable" "0: The access to test mode register and bit is..,1: The access to test mode register and bit is.."
newline
bitfld.word 0x0 1. "ECDCS,ECC Decode Input Select" "0: Input lower 32 bits of RAM output data to data..,1: Input ECEDB31-0 in EC710TED register to data.."
group.long 0xC++0x3
line.long 0x0 "EC710TED,ECC Test Substitute Data Register"
hexmask.long 0x0 0.--31. 1. "ECEDB,ECC Test Substitute Data"
rgroup.long 0x10++0x3
line.long 0x0 "EC710EAD0,ECC Error Address Register"
hexmask.long.word 0x0 0.--10. 1. "ECEAD,ECC Error Address"
tree.end
tree "CPSCU (CPU System Security Control Unit)"
base ad:0x40008000
group.long 0x0++0x3
line.long 0x0 "CSAR,Cache Security Attribution Register"
bitfld.long 0x0 2. "CACHEESA,Security Attributes of Registers for Cache Error" "0: Secure,1: Non-secure"
bitfld.long 0x0 1. "CACHELSA,Security Attributes of Registers for Cache Line Configuration" "0: Secure,1: Non-secure"
bitfld.long 0x0 0. "CACHESA,Security Attributes of Registers for Cache Control" "0: Secure,1: Non-secure"
group.long 0x10++0x7
line.long 0x0 "SRAMSAR,SRAM Security Attribution Register"
bitfld.long 0x0 2. "SRAMSA2,Security attributes of registers for ECC Relation" "0: Secure,1: Non-Secure"
bitfld.long 0x0 1. "SRAMSA1,Security attributes of registers for SRAM Protection 2" "0: Secure,1: Non-Secure"
bitfld.long 0x0 0. "SRAMSA0,Security attributes of registers for SRAM Protection" "0: Secure,1: Non-Secure"
line.long 0x4 "STBRAMSAR,Standby RAM memory Security Attribution Register"
hexmask.long.byte 0x4 0.--3. 1. "NSBSTBR,Security attributes of each region for Standby RAM"
group.long 0x30++0x7
line.long 0x0 "DTCSAR,DTC Controller Security Attribution Register"
bitfld.long 0x0 0. "DTCSTSA,DTC Security Attribution" "0: Secure.,1: Non-Secure."
line.long 0x4 "DMACSAR,DMAC Controller Security Attribution Register"
bitfld.long 0x4 0. "DMASTSA,DMAST Security Attribution" "0: Secure,1: Non-secure"
group.long 0x40++0xF
line.long 0x0 "ICUSARA,Interrupt Controller Unit Security Attribution Register A"
bitfld.long 0x0 14. "SAIRQCR14,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 13. "SAIRQCR13,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 12. "SAIRQCR12,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 11. "SAIRQCR11,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 10. "SAIRQCR10,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 9. "SAIRQCR09,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 8. "SAIRQCR08,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 7. "SAIRQCR07,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 6. "SAIRQCR06,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 5. "SAIRQCR05,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 4. "SAIRQCR04,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 3. "SAIRQCR03,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 2. "SAIRQCR02,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 1. "SAIRQCR01,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
bitfld.long 0x0 0. "SAIRQCR00,Security attributes of registers for the IRQCRn register" "0: Secure,1: Non-secure"
line.long 0x4 "ICUSARB,Interrupt Controller Unit Security Attribution Register B"
bitfld.long 0x4 0. "SANMI,Security attributes of registers for nonmaskable interrupt" "0: Secure,1: Non-secure"
line.long 0x8 "ICUSARC,Interrupt Controller Unit Security Attribution Register C"
bitfld.long 0x8 7. "SADMAC7,Security attributes of registers for DMAC channel" "0: Secure,1: Non-secure"
bitfld.long 0x8 6. "SADMAC6,Security attributes of registers for DMAC channel" "0: Secure,1: Non-secure"
bitfld.long 0x8 5. "SADMAC5,Security attributes of registers for DMAC channel" "0: Secure,1: Non-secure"
bitfld.long 0x8 4. "SADMAC4,Security attributes of registers for DMAC channel" "0: Secure,1: Non-secure"
bitfld.long 0x8 3. "SADMAC3,Security attributes of registers for DMAC channel" "0: Secure,1: Non-secure"
newline
bitfld.long 0x8 2. "SADMAC2,Security attributes of registers for DMAC channel" "0: Secure,1: Non-secure"
bitfld.long 0x8 1. "SADMAC1,Security attributes of registers for DMAC channel" "0: Secure,1: Non-secure"
bitfld.long 0x8 0. "SADMAC0,Security attributes of registers for DMAC channel" "0: Secure,1: Non-secure"
line.long 0xC "ICUSARD,Interrupt Controller Unit Security Attribution Register D"
bitfld.long 0xC 0. "SASELSR0,Security attributes of registers for SELSR0" "0: Secure,1: Non-secure"
group.long 0x54++0x3
line.long 0x0 "ICUSARF,Interrupt Controller Unit Security Attribution Register F"
bitfld.long 0x0 11. "SAI3CWUP,Security attributes of registers for WUPEN1.b11" "0: Secure,1: Non-secure"
group.long 0x70++0xB
line.long 0x0 "ICUSARG,Interrupt Controller Unit Security Attribution Register G"
bitfld.long 0x0 31. "SAIELSR31,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 30. "SAIELSR30,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 29. "SAIELSR29,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 28. "SAIELSR28,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 27. "SAIELSR27,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 26. "SAIELSR26,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 25. "SAIELSR25,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 24. "SAIELSR24,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 23. "SAIELSR23,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 22. "SAIELSR22,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 21. "SAIELSR21,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 20. "SAIELSR20,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 19. "SAIELSR19,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 18. "SAIELSR18,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 17. "SAIELSR17,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 16. "SAIELSR16,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 15. "SAIELSR15,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 14. "SAIELSR14,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 13. "SAIELSR13,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 12. "SAIELSR12,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 11. "SAIELSR11,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 10. "SAIELSR10,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 9. "SAIELSR09,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 8. "SAIELSR08,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 7. "SAIELSR07,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 6. "SAIELSR06,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 5. "SAIELSR05,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 4. "SAIELSR04,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 3. "SAIELSR03,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 2. "SAIELSR02,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 1. "SAIELSR01,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
bitfld.long 0x0 0. "SAIELSR00,Security attributes of registers for IELSR31 to IELSR0" "0: Secure,1: Non-secure"
line.long 0x4 "ICUSARH,Interrupt Controller Unit Security Attribution Register H"
bitfld.long 0x4 31. "SAIELSR63,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 30. "SAIELSR62,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 29. "SAIELSR61,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 28. "SAIELSR60,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 27. "SAIELSR59,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
newline
bitfld.long 0x4 26. "SAIELSR58,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 25. "SAIELSR57,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 24. "SAIELSR56,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 23. "SAIELSR55,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 22. "SAIELSR54,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
newline
bitfld.long 0x4 21. "SAIELSR53,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 20. "SAIELSR52,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 19. "SAIELSR51,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 18. "SAIELSR50,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 17. "SAIELSR49,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
newline
bitfld.long 0x4 16. "SAIELSR48,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 15. "SAIELSR47,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 14. "SAIELSR46,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 13. "SAIELSR45,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 12. "SAIELSR44,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
newline
bitfld.long 0x4 11. "SAIELSR43,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 10. "SAIELSR42,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 9. "SAIELSR41,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 8. "SAIELSR40,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 7. "SAIELSR39,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
newline
bitfld.long 0x4 6. "SAIELSR38,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 5. "SAIELSR37,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 4. "SAIELSR36,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 3. "SAIELSR35,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 2. "SAIELSR34,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
newline
bitfld.long 0x4 1. "SAIELSR33,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
bitfld.long 0x4 0. "SAIELSR32,Security attributes of registers for IELSR63 to IELSR32" "0: Secure,1: Non-secure"
line.long 0x8 "ICUSARI,Interrupt Controller Unit Security Attribution Register I"
bitfld.long 0x8 31. "SAIELSR95,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 30. "SAIELSR94,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 29. "SAIELSR93,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 28. "SAIELSR92,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 27. "SAIELSR91,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
newline
bitfld.long 0x8 26. "SAIELSR90,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 25. "SAIELSR89,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 24. "SAIELSR88,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 23. "SAIELSR87,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 22. "SAIELSR86,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
newline
bitfld.long 0x8 21. "SAIELSR85,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 20. "SAIELSR84,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 19. "SAIELSR83,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 18. "SAIELSR82,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 17. "SAIELSR81,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
newline
bitfld.long 0x8 16. "SAIELSR80,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 15. "SAIELSR79,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 14. "SAIELSR78,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 13. "SAIELSR77,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 12. "SAIELSR76,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
newline
bitfld.long 0x8 11. "SAIELSR75,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 10. "SAIELSR74,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 9. "SAIELSR73,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 8. "SAIELSR72,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 7. "SAIELSR71,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
newline
bitfld.long 0x8 6. "SAIELSR70,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 5. "SAIELSR69,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 4. "SAIELSR68,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 3. "SAIELSR67,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 2. "SAIELSR66,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
newline
bitfld.long 0x8 1. "SAIELSR65,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
bitfld.long 0x8 0. "SAIELSR64,Security attributes of registers for IELSR95 to IELSR64" "0: Secure,1: Non-secure"
group.long 0x100++0x7
line.long 0x0 "BUSSARA,BUS Security Attribution Register A"
bitfld.long 0x0 0. "BUSSA0,BUS Security Attribution A0" "0: Secure,1: Non-Secure"
line.long 0x4 "BUSSARB,BUS Security Attribution Register B"
bitfld.long 0x4 0. "BUSSB0,BUS Security Attribution B0" "0: Secure,1: Non-Secure"
group.long 0x130++0x7
line.long 0x0 "MMPUSARA,Master Memory Protection Unit Security Attribution Register A"
hexmask.long.byte 0x0 0.--7. 1. "MMPUASAn,MMPUA Security Attribution (n = 0 to 7)"
line.long 0x4 "MMPUSARB,Master Memory Protection Unit Security Attribution Register B"
bitfld.long 0x4 0. "MMPUBSA0,MMPUB Security Attribution" "0: Secure,1: Non-Secure"
group.long 0x180++0x3
line.long 0x0 "TZFSAR,TrustZone Filter Security Attribution Register"
bitfld.long 0x0 0. "TZFSA0,Security attributes of registers for TrustZone Filter" "0: Secure,1: Non-secure"
group.long 0x1B0++0x3
line.long 0x0 "CPUDSAR,CPU Debug Security Attribution Register"
bitfld.long 0x0 0. "CPUDSA0,CPU Debug Security Attribution 0" "0: Secure,1: Non-secure"
tree.end
tree "CRC (Cyclic Redundancy Check Calculator)"
base ad:0x40108000
group.byte 0x0++0x0
line.byte 0x0 "CRCCR0,CRC Control Register 0"
bitfld.byte 0x0 7. "DORCLR,CRCDOR/CRCDOR_HA/CRCDOR_BY Register Clear" "0: No effect,1: Clear the CRCDOR/CRCDOR_HA/CRCDOR_BY register"
bitfld.byte 0x0 6. "LMS,CRC Calculation Switching" "0: Generate CRC code for LSB-first communication,1: Generate CRC code for MSB-first communication"
newline
bitfld.byte 0x0 0.--2. "GPS,CRC Generating Polynomial Switching" "0: No calculation is executed,1: 8-bit CRC-8 (X8 + X2 + X + 1),?,?,?,?,?,?"
group.long 0x4++0x3
line.long 0x0 "CRCDIR,CRC Data Input Register"
group.byte 0x4++0x0
line.byte 0x0 "CRCDIR_BY,CRC Data Input Register"
group.long 0x8++0x3
line.long 0x0 "CRCDOR,CRC Data Output Register"
group.word 0x8++0x1
line.word 0x0 "CRCDOR_HA,CRC Data Output Register"
group.byte 0x8++0x0
line.byte 0x0 "CRCDOR_BY,CRC Data Output Register"
tree.end
tree "DAC12 (12-bit D/A converter)"
base ad:0x40171000
group.word 0x0++0x1
line.word 0x0 "DADR0,D/A Data Register 0"
group.byte 0x4++0x2
line.byte 0x0 "DACR,D/A Control Register"
bitfld.byte 0x0 6. "DAOE0,D/A Output Enable 0" "0: Disable analog output of channel 0 (DA0),1: Enable D/A conversion and analog output of.."
line.byte 0x1 "DADPR,DADR0 Format Select Register"
bitfld.byte 0x1 7. "DPSEL,DADR0 Format Select" "0: Right-justified format,1: Left-justified format"
line.byte 0x2 "DAADSCR,D/A A/D Synchronous Start Control Register"
bitfld.byte 0x2 7. "DAADST,D/A A/D Synchronous Conversion" "0: Do not synchronize DAC12 with ADC12 operation..,1: Synchronize DAC12 with ADC12 operation (enable.."
group.byte 0x8++0x0
line.byte 0x0 "DAAMPCR,D/A Output Amplifier Control Register"
bitfld.byte 0x0 6. "DAAMP0,Amplifier Control 0" "0: Do not use channel 0 output amplifier,1: Use channel 0 output amplifier"
group.byte 0x1C++0x0
line.byte 0x0 "DAASWCR,D/A Amplifier Stabilization Wait Control Register"
bitfld.byte 0x0 6. "DAASW0,D/A Amplifier Stabilization Wait 0" "0: Amplifier stabilization wait off (output) for..,1: Amplifier stabilization wait on (high-Z) for.."
group.byte 0x10C0++0x0
line.byte 0x0 "DAADUSR,D/A A/D Synchronous Unit Select Register"
bitfld.byte 0x0 0. "AMADSEL0,A/D Unit 0 Select" "0: Do not select unit 0,1: Select unit 0"
tree.end
tree "DBG (Debug Function)"
base ad:0x4001B000
rgroup.long 0x0++0x3
line.long 0x0 "DBGSTR,Debug Status Register"
bitfld.long 0x0 29. "CDBGPWRUPACK,Debug power-up acknowledge" "0: Debug power-up request is not acknowledged,1: Debug power-up request is acknowledged"
bitfld.long 0x0 28. "CDBGPWRUPREQ,Debug power-up request" "0: OCD is not requesting debug power up,1: OCD is requesting debug power up"
group.long 0x10++0x3
line.long 0x0 "DBGSTOPCR,Debug Stop Control Register"
bitfld.long 0x0 31. "DBGSTOP_CPER,Mask bit for Cache SRAM parity error reset/interrupt" "0: Enable Cache SRAM parity error reset/interrupt,1: Mask Cache SRAM parity error reset/interrupt"
bitfld.long 0x0 25. "DBGSTOP_RECCR,Mask bit for SRAM ECC error reset/interrupt" "0: Enable SRAM ECC error reset/interrupt,1: Mask SRAM ECC error reset/interrupt"
newline
bitfld.long 0x0 24. "DBGSTOP_RPER,Mask bit for SRAM parity error reset/interrupt" "0: Enable SRAM parity error reset/interrupt,1: Mask SRAM parity error reset/interrupt"
bitfld.long 0x0 18. "DBGSTOP_LVD2,Mask bit for LVD2 reset/interrupt" "0: Enable LVD2 reset/interrupt,1: Mask LVD2 reset/interrupt"
newline
bitfld.long 0x0 17. "DBGSTOP_LVD1,Mask bit for LVD1 reset/interrupt" "0: Enable LVD1 reset/interrupt,1: Mask LVD1 reset/interrupt"
bitfld.long 0x0 16. "DBGSTOP_LVD0,Mask bit for LVD0 reset" "0: Enable LVD0 reset,1: Mask LVD0 reset"
newline
bitfld.long 0x0 1. "DBGSTOP_WDT,Mask bit for WDT reset/interrupt in the OCD run mode" "0: Enable WDT reset/interrupt,1: Mask WDT reset/interrupt and stop WDT counter"
bitfld.long 0x0 0. "DBGSTOP_IWDT,Mask bit for IWDT reset/interrupt in the OCD run mode" "0: Enable IWDT reset/interrupt,1: Mask IWDT reset/interrupt and stop IWDT counter"
tree.end
tree "DMA (DMAC Module Activation)"
base ad:0x40005200
group.byte 0x0++0x0
line.byte 0x0 "DMAST,DMA Module Activation Register"
bitfld.byte 0x0 0. "DMST,DMAC Operation Enable" "0: DMAC activation is disabled.,1: DMAC activation is enabled."
group.long 0x40++0x3
line.long 0x0 "DMECHR,DMAC Error Channel Register"
bitfld.long 0x0 16. "DMESTA,DMAC Error Status" "0: No DMA transfer error occurred,1: DMA transfer error occurred"
rbitfld.long 0x0 8. "DMECHSAM,DMAC Error channel Security Attribution Monitor" "0: secure channel,1: non-secure channel"
rbitfld.long 0x0 0.--2. "DMECH,DMAC Error channel" "0,1,2,3,4,5,6,7"
tree.end
tree "DMAC (Direct Memory Access Controller)"
base ad:0x0
tree "DMAC0"
base ad:0x40005000
group.long 0x0++0xF
line.long 0x0 "DMSAR,DMA Source Address Register"
line.long 0x4 "DMDAR,DMA Destination Address Register"
line.long 0x8 "DMCRA,DMA Transfer Count Register"
hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count"
hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count"
line.long 0xC "DMCRB,DMA Block Transfer Count Register"
hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block repeat or repeat-block transfer operations."
hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block repeat or repeat-block transfer counter."
group.word 0x10++0x1
line.word 0x0 "DMTMD,DMA Transfer Mode Register"
bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?"
bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: The destination is specified as the repeat area..,1: The source is specified as the repeat area or..,?,?"
newline
bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.."
bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?"
newline
bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Software request,1: Hardware request,?,?"
group.byte 0x13++0x0
line.byte 0x0 "DMINT,DMA Interrupt Setting Register"
bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disables the transfer end interrupt request.,1: Enables the transfer end interrupt request."
bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disables the transfer escape end interrupt..,1: Enables the transfer escape end interrupt request."
newline
bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disables the repeat size end interrupt request.,1: Enables the repeat size end interrupt request."
bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
newline
bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
group.word 0x14++0x1
line.word 0x0 "DMAMD,DMA Address Mode Register"
bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Source address is fixed.,1: Offset addition.,?,?"
bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
newline
hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area"
bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Destination address is fixed.,1: Offset addition.,?,?"
newline
bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area"
group.long 0x18++0x3
line.long 0x0 "DMOFR,DMA Offset Register"
group.byte 0x1C++0x2
line.byte 0x0 "DMCNT,DMA Transfer Enable Register"
bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disables DMA transfer.,1: Enables DMA transfer."
line.byte 0x1 "DMREQ,DMA Software Start Register"
bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: SWREQ bit is cleared after DMA transfer is..,1: SWREQ bit is not cleared after DMA transfer is.."
bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: DMA transfer is not requested.,1: DMA transfer is requested."
line.byte 0x2 "DMSTS,DMA Status Register"
rbitfld.byte 0x2 7. "ACT,DMAC Active Flag" "0: DMAC is in the idle state.,1: DMAC is operating."
bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: A transfer end interrupt has not been generated.,1: A transfer end interrupt has been generated."
newline
bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.."
group.long 0x20++0xF
line.long 0x0 "DMSRR,DMA Source Reload Address Register"
line.long 0x4 "DMDRR,DMA Destination Reload Address Register"
line.long 0x8 "DMSBS,DMA Source Buffer Size Register"
hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat-block transfer mode"
hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat-block transfer mode"
line.long 0xC "DMDBS,DMA Destination Buffer Size Register"
hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat-block transfer mode."
hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat-block transfer mode."
tree.end
tree "DMAC1"
base ad:0x40005040
group.long 0x0++0xF
line.long 0x0 "DMSAR,DMA Source Address Register"
line.long 0x4 "DMDAR,DMA Destination Address Register"
line.long 0x8 "DMCRA,DMA Transfer Count Register"
hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count"
hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count"
line.long 0xC "DMCRB,DMA Block Transfer Count Register"
hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block repeat or repeat-block transfer operations."
hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block repeat or repeat-block transfer counter."
group.word 0x10++0x1
line.word 0x0 "DMTMD,DMA Transfer Mode Register"
bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?"
bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: The destination is specified as the repeat area..,1: The source is specified as the repeat area or..,?,?"
newline
bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.."
bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?"
newline
bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Software request,1: Hardware request,?,?"
group.byte 0x13++0x0
line.byte 0x0 "DMINT,DMA Interrupt Setting Register"
bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disables the transfer end interrupt request.,1: Enables the transfer end interrupt request."
bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disables the transfer escape end interrupt..,1: Enables the transfer escape end interrupt request."
newline
bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disables the repeat size end interrupt request.,1: Enables the repeat size end interrupt request."
bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
newline
bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
group.word 0x14++0x1
line.word 0x0 "DMAMD,DMA Address Mode Register"
bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Source address is fixed.,1: Offset addition.,?,?"
bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
newline
hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area"
bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Destination address is fixed.,1: Offset addition.,?,?"
newline
bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area"
group.long 0x18++0x3
line.long 0x0 "DMOFR,DMA Offset Register"
group.byte 0x1C++0x2
line.byte 0x0 "DMCNT,DMA Transfer Enable Register"
bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disables DMA transfer.,1: Enables DMA transfer."
line.byte 0x1 "DMREQ,DMA Software Start Register"
bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: SWREQ bit is cleared after DMA transfer is..,1: SWREQ bit is not cleared after DMA transfer is.."
bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: DMA transfer is not requested.,1: DMA transfer is requested."
line.byte 0x2 "DMSTS,DMA Status Register"
rbitfld.byte 0x2 7. "ACT,DMAC Active Flag" "0: DMAC is in the idle state.,1: DMAC is operating."
bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: A transfer end interrupt has not been generated.,1: A transfer end interrupt has been generated."
newline
bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.."
group.long 0x20++0xF
line.long 0x0 "DMSRR,DMA Source Reload Address Register"
line.long 0x4 "DMDRR,DMA Destination Reload Address Register"
line.long 0x8 "DMSBS,DMA Source Buffer Size Register"
hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat-block transfer mode"
hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat-block transfer mode"
line.long 0xC "DMDBS,DMA Destination Buffer Size Register"
hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat-block transfer mode."
hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat-block transfer mode."
tree.end
tree "DMAC2"
base ad:0x40005080
group.long 0x0++0xF
line.long 0x0 "DMSAR,DMA Source Address Register"
line.long 0x4 "DMDAR,DMA Destination Address Register"
line.long 0x8 "DMCRA,DMA Transfer Count Register"
hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count"
hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count"
line.long 0xC "DMCRB,DMA Block Transfer Count Register"
hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block repeat or repeat-block transfer operations."
hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block repeat or repeat-block transfer counter."
group.word 0x10++0x1
line.word 0x0 "DMTMD,DMA Transfer Mode Register"
bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?"
bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: The destination is specified as the repeat area..,1: The source is specified as the repeat area or..,?,?"
newline
bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.."
bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?"
newline
bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Software request,1: Hardware request,?,?"
group.byte 0x13++0x0
line.byte 0x0 "DMINT,DMA Interrupt Setting Register"
bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disables the transfer end interrupt request.,1: Enables the transfer end interrupt request."
bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disables the transfer escape end interrupt..,1: Enables the transfer escape end interrupt request."
newline
bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disables the repeat size end interrupt request.,1: Enables the repeat size end interrupt request."
bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
newline
bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
group.word 0x14++0x1
line.word 0x0 "DMAMD,DMA Address Mode Register"
bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Source address is fixed.,1: Offset addition.,?,?"
bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
newline
hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area"
bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Destination address is fixed.,1: Offset addition.,?,?"
newline
bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area"
group.long 0x18++0x3
line.long 0x0 "DMOFR,DMA Offset Register"
group.byte 0x1C++0x2
line.byte 0x0 "DMCNT,DMA Transfer Enable Register"
bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disables DMA transfer.,1: Enables DMA transfer."
line.byte 0x1 "DMREQ,DMA Software Start Register"
bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: SWREQ bit is cleared after DMA transfer is..,1: SWREQ bit is not cleared after DMA transfer is.."
bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: DMA transfer is not requested.,1: DMA transfer is requested."
line.byte 0x2 "DMSTS,DMA Status Register"
rbitfld.byte 0x2 7. "ACT,DMAC Active Flag" "0: DMAC is in the idle state.,1: DMAC is operating."
bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: A transfer end interrupt has not been generated.,1: A transfer end interrupt has been generated."
newline
bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.."
group.long 0x20++0xF
line.long 0x0 "DMSRR,DMA Source Reload Address Register"
line.long 0x4 "DMDRR,DMA Destination Reload Address Register"
line.long 0x8 "DMSBS,DMA Source Buffer Size Register"
hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat-block transfer mode"
hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat-block transfer mode"
line.long 0xC "DMDBS,DMA Destination Buffer Size Register"
hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat-block transfer mode."
hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat-block transfer mode."
tree.end
tree "DMAC3"
base ad:0x400050C0
group.long 0x0++0xF
line.long 0x0 "DMSAR,DMA Source Address Register"
line.long 0x4 "DMDAR,DMA Destination Address Register"
line.long 0x8 "DMCRA,DMA Transfer Count Register"
hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count"
hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count"
line.long 0xC "DMCRB,DMA Block Transfer Count Register"
hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block repeat or repeat-block transfer operations."
hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block repeat or repeat-block transfer counter."
group.word 0x10++0x1
line.word 0x0 "DMTMD,DMA Transfer Mode Register"
bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?"
bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: The destination is specified as the repeat area..,1: The source is specified as the repeat area or..,?,?"
newline
bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.."
bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?"
newline
bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Software request,1: Hardware request,?,?"
group.byte 0x13++0x0
line.byte 0x0 "DMINT,DMA Interrupt Setting Register"
bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disables the transfer end interrupt request.,1: Enables the transfer end interrupt request."
bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disables the transfer escape end interrupt..,1: Enables the transfer escape end interrupt request."
newline
bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disables the repeat size end interrupt request.,1: Enables the repeat size end interrupt request."
bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
newline
bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
group.word 0x14++0x1
line.word 0x0 "DMAMD,DMA Address Mode Register"
bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Source address is fixed.,1: Offset addition.,?,?"
bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
newline
hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area"
bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Destination address is fixed.,1: Offset addition.,?,?"
newline
bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area"
group.long 0x18++0x3
line.long 0x0 "DMOFR,DMA Offset Register"
group.byte 0x1C++0x2
line.byte 0x0 "DMCNT,DMA Transfer Enable Register"
bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disables DMA transfer.,1: Enables DMA transfer."
line.byte 0x1 "DMREQ,DMA Software Start Register"
bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: SWREQ bit is cleared after DMA transfer is..,1: SWREQ bit is not cleared after DMA transfer is.."
bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: DMA transfer is not requested.,1: DMA transfer is requested."
line.byte 0x2 "DMSTS,DMA Status Register"
rbitfld.byte 0x2 7. "ACT,DMAC Active Flag" "0: DMAC is in the idle state.,1: DMAC is operating."
bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: A transfer end interrupt has not been generated.,1: A transfer end interrupt has been generated."
newline
bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.."
group.long 0x20++0xF
line.long 0x0 "DMSRR,DMA Source Reload Address Register"
line.long 0x4 "DMDRR,DMA Destination Reload Address Register"
line.long 0x8 "DMSBS,DMA Source Buffer Size Register"
hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat-block transfer mode"
hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat-block transfer mode"
line.long 0xC "DMDBS,DMA Destination Buffer Size Register"
hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat-block transfer mode."
hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat-block transfer mode."
tree.end
tree "DMAC4"
base ad:0x40005100
group.long 0x0++0xF
line.long 0x0 "DMSAR,DMA Source Address Register"
line.long 0x4 "DMDAR,DMA Destination Address Register"
line.long 0x8 "DMCRA,DMA Transfer Count Register"
hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count"
hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count"
line.long 0xC "DMCRB,DMA Block Transfer Count Register"
hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block repeat or repeat-block transfer operations."
hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block repeat or repeat-block transfer counter."
group.word 0x10++0x1
line.word 0x0 "DMTMD,DMA Transfer Mode Register"
bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?"
bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: The destination is specified as the repeat area..,1: The source is specified as the repeat area or..,?,?"
newline
bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.."
bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?"
newline
bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Software request,1: Hardware request,?,?"
group.byte 0x13++0x0
line.byte 0x0 "DMINT,DMA Interrupt Setting Register"
bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disables the transfer end interrupt request.,1: Enables the transfer end interrupt request."
bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disables the transfer escape end interrupt..,1: Enables the transfer escape end interrupt request."
newline
bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disables the repeat size end interrupt request.,1: Enables the repeat size end interrupt request."
bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
newline
bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
group.word 0x14++0x1
line.word 0x0 "DMAMD,DMA Address Mode Register"
bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Source address is fixed.,1: Offset addition.,?,?"
bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
newline
hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area"
bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Destination address is fixed.,1: Offset addition.,?,?"
newline
bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area"
group.long 0x18++0x3
line.long 0x0 "DMOFR,DMA Offset Register"
group.byte 0x1C++0x2
line.byte 0x0 "DMCNT,DMA Transfer Enable Register"
bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disables DMA transfer.,1: Enables DMA transfer."
line.byte 0x1 "DMREQ,DMA Software Start Register"
bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: SWREQ bit is cleared after DMA transfer is..,1: SWREQ bit is not cleared after DMA transfer is.."
bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: DMA transfer is not requested.,1: DMA transfer is requested."
line.byte 0x2 "DMSTS,DMA Status Register"
rbitfld.byte 0x2 7. "ACT,DMAC Active Flag" "0: DMAC is in the idle state.,1: DMAC is operating."
bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: A transfer end interrupt has not been generated.,1: A transfer end interrupt has been generated."
newline
bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.."
group.long 0x20++0xF
line.long 0x0 "DMSRR,DMA Source Reload Address Register"
line.long 0x4 "DMDRR,DMA Destination Reload Address Register"
line.long 0x8 "DMSBS,DMA Source Buffer Size Register"
hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat-block transfer mode"
hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat-block transfer mode"
line.long 0xC "DMDBS,DMA Destination Buffer Size Register"
hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat-block transfer mode."
hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat-block transfer mode."
tree.end
tree "DMAC5"
base ad:0x40005140
group.long 0x0++0xF
line.long 0x0 "DMSAR,DMA Source Address Register"
line.long 0x4 "DMDAR,DMA Destination Address Register"
line.long 0x8 "DMCRA,DMA Transfer Count Register"
hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count"
hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count"
line.long 0xC "DMCRB,DMA Block Transfer Count Register"
hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block repeat or repeat-block transfer operations."
hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block repeat or repeat-block transfer counter."
group.word 0x10++0x1
line.word 0x0 "DMTMD,DMA Transfer Mode Register"
bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?"
bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: The destination is specified as the repeat area..,1: The source is specified as the repeat area or..,?,?"
newline
bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.."
bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?"
newline
bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Software request,1: Hardware request,?,?"
group.byte 0x13++0x0
line.byte 0x0 "DMINT,DMA Interrupt Setting Register"
bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disables the transfer end interrupt request.,1: Enables the transfer end interrupt request."
bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disables the transfer escape end interrupt..,1: Enables the transfer escape end interrupt request."
newline
bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disables the repeat size end interrupt request.,1: Enables the repeat size end interrupt request."
bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
newline
bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
group.word 0x14++0x1
line.word 0x0 "DMAMD,DMA Address Mode Register"
bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Source address is fixed.,1: Offset addition.,?,?"
bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
newline
hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area"
bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Destination address is fixed.,1: Offset addition.,?,?"
newline
bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area"
group.long 0x18++0x3
line.long 0x0 "DMOFR,DMA Offset Register"
group.byte 0x1C++0x2
line.byte 0x0 "DMCNT,DMA Transfer Enable Register"
bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disables DMA transfer.,1: Enables DMA transfer."
line.byte 0x1 "DMREQ,DMA Software Start Register"
bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: SWREQ bit is cleared after DMA transfer is..,1: SWREQ bit is not cleared after DMA transfer is.."
bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: DMA transfer is not requested.,1: DMA transfer is requested."
line.byte 0x2 "DMSTS,DMA Status Register"
rbitfld.byte 0x2 7. "ACT,DMAC Active Flag" "0: DMAC is in the idle state.,1: DMAC is operating."
bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: A transfer end interrupt has not been generated.,1: A transfer end interrupt has been generated."
newline
bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.."
group.long 0x20++0xF
line.long 0x0 "DMSRR,DMA Source Reload Address Register"
line.long 0x4 "DMDRR,DMA Destination Reload Address Register"
line.long 0x8 "DMSBS,DMA Source Buffer Size Register"
hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat-block transfer mode"
hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat-block transfer mode"
line.long 0xC "DMDBS,DMA Destination Buffer Size Register"
hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat-block transfer mode."
hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat-block transfer mode."
tree.end
tree "DMAC6"
base ad:0x40005180
group.long 0x0++0xF
line.long 0x0 "DMSAR,DMA Source Address Register"
line.long 0x4 "DMDAR,DMA Destination Address Register"
line.long 0x8 "DMCRA,DMA Transfer Count Register"
hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count"
hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count"
line.long 0xC "DMCRB,DMA Block Transfer Count Register"
hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block repeat or repeat-block transfer operations."
hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block repeat or repeat-block transfer counter."
group.word 0x10++0x1
line.word 0x0 "DMTMD,DMA Transfer Mode Register"
bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?"
bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: The destination is specified as the repeat area..,1: The source is specified as the repeat area or..,?,?"
newline
bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.."
bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?"
newline
bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Software request,1: Hardware request,?,?"
group.byte 0x13++0x0
line.byte 0x0 "DMINT,DMA Interrupt Setting Register"
bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disables the transfer end interrupt request.,1: Enables the transfer end interrupt request."
bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disables the transfer escape end interrupt..,1: Enables the transfer escape end interrupt request."
newline
bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disables the repeat size end interrupt request.,1: Enables the repeat size end interrupt request."
bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
newline
bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
group.word 0x14++0x1
line.word 0x0 "DMAMD,DMA Address Mode Register"
bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Source address is fixed.,1: Offset addition.,?,?"
bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
newline
hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area"
bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Destination address is fixed.,1: Offset addition.,?,?"
newline
bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area"
group.long 0x18++0x3
line.long 0x0 "DMOFR,DMA Offset Register"
group.byte 0x1C++0x2
line.byte 0x0 "DMCNT,DMA Transfer Enable Register"
bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disables DMA transfer.,1: Enables DMA transfer."
line.byte 0x1 "DMREQ,DMA Software Start Register"
bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: SWREQ bit is cleared after DMA transfer is..,1: SWREQ bit is not cleared after DMA transfer is.."
bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: DMA transfer is not requested.,1: DMA transfer is requested."
line.byte 0x2 "DMSTS,DMA Status Register"
rbitfld.byte 0x2 7. "ACT,DMAC Active Flag" "0: DMAC is in the idle state.,1: DMAC is operating."
bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: A transfer end interrupt has not been generated.,1: A transfer end interrupt has been generated."
newline
bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.."
group.long 0x20++0xF
line.long 0x0 "DMSRR,DMA Source Reload Address Register"
line.long 0x4 "DMDRR,DMA Destination Reload Address Register"
line.long 0x8 "DMSBS,DMA Source Buffer Size Register"
hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat-block transfer mode"
hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat-block transfer mode"
line.long 0xC "DMDBS,DMA Destination Buffer Size Register"
hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat-block transfer mode."
hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat-block transfer mode."
tree.end
tree "DMAC7"
base ad:0x400051C0
group.long 0x0++0xF
line.long 0x0 "DMSAR,DMA Source Address Register"
line.long 0x4 "DMDAR,DMA Destination Address Register"
line.long 0x8 "DMCRA,DMA Transfer Count Register"
hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count"
hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count"
line.long 0xC "DMCRB,DMA Block Transfer Count Register"
hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block repeat or repeat-block transfer operations."
hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block repeat or repeat-block transfer counter."
group.word 0x10++0x1
line.word 0x0 "DMTMD,DMA Transfer Mode Register"
bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?"
bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: The destination is specified as the repeat area..,1: The source is specified as the repeat area or..,?,?"
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bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.."
bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?"
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bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Software request,1: Hardware request,?,?"
group.byte 0x13++0x0
line.byte 0x0 "DMINT,DMA Interrupt Setting Register"
bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disables the transfer end interrupt request.,1: Enables the transfer end interrupt request."
bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disables the transfer escape end interrupt..,1: Enables the transfer escape end interrupt request."
newline
bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disables the repeat size end interrupt request.,1: Enables the repeat size end interrupt request."
bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
newline
bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disables an interrupt request for an extended..,1: Enables an interrupt request for an extended.."
group.word 0x14++0x1
line.word 0x0 "DMAMD,DMA Address Mode Register"
bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Source address is fixed.,1: Offset addition.,?,?"
bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
newline
hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area"
bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Destination address is fixed.,1: Offset addition.,?,?"
newline
bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading.,1: Add index after reloading."
hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area"
group.long 0x18++0x3
line.long 0x0 "DMOFR,DMA Offset Register"
group.byte 0x1C++0x2
line.byte 0x0 "DMCNT,DMA Transfer Enable Register"
bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disables DMA transfer.,1: Enables DMA transfer."
line.byte 0x1 "DMREQ,DMA Software Start Register"
bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: SWREQ bit is cleared after DMA transfer is..,1: SWREQ bit is not cleared after DMA transfer is.."
bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: DMA transfer is not requested.,1: DMA transfer is requested."
line.byte 0x2 "DMSTS,DMA Status Register"
rbitfld.byte 0x2 7. "ACT,DMAC Active Flag" "0: DMAC is in the idle state.,1: DMAC is operating."
bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: A transfer end interrupt has not been generated.,1: A transfer end interrupt has been generated."
newline
bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.."
group.long 0x20++0xF
line.long 0x0 "DMSRR,DMA Source Reload Address Register"
line.long 0x4 "DMDRR,DMA Destination Reload Address Register"
line.long 0x8 "DMSBS,DMA Source Buffer Size Register"
hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat-block transfer mode"
hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat-block transfer mode"
line.long 0xC "DMDBS,DMA Destination Buffer Size Register"
hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat-block transfer mode."
hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat-block transfer mode."
tree.end
tree.end
tree "DOC (Data Operation Circuit)"
base ad:0x40109000
group.byte 0x0++0x0
line.byte 0x0 "DOCR,DOC Control Register"
bitfld.byte 0x0 6. "DOPCFCL,DOPCF Clear" "0: Retain DOPCF flag state,1: Clear DOPCF flag"
rbitfld.byte 0x0 5. "DOPCF,DOC Flag" "0,1"
bitfld.byte 0x0 2. "DCSEL,Detection Condition Select" "0: Set DOPCF flag when data mismatch is detected,1: Set DOPCF flag when data match is detected"
bitfld.byte 0x0 0.--1. "OMS,Operating Mode Select" "0: Data comparison mode,1: Data addition mode,?,?"
group.word 0x2++0x3
line.word 0x0 "DODIR,DOC Data Input Register"
line.word 0x2 "DODSR,DOC Data Setting Register"
tree.end
tree "DTC (Data Transfer Controller)"
base ad:0x40005400
group.byte 0x0++0x0
line.byte 0x0 "DTCCR,DTC Control Register"
bitfld.byte 0x0 4. "RRS,DTC Transfer Information Read Skip Enable" "0: Transfer information read is not skipped,1: Transfer information read is skipped when vector.."
group.long 0x4++0x3
line.long 0x0 "DTCVBR,DTC Vector Base Register"
group.byte 0xC++0x0
line.byte 0x0 "DTCST,DTC Module Start Register"
bitfld.byte 0x0 0. "DTCST,DTC Module Start" "0: DTC module stopped.,1: DTC module started."
rgroup.word 0xE++0x1
line.word 0x0 "DTCSTS,DTC Status Register"
bitfld.word 0x0 15. "ACT,DTC Active Flag" "0: DTC transfer operation is not in progress.,1: DTC transfer operation is in progress."
hexmask.word.byte 0x0 0.--7. 1. "VECN,DTC-Activating Vector Number Monitoring"
group.byte 0x10++0x0
line.byte 0x0 "DTCCR_SEC,DTC Control Register for secure Region"
bitfld.byte 0x0 4. "RRS,DTC Transfer Information Read Skip Enable for Secure" "0: Transfer information read is not skipped.,1: Transfer information read is skipped when vector.."
group.long 0x14++0x3
line.long 0x0 "DTCVBR_SEC,DTC Vector Base Register for secure Region"
group.long 0x20++0x3
line.long 0x0 "DTEVR,DTC Error Vector Register"
bitfld.long 0x0 16. "DTESTA,DTC Error Status Flag" "0: No DTC transfer error occurred,1: DTC transfer error occurred"
rbitfld.long 0x0 8. "DTEVSAM,DTC Error Vector Number SA Monitor" "0: Secure vector number,1: Non-Secure vector number"
hexmask.long.byte 0x0 0.--7. 1. "DTEV,DTC Error Vector Number"
tree.end
tree "ELC (Event Link Controller)"
base ad:0x40082000
group.byte 0x0++0x0
line.byte 0x0 "ELCR,Event Link Controller Register"
bitfld.byte 0x0 7. "ELCON,All Event Link Enable" "0: ELC function is disabled.,1: ELC function is enabled."
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
group.byte ($2+0x2)++0x0
line.byte 0x0 "ELSEGR$1,Event Link Software Event Generation Register %s"
bitfld.byte 0x0 7. "WI,ELSEGR Register Write Disable" "0: Write to ELSEGR register enabled.,1: Write to ELSEGR register disabled."
bitfld.byte 0x0 6. "WE,SEG Bit Write Enable" "0: Write to SEG bit disabled.,1: Write to SEG bit enabled."
bitfld.byte 0x0 0. "SEG,Software Event Generation" "0: Normal operation,1: Software event is generated."
repeat.end
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x10)++0x1
line.word 0x0 "ELSR$1,Event Link Setting Register %s"
hexmask.word 0x0 0.--8. 1. "ELS,Event Link Select"
repeat.end
repeat 6. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x40)++0x1
line.word 0x0 "ELSR$1,Event Link Setting Register %s"
hexmask.word 0x0 0.--8. 1. "ELS,Event Link Select"
repeat.end
group.word 0x6C++0x1
line.word 0x0 "ELSR23,Event Link Setting Register 23"
hexmask.word 0x0 0.--8. 1. "ELS,Event Link Select"
group.word 0x74++0x1
line.word 0x0 "ELCSARA,Event Link Controller Security Attribution Register A"
bitfld.word 0x0 2. "ELSEGR1,Event Link Software Event Generation Register 1 Security Attribution" "0: Secure,1: Non-secure"
bitfld.word 0x0 1. "ELSEGR0,Event Link Software Event Generation Register 0 Security Attribution" "0: Secure,1: Non-secure"
bitfld.word 0x0 0. "ELCR,Event Link Controller Register Security Attribution" "0: Secure,1: Non-secure"
group.word 0x78++0x1
line.word 0x0 "ELCSARB,Event Link Controller Security Attribution Register B"
hexmask.word 0x0 0.--15. 1. "ELSR,Event Link Setting Register n Security Attribution"
group.word 0x7C++0x1
line.word 0x0 "ELCSARC,Event Link Controller Security Attribution Register C"
hexmask.word.byte 0x0 0.--7. 1. "ELSR,Event Link Setting Register n Security Attribution (n = 16 to 23)"
tree.end
tree "FACI (Flash/CPU Interface)"
base ad:0x407FE000
group.byte 0x10++0x0
line.byte 0x0 "FASTAT,Flash Access Status Register"
bitfld.byte 0x0 7. "CFAE,Code Flash Memory Access Violation Flag" "0: No code flash memory access violation has occurred,1: A code flash memory access violation has occurred."
rbitfld.byte 0x0 4. "CMDLK,Command Lock Flag" "0: The flash sequencer is not in the command-locked..,1: The flash sequencer is in the command-locked.."
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bitfld.byte 0x0 3. "DFAE,Data Flash Memory Access Violation Flag" "0: No data flash memory access violation has occurred,1: A data flash memory access violation has occurred."
group.byte 0x14++0x0
line.byte 0x0 "FAEINT,Flash Access Error Interrupt Enable Register"
bitfld.byte 0x0 7. "CFAEIE,Code Flash Memory Access Violation Interrupt Enable" "0: Generation of an FIFERR interrupt request is..,1: Generation of an FIFERR interrupt request is.."
bitfld.byte 0x0 4. "CMDLKIE,Command Lock Interrupt Enable" "0: Generation of an FIFERR interrupt request is..,1: Generation of an FIFERR interrupt request is.."
newline
bitfld.byte 0x0 3. "DFAEIE,Data Flash Memory Access Violation Interrupt Enable" "0: Generation of an FIFERR interrupt request is..,1: Generation of an FIFERR interrupt request is.."
group.byte 0x18++0x0
line.byte 0x0 "FRDYIE,Flash Ready Interrupt Enable Register"
bitfld.byte 0x0 0. "FRDYIE,Flash Ready Interrupt Enable" "0: Generation of an FRDY interrupt request is..,1: Generation of an FRDY interrupt request is.."
group.long 0x30++0x7
line.long 0x0 "FSADDR,FACI Command Start Address Register"
line.long 0x4 "FEADDR,FACI Command End Address Register"
hexmask.long 0x4 0.--31. 1. "FEADDR,End Address for FACI Command Processing"
group.word 0x44++0x1
line.word 0x0 "FMEPROT,Flash P/E Mode Entry Protection Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code"
bitfld.word 0x0 0. "CEPROT,Code Flash P/E Mode Entry Protection" "0: FENTRYC bit is not protected,1: FENTRYC bit is protected."
group.word 0x7C++0x1
line.word 0x0 "FBPROT1,Flash Block Protection for Secure Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code"
bitfld.word 0x0 0. "BPCN1,Block Protection for Secure Cancel" "0: Block protection is enabled,1: Block protection is disabled."
rgroup.long 0x80++0x3
line.long 0x0 "FSTATR,Flash Status Register"
bitfld.long 0x0 23. "ILGCOMERR,Illegal Command Error" "0: A status clear or forced stop command processing..,1: An error has occurred."
bitfld.long 0x0 22. "FESETERR,FENTRY Setting Error" "0: A status clear or forced stop command processing..,1: An error has occurred."
newline
bitfld.long 0x0 21. "SECERR,Security Error" "0: A status clear or forced stop command processing..,1: An error has occurred."
bitfld.long 0x0 20. "OTERR,Other Error" "0: A status clear or forced stop command processing..,1: An error has occurred."
newline
bitfld.long 0x0 15. "FRDY,Flash Ready Flag" "0: Program Block Erase Multi Block Erase P/E..,1: None of the above is in progress."
bitfld.long 0x0 14. "ILGLERR,Illegal Command Error Flag" "0: The flash sequencer has not detected an illegal..,1: The flash sequencer has detected an illegal FACI.."
newline
bitfld.long 0x0 13. "ERSERR,Erasure Error Flag" "0: Erasure has completed successfully,1: An error has occurred during erasure."
bitfld.long 0x0 12. "PRGERR,Programming Error Flag" "0: Programming has completed successfully,1: An error has occurred during programming."
newline
bitfld.long 0x0 11. "SUSRDY,Suspend Ready Flag" "0: The flash sequencer cannot receive P/E suspend..,1: The flash sequencer can receive P/E suspend.."
bitfld.long 0x0 10. "DBFULL,Data Buffer Full Flag" "0: The data buffer is empty,1: The data buffer is full."
newline
bitfld.long 0x0 9. "ERSSPD,Erasure Suspend Status Flag" "0: The flash sequencer is not in the erasure..,1: The flash sequencer is in the erasure suspension.."
bitfld.long 0x0 8. "PRGSPD,Programming Suspend Status Flag" "0: The flash sequencer is not in the programming..,1: The flash sequencer is in the programming.."
newline
bitfld.long 0x0 6. "FLWEERR,Flash Write/Erase Protect Error Flag" "0: An error has not occurred,1: An error has occurred."
group.word 0x84++0x1
line.word 0x0 "FENTRYR,Flash P/E Mode Entry Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code"
bitfld.word 0x0 7. "FENTRYD,Data Flash P/E Mode Entry" "0: Data flash is in read mode,1: Data flash is in P/E mode."
newline
bitfld.word 0x0 0. "FENTRYC,Code Flash P/E Mode Entry" "0: Code flash is in read mode,1: Code flash is in P/E mode."
group.word 0x8C++0x1
line.word 0x0 "FSUINITR,Flash Sequencer Setup Initialization Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code"
bitfld.word 0x0 0. "SUINIT,Set-Up Initialization" "0: The FSADDR FEADDR FBPROT1 FENTRYR FBCCNT and..,1: The FSADDR FEADDR FBRPOT1 FENTRYR FBCCNT and.."
rgroup.word 0xA0++0x1
line.word 0x0 "FCMDR,FACI Command Register"
hexmask.word.byte 0x0 8.--15. 1. "CMDR,Command Flag"
hexmask.word.byte 0x0 0.--7. 1. "PCMDR,Pre-command Flag"
group.byte 0xD0++0x0
line.byte 0x0 "FBCCNT,Blank Check Control Register"
bitfld.byte 0x0 0. "BCDIR,Blank Check Direction" "0: Blank checking is executed from the lower..,1: Blank checking is executed from the higher.."
rgroup.byte 0xD4++0x0
line.byte 0x0 "FBCSTAT,Blank Check Status Register"
bitfld.byte 0x0 0. "BCST,Blank Check Status Flag" "0: The target area is in the non-programmed state..,1: The target area has been programmed with 0s or 1s."
rgroup.long 0xD8++0x7
line.long 0x0 "FPSADDR,Data Flash Programming Start Address Register"
hexmask.long.tbyte 0x0 0.--16. 1. "PSADR,Programmed Area Start Address"
line.long 0x4 "FSUASMON,Flash Startup Area Select Monitor Register"
bitfld.long 0x4 31. "BTFLG,Flag of Startup Area Select for Boot Swap" "0: The startup area is the alternate block (block 1),1: The startup area is the default block (block 0)."
bitfld.long 0x4 15. "FSPR,Protection Programming Flag to set Boot Flag and Startup Area Control" "0: Protected state,1: Non-protected state."
group.word 0xE0++0x1
line.word 0x0 "FCPSR,Flash Sequencer Processing Switching Register"
bitfld.word 0x0 0. "ESUSPMD,Erasure Suspend Mode" "0: Suspension priority mode,1: Erasure priority mode."
group.word 0xE4++0x1
line.word 0x0 "FPCKAR,Flash Sequencer Processing Clock Notification Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code"
hexmask.word.byte 0x0 0.--7. 1. "PCKA,Flash Sequencer Operating Clock Notification"
group.word 0xE8++0x1
line.word 0x0 "FSUACR,Flash Startup Area Control Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code"
bitfld.word 0x0 0.--1. "SAS,Startup Area Select" "0: Startup area is selected by BTFLG bit,1: Startup area is selected by BTFLG bit,?,?"
tree.end
tree "FCACHE (SYSTEM/FLASH)"
base ad:0x4001C100
group.word 0x0++0x1
line.word 0x0 "FCACHEE,Flash Cache Enable Register"
bitfld.word 0x0 0. "FCACHEEN,Flash Cache Enable" "0: FCACHE is disabled,1: FCACHE is enabled"
group.word 0x4++0x1
line.word 0x0 "FCACHEIV,Flash Cache Invalidate Register"
bitfld.word 0x0 0. "FCACHEIV,Flash Cache Invalidate" "0: Read: Do not invalidate. Write: The setting is..,1: Invalidate FCACHE is invalidated."
group.byte 0x1C++0x0
line.byte 0x0 "FLWT,Flash Wait Cycle Register"
bitfld.byte 0x0 0.--2. "FLWT,Flash Wait Cycle" "0: Setting prohibited,1: 1 wait (ICLK > 50 MHz),?,?,?,?,?,?"
group.word 0x40++0x1
line.word 0x0 "FSAR,Flash Security Attribution Register"
bitfld.word 0x0 8. "FCKMHZSA,FCKMHZ Security Attribution" "0: Secure,1: Non-Secure"
bitfld.word 0x0 0. "FLWTSA,FLWT Security Attribution" "0: Secure,1: Non-Secure"
tree.end
tree "FLAD (Data Flash)"
base ad:0x407FC000
group.byte 0x40++0x0
line.byte 0x0 "FCKMHZ,Data Flash Access Frequency Register"
hexmask.byte 0x0 0.--7. 1. "FCKMHZ,Data Flash Access Frequency Register"
tree.end
tree "GPT (General PWM Timer)"
base ad:0x0
tree "GPT16E0 (General PWM 16-bit Timer 0)"
base ad:0x40169000
group.long 0x0++0xB
line.long 0x0 "GTWP,General PWM Timer Write-Protection Register"
hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code"
bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled"
newline
bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
newline
bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
bitfld.long 0x0 0. "WP,Register Write Disable" "0: Write to the register enabled,1: Write to the register disabled"
line.long 0x4 "GTSTR,General PWM Timer Software Start Register"
bitfld.long 0x4 5. "CSTRT5,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
bitfld.long 0x4 4. "CSTRT4,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
newline
bitfld.long 0x4 1. "CSTRT1,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
bitfld.long 0x4 0. "CSTRT0,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
line.long 0x8 "GTSTP,General PWM Timer Software Stop Register"
bitfld.long 0x8 5. "CSTOP5,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
bitfld.long 0x8 4. "CSTOP4,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
newline
bitfld.long 0x8 1. "CSTOP1,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
bitfld.long 0x8 0. "CSTOP0,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
wgroup.long 0xC++0x3
line.long 0x0 "GTCLR,General PWM Timer Software Clear Register"
bitfld.long 0x0 5. "CCLR5,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
bitfld.long 0x0 4. "CCLR4,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
newline
bitfld.long 0x0 1. "CCLR1,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
bitfld.long 0x0 0. "CCLR0,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
group.long 0x10++0x8B
line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register"
bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Counter start disabled by the GTSTR register,1: Counter start enabled by the GTSTR register"
bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTH input,1: Counter start enabled at the ELC_GPTH input"
newline
bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTG input,1: Counter start enabled at the ELC_GPTG input"
bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTF input,1: Counter start enabled at the ELC_GPTF input"
newline
bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTE input,1: Counter start enabled at the ELC_GPTE input"
bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTD input,1: Counter start enabled at the ELC_GPTD input"
newline
bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTC input,1: Counter start enabled at the ELC_GPTC input"
bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTB input,1: Counter start enabled at the ELC_GPTB input"
newline
bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTA input,1: Counter start enabled at the ELC_GPTA input"
bitfld.long 0x0 15. "SSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 14. "SSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
bitfld.long 0x0 13. "SSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
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bitfld.long 0x0 12. "SSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 11. "SSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 10. "SSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
bitfld.long 0x0 9. "SSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
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bitfld.long 0x0 8. "SSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
newline
bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
newline
bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register"
bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Counter stop disabled by the GTSTP register,1: Counter stop enabled by the GTSTP register"
bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTH input,1: Counter stop enabled at the ELC_GPTH input"
newline
bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTG input,1: Counter stop enabled at the ELC_GPTG input"
bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTF input,1: Counter stop enabled at the ELC_GPTF input"
newline
bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTE input,1: Counter stop enabled at the ELC_GPTE input"
bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTD input,1: Counter stop enabled at the ELC_GPTD input"
newline
bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTC input,1: Counter stop enabled at the ELC_GPTC input"
bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTB input,1: Counter stop enabled at the ELC_GPTB input"
newline
bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTA input,1: Counter stop enabled at the ELC_GPTA input"
bitfld.long 0x4 15. "PSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 14. "PSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
bitfld.long 0x4 13. "PSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
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bitfld.long 0x4 12. "PSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 11. "PSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 10. "PSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
bitfld.long 0x4 9. "PSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
newline
bitfld.long 0x4 8. "PSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register"
bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Counter clear disabled by the GTCLR register,1: Counter clear enabled by the GTCLR register"
bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTH input,1: Counter clear enabled at the ELC_GPTH input"
newline
bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTG input,1: Counter clear enabled at the ELC_GPTG input"
bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTF input,1: Counter clear enabled at the ELC_GPTF input"
newline
bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTE input,1: Counter clear enabled at the ELC_GPTE input"
bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTD input,1: Counter clear enabled at the ELC_GPTD input"
newline
bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTC input,1: Counter clear enabled at the ELC_GPTC input"
bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTB input,1: Counter clear enabled at the ELC_GPTB input"
newline
bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTA input,1: Counter clear enabled at the ELC_GPTA input"
bitfld.long 0x8 15. "CSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 14. "CSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
bitfld.long 0x8 13. "CSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
newline
bitfld.long 0x8 12. "CSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
bitfld.long 0x8 11. "CSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 10. "CSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
bitfld.long 0x8 9. "CSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
newline
bitfld.long 0x8 8. "CSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register"
bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTH input,1: Counter count up enabled at the ELC_GPTH input"
bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTG input,1: Counter count up enabled at the ELC_GPTG input"
newline
bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTF input,1: Counter count up enabled at the ELC_GPTF input"
bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTE input,1: Counter count up enabled at the ELC_GPTE input"
newline
bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTD input,1: Counter count up enabled at the ELC_GPTD input"
bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTC input,1: Counter count up enabled at the ELC_GPTC input"
newline
bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTB input,1: Counter count up enabled at the ELC_GPTB input"
bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTA input,1: Counter count up enabled at the ELC_GPTA input"
newline
bitfld.long 0xC 15. "USCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 14. "USCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
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bitfld.long 0xC 13. "USCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
bitfld.long 0xC 12. "USCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 11. "USCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 10. "USCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
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bitfld.long 0xC 9. "USCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
bitfld.long 0xC 8. "USCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register"
bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTH input,1: Counter count down enabled at the ELC_GPTH input"
bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTG input,1: Counter count down enabled at the ELC_GPTG input"
newline
bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTF input,1: Counter count down enabled at the ELC_GPTF input"
bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTE input,1: Counter count down enabled at the ELC_GPTE input"
newline
bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTD input,1: Counter count down enabled at the ELC_GPTD input"
bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTC input,1: Counter count down enabled at the ELC_GPTC input"
newline
bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTB input,1: Counter count down enabled at the ELC_GPTB input"
bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTA input,1: Counter count down enabled at the ELC_GPTA input"
newline
bitfld.long 0x10 15. "DSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 14. "DSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
newline
bitfld.long 0x10 13. "DSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
bitfld.long 0x10 12. "DSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 11. "DSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 10. "DSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
newline
bitfld.long 0x10 9. "DSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
bitfld.long 0x10 8. "DSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A"
bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTH..,1: GTCCRA input capture enabled at the ELC_GPTH input"
bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTG..,1: GTCCRA input capture enabled at the ELC_GPTG input"
newline
bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTF..,1: GTCCRA input capture enabled at the ELC_GPTF input"
bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTE..,1: GTCCRA input capture enabled at the ELC_GPTE input"
newline
bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTD..,1: GTCCRA input capture enabled at the ELC_GPTD input"
bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTC..,1: GTCCRA input capture enabled at the ELC_GPTC input"
newline
bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTB..,1: GTCCRA input capture enabled at the ELC_GPTB input"
bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTA..,1: GTCCRA input capture enabled at the ELC_GPTA input"
newline
bitfld.long 0x14 15. "ASCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 14. "ASCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
newline
bitfld.long 0x14 13. "ASCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
bitfld.long 0x14 12. "ASCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 11. "ASCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 10. "ASCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
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bitfld.long 0x14 9. "ASCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
bitfld.long 0x14 8. "ASCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B"
bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTH..,1: GTCCRB input capture enabled at the ELC_GPTH input"
bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTG..,1: GTCCRB input capture enabled at the ELC_GPTG input"
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bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTF..,1: GTCCRB input capture enabled at the ELC_GPTF input"
bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTE..,1: GTCCRB input capture enabled at the ELC_GPTE input"
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bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTD..,1: GTCCRB input capture enabled at the ELC_GPTD input"
bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTC..,1: GTCCRB input capture enabled at the ELC_GPTC input"
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bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTB..,1: GTCCRB input capture enabled at the ELC_GPTB input"
bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTA..,1: GTCCRB input capture enabled at the ELC_GPTA input"
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bitfld.long 0x18 15. "BSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 14. "BSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
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bitfld.long 0x18 13. "BSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
bitfld.long 0x18 12. "BSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 11. "BSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 10. "BSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
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bitfld.long 0x18 9. "BSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
bitfld.long 0x18 8. "BSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
line.long 0x1C "GTCR,General PWM Timer Control Register"
hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select"
bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?"
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bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed"
line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register"
bitfld.long 0x20 27. "OBDTYR,GTIOCnB Output Value Selecting after Releasing 0%/100% Duty Setting" "0: The function selected by the GTIOB[3:2] bits is..,1: The function selected by the GTIOB[3:2] bits is.."
bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCnB Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x20 24.--25. "OBDTY,GTIOCnB Output Duty Setting" "0: GTIOCnB pin duty depends on the compare match,1: GTIOCnB pin duty depends on the compare match,?,?"
bitfld.long 0x20 19. "OADTYR,GTIOCnA Output Value Selecting after Releasing 0%/100% Duty Setting" "0: The function selected by the GTIOA[3:2] bits is..,1: The function selected by the GTIOA[3:2] bits is.."
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bitfld.long 0x20 18. "OADTYF,Forcible GTIOCnA Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
bitfld.long 0x20 16.--17. "OADTY,GTIOCnA Output Duty Setting" "0: GTIOCnA pin duty depends on the compare match,1: GTIOCnA pin duty depends on the compare match,?,?"
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bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Not forcibly set,1: Forcibly set"
bitfld.long 0x20 0. "UD,Count Direction Setting" "0: GTCNT counts down,1: GTCNT counts up"
line.long 0x24 "GTIOR,General PWM Timer I/O Control Register"
bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKD/1,1: PCLKD/4,?,?"
bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: The noise filter for the GTIOCnB pin is disabled,1: The noise filter for the GTIOCnB pin is enabled"
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bitfld.long 0x24 25.--26. "OBDF,GTIOCnB Pin Disable Value Setting" "0: None of the below options are specified,1: GTIOCnB pin is set to Hi-Z in response to..,?,?"
bitfld.long 0x24 24. "OBE,GTIOCnB Pin Output Enable" "0: Output is disabled,1: Output is enabled"
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bitfld.long 0x24 23. "OBHLD,GTIOCnB Pin Output Setting at the Start/Stop Count" "0: The GTIOCnB pin output level at the start/stop..,1: The GTIOCnB pin output level is retained at the.."
bitfld.long 0x24 22. "OBDFLT,GTIOCnB Pin Output Value Setting at the Count Stop" "0: The GTIOCnB pin outputs low when counting stops,1: The GTIOCnB pin outputs high when counting stops"
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hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCnB Pin Function Select"
bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKD/1,1: PCLKD/4,?,?"
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bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: The noise filter for the GTIOCnA pin is disabled,1: The noise filter for the GTIOCnA pin is enabled"
bitfld.long 0x24 9.--10. "OADF,GTIOCnA Pin Disable Value Setting" "0: None of the below options are specified,1: GTIOCnA pin is set to Hi-Z in response to..,?,?"
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bitfld.long 0x24 8. "OAE,GTIOCnA Pin Output Enable" "0: Output is disabled,1: Output is enabled"
bitfld.long 0x24 7. "OAHLD,GTIOCnA Pin Output Setting at the Start/Stop Count" "0: The GTIOCnA pin output level at the start or..,1: The GTIOCnA pin output level is retained at the.."
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bitfld.long 0x24 6. "OADFLT,GTIOCnA Pin Output Value Setting at the Count Stop" "0: The GTIOCnA pin outputs low when counting stops,1: The GTIOCnA pin outputs high when counting stops"
hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCnA Pin Function Select"
line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register"
bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Same time output level low disable request..,1: Same time output level low disable request enabled"
bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Same time output level high disable request..,1: Same time output level high disable request.."
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bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Group A output disable request is selected,1: Group B output disable request is selected,?,?"
line.long 0x2C "GTST,General PWM Timer Status Register"
bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred,1: A period count function finish has occurred"
rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Flag" "0: No simultaneous generation of 0 both for the..,1: A simultaneous generation of 0 both for the.."
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rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Flag" "0: No simultaneous generation of 1 both for the..,1: A simultaneous generation of 1 both for the.."
rbitfld.long 0x2C 28. "DTEF,Dead Time Error Flag" "0: No dead time error has occurred,1: A dead time error has occurred"
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rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated"
bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match (Down-Counting) A/D Conversion Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.."
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bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match (Up-Counting) A/D Conversion Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.."
bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match (Down-Counting) A/D Conversion Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.."
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bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match (Up-Counting) A/D Conversion Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.."
rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter counts downward,1: GTCNT counter counts upward"
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rbitfld.long 0x2C 8.--10. "ITCNT,GPTn_OVF/GPTn_UDF Interrupt Skipping Count Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) occurred,1: An underflow (trough) occurred"
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bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) occurred,1: An overflow (crest) occurred"
bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated"
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bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated"
bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated"
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bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated"
bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.."
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bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.."
line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register"
bitfld.long 0x30 30. "ADTDB,GTADTRB Register Double Buffer Operation" "0: Single buffer operation (GTADTBRB -> GTADTRB),1: Double buffer operation (GTADTDBRB -> GTADTRB)"
bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Register Buffer Transfer Timing Select" "0: In triangle wave no transfer. In saw-wave mode..,1: In triangle wave transfer at crest. In saw-wave..,?,?"
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bitfld.long 0x30 26. "ADTDA,GTADTRA Register Double Buffer Operation" "0: Single buffer operation (GTADTBRA -> GTADTRA),1: Double buffer operation (GTADTDBRA -> GTADTBRA.."
bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Register Buffer Transfer Timing Select" "0: In triangle wave no transfer. In saw-wave mode..,1: In triangle wave transfer at crest. In saw-wave..,?,?"
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bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer Operation" "0,1"
bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Double buffer operation (GTPDBR -> GTPBR -> GTPR),1: Single buffer operation (GTPBR -> GTPR),?,?"
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bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB <--> GTCCRE <-->..,1: Single buffer operation (GTCCRB <--> GTCCRE),?,?"
bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA <--> GTCCRD),1: Single buffer operation (GTCCRA <--> GTCCRC),?,?"
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bitfld.long 0x30 3. "BD3,GTDVU/GTDVD Registers Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
bitfld.long 0x30 2. "BD2,GTADTRA/GTADTRB Registers Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
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bitfld.long 0x30 1. "BD1,GTPR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
bitfld.long 0x30 0. "BD0,GTCCR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
line.long 0x34 "GTITC,General PWM Timer Interrupt and A/D Conversion Start Request Skipping Setting Register"
bitfld.long 0x34 14. "ADTBL,GTADTRB Register A/D Conversion Start Request Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 12. "ADTAL,GTADTRA Register A/D Conversion Start Request Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 8.--10. "IVTT,GPTn_OVF/GPTn_UDF Interrupt Skipping Count Select" "0: Skipping is not performed,1: Skipping count of 1,?,?,?,?,?,?"
bitfld.long 0x34 6.--7. "IVTC,GPTn_OVF/GPTn_UDF Interrupt Skipping Function Select" "0: Skipping is not performed,1: Both overflow and underflow for saw waves and..,?,?"
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bitfld.long 0x34 5. "ITLF,GTCCRF Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 4. "ITLE,GTCCRE Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 3. "ITLD,GTCCRD Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 2. "ITLC,GTCCRC Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 1. "ITLB,GTCCRB Register Compare Match/Input Capture Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 0. "ITLA,GTCCRA Register Compare Match/Input Capture Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
line.long 0x38 "GTCNT,General PWM Timer Counter"
line.long 0x3C "GTCCRA,General PWM Timer Compare Capture Register A"
line.long 0x40 "GTCCRB,General PWM Timer Compare Capture Register B"
line.long 0x44 "GTCCRC,General PWM Timer Compare Capture Register C"
line.long 0x48 "GTCCRE,General PWM Timer Compare Capture Register E"
line.long 0x4C "GTCCRD,General PWM Timer Compare Capture Register D"
line.long 0x50 "GTCCRF,General PWM Timer Compare Capture Register F"
line.long 0x54 "GTPR,General PWM Timer Cycle Setting Register"
line.long 0x58 "GTPBR,General PWM Timer Cycle Setting Buffer Register"
line.long 0x5C "GTPDBR,General PWM Timer Period Setting Double-Buffer Register"
line.long 0x60 "GTADTRA,A/D Conversion Start Request Timing Register A"
line.long 0x64 "GTADTBRA,A/D Conversion Start Request Timing Buffer Register A"
line.long 0x68 "GTADTDBRA,A/D Conversion Start Request Timing Double-Buffer Register A"
line.long 0x6C "GTADTRB,A/D Conversion Start Request Timing Register B"
line.long 0x70 "GTADTBRB,A/D Conversion Start Request Timing Buffer Register B"
line.long 0x74 "GTADTDBRB,A/D Conversion Start Request Timing Double-Buffer Register B"
line.long 0x78 "GTDTCR,General PWM Timer Dead Time Control Register"
bitfld.long 0x78 8. "TDFER,GTDVD Register Setting" "0: GTDVU and GTDVD registers are set separately.,1: The value written to GTDVU register is.."
bitfld.long 0x78 5. "TDBDE,GTDVD Register Buffer Operation Enable" "0: GTDVD register buffer operation is disabled,1: GTDVD register buffer operation is enabled"
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bitfld.long 0x78 4. "TDBUE,GTDVU Register Buffer Operation Enable" "0: GTDVU register buffer operation is disabled,1: GTDVU register buffer operation is enabled"
bitfld.long 0x78 0. "TDE,Negative-Phase Waveform Setting" "0: GTCCRB is set without using DTDVU and GTDVD,1: DTDVU and GTDVD are used to set the compare.."
line.long 0x7C "GTDVU,General PWM Timer Dead Time Value Register U"
line.long 0x80 "GTDVD,General PWM Timer Dead Time Value Register D"
line.long 0x84 "GTDBU,General PWM Timer Dead Time Buffer Register U"
line.long 0x88 "GTDBD,General PWM Timer Dead Time Buffer Register D"
rgroup.long 0x9C++0x3
line.long 0x0 "GTSOS,General PWM Timer Output Protection Function Status Register"
bitfld.long 0x0 0.--1. "SOS,Output Protection Function Status" "0: Normal operation,1: Protected state (GTCCRA = 0 is set during..,?,?"
group.long 0xA0++0x7
line.long 0x0 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register"
bitfld.long 0x0 0. "SOTR,Output Protection Function Temporary Release" "0: Protected state is not released,1: Protected state is released"
line.long 0x4 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register"
bitfld.long 0x4 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.."
bitfld.long 0x4 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?"
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bitfld.long 0x4 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.."
bitfld.long 0x4 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?"
group.long 0xB8++0x7
line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register"
hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select"
bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?"
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hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select"
bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?"
line.long 0x4 "GTPC,General PWM Timer Period Count Register"
hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter"
bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled,1: Automatic stop function is enabled"
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bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled,1: Period count function is enabled"
group.long 0xD0++0x7
line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"
bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
newline
bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register"
bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously"
bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously"
newline
bitfld.long 0x4 11. "SBDDD,GTDV Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTDV buffer..,1: Disable GTDV register buffer operations.."
bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.."
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bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.."
bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.."
newline
bitfld.long 0x4 3. "SBDDE,GTDV Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTDV buffer..,1: Enable GTDV register buffer operations.."
bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.."
newline
bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.."
bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.."
tree.end
tree "GPT16E1 (General PWM 16-bit Timer 1)"
base ad:0x40169100
group.long 0x0++0xB
line.long 0x0 "GTWP,General PWM Timer Write-Protection Register"
hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code"
bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled"
newline
bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
newline
bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
bitfld.long 0x0 0. "WP,Register Write Disable" "0: Write to the register enabled,1: Write to the register disabled"
line.long 0x4 "GTSTR,General PWM Timer Software Start Register"
bitfld.long 0x4 5. "CSTRT5,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
bitfld.long 0x4 4. "CSTRT4,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
newline
bitfld.long 0x4 1. "CSTRT1,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
bitfld.long 0x4 0. "CSTRT0,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
line.long 0x8 "GTSTP,General PWM Timer Software Stop Register"
bitfld.long 0x8 5. "CSTOP5,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
bitfld.long 0x8 4. "CSTOP4,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
newline
bitfld.long 0x8 1. "CSTOP1,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
bitfld.long 0x8 0. "CSTOP0,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
wgroup.long 0xC++0x3
line.long 0x0 "GTCLR,General PWM Timer Software Clear Register"
bitfld.long 0x0 5. "CCLR5,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
bitfld.long 0x0 4. "CCLR4,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
newline
bitfld.long 0x0 1. "CCLR1,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
bitfld.long 0x0 0. "CCLR0,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
group.long 0x10++0x8B
line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register"
bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Counter start disabled by the GTSTR register,1: Counter start enabled by the GTSTR register"
bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTH input,1: Counter start enabled at the ELC_GPTH input"
newline
bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTG input,1: Counter start enabled at the ELC_GPTG input"
bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTF input,1: Counter start enabled at the ELC_GPTF input"
newline
bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTE input,1: Counter start enabled at the ELC_GPTE input"
bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTD input,1: Counter start enabled at the ELC_GPTD input"
newline
bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTC input,1: Counter start enabled at the ELC_GPTC input"
bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTB input,1: Counter start enabled at the ELC_GPTB input"
newline
bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTA input,1: Counter start enabled at the ELC_GPTA input"
bitfld.long 0x0 15. "SSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 14. "SSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
bitfld.long 0x0 13. "SSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
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bitfld.long 0x0 12. "SSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 11. "SSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 10. "SSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
bitfld.long 0x0 9. "SSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
newline
bitfld.long 0x0 8. "SSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
newline
bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register"
bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Counter stop disabled by the GTSTP register,1: Counter stop enabled by the GTSTP register"
bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTH input,1: Counter stop enabled at the ELC_GPTH input"
newline
bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTG input,1: Counter stop enabled at the ELC_GPTG input"
bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTF input,1: Counter stop enabled at the ELC_GPTF input"
newline
bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTE input,1: Counter stop enabled at the ELC_GPTE input"
bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTD input,1: Counter stop enabled at the ELC_GPTD input"
newline
bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTC input,1: Counter stop enabled at the ELC_GPTC input"
bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTB input,1: Counter stop enabled at the ELC_GPTB input"
newline
bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTA input,1: Counter stop enabled at the ELC_GPTA input"
bitfld.long 0x4 15. "PSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 14. "PSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
bitfld.long 0x4 13. "PSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
newline
bitfld.long 0x4 12. "PSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 11. "PSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 10. "PSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
bitfld.long 0x4 9. "PSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
newline
bitfld.long 0x4 8. "PSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
newline
bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register"
bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Counter clear disabled by the GTCLR register,1: Counter clear enabled by the GTCLR register"
bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTH input,1: Counter clear enabled at the ELC_GPTH input"
newline
bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTG input,1: Counter clear enabled at the ELC_GPTG input"
bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTF input,1: Counter clear enabled at the ELC_GPTF input"
newline
bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTE input,1: Counter clear enabled at the ELC_GPTE input"
bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTD input,1: Counter clear enabled at the ELC_GPTD input"
newline
bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTC input,1: Counter clear enabled at the ELC_GPTC input"
bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTB input,1: Counter clear enabled at the ELC_GPTB input"
newline
bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTA input,1: Counter clear enabled at the ELC_GPTA input"
bitfld.long 0x8 15. "CSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 14. "CSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
bitfld.long 0x8 13. "CSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
newline
bitfld.long 0x8 12. "CSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
bitfld.long 0x8 11. "CSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 10. "CSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
bitfld.long 0x8 9. "CSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
newline
bitfld.long 0x8 8. "CSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
newline
bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register"
bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTH input,1: Counter count up enabled at the ELC_GPTH input"
bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTG input,1: Counter count up enabled at the ELC_GPTG input"
newline
bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTF input,1: Counter count up enabled at the ELC_GPTF input"
bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTE input,1: Counter count up enabled at the ELC_GPTE input"
newline
bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTD input,1: Counter count up enabled at the ELC_GPTD input"
bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTC input,1: Counter count up enabled at the ELC_GPTC input"
newline
bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTB input,1: Counter count up enabled at the ELC_GPTB input"
bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTA input,1: Counter count up enabled at the ELC_GPTA input"
newline
bitfld.long 0xC 15. "USCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 14. "USCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
newline
bitfld.long 0xC 13. "USCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
bitfld.long 0xC 12. "USCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 11. "USCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 10. "USCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
newline
bitfld.long 0xC 9. "USCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
bitfld.long 0xC 8. "USCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
newline
bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register"
bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTH input,1: Counter count down enabled at the ELC_GPTH input"
bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTG input,1: Counter count down enabled at the ELC_GPTG input"
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bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTF input,1: Counter count down enabled at the ELC_GPTF input"
bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTE input,1: Counter count down enabled at the ELC_GPTE input"
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bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTD input,1: Counter count down enabled at the ELC_GPTD input"
bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTC input,1: Counter count down enabled at the ELC_GPTC input"
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bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTB input,1: Counter count down enabled at the ELC_GPTB input"
bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTA input,1: Counter count down enabled at the ELC_GPTA input"
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bitfld.long 0x10 15. "DSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 14. "DSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
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bitfld.long 0x10 13. "DSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
bitfld.long 0x10 12. "DSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 11. "DSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 10. "DSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
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bitfld.long 0x10 9. "DSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
bitfld.long 0x10 8. "DSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A"
bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTH..,1: GTCCRA input capture enabled at the ELC_GPTH input"
bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTG..,1: GTCCRA input capture enabled at the ELC_GPTG input"
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bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTF..,1: GTCCRA input capture enabled at the ELC_GPTF input"
bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTE..,1: GTCCRA input capture enabled at the ELC_GPTE input"
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bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTD..,1: GTCCRA input capture enabled at the ELC_GPTD input"
bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTC..,1: GTCCRA input capture enabled at the ELC_GPTC input"
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bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTB..,1: GTCCRA input capture enabled at the ELC_GPTB input"
bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTA..,1: GTCCRA input capture enabled at the ELC_GPTA input"
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bitfld.long 0x14 15. "ASCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 14. "ASCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
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bitfld.long 0x14 13. "ASCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
bitfld.long 0x14 12. "ASCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 11. "ASCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 10. "ASCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
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bitfld.long 0x14 9. "ASCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
bitfld.long 0x14 8. "ASCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B"
bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTH..,1: GTCCRB input capture enabled at the ELC_GPTH input"
bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTG..,1: GTCCRB input capture enabled at the ELC_GPTG input"
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bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTF..,1: GTCCRB input capture enabled at the ELC_GPTF input"
bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTE..,1: GTCCRB input capture enabled at the ELC_GPTE input"
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bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTD..,1: GTCCRB input capture enabled at the ELC_GPTD input"
bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTC..,1: GTCCRB input capture enabled at the ELC_GPTC input"
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bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTB..,1: GTCCRB input capture enabled at the ELC_GPTB input"
bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTA..,1: GTCCRB input capture enabled at the ELC_GPTA input"
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bitfld.long 0x18 15. "BSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 14. "BSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
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bitfld.long 0x18 13. "BSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
bitfld.long 0x18 12. "BSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 11. "BSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 10. "BSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
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bitfld.long 0x18 9. "BSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
bitfld.long 0x18 8. "BSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
line.long 0x1C "GTCR,General PWM Timer Control Register"
hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select"
bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?"
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bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed"
line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register"
bitfld.long 0x20 27. "OBDTYR,GTIOCnB Output Value Selecting after Releasing 0%/100% Duty Setting" "0: The function selected by the GTIOB[3:2] bits is..,1: The function selected by the GTIOB[3:2] bits is.."
bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCnB Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x20 24.--25. "OBDTY,GTIOCnB Output Duty Setting" "0: GTIOCnB pin duty depends on the compare match,1: GTIOCnB pin duty depends on the compare match,?,?"
bitfld.long 0x20 19. "OADTYR,GTIOCnA Output Value Selecting after Releasing 0%/100% Duty Setting" "0: The function selected by the GTIOA[3:2] bits is..,1: The function selected by the GTIOA[3:2] bits is.."
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bitfld.long 0x20 18. "OADTYF,Forcible GTIOCnA Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
bitfld.long 0x20 16.--17. "OADTY,GTIOCnA Output Duty Setting" "0: GTIOCnA pin duty depends on the compare match,1: GTIOCnA pin duty depends on the compare match,?,?"
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bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Not forcibly set,1: Forcibly set"
bitfld.long 0x20 0. "UD,Count Direction Setting" "0: GTCNT counts down,1: GTCNT counts up"
line.long 0x24 "GTIOR,General PWM Timer I/O Control Register"
bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKD/1,1: PCLKD/4,?,?"
bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: The noise filter for the GTIOCnB pin is disabled,1: The noise filter for the GTIOCnB pin is enabled"
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bitfld.long 0x24 25.--26. "OBDF,GTIOCnB Pin Disable Value Setting" "0: None of the below options are specified,1: GTIOCnB pin is set to Hi-Z in response to..,?,?"
bitfld.long 0x24 24. "OBE,GTIOCnB Pin Output Enable" "0: Output is disabled,1: Output is enabled"
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bitfld.long 0x24 23. "OBHLD,GTIOCnB Pin Output Setting at the Start/Stop Count" "0: The GTIOCnB pin output level at the start/stop..,1: The GTIOCnB pin output level is retained at the.."
bitfld.long 0x24 22. "OBDFLT,GTIOCnB Pin Output Value Setting at the Count Stop" "0: The GTIOCnB pin outputs low when counting stops,1: The GTIOCnB pin outputs high when counting stops"
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hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCnB Pin Function Select"
bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKD/1,1: PCLKD/4,?,?"
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bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: The noise filter for the GTIOCnA pin is disabled,1: The noise filter for the GTIOCnA pin is enabled"
bitfld.long 0x24 9.--10. "OADF,GTIOCnA Pin Disable Value Setting" "0: None of the below options are specified,1: GTIOCnA pin is set to Hi-Z in response to..,?,?"
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bitfld.long 0x24 8. "OAE,GTIOCnA Pin Output Enable" "0: Output is disabled,1: Output is enabled"
bitfld.long 0x24 7. "OAHLD,GTIOCnA Pin Output Setting at the Start/Stop Count" "0: The GTIOCnA pin output level at the start or..,1: The GTIOCnA pin output level is retained at the.."
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bitfld.long 0x24 6. "OADFLT,GTIOCnA Pin Output Value Setting at the Count Stop" "0: The GTIOCnA pin outputs low when counting stops,1: The GTIOCnA pin outputs high when counting stops"
hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCnA Pin Function Select"
line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register"
bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Same time output level low disable request..,1: Same time output level low disable request enabled"
bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Same time output level high disable request..,1: Same time output level high disable request.."
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bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Group A output disable request is selected,1: Group B output disable request is selected,?,?"
line.long 0x2C "GTST,General PWM Timer Status Register"
bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred,1: A period count function finish has occurred"
rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Flag" "0: No simultaneous generation of 0 both for the..,1: A simultaneous generation of 0 both for the.."
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rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Flag" "0: No simultaneous generation of 1 both for the..,1: A simultaneous generation of 1 both for the.."
rbitfld.long 0x2C 28. "DTEF,Dead Time Error Flag" "0: No dead time error has occurred,1: A dead time error has occurred"
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rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated"
bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match (Down-Counting) A/D Conversion Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.."
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bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match (Up-Counting) A/D Conversion Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.."
bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match (Down-Counting) A/D Conversion Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.."
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bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match (Up-Counting) A/D Conversion Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.."
rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter counts downward,1: GTCNT counter counts upward"
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rbitfld.long 0x2C 8.--10. "ITCNT,GPTn_OVF/GPTn_UDF Interrupt Skipping Count Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) occurred,1: An underflow (trough) occurred"
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bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) occurred,1: An overflow (crest) occurred"
bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated"
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bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated"
bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated"
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bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated"
bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.."
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bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.."
line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register"
bitfld.long 0x30 30. "ADTDB,GTADTRB Register Double Buffer Operation" "0: Single buffer operation (GTADTBRB -> GTADTRB),1: Double buffer operation (GTADTDBRB -> GTADTRB)"
bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Register Buffer Transfer Timing Select" "0: In triangle wave no transfer. In saw-wave mode..,1: In triangle wave transfer at crest. In saw-wave..,?,?"
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bitfld.long 0x30 26. "ADTDA,GTADTRA Register Double Buffer Operation" "0: Single buffer operation (GTADTBRA -> GTADTRA),1: Double buffer operation (GTADTDBRA -> GTADTBRA.."
bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Register Buffer Transfer Timing Select" "0: In triangle wave no transfer. In saw-wave mode..,1: In triangle wave transfer at crest. In saw-wave..,?,?"
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bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer Operation" "0,1"
bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Double buffer operation (GTPDBR -> GTPBR -> GTPR),1: Single buffer operation (GTPBR -> GTPR),?,?"
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bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB <--> GTCCRE <-->..,1: Single buffer operation (GTCCRB <--> GTCCRE),?,?"
bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA <--> GTCCRD),1: Single buffer operation (GTCCRA <--> GTCCRC),?,?"
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bitfld.long 0x30 3. "BD3,GTDVU/GTDVD Registers Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
bitfld.long 0x30 2. "BD2,GTADTRA/GTADTRB Registers Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
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bitfld.long 0x30 1. "BD1,GTPR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
bitfld.long 0x30 0. "BD0,GTCCR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
line.long 0x34 "GTITC,General PWM Timer Interrupt and A/D Conversion Start Request Skipping Setting Register"
bitfld.long 0x34 14. "ADTBL,GTADTRB Register A/D Conversion Start Request Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 12. "ADTAL,GTADTRA Register A/D Conversion Start Request Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 8.--10. "IVTT,GPTn_OVF/GPTn_UDF Interrupt Skipping Count Select" "0: Skipping is not performed,1: Skipping count of 1,?,?,?,?,?,?"
bitfld.long 0x34 6.--7. "IVTC,GPTn_OVF/GPTn_UDF Interrupt Skipping Function Select" "0: Skipping is not performed,1: Both overflow and underflow for saw waves and..,?,?"
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bitfld.long 0x34 5. "ITLF,GTCCRF Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 4. "ITLE,GTCCRE Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 3. "ITLD,GTCCRD Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 2. "ITLC,GTCCRC Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 1. "ITLB,GTCCRB Register Compare Match/Input Capture Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 0. "ITLA,GTCCRA Register Compare Match/Input Capture Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
line.long 0x38 "GTCNT,General PWM Timer Counter"
line.long 0x3C "GTCCRA,General PWM Timer Compare Capture Register A"
line.long 0x40 "GTCCRB,General PWM Timer Compare Capture Register B"
line.long 0x44 "GTCCRC,General PWM Timer Compare Capture Register C"
line.long 0x48 "GTCCRE,General PWM Timer Compare Capture Register E"
line.long 0x4C "GTCCRD,General PWM Timer Compare Capture Register D"
line.long 0x50 "GTCCRF,General PWM Timer Compare Capture Register F"
line.long 0x54 "GTPR,General PWM Timer Cycle Setting Register"
line.long 0x58 "GTPBR,General PWM Timer Cycle Setting Buffer Register"
line.long 0x5C "GTPDBR,General PWM Timer Period Setting Double-Buffer Register"
line.long 0x60 "GTADTRA,A/D Conversion Start Request Timing Register A"
line.long 0x64 "GTADTBRA,A/D Conversion Start Request Timing Buffer Register A"
line.long 0x68 "GTADTDBRA,A/D Conversion Start Request Timing Double-Buffer Register A"
line.long 0x6C "GTADTRB,A/D Conversion Start Request Timing Register B"
line.long 0x70 "GTADTBRB,A/D Conversion Start Request Timing Buffer Register B"
line.long 0x74 "GTADTDBRB,A/D Conversion Start Request Timing Double-Buffer Register B"
line.long 0x78 "GTDTCR,General PWM Timer Dead Time Control Register"
bitfld.long 0x78 8. "TDFER,GTDVD Register Setting" "0: GTDVU and GTDVD registers are set separately.,1: The value written to GTDVU register is.."
bitfld.long 0x78 5. "TDBDE,GTDVD Register Buffer Operation Enable" "0: GTDVD register buffer operation is disabled,1: GTDVD register buffer operation is enabled"
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bitfld.long 0x78 4. "TDBUE,GTDVU Register Buffer Operation Enable" "0: GTDVU register buffer operation is disabled,1: GTDVU register buffer operation is enabled"
bitfld.long 0x78 0. "TDE,Negative-Phase Waveform Setting" "0: GTCCRB is set without using DTDVU and GTDVD,1: DTDVU and GTDVD are used to set the compare.."
line.long 0x7C "GTDVU,General PWM Timer Dead Time Value Register U"
line.long 0x80 "GTDVD,General PWM Timer Dead Time Value Register D"
line.long 0x84 "GTDBU,General PWM Timer Dead Time Buffer Register U"
line.long 0x88 "GTDBD,General PWM Timer Dead Time Buffer Register D"
rgroup.long 0x9C++0x3
line.long 0x0 "GTSOS,General PWM Timer Output Protection Function Status Register"
bitfld.long 0x0 0.--1. "SOS,Output Protection Function Status" "0: Normal operation,1: Protected state (GTCCRA = 0 is set during..,?,?"
group.long 0xA0++0x7
line.long 0x0 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register"
bitfld.long 0x0 0. "SOTR,Output Protection Function Temporary Release" "0: Protected state is not released,1: Protected state is released"
line.long 0x4 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register"
bitfld.long 0x4 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.."
bitfld.long 0x4 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?"
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bitfld.long 0x4 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.."
bitfld.long 0x4 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?"
group.long 0xB8++0x7
line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register"
hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select"
bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?"
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hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select"
bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?"
line.long 0x4 "GTPC,General PWM Timer Period Count Register"
hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter"
bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled,1: Automatic stop function is enabled"
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bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled,1: Period count function is enabled"
group.long 0xD0++0x7
line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"
bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
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bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register"
bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously"
bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously"
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bitfld.long 0x4 11. "SBDDD,GTDV Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTDV buffer..,1: Disable GTDV register buffer operations.."
bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.."
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bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.."
bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.."
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bitfld.long 0x4 3. "SBDDE,GTDV Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTDV buffer..,1: Enable GTDV register buffer operations.."
bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.."
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bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.."
bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.."
tree.end
tree "GPT16E4 (General PWM 16-bit Timer 4)"
base ad:0x40169400
group.long 0x0++0xB
line.long 0x0 "GTWP,General PWM Timer Write-Protection Register"
hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code"
bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled"
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bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
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bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
bitfld.long 0x0 0. "WP,Register Write Disable" "0: Write to the register enabled,1: Write to the register disabled"
line.long 0x4 "GTSTR,General PWM Timer Software Start Register"
bitfld.long 0x4 5. "CSTRT5,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
bitfld.long 0x4 4. "CSTRT4,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
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bitfld.long 0x4 1. "CSTRT1,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
bitfld.long 0x4 0. "CSTRT0,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
line.long 0x8 "GTSTP,General PWM Timer Software Stop Register"
bitfld.long 0x8 5. "CSTOP5,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
bitfld.long 0x8 4. "CSTOP4,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
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bitfld.long 0x8 1. "CSTOP1,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
bitfld.long 0x8 0. "CSTOP0,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
wgroup.long 0xC++0x3
line.long 0x0 "GTCLR,General PWM Timer Software Clear Register"
bitfld.long 0x0 5. "CCLR5,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
bitfld.long 0x0 4. "CCLR4,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
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bitfld.long 0x0 1. "CCLR1,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
bitfld.long 0x0 0. "CCLR0,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
group.long 0x10++0x8B
line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register"
bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Counter start disabled by the GTSTR register,1: Counter start enabled by the GTSTR register"
bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTH input,1: Counter start enabled at the ELC_GPTH input"
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bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTG input,1: Counter start enabled at the ELC_GPTG input"
bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTF input,1: Counter start enabled at the ELC_GPTF input"
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bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTE input,1: Counter start enabled at the ELC_GPTE input"
bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTD input,1: Counter start enabled at the ELC_GPTD input"
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bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTC input,1: Counter start enabled at the ELC_GPTC input"
bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTB input,1: Counter start enabled at the ELC_GPTB input"
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bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTA input,1: Counter start enabled at the ELC_GPTA input"
bitfld.long 0x0 15. "SSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 14. "SSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
bitfld.long 0x0 13. "SSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
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bitfld.long 0x0 12. "SSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 11. "SSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 10. "SSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
bitfld.long 0x0 9. "SSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
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bitfld.long 0x0 8. "SSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register"
bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Counter stop disabled by the GTSTP register,1: Counter stop enabled by the GTSTP register"
bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTH input,1: Counter stop enabled at the ELC_GPTH input"
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bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTG input,1: Counter stop enabled at the ELC_GPTG input"
bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTF input,1: Counter stop enabled at the ELC_GPTF input"
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bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTE input,1: Counter stop enabled at the ELC_GPTE input"
bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTD input,1: Counter stop enabled at the ELC_GPTD input"
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bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTC input,1: Counter stop enabled at the ELC_GPTC input"
bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTB input,1: Counter stop enabled at the ELC_GPTB input"
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bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTA input,1: Counter stop enabled at the ELC_GPTA input"
bitfld.long 0x4 15. "PSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 14. "PSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
bitfld.long 0x4 13. "PSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
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bitfld.long 0x4 12. "PSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 11. "PSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 10. "PSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
bitfld.long 0x4 9. "PSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
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bitfld.long 0x4 8. "PSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register"
bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Counter clear disabled by the GTCLR register,1: Counter clear enabled by the GTCLR register"
bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTH input,1: Counter clear enabled at the ELC_GPTH input"
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bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTG input,1: Counter clear enabled at the ELC_GPTG input"
bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTF input,1: Counter clear enabled at the ELC_GPTF input"
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bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTE input,1: Counter clear enabled at the ELC_GPTE input"
bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTD input,1: Counter clear enabled at the ELC_GPTD input"
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bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTC input,1: Counter clear enabled at the ELC_GPTC input"
bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTB input,1: Counter clear enabled at the ELC_GPTB input"
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bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTA input,1: Counter clear enabled at the ELC_GPTA input"
bitfld.long 0x8 15. "CSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 14. "CSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
bitfld.long 0x8 13. "CSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
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bitfld.long 0x8 12. "CSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
bitfld.long 0x8 11. "CSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 10. "CSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
bitfld.long 0x8 9. "CSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
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bitfld.long 0x8 8. "CSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register"
bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTH input,1: Counter count up enabled at the ELC_GPTH input"
bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTG input,1: Counter count up enabled at the ELC_GPTG input"
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bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTF input,1: Counter count up enabled at the ELC_GPTF input"
bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTE input,1: Counter count up enabled at the ELC_GPTE input"
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bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTD input,1: Counter count up enabled at the ELC_GPTD input"
bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTC input,1: Counter count up enabled at the ELC_GPTC input"
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bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTB input,1: Counter count up enabled at the ELC_GPTB input"
bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTA input,1: Counter count up enabled at the ELC_GPTA input"
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bitfld.long 0xC 15. "USCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 14. "USCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
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bitfld.long 0xC 13. "USCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
bitfld.long 0xC 12. "USCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 11. "USCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 10. "USCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
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bitfld.long 0xC 9. "USCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
bitfld.long 0xC 8. "USCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register"
bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTH input,1: Counter count down enabled at the ELC_GPTH input"
bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTG input,1: Counter count down enabled at the ELC_GPTG input"
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bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTF input,1: Counter count down enabled at the ELC_GPTF input"
bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTE input,1: Counter count down enabled at the ELC_GPTE input"
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bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTD input,1: Counter count down enabled at the ELC_GPTD input"
bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTC input,1: Counter count down enabled at the ELC_GPTC input"
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bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTB input,1: Counter count down enabled at the ELC_GPTB input"
bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTA input,1: Counter count down enabled at the ELC_GPTA input"
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bitfld.long 0x10 15. "DSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 14. "DSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
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bitfld.long 0x10 13. "DSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
bitfld.long 0x10 12. "DSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 11. "DSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 10. "DSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
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bitfld.long 0x10 9. "DSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
bitfld.long 0x10 8. "DSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
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bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A"
bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTH..,1: GTCCRA input capture enabled at the ELC_GPTH input"
bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTG..,1: GTCCRA input capture enabled at the ELC_GPTG input"
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bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTF..,1: GTCCRA input capture enabled at the ELC_GPTF input"
bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTE..,1: GTCCRA input capture enabled at the ELC_GPTE input"
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bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTD..,1: GTCCRA input capture enabled at the ELC_GPTD input"
bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTC..,1: GTCCRA input capture enabled at the ELC_GPTC input"
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bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTB..,1: GTCCRA input capture enabled at the ELC_GPTB input"
bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTA..,1: GTCCRA input capture enabled at the ELC_GPTA input"
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bitfld.long 0x14 15. "ASCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 14. "ASCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
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bitfld.long 0x14 13. "ASCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
bitfld.long 0x14 12. "ASCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 11. "ASCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 10. "ASCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
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bitfld.long 0x14 9. "ASCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
bitfld.long 0x14 8. "ASCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
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bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B"
bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTH..,1: GTCCRB input capture enabled at the ELC_GPTH input"
bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTG..,1: GTCCRB input capture enabled at the ELC_GPTG input"
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bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTF..,1: GTCCRB input capture enabled at the ELC_GPTF input"
bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTE..,1: GTCCRB input capture enabled at the ELC_GPTE input"
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bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTD..,1: GTCCRB input capture enabled at the ELC_GPTD input"
bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTC..,1: GTCCRB input capture enabled at the ELC_GPTC input"
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bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTB..,1: GTCCRB input capture enabled at the ELC_GPTB input"
bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTA..,1: GTCCRB input capture enabled at the ELC_GPTA input"
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bitfld.long 0x18 15. "BSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 14. "BSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
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bitfld.long 0x18 13. "BSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
bitfld.long 0x18 12. "BSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 11. "BSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 10. "BSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
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bitfld.long 0x18 9. "BSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
bitfld.long 0x18 8. "BSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
line.long 0x1C "GTCR,General PWM Timer Control Register"
hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select"
bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?"
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bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed"
line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register"
bitfld.long 0x20 27. "OBDTYR,GTIOCnB Output Value Selecting after Releasing 0%/100% Duty Setting" "0: The function selected by the GTIOB[3:2] bits is..,1: The function selected by the GTIOB[3:2] bits is.."
bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCnB Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x20 24.--25. "OBDTY,GTIOCnB Output Duty Setting" "0: GTIOCnB pin duty depends on the compare match,1: GTIOCnB pin duty depends on the compare match,?,?"
bitfld.long 0x20 19. "OADTYR,GTIOCnA Output Value Selecting after Releasing 0%/100% Duty Setting" "0: The function selected by the GTIOA[3:2] bits is..,1: The function selected by the GTIOA[3:2] bits is.."
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bitfld.long 0x20 18. "OADTYF,Forcible GTIOCnA Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
bitfld.long 0x20 16.--17. "OADTY,GTIOCnA Output Duty Setting" "0: GTIOCnA pin duty depends on the compare match,1: GTIOCnA pin duty depends on the compare match,?,?"
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bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Not forcibly set,1: Forcibly set"
bitfld.long 0x20 0. "UD,Count Direction Setting" "0: GTCNT counts down,1: GTCNT counts up"
line.long 0x24 "GTIOR,General PWM Timer I/O Control Register"
bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKD/1,1: PCLKD/4,?,?"
bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: The noise filter for the GTIOCnB pin is disabled,1: The noise filter for the GTIOCnB pin is enabled"
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bitfld.long 0x24 25.--26. "OBDF,GTIOCnB Pin Disable Value Setting" "0: None of the below options are specified,1: GTIOCnB pin is set to Hi-Z in response to..,?,?"
bitfld.long 0x24 24. "OBE,GTIOCnB Pin Output Enable" "0: Output is disabled,1: Output is enabled"
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bitfld.long 0x24 23. "OBHLD,GTIOCnB Pin Output Setting at the Start/Stop Count" "0: The GTIOCnB pin output level at the start/stop..,1: The GTIOCnB pin output level is retained at the.."
bitfld.long 0x24 22. "OBDFLT,GTIOCnB Pin Output Value Setting at the Count Stop" "0: The GTIOCnB pin outputs low when counting stops,1: The GTIOCnB pin outputs high when counting stops"
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hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCnB Pin Function Select"
bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKD/1,1: PCLKD/4,?,?"
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bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: The noise filter for the GTIOCnA pin is disabled,1: The noise filter for the GTIOCnA pin is enabled"
bitfld.long 0x24 9.--10. "OADF,GTIOCnA Pin Disable Value Setting" "0: None of the below options are specified,1: GTIOCnA pin is set to Hi-Z in response to..,?,?"
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bitfld.long 0x24 8. "OAE,GTIOCnA Pin Output Enable" "0: Output is disabled,1: Output is enabled"
bitfld.long 0x24 7. "OAHLD,GTIOCnA Pin Output Setting at the Start/Stop Count" "0: The GTIOCnA pin output level at the start or..,1: The GTIOCnA pin output level is retained at the.."
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bitfld.long 0x24 6. "OADFLT,GTIOCnA Pin Output Value Setting at the Count Stop" "0: The GTIOCnA pin outputs low when counting stops,1: The GTIOCnA pin outputs high when counting stops"
hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCnA Pin Function Select"
line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register"
bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Same time output level low disable request..,1: Same time output level low disable request enabled"
bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Same time output level high disable request..,1: Same time output level high disable request.."
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bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Group A output disable request is selected,1: Group B output disable request is selected,?,?"
line.long 0x2C "GTST,General PWM Timer Status Register"
bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred,1: A period count function finish has occurred"
rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Flag" "0: No simultaneous generation of 0 both for the..,1: A simultaneous generation of 0 both for the.."
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rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Flag" "0: No simultaneous generation of 1 both for the..,1: A simultaneous generation of 1 both for the.."
rbitfld.long 0x2C 28. "DTEF,Dead Time Error Flag" "0: No dead time error has occurred,1: A dead time error has occurred"
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rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated"
bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match (Down-Counting) A/D Conversion Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.."
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bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match (Up-Counting) A/D Conversion Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.."
bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match (Down-Counting) A/D Conversion Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.."
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bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match (Up-Counting) A/D Conversion Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.."
rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter counts downward,1: GTCNT counter counts upward"
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rbitfld.long 0x2C 8.--10. "ITCNT,GPTn_OVF/GPTn_UDF Interrupt Skipping Count Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) occurred,1: An underflow (trough) occurred"
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bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) occurred,1: An overflow (crest) occurred"
bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated"
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bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated"
bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated"
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bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated"
bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.."
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bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.."
line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register"
bitfld.long 0x30 30. "ADTDB,GTADTRB Register Double Buffer Operation" "0: Single buffer operation (GTADTBRB -> GTADTRB),1: Double buffer operation (GTADTDBRB -> GTADTRB)"
bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Register Buffer Transfer Timing Select" "0: In triangle wave no transfer. In saw-wave mode..,1: In triangle wave transfer at crest. In saw-wave..,?,?"
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bitfld.long 0x30 26. "ADTDA,GTADTRA Register Double Buffer Operation" "0: Single buffer operation (GTADTBRA -> GTADTRA),1: Double buffer operation (GTADTDBRA -> GTADTBRA.."
bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Register Buffer Transfer Timing Select" "0: In triangle wave no transfer. In saw-wave mode..,1: In triangle wave transfer at crest. In saw-wave..,?,?"
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bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer Operation" "0,1"
bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Double buffer operation (GTPDBR -> GTPBR -> GTPR),1: Single buffer operation (GTPBR -> GTPR),?,?"
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bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB <--> GTCCRE <-->..,1: Single buffer operation (GTCCRB <--> GTCCRE),?,?"
bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA <--> GTCCRD),1: Single buffer operation (GTCCRA <--> GTCCRC),?,?"
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bitfld.long 0x30 3. "BD3,GTDVU/GTDVD Registers Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
bitfld.long 0x30 2. "BD2,GTADTRA/GTADTRB Registers Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
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bitfld.long 0x30 1. "BD1,GTPR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
bitfld.long 0x30 0. "BD0,GTCCR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
line.long 0x34 "GTITC,General PWM Timer Interrupt and A/D Conversion Start Request Skipping Setting Register"
bitfld.long 0x34 14. "ADTBL,GTADTRB Register A/D Conversion Start Request Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 12. "ADTAL,GTADTRA Register A/D Conversion Start Request Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 8.--10. "IVTT,GPTn_OVF/GPTn_UDF Interrupt Skipping Count Select" "0: Skipping is not performed,1: Skipping count of 1,?,?,?,?,?,?"
bitfld.long 0x34 6.--7. "IVTC,GPTn_OVF/GPTn_UDF Interrupt Skipping Function Select" "0: Skipping is not performed,1: Both overflow and underflow for saw waves and..,?,?"
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bitfld.long 0x34 5. "ITLF,GTCCRF Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 4. "ITLE,GTCCRE Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 3. "ITLD,GTCCRD Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 2. "ITLC,GTCCRC Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 1. "ITLB,GTCCRB Register Compare Match/Input Capture Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 0. "ITLA,GTCCRA Register Compare Match/Input Capture Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
line.long 0x38 "GTCNT,General PWM Timer Counter"
line.long 0x3C "GTCCRA,General PWM Timer Compare Capture Register A"
line.long 0x40 "GTCCRB,General PWM Timer Compare Capture Register B"
line.long 0x44 "GTCCRC,General PWM Timer Compare Capture Register C"
line.long 0x48 "GTCCRE,General PWM Timer Compare Capture Register E"
line.long 0x4C "GTCCRD,General PWM Timer Compare Capture Register D"
line.long 0x50 "GTCCRF,General PWM Timer Compare Capture Register F"
line.long 0x54 "GTPR,General PWM Timer Cycle Setting Register"
line.long 0x58 "GTPBR,General PWM Timer Cycle Setting Buffer Register"
line.long 0x5C "GTPDBR,General PWM Timer Period Setting Double-Buffer Register"
line.long 0x60 "GTADTRA,A/D Conversion Start Request Timing Register A"
line.long 0x64 "GTADTBRA,A/D Conversion Start Request Timing Buffer Register A"
line.long 0x68 "GTADTDBRA,A/D Conversion Start Request Timing Double-Buffer Register A"
line.long 0x6C "GTADTRB,A/D Conversion Start Request Timing Register B"
line.long 0x70 "GTADTBRB,A/D Conversion Start Request Timing Buffer Register B"
line.long 0x74 "GTADTDBRB,A/D Conversion Start Request Timing Double-Buffer Register B"
line.long 0x78 "GTDTCR,General PWM Timer Dead Time Control Register"
bitfld.long 0x78 8. "TDFER,GTDVD Register Setting" "0: GTDVU and GTDVD registers are set separately.,1: The value written to GTDVU register is.."
bitfld.long 0x78 5. "TDBDE,GTDVD Register Buffer Operation Enable" "0: GTDVD register buffer operation is disabled,1: GTDVD register buffer operation is enabled"
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bitfld.long 0x78 4. "TDBUE,GTDVU Register Buffer Operation Enable" "0: GTDVU register buffer operation is disabled,1: GTDVU register buffer operation is enabled"
bitfld.long 0x78 0. "TDE,Negative-Phase Waveform Setting" "0: GTCCRB is set without using DTDVU and GTDVD,1: DTDVU and GTDVD are used to set the compare.."
line.long 0x7C "GTDVU,General PWM Timer Dead Time Value Register U"
line.long 0x80 "GTDVD,General PWM Timer Dead Time Value Register D"
line.long 0x84 "GTDBU,General PWM Timer Dead Time Buffer Register U"
line.long 0x88 "GTDBD,General PWM Timer Dead Time Buffer Register D"
rgroup.long 0x9C++0x3
line.long 0x0 "GTSOS,General PWM Timer Output Protection Function Status Register"
bitfld.long 0x0 0.--1. "SOS,Output Protection Function Status" "0: Normal operation,1: Protected state (GTCCRA = 0 is set during..,?,?"
group.long 0xA0++0x7
line.long 0x0 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register"
bitfld.long 0x0 0. "SOTR,Output Protection Function Temporary Release" "0: Protected state is not released,1: Protected state is released"
line.long 0x4 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register"
bitfld.long 0x4 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.."
bitfld.long 0x4 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?"
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bitfld.long 0x4 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.."
bitfld.long 0x4 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?"
group.long 0xB8++0x7
line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register"
hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select"
bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?"
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hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select"
bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?"
line.long 0x4 "GTPC,General PWM Timer Period Count Register"
hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter"
bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled,1: Automatic stop function is enabled"
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bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled,1: Period count function is enabled"
group.long 0xD0++0x7
line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"
bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
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bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register"
bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously"
bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously"
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bitfld.long 0x4 11. "SBDDD,GTDV Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTDV buffer..,1: Disable GTDV register buffer operations.."
bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.."
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bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.."
bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.."
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bitfld.long 0x4 3. "SBDDE,GTDV Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTDV buffer..,1: Enable GTDV register buffer operations.."
bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.."
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bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.."
bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.."
tree.end
tree "GPT16E5 (General PWM 16-bit Timer 5)"
base ad:0x40169500
group.long 0x0++0xB
line.long 0x0 "GTWP,General PWM Timer Write-Protection Register"
hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code"
bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled"
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bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
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bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disable" "0: Write to the bit is enabled,1: Write to the bit is disabled"
bitfld.long 0x0 0. "WP,Register Write Disable" "0: Write to the register enabled,1: Write to the register disabled"
line.long 0x4 "GTSTR,General PWM Timer Software Start Register"
bitfld.long 0x4 5. "CSTRT5,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
bitfld.long 0x4 4. "CSTRT4,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
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bitfld.long 0x4 1. "CSTRT1,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
bitfld.long 0x4 0. "CSTRT0,Channel n GTCNT Count Start (n : the same as bit position value)" "0: GTCNT counter not start,1: GTCNT counter start"
line.long 0x8 "GTSTP,General PWM Timer Software Stop Register"
bitfld.long 0x8 5. "CSTOP5,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
bitfld.long 0x8 4. "CSTOP4,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
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bitfld.long 0x8 1. "CSTOP1,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
bitfld.long 0x8 0. "CSTOP0,Channel n GTCNT Count Stop (n : the same as bit position value)" "0: GTCNT counter not stop,1: GTCNT counter stop"
wgroup.long 0xC++0x3
line.long 0x0 "GTCLR,General PWM Timer Software Clear Register"
bitfld.long 0x0 5. "CCLR5,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
bitfld.long 0x0 4. "CCLR4,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
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bitfld.long 0x0 1. "CCLR1,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
bitfld.long 0x0 0. "CCLR0,Channel n GTCNT Count Clear (n : the same as bit position value)" "0: GTCNT counter is not cleared,1: GTCNT counter is cleared"
group.long 0x10++0x8B
line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register"
bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Counter start disabled by the GTSTR register,1: Counter start enabled by the GTSTR register"
bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTH input,1: Counter start enabled at the ELC_GPTH input"
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bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTG input,1: Counter start enabled at the ELC_GPTG input"
bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTF input,1: Counter start enabled at the ELC_GPTF input"
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bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTE input,1: Counter start enabled at the ELC_GPTE input"
bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTD input,1: Counter start enabled at the ELC_GPTD input"
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bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTC input,1: Counter start enabled at the ELC_GPTC input"
bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTB input,1: Counter start enabled at the ELC_GPTB input"
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bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Counter start disabled at the ELC_GPTA input,1: Counter start enabled at the ELC_GPTA input"
bitfld.long 0x0 15. "SSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 14. "SSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
bitfld.long 0x0 13. "SSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
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bitfld.long 0x0 12. "SSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 11. "SSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 10. "SSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
bitfld.long 0x0 9. "SSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
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bitfld.long 0x0 8. "SSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Counter start disabled on the falling edge of..,1: Counter start enabled on the falling edge of.."
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bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Counter start disabled on the rising edge of..,1: Counter start enabled on the rising edge of.."
line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register"
bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Counter stop disabled by the GTSTP register,1: Counter stop enabled by the GTSTP register"
bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTH input,1: Counter stop enabled at the ELC_GPTH input"
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bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTG input,1: Counter stop enabled at the ELC_GPTG input"
bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTF input,1: Counter stop enabled at the ELC_GPTF input"
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bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTE input,1: Counter stop enabled at the ELC_GPTE input"
bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTD input,1: Counter stop enabled at the ELC_GPTD input"
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bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTC input,1: Counter stop enabled at the ELC_GPTC input"
bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTB input,1: Counter stop enabled at the ELC_GPTB input"
newline
bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Counter stop disabled at the ELC_GPTA input,1: Counter stop enabled at the ELC_GPTA input"
bitfld.long 0x4 15. "PSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 14. "PSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
bitfld.long 0x4 13. "PSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
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bitfld.long 0x4 12. "PSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 11. "PSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 10. "PSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
bitfld.long 0x4 9. "PSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
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bitfld.long 0x4 8. "PSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Counter stop disabled on the falling edge of..,1: Counter stop enabled on the falling edge of.."
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bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Counter stop disabled on the rising edge of..,1: Counter stop enabled on the rising edge of.."
line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register"
bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Counter clear disabled by the GTCLR register,1: Counter clear enabled by the GTCLR register"
bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTH input,1: Counter clear enabled at the ELC_GPTH input"
newline
bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTG input,1: Counter clear enabled at the ELC_GPTG input"
bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTF input,1: Counter clear enabled at the ELC_GPTF input"
newline
bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTE input,1: Counter clear enabled at the ELC_GPTE input"
bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTD input,1: Counter clear enabled at the ELC_GPTD input"
newline
bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTC input,1: Counter clear enabled at the ELC_GPTC input"
bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTB input,1: Counter clear enabled at the ELC_GPTB input"
newline
bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Counter clear disabled at the ELC_GPTA input,1: Counter clear enabled at the ELC_GPTA input"
bitfld.long 0x8 15. "CSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 14. "CSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
bitfld.long 0x8 13. "CSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
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bitfld.long 0x8 12. "CSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
bitfld.long 0x8 11. "CSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 10. "CSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
bitfld.long 0x8 9. "CSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
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bitfld.long 0x8 8. "CSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.."
bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Counter clear disabled on the falling edge of..,1: Counter clear enabled on the falling edge of.."
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bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Counter clear disabled on the rising edge of..,1: Counter clear enabled on the rising edge of.."
line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register"
bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTH input,1: Counter count up enabled at the ELC_GPTH input"
bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTG input,1: Counter count up enabled at the ELC_GPTG input"
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bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTF input,1: Counter count up enabled at the ELC_GPTF input"
bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTE input,1: Counter count up enabled at the ELC_GPTE input"
newline
bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTD input,1: Counter count up enabled at the ELC_GPTD input"
bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTC input,1: Counter count up enabled at the ELC_GPTC input"
newline
bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTB input,1: Counter count up enabled at the ELC_GPTB input"
bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Counter count up disabled at the ELC_GPTA input,1: Counter count up enabled at the ELC_GPTA input"
newline
bitfld.long 0xC 15. "USCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 14. "USCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
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bitfld.long 0xC 13. "USCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
bitfld.long 0xC 12. "USCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 11. "USCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 10. "USCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
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bitfld.long 0xC 9. "USCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
bitfld.long 0xC 8. "USCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
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bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Counter count up disabled on the falling edge of..,1: Counter count up enabled on the falling edge of.."
bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Counter count up disabled on the rising edge of..,1: Counter count up enabled on the rising edge of.."
line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register"
bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTH input,1: Counter count down enabled at the ELC_GPTH input"
bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTG input,1: Counter count down enabled at the ELC_GPTG input"
newline
bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTF input,1: Counter count down enabled at the ELC_GPTF input"
bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTE input,1: Counter count down enabled at the ELC_GPTE input"
newline
bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTD input,1: Counter count down enabled at the ELC_GPTD input"
bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTC input,1: Counter count down enabled at the ELC_GPTC input"
newline
bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTB input,1: Counter count down enabled at the ELC_GPTB input"
bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Counter count down disabled at the ELC_GPTA input,1: Counter count down enabled at the ELC_GPTA input"
newline
bitfld.long 0x10 15. "DSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 14. "DSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
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bitfld.long 0x10 13. "DSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
bitfld.long 0x10 12. "DSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 11. "DSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 10. "DSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
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bitfld.long 0x10 9. "DSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
bitfld.long 0x10 8. "DSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
newline
bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Counter count down disabled on the falling edge..,1: Counter count down enabled on the falling edge.."
bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Counter count down disabled on the rising edge..,1: Counter count down enabled on the rising edge of.."
line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A"
bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTH..,1: GTCCRA input capture enabled at the ELC_GPTH input"
bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTG..,1: GTCCRA input capture enabled at the ELC_GPTG input"
newline
bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTF..,1: GTCCRA input capture enabled at the ELC_GPTF input"
bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTE..,1: GTCCRA input capture enabled at the ELC_GPTE input"
newline
bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTD..,1: GTCCRA input capture enabled at the ELC_GPTD input"
bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTC..,1: GTCCRA input capture enabled at the ELC_GPTC input"
newline
bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTB..,1: GTCCRA input capture enabled at the ELC_GPTB input"
bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled at the ELC_GPTA..,1: GTCCRA input capture enabled at the ELC_GPTA input"
newline
bitfld.long 0x14 15. "ASCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 14. "ASCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
newline
bitfld.long 0x14 13. "ASCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
bitfld.long 0x14 12. "ASCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
newline
bitfld.long 0x14 11. "ASCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 10. "ASCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
newline
bitfld.long 0x14 9. "ASCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
bitfld.long 0x14 8. "ASCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
newline
bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
newline
bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
newline
bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
newline
bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the falling..,1: GTCCRA input capture enabled on the falling edge.."
bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture disabled on the rising edge..,1: GTCCRA input capture enabled on the rising edge.."
line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B"
bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTH..,1: GTCCRB input capture enabled at the ELC_GPTH input"
bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTG..,1: GTCCRB input capture enabled at the ELC_GPTG input"
newline
bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTF..,1: GTCCRB input capture enabled at the ELC_GPTF input"
bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTE..,1: GTCCRB input capture enabled at the ELC_GPTE input"
newline
bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTD..,1: GTCCRB input capture enabled at the ELC_GPTD input"
bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTC..,1: GTCCRB input capture enabled at the ELC_GPTC input"
newline
bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTB..,1: GTCCRB input capture enabled at the ELC_GPTB input"
bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled at the ELC_GPTA..,1: GTCCRB input capture enabled at the ELC_GPTA input"
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bitfld.long 0x18 15. "BSCBFAH,GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 14. "BSCBFAL,GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
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bitfld.long 0x18 13. "BSCBRAH,GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
bitfld.long 0x18 12. "BSCBRAL,GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 11. "BSCAFBH,GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 10. "BSCAFBL,GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
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bitfld.long 0x18 9. "BSCARBH,GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
bitfld.long 0x18 8. "BSCARBL,GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
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bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the falling..,1: GTCCRB input capture enabled on the falling edge.."
bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture disabled on the rising edge..,1: GTCCRB input capture enabled on the rising edge.."
line.long 0x1C "GTCR,General PWM Timer Control Register"
hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select"
bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?"
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bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed"
line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register"
bitfld.long 0x20 27. "OBDTYR,GTIOCnB Output Value Selecting after Releasing 0%/100% Duty Setting" "0: The function selected by the GTIOB[3:2] bits is..,1: The function selected by the GTIOB[3:2] bits is.."
bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCnB Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x20 24.--25. "OBDTY,GTIOCnB Output Duty Setting" "0: GTIOCnB pin duty depends on the compare match,1: GTIOCnB pin duty depends on the compare match,?,?"
bitfld.long 0x20 19. "OADTYR,GTIOCnA Output Value Selecting after Releasing 0%/100% Duty Setting" "0: The function selected by the GTIOA[3:2] bits is..,1: The function selected by the GTIOA[3:2] bits is.."
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bitfld.long 0x20 18. "OADTYF,Forcible GTIOCnA Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
bitfld.long 0x20 16.--17. "OADTY,GTIOCnA Output Duty Setting" "0: GTIOCnA pin duty depends on the compare match,1: GTIOCnA pin duty depends on the compare match,?,?"
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bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Not forcibly set,1: Forcibly set"
bitfld.long 0x20 0. "UD,Count Direction Setting" "0: GTCNT counts down,1: GTCNT counts up"
line.long 0x24 "GTIOR,General PWM Timer I/O Control Register"
bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKD/1,1: PCLKD/4,?,?"
bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: The noise filter for the GTIOCnB pin is disabled,1: The noise filter for the GTIOCnB pin is enabled"
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bitfld.long 0x24 25.--26. "OBDF,GTIOCnB Pin Disable Value Setting" "0: None of the below options are specified,1: GTIOCnB pin is set to Hi-Z in response to..,?,?"
bitfld.long 0x24 24. "OBE,GTIOCnB Pin Output Enable" "0: Output is disabled,1: Output is enabled"
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bitfld.long 0x24 23. "OBHLD,GTIOCnB Pin Output Setting at the Start/Stop Count" "0: The GTIOCnB pin output level at the start/stop..,1: The GTIOCnB pin output level is retained at the.."
bitfld.long 0x24 22. "OBDFLT,GTIOCnB Pin Output Value Setting at the Count Stop" "0: The GTIOCnB pin outputs low when counting stops,1: The GTIOCnB pin outputs high when counting stops"
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hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCnB Pin Function Select"
bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKD/1,1: PCLKD/4,?,?"
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bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: The noise filter for the GTIOCnA pin is disabled,1: The noise filter for the GTIOCnA pin is enabled"
bitfld.long 0x24 9.--10. "OADF,GTIOCnA Pin Disable Value Setting" "0: None of the below options are specified,1: GTIOCnA pin is set to Hi-Z in response to..,?,?"
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bitfld.long 0x24 8. "OAE,GTIOCnA Pin Output Enable" "0: Output is disabled,1: Output is enabled"
bitfld.long 0x24 7. "OAHLD,GTIOCnA Pin Output Setting at the Start/Stop Count" "0: The GTIOCnA pin output level at the start or..,1: The GTIOCnA pin output level is retained at the.."
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bitfld.long 0x24 6. "OADFLT,GTIOCnA Pin Output Value Setting at the Count Stop" "0: The GTIOCnA pin outputs low when counting stops,1: The GTIOCnA pin outputs high when counting stops"
hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCnA Pin Function Select"
line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register"
bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Same time output level low disable request..,1: Same time output level low disable request enabled"
bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Same time output level high disable request..,1: Same time output level high disable request.."
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bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Group A output disable request is selected,1: Group B output disable request is selected,?,?"
line.long 0x2C "GTST,General PWM Timer Status Register"
bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred,1: A period count function finish has occurred"
rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Flag" "0: No simultaneous generation of 0 both for the..,1: A simultaneous generation of 0 both for the.."
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rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Flag" "0: No simultaneous generation of 1 both for the..,1: A simultaneous generation of 1 both for the.."
rbitfld.long 0x2C 28. "DTEF,Dead Time Error Flag" "0: No dead time error has occurred,1: A dead time error has occurred"
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rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated"
bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match (Down-Counting) A/D Conversion Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.."
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bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match (Up-Counting) A/D Conversion Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.."
bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match (Down-Counting) A/D Conversion Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.."
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bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match (Up-Counting) A/D Conversion Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.."
rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter counts downward,1: GTCNT counter counts upward"
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rbitfld.long 0x2C 8.--10. "ITCNT,GPTn_OVF/GPTn_UDF Interrupt Skipping Count Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) occurred,1: An underflow (trough) occurred"
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bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) occurred,1: An overflow (crest) occurred"
bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated"
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bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated"
bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated"
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bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated"
bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.."
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bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.."
line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register"
bitfld.long 0x30 30. "ADTDB,GTADTRB Register Double Buffer Operation" "0: Single buffer operation (GTADTBRB -> GTADTRB),1: Double buffer operation (GTADTDBRB -> GTADTRB)"
bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Register Buffer Transfer Timing Select" "0: In triangle wave no transfer. In saw-wave mode..,1: In triangle wave transfer at crest. In saw-wave..,?,?"
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bitfld.long 0x30 26. "ADTDA,GTADTRA Register Double Buffer Operation" "0: Single buffer operation (GTADTBRA -> GTADTRA),1: Double buffer operation (GTADTDBRA -> GTADTBRA.."
bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Register Buffer Transfer Timing Select" "0: In triangle wave no transfer. In saw-wave mode..,1: In triangle wave transfer at crest. In saw-wave..,?,?"
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bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer Operation" "0,1"
bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Double buffer operation (GTPDBR -> GTPBR -> GTPR),1: Single buffer operation (GTPBR -> GTPR),?,?"
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bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB <--> GTCCRE <-->..,1: Single buffer operation (GTCCRB <--> GTCCRE),?,?"
bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA <--> GTCCRD),1: Single buffer operation (GTCCRA <--> GTCCRC),?,?"
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bitfld.long 0x30 3. "BD3,GTDVU/GTDVD Registers Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
bitfld.long 0x30 2. "BD2,GTADTRA/GTADTRB Registers Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
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bitfld.long 0x30 1. "BD1,GTPR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
bitfld.long 0x30 0. "BD0,GTCCR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled"
line.long 0x34 "GTITC,General PWM Timer Interrupt and A/D Conversion Start Request Skipping Setting Register"
bitfld.long 0x34 14. "ADTBL,GTADTRB Register A/D Conversion Start Request Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 12. "ADTAL,GTADTRA Register A/D Conversion Start Request Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 8.--10. "IVTT,GPTn_OVF/GPTn_UDF Interrupt Skipping Count Select" "0: Skipping is not performed,1: Skipping count of 1,?,?,?,?,?,?"
bitfld.long 0x34 6.--7. "IVTC,GPTn_OVF/GPTn_UDF Interrupt Skipping Function Select" "0: Skipping is not performed,1: Both overflow and underflow for saw waves and..,?,?"
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bitfld.long 0x34 5. "ITLF,GTCCRF Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 4. "ITLE,GTCCRE Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 3. "ITLD,GTCCRD Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 2. "ITLC,GTCCRC Register Compare Match Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
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bitfld.long 0x34 1. "ITLB,GTCCRB Register Compare Match/Input Capture Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
bitfld.long 0x34 0. "ITLA,GTCCRA Register Compare Match/Input Capture Interrupt Link" "0: Not linked with GPTn_OVF/GPTn_UDF interrupt..,1: Linked with GPTn_OVF/GPTn_UDF interrupt skipping.."
line.long 0x38 "GTCNT,General PWM Timer Counter"
line.long 0x3C "GTCCRA,General PWM Timer Compare Capture Register A"
line.long 0x40 "GTCCRB,General PWM Timer Compare Capture Register B"
line.long 0x44 "GTCCRC,General PWM Timer Compare Capture Register C"
line.long 0x48 "GTCCRE,General PWM Timer Compare Capture Register E"
line.long 0x4C "GTCCRD,General PWM Timer Compare Capture Register D"
line.long 0x50 "GTCCRF,General PWM Timer Compare Capture Register F"
line.long 0x54 "GTPR,General PWM Timer Cycle Setting Register"
line.long 0x58 "GTPBR,General PWM Timer Cycle Setting Buffer Register"
line.long 0x5C "GTPDBR,General PWM Timer Period Setting Double-Buffer Register"
line.long 0x60 "GTADTRA,A/D Conversion Start Request Timing Register A"
line.long 0x64 "GTADTBRA,A/D Conversion Start Request Timing Buffer Register A"
line.long 0x68 "GTADTDBRA,A/D Conversion Start Request Timing Double-Buffer Register A"
line.long 0x6C "GTADTRB,A/D Conversion Start Request Timing Register B"
line.long 0x70 "GTADTBRB,A/D Conversion Start Request Timing Buffer Register B"
line.long 0x74 "GTADTDBRB,A/D Conversion Start Request Timing Double-Buffer Register B"
line.long 0x78 "GTDTCR,General PWM Timer Dead Time Control Register"
bitfld.long 0x78 8. "TDFER,GTDVD Register Setting" "0: GTDVU and GTDVD registers are set separately.,1: The value written to GTDVU register is.."
bitfld.long 0x78 5. "TDBDE,GTDVD Register Buffer Operation Enable" "0: GTDVD register buffer operation is disabled,1: GTDVD register buffer operation is enabled"
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bitfld.long 0x78 4. "TDBUE,GTDVU Register Buffer Operation Enable" "0: GTDVU register buffer operation is disabled,1: GTDVU register buffer operation is enabled"
bitfld.long 0x78 0. "TDE,Negative-Phase Waveform Setting" "0: GTCCRB is set without using DTDVU and GTDVD,1: DTDVU and GTDVD are used to set the compare.."
line.long 0x7C "GTDVU,General PWM Timer Dead Time Value Register U"
line.long 0x80 "GTDVD,General PWM Timer Dead Time Value Register D"
line.long 0x84 "GTDBU,General PWM Timer Dead Time Buffer Register U"
line.long 0x88 "GTDBD,General PWM Timer Dead Time Buffer Register D"
rgroup.long 0x9C++0x3
line.long 0x0 "GTSOS,General PWM Timer Output Protection Function Status Register"
bitfld.long 0x0 0.--1. "SOS,Output Protection Function Status" "0: Normal operation,1: Protected state (GTCCRA = 0 is set during..,?,?"
group.long 0xA0++0x7
line.long 0x0 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register"
bitfld.long 0x0 0. "SOTR,Output Protection Function Temporary Release" "0: Protected state is not released,1: Protected state is released"
line.long 0x4 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register"
bitfld.long 0x4 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.."
bitfld.long 0x4 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?"
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bitfld.long 0x4 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.."
bitfld.long 0x4 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?"
group.long 0xB8++0x7
line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register"
hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select"
bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?"
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hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select"
bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?"
line.long 0x4 "GTPC,General PWM Timer Period Count Register"
hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter"
bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled,1: Automatic stop function is enabled"
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bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled,1: Period count function is enabled"
group.long 0xD0++0x7
line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"
bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
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bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable Bit Simultaneous Control Channel Select" "0: Disable simultaneous control,1: Enable simultaneous control"
line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register"
bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously"
bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously"
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bitfld.long 0x4 11. "SBDDD,GTDV Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTDV buffer..,1: Disable GTDV register buffer operations.."
bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.."
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bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.."
bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.."
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bitfld.long 0x4 3. "SBDDE,GTDV Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTDV buffer..,1: Enable GTDV register buffer operations.."
bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.."
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bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.."
bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.."
tree.end
tree "GPT_OPS (Output Phase Switching Controller)"
base ad:0x40169A00
group.long 0x0++0x3
line.long 0x0 "OPSCR,Output Phase Switching Control Register"
bitfld.long 0x0 30.--31. "NFCS,External Input Noise Filter Clock Selection" "0: PCLKD/1,1: PCLKD/4,?,?"
bitfld.long 0x0 29. "NFEN,External Input Noise Filter Enable" "0: Do not use a noise filter on the external input,1: Use a noise filter on the external input"
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bitfld.long 0x0 26. "GODF,Group Output Disable Function" "0: This bit function is ignored,1: Group disable clears the OPSCR.EN bit"
bitfld.long 0x0 24.--25. "GRP,Output Disabled Source Selection" "0,1,2,3"
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bitfld.long 0x0 21. "ALIGN,Input Phase Alignment" "0: Input phase aligned to PCLKD,1: Input phase aligned to the falling edge of PWM"
bitfld.long 0x0 20. "RV,Output Phase Rotation Direction Reversal Control" "0: Positive rotation,1: Reverse rotation"
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bitfld.long 0x0 19. "INV,Output Phase Invert Control" "0: Positive logic (active-high) output,1: Negative logic (active-low) output"
bitfld.long 0x0 18. "N,Negative-Phase Output (N) Control" "0: Level signal output,1: PWM signal output"
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bitfld.long 0x0 17. "P,Positive-Phase Output (P) Control" "0: Level signal output,1: PWM signal output"
bitfld.long 0x0 16. "FB,External Feedback Signal Enable" "0: Select the external input,1: Select the soft setting (OPSCR.UF VF WF)"
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bitfld.long 0x0 8. "EN,Output Phase Enable" "0: Do not output (Hi-Z external pin),1: Output"
rbitfld.long 0x0 6. "W,Input W-Phase Monitor" "0,1"
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rbitfld.long 0x0 5. "V,Input V-Phase Monitor" "0,1"
rbitfld.long 0x0 4. "U,Input U-Phase Monitor" "0,1"
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bitfld.long 0x0 2. "WF," "0,1"
bitfld.long 0x0 1. "VF," "0,1"
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bitfld.long 0x0 0. "UF," "0,1"
tree.end
tree.end
tree "I3C (I3C Bus Interface)"
base ad:0x4011F000
group.long 0x0++0x3
line.long 0x0 "PRTS,Protocol Selection Register"
bitfld.long 0x0 0. "PRTMD,Protocol Mode" "0: I3C protocol mode,1: I2C protocol mode"
group.long 0x10++0xB
line.long 0x0 "CECTL,Clock Enable Control Resisters"
bitfld.long 0x0 0. "CLKE,Clock Enable" "0: Clock disable,1: Clock enable"
line.long 0x4 "BCTL,Bus Control Register"
bitfld.long 0x4 31. "BUSE,Bus Enable" "0: I3C bus operation is disabled.,1: I3C bus operation is enabled."
bitfld.long 0x4 30. "RSM,Resume" "0: I3C is running.,1: I3C is suspended."
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bitfld.long 0x4 29. "ABT,Abort" "0: I3C is running.,1: I3C has aborted a transfer."
bitfld.long 0x4 0. "INCBA,Include I3C Broadcast Address" "0: Do not include I3C broadcast address for private..,1: Include I3C broadcast address for private.."
line.long 0x8 "MSDVAD,Master Device Address Register"
bitfld.long 0x8 31. "MDYADV,Master Dynamic Address Valid" "0: The master dynamic address field is not valid.,1: The master dynamic address field is valid."
hexmask.long.byte 0x8 16.--22. 1. "MDYAD,Master Dynamic Address"
group.long 0x20++0x7
line.long 0x0 "RSTCTL,Reset Control Register"
bitfld.long 0x0 16. "INTLRST,Internal Software Reset" "0: Releases of some registers and internal state.,1: Resets of some registers and internal state."
bitfld.long 0x0 12. "HRDBRST,High Priority Receive Data Buffer Software Reset" "0: The High Priority Receive Queues in I3C is not..,1: The High Priority Receive Queues in I3C is.."
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bitfld.long 0x0 11. "HTDBRST,High Priority Transmit Data Buffer Software Reset" "0: The High Priority Transmit Queues in I3C is not..,1: The High Priority Transmit Queues in I3C is.."
bitfld.long 0x0 10. "HRSPQRST,High Priority Response Queue Software Reset" "0: The High Priority Response Queues in I3C is not..,1: The High Priority Response Queues in I3C is.."
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bitfld.long 0x0 9. "HCMDQRST,High Priority Command Queue Software Reset" "0: The High Priority Command Queues in I3C is not..,1: The High Priority Command Queues in I3C is.."
bitfld.long 0x0 6. "RSQRST,Receive Status Queue Software Reset" "0: The Receive Status Queue in I3C is not flushed.,1: The Receive Status Queue in I3C is flushed."
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bitfld.long 0x0 5. "IBIQRST,IBI Queue Software Reset" "0: The IBI Queues in I3C is not flushed.,1: The IBI Queues in I3C is flushed."
bitfld.long 0x0 4. "RDBRST,Receive Data Buffer Software Reset" "0: The Receive Queues in I3C is not flushed.,1: The Receive Queues in I3C is flushed."
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bitfld.long 0x0 3. "TDBRST,Transmit Data Buffer Software Reset" "0: The Transmit Queues in I3C is not flushed.,1: The Transmit Queues in I3C is flushed."
bitfld.long 0x0 2. "RSPQRST,Response Queue Software Reset" "0: The Response Queues in I3C is not flushed.,1: The Response Queues in I3C is flushed."
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bitfld.long 0x0 1. "CMDQRST,Command Queue Software Reset" "0: The Command Queues in I3C is not flushed.,1: The Command Queues in I3C is flushed."
bitfld.long 0x0 0. "RI3CRST,I3C Software Reset" "0: Release I3C reset.,1: Initiate I3C reset."
line.long 0x4 "PRSST,Present State Register"
bitfld.long 0x4 7. "PRSSTWP,Present State Write Protect" "0: CRMS bit is protected.,1: CRMS bit can be written when writing.."
rbitfld.long 0x4 4. "TRMD,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode"
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bitfld.long 0x4 2. "CRMS,Current Master" "0: The Master is not the Current Master and must..,1: The Master is the Current Master and as a result.."
group.long 0x30++0xB
line.long 0x0 "INST,Internal Status Register"
bitfld.long 0x0 10. "INEF,Internal Error Flag" "0: I3C Internal Error has not detected.,1: I3C Internal Error has detected."
line.long 0x4 "INSTE,Internal Status Enable Register"
bitfld.long 0x4 10. "INEE,Internal Error Enable" "0: Disable INST.INEF,1: Enable INST.INEF"
line.long 0x8 "INIE,Internal Interrupt Enable Register"
bitfld.long 0x8 10. "INEIE,Internal Error Interrupt Enable" "0: Disables Non-recoverable Internal Error..,1: Enables Non-recoverable Internal Error Interrupt.."
wgroup.long 0x3C++0x3
line.long 0x0 "INSTFC,Internal Status Force Register"
bitfld.long 0x0 10. "INEFC,Internal Error Force" "0: Not force a specific interrupt,1: Force a specific interrupt"
rgroup.long 0x44++0x3
line.long 0x0 "DVCT,Device Characteristic Table Register"
hexmask.long.byte 0x0 19.--23. 1. "IDX,DCT Table Index"
group.long 0x58++0x3
line.long 0x0 "IBINCTL,IBI Notify Control Register"
bitfld.long 0x0 3. "NRSIRCTL,Notify Rejected Slave Interrupt Request Control" "0: Do not pass rejected IBI Status to the IBI..,1: Pass rejected IBI Status to the IBI Queue/Rings.."
bitfld.long 0x0 1. "NRMRCTL,Notify Rejected Master Request Control" "0: Do not pass rejected IBI Status to IBI..,1: Pass rejected IBI Status to the IBI Queue if the.."
group.long 0x60++0x7
line.long 0x0 "BFCTL,Bus Function Control Register"
bitfld.long 0x0 15. "HSME,High Speed Mode Enable" "0: Disable High Speed Mode.,1: Enable High Speed Mode."
bitfld.long 0x0 14. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit uses for the..,1: An Fm+ slope control circuit uses for the.."
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bitfld.long 0x0 12. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus select.,1: The SMBus select."
bitfld.long 0x0 8. "SCSYNE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit uses.,1: An SCL synchronous circuit uses."
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bitfld.long 0x0 2. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection disables.,1: Slave arbitration-lost detection enables."
bitfld.long 0x0 1. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.."
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bitfld.long 0x0 0. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection disables.,1: Master arbitration-lost detection enables."
line.long 0x4 "SVCTL,Slave Control Register"
bitfld.long 0x4 16.--18. "SVAE,Slave Address Enable n ( n = 0 to 2 )" "0: Slave n disables,1: Slave n enables,?,?,?,?,?,?"
bitfld.long 0x4 15. "HOAE,Host Address Enable" "0: Host address detection disables.,1: Host address detection enables."
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bitfld.long 0x4 6. "DVIDE,Device-ID Address Enable" "0: Device-ID address detection disables.,1: Device-ID address detection enables."
bitfld.long 0x4 5. "HSMCE,Hs-mode Master Code Enable" "0: Hs-mode Master Code Detection disables.,1: Hs-mode Master Code Detection enables."
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bitfld.long 0x4 0. "GCAE,General Call Address Enable" "0: General call address detection disables.,1: General call address detection enables."
group.long 0x70++0x23
line.long 0x0 "REFCKCTL,Reference Clock Control Register"
bitfld.long 0x0 0.--2. "IREFCKS,Internal Reference Clock Selection" "0: TCLK/1 clock,1: TCLK/2 clock,?,?,?,?,?,?"
line.long 0x4 "STDBR,Standard Bit Rate Register"
bitfld.long 0x4 31. "DSBRPO,Double the Standard Bit Rate Period for Open-Drain" "0: The time period set for SBRHO[7:0] and..,1: The time period set for SBRHO[7:0] and.."
hexmask.long.byte 0x4 24.--29. 1. "SBRHP,Standard Bit Rate High-level Period Push-Pull"
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hexmask.long.byte 0x4 16.--21. 1. "SBRLP,Standard Bit Rate Low-level Period Push-Pull"
hexmask.long.byte 0x4 8.--15. 1. "SBRHO,Standard Bit Rate High-level Period Open-Drain"
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hexmask.long.byte 0x4 0.--7. 1. "SBRLO,Standard Bit Rate Low-level Period Open-Drain"
line.long 0x8 "EXTBR,Extended Bit Rate Register"
hexmask.long.byte 0x8 24.--29. 1. "EBRHP,Extended Bit Rate High-level Period Push-Pull"
hexmask.long.byte 0x8 16.--21. 1. "EBRLP,Extended Bit Rate Low-level Period Push-Pull"
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hexmask.long.byte 0x8 8.--15. 1. "EBRHO,Extended Bit Rate High-level Period Open-Drain"
hexmask.long.byte 0x8 0.--7. 1. "EBRLO,Extended Bit Rate Low-level Period Open-Drain"
line.long 0xC "BFRECDT,Bus Free Condition Detection Time Register"
hexmask.long.word 0xC 0.--8. 1. "FRECYC,Bus Free Condition Detection Cycle"
line.long 0x10 "BAVLCDT,Bus Available Condition Detection Time Register"
hexmask.long.word 0x10 0.--8. 1. "AVLCYC,Bus Available Condition Detection Cycle"
line.long 0x14 "BIDLCDT,Bus Idle Condition Detection Time Register"
hexmask.long.tbyte 0x14 0.--17. 1. "IDLCYC,Bus Idle Condition Detection Cycle"
line.long 0x18 "OUTCTL,Output Control Register"
bitfld.long 0x18 15. "SDODCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (I3C fi) is selected..,1: The internal reference clock divided by 2.."
bitfld.long 0x18 8.--10. "SDOD,SDA Output Delay" "0: No output delay,1: 1 I3C fi cycle (When OUTCTL.SDODCS = 0 (I3C fi)) 1..,?,?,?,?,?,?"
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bitfld.long 0x18 4. "EXCYC,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle..,1: Outputs an extra SCL clock cycle."
bitfld.long 0x18 2. "SOCWP,SCL/SDA Output Control Write Protect" "0: Bits SCOC and SDOC are protected.,1: Bits SCOC and SDOC can be written (When writing.."
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bitfld.long 0x18 1. "SCOC,SCL Output Control" "0: I3C drives the I3C_SCL pin low.,1: I3C releases the I3C_SCL pin."
bitfld.long 0x18 0. "SDOC,SDA Output Control" "0: I3C drives the I3C_SDA pin low.,1: I3C releases the I3C_SDA pin."
line.long 0x1C "INCTL,Input Control Register"
bitfld.long 0x1C 4. "DNFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used."
hexmask.long.byte 0x1C 0.--3. 1. "DNFS,Digital Noise Filter Stage Selection"
line.long 0x20 "TMOCTL,Timeout Control Register"
bitfld.long 0x20 6.--7. "TOMDS,Timeout Operation Mode Selection" "0: Timeout is detected during the following..,1: Timeout is detected while the bus is busy.,?,?"
bitfld.long 0x20 5. "TOHCTL,Timeout H Count Control" "0: Count is disabled while the I3C_SCL line is at a..,1: Count is enabled while the I3C_SCL line is at a.."
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bitfld.long 0x20 4. "TOLCTL,Timeout L Count Control" "0: Count is disabled while the I3C_SCL line is at a..,1: Count is enabled while the I3C_SCL line is at a.."
bitfld.long 0x20 0.--1. "TODTS,Timeout Detection Time Selection" "0: 16bit-timeout,1: 14bit-timeout,?,?"
group.long 0x98++0x3
line.long 0x0 "WUCTL,Wake Up Unit Control Register"
bitfld.long 0x0 7. "WUFE,Wake-Up function Enable" "0: Wake-up function disables,1: Wake-up function enables"
bitfld.long 0x0 6. "WUFSYNE,Wake-Up function PCLK Synchronous Enable" "0: I3C asynchronous circuit enable,1: I3C synchronous circuit enable"
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bitfld.long 0x0 4. "WUANFS,Wake-Up Analog Noise Filter Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter."
bitfld.long 0x0 0. "WUACKS,Wake-Up Acknowledge Selection" "0,1"
group.long 0xA0++0x7
line.long 0x0 "ACKCTL,Acknowledge Control Register"
bitfld.long 0x0 2. "ACKTWP,ACKT Write Protect" "0: The ACKT bit are protected.,1: The ACKT bit can be written (when writing.."
bitfld.long 0x0 1. "ACKT,Acknowledge Transmission" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.."
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rbitfld.long 0x0 0. "ACKR,Acknowledge Reception" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.."
line.long 0x4 "SCSTRCTL,SCL Stretch Control Register"
bitfld.long 0x4 1. "RWE,Receive Wait Enable" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.."
bitfld.long 0x4 0. "ACKTWE,Acknowledge Transmission Wait Enable" "0: NTST.RDBFF0 is set at the rising edge of the..,1: NTST.RDBFF0 is set at the rising edge of the.."
group.long 0xB0++0x3
line.long 0x0 "SCSTLCTL,SCL Stalling Control Register"
bitfld.long 0x0 31. "ACKPE,ACK phase Enable" "0: Does not stall the SCL clock during the ACK/NACK..,1: Stall the SCL clock during the ACK/NACK phase."
bitfld.long 0x0 30. "PARPE,Parity Phase Enable" "0: Does not stall the SCL clock during the parity..,1: Stall the SCL clock during the parity bit period."
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bitfld.long 0x0 28. "AAPE,Assigned Address Phase Enable" "0: Does not stall the SCL clock during the address..,1: Stall the SCL clock during address assignment.."
hexmask.long.word 0x0 0.--15. 1. "STLCYC,Stalling Cycle"
group.long 0xC0++0x3
line.long 0x0 "SVTDLG0,Slave Transfer Data Length Register 0"
hexmask.long.word 0x0 16.--31. 1. "STDLG,Slave Transfer Data Length"
group.long 0x120++0x7
line.long 0x0 "STCTL,Synchronous Timing Control Register"
bitfld.long 0x0 0. "STOE,Synchronous Timing output Enable" "0: Disable,1: Enable"
line.long 0x4 "ATCTL,Asynchronous Timing Control Register"
hexmask.long.byte 0x4 8.--15. 1. "CDIV,TCLK Counter Divide Setting"
bitfld.long 0x4 2. "AMEOE,Additional Master-initiated bus Event Output Enable" "0: Disable,1: Enable"
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bitfld.long 0x4 1. "MREFOE,MREF Output Enable (Capture Event / Counter Overflow)" "0: Disable,1: Enable"
bitfld.long 0x4 0. "ATTRGS,Asynchronous Timing Trigger Select" "0: Software trigger,1: Hardware trigger"
wgroup.long 0x128++0x3
line.long 0x0 "ATTRG,Asynchronous Timing Trigger Register"
bitfld.long 0x0 0. "ATSTRG,Asynchronous Timing Software Trigger" "0: Do nothing,1: Software trigger (one-shot pulse) output This.."
group.long 0x12C++0x3
line.long 0x0 "ATCCNTE,Asynchronous Timing Contorol Counter enable Register"
bitfld.long 0x0 0. "ATCE,Asynchronous Timing Counter Enable for MREF MC2 SC1 SC2." "0: Disable,1: Enable"
group.long 0x140++0x3
line.long 0x0 "CNDCTL,Condition Control Register"
bitfld.long 0x0 2. "SPCND,STOP (P) Condition Issuance" "0: Does not request to issue a STOP condition.,1: Requests to issue a STOP condition."
bitfld.long 0x0 1. "SRCND,Repeated START (Sr) Condition Issuance" "0: Does not request to issue a Repeated START..,1: Requests to issue a Repeated START condition."
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bitfld.long 0x0 0. "STCND,START (S) Condition Issuance" "0: Does not request to issue a START condition.,1: Requests to issue a START condition."
wgroup.long 0x150++0x3
line.long 0x0 "NCMDQP,Normal Command Queue Port Register"
rgroup.long 0x154++0x3
line.long 0x0 "NRSPQP,Normal Response Queue Port Register"
group.long 0x158++0x3
line.long 0x0 "NTDTBP0,Normal Transfer Data Buffer Port Register 0"
group.byte 0x158++0x0
line.byte 0x0 "NTDTBP0_BY,Normal Transfer Data Buffer Port Register 0"
group.long 0x17C++0x3
line.long 0x0 "NIBIQP,Normal IBI Queue Port Register"
rgroup.long 0x180++0x3
line.long 0x0 "NRSQP,Normal Receive Status Queue Port Register"
wgroup.long 0x184++0x3
line.long 0x0 "HCMDQP,High Priority Command Queue Port Register"
rgroup.long 0x188++0x3
line.long 0x0 "HRSPQP,High Priority Response Queue Port Register"
group.long 0x18C++0xB
line.long 0x0 "HTDTBP,High Priority Transfer Data Buffer Port Register"
line.long 0x4 "NQTHCTL,Normal Queue Threshold Control Register"
hexmask.long.byte 0x4 24.--31. 1. "IBIQTH,Normal IBI Queue Threshold"
hexmask.long.byte 0x4 16.--23. 1. "IBIDSSZ,Normal IBI Data Segment Size"
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hexmask.long.byte 0x4 8.--15. 1. "RSPQTH,Normal Response Queue Threshold"
hexmask.long.byte 0x4 0.--7. 1. "CMDQTH,Normal Command Ready Queue Threshold"
line.long 0x8 "NTBTHCTL0,Normal Transfer Data Buffer Threshold Control Register 0"
bitfld.long 0x8 24.--26. "RXSTTH,Normal Rx Start Threshold" "0: Setting prohibited,1: Wait for 4 empty DWORDs,?,?,?,?,?,?"
bitfld.long 0x8 16.--18. "TXSTTH,Normal Tx Start Threshold" "0: Setting prohibited,1: Wait for 4 entry DWORDs,?,?,?,?,?,?"
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bitfld.long 0x8 8.--10. "RXDBTH,Normal Receive Data Buffer Threshold" "0: Setting prohibited,1: Interrupt triggers at 4 Rx Buffer entries DWORDs,?,?,?,?,?,?"
bitfld.long 0x8 0.--2. "TXDBTH,Normal Transmit Data Buffer Threshold" "0: Setting prohibited,1: Interrupt triggers at 4 Tx Buffer empties DWORDs,?,?,?,?,?,?"
group.long 0x1C0++0xB
line.long 0x0 "NRQTHCTL,Normal Receive Status Queue Threshold Control Register"
hexmask.long.byte 0x0 0.--7. 1. "RSQTH,Normal Receive Status Queue Threshold"
line.long 0x4 "HQTHCTL,High Priority Queue Threshold Control Register"
hexmask.long.byte 0x4 8.--15. 1. "RSPQTH,High Priority Response Ready Queue Threshold"
hexmask.long.byte 0x4 0.--7. 1. "CMDQTH,High Priority Command Ready Queue Threshold"
line.long 0x8 "HTBTHCTL,High Priority Transfer Data Buffer Threshold Control Register"
bitfld.long 0x8 24.--26. "RXSTTH,High Priority Rx Start Threshold" "0: Setting prohibited,1: Reserved,?,?,?,?,?,?"
bitfld.long 0x8 16.--18. "TXSTTH,High Priority Tx Start Threshold" "0: Setting prohibited,1: Reserved,?,?,?,?,?,?"
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bitfld.long 0x8 8.--10. "RXDBTH,High Priority Receive Data Buffer Threshold" "0: Setting prohibited,1: Reserved,?,?,?,?,?,?"
bitfld.long 0x8 0.--2. "TXDBTH,High Priority Transmit Data Buffer Threshold" "0: Setting prohibited,1: Reserved,?,?,?,?,?,?"
group.long 0x1D0++0xB
line.long 0x0 "BST,Bus Status Register"
bitfld.long 0x0 24. "WUCNDDF,Wake-Up Condition Detection Flag" "0: Wake-Up is not detected.,1: Wake-Up is detected."
bitfld.long 0x0 20. "TODF,Timeout Detection Flag" "0: Timeout is not detected.,1: Timeout is detected."
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bitfld.long 0x0 16. "ALF,Arbitration Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost."
bitfld.long 0x0 8. "TENDF,Transmit End Flag" "0: Data is being transmitted.,1: Data has been transmitted."
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bitfld.long 0x0 4. "NACKDF,NACK Detection Flag" "0: NACK is not detected.,1: NACK is detected."
bitfld.long 0x0 2. "HDREXDF,HDR Exit Pattern Detection Flag" "0: HDR Exit Pattern is not detected,1: HDR Exit Pattern is detected."
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bitfld.long 0x0 1. "SPCNDDF,STOP Condition Detection Flag" "0: STOP condition is not detected.,1: STOP condition is detected."
bitfld.long 0x0 0. "STCNDDF,START Condition Detection Flag" "0: START condition is not detected.,1: START condition is detected."
line.long 0x4 "BSTE,Bus Status Enable Register"
bitfld.long 0x4 24. "WUCNDDE,Wake-up Condition Detection Enable" "0: Disables Wake-up Condition Detection Status..,1: Enables Wake-up Condition Detection Status.."
bitfld.long 0x4 20. "TODE,Timeout Detection Enable" "0: Disables Timeout Detection Interrupt Status..,1: Enables Timeout Detection Interrupt Status.."
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bitfld.long 0x4 16. "ALE,Arbitration Lost Enable" "0: Disables Arbitration Lost Interrupt Status..,1: Enables Arbitration Lost Interrupt Status logging."
bitfld.long 0x4 8. "TENDE,Transmit End Enable" "0: Disables Transmit End Interrupt Status logging.,1: Enables Transmit End Interrupt Status logging."
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bitfld.long 0x4 4. "NACKDE,NACK Detection Enable" "0: Disables NACK Detection Interrupt Status logging.,1: Enables NACK Detection Interrupt Status logging."
bitfld.long 0x4 2. "HDREXDE,HDR Exit Pattern Detection Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.."
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bitfld.long 0x4 1. "SPCNDDE,STOP Condition Detection Enable" "0: Disables STOP condition Detection Interrupt..,1: Enables STOP condition Detection Interrupt.."
bitfld.long 0x4 0. "STCNDDE,START Condition Detection Enable" "0: Disables START condition Detection Interrupt..,1: Enables START condition Detection Interrupt.."
line.long 0x8 "BIE,Bus Interrupt Enable Register"
bitfld.long 0x8 24. "WUCNDDIE,Wake-Up Condition Detection Interrupt Enable" "0: Disables Wake-Up Condition Detection Interrupt..,1: Enables Wake-Up Condition Detection Interrupt.."
bitfld.long 0x8 20. "TODIE,Timeout Detection Interrupt Enable" "0: Disables Timeout Detection Interrupt Signal.,1: Enables Timeout Detection Interrupt Signal."
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bitfld.long 0x8 16. "ALIE,Arbitration Lost Interrupt Enable" "0: Disables Arbitration Lost Interrupt Signal.,1: Enables Arbitration Lost Interrupt Signal."
bitfld.long 0x8 8. "TENDIE,Transmit End Interrupt Enable" "0: Disables Transmit End Interrupt Signal.,1: Enables Transmit End Interrupt Signal."
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bitfld.long 0x8 4. "NACKDIE,NACK Detection Interrupt Enable" "0: Disables NACK Detection Interrupt Signal.,1: Enables NACK Detection Interrupt Signal."
bitfld.long 0x8 2. "HDREXDIE,HDR Exit Pattern Detection Interrupt Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.."
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bitfld.long 0x8 1. "SPCNDDIE,STOP Condition Detection Interrupt Enable" "0: Disables STOP condition Detection Interrupt..,1: Enables STOP condition Detection Interrupt Signal."
bitfld.long 0x8 0. "STCNDDIE,START Condition Detection Interrupt Enable" "0: Disables START condition Detection Interrupt..,1: Enables START condition Detection Interrupt.."
wgroup.long 0x1DC++0x3
line.long 0x0 "BSTFC,Bus Status Force Register"
bitfld.long 0x0 24. "WUCNDDFC,Wake-Up Condition Detection Force" "0: Not Force Wake-Up Condition Detection Interrupt..,1: Force Wake-Up Condition Detection Interrupt for.."
bitfld.long 0x0 20. "TODFC,Timeout Detection Force" "0: Not Force Timeout Detection Interrupt for..,1: Force Timeout Detection Interrupt for software.."
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bitfld.long 0x0 16. "ALFC,Arbitration Lost Force" "0: Not Force Arbitration Lost Interrupt for..,1: Force Arbitration Lost Interrupt for software.."
bitfld.long 0x0 8. "TENDFC,Transmit End Force" "0: Not Force Transmit End Interrupt for software..,1: Force Transmit End Interrupt for software testing."
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bitfld.long 0x0 4. "NACKDFC,NACK Detection Force" "0: Not Force NACK Detection Interrupt for software..,1: Force NACK Detection Interrupt for software.."
bitfld.long 0x0 2. "HDREXDFC,HDR Exit Pattern Detection Force" "0: Not Force HDR Exit Pattern Detection Interrupt..,1: Force HDR Exit Pattern Detection Interrupt for.."
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bitfld.long 0x0 1. "SPCNDDFC,STOP condition Detection Force" "0: Not Force STOP condition Detection Interrupt for..,1: Force STOP condition Detection Interrupt for.."
bitfld.long 0x0 0. "STCNDDFC,START condition Detection Force" "0: Not Force START condition Detection Interrupt..,1: Force START condition Detection Interrupt for.."
group.long 0x1E0++0xB
line.long 0x0 "NTST,Normal Transfer Status Register"
bitfld.long 0x0 20. "RSQFF,Normal Receive Status Queue Full Flag" "0: The number of Receive Status Queue entries is..,1: The number of Receive Status Queue entries is.."
bitfld.long 0x0 9. "TEF,Normal Transfer Error Flag" "0: Transfer Error does not occur.,1: Transfer Error occurs. To clear write 0 to this.."
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bitfld.long 0x0 5. "TABTF,Normal Transfer Abort Flag" "0: Transfer Abort does not occur.,1: Transfer Abort occur. To clear write 0 to this.."
bitfld.long 0x0 4. "RSPQFF,Normal Response Queue Full Flag" "0: The number of Response Queue entries is the..,1: The number of Response Queue entries is more.."
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bitfld.long 0x0 3. "CMDQEF,Normal Command Queue Empty Flag" "0: If the NQTHCTL.CMDQTH = 0: The number of Command..,1: If the NQTHCTL.CMDQTH = 0: The number of Command.."
bitfld.long 0x0 2. "IBIQEFF,Normal IBI Queue Empty/Full Flag" "0: For I3C protocol mode (Master): PRTS.PRTMD bit =..,1: For I3C protocol mode (Master): PRTS.PRTMD bit =.."
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bitfld.long 0x0 1. "RDBFF0,Normal Receive Data Buffer Full Flag 0" "0: For I2C protocol mode: PRTS.PRTMD bit = 1.,1: For I2C protocol mode: PRTS.PRTMD bit = 1."
bitfld.long 0x0 0. "TDBEF0,Normal Transmit Data Buffer Empty Flag 0" "0: For I2C protocol mode: PRTS.PRTMD bit = 1.,1: For I2C protocol mode: PRTS.PRTMD bit = 1."
line.long 0x4 "NTSTE,Normal Transfer Status Enable Register"
bitfld.long 0x4 20. "RSQFE,Normal Receive Status Queue Full Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.."
bitfld.long 0x4 9. "TEE,Normal Transfer Error Enable" "0: Disables Transfer Error Interrupt Status logging.,1: Enables Transfer Error Interrupt Status logging."
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bitfld.long 0x4 5. "TABTE,Normal Transfer Abort Enable" "0: Disables Transfer Abort Interrupt Status logging.,1: Enables Transfer Abort Interrupt Status logging."
bitfld.long 0x4 4. "RSPQFE,Normal Response Queue Full Enable" "0: Disables Response Buffer Full Interrupt Status..,1: Enables Response Buffer Full Interrupt Status.."
newline
bitfld.long 0x4 3. "CMDQEE,Normal Command Queue Empty Enable" "0: Disables Command Buffer Empty Interrupt Status..,1: Enables Command Buffer Empty Interrupt Status.."
bitfld.long 0x4 2. "IBIQEFE,Normal IBI Queue Empty/Full Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.."
newline
bitfld.long 0x4 1. "RDBFE0,Normal Receive Data Buffer Full Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Status..,1: Enables Rx0 Data Buffer Full Interrupt Status.."
bitfld.long 0x4 0. "TDBEE0,Normal Transmit Data Buffer Empty Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Status..,1: Enables Tx0 Data Buffer Empty Interrupt Status.."
line.long 0x8 "NTIE,Normal Transfer Interrupt Enable Register"
bitfld.long 0x8 20. "RSQFIE,Normal Receive Status Queue Full Interrupt Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.."
bitfld.long 0x8 9. "TEIE,Normal Transfer Error Interrupt Enable" "0: Disables Transfer Error Interrupt Signal.,1: Enables Transfer Error Interrupt Signal."
newline
bitfld.long 0x8 5. "TABTIE,Normal Transfer Abort Interrupt Enable" "0: Disables Transfer Abort Interrupt Signal.,1: Enables Transfer Abort Interrupt Signal."
bitfld.long 0x8 4. "RSPQFIE,Normal Response Queue Full Interrupt Enable" "0: Disables Response Buffer Full Interrupt Signal.,1: Enables Response Buffer Full Interrupt Signal."
newline
bitfld.long 0x8 3. "CMDQEIE,Normal Command Queue Empty Interrupt Enable" "0: Disables Command Buffer Empty Interrupt Signal.,1: Enables Command Buffer Empty Interrupt Signal."
bitfld.long 0x8 2. "IBIQEFIE,Normal IBI Queue Empty/Full Interrupt Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.."
newline
bitfld.long 0x8 1. "RDBFIE0,Normal Receive Data Buffer Full Interrupt Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Signal.,1: Enables Rx0 Data Buffer Full Interrupt Signal."
bitfld.long 0x8 0. "TDBEIE0,Normal Transmit Data Buffer Empty Interrupt Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Signal.,1: Enables Tx0 Data Buffer Empty Interrupt Signal."
wgroup.long 0x1EC++0x3
line.long 0x0 "NTSTFC,Normal Transfer Status Force Register"
bitfld.long 0x0 20. "RSQFFC,Normal Receive Status Queue Full Force" "0: Not Force Receive Status Buffer Full Interrupt..,1: Force Receive Status Buffer Full Interrupt for.."
bitfld.long 0x0 9. "TEFC,Normal Transfer Error Force" "0: Not Force Transfer Error Interrupt for software..,1: Force Transfer Error Interrupt for software.."
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bitfld.long 0x0 5. "TABTFC,Normal Transfer Abort Force" "0: Not Force Transfer Abort Interrupt for software..,1: Force Transfer Abort Interrupt for software.."
bitfld.long 0x0 4. "RSPQFFC,Normal Response Queue Full Force" "0: Not Force Response Buffer Full Interrupt for..,1: Force Response Buffer Full Interrupt for.."
newline
bitfld.long 0x0 3. "CMDQEFC,Normal Command Queue Empty Force" "0: Not Force Command Buffer Empty Interrupt for..,1: Force Command Buffer Empty Interrupt for.."
bitfld.long 0x0 2. "IBIQEFFC,Normal IBI Queue Empty/Full Force" "0: Not Force IBI Status Buffer Full Interrupt for..,1: Force IBI Status Buffer Full Interrupt for.."
newline
bitfld.long 0x0 1. "RDBFFC0,Normal Receive Data Buffer Full Force 0" "0: Not Force Rx0 Data Buffer Full Interrupt for..,1: Force Rx0 Data Buffer Full Interrupt for.."
bitfld.long 0x0 0. "TDBEFC0,Normal Transmit Data Buffer Empty Force 0" "0: Not Force Tx0 Data Buffer Empty Interrupt for..,1: Force Tx0 Data Buffer Empty Interrupt for.."
group.long 0x200++0xB
line.long 0x0 "HTST,High Priority Transfer Status Register"
bitfld.long 0x0 9. "TEF,High Priority Transfer Error Flag" "0: High Priority Transfer Error does not occur.,1: High Priority Transfer Error occurs. To clear.."
bitfld.long 0x0 5. "TABTF,High Priority Transfer Abort Flag" "0: High Priority Transfer Abort does not occur.,1: High Priority Transfer Abort occurs. To clear.."
newline
bitfld.long 0x0 4. "RSPQFF,High Priority Response Queue Full Flag" "0: The number of High Priority Response Queue..,1: The number of High Priority Response Queue.."
bitfld.long 0x0 3. "CMDQEF,High Priority Command Queue Empty Flag" "0: If HQTHCTL.CMDQTH is 0 the number of Command..,1: If HQTHCTL.CMDQTH is 0 the number of Command.."
newline
bitfld.long 0x0 1. "RDBFF,High Priority Receive Data Buffer Full Flag" "0: The number of entries in the High Priority..,1: The number of entries in the High Priority.."
bitfld.long 0x0 0. "TDBEF,High Priority Transmit Data Buffer Empty Flag" "0: The number of empties in the High Priority..,1: The number of empties in the High Priority.."
line.long 0x4 "HTSTE,High Priority Transfer Status Enable Register"
bitfld.long 0x4 9. "TEE,High Priority Transfer Error Enable" "0: Disables High Priority Transfer Error interrupt..,1: Enables High Priority Transfer Error interrupt.."
bitfld.long 0x4 5. "TABTE,High Priority Transfer Abort Enable" "0: Disables High PriorityTransfer Abort Interrupt..,1: Enables High Priority Transfer Abort Interrupt.."
newline
bitfld.long 0x4 4. "RSPQFE,High Priority Response Queue Full Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.."
bitfld.long 0x4 3. "CMDQEE,High Priority Command Queue Empty Enable" "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.."
newline
bitfld.long 0x4 1. "RDBFE,High Priority Receive Data Buffer Full Enable" "0: Disables High Priority Receive Data Buffer Full..,1: Enables High Priority Receive Data Buffer Full.."
bitfld.long 0x4 0. "TDBEE,High Priority Transmit Data Buffer Empty Enable" "0: Disables High Priority Transmit Data Buffer..,1: Enables High Priority Transmit Data Buffer Empty.."
line.long 0x8 "HTIE,High Priority Transfer Interrupt Enable Register"
bitfld.long 0x8 9. "TEIE,High Priority Transfer Error Interrupt Enable" "0: Disables High Priority Transfer Error Interrupt..,1: Enables High Priority Transfer Error Interrupt.."
bitfld.long 0x8 5. "TABTIE,High Priority Transfer Abort Interrupt Enable" "0: Disables High Priority Transfer Abort interrupt..,1: Enables High Priority Transfer Abort interrupt.."
newline
bitfld.long 0x8 4. "RSPQFIE,High Priority Response Queue Full Interrupt Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.."
bitfld.long 0x8 3. "CMDQEIE,High Priority Command Queue Empty Interrupt Enable" "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.."
newline
bitfld.long 0x8 1. "RDBFIE,High Priority Receive Data Buffer Full Interrupt Enable" "0: Disables High Priority Receive Data Buffer Full..,1: Enables High Priority Receive Data Buffer Full.."
bitfld.long 0x8 0. "TDBEIE,High Priority Transmit Data Buffer Empty Interrupt Enable" "0: Disables High Priority Transmit Data Buffer..,1: Enables High Priority Transmit Data Buffer Empty.."
wgroup.long 0x20C++0x3
line.long 0x0 "HTSTFC,High Priority Transfer Status Force Register"
bitfld.long 0x0 9. "TEFC,High Priority Transfer Error Force" "0: Not Force High Priority Transfer Error Interrupt..,1: Force High Priority Transfer Error Interrupt for.."
bitfld.long 0x0 5. "TABTFC,High Priority Transfer Abort Force" "0: Not Force High Priority Transfer Abort Interrupt..,1: Force High Priority Transfer Abort Interrupt for.."
newline
bitfld.long 0x0 4. "RSPQFFC,High Priority Response Queue Full Force" "0: Not Force High Priority Response Buffer Full..,1: Force High Priority Response Buffer Full.."
bitfld.long 0x0 3. "CMDQEFC,High Priority Command Queue Empty Force" "0: Not Force High Priority Command Buffer Empty..,1: Force High Priority Command Buffer Empty.."
newline
bitfld.long 0x0 1. "RDBFFC,High Priority Receive Data Buffer Full Force" "0: Not Force High Priority Receive Data Buffer Full..,1: Force High Priority Receive Data Buffer Full.."
bitfld.long 0x0 0. "TDBEFC,High Priority Transmit Data Buffer Empty Force" "0: Not Force High Priority Transmit Data Buffer..,1: Force High Priority Transmit Data Buffer Empty.."
rgroup.long 0x210++0x3
line.long 0x0 "BCST,Bus Condition Status Register"
bitfld.long 0x0 2. "BIDLF,Bus Idle Detection Flag" "0: Have not Detected Bus Idle,1: Have Detected Bus Idle"
bitfld.long 0x0 1. "BAVLF,Bus Available Detection Flag" "0: Have not Detected Bus Available,1: Have Detected Bus Available"
newline
bitfld.long 0x0 0. "BFREF,Bus Free Detection Flag" "0: Have not Detected Bus Free,1: Have Detected Bus Free"
group.long 0x214++0x3
line.long 0x0 "SVST,Slave Status Register"
bitfld.long 0x0 16.--18. "SVAF,Slave Address Detection Flag n ( n = 0 to 2 )" "0: Slave n does not detect,1: Slave n detect,?,?,?,?,?,?"
bitfld.long 0x0 15. "HOAF,Host Address Detection Flag" "0: Host address does not detect.,1: Host address detects. This bit set to 1 when the.."
newline
bitfld.long 0x0 6. "DVIDF,Device-ID Address Detection Flag" "0: Device-ID command does not detect.,1: Device-ID command detects. This bit set to 1.."
bitfld.long 0x0 5. "HSMCF,Hs-mode Master Code Detection Flag" "0: Hs-mode Master Code does not detect.,1: Hs-mode Master Code detects."
newline
bitfld.long 0x0 0. "GCAF,General Call Address Detection Flag" "0: General call address does not detect.,1: General call address detects."
rgroup.long 0x218++0x7
line.long 0x0 "WUST,Wake Up Unit Operating Status Register"
bitfld.long 0x0 0. "WUASYNF,Wake-up function asynchronous operation status flag" "0: I3C synchronous circuit enable condition.,1: I3C asynchronous circuit enable condition."
line.long 0x4 "MRCCPT,MsyncCNT Counter Capture Register"
repeat 8. (increment 0x0 0x1)(increment 0x0 0x8)
group.long ($2+0x224)++0x3
line.long 0x0 "DATBAS$1,Device Address Table Basic Register %s"
bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C Device,1: I2C Device"
bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address"
bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.."
newline
bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests.,1: This Device shall NACK Master Requests and send.."
bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR.,1: This Device shall NACK the SIR and send the.."
newline
bitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload.,1: IBIs from this Device do carry a Data Payload."
hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address"
repeat.end
group.long 0x2A0++0x3
line.long 0x0 "EXDATBAS,Extended Device Address Table Basic Register"
bitfld.long 0x0 31. "EDTYP,Extended Device Type" "0: I3C Device,1: I2C Device"
bitfld.long 0x0 29.--30. "EDNACK,Extended Device NACK Retry Count" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--23. 1. "EDDYAD,Extended Device I3C Dynamic Address"
hexmask.long.byte 0x0 0.--6. 1. "EDSTAD,Extended Device Static Address"
group.long 0x2B0++0x3
line.long 0x0 "SDATBAS0,Slave Device Address Table Basic Register 0"
hexmask.long.byte 0x0 16.--22. 1. "SDDYAD,Slave Device I3C Dynamic Address"
bitfld.long 0x0 12. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this device do not carry a data payload.,1: IBIs from this device carry a data payload."
newline
bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave device address length 7 bits selected.,1: Slave device address length 10 bits selected."
hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address"
group.long 0x2B0++0x3
line.long 0x0 "SDATBAS1,Slave Device Address Table Basic Register 1"
hexmask.long.byte 0x0 16.--22. 1. "SDDYAD,Slave Device I3C Dynamic Address"
bitfld.long 0x0 12. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this device do not carry a data payload.,1: IBIs from this device carry a data payload."
newline
bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave device address length 7 bits selected.,1: Slave device address length 10 bits selected."
hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address"
group.long 0x2B0++0x3
line.long 0x0 "SDATBAS2,Slave Device Address Table Basic Register 2"
hexmask.long.byte 0x0 16.--22. 1. "SDDYAD,Slave Device I3C Dynamic Address"
bitfld.long 0x0 12. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this device do not carry a data payload.,1: IBIs from this device carry a data payload."
newline
bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave device address length 7 bits selected.,1: Slave device address length 10 bits selected."
hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address"
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x2D0)++0x3
line.long 0x0 "MSDCT$1,Master Device Characteristic Table Register %s"
bitfld.long 0x0 14.--15. "RBCR76,Device Role" "0: Setting prohibited,1: I3C Master,?,?"
bitfld.long 0x0 12. "RBCR4,Bridge Identifier" "0: Not a Bridge Device,1: A Bridge Device"
newline
bitfld.long 0x0 11. "RBCR3,Offline Capable" "0: Device will always respond to I3C bus commands.,1: Device will not always respond to I3C bus.."
bitfld.long 0x0 10. "RBCR2,IBI Payload" "0: No data byte follows the accepted IBI.,1: Mandatory one or more data bytes follow the.."
newline
bitfld.long 0x0 9. "RBCR1,IBI Request Capable" "0: Not Capable,1: Capable"
bitfld.long 0x0 8. "RBCR0,Max Data Speed Limitation" "0: No Limitation,1: Limitation"
repeat.end
group.long 0x320++0xB
line.long 0x0 "SVDCT,Slave Device Characteristic Table Register"
bitfld.long 0x0 14.--15. "TBCR76,Device Role" "0: Setting prohibited,1: I3C Master,?,?"
bitfld.long 0x0 12. "TBCR4,Bridge Identifier" "0: Not a Bridge Device,1: A Bridge Device"
newline
bitfld.long 0x0 11. "TBCR3,Offline Capable" "0: Device will always respond to I3C bus commands.,1: Device will not always respond to I3C bus.."
bitfld.long 0x0 10. "TBCR2,IBI Payload" "0: No data byte follows the accepted IBI.,1: Mandatory one or more data bytes follow the.."
newline
bitfld.long 0x0 9. "TBCR1,IBI Request Capable" "0: Not Capable,1: Capable"
bitfld.long 0x0 8. "TBCR0,Max Data Speed Limitation" "0: No Limitation,1: Limitation"
newline
hexmask.long.byte 0x0 0.--7. 1. "TDCR,Transfar Device Characteristic Register"
line.long 0x4 "SDCTPIDL,Slave Device Characteristic Table Provisional ID Low Register"
line.long 0x8 "SDCTPIDH,Slave Device Characteristic Table Provisional ID High Register"
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x330)++0x3
line.long 0x0 "SVDVAD$1,Slave Device Address Register %s"
bitfld.long 0x0 31. "SDYADV,Slave Dynamic Address Valid" "0: Dynamic Address is disabled.,1: Dynamic Address is enabled."
bitfld.long 0x0 30. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled."
newline
bitfld.long 0x0 27. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected."
hexmask.long.word 0x0 16.--25. 1. "SVAD,Slave Address"
repeat.end
group.long 0x350++0xF
line.long 0x0 "CSECMD,CCC Slave Events Command Register"
bitfld.long 0x0 1. "MSRQE,Mastership Requests Enable" "0: DISABLED: Mastership requests from Secondary..,1: ENABLED: Mastership requests from Secondary.."
bitfld.long 0x0 0. "SVIRQE,Slave Interrupt Requests Enable" "0: DISABLED: Slave-initiated Interrupts is Disabled..,1: ENABLED: Slave-initiated Interrupts is Enabled.."
line.long 0x4 "CEACTST,CCC Enter Activity State Register"
hexmask.long.byte 0x4 0.--3. 1. "ACTST,Activity State"
line.long 0x8 "CMWLG,CCC Max Write Length Register"
hexmask.long.word 0x8 0.--15. 1. "MWLG,Max Write Length"
line.long 0xC "CMRLG,CCC Max Read Length Register"
hexmask.long.byte 0xC 16.--23. 1. "IBIPSZ,IBI Payload Size"
hexmask.long.word 0xC 0.--15. 1. "MRLG,Max Read Length"
rgroup.long 0x360++0x3
line.long 0x0 "CETSTMD,CCC Enter Test Mode Register"
hexmask.long.byte 0x0 0.--7. 1. "TSTMD,Test Mode"
group.long 0x364++0x17
line.long 0x0 "CGDVST,CCC Get Device Status Register"
hexmask.long.byte 0x0 8.--15. 1. "VDRSV,Vendor Reserved"
bitfld.long 0x0 6.--7. "ACTMD,Slave Device's current Activity Mode" "0: Activity Mode 0,1: Activity Mode 1,?,?"
newline
bitfld.long 0x0 5. "PRTE,Protocol Error" "0: The Slave has not detected a protocol error..,1: The Slave has detected a protocol error since.."
hexmask.long.byte 0x0 0.--3. 1. "PNDINT,Pending Interrupt"
line.long 0x4 "CMDSPW,CCC Max Data Speed W (Write) Register"
bitfld.long 0x4 0.--2. "MSWDR,Maximum Sustained Write Data Rate" "0: Setting prohibited,1: 8 MHz,?,?,?,?,?,?"
line.long 0x8 "CMDSPR,CCC Max Data Speed R (Read) Register"
bitfld.long 0x8 3.--5. "CDTTIM,Clock to Data Turnaround Time (TSCO)" "0: Setting prohibited,1: 9 ns or less,?,?,?,?,?,?"
bitfld.long 0x8 0.--2. "MSRDR,Maximum Sustained Read Data Rate" "0: Setting prohibited,1: 8 MHz,?,?,?,?,?,?"
line.long 0xC "CMDSPT,CCC Max Data Speed T (Turnaround) Register"
bitfld.long 0xC 31. "MRTE,Maximum Read Turnaround Time Enable" "0: Disables transmission of the Maximum Read..,1: Enables transmission of the Maximum Read.."
hexmask.long.tbyte 0xC 0.--23. 1. "MRTTIM,Maximum Read Turnaround Time"
line.long 0x10 "CETSM,CCC Exchange Timing Support Information M (Mode) Register"
hexmask.long.byte 0x10 16.--23. 1. "INAC,Inaccuracy Byte"
hexmask.long.byte 0x10 8.--15. 1. "FREQ,Frequency Byte"
newline
bitfld.long 0x10 2. "SPTASYN1,Support Async Mode 1" "0: Async Mode 1 is not supported.,1: Async Mode 1 is supported."
bitfld.long 0x10 1. "SPTASYN0,Support Async Mode 0" "0: Async Mode 0 is not supported.,1: Async Mode 0 is supported."
newline
bitfld.long 0x10 0. "SPTSYN,Supports Sync Mode" "0: Sync Mode is not supported.,1: Sync Mode is supported."
line.long 0x14 "CETSS,CCC Exchange Timing Support Information S (State) Register"
bitfld.long 0x14 7. "ICOVF,Internal Counter Overflow" "0: Slave has not experienced a counter overflow..,1: Slave experienced a counter overflow since the.."
bitfld.long 0x14 1.--2. "ASYNE,Async Mode Enabled" "0: Setting prohibited,1: Async Mode 0 Enabled,?,?"
newline
bitfld.long 0x14 0. "SYNE,Sync Mode Enabled" "0: Sync Mode Disabled,1: Sync Mode Enabled"
rgroup.long 0x380++0x3
line.long 0x0 "BITCNT,Bit Count Register"
hexmask.long.byte 0x0 0.--4. 1. "BCNT,Bit Counter"
rgroup.long 0x394++0x7
line.long 0x0 "NQSTLV,Normal Queue Status Level Register"
hexmask.long.byte 0x0 24.--28. 1. "IBISCNT,Normal IBI Status Count"
hexmask.long.byte 0x0 16.--23. 1. "IBIQLV,Normal IBI Queue Level"
newline
hexmask.long.byte 0x0 8.--15. 1. "RSPQLV,Normal Response Queue Level"
hexmask.long.byte 0x0 0.--7. 1. "CMDQFLV,Normal Command Queue Free Level"
line.long 0x4 "NDBSTLV0,Normal Data Buffer Status Level Register 0"
hexmask.long.byte 0x4 8.--15. 1. "RDBLV,Normal Receive Data Buffer Level"
hexmask.long.byte 0x4 0.--7. 1. "TDBFLV,Normal Transmit Data Buffer Free Level"
rgroup.long 0x3C0++0x13
line.long 0x0 "NRSQSTLV,Normal Receive Status Queue Status Level Register"
hexmask.long.byte 0x0 0.--7. 1. "RSQLV,Normal Receive Status Queue Level"
line.long 0x4 "HQSTLV,High Priority Queue Status Level Register"
hexmask.long.byte 0x4 8.--15. 1. "RSPQLV,High Priority Response Queue Level"
hexmask.long.byte 0x4 0.--7. 1. "CMDQLV,High Priority Command Queue Level"
line.long 0x8 "HDBSTLV,High Priority Data Buffer Status Level Register"
hexmask.long.byte 0x8 8.--15. 1. "RDBLV,High Priority Receive Data Buffer Level"
hexmask.long.byte 0x8 0.--7. 1. "TDBFLV,High Priority Transmit Data Buffer Free Level"
line.long 0xC "PRSTDBG,Present State Debug Register"
bitfld.long 0xC 3. "SDOLV,SDA Output Level" "0: I3C has driven the SDA pin low.,1: I3C has released the SDA pin."
bitfld.long 0xC 2. "SCOLV,SCL Output Level" "0: I3C has driven the SCL pin low.,1: I3C has released the SCL pin."
newline
bitfld.long 0xC 1. "SDILV,SDA Line Signal Level" "0,1"
bitfld.long 0xC 0. "SCILV,SCL Line Signal Level" "0,1"
line.long 0x10 "MSERRCNT,Master Error Counters Register"
hexmask.long.byte 0x10 0.--7. 1. "M2ECNT,M2 Error Counter"
rgroup.long 0x3E0++0x7
line.long 0x0 "SC1CPT,SC1 Capture monitor Register"
hexmask.long.word 0x0 0.--15. 1. "SC1C,SC1 Capture"
line.long 0x4 "SC2CPT,SC2 Capture monitor Register"
hexmask.long.word 0x4 0.--15. 1. "SC2C,SC2 Capture"
tree.end
tree "ICU (Interrupt Controller)"
base ad:0x40006000
repeat 15. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2)++0x0
line.byte 0x0 "IRQCR$1,IRQ Control Register %s"
bitfld.byte 0x0 7. "FLTEN,IRQi Digital Filter Enable" "0: Digital filter is disabled,1: Digital filter is enabled."
bitfld.byte 0x0 4.--5. "FCLKSEL,IRQi Digital Filter Sampling Clock Select" "0: PCLKB,1: PCLKB/8,?,?"
newline
bitfld.byte 0x0 0.--1. "IRQMD,IRQi Detection Sense Select" "0: Falling edge,1: Rising edge,?,?"
repeat.end
group.byte 0x100++0x0
line.byte 0x0 "NMICR,NMI Pin Interrupt Control Register"
bitfld.byte 0x0 7. "NFLTEN,NMI Digital Filter Enable" "0: Disabled.,1: Enabled."
bitfld.byte 0x0 4.--5. "NFCLKSEL,NMI Digital Filter Sampling Clock Select" "0: PCLKB,1: PCLKB/8,?,?"
newline
bitfld.byte 0x0 0. "NMIMD,NMI Detection Set" "0: Falling edge,1: Rising edge"
group.word 0x120++0x1
line.word 0x0 "NMIER,Non-Maskable Interrupt Enable Register"
bitfld.word 0x0 15. "CPEEN," "0: Disabled,1: Enabled"
bitfld.word 0x0 13. "TZFEN," "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 11. "BUSMEN,Bus Master MPU Error Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 9. "RECCEN,SRAM ECC Error Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 8. "RPEEN,SRAM Parity Error Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 7. "NMIEN,NMI Pin Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 6. "OSTEN,Main Clock Oscillation Stop Detection Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 3. "LVD2EN,Voltage monitor 2 Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 2. "LVD1EN,Voltage monitor 1 Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 1. "WDTEN,WDT Underflow/Refresh Error Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 0. "IWDTEN,IWDT Underflow/Refresh Error Interrupt Enable" "0: Disabled,1: Enabled."
group.word 0x130++0x1
line.word 0x0 "NMICLR,Non-Maskable Interrupt Status Clear Register"
bitfld.word 0x0 15. "CPECLR," "0: No effect,1: Clear the NMISR.CPECLR flag"
bitfld.word 0x0 13. "TZFCLR," "0: No effect,1: Clear the NMISR.TZFCLR flag"
newline
bitfld.word 0x0 11. "BUSMCLR,Bus Master MPU Error Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.BUSMST flag"
bitfld.word 0x0 9. "RECCCLR,SRAM ECC Error Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.RECCST flag"
newline
bitfld.word 0x0 8. "RPECLR,SRAM Parity Error Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.RPEST flag"
bitfld.word 0x0 7. "NMICLR,NMI Pin Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.NMIST flag"
newline
bitfld.word 0x0 6. "OSTCLR,Oscillation Stop Detection Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.OSTST flag"
bitfld.word 0x0 3. "LVD2CLR,Voltage Monitor 2 Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.LVD2ST flag."
newline
bitfld.word 0x0 2. "LVD1CLR,Voltage Monitor 1 Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.LVD1ST flag"
bitfld.word 0x0 1. "WDTCLR,WDT Underflow/Refresh Error Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.WDTST flag"
newline
bitfld.word 0x0 0. "IWDTCLR,IWDT Underflow/Refresh Error Interrupt Status Flag Clear" "0: No effect,1: Clear the NMISR.IWDTST flag"
rgroup.word 0x140++0x1
line.word 0x0 "NMISR,Non-Maskable Interrupt Status Register"
bitfld.word 0x0 15. "CPEST," "0: Interrupt not requested,1: Interrupt requested"
bitfld.word 0x0 13. "TZFST," "0: Interrupt not requested,1: Interrupt requested"
newline
bitfld.word 0x0 11. "BUSMST,Bus Master MPU Error Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
bitfld.word 0x0 9. "RECCST,SRAM ECC Error Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
newline
bitfld.word 0x0 8. "RPEST,SRAM Parity Error Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
bitfld.word 0x0 7. "NMIST,NMI Pin Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
newline
bitfld.word 0x0 6. "OSTST,Main Clock Oscillation Stop Detection Interrupt Status Flag" "0: Interrupt not requested for main clock..,1: Interrupt requested for main clock oscillation.."
bitfld.word 0x0 3. "LVD2ST,Voltage Monitor 2 Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
newline
bitfld.word 0x0 2. "LVD1ST,Voltage Monitor 1 Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
bitfld.word 0x0 1. "WDTST,WDT Underflow/Refresh Error Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
newline
bitfld.word 0x0 0. "IWDTST,IWDT Underflow/Refresh Error Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
group.long 0x1A0++0x7
line.long 0x0 "WUPEN0,Wake Up Interrupt Enable Register 0"
bitfld.long 0x0 30. "AGT1CBWUPEN,AGT1 Compare Match B Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by AGT1..,1: Software Standby/Snooze Mode returns by AGT1.."
bitfld.long 0x0 29. "AGT1CAWUPEN,AGT1 Compare Match A Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by AGT1..,1: Software Standby/Snooze Mode returns by AGT1.."
newline
bitfld.long 0x0 28. "AGT1UDWUPEN,AGT1 Underflow Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by AGT1..,1: Software Standby/Snooze Mode returns by AGT1.."
bitfld.long 0x0 27. "USBFS0WUPEN,USBFS0 Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by USBFS0..,1: Software Standby/Snooze Mode returns by USBFS0.."
newline
bitfld.long 0x0 25. "RTCPRDWUPEN,RTC Period Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by RTC..,1: Software Standby/Snooze Mode returns by RTC.."
bitfld.long 0x0 24. "RTCALMWUPEN,RTC Alarm Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by RTC..,1: Software Standby/Snooze Mode returns by RTC.."
newline
bitfld.long 0x0 19. "LVD2WUPEN,LVD2 Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by LVD2..,1: Software Standby/Snooze Mode returns by LVD2.."
bitfld.long 0x0 18. "LVD1WUPEN,LVD1 Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by LVD1..,1: Software Standby/Snooze Mode returns by LVD1.."
newline
bitfld.long 0x0 16. "IWDTWUPEN,IWDT Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by IWDT..,1: Software Standby/Snooze Mode returns by IWDT.."
hexmask.long.word 0x0 0.--14. 1. "IRQWUPEN,IRQn Interrupt Software Standby/Snooze Mode Returns Enable bit (n = 0 to 15)"
line.long 0x4 "WUPEN1,Wake Up Interrupt Enable Register 1"
bitfld.long 0x4 11. "I3CWUPEN,I3C Address Match Interrupt Software Standby/Snooze Mode Returns Enable bit" "0: Software Standby/Snooze Mode returns by I3C..,1: Software Standby/Snooze Mode returns by I3C.."
group.word 0x200++0x1
line.word 0x0 "SELSR0,SYS Event Link Setting Register"
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "DELSR$1,DMAC Event Link Setting Register %s"
bitfld.long 0x0 16. "IR,DMAC Activation Request Status Flag" "0: No DMAC activation request occurred.,1: DMAC activation request occurred."
hexmask.long.word 0x0 0.--8. 1. "DELS,DMAC Event Link Select"
repeat.end
repeat 96. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x300)++0x3
line.long 0x0 "IELSR$1,ICU Event Link Setting Register %s"
repeat.end
tree.end
tree "IWDT (Independent Watchdog Timer)"
base ad:0x40083200
group.byte 0x0++0x0
line.byte 0x0 "IWDTRR,IWDT Refresh Register"
group.word 0x4++0x1
line.word 0x0 "IWDTSR,IWDT Status Register"
bitfld.word 0x0 15. "REFEF,Refresh Error Flag" "0: No refresh error occurred,1: Refresh error occurred"
bitfld.word 0x0 14. "UNDFF,Underflow Flag" "0: No underflow occurred,1: Underflow occurred"
hexmask.word 0x0 0.--13. 1. "CNTVAL,Down-counter Value"
tree.end
tree "MSTP (Module Stop Control)"
base ad:0x40084000
group.long 0x0++0x13
line.long 0x0 "MSTPCRA,Module Stop Control Register A"
bitfld.long 0x0 22. "MSTPA22,DMA Controller/Data Transfer Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x0 7. "MSTPA7,Standby SRAM Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x0 0. "MSTPA0,SRAM0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
line.long 0x4 "MSTPCRB,Module Stop Control Register B"
bitfld.long 0x4 31. "MSTPB31,Serial Communication Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x4 22. "MSTPB22,Serial Communication Interface 9 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x4 19. "MSTPB19,Serial Peripheral Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
newline
bitfld.long 0x4 18. "MSTPB18,Serial Peripheral Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x4 11. "MSTPB11,Universal Serial Bus 2.0 FS Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x4 4. "MSTPB4,I3C Bus Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
newline
bitfld.long 0x4 3. "MSTPB3,CEC Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
line.long 0x8 "MSTPCRC,Module Stop Control Register C"
bitfld.long 0x8 28. "MSTPC28,Random Number Generator Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x8 27. "MSTPC27,CANFD Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x8 14. "MSTPC14,Event Link Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
newline
bitfld.long 0x8 13. "MSTPC13,Data Operation Circuit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x8 8. "MSTPC8,Serial Sound Interface Enhanced Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x8 1. "MSTPC1,Cyclic Redundancy Check Calculator Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
newline
bitfld.long 0x8 0. "MSTPC0,Clock Frequency Accuracy Measurement Circuit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
line.long 0xC "MSTPCRD,Module Stop Control Register D"
bitfld.long 0xC 22. "MSTPD22,Temperature Sensor Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0xC 20. "MSTPD20,12-bit D/A Converter Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0xC 16. "MSTPD16,12-bit A/D Converter 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
newline
bitfld.long 0xC 14. "MSTPD14,Port Output Enable for GPT Group A Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0xC 13. "MSTPD13,Port Output Enable for GPT Group B Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0xC 12. "MSTPD12,Port Output Enable for GPT Group C Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
newline
bitfld.long 0xC 11. "MSTPD11,Port Output Enable for GPT Group D Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0xC 3. "MSTPD3,Low Power Asynchronous General Purpose Timer 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0xC 2. "MSTPD2,Low Power Asynchronous General Purpose Timer 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
line.long 0x10 "MSTPCRE,Module Stop Control Register E"
bitfld.long 0x10 31. "MSTPE31,GPT0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x10 30. "MSTPE30,GPT1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
bitfld.long 0x10 27. "MSTPE27,GPT4 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
newline
bitfld.long 0x10 26. "MSTPE26,GPT5 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
tree.end
tree "PFS (Control Register)"
base ad:0x40080800
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2)++0x3
line.long 0x0 "P00$1PFS,Port 00%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x2)++0x1
line.word 0x0 "P00$1PFS_HA,Port 00%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x3)++0x0
line.byte 0x0 "P00$1PFS_BY,Port 00%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x10)++0x3
line.long 0x0 "P00$1PFS,Port 00%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x12)++0x1
line.word 0x0 "P00$1PFS_HA,Port 00%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x13)++0x0
line.byte 0x0 "P00$1PFS_BY,Port 00%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
group.long 0x20++0x3
line.long 0x0 "P008PFS,Port 008 Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.word 0x22++0x1
line.word 0x0 "P008PFS_HA,Port 008 Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.byte 0x23++0x0
line.byte 0x0 "P008PFS_BY,Port 008 Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x34)++0x3
line.long 0x0 "P0$1PFS,Port 0%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x36)++0x1
line.word 0x0 "P0$1PFS_HA,Port 0%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x37)++0x0
line.byte 0x0 "P0$1PFS_BY,Port 0%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "P10$1PFS,Port 10%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x42)++0x1
line.word 0x0 "P10$1PFS_HA,Port 10%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x43)++0x0
line.byte 0x0 "P10$1PFS_BY,Port 10%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x48)++0x3
line.long 0x0 "P10$1PFS,Port 10%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x4A)++0x1
line.word 0x0 "P10$1PFS_HA,Port 10%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x4B)++0x0
line.byte 0x0 "P10$1PFS_BY,Port 10%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x68)++0x3
line.long 0x0 "P1$1PFS,Port 1%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x6A)++0x1
line.word 0x0 "P1$1PFS_HA,Port 1%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x6B)++0x0
line.byte 0x0 "P1$1PFS_BY,Port 1%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
group.long 0x80++0x3
line.long 0x0 "P200PFS,Port 200 Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.word 0x82++0x1
line.word 0x0 "P200PFS_HA,Port 200 Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.byte 0x83++0x0
line.byte 0x0 "P200PFS_BY,Port 200 Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.long 0x84++0x3
line.long 0x0 "P201PFS,Port 201 Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.word 0x86++0x1
line.word 0x0 "P201PFS_HA,Port 201 Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.byte 0x87++0x0
line.byte 0x0 "P201PFS_BY,Port 201 Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x94)++0x3
line.long 0x0 "P20$1PFS,Port 20%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x96)++0x1
line.word 0x0 "P20$1PFS_HA,Port 20%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x97)++0x0
line.byte 0x0 "P20$1PFS_BY,Port 20%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xB0)++0x3
line.long 0x0 "P2$1PFS,Port 2%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0xB2)++0x1
line.word 0x0 "P2$1PFS_HA,Port 2%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0xB3)++0x0
line.byte 0x0 "P2$1PFS_BY,Port 2%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
group.long 0xC0++0x3
line.long 0x0 "P300PFS,Port 300 Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.word 0xC2++0x1
line.word 0x0 "P300PFS_HA,Port 300 Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.byte 0xC3++0x0
line.byte 0x0 "P300PFS_BY,Port 300 Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xC4)++0x3
line.long 0x0 "P30$1PFS,Port 30%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0xC6)++0x1
line.word 0x0 "P30$1PFS_HA,Port 30%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0xC7)++0x0
line.byte 0x0 "P30$1PFS_BY,Port 30%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "P40$1PFS,Port 40%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x102)++0x1
line.word 0x0 "P40$1PFS_HA,Port 40%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x103)++0x0
line.byte 0x0 "P40$1PFS_BY,Port 40%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x11C)++0x3
line.long 0x0 "P40$1PFS,Port 40%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x11E)++0x1
line.word 0x0 "P40$1PFS_HA,Port 40%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x11F)++0x0
line.byte 0x0 "P40$1PFS_BY,Port 40%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x128)++0x3
line.long 0x0 "P4$1PFS,Port 4%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x12A)++0x1
line.word 0x0 "P4$1PFS_HA,Port 4%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x12B)++0x0
line.byte 0x0 "P4$1PFS_BY,Port 4%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
group.long 0x140++0x3
line.long 0x0 "P500PFS,Port 500 Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.word 0x142++0x1
line.word 0x0 "P500PFS_HA,Port 500 Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
group.byte 0x143++0x0
line.byte 0x0 "P500PFS_BY,Port 500 Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "P80$1PFS,Port 80%s Pin Function Select Register"
hexmask.long.byte 0x0 24.--28. 1. "PSEL,Peripheral Select"
bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Use as general I/O pin,1: Use as I/O port for peripheral functions"
newline
bitfld.long 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.long 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.long 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.long 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.long 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x202)++0x1
line.word 0x0 "P80$1PFS_HA,Port 80%s Pin Function Select Register"
bitfld.word 0x0 15. "ASEL,Analog Input Enable" "0: Do not use as analog pin,1: Use as analog pin"
bitfld.word 0x0 14. "ISEL,IRQ Input Enable" "0: Do not use as IRQn input pin,1: Use as IRQn input pin"
newline
bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,?,?"
bitfld.word 0x0 10.--11. "DSCR,Port Drive Capability" "0: Low drive,1: Middle drive,?,?"
newline
bitfld.word 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.word 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.byte ($2+0x203)++0x0
line.byte 0x0 "P80$1PFS_BY,Port 80%s Pin Function Select Register"
bitfld.byte 0x0 6. "NCODR,N-Channel Open-Drain Control" "0: Output CMOS,1: Output NMOS open-drain"
bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disable input pull-up,1: Enable input pull-up"
newline
bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rbitfld.byte 0x0 1. "PIDR,Port State" "0: Low level,1: High level"
newline
bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Output low,1: Output high"
repeat.end
group.byte 0x503++0x0
line.byte 0x0 "PWPR,Write-Protect Register"
bitfld.byte 0x0 7. "B0WI,PFSWE Bit Write Disable" "0: Writing to the PFSWE bit is enabled,1: Writing to the PFSWE bit is disabled"
bitfld.byte 0x0 6. "PFSWE,PmnPFS Register Write Enable" "0: Writing to the PmnPFS register is disabled,1: Writing to the PmnPFS register is enabled"
group.byte 0x505++0x0
line.byte 0x0 "PWPRS,Write-Protect Register for Secure"
bitfld.byte 0x0 7. "B0WI,PFSWE Bit Write Disable" "0: Enable writes the PFSWE bit,1: Disable writes to the PFSWE bit"
bitfld.byte 0x0 6. "PFSWE,PmnPFS Register Write Enable" "0: Disable writes to the PmnPFS register,1: Enable writes to the PmnPFS register"
group.byte 0x50C++0x0
line.byte 0x0 "PFI3C,RI3C Slope Control Register"
bitfld.byte 0x0 0. "I3CSLOPE0,I3C mode slope control bit" "0: I3C mode slope control disable,1: I3C mode slope control enable"
repeat 6. (increment 0x0 0x1)(increment 0x0 0x2)
group.word ($2+0x510)++0x1
line.word 0x0 "P$1SAR,Port Security Attribution register"
hexmask.word 0x0 0.--15. 1. "PMNSA,Pmn Security Attribution"
repeat.end
group.word 0x520++0x1
line.word 0x0 "P8SAR,Port Security Attribution register"
hexmask.word 0x0 0.--15. 1. "PMNSA,Pmn Security Attribution"
tree.end
tree "POEG (Port Output Enable Module for GPT)"
base ad:0x4008A000
group.long 0x0++0x3
line.long 0x0 "POEGGA,POEG Group A Setting Register"
bitfld.long 0x0 30.--31. "NFCS,Noise Filter Clock Select" "0: Sample GTETRGn pin input level three times every..,1: Sample GTETRGn pin input level three times every..,?,?"
bitfld.long 0x0 29. "NFEN,Noise Filter Enable" "0: Disable noise filtering,1: Enable noise filtering"
newline
bitfld.long 0x0 28. "INV,GTETRGn Input Reverse" "0: Input GTETRGn as-is,1: Input GTETRGn in reverse"
rbitfld.long 0x0 16. "ST,GTETRGn Input Status Flag" "0: GTETRGn input after filtering was 0,1: GTETRGn input after filtering was 1"
newline
bitfld.long 0x0 6. "OSTPE,Oscillation Stop Detection Enable" "0: Disable output-disable requests from oscillation..,1: Enable output-disable requests from oscillation.."
bitfld.long 0x0 5. "IOCE,Enable for GPT Output-Disable Request" "0: Disable output-disable requests from GPT,1: Enable output-disable requests from GPT"
newline
bitfld.long 0x0 4. "PIDE,Port Input Detection Enable" "0: Disable output-disable requests from the GTETRGn..,1: Enable output-disable requests from the GTETRGn.."
bitfld.long 0x0 3. "SSF,Software Stop Flag" "0: No output-disable request from software occurred,1: Output-disable request from software occurred"
newline
bitfld.long 0x0 2. "OSTPF,Oscillation Stop Detection Flag" "0: No output-disable request from oscillation stop..,1: Output-disable request from oscillation stop.."
bitfld.long 0x0 1. "IOCF,Detection Flag for GPT Output-Disable Request" "0: No output-disable request from GPT occurred.,1: Output-disable request from GPT occurred."
newline
bitfld.long 0x0 0. "PIDF,Port Input Detection Flag" "0: No output-disable request from the GTETRGn pin..,1: Output-disable request from the GTETRGn pin.."
group.long 0x100++0x3
line.long 0x0 "POEGGB,POEG Group B Setting Register"
bitfld.long 0x0 30.--31. "NFCS,Noise Filter Clock Select" "0: Sample GTETRGn pin input level three times every..,1: Sample GTETRGn pin input level three times every..,?,?"
bitfld.long 0x0 29. "NFEN,Noise Filter Enable" "0: Disable noise filtering,1: Enable noise filtering"
newline
bitfld.long 0x0 28. "INV,GTETRGn Input Reverse" "0: Input GTETRGn as-is,1: Input GTETRGn in reverse"
rbitfld.long 0x0 16. "ST,GTETRGn Input Status Flag" "0: GTETRGn input after filtering was 0,1: GTETRGn input after filtering was 1"
newline
bitfld.long 0x0 6. "OSTPE,Oscillation Stop Detection Enable" "0: Disable output-disable requests from oscillation..,1: Enable output-disable requests from oscillation.."
bitfld.long 0x0 5. "IOCE,Enable for GPT Output-Disable Request" "0: Disable output-disable requests from GPT,1: Enable output-disable requests from GPT"
newline
bitfld.long 0x0 4. "PIDE,Port Input Detection Enable" "0: Disable output-disable requests from the GTETRGn..,1: Enable output-disable requests from the GTETRGn.."
bitfld.long 0x0 3. "SSF,Software Stop Flag" "0: No output-disable request from software occurred,1: Output-disable request from software occurred"
newline
bitfld.long 0x0 2. "OSTPF,Oscillation Stop Detection Flag" "0: No output-disable request from oscillation stop..,1: Output-disable request from oscillation stop.."
bitfld.long 0x0 1. "IOCF,Detection Flag for GPT Output-Disable Request" "0: No output-disable request from GPT occurred.,1: Output-disable request from GPT occurred."
newline
bitfld.long 0x0 0. "PIDF,Port Input Detection Flag" "0: No output-disable request from the GTETRGn pin..,1: Output-disable request from the GTETRGn pin.."
group.long 0x200++0x3
line.long 0x0 "POEGGC,POEG Group C Setting Register"
bitfld.long 0x0 30.--31. "NFCS,Noise Filter Clock Select" "0: Sample GTETRGn pin input level three times every..,1: Sample GTETRGn pin input level three times every..,?,?"
bitfld.long 0x0 29. "NFEN,Noise Filter Enable" "0: Disable noise filtering,1: Enable noise filtering"
newline
bitfld.long 0x0 28. "INV,GTETRGn Input Reverse" "0: Input GTETRGn as-is,1: Input GTETRGn in reverse"
rbitfld.long 0x0 16. "ST,GTETRGn Input Status Flag" "0: GTETRGn input after filtering was 0,1: GTETRGn input after filtering was 1"
newline
bitfld.long 0x0 6. "OSTPE,Oscillation Stop Detection Enable" "0: Disable output-disable requests from oscillation..,1: Enable output-disable requests from oscillation.."
bitfld.long 0x0 5. "IOCE,Enable for GPT Output-Disable Request" "0: Disable output-disable requests from GPT,1: Enable output-disable requests from GPT"
newline
bitfld.long 0x0 4. "PIDE,Port Input Detection Enable" "0: Disable output-disable requests from the GTETRGn..,1: Enable output-disable requests from the GTETRGn.."
bitfld.long 0x0 3. "SSF,Software Stop Flag" "0: No output-disable request from software occurred,1: Output-disable request from software occurred"
newline
bitfld.long 0x0 2. "OSTPF,Oscillation Stop Detection Flag" "0: No output-disable request from oscillation stop..,1: Output-disable request from oscillation stop.."
bitfld.long 0x0 1. "IOCF,Detection Flag for GPT Output-Disable Request" "0: No output-disable request from GPT occurred.,1: Output-disable request from GPT occurred."
newline
bitfld.long 0x0 0. "PIDF,Port Input Detection Flag" "0: No output-disable request from the GTETRGn pin..,1: Output-disable request from the GTETRGn pin.."
group.long 0x300++0x3
line.long 0x0 "POEGGD,POEG Group D Setting Register"
bitfld.long 0x0 30.--31. "NFCS,Noise Filter Clock Select" "0: Sample GTETRGn pin input level three times every..,1: Sample GTETRGn pin input level three times every..,?,?"
bitfld.long 0x0 29. "NFEN,Noise Filter Enable" "0: Disable noise filtering,1: Enable noise filtering"
newline
bitfld.long 0x0 28. "INV,GTETRGn Input Reverse" "0: Input GTETRGn as-is,1: Input GTETRGn in reverse"
rbitfld.long 0x0 16. "ST,GTETRGn Input Status Flag" "0: GTETRGn input after filtering was 0,1: GTETRGn input after filtering was 1"
newline
bitfld.long 0x0 6. "OSTPE,Oscillation Stop Detection Enable" "0: Disable output-disable requests from oscillation..,1: Enable output-disable requests from oscillation.."
bitfld.long 0x0 5. "IOCE,Enable for GPT Output-Disable Request" "0: Disable output-disable requests from GPT,1: Enable output-disable requests from GPT"
newline
bitfld.long 0x0 4. "PIDE,Port Input Detection Enable" "0: Disable output-disable requests from the GTETRGn..,1: Enable output-disable requests from the GTETRGn.."
bitfld.long 0x0 3. "SSF,Software Stop Flag" "0: No output-disable request from software occurred,1: Output-disable request from software occurred"
newline
bitfld.long 0x0 2. "OSTPF,Oscillation Stop Detection Flag" "0: No output-disable request from oscillation stop..,1: Output-disable request from oscillation stop.."
bitfld.long 0x0 1. "IOCF,Detection Flag for GPT Output-Disable Request" "0: No output-disable request from GPT occurred.,1: Output-disable request from GPT occurred."
newline
bitfld.long 0x0 0. "PIDF,Port Input Detection Flag" "0: No output-disable request from the GTETRGn pin..,1: Output-disable request from the GTETRGn pin.."
tree.end
tree "PORT (I/O Ports)"
base ad:0x0
tree "PORT0"
base ad:0x40080000
group.long 0x0++0x3
line.long 0x0 "PCNTR1,Port Control Register 1"
bitfld.long 0x0 31. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 30. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 29. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 28. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 27. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 26. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 25. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 24. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 23. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 22. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 21. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 20. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 19. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 18. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 17. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 16. "PODR00,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
group.word 0x0++0x3
line.word 0x0 "PODR,Port Control Register 1"
bitfld.word 0x0 15. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 14. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 13. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 12. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 11. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 10. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 9. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 8. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 7. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 6. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 5. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 4. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 3. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 2. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 1. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 0. "PODR00,Pmn Output Data" "0: Low output,1: High output"
line.word 0x2 "PDR,Port Control Register 1"
bitfld.word 0x2 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rgroup.long 0x4++0x3
line.long 0x0 "PCNTR2,Port Control Register 2"
bitfld.long 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
rgroup.word 0x6++0x1
line.word 0x0 "PIDR,Port Control Register 2"
bitfld.word 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
wgroup.long 0x8++0x3
line.long 0x0 "PCNTR3,Port Control Register 3"
bitfld.long 0x0 31. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
wgroup.word 0x8++0x3
line.word 0x0 "PORR,Port Control Register 3"
bitfld.word 0x0 15. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "POSR,Port Control Register 3"
bitfld.word 0x2 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
tree.end
tree "PORT1"
base ad:0x40080020
group.long 0x0++0x3
line.long 0x0 "PCNTR1,Port Control Register 1"
bitfld.long 0x0 31. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 30. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 29. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 28. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 27. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 26. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 25. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 24. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 23. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 22. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 21. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 20. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 19. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 18. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 17. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 16. "PODR00,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
group.word 0x0++0x3
line.word 0x0 "PODR,Port Control Register 1"
bitfld.word 0x0 15. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 14. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 13. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 12. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 11. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 10. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 9. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 8. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 7. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 6. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 5. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 4. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 3. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 2. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 1. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 0. "PODR00,Pmn Output Data" "0: Low output,1: High output"
line.word 0x2 "PDR,Port Control Register 1"
bitfld.word 0x2 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rgroup.long 0x4++0x3
line.long 0x0 "PCNTR2,Port Control Register 2"
bitfld.long 0x0 31. "EIDR15,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 30. "EIDR14,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 29. "EIDR13,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 28. "EIDR12,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 27. "EIDR11,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 26. "EIDR10,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 25. "EIDR09,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 24. "EIDR08,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 23. "EIDR07,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 22. "EIDR06,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 21. "EIDR05,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 20. "EIDR04,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 19. "EIDR03,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 18. "EIDR02,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 17. "EIDR01,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 16. "EIDR00,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
rgroup.word 0x4++0x3
line.word 0x0 "EIDR,Port Control Register 2"
bitfld.word 0x0 15. "EIDR15,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 14. "EIDR14,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 13. "EIDR13,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 12. "EIDR12,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 11. "EIDR11,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 10. "EIDR10,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 9. "EIDR09,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 8. "EIDR08,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 7. "EIDR07,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 6. "EIDR06,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 5. "EIDR05,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 4. "EIDR04,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 3. "EIDR03,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 2. "EIDR02,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 1. "EIDR01,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 0. "EIDR00,Port Event Input Data" "0: Low input,1: High input"
line.word 0x2 "PIDR,Port Control Register 2"
bitfld.word 0x2 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 0. "PIDR00,Pmn State" "0: Low level,1: High level"
wgroup.long 0x8++0x3
line.long 0x0 "PCNTR3,Port Control Register 3"
bitfld.long 0x0 31. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
wgroup.word 0x8++0x3
line.word 0x0 "PORR,Port Control Register 3"
bitfld.word 0x0 15. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "POSR,Port Control Register 3"
bitfld.word 0x2 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
group.long 0xC++0x3
line.long 0x0 "PCNTR4,Port Control Register 4"
bitfld.long 0x0 31. "EORR15,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "EORR14,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "EORR13,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "EORR12,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "EORR11,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "EORR10,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "EORR09,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "EORR08,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "EORR07,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "EORR06,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "EORR05,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "EORR04,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "EORR03,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "EORR02,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "EORR01,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "EORR00,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "EOSR15,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "EOSR14,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "EOSR13,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "EOSR12,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "EOSR11,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "EOSR10,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "EOSR09,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "EOSR08,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "EOSR07,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "EOSR06,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "EOSR05,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "EOSR04,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "EOSR03,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "EOSR02,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "EOSR01,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "EOSR00,Pmn Event Output Set" "0: No effect on output,1: High output"
group.word 0xC++0x3
line.word 0x0 "EORR,Port Control Register 4"
bitfld.word 0x0 15. "EORR15,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "EORR14,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "EORR13,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "EORR12,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "EORR11,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "EORR10,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "EORR09,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "EORR08,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "EORR07,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "EORR06,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "EORR05,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "EORR04,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "EORR03,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "EORR02,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "EORR01,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "EORR00,Pmn Event Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "EOSR,Port Control Register 4"
bitfld.word 0x2 15. "EOSR15,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "EOSR14,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "EOSR13,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "EOSR12,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "EOSR11,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "EOSR10,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "EOSR09,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "EOSR08,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "EOSR07,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "EOSR06,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "EOSR05,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "EOSR04,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "EOSR03,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "EOSR02,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "EOSR01,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "EOSR00,Pmn Event Output Set" "0: No effect on output,1: High output"
tree.end
tree "PORT2"
base ad:0x40080040
group.long 0x0++0x3
line.long 0x0 "PCNTR1,Port Control Register 1"
bitfld.long 0x0 31. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 30. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 29. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 28. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 27. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 26. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 25. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 24. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 23. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 22. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 21. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 20. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 19. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 18. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 17. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 16. "PODR00,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
group.word 0x0++0x3
line.word 0x0 "PODR,Port Control Register 1"
bitfld.word 0x0 15. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 14. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 13. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 12. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 11. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 10. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 9. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 8. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 7. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 6. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 5. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 4. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 3. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 2. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 1. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 0. "PODR00,Pmn Output Data" "0: Low output,1: High output"
line.word 0x2 "PDR,Port Control Register 1"
bitfld.word 0x2 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rgroup.long 0x4++0x3
line.long 0x0 "PCNTR2,Port Control Register 2"
bitfld.long 0x0 31. "EIDR15,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 30. "EIDR14,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 29. "EIDR13,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 28. "EIDR12,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 27. "EIDR11,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 26. "EIDR10,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 25. "EIDR09,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 24. "EIDR08,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 23. "EIDR07,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 22. "EIDR06,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 21. "EIDR05,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 20. "EIDR04,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 19. "EIDR03,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 18. "EIDR02,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 17. "EIDR01,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 16. "EIDR00,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
rgroup.word 0x4++0x3
line.word 0x0 "EIDR,Port Control Register 2"
bitfld.word 0x0 15. "EIDR15,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 14. "EIDR14,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 13. "EIDR13,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 12. "EIDR12,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 11. "EIDR11,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 10. "EIDR10,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 9. "EIDR09,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 8. "EIDR08,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 7. "EIDR07,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 6. "EIDR06,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 5. "EIDR05,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 4. "EIDR04,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 3. "EIDR03,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 2. "EIDR02,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 1. "EIDR01,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 0. "EIDR00,Port Event Input Data" "0: Low input,1: High input"
line.word 0x2 "PIDR,Port Control Register 2"
bitfld.word 0x2 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 0. "PIDR00,Pmn State" "0: Low level,1: High level"
wgroup.long 0x8++0x3
line.long 0x0 "PCNTR3,Port Control Register 3"
bitfld.long 0x0 31. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
wgroup.word 0x8++0x3
line.word 0x0 "PORR,Port Control Register 3"
bitfld.word 0x0 15. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "POSR,Port Control Register 3"
bitfld.word 0x2 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
group.long 0xC++0x3
line.long 0x0 "PCNTR4,Port Control Register 4"
bitfld.long 0x0 31. "EORR15,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "EORR14,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "EORR13,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "EORR12,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "EORR11,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "EORR10,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "EORR09,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "EORR08,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "EORR07,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "EORR06,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "EORR05,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "EORR04,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "EORR03,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "EORR02,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "EORR01,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "EORR00,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "EOSR15,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "EOSR14,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "EOSR13,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "EOSR12,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "EOSR11,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "EOSR10,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "EOSR09,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "EOSR08,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "EOSR07,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "EOSR06,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "EOSR05,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "EOSR04,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "EOSR03,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "EOSR02,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "EOSR01,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "EOSR00,Pmn Event Output Set" "0: No effect on output,1: High output"
group.word 0xC++0x3
line.word 0x0 "EORR,Port Control Register 4"
bitfld.word 0x0 15. "EORR15,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "EORR14,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "EORR13,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "EORR12,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "EORR11,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "EORR10,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "EORR09,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "EORR08,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "EORR07,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "EORR06,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "EORR05,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "EORR04,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "EORR03,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "EORR02,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "EORR01,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "EORR00,Pmn Event Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "EOSR,Port Control Register 4"
bitfld.word 0x2 15. "EOSR15,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "EOSR14,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "EOSR13,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "EOSR12,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "EOSR11,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "EOSR10,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "EOSR09,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "EOSR08,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "EOSR07,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "EOSR06,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "EOSR05,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "EOSR04,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "EOSR03,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "EOSR02,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "EOSR01,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "EOSR00,Pmn Event Output Set" "0: No effect on output,1: High output"
tree.end
tree "PORT3"
base ad:0x40080060
group.long 0x0++0x3
line.long 0x0 "PCNTR1,Port Control Register 1"
bitfld.long 0x0 31. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 30. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 29. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 28. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 27. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 26. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 25. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 24. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 23. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 22. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 21. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 20. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 19. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 18. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 17. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 16. "PODR00,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
group.word 0x0++0x3
line.word 0x0 "PODR,Port Control Register 1"
bitfld.word 0x0 15. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 14. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 13. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 12. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 11. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 10. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 9. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 8. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 7. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 6. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 5. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 4. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 3. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 2. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 1. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 0. "PODR00,Pmn Output Data" "0: Low output,1: High output"
line.word 0x2 "PDR,Port Control Register 1"
bitfld.word 0x2 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rgroup.long 0x4++0x3
line.long 0x0 "PCNTR2,Port Control Register 2"
bitfld.long 0x0 31. "EIDR15,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 30. "EIDR14,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 29. "EIDR13,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 28. "EIDR12,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 27. "EIDR11,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 26. "EIDR10,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 25. "EIDR09,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 24. "EIDR08,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 23. "EIDR07,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 22. "EIDR06,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 21. "EIDR05,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 20. "EIDR04,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 19. "EIDR03,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 18. "EIDR02,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 17. "EIDR01,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 16. "EIDR00,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
rgroup.word 0x4++0x3
line.word 0x0 "EIDR,Port Control Register 2"
bitfld.word 0x0 15. "EIDR15,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 14. "EIDR14,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 13. "EIDR13,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 12. "EIDR12,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 11. "EIDR11,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 10. "EIDR10,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 9. "EIDR09,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 8. "EIDR08,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 7. "EIDR07,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 6. "EIDR06,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 5. "EIDR05,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 4. "EIDR04,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 3. "EIDR03,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 2. "EIDR02,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 1. "EIDR01,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 0. "EIDR00,Port Event Input Data" "0: Low input,1: High input"
line.word 0x2 "PIDR,Port Control Register 2"
bitfld.word 0x2 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 0. "PIDR00,Pmn State" "0: Low level,1: High level"
wgroup.long 0x8++0x3
line.long 0x0 "PCNTR3,Port Control Register 3"
bitfld.long 0x0 31. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
wgroup.word 0x8++0x3
line.word 0x0 "PORR,Port Control Register 3"
bitfld.word 0x0 15. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "POSR,Port Control Register 3"
bitfld.word 0x2 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
group.long 0xC++0x3
line.long 0x0 "PCNTR4,Port Control Register 4"
bitfld.long 0x0 31. "EORR15,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "EORR14,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "EORR13,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "EORR12,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "EORR11,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "EORR10,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "EORR09,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "EORR08,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "EORR07,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "EORR06,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "EORR05,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "EORR04,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "EORR03,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "EORR02,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "EORR01,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "EORR00,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "EOSR15,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "EOSR14,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "EOSR13,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "EOSR12,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "EOSR11,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "EOSR10,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "EOSR09,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "EOSR08,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "EOSR07,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "EOSR06,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "EOSR05,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "EOSR04,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "EOSR03,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "EOSR02,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "EOSR01,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "EOSR00,Pmn Event Output Set" "0: No effect on output,1: High output"
group.word 0xC++0x3
line.word 0x0 "EORR,Port Control Register 4"
bitfld.word 0x0 15. "EORR15,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "EORR14,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "EORR13,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "EORR12,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "EORR11,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "EORR10,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "EORR09,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "EORR08,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "EORR07,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "EORR06,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "EORR05,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "EORR04,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "EORR03,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "EORR02,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "EORR01,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "EORR00,Pmn Event Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "EOSR,Port Control Register 4"
bitfld.word 0x2 15. "EOSR15,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "EOSR14,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "EOSR13,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "EOSR12,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "EOSR11,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "EOSR10,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "EOSR09,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "EOSR08,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "EOSR07,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "EOSR06,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "EOSR05,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "EOSR04,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "EOSR03,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "EOSR02,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "EOSR01,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "EOSR00,Pmn Event Output Set" "0: No effect on output,1: High output"
tree.end
tree "PORT4"
base ad:0x40080080
group.long 0x0++0x3
line.long 0x0 "PCNTR1,Port Control Register 1"
bitfld.long 0x0 31. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 30. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 29. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 28. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 27. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 26. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 25. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 24. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 23. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 22. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 21. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 20. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 19. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 18. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 17. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 16. "PODR00,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
group.word 0x0++0x3
line.word 0x0 "PODR,Port Control Register 1"
bitfld.word 0x0 15. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 14. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 13. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 12. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 11. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 10. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 9. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 8. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 7. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 6. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 5. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 4. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 3. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 2. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 1. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 0. "PODR00,Pmn Output Data" "0: Low output,1: High output"
line.word 0x2 "PDR,Port Control Register 1"
bitfld.word 0x2 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rgroup.long 0x4++0x3
line.long 0x0 "PCNTR2,Port Control Register 2"
bitfld.long 0x0 31. "EIDR15,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 30. "EIDR14,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 29. "EIDR13,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 28. "EIDR12,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 27. "EIDR11,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 26. "EIDR10,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 25. "EIDR09,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 24. "EIDR08,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 23. "EIDR07,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 22. "EIDR06,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 21. "EIDR05,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 20. "EIDR04,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 19. "EIDR03,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 18. "EIDR02,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 17. "EIDR01,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.long 0x0 16. "EIDR00,Port Event Input Data" "0: Low input,1: High input"
bitfld.long 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
rgroup.word 0x4++0x3
line.word 0x0 "EIDR,Port Control Register 2"
bitfld.word 0x0 15. "EIDR15,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 14. "EIDR14,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 13. "EIDR13,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 12. "EIDR12,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 11. "EIDR11,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 10. "EIDR10,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 9. "EIDR09,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 8. "EIDR08,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 7. "EIDR07,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 6. "EIDR06,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 5. "EIDR05,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 4. "EIDR04,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 3. "EIDR03,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 2. "EIDR02,Port Event Input Data" "0: Low input,1: High input"
bitfld.word 0x0 1. "EIDR01,Port Event Input Data" "0: Low input,1: High input"
newline
bitfld.word 0x0 0. "EIDR00,Port Event Input Data" "0: Low input,1: High input"
line.word 0x2 "PIDR,Port Control Register 2"
bitfld.word 0x2 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.word 0x2 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x2 0. "PIDR00,Pmn State" "0: Low level,1: High level"
wgroup.long 0x8++0x3
line.long 0x0 "PCNTR3,Port Control Register 3"
bitfld.long 0x0 31. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
wgroup.word 0x8++0x3
line.word 0x0 "PORR,Port Control Register 3"
bitfld.word 0x0 15. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "POSR,Port Control Register 3"
bitfld.word 0x2 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
group.long 0xC++0x3
line.long 0x0 "PCNTR4,Port Control Register 4"
bitfld.long 0x0 31. "EORR15,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "EORR14,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "EORR13,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "EORR12,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "EORR11,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "EORR10,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "EORR09,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "EORR08,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "EORR07,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "EORR06,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "EORR05,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "EORR04,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "EORR03,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "EORR02,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "EORR01,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "EORR00,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "EOSR15,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "EOSR14,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "EOSR13,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "EOSR12,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "EOSR11,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "EOSR10,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "EOSR09,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "EOSR08,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "EOSR07,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "EOSR06,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "EOSR05,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "EOSR04,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "EOSR03,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "EOSR02,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "EOSR01,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "EOSR00,Pmn Event Output Set" "0: No effect on output,1: High output"
group.word 0xC++0x3
line.word 0x0 "EORR,Port Control Register 4"
bitfld.word 0x0 15. "EORR15,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "EORR14,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "EORR13,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "EORR12,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "EORR11,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "EORR10,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "EORR09,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "EORR08,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "EORR07,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "EORR06,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "EORR05,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "EORR04,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "EORR03,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "EORR02,Pmn Event Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "EORR01,Pmn Event Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "EORR00,Pmn Event Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "EOSR,Port Control Register 4"
bitfld.word 0x2 15. "EOSR15,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "EOSR14,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "EOSR13,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "EOSR12,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "EOSR11,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "EOSR10,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "EOSR09,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "EOSR08,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "EOSR07,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "EOSR06,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "EOSR05,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "EOSR04,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "EOSR03,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "EOSR02,Pmn Event Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "EOSR01,Pmn Event Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "EOSR00,Pmn Event Output Set" "0: No effect on output,1: High output"
tree.end
tree "PORT5"
base ad:0x400800A0
group.long 0x0++0x3
line.long 0x0 "PCNTR1,Port Control Register 1"
bitfld.long 0x0 31. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 30. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 29. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 28. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 27. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 26. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 25. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 24. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 23. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 22. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 21. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 20. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 19. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 18. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 17. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 16. "PODR00,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
group.word 0x0++0x3
line.word 0x0 "PODR,Port Control Register 1"
bitfld.word 0x0 15. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 14. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 13. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 12. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 11. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 10. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 9. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 8. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 7. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 6. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 5. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 4. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 3. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 2. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 1. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 0. "PODR00,Pmn Output Data" "0: Low output,1: High output"
line.word 0x2 "PDR,Port Control Register 1"
bitfld.word 0x2 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rgroup.long 0x4++0x3
line.long 0x0 "PCNTR2,Port Control Register 2"
bitfld.long 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
rgroup.word 0x6++0x1
line.word 0x0 "PIDR,Port Control Register 2"
bitfld.word 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
wgroup.long 0x8++0x3
line.long 0x0 "PCNTR3,Port Control Register 3"
bitfld.long 0x0 31. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
wgroup.word 0x8++0x3
line.word 0x0 "PORR,Port Control Register 3"
bitfld.word 0x0 15. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "POSR,Port Control Register 3"
bitfld.word 0x2 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
tree.end
tree "PORT8"
base ad:0x40080100
group.long 0x0++0x3
line.long 0x0 "PCNTR1,Port Control Register 1"
bitfld.long 0x0 31. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 30. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 29. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 28. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 27. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 26. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 25. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 24. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 23. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 22. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 21. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 20. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 19. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 18. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 17. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.long 0x0 16. "PODR00,Pmn Output Data" "0: Low output,1: High output"
bitfld.long 0x0 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.long 0x0 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.long 0x0 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
group.word 0x0++0x3
line.word 0x0 "PODR,Port Control Register 1"
bitfld.word 0x0 15. "PODR15,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 14. "PODR14,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 13. "PODR13,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 12. "PODR12,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 11. "PODR11,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 10. "PODR10,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 9. "PODR09,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 8. "PODR08,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 7. "PODR07,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 6. "PODR06,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 5. "PODR05,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 4. "PODR04,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 3. "PODR03,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 2. "PODR02,Pmn Output Data" "0: Low output,1: High output"
bitfld.word 0x0 1. "PODR01,Pmn Output Data" "0: Low output,1: High output"
newline
bitfld.word 0x0 0. "PODR00,Pmn Output Data" "0: Low output,1: High output"
line.word 0x2 "PDR,Port Control Register 1"
bitfld.word 0x2 15. "PDR15,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 14. "PDR14,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 13. "PDR13,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 12. "PDR12,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 11. "PDR11,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 10. "PDR10,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 9. "PDR09,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 8. "PDR08,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 7. "PDR07,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 6. "PDR06,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 5. "PDR05,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 4. "PDR04,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 3. "PDR03,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 2. "PDR02,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
bitfld.word 0x2 1. "PDR01,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
newline
bitfld.word 0x2 0. "PDR00,Pmn Direction" "0: Input (functions as an input pin),1: Output (functions as an output pin)"
rgroup.long 0x4++0x3
line.long 0x0 "PCNTR2,Port Control Register 2"
bitfld.long 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.long 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.long 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
rgroup.word 0x6++0x1
line.word 0x0 "PIDR,Port Control Register 2"
bitfld.word 0x0 15. "PIDR15,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 14. "PIDR14,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 13. "PIDR13,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 12. "PIDR12,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 11. "PIDR11,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 10. "PIDR10,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 9. "PIDR09,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 8. "PIDR08,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 7. "PIDR07,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 6. "PIDR06,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 5. "PIDR05,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 4. "PIDR04,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 3. "PIDR03,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 2. "PIDR02,Pmn State" "0: Low level,1: High level"
bitfld.word 0x0 1. "PIDR01,Pmn State" "0: Low level,1: High level"
newline
bitfld.word 0x0 0. "PIDR00,Pmn State" "0: Low level,1: High level"
wgroup.long 0x8++0x3
line.long 0x0 "PCNTR3,Port Control Register 3"
bitfld.long 0x0 31. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 30. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 29. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 28. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 27. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 26. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 25. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 24. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 23. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 22. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 21. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 20. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 19. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 18. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 17. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.long 0x0 16. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.long 0x0 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.long 0x0 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.long 0x0 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
wgroup.word 0x8++0x3
line.word 0x0 "PORR,Port Control Register 3"
bitfld.word 0x0 15. "PORR15,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 14. "PORR14,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 13. "PORR13,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 12. "PORR12,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 11. "PORR11,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 10. "PORR10,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 9. "PORR09,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 8. "PORR08,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 7. "PORR07,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 6. "PORR06,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 5. "PORR05,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 4. "PORR04,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 3. "PORR03,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 2. "PORR02,Pmn Output Reset" "0: No effect on output,1: Low output"
bitfld.word 0x0 1. "PORR01,Pmn Output Reset" "0: No effect on output,1: Low output"
newline
bitfld.word 0x0 0. "PORR00,Pmn Output Reset" "0: No effect on output,1: Low output"
line.word 0x2 "POSR,Port Control Register 3"
bitfld.word 0x2 15. "POSR15,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 14. "POSR14,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 13. "POSR13,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 12. "POSR12,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 11. "POSR11,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 10. "POSR10,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 9. "POSR09,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 8. "POSR08,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 7. "POSR07,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 6. "POSR06,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 5. "POSR05,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 4. "POSR04,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 3. "POSR03,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 2. "POSR02,Pmn Output Set" "0: No effect on output,1: High output"
bitfld.word 0x2 1. "POSR01,Pmn Output Set" "0: No effect on output,1: High output"
newline
bitfld.word 0x2 0. "POSR00,Pmn Output Set" "0: No effect on output,1: High output"
tree.end
tree.end
tree "PSCU (Peripheral Security Control Unit)"
base ad:0x400E0000
group.long 0x4++0x27
line.long 0x0 "PSARB,Peripheral Security Attribution Register B"
bitfld.long 0x0 31. "PSARB31,SCI0 and the MSTPCRB.MSTPB31 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x0 22. "PSARB22,SCI9 and the MSTPCRB.MSTPB22 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x0 19. "PSARB19,SPI0 and the MSTPCRB.MSTPB19 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x0 18. "PSARB18,SPI1 and the MSTPCRB.MSTPB18 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x0 11. "PSARB11,USBFS and the MSTPCRB.MSTPB11 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x0 4. "PSARB4,I3C and the MSTPCRB.MSTPB4 bit security attribution" "0: Secure,1: Non-secure"
newline
bitfld.long 0x0 3. "PSARB3,CEC and the MSTPCRB.MSTPB3 bit security attribution" "0: Secure,1: Non-secure"
line.long 0x4 "PSARC,Peripheral Security Attribution Register C"
bitfld.long 0x4 28. "PSARC28,TRNG and the MSTPCRC.MSTPC28 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x4 27. "PSARC27,CANFD0 and the MSTPCRC.MSTPC27 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x4 13. "PSARC13,DOC and the MSTPCRC.MSTPC13 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x4 8. "PSARC8,SSIE0 and the MSTPCRC.MSTPC8 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x4 1. "PSARC1,CRC and the MSTPCRC.MSTPC1 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x4 0. "PSARC0,CAC and the MSTPCRC.MSTPC0 bit security attribution" "0: Secure,1: Non-secure"
line.long 0x8 "PSARD,Peripheral Security Attribution Register D"
bitfld.long 0x8 22. "PSARD22,TSN and the MSTPCRD.MSTPD22 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x8 20. "PSARD20,DAC12 and the MSTPCRD.MSTPD20 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x8 16. "PSARD16,ADC120 and the MSTPCRD.MSTPD16 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x8 14. "PSARD14,POEG Group A and the MSTPCRD.MSTPD14 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x8 13. "PSARD13,POEG Group B and the MSTPCRD.MSTPD13 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x8 12. "PSARD12,POEG Group C and the MSTPCRD.MSTPD12 bit security attribution" "0: Secure,1: Non-secure"
newline
bitfld.long 0x8 11. "PSARD11,POEG Group D and the MSTPCRD.MSTPD11 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x8 3. "PSARD3,AGT0 and the MSTPCRD.MSTPD3 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x8 2. "PSARD2,AGT1 and the MSTPCRD.MSTPD2 bit security attribution" "0: Secure,1: Non-secure"
line.long 0xC "PSARE,Peripheral Security Attribution Register E"
bitfld.long 0xC 31. "PSARE31,GPT0 GPT_OPS and the MSTPCRE.MSTPE31 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0xC 30. "PSARE30,GPT1 and the MSTPCRE.MSTPE30 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0xC 27. "PSARE27,GPT4 and the MSTPCRE.MSTPE27 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0xC 26. "PSARE26,GPT5 and the MSTPCRE.MSTPE26 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0xC 2. "PSARE2,RTC security attribution" "0: Secure,1: Non-secure"
bitfld.long 0xC 1. "PSARE1,IWDT security attribution" "0: Secure,1: Non-secure"
newline
bitfld.long 0xC 0. "PSARE0,WDT security attribution" "0: Secure,1: Non-secure"
line.long 0x10 "MSSAR,Module Stop Security Attribution Register"
bitfld.long 0x10 3. "MSSAR3,The MSTPCRA.MSTPA0 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x10 2. "MSSAR2,The MSTPCRA.MSTPA7 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x10 1. "MSSAR1,The MSTPCRA.MSTPA22 bit security attribution" "0: Secure,1: Non-secure"
bitfld.long 0x10 0. "MSSAR0,The MSTPCRC.MSTPC14 bit security attribution" "0: Secure,1: Non-secure"
line.long 0x14 "CFSAMONA,Code Flash Security Attribution Register A"
hexmask.long.word 0x14 15.--23. 1. "CFS2,Code Flash Secure area 2"
line.long 0x18 "CFSAMONB,Code Flash Security Attribution Register B"
hexmask.long.word 0x18 10.--23. 1. "CFS1,Code Flash Secure area 1"
line.long 0x1C "DFSAMON,Data Flash Security Attribution Register"
hexmask.long.byte 0x1C 10.--15. 1. "DFS,Data flash Secure area"
line.long 0x20 "SSAMONA,SRAM Security Attribution Register A"
hexmask.long.byte 0x20 13.--20. 1. "SS2,SRAM Secure area 2"
line.long 0x24 "SSAMONB,SRAM Security Attribution Register B"
hexmask.long.word 0x24 10.--20. 1. "SS1,SRAM secure area 1"
tree.end
tree "RMPU (Renesas Memory Protection Unit)"
base ad:0x40000000
group.word 0x0++0x1
line.word 0x0 "MMPUOAD,MMPU Operation After Detection Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,This bit enables or disables writes to the OAD bit."
bitfld.word 0x0 0. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Reset"
group.word 0x4++0x1
line.word 0x0 "MMPUOADPT,MMPU Operation After Detection Protect Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,Key code"
bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUOAD register writes are possible.,1: MMPUOAD register writes are protected. Read is.."
group.word 0x100++0x1
line.word 0x0 "MMPUENDMAC,MMPU Enable Register for DMAC"
hexmask.word.byte 0x0 8.--15. 1. "KEY,These bits enable or disable writes to the ENABLE bit."
bitfld.word 0x0 0. "ENABLE,Bus Master MPU of DMAC enable" "0: Bus Master MPU of DMAC is disabled.,1: Bus Master MPU of DMAC is enabled."
group.word 0x104++0x1
line.word 0x0 "MMPUENPTDMAC,MMPU Enable Protect Register for DMAC"
hexmask.word.byte 0x0 8.--15. 1. "KEY,These bits enable or disable writes to the PROTECT bit."
bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENDMAC register writes are possible.,1: MMPUENDMAC register writes are protected. Read.."
group.word 0x108++0x1
line.word 0x0 "MMPURPTDMAC,MMPU Regions Protect Register for DMAC"
hexmask.word.byte 0x0 8.--15. 1. "KEY,These bits enable or disable writes to the PROTECT bit."
bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus Master MPU register for DMAC writing is..,1: Bus Master MPU register for DMAC writing is.."
group.word 0x10C++0x1
line.word 0x0 "MMPURPTDMAC_SEC,MMPU Regions Protect register for DMAC Secure"
hexmask.word.byte 0x0 8.--15. 1. "KEY,These bits enable or disable writes to the PROTECT bit."
bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for DMAC secure writes..,1: Bus master MPU register for DMAC secure writes.."
repeat 8. (increment 0x0 0x1)(increment 0x0 0x10)
group.word ($2+0x200)++0x1
line.word 0x0 "MMPUACDMAC$1,MMPU Access Control Register for DMAC"
bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection"
bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection"
bitfld.word 0x0 0. "ENABLE,Region enable" "0: DMAC Region n unit is disabled,1: DMAC Region n unit is enabled"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x10)
group.long ($2+0x204)++0x3
line.long 0x0 "MMPUSDMAC$1,MMPU Start Address Register for DMAC"
hexmask.long 0x0 5.--31. 1. "MMPUS,Region start address register"
repeat.end
repeat 8. (increment 0x0 0x1)(increment 0x0 0x10)
group.long ($2+0x208)++0x3
line.long 0x0 "MMPUEDMAC$1,MMPU End Address Register for DMAC"
hexmask.long 0x0 5.--31. 1. "MMPUE,Region end address register"
repeat.end
tree.end
tree "RTC (Realtime Clock)"
base ad:0x40083000
rgroup.byte 0x0++0x0
line.byte 0x0 "R64CNT,64-Hz Counter"
bitfld.byte 0x0 6. "F1HZ,1-Hz Flag" "?,1: Hz Flag"
bitfld.byte 0x0 5. "F2HZ,2-Hz Flag" "0,1"
newline
bitfld.byte 0x0 4. "F4HZ,4-Hz Flag" "0,1"
bitfld.byte 0x0 3. "F8HZ,8-Hz Flag" "0,1"
newline
bitfld.byte 0x0 2. "F16HZ,16-Hz Flag" "0,1"
bitfld.byte 0x0 1. "F32HZ,32-Hz Flag" "0,1"
newline
bitfld.byte 0x0 0. "F64HZ,64-Hz Flag" "0,1"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2)
group.byte ($2+0x2)++0x0
line.byte 0x0 "BCNT$1,Binary Counter %s"
hexmask.byte 0x0 0.--7. 1. "BCNT,Binary Counter"
repeat.end
group.byte 0x2++0x0
line.byte 0x0 "RSECCNT,Second Counter (in Calendar Count Mode)"
bitfld.byte 0x0 4.--6. "SEC10,10-Second Count" "0,1,2,3,4,5,6,7"
hexmask.byte 0x0 0.--3. 1. "SEC1,1-Second Count"
group.byte 0x4++0x0
line.byte 0x0 "RMINCNT,Minute Counter (in Calendar Count Mode)"
bitfld.byte 0x0 4.--6. "MIN10,10-Minute Count" "0,1,2,3,4,5,6,7"
hexmask.byte 0x0 0.--3. 1. "MIN1,1-Minute Count"
group.byte 0x6++0x0
line.byte 0x0 "RHRCNT,Hour Counter (in Calendar Count Mode)"
bitfld.byte 0x0 6. "PM,AM/PM select for time counter setting." "0: AM,1: PM"
bitfld.byte 0x0 4.--5. "HR10,10-Hour Count" "0,1,2,3"
newline
hexmask.byte 0x0 0.--3. 1. "HR1,1-Hour Count"
group.byte 0x8++0x0
line.byte 0x0 "RWKCNT,Day-of-Week Counter (in Calendar Count Mode)"
bitfld.byte 0x0 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,?,?,?,?,?,?"
group.byte 0xA++0x0
line.byte 0x0 "RDAYCNT,Day Counter"
bitfld.byte 0x0 4.--5. "DATE10,10-Day Count" "0,1,2,3"
hexmask.byte 0x0 0.--3. 1. "DATE1,1-Day Count"
group.byte 0xC++0x0
line.byte 0x0 "RMONCNT,Month Counter"
bitfld.byte 0x0 4. "MON10,10-Month Count" "0,1"
hexmask.byte 0x0 0.--3. 1. "MON1,1-Month Count"
group.word 0xE++0x1
line.word 0x0 "RYRCNT,Year Counter"
hexmask.word.byte 0x0 4.--7. 1. "YR10,10-Year Count"
hexmask.word.byte 0x0 0.--3. 1. "YR1,1-Year Count"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2)
group.byte ($2+0x10)++0x0
line.byte 0x0 "BCNT$1AR,Binary Counter %s Alarm Register"
hexmask.byte 0x0 0.--7. 1. "BCNTAR,Alarm register associated with the 32-bit binary counter"
repeat.end
group.byte 0x10++0x0
line.byte 0x0 "RSECAR,Second Alarm Register (in Calendar Count Mode)"
bitfld.byte 0x0 7. "ENB,ENB" "0: Do not compare register value with RSECCNT..,1: Compare register value with RSECCNT counter value"
bitfld.byte 0x0 4.--6. "SEC10,10 Seconds" "0,1,2,3,4,5,6,7"
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hexmask.byte 0x0 0.--3. 1. "SEC1,1 Second"
group.byte 0x12++0x0
line.byte 0x0 "RMINAR,Minute Alarm Register (in Calendar Count Mode)"
bitfld.byte 0x0 7. "ENB,ENB" "0: Do not compare register value with RMINCNT..,1: Compare register value with RMINCNT counter value"
bitfld.byte 0x0 4.--6. "MIN10,10 Minutes" "0,1,2,3,4,5,6,7"
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hexmask.byte 0x0 0.--3. 1. "MIN1,1 Minute"
group.byte 0x14++0x0
line.byte 0x0 "RHRAR,Hour Alarm Register (in Calendar Count Mode)"
bitfld.byte 0x0 7. "ENB,ENB" "0: Do not compare register value with RHRCNT..,1: Compare register value with RHRCNT counter value"
bitfld.byte 0x0 6. "PM,AM/PM select for alarm setting." "0: AM,1: PM"
newline
bitfld.byte 0x0 4.--5. "HR10,10 Hours" "0,1,2,3"
hexmask.byte 0x0 0.--3. 1. "HR1,1 Hour"
group.byte 0x16++0x0
line.byte 0x0 "RWKAR,Day-of-Week Alarm Register (in Calendar Count Mode)"
bitfld.byte 0x0 7. "ENB,ENB" "0: Do not compare register value with RWKCNT..,1: Compare register value with RWKCNT counter value"
bitfld.byte 0x0 0.--2. "DAYW,Day-of-Week Setting" "0: Sunday,1: Monday,?,?,?,?,?,?"
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
group.byte ($2+0x18)++0x0
line.byte 0x0 "BCNT$1AER,Binary Counter %s Alarm Enable Register"
hexmask.byte 0x0 0.--7. 1. "ENB,Setting the alarm enable associated with the 32-bit binary counter"
repeat.end
group.byte 0x18++0x0
line.byte 0x0 "RDAYAR,Date Alarm Register (in Calendar Count Mode)"
bitfld.byte 0x0 7. "ENB,ENB" "0: Do not compare register value with RDAYCNT..,1: Compare register value with RDAYCNT counter value"
bitfld.byte 0x0 4.--5. "DATE10,10 Days" "0,1,2,3"
newline
hexmask.byte 0x0 0.--3. 1. "DATE1,1 Day"
group.byte 0x1A++0x0
line.byte 0x0 "RMONAR,Month Alarm Register (in Calendar Count Mode)"
bitfld.byte 0x0 7. "ENB,ENB" "0: Do not compare register value with RMONCNT..,1: Compare register value with RMONCNT counter value"
bitfld.byte 0x0 4. "MON10,10 Months" "0,1"
newline
hexmask.byte 0x0 0.--3. 1. "MON1,1 Month"
group.word 0x1C++0x1
line.word 0x0 "BCNT2AER,Binary Counter 2 Alarm Enable Register"
hexmask.word.byte 0x0 0.--7. 1. "ENB,Setting the alarm enable associated with the 32-bit binary counter"
group.word 0x1C++0x1
line.word 0x0 "RYRAR,Year Alarm Register (in Calendar Count Mode)"
hexmask.word.byte 0x0 4.--7. 1. "YR10,10 Years"
hexmask.word.byte 0x0 0.--3. 1. "YR1,1 Year"
group.byte 0x1E++0x0
line.byte 0x0 "BCNT3AER,Binary Counter 3 Alarm Enable Register"
hexmask.byte 0x0 0.--7. 1. "ENB,Setting the alarm enable associated with the 32-bit binary counter"
group.byte 0x1E++0x0
line.byte 0x0 "RYRAREN,Year Alarm Enable Register (in Calendar Count Mode)"
bitfld.byte 0x0 7. "ENB,ENB" "0: Do not compare register value with the RYRCNT..,1: Compare register value with the RYRCNT counter.."
group.byte 0x22++0x0
line.byte 0x0 "RCR1,RTC Control Register 1"
hexmask.byte 0x0 4.--7. 1. "PES,Periodic Interrupt Select"
bitfld.byte 0x0 3. "RTCOS,RTCOUT Output Select" "0: Outputs 1 Hz on RTCOUT,1: Outputs 64 Hz RTCOUT"
newline
bitfld.byte 0x0 2. "PIE,Periodic Interrupt Enable" "0: Disable periodic interrupt requests,1: Enable periodic interrupt requests"
bitfld.byte 0x0 1. "CIE,Carry Interrupt Enable" "0: Disable carry interrupt requests,1: Enable carry interrupt requests"
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bitfld.byte 0x0 0. "AIE,Alarm Interrupt Enable" "0: Disable alarm interrupt requests,1: Enable alarm interrupt requests"
group.byte 0x24++0x0
line.byte 0x0 "RCR2,RTC Control Register 2 (in Calendar Count Mode)"
bitfld.byte 0x0 7. "CNTMD,Count Mode Select" "0: Calendar count mode,1: Binary count mode"
bitfld.byte 0x0 6. "HR24,Hours Mode" "0: Operate RTC in 12-hour mode,1: Operate RTC in 24-hour mode"
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bitfld.byte 0x0 5. "AADJP,Automatic Adjustment Period Select" "0: The RADJ.ADJ[5:0] setting from the count value..,1: The RADJ.ADJ[5:0] setting value is adjusted from.."
bitfld.byte 0x0 4. "AADJE,Automatic Adjustment Enable" "0: Disable automatic adjustment,1: Enable automatic adjustment"
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bitfld.byte 0x0 3. "RTCOE,RTCOUT Output Enable" "0: Disable RTCOUT output,1: Enable RTCOUT output"
bitfld.byte 0x0 2. "ADJ30,30-Second Adjustment" "0: In writing: Invalid (writing 0 has no effect).,1: In writing: Execute 30-second adjustment. In.."
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bitfld.byte 0x0 1. "RESET,RTC Software Reset" "0: In writing: Invalid (writing 0 has no effect).,1: In writing: Initialize the prescaler and target.."
bitfld.byte 0x0 0. "START,Start" "0: Stop prescaler and time counter,1: Operate prescaler and time counter normally"
group.byte 0x24++0x0
line.byte 0x0 "RCR2_BCNT,RTC Control Register 2 (in Binary Count Mode)"
bitfld.byte 0x0 7. "CNTMD,Count Mode Select" "0: Calendar count mode,1: Binary count mode"
bitfld.byte 0x0 5. "AADJP,Automatic Adjustment Period Select" "0: Add or subtract RADJ.ADJ [5:0] bits from..,1: Add or subtract RADJ.ADJ [5:0] bits from.."
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bitfld.byte 0x0 4. "AADJE,Automatic Adjustment Enable" "0: Disable automatic adjustment,1: Enable automatic adjustment"
bitfld.byte 0x0 3. "RTCOE,RTCOUT Output Enable" "0: Disable RTCOUT output,1: Enable RTCOUT output"
newline
bitfld.byte 0x0 1. "RESET,RTC Software Reset" "0: In writing: Invalid (writing 0 has no effect).,1: In writing: Initialize the prescaler and target.."
bitfld.byte 0x0 0. "START,Start" "0: Stop the 32-bit binary counter 64-Hz counter and..,1: Operate the 32-bit binary counter 64-Hz counter.."
group.byte 0x28++0x0
line.byte 0x0 "RCR4,RTC Control Register 4"
bitfld.byte 0x0 0. "RCKSEL,Count Source Select" "0: Sub-clock oscillator is selected,1: LOCO is selected"
group.word 0x2A++0x3
line.word 0x0 "RFRH,Frequency Register H"
bitfld.word 0x0 0. "RFC16,Write 0 before writing to the RFRL register after a cold start." "0,1"
line.word 0x2 "RFRL,Frequency Register L"
hexmask.word 0x2 0.--15. 1. "RFC,Frequency Comparison Value"
group.byte 0x2E++0x0
line.byte 0x0 "RADJ,Time Error Adjustment Register"
bitfld.byte 0x0 6.--7. "PMADJ,Plus-Minus" "0: Do not perform adjustment.,1: Adjustment is performed by the addition to the..,?,?"
hexmask.byte 0x0 0.--5. 1. "ADJ,Adjustment Value"
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
group.byte ($2+0x40)++0x0
line.byte 0x0 "RTCCR$1,Time Capture Control Register %s"
bitfld.byte 0x0 7. "TCEN,Time Capture Event Input Pin Enable" "0: Disable the RTCICn pin as the time capture event..,1: Enable the RTCICn pin as the time capture event.."
bitfld.byte 0x0 4.--5. "TCNF,Time Capture Noise Filter Control" "0: Turn noise filter off,1: Setting prohibited,?,?"
newline
bitfld.byte 0x0 2. "TCST,Time Capture Status" "0: No event detected,1: Event detected"
bitfld.byte 0x0 0.--1. "TCCT,Time Capture Control" "0: Do not detect events,1: Detect rising edge,?,?"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x52)++0x0
line.byte 0x0 "BCNT0CP$1,BCNT0 Capture Register %s"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x52)++0x0
line.byte 0x0 "RSECCP$1,Second Capture Register %s"
bitfld.byte 0x0 4.--6. "SEC10,10-Second Capture" "0,1,2,3,4,5,6,7"
hexmask.byte 0x0 0.--3. 1. "SEC1,1-Second Capture"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x54)++0x0
line.byte 0x0 "BCNT1CP$1,BCNT1 Capture Register %s"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x54)++0x0
line.byte 0x0 "RMINCP$1,Minute Capture Register %s"
bitfld.byte 0x0 4.--6. "MIN10,10-Minute Capture" "0,1,2,3,4,5,6,7"
hexmask.byte 0x0 0.--3. 1. "MIN1,1-Minute Capture"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x56)++0x0
line.byte 0x0 "BCNT2CP$1,BCNT2 Capture Register %s"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x56)++0x0
line.byte 0x0 "RHRCP$1,Hour Capture Register %s"
bitfld.byte 0x0 6. "PM,PM" "0: AM,1: PM"
bitfld.byte 0x0 4.--5. "HR10,10-Hour Capture" "0,1,2,3"
newline
hexmask.byte 0x0 0.--3. 1. "HR1,1-Hour Capture"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x5A)++0x0
line.byte 0x0 "BCNT3CP$1,BCNT3 Capture Register %s"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x5A)++0x0
line.byte 0x0 "RDAYCP$1,Date Capture Register %s"
bitfld.byte 0x0 4.--5. "DATE10,10-Day Capture" "0,1,2,3"
hexmask.byte 0x0 0.--3. 1. "DATE1,1-Day Capture"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x10)
rgroup.byte ($2+0x5C)++0x0
line.byte 0x0 "RMONCP$1,Month Capture Register %s"
bitfld.byte 0x0 4. "MON10,10-Month Capture" "0,1"
hexmask.byte 0x0 0.--3. 1. "MON1,1-Month Capture"
repeat.end
tree.end
tree "SCI (Serial Communications Interface)"
base ad:0x0
tree "SCI0"
base ad:0x40118000
group.byte 0x0++0x0
line.byte 0x0 "SMR,Serial Mode Register for Non-Smart Card Interface Mode (SCMR.SMIF = 0)"
bitfld.byte 0x0 7. "CM,Communication Mode" "0: Asynchronous mode or simple IIC mode,1: Clock synchronous mode or simple SPI mode"
bitfld.byte 0x0 6. "CHR,Character Length" "0: SCMR.CHR1 = 0: Transmit/receive in 9-bit data..,1: SCMR.CHR1 = 0: Transmit/receive in 9-bit data.."
newline
bitfld.byte 0x0 5. "PE,Parity Enable" "0: When transmitting: Do not add parity bit When..,1: When transmitting: Add parity bit When.."
bitfld.byte 0x0 4. "PM,Parity Mode" "0: Even parity,1: Odd parity"
newline
bitfld.byte 0x0 3. "STOP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits"
bitfld.byte 0x0 2. "MP,Multi-Processor Mode" "0: Disable multi-processor communications function,1: Enable multi-processor communications function"
newline
bitfld.byte 0x0 0.--1. "CKS,Clock Select" "0: PCLK clock (n = 0),1: PCLK/4 clock (n = 1),?,?"
group.byte 0x0++0x2
line.byte 0x0 "SMR_SMCI,Serial Mode Register for Smart Card Interface Mode (SCMR.SMIF = 1)"
bitfld.byte 0x0 7. "GM,GSM Mode" "0: Normal mode operation,1: GSM mode operation"
bitfld.byte 0x0 6. "BLK,Block Transfer Mode" "0: Normal mode operation,1: Block transfer mode operation"
newline
bitfld.byte 0x0 5. "PE,Parity Enable" "0,1"
bitfld.byte 0x0 4. "PM,Parity Mode" "0: Even parity,1: Odd parity"
newline
bitfld.byte 0x0 2.--3. "BCP,Base Clock Pulse" "0,1,2,3"
bitfld.byte 0x0 0.--1. "CKS,Clock Select" "0: PCLK clock (n = 0),1: PCLK/4 clock (n = 1),?,?"
line.byte 0x1 "BRR,Bit Rate Register"
line.byte 0x2 "SCR,Serial Control Register for Non-Smart Card Interface Mode (SCMR.SMIF = 0)"
bitfld.byte 0x2 7. "TIE,Transmit Interrupt Enable" "0: Disable SCIn_TXI interrupt requests,1: Enable SCIn_TXI interrupt requests"
bitfld.byte 0x2 6. "RIE,Receive Interrupt Enable" "0: Disable SCIn_RXI and SCIn_ERI interrupt requests,1: Enable SCIn_RXI and SCIn_ERI interrupt requests"
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bitfld.byte 0x2 5. "TE,Transmit Enable" "0: Disable serial transmission,1: Enable serial transmission"
bitfld.byte 0x2 4. "RE,Receive Enable" "0: Disable serial reception,1: Enable serial reception"
newline
bitfld.byte 0x2 3. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When data with the multi-processor bit set to 0.."
bitfld.byte 0x2 2. "TEIE,Transmit End Interrupt Enable" "0: Disable SCIn_TEI interrupt requests,1: Enable SCIn_TEI interrupt requests"
newline
bitfld.byte 0x2 0.--1. "CKE,Clock Enable" "0: In asynchronous mode input a clock with a..,1: In asynchronous mode a clock with the same..,?,?"
group.byte 0x2++0x2
line.byte 0x0 "SCR_SMCI,Serial Control Register for Smart Card Interface Mode (SCMR.SMIF = 1)"
bitfld.byte 0x0 7. "TIE,Transmit Interrupt Enable" "0: Disable SCIn_TXI interrupt requests,1: Enable SCIn_TXI interrupt requests"
bitfld.byte 0x0 6. "RIE,Receive Interrupt Enable" "0: Disable SCIn_RXI and SCIn_ERI interrupt requests,1: Enable SCIn_RXI and SCIn_ERI interrupt requests"
newline
bitfld.byte 0x0 5. "TE,Transmit Enable" "0: Disable serial transmission,1: Enable serial transmission"
bitfld.byte 0x0 4. "RE,Receive Enable" "0: Disable serial reception,1: Enable serial reception"
newline
bitfld.byte 0x0 3. "MPIE,Multi-Processor Interrupt Enable" "0,1"
bitfld.byte 0x0 2. "TEIE,Transmit End Interrupt Enable" "0,1"
newline
bitfld.byte 0x0 0.--1. "CKE,Clock Enable" "0: When SMR_SMCI.GM = 0: Disable output The SCKn..,1: When SMR_SMCI.GM = 0: Output clock When..,?,?"
line.byte 0x1 "TDR,Transmit Data Register"
line.byte 0x2 "SSR,Serial Status Register for Non-Smart Card Interface and Non-FIFO Mode (SCMR.SMIF = 0. FCR.FM = 0. and MMR.MANEN = 0)"
bitfld.byte 0x2 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data in TDR register,1: No transmit data in TDR register"
bitfld.byte 0x2 6. "RDRF,Receive Data Full Flag" "0: No received data in RDR register,1: Received data in RDR register"
newline
bitfld.byte 0x2 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
bitfld.byte 0x2 4. "FER,Framing Error Flag" "0: No framing error occurred,1: Framing error occurred"
newline
bitfld.byte 0x2 3. "PER,Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
rbitfld.byte 0x2 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer is complete"
newline
rbitfld.byte 0x2 1. "MPB,Multi-Processor" "0: Data transmission cycle,1: ID transmission cycle"
bitfld.byte 0x2 0. "MPBT,Multi-Processor Bit Transfer" "0: Data transmission cycle,1: ID transmission cycle"
group.byte 0x4++0x0
line.byte 0x0 "SSR_FIFO,Serial Status Register for Non-Smart Card Interface and FIFO Mode (SCMR.SMIF = 0. FCR.FM = 1. and MMR.MANEN = 0)"
bitfld.byte 0x0 7. "TDFE,Transmit FIFO Data Empty Flag" "0: The amount of transmit data written in FTDRHL..,1: The amount of transmit data written in FTDRHL is.."
bitfld.byte 0x0 6. "RDF,Receive FIFO Data Full Flag" "0: The amount of receive data written in FRDRHL is..,1: The amount of receive data written in FRDRHL is.."
newline
bitfld.byte 0x0 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
bitfld.byte 0x0 4. "FER,Framing Error Flag" "0: No framing error occurred,1: Framing error occurred"
newline
bitfld.byte 0x0 3. "PER,Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
bitfld.byte 0x0 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer is complete"
newline
bitfld.byte 0x0 0. "DR,Receive Data Ready Flag" "0: Receiving is in progress or no received data..,1: Next receive data is not received for a period.."
group.byte 0x4++0x0
line.byte 0x0 "SSR_MANC,Serial Status Register for Manchester Mode (SCMR.SMIF = 0. and MMR.MANEN = 1)"
bitfld.byte 0x0 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register"
bitfld.byte 0x0 6. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register"
newline
bitfld.byte 0x0 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred"
bitfld.byte 0x0 4. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred"
newline
bitfld.byte 0x0 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
rbitfld.byte 0x0 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed."
newline
rbitfld.byte 0x0 1. "MPB,Multi-Processor" "0: Data transmission cycles,1: ID transmission cycles"
bitfld.byte 0x0 0. "MER,Manchester Error Flag" "0: No Manchester error occurred,1: Manchester error has occurred"
group.byte 0x4++0x0
line.byte 0x0 "SSR_SMCI,Serial Status Register for Smart Card Interface Mode (SCMR.SMIF = 1. and MMR.MANEN = 0)"
bitfld.byte 0x0 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data in TDR register,1: No transmit data in TDR register"
bitfld.byte 0x0 6. "RDRF,Receive Data Full Flag" "0: No received data in RDR register,1: Received data in RDR register"
newline
bitfld.byte 0x0 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
bitfld.byte 0x0 4. "ERS,Error Signal Status Flag" "0: No low error signal response,1: Low error signal response occurred"
newline
bitfld.byte 0x0 3. "PER,Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
rbitfld.byte 0x0 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer is complete"
newline
rbitfld.byte 0x0 1. "MPB,Multi-Processor" "0,1"
bitfld.byte 0x0 0. "MPBT,Multi-Processor Bit Transfer" "0,1"
rgroup.byte 0x5++0x0
line.byte 0x0 "RDR,Receive Data Register"
group.byte 0x6++0x5
line.byte 0x0 "SCMR,Smart Card Mode Register"
bitfld.byte 0x0 7. "BCP2,Base Clock Pulse 2" "0,1"
bitfld.byte 0x0 4. "CHR1,Character Length 1" "0: SMR.CHR = 0: Transmit/receive in 9-bit data..,1: SMR.CHR = 0: Transmit/receive in 8-bit data.."
newline
bitfld.byte 0x0 3. "SDIR,Transmitted/Received Data Transfer Direction" "0: Transfer LSB-first,1: Transfer MSB-first"
bitfld.byte 0x0 2. "SINV,Transmitted/Received Data Invert" "0: TDR contents are transmitted as they are.,1: TDR register contents are inverted before.."
newline
bitfld.byte 0x0 0. "SMIF,Smart Card Interface Mode Select" "0: Non-smart card interface mode (asynchronous mode..,1: Smart card interface mode"
line.byte 0x1 "SEMR,Serial Extended Mode Register"
bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: Detect low level on RXDn pin as start bit,1: Detect falling edge of RXDn pin as start bit"
bitfld.byte 0x1 6. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Output clock from baud rate generator with..,1: Output clock from baud rate generator with.."
newline
bitfld.byte 0x1 5. "NFEN,Digital Noise Filter Function Enable" "0: In asynchronous mode: Disable noise cancellation..,1: In asynchronous mode: Enable noise cancellation.."
bitfld.byte 0x1 4. "ABCS,Asynchronous Mode Base Clock Select" "0: Select 16 base clock cycles for 1-bit period,1: Select 8 base clock cycles for 1-bit period"
newline
bitfld.byte 0x1 3. "ABCSE,Asynchronous Mode Extended Base Clock Select 1" "0: Clock cycles for 1-bit period determined by..,1: Baud rate is 6 base clock cycles for 1-bit period"
bitfld.byte 0x1 2. "BRME,Bit Rate Modulation Enable" "0: Disable bit rate modulation function,1: Enable bit rate modulation function"
newline
bitfld.byte 0x1 1. "PADIS,Preamble function Disable" "0: Preamble output function is enabled,1: Preamble output function is disabled"
line.byte 0x2 "SNFR,Noise Filter Setting Register"
bitfld.byte 0x2 0.--2. "NFCS,Noise Filter Clock Select" "0: Setting prohibited,1: In asynchronous mode: Setting prohibited In..,?,?,?,?,?,?"
line.byte 0x3 "SIMR1,IIC Mode Register 1"
hexmask.byte 0x3 3.--7. 1. "IICDL,SDAn Delay Output Select"
bitfld.byte 0x3 0. "IICM,Simple IIC Mode Select" "0: SCMR.SMIF = 0: Asynchronous mode (including..,1: SCMR.SMIF = 0: Simple IIC mode SCMR.SMIF = 1:.."
line.byte 0x4 "SIMR2,IIC Mode Register 2"
bitfld.byte 0x4 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and ACK/NACK reception"
bitfld.byte 0x4 1. "IICCSC,Clock Synchronization" "0: Do not synchronize with clock signal,1: Synchronize with clock signal"
newline
bitfld.byte 0x4 0. "IICINTM,IIC Interrupt Mode Select" "0: Use ACK/NACK interrupts,1: Use reception and transmission interrupts"
line.byte 0x5 "SIMR3,IIC Mode Register 3"
bitfld.byte 0x5 6.--7. "IICSCLS,SCLn Output Select" "0: Output serial clock,1: Generate start restart or stop condition,?,?"
bitfld.byte 0x5 4.--5. "IICSDAS,SDAn Output Select" "0: Output serial data,1: Generate start restart or stop condition,?,?"
newline
bitfld.byte 0x5 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: No requests are being made for generating..,1: Generation of start restart or stop condition is.."
bitfld.byte 0x5 2. "IICSTPREQ,Stop Condition Generation" "0: Do not generate stop condition,1: Generate stop condition"
newline
bitfld.byte 0x5 1. "IICRSTAREQ,Restart Condition Generation" "0: Do not generate restart condition,1: Generate restart condition"
bitfld.byte 0x5 0. "IICSTAREQ,Start Condition Generation" "0: Do not generate start condition,1: Generate start condition"
rgroup.byte 0xC++0x0
line.byte 0x0 "SISR,IIC Status Register"
bitfld.byte 0x0 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received"
group.byte 0xD++0x0
line.byte 0x0 "SPMR,SPI Mode Register"
bitfld.byte 0x0 7. "CKPH,Clock Phase Select" "0: Do not delay clock,1: Delay clock"
bitfld.byte 0x0 6. "CKPOL,Clock Polarity Select" "0: Do not invert clock polarity,1: Invert clock polarity"
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bitfld.byte 0x0 4. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error"
bitfld.byte 0x0 3. "CTSPEN,CTS external pin Enable" "0: Alternate setting to use CTS and RTS functions..,1: Dedicated setting for separately using CTS and.."
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bitfld.byte 0x0 2. "MSS,Master Slave Select" "0: Transmit through TXDn pin and receive through..,1: Receive through TXDn pin and transmit through.."
bitfld.byte 0x0 1. "CTSE,CTS Enable" "0: Disable CTS function (enable RTS output function),1: Enable CTS function"
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bitfld.byte 0x0 0. "SSE,SSn Pin Function Enable" "0: Disable SSn pin function,1: Enable SSn pin function"
wgroup.word 0xE++0x1
line.word 0x0 "FTDRHL,Transmit FIFO Data Register"
bitfld.word 0x0 9. "MPBT,Multi-Processor Transfer Bit Flag" "0: Data transmission cycle,1: ID transmission cycle"
hexmask.word 0x0 0.--8. 1. "TDAT,Serial transmit data"
group.word 0xE++0x1
line.word 0x0 "TDRHL,Transmit Data Register for Non-Manchester mode (MMR.MANEN = 0)"
hexmask.word 0x0 0.--8. 1. "TDAT,Serial Transmit Data"
group.word 0xE++0x1
line.word 0x0 "TDRHL_MAN,Transmit Data Register for Manchester mode (MMR.MANEN = 1)"
bitfld.word 0x0 12. "TSYNC,Transmit SYNC data bit" "0: The Start Bit is transmitted as DATA SYNC.,1: The Start Bit is transmitted as COMMAND SYNC."
bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles"
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hexmask.word 0x0 0.--8. 1. "TDAT,Serial transmit data"
wgroup.byte 0xE++0x1
line.byte 0x0 "FTDRH,Transmit FIFO Data Register"
bitfld.byte 0x0 1. "MPBT,Multi-Processor Transfer Bit Flag" "0: Data transmission cycle,1: ID transmission cycle"
line.byte 0x1 "FTDRL,Transmit FIFO Data Register"
hexmask.byte 0x1 0.--7. 1. "TDAT,Serial transmit data"
rgroup.word 0x10++0x1
line.word 0x0 "FRDRHL,Receive FIFO Data Register"
bitfld.word 0x0 14. "RDF,Receive FIFO Data Full Flag" "0: The amount of receive data written in FRDRH and..,1: The amount of receive data written in FRDRH and.."
bitfld.word 0x0 13. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
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bitfld.word 0x0 12. "FER,Framing Error Flag" "0: No framing error occurred in the first data of..,1: Framing error occurred in the first data of.."
bitfld.word 0x0 11. "PER,Parity Error Flag" "0: No parity error occurred in the first data of..,1: Parity error occurred in the first data of FRDRH.."
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bitfld.word 0x0 10. "DR,Receive Data Ready Flag" "0: Receiving is in progress or no received data..,1: Next receive data is not received for a period.."
bitfld.word 0x0 9. "MPB,Multi-Processor Bit Flag" "0: Data transmission cycle,1: ID transmission cycle"
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hexmask.word 0x0 0.--8. 1. "RDAT,Serial receive data"
rgroup.word 0x10++0x1
line.word 0x0 "RDRHL,Receive Data Register for Non-Manchester mode (MMR.MANEN = 0)"
hexmask.word 0x0 0.--8. 1. "RDAT,Serial Receive Data"
rgroup.word 0x10++0x1
line.word 0x0 "RDRHL_MAN,Receive Data Register for Manchester mode (MMR.MANEN = 1)"
bitfld.word 0x0 12. "RSYNC,Receive SYNC data bit" "0: The received the Start Bit is DATA SYNC,1: The received the Start Bit is COMMAND SYNC"
bitfld.word 0x0 9. "MPB,Multi-processor bit" "0: Data transmission cycles,1: ID transmission cycles"
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hexmask.word 0x0 0.--8. 1. "RDAT,Serial receive data"
rgroup.byte 0x10++0x1
line.byte 0x0 "FRDRH,Receive FIFO Data Register"
bitfld.byte 0x0 6. "RDF,Receive FIFO Data Full Flag" "0: The amount of receive data written in FRDRH and..,1: The amount of receive data written in FRDRH and.."
bitfld.byte 0x0 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
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bitfld.byte 0x0 4. "FER,Framing Error Flag" "0: No framing error occurred in the first data of..,1: Framing error occurred in the first data of.."
bitfld.byte 0x0 3. "PER,Parity Error Flag" "0: No parity error occurred in the first data of..,1: Parity error occurred in the first data of FRDRH.."
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bitfld.byte 0x0 2. "DR,Receive Data Ready Flag" "0: Receiving is in progress or no received data..,1: Next receive data is not received for a period.."
bitfld.byte 0x0 1. "MPB,Multi-Processor Bit Flag" "0: Data transmission cycle,1: ID transmission cycle"
line.byte 0x1 "FRDRL,Receive FIFO Data Register"
hexmask.byte 0x1 0.--7. 1. "RDAT,Serial receive data"
group.byte 0x12++0x1
line.byte 0x0 "MDDR,Modulation Duty Register"
line.byte 0x1 "DCCR,Data Compare Match Control Register"
bitfld.byte 0x1 7. "DCME,Data Compare Match Enable" "0: Disable address match function,1: Enable address match function"
bitfld.byte 0x1 6. "IDSEL,ID Frame Select" "0: Always compare data regardless of the MPB bit..,1: Only compare data when MPB bit = 1 (ID frame)"
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bitfld.byte 0x1 4. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: Framing error occurred"
bitfld.byte 0x1 3. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
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bitfld.byte 0x1 0. "DCMF,Data Compare Match Flag" "0: Not matched,1: Matched"
group.word 0x14++0x1
line.word 0x0 "FCR,FIFO Control Register"
hexmask.word.byte 0x0 12.--15. 1. "RSTRG,RTS Output Active Trigger Number Select"
hexmask.word.byte 0x0 8.--11. 1. "RTRG,Receive FIFO Data Trigger Number"
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hexmask.word.byte 0x0 4.--7. 1. "TTRG,Transmit FIFO Data Trigger Number"
bitfld.word 0x0 3. "DRES,Receive Data Ready Error Select" "0: Receive data full interrupt (SCIn_RXI),1: Receive error interrupt (SCIn_ERI)"
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bitfld.word 0x0 2. "TFRST,Transmit FIFO Data Register Reset" "0: Do not reset FTDRHL,1: Reset FTDRHL"
bitfld.word 0x0 1. "RFRST,Receive FIFO Data Register Reset" "0: Do not reset FRDRHL,1: Reset FRDRHL"
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bitfld.word 0x0 0. "FM,FIFO Mode Select" "0: Non-FIFO mode. Selects TDR/RDR or TDRHL/RDRHL..,1: FIFO mode. Selects FTDRHL/FRDRHL for.."
rgroup.word 0x16++0x3
line.word 0x0 "FDR,FIFO Data Count Register"
hexmask.word.byte 0x0 8.--12. 1. "T,Transmit FIFO Data Count"
hexmask.word.byte 0x0 0.--4. 1. "R,Receive FIFO Data Count"
line.word 0x2 "LSR,Line Status Register"
hexmask.word.byte 0x2 8.--12. 1. "PNUM,Parity Error Count"
hexmask.word.byte 0x2 2.--6. 1. "FNUM,Framing Error Count"
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bitfld.word 0x2 0. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
group.word 0x1A++0x1
line.word 0x0 "CDR,Compare Match Data Register"
hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data"
group.byte 0x1C++0x1
line.byte 0x0 "SPTR,Serial Port Register"
bitfld.byte 0x0 7. "ATEN,Adjust transmit timing enable" "0: Adjust transmit timing disable.,1: Adjust transmit timing enable."
bitfld.byte 0x0 6. "ASEN,Adjust receive sampling timing enable" "0: Adjust sampling timing disable.,1: Adjust sampling timing enable."
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bitfld.byte 0x0 5. "TINV,TXD invert bit" "0: Transmit data is not inverted and output to TXDn.,1: Transmit data is inverted and output to TXDn."
bitfld.byte 0x0 4. "RINV,RXD invert bit" "0: Received data from RXDn is not inverted and input.,1: Received data from RXDn is inverted and input."
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bitfld.byte 0x0 2. "SPB2IO,Serial Port Break I/O" "0: Do not output value of SPB2DT bit on TXDn pin,1: Output value of SPB2DT bit on TXDn pin"
bitfld.byte 0x0 1. "SPB2DT,Serial Port Break Data Select" "0: When TINV is 0 Low level is output in TXDn..,1: When TINV is 0 High level is output in TXDn.."
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rbitfld.byte 0x0 0. "RXDMON,Serial Input Data Monitor" "0: When RINV is 0 RXDn terminal is the low level.,1: When RINV is 0 RXDn terminal is the High level."
line.byte 0x1 "ACTR,Adjustment Communication Timing Register"
bitfld.byte 0x1 7. "AET,Adjustment edge for transmit timing" "0: Adjust the rising edge timing.,1: Adjust the falling edge timing."
bitfld.byte 0x1 4.--6. "ATT,Adjustment value for Transmit timing" "0,1,2,3,4,5,6,7"
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bitfld.byte 0x1 3. "AJD,Adjustment Direction for receive sampling timing" "0: The sampling timing is adjusted backward to the..,1: The sampling timing is adjusted forward to the.."
bitfld.byte 0x1 0.--2. "AST,Adjustment value for receive Sampling Timing" "0,1,2,3,4,5,6,7"
group.byte 0x20++0x0
line.byte 0x0 "MMR,Manchester Mode Register"
bitfld.byte 0x0 7. "MANEN,Manchester Mode Enable" "0: Disables the Manchester mode,1: Enables the Manchester mode"
bitfld.byte 0x0 6. "SBSEL,Start Bit Select" "0: The start bit area consists of one bit.,1: The start bit area consists of three bits.."
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bitfld.byte 0x0 5. "SYNSEL,SYNC Select" "0: The start bit pattern is set with the SYNVAL bit,1: The start bit pattern is set with the TSYNC bit."
bitfld.byte 0x0 4. "SYNVAL,SYNC value Setting" "0: The start bit is added as a zero-to-one..,1: The start bit is added as a one-to-zero.."
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bitfld.byte 0x0 2. "ERTEN,Manchester Edge Retiming Enable" "0: Disables the receive retiming function,1: Enables the receive retiming function"
bitfld.byte 0x0 1. "TMPOL,Polarity of Transmit Manchester Code" "0: Logic 0 is coded as a zero-to-one transition in..,1: Logic 0 is coded as a one-to-zero transition in.."
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bitfld.byte 0x0 0. "RMPOL,Polarity of Received Manchester Code" "0: Logic 0 is coded as a zero-to-one transition in..,1: Logic 0 is coded as a one-to-zero transition in.."
group.byte 0x22++0x3
line.byte 0x0 "TMPR,Transmit Manchester Preface Setting Register"
bitfld.byte 0x0 4.--5. "TPPAT,Transmit preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?"
hexmask.byte 0x0 0.--3. 1. "TPLEN,Transmit preface length"
line.byte 0x1 "RMPR,Receive Manchester Preface Setting Register"
bitfld.byte 0x1 4.--5. "RPPAT,Receive Preface Pattern" "0: ALL ZERO,1: ZERO ONE,?,?"
hexmask.byte 0x1 0.--3. 1. "RPLEN,Receive Preface Length"
line.byte 0x2 "MESR,Manchester Extended Error Status Register"
bitfld.byte 0x2 2. "SBER,Start Bit Error flag" "0: No start bit error detected,1: Start bit error detected"
bitfld.byte 0x2 1. "SYER,SYNC Error flag" "0: No receive SYNC error detected,1: Receive SYNC error detected"
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bitfld.byte 0x2 0. "PFER,Preface Error flag" "0: No preface error detected,1: Preface error detected"
line.byte 0x3 "MECR,Manchester Extended Error Control Register"
bitfld.byte 0x3 2. "SBEREN,Start Bit Error Enable" "0: Does not handle a start bit error as an..,1: Handles a start bit error as an interrupt source"
bitfld.byte 0x3 1. "SYEREN,Receive SYNC Error Enable" "0: Does not handle a receive SYNC error as an..,1: Handles a receive SYNC error as an interrupt.."
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bitfld.byte 0x3 0. "PFEREN,Preface Error Enable" "0: Does not handle a preface error as an interrupt..,1: Handles a preface error as an interrupt source"
tree.end
tree "SCI9"
base ad:0x40118900
group.byte 0x0++0x0
line.byte 0x0 "SMR,Serial Mode Register for Non-Smart Card Interface Mode (SCMR.SMIF = 0)"
bitfld.byte 0x0 7. "CM,Communication Mode" "0: Asynchronous mode or simple IIC mode,1: Clock synchronous mode or simple SPI mode"
bitfld.byte 0x0 6. "CHR,Character Length" "0: SCMR.CHR1 = 0: Transmit/receive in 9-bit data..,1: SCMR.CHR1 = 0: Transmit/receive in 9-bit data.."
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bitfld.byte 0x0 5. "PE,Parity Enable" "0: When transmitting: Do not add parity bit When..,1: When transmitting: Add parity bit When.."
bitfld.byte 0x0 4. "PM,Parity Mode" "0: Even parity,1: Odd parity"
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bitfld.byte 0x0 3. "STOP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits"
bitfld.byte 0x0 2. "MP,Multi-Processor Mode" "0: Disable multi-processor communications function,1: Enable multi-processor communications function"
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bitfld.byte 0x0 0.--1. "CKS,Clock Select" "0: PCLK clock (n = 0),1: PCLK/4 clock (n = 1),?,?"
group.byte 0x0++0x2
line.byte 0x0 "SMR_SMCI,Serial Mode Register for Smart Card Interface Mode (SCMR.SMIF = 1)"
bitfld.byte 0x0 7. "GM,GSM Mode" "0: Normal mode operation,1: GSM mode operation"
bitfld.byte 0x0 6. "BLK,Block Transfer Mode" "0: Normal mode operation,1: Block transfer mode operation"
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bitfld.byte 0x0 5. "PE,Parity Enable" "0,1"
bitfld.byte 0x0 4. "PM,Parity Mode" "0: Even parity,1: Odd parity"
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bitfld.byte 0x0 2.--3. "BCP,Base Clock Pulse" "0,1,2,3"
bitfld.byte 0x0 0.--1. "CKS,Clock Select" "0: PCLK clock (n = 0),1: PCLK/4 clock (n = 1),?,?"
line.byte 0x1 "BRR,Bit Rate Register"
line.byte 0x2 "SCR,Serial Control Register for Non-Smart Card Interface Mode (SCMR.SMIF = 0)"
bitfld.byte 0x2 7. "TIE,Transmit Interrupt Enable" "0: Disable SCIn_TXI interrupt requests,1: Enable SCIn_TXI interrupt requests"
bitfld.byte 0x2 6. "RIE,Receive Interrupt Enable" "0: Disable SCIn_RXI and SCIn_ERI interrupt requests,1: Enable SCIn_RXI and SCIn_ERI interrupt requests"
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bitfld.byte 0x2 5. "TE,Transmit Enable" "0: Disable serial transmission,1: Enable serial transmission"
bitfld.byte 0x2 4. "RE,Receive Enable" "0: Disable serial reception,1: Enable serial reception"
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bitfld.byte 0x2 3. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When data with the multi-processor bit set to 0.."
bitfld.byte 0x2 2. "TEIE,Transmit End Interrupt Enable" "0: Disable SCIn_TEI interrupt requests,1: Enable SCIn_TEI interrupt requests"
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bitfld.byte 0x2 0.--1. "CKE,Clock Enable" "0: In asynchronous mode input a clock with a..,1: In asynchronous mode a clock with the same..,?,?"
group.byte 0x2++0x2
line.byte 0x0 "SCR_SMCI,Serial Control Register for Smart Card Interface Mode (SCMR.SMIF = 1)"
bitfld.byte 0x0 7. "TIE,Transmit Interrupt Enable" "0: Disable SCIn_TXI interrupt requests,1: Enable SCIn_TXI interrupt requests"
bitfld.byte 0x0 6. "RIE,Receive Interrupt Enable" "0: Disable SCIn_RXI and SCIn_ERI interrupt requests,1: Enable SCIn_RXI and SCIn_ERI interrupt requests"
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bitfld.byte 0x0 5. "TE,Transmit Enable" "0: Disable serial transmission,1: Enable serial transmission"
bitfld.byte 0x0 4. "RE,Receive Enable" "0: Disable serial reception,1: Enable serial reception"
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bitfld.byte 0x0 3. "MPIE,Multi-Processor Interrupt Enable" "0,1"
bitfld.byte 0x0 2. "TEIE,Transmit End Interrupt Enable" "0,1"
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bitfld.byte 0x0 0.--1. "CKE,Clock Enable" "0: When SMR_SMCI.GM = 0: Disable output The SCKn..,1: When SMR_SMCI.GM = 0: Output clock When..,?,?"
line.byte 0x1 "TDR,Transmit Data Register"
line.byte 0x2 "SSR,Serial Status Register for Non-Smart Card Interface and Non-FIFO Mode (SCMR.SMIF = 0. FCR.FM = 0. and MMR.MANEN = 0)"
bitfld.byte 0x2 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data in TDR register,1: No transmit data in TDR register"
bitfld.byte 0x2 6. "RDRF,Receive Data Full Flag" "0: No received data in RDR register,1: Received data in RDR register"
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bitfld.byte 0x2 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
bitfld.byte 0x2 4. "FER,Framing Error Flag" "0: No framing error occurred,1: Framing error occurred"
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bitfld.byte 0x2 3. "PER,Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
rbitfld.byte 0x2 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer is complete"
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rbitfld.byte 0x2 1. "MPB,Multi-Processor" "0: Data transmission cycle,1: ID transmission cycle"
bitfld.byte 0x2 0. "MPBT,Multi-Processor Bit Transfer" "0: Data transmission cycle,1: ID transmission cycle"
group.byte 0x4++0x0
line.byte 0x0 "SSR_FIFO,Serial Status Register for Non-Smart Card Interface and FIFO Mode (SCMR.SMIF = 0. FCR.FM = 1. and MMR.MANEN = 0)"
bitfld.byte 0x0 7. "TDFE,Transmit FIFO Data Empty Flag" "0: The amount of transmit data written in FTDRHL..,1: The amount of transmit data written in FTDRHL is.."
bitfld.byte 0x0 6. "RDF,Receive FIFO Data Full Flag" "0: The amount of receive data written in FRDRHL is..,1: The amount of receive data written in FRDRHL is.."
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bitfld.byte 0x0 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
bitfld.byte 0x0 4. "FER,Framing Error Flag" "0: No framing error occurred,1: Framing error occurred"
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bitfld.byte 0x0 3. "PER,Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
bitfld.byte 0x0 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer is complete"
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bitfld.byte 0x0 0. "DR,Receive Data Ready Flag" "0: Receiving is in progress or no received data..,1: Next receive data is not received for a period.."
group.byte 0x4++0x0
line.byte 0x0 "SSR_MANC,Serial Status Register for Manchester Mode (SCMR.SMIF = 0. and MMR.MANEN = 1)"
bitfld.byte 0x0 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register"
bitfld.byte 0x0 6. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register"
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bitfld.byte 0x0 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred"
bitfld.byte 0x0 4. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred"
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bitfld.byte 0x0 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
rbitfld.byte 0x0 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed."
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rbitfld.byte 0x0 1. "MPB,Multi-Processor" "0: Data transmission cycles,1: ID transmission cycles"
bitfld.byte 0x0 0. "MER,Manchester Error Flag" "0: No Manchester error occurred,1: Manchester error has occurred"
group.byte 0x4++0x0
line.byte 0x0 "SSR_SMCI,Serial Status Register for Smart Card Interface Mode (SCMR.SMIF = 1. and MMR.MANEN = 0)"
bitfld.byte 0x0 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data in TDR register,1: No transmit data in TDR register"
bitfld.byte 0x0 6. "RDRF,Receive Data Full Flag" "0: No received data in RDR register,1: Received data in RDR register"
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bitfld.byte 0x0 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
bitfld.byte 0x0 4. "ERS,Error Signal Status Flag" "0: No low error signal response,1: Low error signal response occurred"
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bitfld.byte 0x0 3. "PER,Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
rbitfld.byte 0x0 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer is complete"
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rbitfld.byte 0x0 1. "MPB,Multi-Processor" "0,1"
bitfld.byte 0x0 0. "MPBT,Multi-Processor Bit Transfer" "0,1"
rgroup.byte 0x5++0x0
line.byte 0x0 "RDR,Receive Data Register"
group.byte 0x6++0x5
line.byte 0x0 "SCMR,Smart Card Mode Register"
bitfld.byte 0x0 7. "BCP2,Base Clock Pulse 2" "0,1"
bitfld.byte 0x0 4. "CHR1,Character Length 1" "0: SMR.CHR = 0: Transmit/receive in 9-bit data..,1: SMR.CHR = 0: Transmit/receive in 8-bit data.."
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bitfld.byte 0x0 3. "SDIR,Transmitted/Received Data Transfer Direction" "0: Transfer LSB-first,1: Transfer MSB-first"
bitfld.byte 0x0 2. "SINV,Transmitted/Received Data Invert" "0: TDR contents are transmitted as they are.,1: TDR register contents are inverted before.."
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bitfld.byte 0x0 0. "SMIF,Smart Card Interface Mode Select" "0: Non-smart card interface mode (asynchronous mode..,1: Smart card interface mode"
line.byte 0x1 "SEMR,Serial Extended Mode Register"
bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: Detect low level on RXDn pin as start bit,1: Detect falling edge of RXDn pin as start bit"
bitfld.byte 0x1 6. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Output clock from baud rate generator with..,1: Output clock from baud rate generator with.."
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bitfld.byte 0x1 5. "NFEN,Digital Noise Filter Function Enable" "0: In asynchronous mode: Disable noise cancellation..,1: In asynchronous mode: Enable noise cancellation.."
bitfld.byte 0x1 4. "ABCS,Asynchronous Mode Base Clock Select" "0: Select 16 base clock cycles for 1-bit period,1: Select 8 base clock cycles for 1-bit period"
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bitfld.byte 0x1 3. "ABCSE,Asynchronous Mode Extended Base Clock Select 1" "0: Clock cycles for 1-bit period determined by..,1: Baud rate is 6 base clock cycles for 1-bit period"
bitfld.byte 0x1 2. "BRME,Bit Rate Modulation Enable" "0: Disable bit rate modulation function,1: Enable bit rate modulation function"
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bitfld.byte 0x1 1. "PADIS,Preamble function Disable" "0: Preamble output function is enabled,1: Preamble output function is disabled"
line.byte 0x2 "SNFR,Noise Filter Setting Register"
bitfld.byte 0x2 0.--2. "NFCS,Noise Filter Clock Select" "0: Setting prohibited,1: In asynchronous mode: Setting prohibited In..,?,?,?,?,?,?"
line.byte 0x3 "SIMR1,IIC Mode Register 1"
hexmask.byte 0x3 3.--7. 1. "IICDL,SDAn Delay Output Select"
bitfld.byte 0x3 0. "IICM,Simple IIC Mode Select" "0: SCMR.SMIF = 0: Asynchronous mode (including..,1: SCMR.SMIF = 0: Simple IIC mode SCMR.SMIF = 1:.."
line.byte 0x4 "SIMR2,IIC Mode Register 2"
bitfld.byte 0x4 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and ACK/NACK reception"
bitfld.byte 0x4 1. "IICCSC,Clock Synchronization" "0: Do not synchronize with clock signal,1: Synchronize with clock signal"
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bitfld.byte 0x4 0. "IICINTM,IIC Interrupt Mode Select" "0: Use ACK/NACK interrupts,1: Use reception and transmission interrupts"
line.byte 0x5 "SIMR3,IIC Mode Register 3"
bitfld.byte 0x5 6.--7. "IICSCLS,SCLn Output Select" "0: Output serial clock,1: Generate start restart or stop condition,?,?"
bitfld.byte 0x5 4.--5. "IICSDAS,SDAn Output Select" "0: Output serial data,1: Generate start restart or stop condition,?,?"
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bitfld.byte 0x5 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: No requests are being made for generating..,1: Generation of start restart or stop condition is.."
bitfld.byte 0x5 2. "IICSTPREQ,Stop Condition Generation" "0: Do not generate stop condition,1: Generate stop condition"
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bitfld.byte 0x5 1. "IICRSTAREQ,Restart Condition Generation" "0: Do not generate restart condition,1: Generate restart condition"
bitfld.byte 0x5 0. "IICSTAREQ,Start Condition Generation" "0: Do not generate start condition,1: Generate start condition"
rgroup.byte 0xC++0x0
line.byte 0x0 "SISR,IIC Status Register"
bitfld.byte 0x0 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received"
group.byte 0xD++0x0
line.byte 0x0 "SPMR,SPI Mode Register"
bitfld.byte 0x0 7. "CKPH,Clock Phase Select" "0: Do not delay clock,1: Delay clock"
bitfld.byte 0x0 6. "CKPOL,Clock Polarity Select" "0: Do not invert clock polarity,1: Invert clock polarity"
newline
bitfld.byte 0x0 4. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error"
bitfld.byte 0x0 3. "CTSPEN,CTS external pin Enable" "0: Alternate setting to use CTS and RTS functions..,1: Dedicated setting for separately using CTS and.."
newline
bitfld.byte 0x0 2. "MSS,Master Slave Select" "0: Transmit through TXDn pin and receive through..,1: Receive through TXDn pin and transmit through.."
bitfld.byte 0x0 1. "CTSE,CTS Enable" "0: Disable CTS function (enable RTS output function),1: Enable CTS function"
newline
bitfld.byte 0x0 0. "SSE,SSn Pin Function Enable" "0: Disable SSn pin function,1: Enable SSn pin function"
wgroup.word 0xE++0x1
line.word 0x0 "FTDRHL,Transmit FIFO Data Register"
bitfld.word 0x0 9. "MPBT,Multi-Processor Transfer Bit Flag" "0: Data transmission cycle,1: ID transmission cycle"
hexmask.word 0x0 0.--8. 1. "TDAT,Serial transmit data"
group.word 0xE++0x1
line.word 0x0 "TDRHL,Transmit Data Register for Non-Manchester mode (MMR.MANEN = 0)"
hexmask.word 0x0 0.--8. 1. "TDAT,Serial Transmit Data"
group.word 0xE++0x1
line.word 0x0 "TDRHL_MAN,Transmit Data Register for Manchester mode (MMR.MANEN = 1)"
bitfld.word 0x0 12. "TSYNC,Transmit SYNC data bit" "0: The Start Bit is transmitted as DATA SYNC.,1: The Start Bit is transmitted as COMMAND SYNC."
bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles"
newline
hexmask.word 0x0 0.--8. 1. "TDAT,Serial transmit data"
wgroup.byte 0xE++0x1
line.byte 0x0 "FTDRH,Transmit FIFO Data Register"
bitfld.byte 0x0 1. "MPBT,Multi-Processor Transfer Bit Flag" "0: Data transmission cycle,1: ID transmission cycle"
line.byte 0x1 "FTDRL,Transmit FIFO Data Register"
hexmask.byte 0x1 0.--7. 1. "TDAT,Serial transmit data"
rgroup.word 0x10++0x1
line.word 0x0 "FRDRHL,Receive FIFO Data Register"
bitfld.word 0x0 14. "RDF,Receive FIFO Data Full Flag" "0: The amount of receive data written in FRDRH and..,1: The amount of receive data written in FRDRH and.."
bitfld.word 0x0 13. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
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bitfld.word 0x0 12. "FER,Framing Error Flag" "0: No framing error occurred in the first data of..,1: Framing error occurred in the first data of.."
bitfld.word 0x0 11. "PER,Parity Error Flag" "0: No parity error occurred in the first data of..,1: Parity error occurred in the first data of FRDRH.."
newline
bitfld.word 0x0 10. "DR,Receive Data Ready Flag" "0: Receiving is in progress or no received data..,1: Next receive data is not received for a period.."
bitfld.word 0x0 9. "MPB,Multi-Processor Bit Flag" "0: Data transmission cycle,1: ID transmission cycle"
newline
hexmask.word 0x0 0.--8. 1. "RDAT,Serial receive data"
rgroup.word 0x10++0x1
line.word 0x0 "RDRHL,Receive Data Register for Non-Manchester mode (MMR.MANEN = 0)"
hexmask.word 0x0 0.--8. 1. "RDAT,Serial Receive Data"
rgroup.word 0x10++0x1
line.word 0x0 "RDRHL_MAN,Receive Data Register for Manchester mode (MMR.MANEN = 1)"
bitfld.word 0x0 12. "RSYNC,Receive SYNC data bit" "0: The received the Start Bit is DATA SYNC,1: The received the Start Bit is COMMAND SYNC"
bitfld.word 0x0 9. "MPB,Multi-processor bit" "0: Data transmission cycles,1: ID transmission cycles"
newline
hexmask.word 0x0 0.--8. 1. "RDAT,Serial receive data"
rgroup.byte 0x10++0x1
line.byte 0x0 "FRDRH,Receive FIFO Data Register"
bitfld.byte 0x0 6. "RDF,Receive FIFO Data Full Flag" "0: The amount of receive data written in FRDRH and..,1: The amount of receive data written in FRDRH and.."
bitfld.byte 0x0 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
newline
bitfld.byte 0x0 4. "FER,Framing Error Flag" "0: No framing error occurred in the first data of..,1: Framing error occurred in the first data of.."
bitfld.byte 0x0 3. "PER,Parity Error Flag" "0: No parity error occurred in the first data of..,1: Parity error occurred in the first data of FRDRH.."
newline
bitfld.byte 0x0 2. "DR,Receive Data Ready Flag" "0: Receiving is in progress or no received data..,1: Next receive data is not received for a period.."
bitfld.byte 0x0 1. "MPB,Multi-Processor Bit Flag" "0: Data transmission cycle,1: ID transmission cycle"
line.byte 0x1 "FRDRL,Receive FIFO Data Register"
hexmask.byte 0x1 0.--7. 1. "RDAT,Serial receive data"
group.byte 0x12++0x1
line.byte 0x0 "MDDR,Modulation Duty Register"
line.byte 0x1 "DCCR,Data Compare Match Control Register"
bitfld.byte 0x1 7. "DCME,Data Compare Match Enable" "0: Disable address match function,1: Enable address match function"
bitfld.byte 0x1 6. "IDSEL,ID Frame Select" "0: Always compare data regardless of the MPB bit..,1: Only compare data when MPB bit = 1 (ID frame)"
newline
bitfld.byte 0x1 4. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: Framing error occurred"
bitfld.byte 0x1 3. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
newline
bitfld.byte 0x1 0. "DCMF,Data Compare Match Flag" "0: Not matched,1: Matched"
group.word 0x14++0x1
line.word 0x0 "FCR,FIFO Control Register"
hexmask.word.byte 0x0 12.--15. 1. "RSTRG,RTS Output Active Trigger Number Select"
hexmask.word.byte 0x0 8.--11. 1. "RTRG,Receive FIFO Data Trigger Number"
newline
hexmask.word.byte 0x0 4.--7. 1. "TTRG,Transmit FIFO Data Trigger Number"
bitfld.word 0x0 3. "DRES,Receive Data Ready Error Select" "0: Receive data full interrupt (SCIn_RXI),1: Receive error interrupt (SCIn_ERI)"
newline
bitfld.word 0x0 2. "TFRST,Transmit FIFO Data Register Reset" "0: Do not reset FTDRHL,1: Reset FTDRHL"
bitfld.word 0x0 1. "RFRST,Receive FIFO Data Register Reset" "0: Do not reset FRDRHL,1: Reset FRDRHL"
newline
bitfld.word 0x0 0. "FM,FIFO Mode Select" "0: Non-FIFO mode. Selects TDR/RDR or TDRHL/RDRHL..,1: FIFO mode. Selects FTDRHL/FRDRHL for.."
rgroup.word 0x16++0x3
line.word 0x0 "FDR,FIFO Data Count Register"
hexmask.word.byte 0x0 8.--12. 1. "T,Transmit FIFO Data Count"
hexmask.word.byte 0x0 0.--4. 1. "R,Receive FIFO Data Count"
line.word 0x2 "LSR,Line Status Register"
hexmask.word.byte 0x2 8.--12. 1. "PNUM,Parity Error Count"
hexmask.word.byte 0x2 2.--6. 1. "FNUM,Framing Error Count"
newline
bitfld.word 0x2 0. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
group.word 0x1A++0x1
line.word 0x0 "CDR,Compare Match Data Register"
hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data"
group.byte 0x1C++0x1
line.byte 0x0 "SPTR,Serial Port Register"
bitfld.byte 0x0 7. "ATEN,Adjust transmit timing enable" "0: Adjust transmit timing disable.,1: Adjust transmit timing enable."
bitfld.byte 0x0 6. "ASEN,Adjust receive sampling timing enable" "0: Adjust sampling timing disable.,1: Adjust sampling timing enable."
newline
bitfld.byte 0x0 5. "TINV,TXD invert bit" "0: Transmit data is not inverted and output to TXDn.,1: Transmit data is inverted and output to TXDn."
bitfld.byte 0x0 4. "RINV,RXD invert bit" "0: Received data from RXDn is not inverted and input.,1: Received data from RXDn is inverted and input."
newline
bitfld.byte 0x0 2. "SPB2IO,Serial Port Break I/O" "0: Do not output value of SPB2DT bit on TXDn pin,1: Output value of SPB2DT bit on TXDn pin"
bitfld.byte 0x0 1. "SPB2DT,Serial Port Break Data Select" "0: When TINV is 0 Low level is output in TXDn..,1: When TINV is 0 High level is output in TXDn.."
newline
rbitfld.byte 0x0 0. "RXDMON,Serial Input Data Monitor" "0: When RINV is 0 RXDn terminal is the low level.,1: When RINV is 0 RXDn terminal is the High level."
line.byte 0x1 "ACTR,Adjustment Communication Timing Register"
bitfld.byte 0x1 7. "AET,Adjustment edge for transmit timing" "0: Adjust the rising edge timing.,1: Adjust the falling edge timing."
bitfld.byte 0x1 4.--6. "ATT,Adjustment value for Transmit timing" "0,1,2,3,4,5,6,7"
newline
bitfld.byte 0x1 3. "AJD,Adjustment Direction for receive sampling timing" "0: The sampling timing is adjusted backward to the..,1: The sampling timing is adjusted forward to the.."
bitfld.byte 0x1 0.--2. "AST,Adjustment value for receive Sampling Timing" "0,1,2,3,4,5,6,7"
group.byte 0x20++0x0
line.byte 0x0 "MMR,Manchester Mode Register"
bitfld.byte 0x0 7. "MANEN,Manchester Mode Enable" "0: Disables the Manchester mode,1: Enables the Manchester mode"
bitfld.byte 0x0 6. "SBSEL,Start Bit Select" "0: The start bit area consists of one bit.,1: The start bit area consists of three bits.."
newline
bitfld.byte 0x0 5. "SYNSEL,SYNC Select" "0: The start bit pattern is set with the SYNVAL bit,1: The start bit pattern is set with the TSYNC bit."
bitfld.byte 0x0 4. "SYNVAL,SYNC value Setting" "0: The start bit is added as a zero-to-one..,1: The start bit is added as a one-to-zero.."
newline
bitfld.byte 0x0 2. "ERTEN,Manchester Edge Retiming Enable" "0: Disables the receive retiming function,1: Enables the receive retiming function"
bitfld.byte 0x0 1. "TMPOL,Polarity of Transmit Manchester Code" "0: Logic 0 is coded as a zero-to-one transition in..,1: Logic 0 is coded as a one-to-zero transition in.."
newline
bitfld.byte 0x0 0. "RMPOL,Polarity of Received Manchester Code" "0: Logic 0 is coded as a zero-to-one transition in..,1: Logic 0 is coded as a one-to-zero transition in.."
group.byte 0x22++0x3
line.byte 0x0 "TMPR,Transmit Manchester Preface Setting Register"
bitfld.byte 0x0 4.--5. "TPPAT,Transmit preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?"
hexmask.byte 0x0 0.--3. 1. "TPLEN,Transmit preface length"
line.byte 0x1 "RMPR,Receive Manchester Preface Setting Register"
bitfld.byte 0x1 4.--5. "RPPAT,Receive Preface Pattern" "0: ALL ZERO,1: ZERO ONE,?,?"
hexmask.byte 0x1 0.--3. 1. "RPLEN,Receive Preface Length"
line.byte 0x2 "MESR,Manchester Extended Error Status Register"
bitfld.byte 0x2 2. "SBER,Start Bit Error flag" "0: No start bit error detected,1: Start bit error detected"
bitfld.byte 0x2 1. "SYER,SYNC Error flag" "0: No receive SYNC error detected,1: Receive SYNC error detected"
newline
bitfld.byte 0x2 0. "PFER,Preface Error flag" "0: No preface error detected,1: Preface error detected"
line.byte 0x3 "MECR,Manchester Extended Error Control Register"
bitfld.byte 0x3 2. "SBEREN,Start Bit Error Enable" "0: Does not handle a start bit error as an..,1: Handles a start bit error as an interrupt source"
bitfld.byte 0x3 1. "SYEREN,Receive SYNC Error Enable" "0: Does not handle a receive SYNC error as an..,1: Handles a receive SYNC error as an interrupt.."
newline
bitfld.byte 0x3 0. "PFEREN,Preface Error Enable" "0: Does not handle a preface error as an interrupt..,1: Handles a preface error as an interrupt source"
tree.end
tree.end
tree "SPI (Serial Peripheral Interface)"
base ad:0x0
tree "SPI0"
base ad:0x4011A000
group.byte 0x0++0x3
line.byte 0x0 "SPCR,SPI Control Register"
bitfld.byte 0x0 7. "SPRIE,SPI Receive Buffer Full Interrupt Enable" "0: Disable SPI receive buffer full interrupt requests,1: Enable SPI receive buffer full interrupt requests"
bitfld.byte 0x0 6. "SPE,SPI Function Enable" "0: Disable SPI function,1: Enable SPI function"
newline
bitfld.byte 0x0 5. "SPTIE,Transmit Buffer Empty Interrupt Enable" "0: Disable transmit buffer empty interrupt requests,1: Enable transmit buffer empty interrupt requests"
bitfld.byte 0x0 4. "SPEIE,SPI Error Interrupt Enable" "0: Disable SPI error interrupt requests,1: Enable SPI error interrupt requests"
newline
bitfld.byte 0x0 3. "MSTR,SPI Master/Slave Mode Select" "0: Select slave mode,1: Select master mode"
bitfld.byte 0x0 2. "MODFEN,Mode Fault Error Detection Enable" "0: Disable detection of mode fault errors,1: Enable detection of mode fault errors"
newline
bitfld.byte 0x0 1. "TXMD,Communications Operating Mode Select" "0: Select full-duplex synchronous serial..,1: Select serial communications with transmit-only"
bitfld.byte 0x0 0. "SPMS,SPI Mode Select" "0: Select SPI operation (4-wire method),1: Select clock synchronous operation (3-wire method)"
line.byte 0x1 "SSLP,SPI Slave Select Polarity Register"
bitfld.byte 0x1 3. "SSL3P,SSLn3 Signal Polarity Setting" "0: Set SSLn3 signal to active-low,1: Set SSLn3 signal to active-high"
bitfld.byte 0x1 2. "SSL2P,SSLn2 Signal Polarity Setting" "0: Set SSLn2 signal to active-low,1: Set SSLn2 signal to active-high"
newline
bitfld.byte 0x1 1. "SSL1P,SSLn1 Signal Polarity Setting" "0: Set SSLn1 signal to active-low,1: Set SSLn1 signal to active-high"
bitfld.byte 0x1 0. "SSL0P,SSLn0 Signal Polarity Setting" "0: Set SSLn0 signal to active-low,1: Set SSLn0 signal to active-high"
line.byte 0x2 "SPPCR,SPI Pin Control Register"
bitfld.byte 0x2 5. "MOIFE,MOSI Idle Value Fixing Enable" "0: Set MOSI output value to equal final data from..,1: Set MOSI output value to equal value set in the.."
bitfld.byte 0x2 4. "MOIFV,MOSI Idle Fixed Value" "0: Set level output on MOSIn pin during MOSI idling..,1: Set level output on MOSIn pin during MOSI idling.."
newline
bitfld.byte 0x2 1. "SPLP2,SPI Loopback 2" "0: Normal mode,1: Loopback mode (receive data = transmit data)"
bitfld.byte 0x2 0. "SPLP,SPI Loopback" "0: Normal mode,1: Loopback mode (receive data = inverted transmit.."
line.byte 0x3 "SPSR,SPI Status Register"
bitfld.byte 0x3 7. "SPRF,SPI Receive Buffer Full Flag" "0: No valid data is in SPDR/SPDR_HA,1: Valid data is in SPDR/SPDR_HA"
bitfld.byte 0x3 6. "CENDF,Communication End Flag" "0: Not communicating or communicating,1: Communication completed"
newline
bitfld.byte 0x3 5. "SPTEF,SPI Transmit Buffer Empty Flag" "0: Data is in the transmit buffer,1: No data is in the transmit buffer"
bitfld.byte 0x3 4. "UDRF,Underrun Error Flag" "0: Mode fault error occurred (MODF = 1),1: Underrun error occurred (MODF = 1)"
newline
bitfld.byte 0x3 3. "PERF,Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
bitfld.byte 0x3 2. "MODF,Mode Fault Error Flag" "0: No mode fault or underrun error occurred,1: Mode fault error or underrun error occurred"
newline
rbitfld.byte 0x3 1. "IDLNF,SPI Idle Flag" "0: SPI is in the idle state,1: SPI is in the transfer state"
bitfld.byte 0x3 0. "OVRF,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
group.long 0x4++0x3
line.long 0x0 "SPDR,SPI Data Register"
group.word 0x4++0x1
line.word 0x0 "SPDR_HA,SPI Data Register"
group.byte 0x4++0x0
line.byte 0x0 "SPDR_BY,SPI Data Register"
group.byte 0x8++0x0
line.byte 0x0 "SPSCR,SPI Sequence Control Register"
bitfld.byte 0x0 0.--2. "SPSLN,SPI Sequence Length Specification" "0: Sequence Length is 1 (Referenced SPCMDn n =..,1: Sequence Length is 2 (Referenced SPCMDn n =..,?,?,?,?,?,?"
rgroup.byte 0x9++0x0
line.byte 0x0 "SPSSR,SPI Sequence Status Register"
bitfld.byte 0x0 4.--6. "SPECM,SPI Error Command" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?"
bitfld.byte 0x0 0.--2. "SPCP,SPI Command Pointer" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?"
group.byte 0xA++0x5
line.byte 0x0 "SPBR,SPI Bit Rate Register"
line.byte 0x1 "SPDCR,SPI Data Control Register"
bitfld.byte 0x1 6. "SPBYT,SPI Byte Access Specification" "0: SPDR/SPDR_HA is accessed in halfword or word..,1: SPDR_BY is accessed in byte (SPLW is invalid)"
bitfld.byte 0x1 5. "SPLW,SPI Word Access/Halfword Access Specification" "0: Set SPDR_HA to valid for halfword access,1: Set SPDR to valid for word access"
newline
bitfld.byte 0x1 4. "SPRDTD,SPI Receive/Transmit Data Select" "0: Read SPDR/SPDR_HA values from receive buffer,1: Read SPDR/SPDR_HA values from transmit buffer.."
bitfld.byte 0x1 0.--1. "SPFC,Number of Frames Specification" "0: 1 frame,1: 2 frames,?,?"
line.byte 0x2 "SPCKD,SPI Clock Delay Register"
bitfld.byte 0x2 0.--2. "SCKDL,RSPCK Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?"
line.byte 0x3 "SSLND,SPI Slave Select Negation Delay Register"
bitfld.byte 0x3 0.--2. "SLNDL,SSL Negation Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?"
line.byte 0x4 "SPND,SPI Next-Access Delay Register"
bitfld.byte 0x4 0.--2. "SPNDL,SPI Next-Access Delay Setting" "0: 1 RSPCK + 2 PCLKA,1: 2 RSPCK + 2 PCLKA,?,?,?,?,?,?"
line.byte 0x5 "SPCR2,SPI Control Register 2"
bitfld.byte 0x5 4. "SCKASE,RSPCK Auto-Stop Function Enable" "0: Disable RSPCK auto-stop function,1: Enable RSPCK auto-stop function"
bitfld.byte 0x5 3. "PTE,Parity Self-Testing" "0: Disable self-diagnosis function of the parity..,1: Enable self-diagnosis function of the parity.."
newline
bitfld.byte 0x5 2. "SPIIE,SPI Idle Interrupt Enable" "0: Disable idle interrupt requests,1: Enable idle interrupt requests"
bitfld.byte 0x5 1. "SPOE,Parity Mode" "0: Select even parity for transmission and reception,1: Select odd parity for transmission and reception"
newline
bitfld.byte 0x5 0. "SPPE,Parity Enable" "0: Do not add parity bit to transmit data and do..,1: When SPCR.TXMD = 0: Add parity bit to transmit.."
repeat 8. (increment 0x0 0x1)(increment 0x0 0x2)
group.word ($2+0x10)++0x1
line.word 0x0 "SPCMD$1,SPI Command Register %s"
bitfld.word 0x0 15. "SCKDEN,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1 RSPCK,1: Select RSPCK delay equal to the setting in the.."
bitfld.word 0x0 14. "SLNDEN,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.."
newline
bitfld.word 0x0 13. "SPNDEN,SPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLKA,1: Select next-access delay equal to the setting in.."
bitfld.word 0x0 12. "LSBF,SPI LSB First" "0: MSB-first,1: LSB-first"
newline
hexmask.word.byte 0x0 8.--11. 1. "SPB,SPI Data Length Setting"
bitfld.word 0x0 7. "SSLKP,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.."
newline
bitfld.word 0x0 4.--6. "SSLA,SSL Signal Assertion Setting" "0: Setting prohibited,1: SSL1,?,?,?,?,?,?"
bitfld.word 0x0 2.--3. "BRDV,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?"
newline
bitfld.word 0x0 1. "CPOL,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle"
bitfld.word 0x0 0. "CPHA,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.."
repeat.end
group.byte 0x20++0x1
line.byte 0x0 "SPDCR2,SPI Data Control Register 2"
bitfld.byte 0x0 1. "SINV,Serial Data Invert Bit" "0: Not invert serial data,1: Invert serial data"
bitfld.byte 0x0 0. "BYSW,Byte Swap Operating Mode Select" "0: Byte Swap OFF,1: Byte Swap ON"
line.byte 0x1 "SPCR3,SPI Control Register 3"
bitfld.byte 0x1 4. "CENDIE,SPI Communication End Interrupt Enable" "0: Communication end interrupt request is disabled.,1: Communication end interrupt request is enabled."
bitfld.byte 0x1 1. "BFDS,Between Burst Transfer Frames Delay Select" "0: Delay (RSPCK delay SSL negation delay and..,1: Delay between frames is not inserted in burst.."
newline
bitfld.byte 0x1 0. "ETXMD,Extended Communication Mode Select" "0: Full-duplex synchronous or transmit-only serial..,1: Receive-only serial communications in slave mode.."
tree.end
tree "SPI1"
base ad:0x4011A100
group.byte 0x0++0x3
line.byte 0x0 "SPCR,SPI Control Register"
bitfld.byte 0x0 7. "SPRIE,SPI Receive Buffer Full Interrupt Enable" "0: Disable SPI receive buffer full interrupt requests,1: Enable SPI receive buffer full interrupt requests"
bitfld.byte 0x0 6. "SPE,SPI Function Enable" "0: Disable SPI function,1: Enable SPI function"
newline
bitfld.byte 0x0 5. "SPTIE,Transmit Buffer Empty Interrupt Enable" "0: Disable transmit buffer empty interrupt requests,1: Enable transmit buffer empty interrupt requests"
bitfld.byte 0x0 4. "SPEIE,SPI Error Interrupt Enable" "0: Disable SPI error interrupt requests,1: Enable SPI error interrupt requests"
newline
bitfld.byte 0x0 3. "MSTR,SPI Master/Slave Mode Select" "0: Select slave mode,1: Select master mode"
bitfld.byte 0x0 2. "MODFEN,Mode Fault Error Detection Enable" "0: Disable detection of mode fault errors,1: Enable detection of mode fault errors"
newline
bitfld.byte 0x0 1. "TXMD,Communications Operating Mode Select" "0: Select full-duplex synchronous serial..,1: Select serial communications with transmit-only"
bitfld.byte 0x0 0. "SPMS,SPI Mode Select" "0: Select SPI operation (4-wire method),1: Select clock synchronous operation (3-wire method)"
line.byte 0x1 "SSLP,SPI Slave Select Polarity Register"
bitfld.byte 0x1 3. "SSL3P,SSLn3 Signal Polarity Setting" "0: Set SSLn3 signal to active-low,1: Set SSLn3 signal to active-high"
bitfld.byte 0x1 2. "SSL2P,SSLn2 Signal Polarity Setting" "0: Set SSLn2 signal to active-low,1: Set SSLn2 signal to active-high"
newline
bitfld.byte 0x1 1. "SSL1P,SSLn1 Signal Polarity Setting" "0: Set SSLn1 signal to active-low,1: Set SSLn1 signal to active-high"
bitfld.byte 0x1 0. "SSL0P,SSLn0 Signal Polarity Setting" "0: Set SSLn0 signal to active-low,1: Set SSLn0 signal to active-high"
line.byte 0x2 "SPPCR,SPI Pin Control Register"
bitfld.byte 0x2 5. "MOIFE,MOSI Idle Value Fixing Enable" "0: Set MOSI output value to equal final data from..,1: Set MOSI output value to equal value set in the.."
bitfld.byte 0x2 4. "MOIFV,MOSI Idle Fixed Value" "0: Set level output on MOSIn pin during MOSI idling..,1: Set level output on MOSIn pin during MOSI idling.."
newline
bitfld.byte 0x2 1. "SPLP2,SPI Loopback 2" "0: Normal mode,1: Loopback mode (receive data = transmit data)"
bitfld.byte 0x2 0. "SPLP,SPI Loopback" "0: Normal mode,1: Loopback mode (receive data = inverted transmit.."
line.byte 0x3 "SPSR,SPI Status Register"
bitfld.byte 0x3 7. "SPRF,SPI Receive Buffer Full Flag" "0: No valid data is in SPDR/SPDR_HA,1: Valid data is in SPDR/SPDR_HA"
bitfld.byte 0x3 6. "CENDF,Communication End Flag" "0: Not communicating or communicating,1: Communication completed"
newline
bitfld.byte 0x3 5. "SPTEF,SPI Transmit Buffer Empty Flag" "0: Data is in the transmit buffer,1: No data is in the transmit buffer"
bitfld.byte 0x3 4. "UDRF,Underrun Error Flag" "0: Mode fault error occurred (MODF = 1),1: Underrun error occurred (MODF = 1)"
newline
bitfld.byte 0x3 3. "PERF,Parity Error Flag" "0: No parity error occurred,1: Parity error occurred"
bitfld.byte 0x3 2. "MODF,Mode Fault Error Flag" "0: No mode fault or underrun error occurred,1: Mode fault error or underrun error occurred"
newline
rbitfld.byte 0x3 1. "IDLNF,SPI Idle Flag" "0: SPI is in the idle state,1: SPI is in the transfer state"
bitfld.byte 0x3 0. "OVRF,Overrun Error Flag" "0: No overrun error occurred,1: Overrun error occurred"
group.long 0x4++0x3
line.long 0x0 "SPDR,SPI Data Register"
group.word 0x4++0x1
line.word 0x0 "SPDR_HA,SPI Data Register"
group.byte 0x4++0x0
line.byte 0x0 "SPDR_BY,SPI Data Register"
group.byte 0x8++0x0
line.byte 0x0 "SPSCR,SPI Sequence Control Register"
bitfld.byte 0x0 0.--2. "SPSLN,SPI Sequence Length Specification" "0: Sequence Length is 1 (Referenced SPCMDn n =..,1: Sequence Length is 2 (Referenced SPCMDn n =..,?,?,?,?,?,?"
rgroup.byte 0x9++0x0
line.byte 0x0 "SPSSR,SPI Sequence Status Register"
bitfld.byte 0x0 4.--6. "SPECM,SPI Error Command" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?"
bitfld.byte 0x0 0.--2. "SPCP,SPI Command Pointer" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?"
group.byte 0xA++0x5
line.byte 0x0 "SPBR,SPI Bit Rate Register"
line.byte 0x1 "SPDCR,SPI Data Control Register"
bitfld.byte 0x1 6. "SPBYT,SPI Byte Access Specification" "0: SPDR/SPDR_HA is accessed in halfword or word..,1: SPDR_BY is accessed in byte (SPLW is invalid)"
bitfld.byte 0x1 5. "SPLW,SPI Word Access/Halfword Access Specification" "0: Set SPDR_HA to valid for halfword access,1: Set SPDR to valid for word access"
newline
bitfld.byte 0x1 4. "SPRDTD,SPI Receive/Transmit Data Select" "0: Read SPDR/SPDR_HA values from receive buffer,1: Read SPDR/SPDR_HA values from transmit buffer.."
bitfld.byte 0x1 0.--1. "SPFC,Number of Frames Specification" "0: 1 frame,1: 2 frames,?,?"
line.byte 0x2 "SPCKD,SPI Clock Delay Register"
bitfld.byte 0x2 0.--2. "SCKDL,RSPCK Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?"
line.byte 0x3 "SSLND,SPI Slave Select Negation Delay Register"
bitfld.byte 0x3 0.--2. "SLNDL,SSL Negation Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?"
line.byte 0x4 "SPND,SPI Next-Access Delay Register"
bitfld.byte 0x4 0.--2. "SPNDL,SPI Next-Access Delay Setting" "0: 1 RSPCK + 2 PCLKA,1: 2 RSPCK + 2 PCLKA,?,?,?,?,?,?"
line.byte 0x5 "SPCR2,SPI Control Register 2"
bitfld.byte 0x5 4. "SCKASE,RSPCK Auto-Stop Function Enable" "0: Disable RSPCK auto-stop function,1: Enable RSPCK auto-stop function"
bitfld.byte 0x5 3. "PTE,Parity Self-Testing" "0: Disable self-diagnosis function of the parity..,1: Enable self-diagnosis function of the parity.."
newline
bitfld.byte 0x5 2. "SPIIE,SPI Idle Interrupt Enable" "0: Disable idle interrupt requests,1: Enable idle interrupt requests"
bitfld.byte 0x5 1. "SPOE,Parity Mode" "0: Select even parity for transmission and reception,1: Select odd parity for transmission and reception"
newline
bitfld.byte 0x5 0. "SPPE,Parity Enable" "0: Do not add parity bit to transmit data and do..,1: When SPCR.TXMD = 0: Add parity bit to transmit.."
repeat 8. (increment 0x0 0x1)(increment 0x0 0x2)
group.word ($2+0x10)++0x1
line.word 0x0 "SPCMD$1,SPI Command Register %s"
bitfld.word 0x0 15. "SCKDEN,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1 RSPCK,1: Select RSPCK delay equal to the setting in the.."
bitfld.word 0x0 14. "SLNDEN,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.."
newline
bitfld.word 0x0 13. "SPNDEN,SPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLKA,1: Select next-access delay equal to the setting in.."
bitfld.word 0x0 12. "LSBF,SPI LSB First" "0: MSB-first,1: LSB-first"
newline
hexmask.word.byte 0x0 8.--11. 1. "SPB,SPI Data Length Setting"
bitfld.word 0x0 7. "SSLKP,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.."
newline
bitfld.word 0x0 4.--6. "SSLA,SSL Signal Assertion Setting" "0: Setting prohibited,1: SSL1,?,?,?,?,?,?"
bitfld.word 0x0 2.--3. "BRDV,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?"
newline
bitfld.word 0x0 1. "CPOL,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle"
bitfld.word 0x0 0. "CPHA,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.."
repeat.end
group.byte 0x20++0x1
line.byte 0x0 "SPDCR2,SPI Data Control Register 2"
bitfld.byte 0x0 1. "SINV,Serial Data Invert Bit" "0: Not invert serial data,1: Invert serial data"
bitfld.byte 0x0 0. "BYSW,Byte Swap Operating Mode Select" "0: Byte Swap OFF,1: Byte Swap ON"
line.byte 0x1 "SPCR3,SPI Control Register 3"
bitfld.byte 0x1 4. "CENDIE,SPI Communication End Interrupt Enable" "0: Communication end interrupt request is disabled.,1: Communication end interrupt request is enabled."
bitfld.byte 0x1 1. "BFDS,Between Burst Transfer Frames Delay Select" "0: Delay (RSPCK delay SSL negation delay and..,1: Delay between frames is not inserted in burst.."
newline
bitfld.byte 0x1 0. "ETXMD,Extended Communication Mode Select" "0: Full-duplex synchronous or transmit-only serial..,1: Receive-only serial communications in slave mode.."
tree.end
tree.end
tree "SRAM (SRAM Control)"
base ad:0x40002000
group.byte 0x0++0x0
line.byte 0x0 "PARIOAD,SRAM Parity Error Operation After Detection Register"
bitfld.byte 0x0 0. "OAD,Operation After Detection" "0: Non-maskable interrupt,1: Reset"
group.byte 0x4++0x0
line.byte 0x0 "SRAMPRCR,SRAM Protection Register"
hexmask.byte 0x0 1.--7. 1. "KW,Write Key Code"
bitfld.byte 0x0 0. "SRAMPRCR,Register Write Control" "0: Disable writes to protected registers,1: Enable writes to protected registers"
group.byte 0x8++0x0
line.byte 0x0 "SRAMWTSC,SRAM Wait State Control Register"
bitfld.byte 0x0 0. "SRAM0WTEN,SRAM0 wait enable" "0: No wait,1: Add wait state in read access cycle to SRAM0"
group.byte 0xC++0x0
line.byte 0x0 "SRAMPRCR2,SRAM Protection Register 2"
hexmask.byte 0x0 1.--7. 1. "KW,Write Key Code"
bitfld.byte 0x0 0. "SRAMPRCR2,Register Write Control" "0: Disable writes to the protectedregisters,1: Enable writes to the protected registers"
group.byte 0xC0++0x4
line.byte 0x0 "ECCMODE,ECC Operating Mode Control Register"
bitfld.byte 0x0 0.--1. "ECCMOD,ECC Operating Mode Select" "0: Disable ECC function,1: Setting prohibited,?,?"
line.byte 0x1 "ECC2STS,ECC 2-Bit Error Status Register"
bitfld.byte 0x1 0. "ECC2ERR,ECC 2-Bit Error Status" "0: No 2-bit ECC error occurred,1: 2-bit ECC error occurred"
line.byte 0x2 "ECC1STSEN,ECC 1-Bit Error Information Update Enable Register"
bitfld.byte 0x2 0. "E1STSEN,ECC 1-Bit Error Information Update Enable" "0: Disable updating of 1-bit ECC error information,1: Bit Error Information Update Enable"
line.byte 0x3 "ECC1STS,ECC 1-Bit Error Status Register"
bitfld.byte 0x3 0. "ECC1ERR,ECC 1-Bit Error Status" "0: No 1-bit ECC error occurred,1: Bit Error Status"
line.byte 0x4 "ECCPRCR,ECC Protection Register"
hexmask.byte 0x4 1.--7. 1. "KW,Write Key Code"
bitfld.byte 0x4 0. "ECCPRCR,Register Write Control" "0: Disable writes to the protected registers,1: Enable writes to the protected registers"
group.byte 0xD0++0x0
line.byte 0x0 "ECCPRCR2,ECC Protection Register 2"
hexmask.byte 0x0 1.--7. 1. "KW2,Write Key Code"
bitfld.byte 0x0 0. "ECCPRCR2,Register Write Control" "0: Disable writes to the protected registers,1: Enable writes to the protected registers"
group.byte 0xD4++0x0
line.byte 0x0 "ECCETST,ECC Test Control Register"
bitfld.byte 0x0 0. "TSTBYP,ECC Bypass Select" "0: Disable ECC bypass,1: Enable ECC bypass"
group.byte 0xD8++0x0
line.byte 0x0 "ECCOAD,SRAM ECC Error Operation After Detection Register"
bitfld.byte 0x0 0. "OAD,Operation After Detection" "0: Non-maskable interrupt,1: Reset"
tree.end
tree "SSIE (Serial Sound Interface Enhanced)"
base ad:0x4009D000
group.long 0x0++0x7
line.long 0x0 "SSICR,Control Register"
bitfld.long 0x0 29. "TUIEN,Transmit Underflow Interrupt Output Enable" "0: Disables transmit underflow interrupt output,1: Enables transmit underflow interrupt output"
bitfld.long 0x0 28. "TOIEN,Transmit Overflow Interrupt Output Enable" "0: Disables transmit overflow interrupt output,1: Enables transmit overflow interrupt output"
newline
bitfld.long 0x0 27. "RUIEN,Receive Underflow Interrupt Output Enable" "0: Disables receive underflow interrupt output,1: Enables receive underflow interrupt output"
bitfld.long 0x0 26. "ROIEN,Receive Overflow Interrupt Output Enable" "0: Disables receive overflow interrupt output,1: Enables receive overflow interrupt output"
newline
bitfld.long 0x0 25. "IIEN,Idle Mode Interrupt Output Enable" "0: Disables idle mode interrupt output,1: Enables idle mode interrupt output"
bitfld.long 0x0 22.--23. "FRM,Selects Frame Word Number" "0,1,2,3"
newline
bitfld.long 0x0 19.--21. "DWL,Selects Data Word Length" "0: 8 bits,1: 16 bits,?,?,?,?,?,?"
bitfld.long 0x0 16.--18. "SWL,Selects System Word Length" "0: 8 bits,1: 16 bits,?,?,?,?,?,?"
newline
bitfld.long 0x0 14. "MST,Master Enable" "0: Slave-mode communication,1: Master-mode communication"
bitfld.long 0x0 13. "BCKP,Selects Bit Clock Polarity" "0: SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0..,1: SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0.."
newline
bitfld.long 0x0 12. "LRCKP,Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal" "0: The initial value is at a high level. The start..,1: The initial value is at a low level. The start.."
bitfld.long 0x0 11. "SPDP,Selects Serial Padding Polarity" "0: Padding data is at a low level,1: Padding data is at a high level"
newline
bitfld.long 0x0 10. "SDTA,Selects Serial Data Alignment" "0: Transmits and receives serial data first and..,1: Transmit and receives padding bits first and.."
bitfld.long 0x0 9. "PDTA,Selects Placement Data Alignment" "0: Left-justifies placement data (SSIFTDR SSIFRDR),1: Right-justifies placement data (SSIFTDR SSIFRDR)"
newline
bitfld.long 0x0 8. "DEL,Selects Serial Data Delay" "0: Delay of 1 cycle of SSIBCK between SSILRCK/SSIFS..,1: No delay between SSILRCK/SSIFS and.."
hexmask.long.byte 0x0 4.--7. 1. "CKDV,Selects Bit Clock Division Ratio"
newline
bitfld.long 0x0 3. "MUEN,Mute Enable" "0: Disables muting on the next frame boundary,1: Enables muting on the next frame boundary"
bitfld.long 0x0 1. "TEN,Transmission Enable" "0: Disables transmission,1: Enables transmission (starts transmission)"
newline
bitfld.long 0x0 0. "REN,Reception Enable" "0: Disables reception,1: Enables reception (starts reception)"
line.long 0x4 "SSISR,Status Register"
bitfld.long 0x4 29. "TUIRQ,Transmit Underflow Error Status flag" "0: No transmit underflow error is generated.,1: A transmit underflow error is generated."
bitfld.long 0x4 28. "TOIRQ,Transmit Overflow Error Status Flag" "0: No transmit overflow error is generated.,1: A transmit overflow error is generated."
newline
bitfld.long 0x4 27. "RUIRQ,Receive Underflow Error Status Flag" "0: No receive underflow error is generated.,1: A receive underflow error is generated."
bitfld.long 0x4 26. "ROIRQ,Receive Overflow Error Status Flag" "0: No receive overflow error is generated.,1: A receive overflow error is generated."
newline
rbitfld.long 0x4 25. "IIRQ,Idle Mode Status Flag" "0: In the communication state,1: In the idle state"
group.long 0x10++0x7
line.long 0x0 "SSIFCR,FIFO Control Register"
bitfld.long 0x0 31. "AUCKE,AUDIO_MCK Enable in Mastermode Communication" "0: Disables supply of AUDIO_MCK,1: Enables supply of AUDIO_MCK"
bitfld.long 0x0 16. "SSIRST,Software Reset" "0: Clears a software reset condition,1: Sets a software reset condition"
newline
bitfld.long 0x0 11. "BSW,Byte Swap Enable" "0: Disables byte swap,1: Enables byte swap"
bitfld.long 0x0 3. "TIE,Transmit Data Empty Interrupt Output Enable" "0: Disables transmit data empty interrupts,1: Enables transmit data empty interrupts"
newline
bitfld.long 0x0 2. "RIE,Receive Data Full Interrupt Output Enable" "0: Disables receive data full interrupts,1: Enables receive data full interrupts"
bitfld.long 0x0 1. "TFRST,Transmit FIFO Data Register Reset" "0: Clears a transmit data FIFO reset condition,1: Sets a transmit data FIFO reset condition"
newline
bitfld.long 0x0 0. "RFRST,Receive FIFO Data Register Reset" "0: Clears a receive data FIFO reset condition,1: Sets a receive data FIFO reset condition"
line.long 0x4 "SSIFSR,FIFO Status Register"
hexmask.long.byte 0x4 24.--29. 1. "TDC,Number of Transmit FIFO Data Indication Flag"
bitfld.long 0x4 16. "TDE,Transmit Data Empty Flag" "0: The free space of SSIFTDR is not more than the..,1: The free space of SSIFTDR is not less than the.."
newline
hexmask.long.byte 0x4 8.--13. 1. "RDC,Number of Receive FIFO Data Indication Flag"
bitfld.long 0x4 0. "RDF,Receive Data Full Flag" "0: The size of received data in SSIFRDR is not more..,1: The size of received data in SSIFRDR is not less.."
wgroup.long 0x18++0x3
line.long 0x0 "SSIFTDR,Transmit FIFO Data Register"
hexmask.long 0x0 0.--31. 1. "SSIFTDR,Transmit FIFO Data"
rgroup.long 0x1C++0x3
line.long 0x0 "SSIFRDR,Receive FIFO Data Register"
hexmask.long 0x0 0.--31. 1. "SSIFRDR,Receive FIFO Data"
group.long 0x20++0x7
line.long 0x0 "SSIOFR,Audio Format Register"
bitfld.long 0x0 9. "BCKASTP,Whether to Enable Stopping BCK Output When SSIE is in Idle Status" "0: Always outputs BCK to the SSIBCK pin,1: Automatically controls output of BCK to the.."
bitfld.long 0x0 8. "LRCONT,Whether to Enable LRCK/FS Continuation" "0: Disables LRCK/FS continuation,1: Enables LRCK/FS continuation"
newline
bitfld.long 0x0 0.--1. "OMOD,Audio Format Select" "0: I2S format,1: TDM format,?,?"
line.long 0x4 "SSISCR,Status Control Register"
hexmask.long.byte 0x4 8.--12. 1. "TDES,TDE Setting Condition Select"
hexmask.long.byte 0x4 0.--4. 1. "RDFS,RDF Setting Condition Select"
tree.end
tree "SYSC (System Control)"
base ad:0x4001E000
group.word 0xC++0x1
line.word 0x0 "SBYCR,Standby Control Register"
bitfld.word 0x0 15. "SSBY,Software Standby Mode Select" "0: Sleep mode,1: Software Standby mode."
group.long 0x20++0x3
line.long 0x0 "SCKDIVCR,System Clock Division Control Register"
bitfld.long 0x0 28.--30. "FCK,FlashIF Clock (FCLK) Select" "0: Setting prohibited.,1: x 1/2,?,?,?,?,?,?"
bitfld.long 0x0 24.--26. "ICK,System Clock (ICLK) Select" "0: Setting prohibited.,1: x 1/2,?,?,?,?,?,?"
newline
bitfld.long 0x0 12.--14. "PCKA,Peripheral Module Clock A (PCLKA) Select" "0: Setting prohibited.,1: x 1/2,?,?,?,?,?,?"
bitfld.long 0x0 8.--10. "PCKB,Peripheral Module Clock B (PCLKB) Select" "0: Setting prohibited.,1: x 1/2,?,?,?,?,?,?"
newline
bitfld.long 0x0 4.--6. "PCKC,Peripheral Module Clock C (PCLKC) Select" "0: Setting prohibited.,1: x 1/2,?,?,?,?,?,?"
bitfld.long 0x0 0.--2. "PCKD,Peripheral Module Clock D (PCLKD) Select" "0: Setting prohibited.,1: x 1/2,?,?,?,?,?,?"
group.byte 0x26++0x0
line.byte 0x0 "SCKSCR,System Clock Source Control Register"
bitfld.byte 0x0 0.--2. "CKSEL,Clock Source Select" "0: HOCO,1: MOCO,?,?,?,?,?,?"
group.word 0x28++0x1
line.word 0x0 "PLLCCR,PLL Clock Control Register"
hexmask.word.byte 0x0 8.--13. 1. "PLLMUL,PLL Frequency Multiplication Factor Select"
bitfld.word 0x0 4. "PLSRCSEL,PLL Clock Source Select" "0: Main clock oscillator,1: HOCO"
newline
bitfld.word 0x0 0.--1. "PLIDIV,PLL Input Frequency Division Ratio Select" "0: Setting prohibited.,1: /2,?,?"
group.byte 0x2A++0x0
line.byte 0x0 "PLLCR,PLL Control Register"
bitfld.byte 0x0 0. "PLLSTP,PLL Stop Control" "0: PLL is operating,1: PLL is stopped."
group.byte 0x32++0x0
line.byte 0x0 "MOSCCR,Main Clock Oscillator Control Register"
bitfld.byte 0x0 0. "MOSTP,Main Clock Oscillator Stop" "0: Operate the main clock oscillator,1: Stop the main clock oscillator"
group.byte 0x36++0x0
line.byte 0x0 "HOCOCR,High-Speed On-Chip Oscillator Control Register"
bitfld.byte 0x0 0. "HCSTP,HOCO Stop" "0: Operate the HOCO clock,1: Stop the HOCO clock"
group.byte 0x38++0x1
line.byte 0x0 "MOCOCR,Middle-Speed On-Chip Oscillator Control Register"
bitfld.byte 0x0 0. "MCSTP,MOCO Stop" "0: MOCO clock is operating,1: MOCO clock is stopped"
line.byte 0x1 "FLLCR1,FLL Control Register1"
bitfld.byte 0x1 0. "FLLEN,FLL Enable" "0: FLL function is disabled,1: FLL function is enabled."
group.word 0x3A++0x1
line.word 0x0 "FLLCR2,FLL Control Register2"
hexmask.word 0x0 0.--10. 1. "FLLCNTL,FLL Multiplication Control"
rgroup.byte 0x3C++0x0
line.byte 0x0 "OSCSF,Oscillation Stabilization Flag Register"
bitfld.byte 0x0 5. "PLLSF,PLL Clock Oscillation Stabilization Flag" "0: The PLL clock is stopped or oscillation of the..,1: The PLL clock is stable so is available for use.."
bitfld.byte 0x0 3. "MOSCSF,Main Clock Oscillation Stabilization Flag" "0: The main clock oscillator is stopped (MOSTP = 1)..,1: The main clock oscillator is stable so is.."
newline
bitfld.byte 0x0 0. "HOCOSF,HOCO Clock Oscillation Stabilization Flag" "0: The HOCO clock is stopped or is not yet stable,1: The HOCO clock is stable so is available for use.."
group.byte 0x3E++0x0
line.byte 0x0 "CKOCR,Clock Out Control Register"
bitfld.byte 0x0 7. "CKOEN,Clock Out Enable" "0: Disable clock out,1: Enable clock out"
bitfld.byte 0x0 4.--6. "CKODIV,Clock Output Frequency Division Ratio" "0: x 1/1,1: x 1/2,?,?,?,?,?,?"
newline
bitfld.byte 0x0 0.--2. "CKOSEL,Clock Out Source Select" "0: Setting prohibited,1: MOCO,?,?,?,?,?,?"
group.byte 0x40++0x1
line.byte 0x0 "OSTDCR,Oscillation Stop Detection Control Register"
bitfld.byte 0x0 7. "OSTDE,Oscillation Stop Detection Function Enable" "0: Disable oscillation stop detection function,1: Enable oscillation stop detection function"
bitfld.byte 0x0 0. "OSTDIE,Oscillation Stop Detection Interrupt Enable" "0: Disable oscillation stop detection interrupt (do..,1: Enable oscillation stop detection interrupt.."
line.byte 0x1 "OSTDSR,Oscillation Stop Detection Status Register"
bitfld.byte 0x1 0. "OSTDF,Oscillation Stop Detection Flag" "0: Main clock oscillation stop not detected,1: Main clock oscillation stop detected"
group.byte 0x61++0x1
line.byte 0x0 "MOCOUTCR,MOCO User Trimming Control Register"
hexmask.byte 0x0 0.--7. 1. "MOCOUTRM,MOCO User Trimming"
line.byte 0x1 "HOCOUTCR,HOCO User Trimming Control Register"
hexmask.byte 0x1 0.--7. 1. "HOCOUTRM,HOCO User Trimming"
group.byte 0x6C++0x0
line.byte 0x0 "USBCKDIVCR,USB Clock Division Control Register"
bitfld.byte 0x0 0.--2. "USBCKDIV,USB Clock (USBCLK) Division Select" "0: Setting prohibited.,?,?,?,?,?,?,?"
group.byte 0x6E++0x0
line.byte 0x0 "CANFDCKDIVCR,CANFD Clock Division Control Register"
bitfld.byte 0x0 0.--2. "CANFDCKDIV,CANFD clock (CANFDCLK) Division Select" "0: /1 (value after reset) /2 /4 /6 /8 /3 /5,?,?,?,?,?,?,?"
group.byte 0x70++0x1
line.byte 0x0 "CECCKDIVCR,CEC Clock Division Control Register"
bitfld.byte 0x0 0.--2. "CECCKDIV,CEC clock (CECCLK) Division Select" "0: Setting prohibited,1: /2,?,?,?,?,?,?"
line.byte 0x1 "I3CCKDIVCR,I3C Clock Division Control Register"
bitfld.byte 0x1 0.--2. "I3CCKDIV,I3C clock (I3CCLK) division select" "0: Setting prohibited,1: /2,?,?,?,?,?,?"
group.byte 0x74++0x0
line.byte 0x0 "USBCKCR,USB Clock Control Register"
rbitfld.byte 0x0 7. "USBCKSRDY,USB Clock (USBCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch"
bitfld.byte 0x0 6. "USBCKSREQ,USB Clock (USBCLK) Switching Request" "0: No request,1: Request switching."
newline
bitfld.byte 0x0 0.--2. "USBCKSEL,USB Clock (USBCLK) Source Select" "0: Setting prohibited.,?,?,?,?,?,?,?"
group.byte 0x76++0x0
line.byte 0x0 "CANFDCKCR,CANFD Clock Control Register"
rbitfld.byte 0x0 7. "CANFDCKSRDY,CANFD clock (CANFDCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch"
bitfld.byte 0x0 6. "CANFDCKSREQ,CANFD clock (CANFDCLK) Switching Request" "0: No request,1: Request switching"
newline
bitfld.byte 0x0 0.--2. "CANFDCKSEL,CANFD clock (CANFDCLK) Source Select" "0: Setting prohibited,?,?,?,?,?,?,?"
group.byte 0x78++0x1
line.byte 0x0 "CECCKCR,CEC Clock Control Register"
rbitfld.byte 0x0 7. "CECCKSRDY,CEC clock (CECCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch"
bitfld.byte 0x0 6. "CECCKSREQ,CEC clock (CECCLK) Switching Request" "0: No request,1: Request switching"
newline
bitfld.byte 0x0 0.--2. "CECCKSEL,CEC clock (CECCLK) Source Select" "0: Setting prohibited,?,?,?,?,?,?,?"
line.byte 0x1 "I3CCKCR,I3C Clock Control Register"
rbitfld.byte 0x1 7. "I3CCKSRDY,I3C clock (I3CCLK) switching ready state flag" "0: Impossible to Switch,1: Possible to Switch"
bitfld.byte 0x1 6. "I3CCKSREQ,I3C clock (I3CCLK) switching request" "0: No request,1: Request switching"
newline
bitfld.byte 0x1 0.--2. "I3CCKSEL,I3C clock (I3CCLK) source select" "0: Setting prohibited,1: MOCO (value after reset),?,?,?,?,?,?"
group.byte 0x92++0x0
line.byte 0x0 "SNZCR,Snooze Control Register"
bitfld.byte 0x0 7. "SNZE,Snooze mode Enable" "0: Disable Snooze mode,1: Enable Snooze mode"
bitfld.byte 0x0 1. "SNZDTCEN,DTC Enable in Snooze mode" "0: Disable DTC operation,1: Enable DTC operation"
newline
bitfld.byte 0x0 0. "RXDREQEN,RXD0 Snooze Request Enable" "0: Ignore RXD0 falling edge in Software Standby mode,1: Detect RXD0 falling edge in Software Standby mode"
group.byte 0x94++0x0
line.byte 0x0 "SNZEDCR0,Snooze End Control Register 0"
bitfld.byte 0x0 7. "SCI0UMTED,SCI0 Address Mismatch Snooze End Enable" "0: Disable the snooze end request,1: Enable the snooze end request"
bitfld.byte 0x0 4. "AD0UMTED,ADC120 Compare Mismatch Snooze End Enable" "0: Disable the snooze end request,1: Enable the snooze end request"
newline
bitfld.byte 0x0 3. "AD0MATED,ADC120 Compare Match Snooze End Enable" "0: Disable the snooze end request,1: Enable the snooze end request"
bitfld.byte 0x0 2. "DTCNZRED,Not Last DTC Transmission Completion Snooze End Enable" "0: Disable the snooze end request,1: Enable the snooze end request"
newline
bitfld.byte 0x0 1. "DTCZRED,Last DTC Transmission Completion Snooze End Enable" "0: Disable the snooze end request,1: Enable the snooze end request"
bitfld.byte 0x0 0. "AGTUNFED,AGT1 Underflow Snooze End Enable" "0: Disable the snooze end request,1: Enable the snooze end request"
group.long 0x98++0x3
line.long 0x0 "SNZREQCR0,Snooze Request Control Register 0"
bitfld.long 0x0 30. "SNZREQEN30,Enable AGT1 compare match B snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 29. "SNZREQEN29,Enable AGT1 compare match A snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 28. "SNZREQEN28,Enable AGT1 underflow snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 25. "SNZREQEN25,Enable RTC period snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 24. "SNZREQEN24,Enable RTC alarm snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 14. "SNZREQEN14,Enable IRQ14 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 13. "SNZREQEN13,Enable IRQ13 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 12. "SNZREQEN12,Enable IRQ12 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 11. "SNZREQEN11,Enable IRQ11 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 10. "SNZREQEN10,Enable IRQ10 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 9. "SNZREQEN9,Enable IRQ9 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 8. "SNZREQEN8,Enable IRQ8 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 7. "SNZREQEN7,Enable IRQ7 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 6. "SNZREQEN6,Enable IRQ6 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 5. "SNZREQEN5,Enable IRQ5 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 4. "SNZREQEN4,Enable IRQ4 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 3. "SNZREQEN3,Enable IRQ3 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 2. "SNZREQEN2,Enable IRQ2 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
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bitfld.long 0x0 1. "SNZREQEN1,Enable IRQ1 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
bitfld.long 0x0 0. "SNZREQEN0,Enable IRQ0 pin snooze request" "0: Disable the snooze request,1: Enable the snooze request"
group.byte 0xA0++0x0
line.byte 0x0 "OPCCR,Operating Power Control Register"
rbitfld.byte 0x0 4. "OPCMTSF,Operating Power Control Mode Transition Status Flag" "0: Transition completed,1: During transition"
bitfld.byte 0x0 0.--1. "OPCM,Operating Power Control Mode Select" "0: High-speed mode,1: Setting prohibited,?,?"
group.byte 0xA2++0x0
line.byte 0x0 "MOSCWTCR,Main Clock Oscillator Wait Control Register"
hexmask.byte 0x0 0.--3. 1. "MSTS,Main Clock Oscillator Wait Time Setting"
group.byte 0xAA++0x0
line.byte 0x0 "SOPCCR,Sub Operating Power Control Register"
rbitfld.byte 0x0 4. "SOPCMTSF,Operating Power Control Mode Transition Status Flag" "0: Transition completed,1: During transition"
bitfld.byte 0x0 0. "SOPCM,Sub Operating Power Control Mode Select" "0: Other than Subosc-speed mode,1: Subosc-speed mode"
group.word 0xC0++0x1
line.word 0x0 "RSTSR1,Reset Status Register 1"
bitfld.word 0x0 15. "CPERF,Cache Parity Error Reset Detect Flag" "0: Cache Parity error reset not detected.,1: Cache Parity error reset detected."
bitfld.word 0x0 13. "TZERF,TrustZone Error Reset Detect Flag" "0: TrustZone error reset not detected.,1: TrustZone error reset detected."
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bitfld.word 0x0 11. "BUSMRF,Bus Master MPU Error Reset Detect Flag" "0: Bus master MPU error reset not detected,1: Bus master MPU error reset detected"
bitfld.word 0x0 9. "REERF,SRAM ECC Error Reset Detect Flag" "0: SRAM ECC error reset not detected,1: SRAM ECC error reset detected"
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bitfld.word 0x0 8. "RPERF,SRAM Parity Error Reset Detect Flag" "0: SRAM parity error reset not detected,1: SRAM parity error reset detected"
bitfld.word 0x0 2. "SWRF,Software Reset Detect Flag" "0: Software reset not detected,1: Software reset detected"
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bitfld.word 0x0 1. "WDTRF,Watchdog Timer Reset Detect Flag" "0: Watchdog timer reset not detected,1: Watchdog timer reset detected"
bitfld.word 0x0 0. "IWDTRF,Independent Watchdog Timer Reset Detect Flag" "0: Independent watchdog timer reset not detected,1: Independent watchdog timer reset detected"
group.byte 0xE0++0x3
line.byte 0x0 "LVD1CR1,Voltage Monitor 1 Circuit Control Register"
bitfld.byte 0x0 2. "IRQSEL,Voltage Monitor 1 Interrupt Type Select" "0: Non-maskable interrupt,1: Maskable interrupt"
bitfld.byte 0x0 0.--1. "IDTSEL,Voltage Monitor 1 Interrupt Generation Condition Select" "0: When VCC >= Vdet1 (rise) is detected,1: When VCC < Vdet1 (fall) is detected,?,?"
line.byte 0x1 "LVD1SR,Voltage Monitor 1 Circuit Status Register"
rbitfld.byte 0x1 1. "MON,Voltage Monitor 1 Signal Monitor Flag" "0: VCC < Vdet1,1: VCC >= Vdet1 or MON is disabled"
bitfld.byte 0x1 0. "DET,Voltage Monitor 1 Voltage Variation Detection Flag" "0: Not detected,1: Vdet1 crossing is detected"
line.byte 0x2 "LVD2CR1,Voltage Monitor 2 Circuit Control Register 1"
bitfld.byte 0x2 2. "IRQSEL,Voltage Monitor 2 Interrupt Type Select" "0: Non-maskable interrupt,1: Maskable interrupt"
bitfld.byte 0x2 0.--1. "IDTSEL,Voltage Monitor 2 Interrupt Generation Condition Select" "0: When VCC>= Vdet2 (rise) is detected,1: When VCC < Vdet2 (fall) is detected,?,?"
line.byte 0x3 "LVD2SR,Voltage Monitor 2 Circuit Status Register"
rbitfld.byte 0x3 1. "MON,Voltage Monitor 2 Signal Monitor Flag" "0: VCC < Vdet2,1: VCC>= Vdet2 or MON is disabled"
bitfld.byte 0x3 0. "DET,Voltage Monitor 2 Voltage Variation Detection Flag" "0: Not detected,1: Vdet2 crossing is detected"
group.long 0x3C0++0xF
line.long 0x0 "CGFSAR,Clock Generation Function Security Attribute Register"
bitfld.long 0x0 20. "NONSEC20,Non Secure Attribute bit 20" "0: Secure,1: Non Secure"
bitfld.long 0x0 18. "NONSEC18,Non Secure Attribute bit 18" "0: Secure,1: Non Secure"
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bitfld.long 0x0 16. "NONSEC16,Non Secure Attribute bit 16" "0: Secure,1: Non Secure"
bitfld.long 0x0 11. "NONSEC11,Non Secure Attribute bit 11" "0: Secure,1: Non Secure"
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bitfld.long 0x0 8. "NONSEC08,Non Secure Attribute bit 08" "0: Secure,1: Non Secure"
bitfld.long 0x0 7. "NONSEC07,Non Secure Attribute bit 07" "0: Secure,1: Non Secure"
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bitfld.long 0x0 6. "NONSEC06,Non Secure Attribute bit 06" "0: Secure,1: Non Secure"
bitfld.long 0x0 5. "NONSEC05,Non Secure Attribute bit 05" "0: Secure,1: Non Secure"
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bitfld.long 0x0 4. "NONSEC04,Non Secure Attribute bit 04" "0: Secure,1: Non Secure"
bitfld.long 0x0 3. "NONSEC03,Non Secure Attribute bit 03" "0: Secure,1: Non Secure"
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bitfld.long 0x0 2. "NONSEC02,Non Secure Attribute bit 02" "0: Secure,1: Non Secure"
bitfld.long 0x0 0. "NONSEC00,Non Secure Attribute bit 00" "0: Secure,1: Non Secure"
line.long 0x4 "RSTSAR,Reset Security Attribution Register"
bitfld.long 0x4 2. "NONSEC2,Non Secure Attribute bit 2" "0: Secure,1: Non Secure"
bitfld.long 0x4 1. "NONSEC1,Non Secure Attribute bit 1" "0: Secure,1: Non Secure"
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bitfld.long 0x4 0. "NONSEC0,Non Secure Attribute bit 0" "0: Secure,1: Non Secure"
line.long 0x8 "LPMSAR,Low Power Mode Security Attribution Register"
bitfld.long 0x8 9. "NONSEC9,Non Secure Attribute bit 9" "0: Secure,1: Non Secure"
bitfld.long 0x8 8. "NONSEC8,Non Secure Attribute bit 8" "0: Secure,1: Non Secure"
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bitfld.long 0x8 4. "NONSEC4,Non Secure Attribute bit 4" "0: Secure,1: Non Secure"
bitfld.long 0x8 2. "NONSEC2,Non Secure Attribute bit 2" "0: Secure,1: Non Secure"
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bitfld.long 0x8 0. "NONSEC0,Non Secure Attribute bit 0" "0: Secure,1: Non Secure"
line.long 0xC "LVDSAR,Low Voltage Detection Security Attribution Register"
bitfld.long 0xC 1. "NONSEC1,Non Secure Attribute bit 1" "0: Secure,1: Non Secure"
bitfld.long 0xC 0. "NONSEC0,Non Secure Attribute bit 0" "0: Secure,1: Non Secure"
group.long 0x3E0++0x3
line.long 0x0 "DPFSAR,Deep Standby Interrupt Factor Security Attribution Register"
bitfld.long 0x0 26. "DPFSA26,Deep Standby Interrupt Factor Security Attribute bit 26" "0: Secure,1: Non Secure"
bitfld.long 0x0 24. "DPFSA24,Deep Standby Interrupt Factor Security Attribute bit 24" "0: Secure,1: Non Secure"
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bitfld.long 0x0 20. "DPFSA20,Deep Standby Interrupt Factor Security Attribute bit 20" "0: Secure,1: Non Secure"
bitfld.long 0x0 19. "DPFSA19,Deep Standby Interrupt Factor Security Attribute bit 19" "0: Secure,1: Non Secure"
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bitfld.long 0x0 18. "DPFSA18,Deep Standby Interrupt Factor Security Attribute bit 18" "0: Secure,1: Non Secure"
bitfld.long 0x0 17. "DPFSA17,Deep Standby Interrupt Factor Security Attribute bit 17" "0: Secure,1: Non Secure"
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bitfld.long 0x0 16. "DPFSA16,Deep Standby Interrupt Factor Security Attribute bit 16" "0: Secure,1: Non Secure"
bitfld.long 0x0 14. "DPFSA14,Deep Standby Interrupt Factor Security Attribute bit 14" "0: Secure,1: Non Secure"
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bitfld.long 0x0 12. "DPFSA12,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
bitfld.long 0x0 11. "DPFSA11,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
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bitfld.long 0x0 10. "DPFSA10,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
bitfld.long 0x0 9. "DPFSA09,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
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bitfld.long 0x0 8. "DPFSA08,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
bitfld.long 0x0 7. "DPFSA07,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
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bitfld.long 0x0 6. "DPFSA06,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
bitfld.long 0x0 5. "DPFSA05,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
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bitfld.long 0x0 4. "DPFSA04,Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)" "0: Secure,1: Non Secure"
bitfld.long 0x0 1. "DPFSA1,Deep Standby Interrupt Factor Security Attribute bit 1" "0: Secure,1: Non Secure"
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bitfld.long 0x0 0. "DPFSA0,Deep Standby Interrupt Factor Security Attribute bit 0" "0: Secure,1: Non Secure"
group.word 0x3FE++0x1
line.word 0x0 "PRCR,Protect Register"
hexmask.word.byte 0x0 8.--15. 1. "PRKEY,PRC Key Code"
bitfld.word 0x0 4. "PRC4," "0: Disable writes,1: Enable writes"
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bitfld.word 0x0 3. "PRC3,Enable writing to the registers related to the LVD" "0: Disable writes,1: Enable writes"
bitfld.word 0x0 1. "PRC1,Enable writing to the registers related to the low power modes" "0: Disable writes,1: Enable writes"
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bitfld.word 0x0 0. "PRC0,Enable writing to the registers related to the clock generation circuit" "0: Disable writes,1: Enable writes"
group.byte 0x400++0xC
line.byte 0x0 "DPSBYCR,Deep Standby Control Register"
bitfld.byte 0x0 7. "DPSBY,Deep Software Standby" "0: Sleep mode (SBYCR.SSBY=0) / Software Standby..,1: Sleep mode (SBYCR.SSBY=0) / Deep Software.."
bitfld.byte 0x0 6. "IOKEEP,I/O Port Rentention" "0: When the Deep Software Standby mode is canceled..,1: When the Deep Software Standby mode is canceled.."
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bitfld.byte 0x0 0.--1. "DEEPCUT,Power-Supply Control" "0: Power to the standby RAM Low-speed on-chip..,1: Power to the standby RAM Low-speed on-chip..,?,?"
line.byte 0x1 "DPSWCR,Deep Standby Wait Control Register"
hexmask.byte 0x1 0.--5. 1. "WTSTS,Deep Software Wait Standby Time Setting Bit"
line.byte 0x2 "DPSIER0,Deep Standby Interrupt Enable Register 0"
bitfld.byte 0x2 7. "DIRQ7E,IRQ7-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
bitfld.byte 0x2 6. "DIRQ6E,IRQ6-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
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bitfld.byte 0x2 5. "DIRQ5E,IRQ5-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
bitfld.byte 0x2 4. "DIRQ4E,IRQ4-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
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bitfld.byte 0x2 1. "DIRQ1E,IRQ1-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: DS Pin Enable"
bitfld.byte 0x2 0. "DIRQ0E,IRQ0-DS Pin Enable" "0: DS Pin Enable,1: Cancelling Deep Software Standby mode is enabled"
line.byte 0x3 "DPSIER1,Deep Standby Interrupt Enable Register 1"
bitfld.byte 0x3 6. "DIRQ14E,IRQ14-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
bitfld.byte 0x3 4. "DIRQ12E,IRQ12-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
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bitfld.byte 0x3 3. "DIRQ11E,IRQ11-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
bitfld.byte 0x3 2. "DIRQ10E,IRQ10-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
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bitfld.byte 0x3 1. "DIRQ9E,IRQ9-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
bitfld.byte 0x3 0. "DIRQ8E,IRQ8-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
line.byte 0x4 "DPSIER2,Deep Software Standby Interrupt Enable Register 2"
bitfld.byte 0x4 4. "DNMIE,NMI Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
bitfld.byte 0x4 3. "DRTCAIE,RTC Alarm interrupt Deep Software Standby Cancel Signal Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
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bitfld.byte 0x4 2. "DRTCIIE,RTC Interval interrupt Deep Software Standby Cancel Signal Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
bitfld.byte 0x4 1. "DLVD2IE,LVD2 Deep Software Standby Cancel Signal Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
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bitfld.byte 0x4 0. "DLVD1IE,LVD1 Deep Software Standby Cancel Signal Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled"
line.byte 0x5 "DPSIER3,Deep Standby Interrupt Enable Register 3"
bitfld.byte 0x5 2. "DAGT1IE,AGT1 Underflow Deep Standby Cancel Signal Enable" "0: Cancelling deep standby mode is disabled,1: Cancelling deep standby mode is enabled"
bitfld.byte 0x5 0. "DUSBFS0IE,USBFS0 Suspend/Resume Deep Standby Cancel Signal Enable" "0: Cancelling deep standby mode is disabled,1: Cancelling deep standby mode is enabled"
line.byte 0x6 "DPSIFR0,Deep Standby Interrupt Flag Register 0"
bitfld.byte 0x6 7. "DIRQ7F,IRQ7-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
bitfld.byte 0x6 6. "DIRQ6F,IRQ6-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
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bitfld.byte 0x6 5. "DIRQ5F,IRQ5-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
bitfld.byte 0x6 4. "DIRQ4F,IRQ4-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
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bitfld.byte 0x6 1. "DIRQ1F,IRQ1-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: DS Pin Deep Standby Cancel Flag"
bitfld.byte 0x6 0. "DIRQ0F,IRQ0-DS Pin Deep Standby Cancel Flag" "0: DS Pin Deep Standby Cancel Flag,1: The cancel request is generated"
line.byte 0x7 "DPSIFR1,Deep Standby Interrupt Flag Register 1"
bitfld.byte 0x7 6. "DIRQ14F,IRQ14-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
bitfld.byte 0x7 4. "DIRQ12F,IRQ12-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
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bitfld.byte 0x7 3. "DIRQ11F,IRQ11-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
bitfld.byte 0x7 2. "DIRQ10F,IRQ10-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
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bitfld.byte 0x7 1. "DIRQ9F,IRQ9-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
bitfld.byte 0x7 0. "DIRQ8F,IRQ8-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
line.byte 0x8 "DPSIFR2,Deep Software Standby Interrupt Flag Register 2"
bitfld.byte 0x8 4. "DNMIF,NMI Pin Deep Software Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
bitfld.byte 0x8 3. "DRTCAIF,RTC Alarm Interrupt Deep Software Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
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bitfld.byte 0x8 2. "DRTCIIF,RTC Interval Interrupt Deep Software Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
bitfld.byte 0x8 1. "DLVD2IF,LVD2 Deep Software Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
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bitfld.byte 0x8 0. "DLVD1IF,LVD1 Deep Software Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated"
line.byte 0x9 "DPSIFR3,Deep Standby Interrupt Flag Register 3"
bitfld.byte 0x9 2. "DAGT1IF,AGT1 Underflow Deep Standby Cancel Flag" "0: The cancel request is not generated.,1: The cancel request is generated."
bitfld.byte 0x9 0. "DUSBFS0IF,USBFS0 Suspend/Resume Deep Standby Cancel Flag" "0: The cancel request is not generated.,1: The cancel request is generated."
line.byte 0xA "DPSIEGR0,Deep Standby Interrupt Edge Register 0"
bitfld.byte 0xA 7. "DIRQ7EG,IRQ7-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge"
bitfld.byte 0xA 6. "DIRQ6EG,IRQ6-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge"
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bitfld.byte 0xA 5. "DIRQ5EG,IRQ5-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge"
bitfld.byte 0xA 4. "DIRQ4EG,IRQ4-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge"
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bitfld.byte 0xA 1. "DIRQ1EG,IRQ1-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: DS Pin Edge Select"
bitfld.byte 0xA 0. "DIRQ0EG,IRQ0-DS Pin Edge Select" "0: DS Pin Edge Select,1: A cancel request is generated at a rising edge"
line.byte 0xB "DPSIEGR1,Deep Standby Interrupt Edge Register 1"
bitfld.byte 0xB 6. "DIRQ14EG,IRQ14-DS Pin Edge Select" "0: A cancel request is generated at a falling edge.,1: A cancel request is generated at a rising edge."
bitfld.byte 0xB 4. "DIRQ12EG,IRQ12-DS Pin Edge Select" "0: A cancel request is generated at a falling edge.,1: A cancel request is generated at a rising edge."
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bitfld.byte 0xB 3. "DIRQ11EG,IRQ11-DS Pin Edge Select" "0: A cancel request is generated at a falling edge.,1: A cancel request is generated at a rising edge."
bitfld.byte 0xB 2. "DIRQ10EG,IRQ10-DS Pin Edge Select" "0: A cancel request is generated at a falling edge.,1: A cancel request is generated at a rising edge"
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bitfld.byte 0xB 1. "DIRQ9EG,IRQ9-DS Pin Edge Select" "0: A cancel request is generated at a falling edge.,1: A cancel request is generated at a rising edge."
bitfld.byte 0xB 0. "DIRQ8EG,IRQ8-DS Pin Edge Select" "0: A cancel request is generated at a falling edge.,1: A cancel request is generated at a rising edge."
line.byte 0xC "DPSIEGR2,Deep Software Standby Interrupt Edge Register 2"
bitfld.byte 0xC 4. "DNMIEG,NMI Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge"
bitfld.byte 0xC 1. "DLVD2EG,LVD2 Edge Select" "0: A cancel request is generated when VCC < Vdet2..,1: A cancel request is generated when VCC >= Vdet2.."
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bitfld.byte 0xC 0. "DLVD1EG,LVD1 Edge Select" "0: A cancel request is generated when VCC < Vdet1..,1: A cancel request is generated when VCC >= Vdet1.."
group.byte 0x40E++0x0
line.byte 0x0 "SYOCDCR,System Control OCD Control Register"
bitfld.byte 0x0 7. "DBGEN,Debugger Enable bit" "0: On-chip debugger is disabled,1: On-chip debugger is enabled"
bitfld.byte 0x0 0. "DOCDF,Deep Software Standby OCD flag" "0: DBIRQ is not generated,1: DBIRQ is generated"
group.byte 0x410++0x1
line.byte 0x0 "RSTSR0,Reset Status Register 0"
bitfld.byte 0x0 7. "DPSRSTF,Deep Software Standby Reset Detect Flag" "0: Deep software standby mode cancellation not..,1: Deep software standby mode cancellation.."
bitfld.byte 0x0 3. "LVD2RF,Voltage Monitor 2 Reset Detect Flag" "0: Voltage monitor 2 reset not detected,1: Voltage monitor 2 reset detected"
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bitfld.byte 0x0 2. "LVD1RF,Voltage Monitor 1 Reset Detect Flag" "0: Voltage monitor 1 reset not detected,1: Voltage monitor 1 reset detected"
bitfld.byte 0x0 1. "LVD0RF,Voltage Monitor 0 Reset Detect Flag" "0: Voltage monitor 0 reset not detected,1: Voltage monitor 0 reset detected"
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bitfld.byte 0x0 0. "PORF,Power-On Reset Detect Flag" "0: Power-on reset not detected,1: Power-on reset detected"
line.byte 0x1 "RSTSR2,Reset Status Register 2"
bitfld.byte 0x1 0. "CWSF,Cold/Warm Start Determination Flag" "0: Cold start,1: Warm start"
group.byte 0x413++0x0
line.byte 0x0 "MOMCR,Main Clock Oscillator Mode Oscillation Control Register"
bitfld.byte 0x0 6. "MOSEL,Main Clock Oscillator Switching" "0: Resonator,1: External clock input"
bitfld.byte 0x0 4.--5. "MODRV,Main Clock Oscillator Drive Capability 0 Switching" "0: 20 MHz to 24 MHz,1: 16 MHz to 20 MHz,?,?"
group.byte 0x416++0x2
line.byte 0x0 "FWEPROR,Flash P/E Protect Register"
bitfld.byte 0x0 0.--1. "FLWE,Flash Programming and Erasure" "0: Prohibits Program Block Erase Multi Block Erase..,1: Permits Program Block Erase Multi Block Erase..,?,?"
line.byte 0x1 "LVD1CMPCR,Voltage Monitoring 1 Comparator Control Register"
bitfld.byte 0x1 7. "LVD1E,Voltage Detection 1 Enable" "0: Voltage detection 1 circuit disabled,1: Voltage detection 1 circuit enabled"
hexmask.byte 0x1 0.--4. 1. "LVD1LVL,Voltage Detection 1 Level Select (Standard voltage during drop in voltage)"
line.byte 0x2 "LVD2CMPCR,Voltage Monitoring 2 Comparator Control Register"
bitfld.byte 0x2 7. "LVD2E,Voltage Detection 2 Enable" "0: Voltage detection 2 circuit disabled,1: Voltage detection 2 circuit enabled"
bitfld.byte 0x2 0.--2. "LVD2LVL,Voltage Detection 2 Level Select (Standard voltage during drop in voltage)" "0: Setting prohibited,?,?,?,?,?,?,?"
group.byte 0x41A++0x1
line.byte 0x0 "LVD1CR0,Voltage Monitor 1 Circuit Control Register 0"
bitfld.byte 0x0 7. "RN,Voltage Monitor 1 Reset Negate Select" "0: Negate after a stabilization time (tLVD1) when..,1: Negate after a stabilization time (tLVD1) on.."
bitfld.byte 0x0 6. "RI,Voltage Monitor 1 Circuit Mode Select" "0: Generate voltage monitor 1 interrupt on Vdet1..,1: Enable voltage monitor 1 reset when the voltage.."
newline
bitfld.byte 0x0 4.--5. "FSAMP,Sampling Clock Select" "0: 1/2 LOCO frequency,1: 1/4 LOCO frequency,?,?"
bitfld.byte 0x0 2. "CMPE,Voltage Monitor 1 Circuit Comparison Result Output Enable" "0: Disable voltage monitor 1 circuit comparison..,1: Enable voltage monitor 1 circuit comparison.."
newline
bitfld.byte 0x0 1. "DFDIS,Voltage monitor 1 Digital Filter Disabled Mode Select" "0: Enable the digital filter,1: Disable the digital filter"
bitfld.byte 0x0 0. "RIE,Voltage Monitor 1 Interrupt/Reset Enable" "0: Disable,1: Enable"
line.byte 0x1 "LVD2CR0,Voltage Monitor 2 Circuit Control Register 0"
bitfld.byte 0x1 7. "RN,Voltage Monitor 2 Reset Negate Select" "0: Negate after a stabilization time (tLVD2) when..,1: Negate after a stabilization time (tLVD2) on.."
bitfld.byte 0x1 6. "RI,Voltage Monitor 2 Circuit Mode Select" "0: Generate voltage monitor 2 interrupt on Vdet2..,1: Enable voltage monitor 2 reset when the voltage.."
newline
bitfld.byte 0x1 4.--5. "FSAMP,Sampling Clock Select" "0: 1/2 LOCO frequency,1: 1/4 LOCO frequency,?,?"
bitfld.byte 0x1 2. "CMPE,Voltage Monitor 2 Circuit Comparison Result Output Enable" "0: Disable voltage monitor 2 circuit comparison..,1: Enable voltage monitor 2 circuit comparison.."
newline
bitfld.byte 0x1 1. "DFDIS,Voltage monitor 2 Digital Filter Disabled Mode Select" "0: Enable the digital filter,1: Disable the digital filter"
bitfld.byte 0x1 0. "RIE,Voltage Monitor 2 Interrupt/Reset Enable" "0: Disable,1: Enable"
group.byte 0x480++0x1
line.byte 0x0 "SOSCCR,Sub-Clock Oscillator Control Register"
bitfld.byte 0x0 0. "SOSTP,Sub Clock Oscillator Stop" "0: Operate the sub-clock oscillator,1: Stop the sub-clock oscillator"
line.byte 0x1 "SOMCR,Sub-Clock Oscillator Mode Control Register"
bitfld.byte 0x1 1. "SODRV,Sub-Clock Oscillator Drive Capability Switching" "0: Standard,1: Low"
group.byte 0x490++0x0
line.byte 0x0 "LOCOCR,Low-Speed On-Chip Oscillator Control Register"
bitfld.byte 0x0 0. "LCSTP,LOCO Stop" "0: Operate the LOCO clock,1: Stop the LOCO clock"
group.byte 0x492++0x0
line.byte 0x0 "LOCOUTCR,LOCO User Trimming Control Register"
hexmask.byte 0x0 0.--7. 1. "LOCOUTRM,LOCO User Trimming"
tree.end
tree "TSD (Temperature Sensor Calibration Data)"
base ad:0x407FB000
rgroup.long 0x17C++0x3
line.long 0x0 "TSCDR,Temperature Sensor Calibration Data Register"
hexmask.long.word 0x0 0.--15. 1. "TSCDR,Temperature Sensor Calibration Data"
tree.end
tree "TSN (Temperature Sensor)"
base ad:0x400F3000
group.byte 0x0++0x0
line.byte 0x0 "TSCR,Temperature Sensor Control Register"
bitfld.byte 0x0 7. "TSEN,Temperature Sensor Enable" "0: Stop the temperature sensor,1: Start the temperature sensor."
bitfld.byte 0x0 4. "TSOE,Temperature Sensor Output Enable" "0: Disable output from the temperature sensor to..,1: Enable output from the temperature sensor to the.."
tree.end
tree "TZF (TrustZone Filter)"
base ad:0x40000E00
group.word 0x0++0x1
line.word 0x0 "TZFOAD,TrustZone Filter Operation After Detection Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,KeyCode"
bitfld.word 0x0 0. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Reset"
group.word 0x4++0x1
line.word 0x0 "TZFPT,TrustZone Filter Protect Register"
hexmask.word.byte 0x0 8.--15. 1. "KEY,KeyCode"
bitfld.word 0x0 0. "PROTECT,Protection of register" "0: All Bus TrustZone Filter register writing is..,1: All Bus TrustZone Filter register writing is.."
tree.end
tree "USBFS (USB 2.0 Full-Speed Module)"
base ad:0x40090000
group.word 0x0++0x1
line.word 0x0 "SYSCFG,System Configuration Control Register"
bitfld.word 0x0 10. "SCKE,USB Clock Enable" "0: Stop clock supply to the USBFS,1: Enable clock supply to the USBFS"
bitfld.word 0x0 4. "DPRPU,D+ Line Resistor Control" "0: Disable line pull-up,1: Enable line pull-up"
newline
bitfld.word 0x0 0. "USBE,USBFS Operation Enable" "0: Disable,1: Enable"
rgroup.word 0x4++0x1
line.word 0x0 "SYSSTS0,System Configuration Status Register 0"
bitfld.word 0x0 0.--1. "LNST,USB Data Line Status Monitor" "0,1,2,3"
group.word 0x8++0x1
line.word 0x0 "DVSTCTR0,Device State Control Register 0"
bitfld.word 0x0 8. "WKUP,Wakeup Output" "0: Do not output remote wakeup signal,1: Output remote wakeup signal"
rbitfld.word 0x0 0.--2. "RHST,USB Bus Reset Status" "0: Setting prohibited,1: USB bus reset in progress,?,?,?,?,?,?"
group.word 0x14++0x1
line.word 0x0 "CFIFO,CFIFO Port Register"
hexmask.word 0x0 0.--15. 1. "FIFOPORT,FIFO Port"
group.byte 0x14++0x0
line.byte 0x0 "CFIFOL,CFIFO Port Register"
group.word 0x20++0x3
line.word 0x0 "CFIFOSEL,CFIFO Port Select Register"
bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCTR.DTLN[8:0]) are..,1: The DTLN[8:0] bits are decremented each time the.."
bitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: Do not rewind buffer pointer,1: Rewind buffer pointer"
newline
bitfld.word 0x0 10. "MBW,CFIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width"
bitfld.word 0x0 8. "BIGEND,CFIFO Port Endian Control" "0: Little endian,1: Big endian"
newline
bitfld.word 0x0 5. "ISEL,CFIFO Port Access Direction When DCP Is Selected" "0: Select reading from the FIFO buffer,1: Select writing to the FIFO buffer"
hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,CFIFO Port Access Pipe Specification"
line.word 0x2 "CFIFOCTR,CFIFO Port Control Register"
bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid (writing 0 has no effect),1: Writing ended"
bitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side"
newline
rbitfld.word 0x2 13. "FRDY,FIFO Port Ready" "0: FIFO port access disabled,1: FIFO port access enabled"
hexmask.word 0x2 0.--8. 1. "DTLN,Receive Data Length"
group.word 0x30++0x1
line.word 0x0 "INTENB0,Interrupt Enable Register 0"
bitfld.word 0x0 15. "VBSE,VBUS Interrupt Enable" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x0 14. "RSME,Resume Interrupt Enable" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x0 13. "SOFE,Frame Number Update Interrupt Enable" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x0 12. "DVSE,Device State Transition Interrupt Enable" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x0 11. "CTRE,Control Transfer Stage Transition Interrupt Enable" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x0 10. "BEMPE,Buffer Empty Interrupt Enable" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x0 9. "NRDYE,Buffer Not Ready Response Interrupt Enable" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x0 8. "BRDYE,Buffer Ready Interrupt Enable" "0: Disable interrupt request,1: Enable interrupt request"
group.word 0x36++0x7
line.word 0x0 "BRDYENB,BRDY Interrupt Enable Register"
bitfld.word 0x0 7. "PIPE7BRDYE,BRDY Interrupt Enable for Pipe 7" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x0 6. "PIPE6BRDYE,BRDY Interrupt Enable for Pipe 6" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x0 5. "PIPE5BRDYE,BRDY Interrupt Enable for Pipe 5" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x0 4. "PIPE4BRDYE,BRDY Interrupt Enable for Pipe 4" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x0 0. "PIPE0BRDYE,BRDY Interrupt Enable for Pipe 0" "0: Disable interrupt request,1: Enable interrupt request"
line.word 0x2 "NRDYENB,NRDY Interrupt Enable Register"
bitfld.word 0x2 7. "PIPE7NRDYE,NRDY Interrupt Enable for Pipe 7" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x2 6. "PIPE6NRDYE,NRDY Interrupt Enable for Pipe 6" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x2 5. "PIPE5NRDYE,NRDY Interrupt Enable for Pipe 5" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x2 4. "PIPE4NRDYE,NRDY Interrupt Enable for Pipe 4" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x2 0. "PIPE0NRDYE,NRDY Interrupt Enable for Pipe 0" "0: Disable interrupt request,1: Enable interrupt request"
line.word 0x4 "BEMPENB,BEMP Interrupt Enable Register"
bitfld.word 0x4 7. "PIPE7BEMPE,BEMP Interrupt Enable for Pipe 7" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x4 6. "PIPE6BEMPE,BEMP Interrupt Enable for Pipe 6" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x4 5. "PIPE5BEMPE,BEMP Interrupt Enable for Pipe 5" "0: Disable interrupt request,1: Enable interrupt request"
bitfld.word 0x4 4. "PIPE4BEMPE,BEMP Interrupt Enable for Pipe 4" "0: Disable interrupt request,1: Enable interrupt request"
newline
bitfld.word 0x4 0. "PIPE0BEMPE,BEMP Interrupt Enable for Pipe 0" "0: Disable interrupt request,1: Enable interrupt request"
line.word 0x6 "SOFCFG,SOF Output Configuration Register"
bitfld.word 0x6 6. "BRDYM,BRDY Interrupt Status Clear Timing" "0: Clear BRDY flag by software,1: Clear BRDY flag by the USBFS through a data read.."
rbitfld.word 0x6 4. "EDGESTS,Edge Interrupt Output Status Monitor" "0,1"
group.word 0x40++0x1
line.word 0x0 "INTSTS0,Interrupt Status Register 0"
bitfld.word 0x0 15. "VBINT,VBUS Interrupt Status" "0: No VBUS interrupt occurred,1: VBUS interrupt occurred"
bitfld.word 0x0 14. "RESM,Resume Interrupt Status" "0: No resume interrupt occurred,1: Resume interrupt occurred"
newline
bitfld.word 0x0 13. "SOFR,Frame Number Refresh Interrupt Status" "0: No SOF interrupt occurred,1: SOF interrupt occurred"
bitfld.word 0x0 12. "DVST,Device State Transition Interrupt Status" "0: No device state transition interrupt occurred,1: Device state transition interrupt occurred"
newline
bitfld.word 0x0 11. "CTRT,Control Transfer Stage Transition Interrupt Status" "0: No control transfer stage transition interrupt..,1: Control transfer stage transition interrupt.."
rbitfld.word 0x0 10. "BEMP,Buffer Empty Interrupt Status" "0: No BEMP interrupt occurred,1: BEMP interrupt occurred"
newline
rbitfld.word 0x0 9. "NRDY,Buffer Not Ready Interrupt Status" "0: No NRDY interrupt occurred,1: NRDY interrupt occurred"
rbitfld.word 0x0 8. "BRDY,Buffer Ready Interrupt Status" "0: No BRDY interrupt occurred,1: BRDY interrupt occurred"
newline
rbitfld.word 0x0 7. "VBSTS,VBUS Input Status" "0: USB_VBUS pin is low,1: USB_VBUS pin is high"
rbitfld.word 0x0 4.--6. "DVSQ,Device State" "0: Suspend state,1: Default state,?,?,?,?,?,?"
newline
bitfld.word 0x0 3. "VALID,USB Request Reception" "0: Setup packet not received,1: Setup packet received"
rbitfld.word 0x0 0.--2. "CTSQ,Control Transfer Stage" "0: Idle or setup stage,1: Control read data stage,?,?,?,?,?,?"
group.word 0x46++0x5
line.word 0x0 "BRDYSTS,BRDY Interrupt Status Register"
bitfld.word 0x0 7. "PIPE7BRDY,BRDY Interrupt Status for Pipe 7" "0: No BRDY interrupt occurred,1: BRDY interrupt occurred"
bitfld.word 0x0 6. "PIPE6BRDY,BRDY Interrupt Status for Pipe 6" "0: No BRDY interrupt occurred,1: BRDY interrupt occurred"
newline
bitfld.word 0x0 5. "PIPE5BRDY,BRDY Interrupt Status for Pipe 5" "0: No BRDY interrupt occurred,1: BRDY interrupt occurred"
bitfld.word 0x0 4. "PIPE4BRDY,BRDY Interrupt Status for Pipe 4" "0: No BRDY interrupt occurred,1: BRDY interrupt occurred"
newline
bitfld.word 0x0 0. "PIPE0BRDY,BRDY Interrupt Status for Pipe 0" "0: No BRDY interrupt occurred,1: BRDY interrupt occurred"
line.word 0x2 "NRDYSTS,NRDY Interrupt Status Register"
bitfld.word 0x2 7. "PIPE7NRDY,NRDY Interrupt Status for Pipe 7" "0: No NRDY interrupt occurred,1: NRDY interrupt occurred"
bitfld.word 0x2 6. "PIPE6NRDY,NRDY Interrupt Status for Pipe 6" "0: No NRDY interrupt occurred,1: NRDY interrupt occurred"
newline
bitfld.word 0x2 5. "PIPE5NRDY,NRDY Interrupt Status for Pipe 5" "0: No NRDY interrupt occurred,1: NRDY interrupt occurred"
bitfld.word 0x2 4. "PIPE4NRDY,NRDY Interrupt Status for Pipe 4" "0: No NRDY interrupt occurred,1: NRDY interrupt occurred"
newline
bitfld.word 0x2 0. "PIPE0NRDY,NRDY Interrupt Status for Pipe 0" "0: No NRDY interrupt occurred,1: NRDY interrupt occurred"
line.word 0x4 "BEMPSTS,BEMP Interrupt Status Register"
bitfld.word 0x4 7. "PIPE7BEMP,BEMP Interrupt Status for Pipe 7" "0: No BEMP interrupt occurred,1: BEMP interrupt occurred"
bitfld.word 0x4 6. "PIPE6BEMP,BEMP Interrupt Status for Pipe 6" "0: No BEMP interrupt occurred,1: BEMP interrupt occurred"
newline
bitfld.word 0x4 5. "PIPE5BEMP,BEMP Interrupt Status for Pipe 5" "0: No BEMP interrupt occurred,1: BEMP interrupt occurred"
bitfld.word 0x4 4. "PIPE4BEMP,BEMP Interrupt Status for Pipe 4" "0: No BEMP interrupt occurred,1: BEMP interrupt occurred"
newline
bitfld.word 0x4 0. "PIPE0BEMP,BEMP Interrupt Status for Pipe 0" "0: No BEMP interrupt occurred,1: BEMP interrupt occurred"
rgroup.word 0x4C++0x1
line.word 0x0 "FRMNUM,Frame Number Register"
hexmask.word 0x0 0.--10. 1. "FRNM,Frame Number"
group.word 0x4E++0x3
line.word 0x0 "DVCHGR,Device State Change Register"
bitfld.word 0x0 15. "DVCHG,Device State Change" "0: Disable writes to the USBADDR.STSRECOV[3:0] and..,1: Enable writes to the USBADDR.STSRECOV[3:0] and.."
line.word 0x2 "USBADDR,USB Address Register"
hexmask.word.byte 0x2 8.--11. 1. "STSRECOV,Status Recovery"
hexmask.word.byte 0x2 0.--6. 1. "USBADDR,USB Address"
rgroup.word 0x54++0x7
line.word 0x0 "USBREQ,USB Request Type Register"
hexmask.word.byte 0x0 8.--15. 1. "BREQUEST,Request"
hexmask.word.byte 0x0 0.--7. 1. "BMREQUESTTYPE,Request Type"
line.word 0x2 "USBVAL,USB Request Value Register"
hexmask.word 0x2 0.--15. 1. "WVALUE,Value"
line.word 0x4 "USBINDX,USB Request Index Register"
hexmask.word 0x4 0.--15. 1. "WINDEX,Index"
line.word 0x6 "USBLENG,USB Request Length Register"
hexmask.word 0x6 0.--15. 1. "WLENTUH,Length"
group.word 0x5C++0x5
line.word 0x0 "DCPCFG,DCP Configuration Register"
bitfld.word 0x0 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Keep pipe open after transfer ends,1: Disable pipe after transfer ends"
line.word 0x2 "DCPMAXP,DCP Maximum Packet Size Register"
hexmask.word.byte 0x2 0.--6. 1. "MXPS,Maximum Packet Size"
line.word 0x4 "DCPCTR,DCP Control Register"
rbitfld.word 0x4 15. "BSTS,Buffer Status" "0: Buffer access disabled,1: Buffer access enabled"
bitfld.word 0x4 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid (writing 0 has no effect),1: Clear the expected value for the next.."
newline
bitfld.word 0x4 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid (writing 0 has no effect),1: Set the expected value for the next transaction.."
rbitfld.word 0x4 6. "SQMON,Sequence Toggle Bit Monitor" "0: DATA0,1: ATA1"
newline
rbitfld.word 0x4 5. "PBUSY,Pipe Busy" "0: DCP not used for the USB bus,1: DCP in use for the USB bus"
bitfld.word 0x4 2. "CCPL,Control Transfer End Enable" "0: Disable control transfer completion,1: Enable control transfer completion"
newline
bitfld.word 0x4 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depends on the buffer state),?,?"
group.word 0x64++0x1
line.word 0x0 "PIPESEL,Pipe Window Select Register"
hexmask.word.byte 0x0 0.--3. 1. "PIPESEL,Pipe Window Select"
group.word 0x68++0x1
line.word 0x0 "PIPECFG,Pipe Configuration Register"
bitfld.word 0x0 14.--15. "TYPE,Transfer Type" "0: Pipe not used,1: Pipes 4 and 5: Bulk transfer Pipes 6 and 7:..,?,?"
bitfld.word 0x0 10. "BFRE,BRDY Interrupt Operation Specification" "0: Generate BRDY interrupt on transmitting or..,1: Generate BRDY interrupt on completion of reading.."
newline
bitfld.word 0x0 9. "DBLB,Double Buffer Mode" "0: Single buffer,1: Double buffer"
bitfld.word 0x0 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Continue pipe operation after transfer ends,1: Disable pipe after transfer ends"
newline
bitfld.word 0x0 4. "DIR,Transfer Direction" "0: Receiving direction,1: Transmitting direction"
hexmask.word.byte 0x0 0.--3. 1. "EPNUM,Endpoint Number"
group.word 0x6C++0x1
line.word 0x0 "PIPEMAXP,Pipe Maximum Packet Size Register"
hexmask.word 0x0 0.--8. 1. "MXPS,Maximum Packet Size"
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
group.word ($2+0x76)++0x1
line.word 0x0 "PIPE$1CTR,PIPE%s Control Registers"
rbitfld.word 0x0 15. "BSTS,Buffer Status" "0: Buffer access by the CPU disabled,1: Buffer access by the CPU enabled"
rbitfld.word 0x0 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer"
newline
bitfld.word 0x0 10. "ATREPM,Auto Response Mode" "0: Disable auto response mode,1: Enable auto response mode"
bitfld.word 0x0 9. "ACLRM,Auto Buffer Clear Mode" "0: Disable,1: Enable (initialize all buffers)"
newline
bitfld.word 0x0 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid (writing 0 has no effect),1: Clear the expected value for the next.."
bitfld.word 0x0 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid (writing 0 has no effect),1: Set the expected value for the next transaction.."
newline
rbitfld.word 0x0 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1"
rbitfld.word 0x0 5. "PBUSY,Pipe Busy" "0: Pipe n not in use for the transaction,1: Pipe n in use for the transaction"
newline
bitfld.word 0x0 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depends buffer state),?,?"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x2)
group.word ($2+0x7A)++0x1
line.word 0x0 "PIPE$1CTR,PIPE%s Control Registers"
rbitfld.word 0x0 15. "BSTS,Buffer Status" "0: Buffer access disabled,1: Buffer access enabled"
bitfld.word 0x0 9. "ACLRM,Auto Buffer Clear Mode" "0: Disable,1: Enable (all buffers initialized)"
newline
bitfld.word 0x0 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid (writing 0 has no effect),1: Clear the expected value for the next.."
bitfld.word 0x0 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid (writing 0 has no effect),1: Set the expected value for the next transaction.."
newline
rbitfld.word 0x0 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1"
rbitfld.word 0x0 5. "PBUSY,Pipe Busy" "0: Pipe n not in use for the transaction,1: Pipe n in use for the transaction"
newline
bitfld.word 0x0 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depends buffer state),?,?"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x9C)++0x1
line.word 0x0 "PIPE$1TRE,PIPE%s Transaction Counter Enable Register"
bitfld.word 0x0 9. "TRENB,Transaction Counter Enable" "0: Disable transaction counter,1: Enable transaction counter"
bitfld.word 0x0 8. "TRCLR,Transaction Counter Clear" "0: Invalid (writing 0 has no effect),1: Clear counter value"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.word ($2+0x9E)++0x1
line.word 0x0 "PIPE$1TRN,PIPE%s Transaction Counter Register"
hexmask.word 0x0 0.--15. 1. "TRNCNT,Transaction Counter"
repeat.end
group.long 0xF4++0x3
line.long 0x0 "PHYSECTRL,PHY Single-ended Receiver Control Register"
bitfld.long 0x0 4. "CNEN,Single-ended Receiver Enable" "0: Single-ended receiver operation is disabled,1: Single-ended receiver operation is enabled"
group.long 0x400++0x7
line.long 0x0 "DPUSR0R,Deep Software Standby USB Transceiver Control/Pin Monitor Register"
rbitfld.long 0x0 23. "DVBSTS0,USB VBUS Input" "0,1"
rbitfld.long 0x0 17. "DM0,USB D- Input" "0,1"
newline
rbitfld.long 0x0 16. "DP0,USB D+ Input" "0,1"
bitfld.long 0x0 4. "FIXPHY0,USB Transceiver Output Fix" "0: Fix outputs in Normal mode and on return from..,1: Fix outputs on transition to Deep Software.."
newline
bitfld.long 0x0 1. "RPUE0,DP Pull-Up Resistor Control" "0: Disable DP pull-up resistor,1: Enable DP pull-up resistor"
bitfld.long 0x0 0. "SRPC0,USB Single-ended Receiver Control" "0: Disable input through DP and DM inputs,1: Enable input through DP and DM inputs"
line.long 0x4 "DPUSR1R,Deep Software Standby USB Suspend/Resume Interrupt Register"
rbitfld.long 0x4 23. "DVBINT0,USB VBUS Interrupt Source Recovery" "0: System has not recovered from Deep Software..,1: System recovered from Deep Software Standby mode.."
rbitfld.long 0x4 17. "DMINT0,USB DM Interrupt Source Recovery" "0: System has not recovered from Deep Software..,1: System recovered from Deep Software Standby mode.."
newline
rbitfld.long 0x4 16. "DPINT0,USB DP Interrupt Source Recovery" "0: System has not recovered from Deep Software..,1: System recovered from Deep Software Standby mode.."
bitfld.long 0x4 7. "DVBSE0,USB VBUS Interrupt Enable/Clear" "0: Disable recovery from Deep Software Standby mode..,1: Enable recovery from Deep Software Standby mode.."
newline
bitfld.long 0x4 1. "DMINTE0,USB DM Interrupt Enable/Clear" "0: Disable recovery from Deep Software Standby mode..,1: Enable recovery from Deep Software Standby mode.."
bitfld.long 0x4 0. "DPINTE0,USB DP Interrupt Enable/Clear" "0: Disable recovery from Deep Software Standby mode..,1: Enable recovery from Deep Software Standby mode.."
tree.end
tree "WDT (Watchdog Timer)"
base ad:0x40083400
group.byte 0x0++0x0
line.byte 0x0 "WDTRR,WDT Refresh Register"
group.word 0x2++0x3
line.word 0x0 "WDTCR,WDT Control Register"
bitfld.word 0x0 12.--13. "RPSS,Window Start Position Select" "0: 25%,1: 50%,?,?"
bitfld.word 0x0 8.--9. "RPES,Window End Position Select" "0: 75%,1: 50%,?,?"
hexmask.word.byte 0x0 4.--7. 1. "CKS,Clock Division Ratio Select"
bitfld.word 0x0 0.--1. "TOPS,Timeout Period Select" "0: 1024 cycles (0x03FF),1: 4096 cycles (0x0FFF),?,?"
line.word 0x2 "WDTSR,WDT Status Register"
bitfld.word 0x2 15. "REFEF,Refresh Error Flag" "0: No refresh error occurred,1: Refresh error occurred"
bitfld.word 0x2 14. "UNDFF,Underflow Flag" "0: No underflow occurred,1: Underflow occurred"
hexmask.word 0x2 0.--13. 1. "CNTVAL,Down-Counter Value"
group.byte 0x6++0x0
line.byte 0x0 "WDTRCR,WDT Reset Control Register"
bitfld.byte 0x0 7. "RSTIRQS,WDT Behavior Selection" "0: Interrupt,1: Reset"
group.byte 0x8++0x0
line.byte 0x0 "WDTCSTPR,WDT Count Stop Control Register"
bitfld.byte 0x0 7. "SLCSTP,Sleep-Mode Count Stop Control Register" "0: Disable count stop,1: Stop count on transition to Sleep mode"
tree.end
AUTOINDENT.OFF
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