9745 lines
723 KiB
Plaintext
9745 lines
723 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: RA2A1 On-Chip Peripherals
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; @Props: Released
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; @Author: NEJ
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; @Changelog: 2022-05-19 NEJ
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; @Manufacturer: RENESAS - Renesas Technology, Corp.
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; @Doc: SVD generated (SVD2PER 1.8.0), based on: R7FA2A1AB.svd (Ver. 1.1)
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; @Core: Cortex-M23
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; @Chip: R7FA2A1AB2CBT, R7FA2A1AB3CFJ, R7FA2A1AB3CFM, R7FA2A1AB3CNE,
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; R7FA2A1AB3CNF
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perra2a1.per 14814 2022-05-20 09:18:40Z kwisniewski $
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tree.close "Core Registers (Cortex-M23)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 29. " EXTEXCLALL ,LDREX and STREX instructions use the Global Exclusive Monitor" "Only on Shared regions,Always"
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newline
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group.long 0x10++0x03
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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newline
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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group.long 0x14++0x07
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line.long 0x00 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x04 "SYST_CVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " CURRENT ,Current counter value"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPUID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,Revision 1,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/o Main extension,Reserved,Reserved,ARMv8-M w/ Main extension"
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newline
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x13
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line.long 0x00 "ICSR,Interrupt Control and State Register"
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setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET ,On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
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setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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newline
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bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
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rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
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rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
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newline
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
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rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
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rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
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bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
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newline
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bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
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newline
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bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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newline
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration and Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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newline
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bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
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bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
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bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
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newline
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bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
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group.long 0xD1C++0x0B
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x00 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x04 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
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hexmask.long.byte 0x04 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
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hexmask.long.byte 0x04 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
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bitfld.long 0x08 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
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bitfld.long 0x08 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
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newline
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bitfld.long 0x08 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
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bitfld.long 0x08 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
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bitfld.long 0x08 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
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newline
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bitfld.long 0x08 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
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bitfld.long 0x08 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
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bitfld.long 0x08 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
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newline
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bitfld.long 0x08 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
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bitfld.long 0x08 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
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bitfld.long 0x08 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
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newline
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bitfld.long 0x08 8. " MONITORACT ,Monitor exception status" "Not active,Active"
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bitfld.long 0x08 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
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bitfld.long 0x08 5. " NMIACT ,NMI exception status" "Not active,Active"
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newline
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bitfld.long 0x08 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
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bitfld.long 0x08 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
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bitfld.long 0x08 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
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newline
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bitfld.long 0x08 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
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bitfld.long 0x08 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
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tree "Memory System"
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width 10.
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rgroup.long 0xD78++0x0B
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line.long 0x00 "CLIDR,Cache Level ID Register"
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bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
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bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
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bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
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textline " "
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bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
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line.long 0x04 "CTR,Cache Type Register"
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bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,?..."
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bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,?..."
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textline " "
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bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x08 "CCSIDR,Cache Size ID Register"
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bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
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bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
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bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
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textline " "
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bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
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hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
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hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
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textline " "
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bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
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group.long 0xD84++0x03
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line.long 0x00 "CSSELR,Cache Size Selection Register"
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bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
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bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
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wgroup.long 0xF50++0x03
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line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
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wgroup.long 0xF58++0x23
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line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
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line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
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line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
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hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
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bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
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line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
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line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
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line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
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hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
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bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
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line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
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line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
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hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
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bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
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line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
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tree.end
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width 11.
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tree "CoreSight Identification Registers"
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rgroup.long 0xFE0++0x0F
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line.long 0x00 "DPIDR0,Peripheral ID0"
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hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
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line.long 0x04 "DPIDR1,Peripheral ID1"
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hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
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hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
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line.long 0x08 "DPIDR2,Peripheral ID2"
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hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
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bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
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hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
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line.long 0x0c "DPIDR3,Peripheral ID3"
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hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
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hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
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rgroup.long 0xFD0++0x03
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line.long 0x00 "PID4,Peripheral Identification Register 4"
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hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
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hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
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rgroup.long 0xFF0++0x0F
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line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
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hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
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line.long 0x04 "DCIDR1,Component ID1"
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hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
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hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
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line.long 0x08 "DCIDR2,Component ID2"
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hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
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line.long 0x0C "DCIDR3,Component ID3"
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hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
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tree.end
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width 0x0B
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Memory Protection Unit (MPU)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 15.
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rgroup.long 0xD90++0x03
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line.long 0x00 "MPU_TYPE,MPU Type Register"
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bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,,,,4,,,,8,,,,,,,,16,?..."
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bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
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group.long 0xD94++0x03
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line.long 0x00 "MPU_CTRL,MPU Control Register"
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bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
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bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
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bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
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group.long 0xD98++0x03
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line.long 0x00 "MPU_RNR,MPU Region Number Register"
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hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
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tree.close "MPU regions"
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
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group.long 0xD9C++0x03 "Region 0"
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
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bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
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bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
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newline
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bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
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hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
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bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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newline
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
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group.long 0xD9C++0x03 "Region 1"
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
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bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
|
|
endif
|
|
tree.end
|
|
newline
|
|
group.long 0xDC0++0x07
|
|
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Memory attribute encoding for MPU regions with an AttrIndex of 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Memory attribute encoding for MPU regions with an AttrIndex of 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Memory attribute encoding for MPU regions with an AttrIndex of 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Memory attribute encoding for MPU regions with an AttrIndex of 0"
|
|
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ATTR7 ,Memory attribute encoding for MPU regions with an AttrIndex of 7"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ATTR6 ,Memory attribute encoding for MPU regions with an AttrIndex of 6"
|
|
hexmask.long.byte 0x04 8.--15. 1. " ATTR5 ,Memory attribute encoding for MPU regions with an AttrIndex of 5"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ATTR4 ,Memory attribute encoding for MPU regions with an AttrIndex of 4"
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Security Attribution Unit (SAU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
group.long 0xDD0++0x03
|
|
line.long 0x00 "SAU_CTRL,SAU Control Register"
|
|
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
|
|
rgroup.long 0xDD4++0x03
|
|
line.long 0x00 "SAU_TYPE,SAU Type Register"
|
|
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,,,,4,,,,8,?..."
|
|
group.long 0xDD8++0x03
|
|
line.long 0x00 "SAU_RNR,SAU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
|
|
tree.close "SAU regions"
|
|
if ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x0
|
|
group.long 0xDDC++0x03 "Region 0"
|
|
saveout 0xDD8 %l 0x0
|
|
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x1
|
|
group.long 0xDDC++0x03 "Region 1"
|
|
saveout 0xDD8 %l 0x1
|
|
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x2
|
|
group.long 0xDDC++0x03 "Region 2"
|
|
saveout 0xDD8 %l 0x2
|
|
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x3
|
|
group.long 0xDDC++0x03 "Region 3"
|
|
saveout 0xDD8 %l 0x3
|
|
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x4
|
|
group.long 0xDDC++0x03 "Region 4"
|
|
saveout 0xDD8 %l 0x4
|
|
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x5
|
|
group.long 0xDDC++0x03 "Region 5"
|
|
saveout 0xDD8 %l 0x5
|
|
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x6
|
|
group.long 0xDDC++0x03 "Region 6"
|
|
saveout 0xDD8 %l 0x6
|
|
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x7
|
|
group.long 0xDDC++0x03 "Region 7"
|
|
saveout 0xDD8 %l 0x7
|
|
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
endif
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
hgroup.long 0xDDC++0x03 "Region 8 (not accessible)"
|
|
saveout 0xDD8 %l 0x8
|
|
hide.long 0x00 "SAU_RBAR8,SAU Region Base Address Register 8"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x8
|
|
hide.long 0x00 "SAU_RLAR8,SAU Region Limit Address Register 8"
|
|
hgroup.long 0xDDC++0x03 "Region 9 (not accessible)"
|
|
saveout 0xDD8 %l 0x9
|
|
hide.long 0x00 "SAU_RBAR9,SAU Region Base Address Register 9"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x9
|
|
hide.long 0x00 "SAU_RLAR9,SAU Region Limit Address Register 9"
|
|
hgroup.long 0xDDC++0x03 "Region 10 (not accessible)"
|
|
saveout 0xDD8 %l 0xA
|
|
hide.long 0x00 "SAU_RBAR10,SAU Region Base Address Register 10"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xA
|
|
hide.long 0x00 "SAU_RLAR10,SAU Region Limit Address Register 10"
|
|
hgroup.long 0xDDC++0x03 "Region 11 (not accessible)"
|
|
saveout 0xDD8 %l 0xB
|
|
hide.long 0x00 "SAU_RBAR11,SAU Region Base Address Register 11"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xB
|
|
hide.long 0x00 "SAU_RLAR11,SAU Region Limit Address Register 11"
|
|
hgroup.long 0xDDC++0x03 "Region 12 (not accessible)"
|
|
saveout 0xDD8 %l 0xC
|
|
hide.long 0x00 "SAU_RBAR12,SAU Region Base Address Register 12"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xC
|
|
hide.long 0x00 "SAU_RLAR12,SAU Region Limit Address Register 12"
|
|
hgroup.long 0xDDC++0x03 "Region 13 (not accessible)"
|
|
saveout 0xDD8 %l 0xD
|
|
hide.long 0x00 "SAU_RBAR13,SAU Region Base Address Register 13"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xD
|
|
hide.long 0x00 "SAU_RLAR13,SAU Region Limit Address Register 13"
|
|
hgroup.long 0xDDC++0x03 "Region 14 (not accessible)"
|
|
saveout 0xDD8 %l 0xE
|
|
hide.long 0x00 "SAU_RBAR14,SAU Region Base Address Register 14"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xE
|
|
hide.long 0x00 "SAU_RLAR14,SAU Region Limit Address Register 14"
|
|
hgroup.long 0xDDC++0x03 "Region 15 (not accessible)"
|
|
saveout 0xDD8 %l 0xF
|
|
hide.long 0x00 "SAU_RBAR15,SAU Region Base Address Register 15"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xF
|
|
hide.long 0x00 "SAU_RLAR15,SAU Region Limit Address Register 15"
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-239,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 24.
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x104++0x03
|
|
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x10C++0x03
|
|
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x110++0x03
|
|
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x114++0x03
|
|
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x118++0x03
|
|
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x11C++0x03
|
|
hide.long 0x00 "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 24.
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x204++0x03
|
|
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x208++0x03
|
|
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x20C++0x03
|
|
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x210++0x03
|
|
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x214++0x03
|
|
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x218++0x03
|
|
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x21C++0x03
|
|
hide.long 0x00 "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 11.
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE0,Active Bit Register 0"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
rgroup.long 0x304++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x304++0x03
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
rgroup.long 0x308++0x03
|
|
line.long 0x00 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x308++0x03
|
|
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
rgroup.long 0x30C++0x03
|
|
line.long 0x00 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x30C++0x03
|
|
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
rgroup.long 0x310++0x03
|
|
line.long 0x00 "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x310++0x03
|
|
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
rgroup.long 0x314++0x03
|
|
line.long 0x00 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x314++0x03
|
|
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
rgroup.long 0x318++0x03
|
|
line.long 0x00 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x318++0x03
|
|
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
rgroup.long 0x31C++0x03
|
|
line.long 0x00 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x31C++0x03
|
|
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Target Non-Secure Registers"
|
|
width 13.
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
|
|
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x384++0x03
|
|
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
|
|
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x384++0x03
|
|
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x388++0x03
|
|
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
|
|
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x388++0x03
|
|
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x38C++0x03
|
|
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
|
|
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x38C++0x03
|
|
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x390++0x03
|
|
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
|
|
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x390++0x03
|
|
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x394++0x03
|
|
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
|
|
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x394++0x03
|
|
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x398++0x03
|
|
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
|
|
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x398++0x03
|
|
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x39C++0x03
|
|
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
|
|
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
|
|
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
|
|
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
|
|
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
|
|
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
|
|
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x39C++0x03
|
|
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x420++0x1F
|
|
line.long 0x0 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x4 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x8 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0xC "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x10 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x14 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x18 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x1C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
else
|
|
hgroup.long 0x420++0x1F
|
|
hide.long 0x0 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR10,Interrupt Priority Register"
|
|
hide.long 0xC "IPR11,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR15,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x440++0x1F
|
|
line.long 0x0 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x4 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x8 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0xC "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x10 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x14 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x18 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x1C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
else
|
|
hgroup.long 0x440++0x1F
|
|
hide.long 0x0 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR18,Interrupt Priority Register"
|
|
hide.long 0xC "IPR19,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR23,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x460++0x1F
|
|
line.long 0x0 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x4 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x8 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0xC "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x10 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x14 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x18 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x1C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
else
|
|
hgroup.long 0x460++0x1F
|
|
hide.long 0x0 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR26,Interrupt Priority Register"
|
|
hide.long 0xC "IPR27,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR31,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x480++0x1F
|
|
line.long 0x0 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x4 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x8 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0xC "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x10 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x14 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x18 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x1C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
else
|
|
hgroup.long 0x480++0x1F
|
|
hide.long 0x0 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR34,Interrupt Priority Register"
|
|
hide.long 0xC "IPR35,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR39,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x4A0++0x1F
|
|
line.long 0x0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0x4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0x8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0x10 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0x14 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0x18 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0x1C "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
else
|
|
hgroup.long 0x4A0++0x1F
|
|
hide.long 0x0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xC "IPR43,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR44,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR45,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR46,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR47,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x4C0++0x1F
|
|
line.long 0x0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0x4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0x8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0x10 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0x14 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0x18 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0x1C "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
else
|
|
hgroup.long 0x4C0++0x1F
|
|
hide.long 0x0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xC "IPR51,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR52,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR53,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR54,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR55,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x4E0++0x0F
|
|
line.long 0x0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0x4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0x8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x4E0++0x0F
|
|
hide.long 0x0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
width 13.
|
|
group.long 0xE04++0x07
|
|
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
|
|
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
|
|
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
|
|
textline " "
|
|
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
|
|
bitfld.long 0x04 17. " CDSKEY ,CDS write-enable key" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
|
|
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
|
|
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
|
|
rgroup.long 0xFB8++0x03
|
|
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
|
|
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
|
|
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
|
|
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 12.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
rbitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
newline
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
newline
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
newline
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
newline
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
tree "CoreSight Identification Registers"
|
|
width 12.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "FP_PIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "FP_PIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "FP_PIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "FP_PIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "FP_CIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "FP_CIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0C "FP_CIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 16.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
bitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
bitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
textline " "
|
|
bitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,Base instruction overhead counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store overhead counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
endif
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
endif
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
endif
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
endif
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)==0x1)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0x4)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0xC)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0xF)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
endif
|
|
group.long (0x60+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION4,DWT Function Register 4"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)==0x1)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0x4)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0xC)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0xF)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
endif
|
|
group.long (0x70+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION5,DWT Function Register 5"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)==0x1)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0x4)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0xC)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0xF)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
endif
|
|
group.long (0x80+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION6,DWT Function Register 6"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)==0x1)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0x4)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0xC)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0xF)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
endif
|
|
group.long (0x90+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION7,DWT Function Register 7"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)==0x1)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0x4)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0xC)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0xF)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
endif
|
|
group.long (0xA0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION8,DWT Function Register 8"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)==0x1)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0x4)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0xC)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0xF)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
endif
|
|
group.long (0xB0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION9,DWT Function Register 9"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)==0x1)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0x4)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0xC)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0xF)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
endif
|
|
group.long (0xC0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION10,DWT Function Register 10"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)==0x1)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0x4)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0xC)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0xF)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
endif
|
|
group.long (0xD0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION11,DWT Function Register 11"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)==0x1)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0x4)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0xC)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0xF)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
endif
|
|
group.long (0xE0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION12,DWT Function Register 12"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)==0x1)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0x4)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0xC)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0xF)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
endif
|
|
group.long (0xF0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION13,DWT Function Register 13"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)==0x1)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0x4)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0xC)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0xF)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
endif
|
|
group.long (0x100+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION14,DWT Function Register 14"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)==0x1)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0x4)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0xC)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0xF)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
endif
|
|
group.long (0x110+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION15,DWT Function Register 15"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
tree "CoreSight Identification Registers"
|
|
width 13.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "DWT_CIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "DWT_CIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0c "DWT_CIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
autoindent.on center tree
|
|
tree "ACMPHS (High-Speed Analog Comparator)"
|
|
base ad:0x40085000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CMPCTL,Comparator Control Register"
|
|
bitfld.byte 0x00 7. "HCMPON,Comparator operation control" "0: Operation stopped (the comparator outputs a..,1: Operation enabled (input to the comparator.."
|
|
bitfld.byte 0x00 5.--6. "CDFS,Noise filter selection" "0: Noise filter not used,1: Noise filter sampling frequency is 2^3/PCLKB,2: Noise filter sampling frequency is 2^4/PCLKB,3: Noise filter sampling frequency is 2^5/PCLKB"
|
|
newline
|
|
bitfld.byte 0x00 3.--4. "CEG,Selection of valid edge (Edge selector)" "0: No edge selection,1: Rising edge selection,2: Falling edge selection,3: Both-edge selection"
|
|
bitfld.byte 0x00 2. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "COE,Comparator output enable" "0: Comparator output disabled (the output signal..,1: Comparator output enabled"
|
|
bitfld.byte 0x00 0. "CINV,Comparator output polarity selection" "0: Comparator output not inverted,1: Comparator output inverted"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "CMPSEL0,Comparator Input Select Register"
|
|
bitfld.byte 0x00 0.--2. "CMPSEL,Comparator input selection" "0: No input,1: IVCMP0 selected,2: IVCMP1 selected,?,4: IVCMP2 selected,?..."
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "CMPSEL1,Comparator Reference Voltage Select Register"
|
|
bitfld.byte 0x00 0.--5. "CRVS,Reference voltage selection" "0: No reference voltage,1: IVREF0 selected,2: IVREF1 selected,?,4: IVREF2 selected,?,?,?,8: IVREF3 selected,?,?,?,?,?,?,?,16: IVREF4 selected,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: IVREF5 selected,?..."
|
|
rgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "CMPMON,Comparator Output Monitor Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "CMPMON,Comparator output monitor" "0: Comparator output Low,1: Comparator output High"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "CPIOC,Comparator Output Control Register"
|
|
bitfld.byte 0x00 7. "VREFEN,Internal Vref enable" "0: Internal Vref disable,1: Internal Vref enable"
|
|
bitfld.byte 0x00 1.--6. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.byte 0x00 0. "CPOE,Comparator output selection" "0: VCOUT pin output of the comparator is..,1: VCOUT pin output of the comparator is enabled"
|
|
tree.end
|
|
tree "ACMPLP (Low-Power Analog Comparator)"
|
|
base ad:0x40085E00
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "COMPMDR,ACMPLP Mode Setting Register"
|
|
bitfld.byte 0x00 7. "C1MON,ACMPLP1 Monitor Flag" "0: IVCMP1 < Comparator1 Reference level(When the..,1: IVCMP1 > Comparator1 Reference level(When the.."
|
|
bitfld.byte 0x00 6. "C1VRF,ACMPLP1 Reference Voltage SelectionNote1: It's effective only at the time of standard mode.IVREF0 and IVREF1 are chosen at window mode condition in spite of setting of this bit" "0: CMPREF1 input,1: internal reference voltage (Vref)"
|
|
newline
|
|
bitfld.byte 0x00 5. "C1WDE,ACMPLP1 Window Function Mode Enable" "0: Disabled,1: Enabled"
|
|
bitfld.byte 0x00 4. "C1ENB,ACMPLP1 Operation Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.byte 0x00 3. "C0MON,ACMPLP0 Monitor Flag" "0: IVCMP0 < Comparator0 Reference level(When the..,1: IVCMP0 > Comparator0 Reference level(When the.."
|
|
bitfld.byte 0x00 2. "C0VRF,ACMPLP0 Reference Voltage SelectionNote1: It's effective only at the time of standard mode.IVREF0 and IVREF1 are chosen at window mode condition in spite of setting of this bit" "0: CMPREF0 input,1: internal reference voltage (Vref)"
|
|
newline
|
|
bitfld.byte 0x00 1. "C0WDE,ACMPLP0 Window Function Mode Enable" "0: Disabled,1: Enabled"
|
|
bitfld.byte 0x00 0. "C0ENB,ACMPLP0 Operation Enable" "0: Disabled,1: Enabled"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "COMPFIR,ACMPLP Filter Control Register"
|
|
bitfld.byte 0x00 7. "C1EDG,ACMPLP1 Filter Select" "0: Interrupt and ELC event request by one-edge..,1: Interrupt and ELC event request by both-edge.."
|
|
bitfld.byte 0x00 6. "C1EPO,ACMPLP1 Edge Polarity Switching" "0: Interrupt and ELC event request at rising edge,1: Interrupt and ELC event request at falling edge"
|
|
newline
|
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bitfld.byte 0x00 4.--5. "C1FCK,ACMPLP1 Edge Detection Selection" "0: No Sampling (bypass),1: Sampling at PCLK,2: Sampling at PCLK/8,3: Sampling at PCLK/32"
|
|
bitfld.byte 0x00 3. "C0EDG,ACMPLP0 Filter Select" "0: Interrupt and ELC event request by one-edge..,1: Interrupt and ELC event request by both-edge.."
|
|
newline
|
|
bitfld.byte 0x00 2. "C0EPO,ACMPLP0 Edge Polarity Switching" "0: Interrupt and ELC event request at rising edge,1: Interrupt and ELC event request at falling edge"
|
|
bitfld.byte 0x00 0.--1. "C0FCK,ACMPLP0 Edge Detection Selection" "0: No Sampling (bypass),1: Sampling at PCLK,2: Sampling at PCLK/8,3: Sampling at PCLK/32"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "COMPOCR,ACMPLP Output Control Register"
|
|
bitfld.byte 0x00 7. "SPDMD,ACMPLP0/ACMPLP1 Speed Selection" "0: Comparator low-speed mode,1: Comparator high-speed mode"
|
|
bitfld.byte 0x00 6. "C1OP,ACMPLP1 VCOUT Output Polarity Selection" "0: Non inverted,1: Inverted"
|
|
newline
|
|
bitfld.byte 0x00 5. "C1OE,ACMPLP1 VCOUT Pin Output Enable" "0: Disabled,1: Enabled"
|
|
bitfld.byte 0x00 3.--4. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 2. "C0OP,ACMPLP0 VCOUT Output Polarity Selection" "0: Non inverted,1: Inverted"
|
|
bitfld.byte 0x00 1. "C0OE,ACMPLP0 VCOUT Pin Output Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.byte 0x00 0. "Reserved,This bit is read as 0" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "COMPSEL0,Comparator Input Select Register"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 4.--5. "CMPSEL54,ACMPLP1 Input (IVCMP1) Selection" "0: No input,1: CMPIN1 input selected,2: AMP1O output selected,?..."
|
|
newline
|
|
bitfld.byte 0x00 2.--3. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--1. "CMPSEL10,ACMPLP0 Input (IVCMP0) Selection" "0: No input,1: CMPIN0 input selected,2: AMP0O output selected,?..."
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "COMPSEL1,Comparator Reference voltage Select Register"
|
|
bitfld.byte 0x00 7. "C1VRF2,ACMPLP1 Reference Voltage Selection" "0: IVREF0 selected,1: IVREF1 selected"
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4.--5. "CRVS54,ACMPLP1 Reference Voltage(IVREF1) Selection" "0: No reference voltage,1: CMPREF1 selected,2: DA8_1 output selected,?..."
|
|
bitfld.byte 0x00 2.--3. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "CRVS10,ACMPLP0 Reference Voltage (IVREF0) Selection" "0: No reference voltage,1: CMPREF0 selected,2: DA8_0 output selected,?..."
|
|
tree.end
|
|
tree "ADC16 (16-bit A/D Converter)"
|
|
base ad:0x4005C000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCSR,A/D Control Register"
|
|
bitfld.word 0x00 15. "ADST,A/D Conversion Start" "0: Stops A/D conversion process,1: Starts A/D conversion process"
|
|
bitfld.word 0x00 13.--14. "ADCS,Scan Mode Select" "0: Single scan mode,1: Group scan mode,2: Continuous scan mode,3: Setting prohibited"
|
|
newline
|
|
bitfld.word 0x00 11.--12. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 10. "ADHSC,A/D Conversion Operation Mode Select" "0: High speed A/D conversion mode,1: Low current A/D conversion mode"
|
|
newline
|
|
bitfld.word 0x00 9. "TRGE,Trigger Start Enable" "0: Disables A/D conversion to be started by the..,1: Enables A/D conversion to be started by the.."
|
|
bitfld.word 0x00 8. "EXTRG,Trigger Select" "0: A/D conversion is started by the synchronous..,1: A/D conversion is started by the asynchronous.."
|
|
newline
|
|
bitfld.word 0x00 7. "DBLE,Double Trigger Mode Select" "0: Double trigger mode non-selection,1: Double trigger mode selection"
|
|
bitfld.word 0x00 6. "GBADIE,Group B Scan End Interrupt Enable" "0: Disables ADC160_GBADI interrupt generation..,1: Enables ADC160_GBADI interrupt generation.."
|
|
newline
|
|
bitfld.word 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.word 0x00 0.--4. "DBLANS,Double Trigger Channel SelectThese bits select one analog input channel for double triggered operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "ADANSA0,A/D Channel Select Register A0"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "ANSA08,AN008 Select" "0: AN008 is not selected,1: AN008 is selected"
|
|
newline
|
|
bitfld.word 0x00 7. "ANSA07,AN007 Select" "0: AN007 is not selected,1: AN007 is selected"
|
|
bitfld.word 0x00 6. "ANSA06,AN006 Select" "0: AN006 is not selected,1: AN006 is selected"
|
|
newline
|
|
bitfld.word 0x00 5. "ANSA05,AN005 Select" "0: AN005 is not selected,1: AN005 is selected"
|
|
bitfld.word 0x00 4. "ANSA04,AN004 Select" "0: AN004 is not selected,1: AN004 is selected"
|
|
newline
|
|
bitfld.word 0x00 3. "ANSA03,AN003 Select" "0: AN003 is not selected,1: AN003 is selected"
|
|
bitfld.word 0x00 2. "ANSA02,AN002 Select" "0: AN002 is not selected,1: AN002 is selected"
|
|
newline
|
|
bitfld.word 0x00 1. "ANSA01,AN001 Select" "0: AN001 is not selected,1: AN001 is selected"
|
|
bitfld.word 0x00 0. "ANSA00,AN000 Select" "0: AN000 is not selected,1: AN000 is selected"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "ADANSA1,A/D Channel Select Register A1"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "ANSA24,AN024 Select" "0: AN024 is not selected,1: AN024 is selected"
|
|
newline
|
|
bitfld.word 0x00 7. "ANSA23,AN023 Select" "0: AN023 is not selected,1: AN023 is selected"
|
|
bitfld.word 0x00 6. "ANSA22,AN022 Select" "0: AN022 is not selected,1: AN022 is selected"
|
|
newline
|
|
bitfld.word 0x00 5. "ANSA21,AN021 Select" "0: AN021 is not selected,1: AN021 is selected"
|
|
bitfld.word 0x00 4. "ANSA20,AN020 Select" "0: AN020 is not selected,1: AN020 is selected"
|
|
newline
|
|
bitfld.word 0x00 3. "ANSA19,AN019 Select" "0: AN019 is not selected,1: AN019 is selected"
|
|
bitfld.word 0x00 2. "ANSA18,AN018 Select" "0: AN018 is not selected,1: AN018 is selected"
|
|
newline
|
|
bitfld.word 0x00 1. "ANSA17,AN017 Select" "0: AN017 is not selected,1: AN017 is selected"
|
|
bitfld.word 0x00 0. "ANSA16,AN016 Select" "0: AN016 is not selected,1: AN016 is selected"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "ADADS0,A/D-Converted Value Average Channel Select Register 0"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "ADS08,A/D-Converted Value Average Channel AN008 Select" "0: AN008 is not selected,1: AN008 is selected"
|
|
newline
|
|
bitfld.word 0x00 7. "ADS07,A/D-Converted Value Average Channel AN007 Select" "0: AN007 is not selected,1: AN007 is selected"
|
|
bitfld.word 0x00 6. "ADS06,A/D-Converted Value Average Channel AN006 Select" "0: AN006 is not selected,1: AN006 is selected"
|
|
newline
|
|
bitfld.word 0x00 5. "ADS05,A/D-Converted Value Average Channel AN005 Select" "0: AN005 is not selected,1: AN005 is selected"
|
|
bitfld.word 0x00 4. "ADS04,A/D-Converted Value Average Channel AN004 Select" "0: AN004 is not selected,1: AN004 is selected"
|
|
newline
|
|
bitfld.word 0x00 3. "ADS03,A/D-Converted Value Average Channel AN003 Select" "0: AN003 is not selected,1: AN003 is selected"
|
|
bitfld.word 0x00 2. "ADS02,A/D-Converted Value Average Channel AN002 Select" "0: AN002 is not selected,1: AN002 is selected"
|
|
newline
|
|
bitfld.word 0x00 1. "ADS01,A/D-Converted Value Average Channel AN001 Select" "0: AN001 is not selected,1: AN001 is selected"
|
|
bitfld.word 0x00 0. "ADS00,A/D-Converted Value Average Channel AN000 Select" "0: AN000 is not selected,1: AN000 is selected"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "ADADS1,A/D-Converted Value Average Channel Select Register 1"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "ADS24,A/D-Converted Value Average Channel AN024 Select" "0: AN024 is not selected,1: AN024 is selected"
|
|
newline
|
|
bitfld.word 0x00 7. "ADS23,A/D-Converted Value Average Channel AN023 Select" "0: AN023 is not selected,1: AN023 is selected"
|
|
bitfld.word 0x00 6. "ADS22,A/D-Converted Value Average Channel AN022 Select" "0: AN022 is not selected,1: AN022 is selected"
|
|
newline
|
|
bitfld.word 0x00 5. "ADS21,A/D-Converted Value Average Channel AN021 Select" "0: AN021 is not selected,1: AN021 is selected"
|
|
bitfld.word 0x00 4. "ADS20,A/D-Converted Value Average Channel AN020 Select" "0: AN020 is not selected,1: AN020 is selected"
|
|
newline
|
|
bitfld.word 0x00 3. "ADS19,A/D-Converted Value Average Channel AN019 Select" "0: AN019 is not selected,1: AN019 is selected"
|
|
bitfld.word 0x00 2. "ADS18,A/D-Converted Value Average Channel AN018 Select" "0: AN018 is not selected,1: AN018 is selected"
|
|
newline
|
|
bitfld.word 0x00 1. "ADS17,A/D-Converted Value Average Channel AN017 Select" "0: AN017 is not selected,1: AN017 is selected"
|
|
bitfld.word 0x00 0. "ADS16,A/D-Converted Value Average Channel AN016 Select" "0: AN016 is not selected,1: AN016 is selected"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "ADADC,A/D-Converted Value Average Count Select Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 0.--2. "ADC,Count Select" "0: 1-time conversion (same as normal conversion),1: 2-time conversion (acquire the average of..,?,3: 4-time conversion (acquire the average of..,4: 8-time conversion (acquire the average of..,5: 16-time conversion (acquire the average of..,?..."
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "ADCER,A/D Control Extended Register"
|
|
bitfld.word 0x00 15. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.word 0x00 14. "ADINV,Single-End Input A/D Converted Data Inversion Select" "0: Data is stored in a range of -32768 to 0,1: Data is stored in a range of 0 to 32767"
|
|
newline
|
|
bitfld.word 0x00 12.--13. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 11. "DIAGM,Self-Diagnosis Enable" "0: Self-diagnosis of ADC16 disabled,1: Self-diagnosis of ADC16 enabled"
|
|
newline
|
|
bitfld.word 0x00 10. "DIAGLD,Self-Diagnosis Mode Select" "0: Rotation mode for self-diagnosis voltage,1: Fixed mode for self-diagnosis voltage"
|
|
bitfld.word 0x00 8.--9. "DIAGVAL,Self-Diagnosis Conversion Voltage Select" "0: Setting prohibited when self-diagnosis is..,1: -VREFH0 (Ideal value of A/D conversion result..,2: VREFL0 (Ideal value of A/D conversion result..,3: VREFH0 (Ideal value of A/D conversion result.."
|
|
newline
|
|
bitfld.word 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 5. "ACE,A/D Data Register Automatic Clearing Enable" "0: Automatic clearing disabled,1: Automatic clearing enabled"
|
|
newline
|
|
bitfld.word 0x00 0.--4. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "ADSTRGR,A/D Conversion Start Trigger Select Register"
|
|
bitfld.word 0x00 14.--15. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 8.--13. "TRSA,A/D Conversion Start Trigger SelectSelect the A/D conversion start trigger in single scan mode and continuous mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 0.--5. "TRSB,A/D Conversion Start Trigger Select for Group BSelect the A/D conversion start trigger for group B in group scan mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "ADEXICR,A/D Conversion Extended Input Control Register"
|
|
bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. "OCSA,Internal Reference Voltage A/D Conversion Select" "0: A/D conversion of internal reference voltage..,1: A/D conversion of internal reference voltage.."
|
|
newline
|
|
bitfld.word 0x00 8. "TSSA,Temperature Sensor Output A/D Conversion Select" "0: A/D conversion of temperature sensor output..,1: A/D conversion of temperature sensor output.."
|
|
bitfld.word 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x00 1. "OCSAD,Internal Reference Voltage A/D converted Value Average Mode Select" "0: Internal reference voltage A/D-converted..,1: Internal reference voltage A/D-converted.."
|
|
bitfld.word 0x00 0. "TSSAD,Temperature Sensor Output A/D converted Value Average Mode Select" "0: Temperature sensor output A/D-converted value..,1: Temperature sensor output A/D-converted value.."
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "ADANSB0,A/D Channel Select Register B0"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "ANSB08,AN008 Select" "0: AN008 is not selected,1: AN008 is selected"
|
|
newline
|
|
bitfld.word 0x00 7. "ANSB07,AN007 Select" "0: AN007 is not selected,1: AN007 is selected"
|
|
bitfld.word 0x00 6. "ANSB06,AN006 Select" "0: AN006 is not selected,1: AN006 is selected"
|
|
newline
|
|
bitfld.word 0x00 5. "ANSB05,AN005 Select" "0: AN005 is not selected,1: AN005 is selected"
|
|
bitfld.word 0x00 4. "ANSB04,AN004 Select" "0: AN004 is not selected,1: AN004 is selected"
|
|
newline
|
|
bitfld.word 0x00 3. "ANSB03,AN003 Select" "0: AN003 is not selected,1: AN003 is selected"
|
|
bitfld.word 0x00 2. "ANSB02,AN002 Select" "0: AN002 is not selected,1: AN002 is selected"
|
|
newline
|
|
bitfld.word 0x00 1. "ANSB01,AN001 Select" "0: AN001 is not selected,1: AN001 is selected"
|
|
bitfld.word 0x00 0. "ANSB00,AN000 Select" "0: AN000 is not selected,1: AN000 is selected"
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "ADANSB1,A/D Channel Select Register B1"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "ANSB24,AN024 Select" "0: AN024 is not selected,1: AN024 is selected"
|
|
newline
|
|
bitfld.word 0x00 7. "ANSB23,AN023 Select" "0: AN023 is not selected,1: AN023 is selected"
|
|
bitfld.word 0x00 6. "ANSB22,AN022 Select" "0: AN022 is not selected,1: AN022 is selected"
|
|
newline
|
|
bitfld.word 0x00 5. "ANSB21,AN021 Select" "0: AN021 is not selected,1: AN021 is selected"
|
|
bitfld.word 0x00 4. "ANSB20,AN020 Select" "0: AN020 is not selected,1: AN020 is selected"
|
|
newline
|
|
bitfld.word 0x00 3. "ANSB19,AN019 Select" "0: AN019 is not selected,1: AN019 is selected"
|
|
bitfld.word 0x00 2. "ANSB18,AN018 Select" "0: AN018 is not selected,1: AN018 is selected"
|
|
newline
|
|
bitfld.word 0x00 1. "ANSB17,AN017 Select" "0: AN017 is not selected,1: AN017 is selected"
|
|
bitfld.word 0x00 0. "ANSB16,AN016 Select" "0: AN016 is not selected,1: AN016 is selected"
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "ADDBLDR,A/D Data Duplexing Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADDBLDR,This is a 16-bit read-only register for storing the result of A/D conversion in response to the second trigger in double trigger mode"
|
|
rgroup.word 0x1A++0x01
|
|
line.word 0x00 "ADTSDR,A/D Temperature Sensor Data Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADTSDR,This is a 16-bit read-only register for storing the A/D conversion result of temperature sensor output"
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "ADOCDR,A/D Internal Reference Voltage Data Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADOCDR,This is a 16-bit read-only register for storing the A/D result of internal reference voltage"
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "" "" "" "" "" "" "" )(list 0x0 0x2 0x4 0x6 0x8 0xA 0xC 0xE 0x10 0x20 0x22 0x24 0x26 0x28 0x2A 0x2C )
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|
rgroup.word ($2+0x20)++0x01
|
|
line.word 0x00 "ADDR$1,A/D Data Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADDR,The ADDR register is a 16-bit read-only registers for storing the result of A/D conversion"
|
|
repeat.end
|
|
repeat 2. (strings "" "" )(list 0x0 0x2 )
|
|
rgroup.word ($2+0x4E)++0x01
|
|
line.word 0x00 "ADDR$1,A/D Data Register $1"
|
|
hexmask.word 0x00 0.--15. 1. "ADDR,The ADDR register is a 16-bit read-only registers for storing the result of A/D conversion"
|
|
repeat.end
|
|
group.byte 0x7A++0x00
|
|
line.byte 0x00 "ADDISCR,A/D Disconnection Detection Control Register"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
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|
bitfld.byte 0x00 5. "PCHG1,Precharge/discharge select for even analog input channels from AN000 to AN008 or analog input channels from AN016 to AN023" "0: The analog input path 1 voltage is discharged,1: The analog input path 1 voltage is precharged"
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|
newline
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bitfld.byte 0x00 4. "PCHG2,Precharge/discharge select for odd analog input channels from AN000 to AN007" "0: The analog input path 2 voltage is discharged,1: The analog input path 2 voltage is precharged"
|
|
bitfld.byte 0x00 0.--3. "ADNDIS,Precharg/discharge period" "0: The disconnection detection assist function..,1: Setting prohibited,?..."
|
|
group.byte 0x7D++0x00
|
|
line.byte 0x00 "ADICR,A/D Interrupt Control Register"
|
|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.byte 0x00 0.--1. "ADIC,A/D Interrupt Control" "0: ADC160_ADI is generated at the end of A/D scan,?,?,3: ADC160_ADI is generated at the end of.."
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "ADGSPCR,A/D Group Scan Priority Control Register"
|
|
bitfld.word 0x00 15. "GBRP,Group B Single Scan Continuous Start(Enabled only when PGS = 1. Reserved when PGS = 0.)Note: When the GBRP bit has been set to 1 single scan is performed continuously for group B regardless of the setting of the GBRSCN bit" "0: Single scan for group B is not continuously..,1: Single scan for group B is continuously.."
|
|
hexmask.word 0x00 2.--14. 1. "Reserved,These bits are read as 0000000000000"
|
|
newline
|
|
bitfld.word 0x00 1. "GBRSCN,Group B Restart Setting(Enabled only when PGS = 1. Reserved when PGS = 0.)" "0: Scanning for group B is not restarted after..,1: Scanning for group B is restarted after.."
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|
bitfld.word 0x00 0. "PGS,Group A priority control setting bit.Note: When the PGS bit is to be set to 1 the ADCSR.ADCS[1:0] bits must be set to 01b (group scan mode)" "0: Operation is without group A priority control,1: Operation is with group A priority control"
|
|
rgroup.word 0x84++0x01
|
|
line.word 0x00 "ADDBLDRA,A/D Data Duplexing Register A"
|
|
hexmask.word 0x00 0.--15. 1. "ADDBLDRA,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode"
|
|
rgroup.word 0x86++0x01
|
|
line.word 0x00 "ADDBLDRB,A/D Data Duplexing Register B"
|
|
hexmask.word 0x00 0.--15. 1. "ADDBLDRB,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode"
|
|
rgroup.byte 0x8C++0x00
|
|
line.byte 0x00 "ADWINMON,A/D Compare Function Window A/B Status Monitor Register"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 5. "MONCMPB,Comparison Result Monitor B" "0: Window B comparison conditions are not met,1: Window B comparison conditions are met"
|
|
newline
|
|
bitfld.byte 0x00 4. "MONCMPA,Comparison Result Monitor A" "0: Window A comparison conditions are not met,1: Window A comparison conditions are met"
|
|
bitfld.byte 0x00 1.--3. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.byte 0x00 0. "MONCOMB,Combination result monitorThis bit indicates the combination result" "0: Window A / window B composite conditions are..,1: Window A / window B composite conditions are.."
|
|
group.word 0x90++0x01
|
|
line.word 0x00 "ADCMPCR,A/D Compare Function Control Register"
|
|
bitfld.word 0x00 15. "CMPAIE,Compare A Interrupt Enable" "0: ADC160_CMPAI interrupt is disabled when..,1: ADC160_CMPAI interrupt is enabled when.."
|
|
bitfld.word 0x00 14. "WCMPE,Window Function Setting" "0: Window function is disabled,1: Window function is enabled"
|
|
newline
|
|
bitfld.word 0x00 13. "CMPBIE,Compare B Interrupt Enable" "0: ADC160_CMPBI interrupt is disabled when..,1: ADC160_CMPBI interrupt is enabled when.."
|
|
bitfld.word 0x00 12. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 11. "CMPAE,Compare Window A Operation Enable" "0: Compare window A operation is disabled,1: Compare window A operation is enabled"
|
|
bitfld.word 0x00 10. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "CMPBE,Compare Window B Operation Enable" "0: Compare window B operation is disabled,1: Compare window B operation is enabled"
|
|
hexmask.word.byte 0x00 2.--8. 1. "Reserved,These bits are read as 0000000"
|
|
newline
|
|
bitfld.word 0x00 0.--1. "CMPAB,Window A/B Composite Conditions SettingNOTE: These bits are valid when both window A and window B are enabled (CMPAE = 1 and CMPBE = 1)" "0: ADC160_WCMPM is output when window A..,1: ADC160_WCMPM is output when window A..,2: ADC160_WCMPM is output when window A..,3: Setting prohibited"
|
|
group.byte 0x92++0x00
|
|
line.byte 0x00 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register"
|
|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 1. "CMPOCA,Internal reference voltage Compare selection bit" "0: Excludes the internal reference voltage from..,1: Includes the internal reference voltage in.."
|
|
newline
|
|
bitfld.byte 0x00 0. "CMPTSA,Temperature sensor output Compare selection bit" "0: Excludes the temperature sensor output from..,1: Includes the temperature sensor output in the.."
|
|
group.byte 0x93++0x00
|
|
line.byte 0x00 "ADCMPLER,A/D Compare Function Window A Extended Input Comparison Condition Setting Register"
|
|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 1. "CMPLOCA,Compare Window A Internal Reference Voltage ComparisonCondition Select" "0: ADCMPDR0 value > A/D converted..,1: ADCMPDR0 value < A/D converted.."
|
|
newline
|
|
bitfld.byte 0x00 0. "CMPLTSA,Compare Window A Temperature Sensor Output Comparison Condition Select" "0: ADCMPDR0 register value > A/D-converted..,1: ADCMPDR0 register value < A/D-converted.."
|
|
group.word 0x94++0x01
|
|
line.word 0x00 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "CMPCHA08,AN008 Select" "0: Compare function disabled for AN008,1: Compare function enabled for AN008"
|
|
newline
|
|
bitfld.word 0x00 7. "CMPCHA07,AN007 Select" "0: Compare function disabled for AN007,1: Compare function enabled for AN007"
|
|
bitfld.word 0x00 6. "CMPCHA06,AN006 Select" "0: Compare function disabled for AN006,1: Compare function enabled for AN006"
|
|
newline
|
|
bitfld.word 0x00 5. "CMPCHA05,AN005 Select" "0: Compare function disabled for AN005,1: Compare function enabled for AN005"
|
|
bitfld.word 0x00 4. "CMPCHA04,AN004 Select" "0: Compare function disabled for AN004,1: Compare function enabled for AN004"
|
|
newline
|
|
bitfld.word 0x00 3. "CMPCHA03,AN003 Select" "0: Compare function disabled for AN003,1: Compare function enabled for AN003"
|
|
bitfld.word 0x00 2. "CMPCHA02,AN002 Select" "0: Compare function disabled for AN002,1: Compare function enabled for AN002"
|
|
newline
|
|
bitfld.word 0x00 1. "CMPCHA01,AN001 Select" "0: Compare function disabled for AN001,1: Compare function enabled for AN001"
|
|
bitfld.word 0x00 0. "CMPCHA00,AN000 Select" "0: Compare function disabled for AN000,1: Compare function enabled for AN000"
|
|
group.word 0x96++0x01
|
|
line.word 0x00 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "CMPCHA24,AN024 Select" "0: Compare function disabled for AN024,1: Compare function enabled for AN024"
|
|
newline
|
|
bitfld.word 0x00 7. "CMPCHA23,AN023 Select" "0: Compare function disabled for AN023,1: Compare function enabled for AN023"
|
|
bitfld.word 0x00 6. "CMPCHA22,AN022 Select" "0: Compare function disabled for AN022,1: Compare function enabled for AN022"
|
|
newline
|
|
bitfld.word 0x00 5. "CMPCHA21,AN021 Select" "0: Compare function disabled for AN021,1: Compare function enabled for AN021"
|
|
bitfld.word 0x00 4. "CMPCHA20,AN020 Select" "0: Compare function disabled for AN020,1: Compare function enabled for AN020"
|
|
newline
|
|
bitfld.word 0x00 3. "CMPCHA19,AN019 Select" "0: Compare function disabled for AN019,1: Compare function enabled for AN019"
|
|
bitfld.word 0x00 2. "CMPCHA18,AN018 Select" "0: Compare function disabled for AN018,1: Compare function enabled for AN018"
|
|
newline
|
|
bitfld.word 0x00 1. "CMPCHA17,AN017 Select" "0: Compare function disabled for AN017,1: Compare function enabled for AN017"
|
|
bitfld.word 0x00 0. "CMPCHA16,AN016 Select" "0: Compare function disabled for AN016,1: Compare function enabled for AN016"
|
|
group.word 0x98++0x01
|
|
line.word 0x00 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "CMPLCHA08,Comparison condition of AN008" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
newline
|
|
bitfld.word 0x00 7. "CMPLCHA07,Comparison condition of AN007" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
bitfld.word 0x00 6. "CMPLCHA06,Comparison condition of AN006" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
newline
|
|
bitfld.word 0x00 5. "CMPLCHA05,Comparison condition of AN005" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
bitfld.word 0x00 4. "CMPLCHA04,Comparison condition of AN004" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
newline
|
|
bitfld.word 0x00 3. "CMPLCHA03,Comparison condition of AN003" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
bitfld.word 0x00 2. "CMPLCHA02,Comparison condition of AN002" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
newline
|
|
bitfld.word 0x00 1. "CMPLCHA01,Comparison condition of AN001" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
bitfld.word 0x00 0. "CMPLCHA00,Comparison condition of AN000" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
group.word 0x9A++0x01
|
|
line.word 0x00 "ADCMPLR1,A/D Compare Function Window A Comparison Condition Setting Register 1"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "CMPLCHA24,Comparison condition for AN024" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
newline
|
|
bitfld.word 0x00 7. "CMPLCHA23,Comparison condition for AN023" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
bitfld.word 0x00 6. "CMPLCHA22,Comparison condition for AN022" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
newline
|
|
bitfld.word 0x00 5. "CMPLCHA21,Comparison condition for AN021" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
bitfld.word 0x00 4. "CMPLCHA20,Comparison condition for AN020" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
newline
|
|
bitfld.word 0x00 3. "CMPLCHA19,Comparison condition for AN019" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
bitfld.word 0x00 2. "CMPLCHA18,Comparison condition for AN018" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
newline
|
|
bitfld.word 0x00 1. "CMPLCHA17,Comparison condition for AN017" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
bitfld.word 0x00 0. "CMPLCHA16,Comparison condition for AN016" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.."
|
|
group.word 0x9C++0x01
|
|
line.word 0x00 "ADCMPDR0,A/D Compare Function Window A Lower-Side Level Setting Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADCMPDR0,The ADCMPDR0 register sets the reference data when the compare window A function is used"
|
|
group.word 0x9E++0x01
|
|
line.word 0x00 "ADCMPDR1,A/D Compare Function Window A Upper-Side Level Setting Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADCMPDR1,The ADCMPDR1 register sets the reference data when the compare window A function is used"
|
|
group.word 0xA0++0x01
|
|
line.word 0x00 "ADCMPSR0,A/D Compare Function Window A Channel Status Register 0"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "CMPSTCHA08,Compare window A flag for AN008" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.word 0x00 7. "CMPSTCHA07,Compare window A flag for AN007" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
bitfld.word 0x00 6. "CMPSTCHA06,Compare window A flag for AN006" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.word 0x00 5. "CMPSTCHA05,Compare window A flag for AN005" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
bitfld.word 0x00 4. "CMPSTCHA04,Compare window A flag for AN004" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.word 0x00 3. "CMPSTCHA03,Compare window A flag for AN003" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
bitfld.word 0x00 2. "CMPSTCHA02,Compare window A flag for AN002" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.word 0x00 1. "CMPSTCHA01,Compare window A flag for AN001" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
bitfld.word 0x00 0. "CMPSTCHA00,Compare window A flag for AN000" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
group.word 0xA2++0x01
|
|
line.word 0x00 "ADCMPSR1,A/D Compare Function Window A Channel Status Register 1"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 8. "CMPSTCHA24,Compare window A flag for AN024" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.word 0x00 7. "CMPSTCHA23,Compare window A flag for AN023" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
bitfld.word 0x00 6. "CMPSTCHA22,Compare window A flag for AN022" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.word 0x00 5. "CMPSTCHA21,Compare window A flag for AN021" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
bitfld.word 0x00 4. "CMPSTCHA20,Compare window A flag for AN020" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.word 0x00 3. "CMPSTCHA19,Compare window A flag for AN019" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
bitfld.word 0x00 2. "CMPSTCHA18,Compare window A flag for AN018" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.word 0x00 1. "CMPSTCHA17,Compare window A flag for AN017" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
bitfld.word 0x00 0. "CMPSTCHA16,Compare window A flag for AN016" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
group.byte 0xA4++0x00
|
|
line.byte 0x00 "ADCMPSER,A/D Compare Function Window A Extended Input Channel Status Register"
|
|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 1. "CMPSTOCA,Compare Window A Internal Reference Voltage Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
newline
|
|
bitfld.byte 0x00 0. "CMPSTTSA,Compare Window A Temperature Sensor Output Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result" "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
group.byte 0xA6++0x00
|
|
line.byte 0x00 "ADCMPBNSR,A/D Compare Function Window B Channel Selection Register"
|
|
bitfld.byte 0x00 7. "CMPLB,Compare window B Compare condition setting bit" "0: CMPLLB value > A/D converted value..,1: CMPLLB value < A/D converted.."
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0.--5. "CMPCHB,Compare window B channel selection bit.The channel that compares it on the condition of compare window B is selected" "0: AN000,1: AN001,2: AN002,3: AN003,4: AN004,5: AN005,6: AN006,7: AN007,8: AN008,?,?,?,?,?,?,?,16: AN016,17: AN017,18: AN018,19: AN019,20: AN020,21: AN021,22: AN022,23: AN023,?,?,?,?,?,?,?,?,32: Temperature sensor,33: Internal reference voltage,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: No channel is selected"
|
|
group.word 0xA8++0x01
|
|
line.word 0x00 "ADWINLLB,A/D Compare Function Window B Lower-Side Level Setting Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADWINLLB,This register is used to compare A window function is used to set the lower level of the window B"
|
|
group.word 0xAA++0x01
|
|
line.word 0x00 "ADWINULB,A/D Compare Function Window B Upper-Side Level Setting Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADWINULB,This register is used to compare A window function is used to set the higher level of the window B"
|
|
group.byte 0xAC++0x00
|
|
line.byte 0x00 "ADCMPBSR,A/D Compare Function Window B Status Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "CMPSTB,Compare window B flagWhen window B operation is enabled (ADCMPCR.CMPBE = 1) this bit indicates the comparison result of channels AN000 to AN008 AN016 to AN023 reference voltage of SDADC24 (SBIAS/VREFI) temperature sensor output and internal.." "0: Comparison conditions are not met,1: Comparison conditions are met"
|
|
group.byte 0xDD++0x00
|
|
line.byte 0x00 "ADSSTRL,A/D Sampling State Register L"
|
|
hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (AN016-AN023 SBIAS/VREFI)"
|
|
group.byte 0xDE++0x00
|
|
line.byte 0x00 "ADSSTRT,A/D Sampling State Register T"
|
|
hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (Temperature sensor output)"
|
|
group.byte 0xDF++0x00
|
|
line.byte 0x00 "ADSSTRO,A/D Sampling State Register O"
|
|
hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (Internal reference voltage)"
|
|
repeat 9. (strings "00" "01" "02" "03" "04" "05" "06" "07" "08" )(list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 )
|
|
group.byte ($2+0xE0)++0x00
|
|
line.byte 0x00 "ADSSTR$1,A/D Sampling State Register"
|
|
hexmask.byte 0x00 0.--7. 1. "SST,Sampling time setting"
|
|
repeat.end
|
|
group.word 0xF0++0x01
|
|
line.word 0x00 "ADANIM,A/D Channel Input Mode Select Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "ANIM,Analog Channel Input Mode Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0xF2++0x00
|
|
line.byte 0x00 "ADCALEXE,A/D Calibration Execution Register"
|
|
bitfld.byte 0x00 7. "CALEXE,Calibration Start" "0: Calibration does not start,1: Calibration starts"
|
|
rbitfld.byte 0x00 6. "CALMON,Calibration Status Flag" "0: Calibration is not in progress,1: Calibration is in progress"
|
|
newline
|
|
bitfld.byte 0x00 0.--5. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.byte 0xF4++0x00
|
|
line.byte 0x00 "VREFAMPCNT,A/D Dedicated Reference Voltage Circuit Control Register"
|
|
bitfld.byte 0x00 7. "ADSLP,Sleep" "0: Normal operation,1: Standby state"
|
|
bitfld.byte 0x00 5.--6. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 4. "BGREN,Low-Potential Reference Voltage Select" "0: Select AVSS0 as the low-potential reference..,1: Select VREFL0 as the low-potential reference.."
|
|
bitfld.byte 0x00 3. "VREFADCEN,VREFADCG Enable" "0: Disable the VREFADC output,1: Enable the VREFADC output"
|
|
newline
|
|
bitfld.byte 0x00 1.--2. "VREFADCG,VREFADC Output Voltage Control" "0: 1.5 V,1: 1.5 V,2: 2.0 V,3: 2.5 V"
|
|
bitfld.byte 0x00 0. "OLDETEN,OLDET Enable" "0: Disable the over current detection,1: Enable the over current detection"
|
|
rgroup.word 0xF8++0x01
|
|
line.word 0x00 "ADRD,A/D Self-Diagnosis Data Register"
|
|
hexmask.word 0x00 0.--15. 1. "ADRD,The ADRD register is a 16-bit read-only register that holds the A/D conversion results based on the self-diagnosis of the ADC16"
|
|
group.byte 0xFA++0x00
|
|
line.byte 0x00 "ADRST,A/D Self-Diagnostic Status Register"
|
|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0.--1. "DIAGST,Self-Diagnosis Status" "0: Self-diagnosis has not been executed since..,1: Self-diagnosis was executed under a condition..,2: Self-diagnosis was executed under a condition..,3: Self-diagnosis was executed under a condition.."
|
|
tree.end
|
|
tree "AGT (Asynchronous General Purpose Timer)"
|
|
tree "AGT0"
|
|
base ad:0x40084000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "AGT,AGT Counter Register"
|
|
hexmask.word 0x00 0.--15. 1. "AGT,16bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the AGTCRn register the 16-bit counter is forcibly stopped and set to FFFFH"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "AGTCMA,AGT Compare Match A Register"
|
|
hexmask.word 0x00 0.--15. 1. "AGTCMA,AGT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCRn register set to FFFFH"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "AGTCMB,AGT Compare Match B Register"
|
|
hexmask.word 0x00 0.--15. 1. "AGTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCR register set to FFFFH"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "AGTCR,AGT Control Register"
|
|
bitfld.byte 0x00 7. "TCMBF,AGT compare match B flag" "0: No Match,1: Match"
|
|
bitfld.byte 0x00 6. "TCMAF,AGT compare match A flag" "0: No Match,1: Match"
|
|
newline
|
|
bitfld.byte 0x00 5. "TUNDF,AGT underflow flag" "0: No underflow,1: Underflow"
|
|
bitfld.byte 0x00 4. "TEDGF,Active edge judgement flag" "0: No active edge received,1: Active edge received"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "TSTOP,AGT count forced stop" "0: no effect,1: The count is forcibly stopped"
|
|
newline
|
|
rbitfld.byte 0x00 1. "TCSTF,AGT count status flag" "0: Count stops,1: Count starts"
|
|
bitfld.byte 0x00 0. "TSTART,AGT count start" "0: Count stops,1: Count starts"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "AGTMR1,AGT Mode Register 1"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 4.--6. "TCK,AGT count source select" "0: PCLKB,1: PCLKB/8,?,3: PCLKB/2,4: Divided clock LOCO specified by bits CKS[2:0]..,5: Underflow event signal from AGT0,6: Divided clock fSUB specified by bits CKS[2:0]..,?..."
|
|
newline
|
|
bitfld.byte 0x00 3. "TEDGPL,AGTIO edge polarity select" "0: Single-edge,1: Both-edge"
|
|
bitfld.byte 0x00 0.--2. "TMOD,AGT operating mode select" "0: Timer mode,1: Pulse output mode,2: Event counter mode,3: Pulse width measurement mode,4: Pulse period measurement mode,?..."
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "AGTMR2,AGT Mode Register 2"
|
|
bitfld.byte 0x00 7. "LPM,Low Power Mode" "0: Normal mode,1: Low Power mode"
|
|
bitfld.byte 0x00 3.--6. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 000,1: 001,2: 010,3: 011,4: 1/16,5: 1/32,6: 1/64,7: 1/128"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "AGTIOC,AGT I/O Control Register"
|
|
bitfld.byte 0x00 6.--7. "TIOGT,AGTIO count control" "0: Event is always counted,1: Event is counted during polarity period..,?..."
|
|
bitfld.byte 0x00 4.--5. "TIPF,AGTIO input filter select" "0: No filter,1: Filter sampled at PCLKB,2: Filter sampled at PCLKB/8,3: Filter sampled at PCLKB/32"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "TOE,AGTO output enable" "0: AGTO output disabled (port),1: AGTO output enabled"
|
|
newline
|
|
bitfld.byte 0x00 1. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 0. "TEDGSEL,I/O polarity switchFunction varies depending on the operating mode" "0,1"
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "AGTISR,AGT Event Pin Select Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 2. "EEPS,AGTEE polarty selection" "0: An event is counted during the low-level period,1: An event is counted during the high-level.."
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "AGTCMSR,AGT Compare Match Function Select Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "TOPOLB,AGTOB polarity select" "0: AGTOB Output is started at low,1: AGTOB Output is started at high"
|
|
newline
|
|
bitfld.byte 0x00 5. "TOEB,AGTOB output enable" "0: AGTOB output disabled (port),1: AGTOB output enabled"
|
|
bitfld.byte 0x00 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "TOPOLA,AGTOA polarity select" "0: AGTOA Output is started at low,1: AGTOA Output is started at high"
|
|
newline
|
|
bitfld.byte 0x00 1. "TOEA,AGTOA output enable" "0: AGTOA output disabled (port),1: AGTOA output enabled"
|
|
bitfld.byte 0x00 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register"
|
|
group.byte 0x0F++0x00
|
|
line.byte 0x00 "AGTIOSEL,AGT Pin Select Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 4. "TIES,AGTIO input enable" "0: external event input disable during software..,1: external event input enable during software.."
|
|
newline
|
|
bitfld.byte 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree.end
|
|
tree "BUS (BUS Control)"
|
|
base ad:0x40003000
|
|
group.word 0x1008++0x01
|
|
line.word 0x00 "BUSMCNTSYS,Master Bus Control Register SYS"
|
|
bitfld.word 0x00 15. "IERES,Ignore Error Responses" "0: Bus error will be reported,1: Bus error will not be reported"
|
|
hexmask.word 0x00 0.--14. 1. "Reserved,These bits are read as 000000000000000"
|
|
group.word 0x100C++0x01
|
|
line.word 0x00 "BUSMCNTDMA,Master Bus Control Register DMA"
|
|
bitfld.word 0x00 15. "IERES,Ignore Error Responses" "0: Bus error will be reported,1: Bus error will not be reported"
|
|
hexmask.word 0x00 0.--14. 1. "Reserved,These bits are read as 000000000000000"
|
|
group.word 0x1100++0x01
|
|
line.word 0x00 "BUSSCNTFLI,Slave Bus Control Register FLI"
|
|
hexmask.word 0x00 6.--15. 1. "Reserved,These bits are read as 0000000000"
|
|
bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..."
|
|
bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x110C++0x01
|
|
line.word 0x00 "BUSSCNTRAM0,Slave Bus Control Register RAM0"
|
|
hexmask.word 0x00 6.--15. 1. "Reserved,These bits are read as 0000000000"
|
|
bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..."
|
|
bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x1114++0x01
|
|
line.word 0x00 "BUSSCNTP0B,Slave Bus Control Register"
|
|
hexmask.word 0x00 6.--15. 1. "Reserved,These bits are read as 0000000000"
|
|
bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..."
|
|
bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x1118++0x01
|
|
line.word 0x00 "BUSSCNTP2B,Slave Bus Control Register"
|
|
hexmask.word 0x00 6.--15. 1. "Reserved,These bits are read as 0000000000"
|
|
bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..."
|
|
bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x1120++0x01
|
|
line.word 0x00 "BUSSCNTP4B,Slave Bus Control Register P4B"
|
|
hexmask.word 0x00 6.--15. 1. "Reserved,These bits are read as 0000000000"
|
|
bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..."
|
|
bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x1128++0x01
|
|
line.word 0x00 "BUSSCNTP6B,Slave Bus Control Register P6B"
|
|
hexmask.word 0x00 6.--15. 1. "Reserved,These bits are read as 0000000000"
|
|
bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..."
|
|
bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x1130++0x01
|
|
line.word 0x00 "BUSSCNTFBU,Slave Bus Control Register FBU"
|
|
hexmask.word 0x00 6.--15. 1. "Reserved,These bits are read as 0000000000"
|
|
bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..."
|
|
bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1820++0x03
|
|
line.long 0x00 "BUS3ERRADD,Bus Error Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address"
|
|
rgroup.long 0x1830++0x03
|
|
line.long 0x00 "BUS4ERRADD,Bus Error Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address"
|
|
rgroup.byte 0x1824++0x00
|
|
line.byte 0x00 "BUS3ERRSTAT,Bus Error Status Register"
|
|
bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred"
|
|
bitfld.byte 0x00 1.--6. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access"
|
|
rgroup.byte 0x1834++0x00
|
|
line.byte 0x00 "BUS4ERRSTAT,Bus Error Status Register"
|
|
bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred"
|
|
bitfld.byte 0x00 1.--6. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access"
|
|
tree.end
|
|
tree "CAC (Clock Frequency Accuracy Measurement Circuit)"
|
|
base ad:0x40044600
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CACR0,CAC Control Register 0"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "CFME,Clock Frequency Measurement Enable" "0: Disable,1: Enable"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "CACR1,CAC Control Register 1"
|
|
bitfld.byte 0x00 6.--7. "EDGES,Valid Edge Select" "0: Rising edge,1: Falling edge,2: Both rising and falling edges,3: Setting prohibited"
|
|
bitfld.byte 0x00 4.--5. "TCSS,Measurement Target Clock Frequency Division Ratio Select" "0: No division,1: x 1/4 clock,2: x 1/8 clock,3: x 1/32 clock"
|
|
newline
|
|
bitfld.byte 0x00 1.--3. "FMCS,Measurement Target Clock Select" "0: Main clock,1: Sub-clock,2: HOCO clock,3: MOCO clock,4: LOCO clock,5: Peripheral module clock(PCLKB),6: IWDTCLK clock,7: Setting prohibited"
|
|
bitfld.byte 0x00 0. "CACREFE,CACREF Pin Input Enable" "0: Disable,1: Enable"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "CACR2,CAC Control Register 2"
|
|
bitfld.byte 0x00 6.--7. "DFS,Digital Filter Selection" "0: Digital filtering is disabled,1: The sampling clock for the digital filter is..,2: The sampling clock for the digital filter is..,3: The sampling clock for the digital filter is.."
|
|
bitfld.byte 0x00 4.--5. "RCDS,Measurement Reference Clock Frequency Division Ratio Select" "0: 1/32 clock,1: 1/128 clock,2: 1/1024 clock,3: 1/8192 clock"
|
|
newline
|
|
bitfld.byte 0x00 1.--3. "RSCS,Measurement Reference Clock Select" "0: Main clock,1: Sub-clock,2: HOCO clock,3: MOCO clock,4: LOCO clock,5: Peripheral module clock(PCLKB),6: IWDTCLK clock,7: Setting prohibited"
|
|
bitfld.byte 0x00 0. "RPS,Reference Signal Select" "0: CACREF pin input,1: Internal clock (internally generated signal)"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "CAICR,CAC Interrupt Control Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "OVFFCL,OVFF Clear" "0: No effect on operations,1: Clears the OVFF flag"
|
|
newline
|
|
bitfld.byte 0x00 5. "MENDFCL,MENDF Clear" "0: No effect on operations,1: Clears the MENDF flag"
|
|
bitfld.byte 0x00 4. "FERRFCL,FERRF Clear" "0: No effect on operations,1: Clears the FERRF flag"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "OVFIE,Overflow Interrupt Request Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.byte 0x00 1. "MENDIE,Measurement End Interrupt Request Enable" "0: Disable,1: Enable"
|
|
bitfld.byte 0x00 0. "FERRIE,Frequency Error Interrupt Request Enable" "0: Disable,1: Enable"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "CASTR,CAC Status Register"
|
|
bitfld.byte 0x00 2. "OVFF,Counter Overflow Flag" "0: The counter has not overflowed,1: The counter has overflowed"
|
|
bitfld.byte 0x00 1. "MENDF,Measurement End Flag" "0: Measurement is in progress,1: Measurement has ended"
|
|
newline
|
|
bitfld.byte 0x00 0. "FERRF,Frequency Error Flag" "0: The clock frequency is within the range..,1: The clock frequency has deviated beyond the.."
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "CAULVR,CAC Upper-Limit Value Setting Register"
|
|
hexmask.word 0x00 0.--15. 1. "CAULVR,CAULVR is a 16-bit readable/writable register that stores the upper-limit value of the frequency"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "CALLVR,CAC Lower-Limit Value Setting Register"
|
|
hexmask.word 0x00 0.--15. 1. "CALLVR,CALLVR is a 16-bit readable/writable register that stores the lower-limit value of the frequency"
|
|
rgroup.word 0x0A++0x01
|
|
line.word 0x00 "CACNTBR,CAC Counter Buffer Register"
|
|
hexmask.word 0x00 0.--15. 1. "CACNTBR,CACNTBR is a 16-bit read-only register that retains the counter value at the time a valid reference signal edge is input"
|
|
tree.end
|
|
tree "CAN (CAN Module)"
|
|
base ad:0x40050000
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "MB0_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "MB1_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "MB2_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "MB3_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "MB4_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "MB5_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "MB6_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x270++0x03
|
|
line.long 0x00 "MB7_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "MB8_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x290++0x03
|
|
line.long 0x00 "MB9_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x2A0++0x03
|
|
line.long 0x00 "MB10_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x2B0++0x03
|
|
line.long 0x00 "MB11_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "MB12_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x2D0++0x03
|
|
line.long 0x00 "MB13_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x2E0++0x03
|
|
line.long 0x00 "MB14_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x2F0++0x03
|
|
line.long 0x00 "MB15_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "MB16_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x310++0x03
|
|
line.long 0x00 "MB17_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x320++0x03
|
|
line.long 0x00 "MB18_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x330++0x03
|
|
line.long 0x00 "MB19_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "MB20_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x350++0x03
|
|
line.long 0x00 "MB21_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x360++0x03
|
|
line.long 0x00 "MB22_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x370++0x03
|
|
line.long 0x00 "MB23_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "MB24_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x390++0x03
|
|
line.long 0x00 "MB25_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x3A0++0x03
|
|
line.long 0x00 "MB26_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x3B0++0x03
|
|
line.long 0x00 "MB27_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x3C0++0x03
|
|
line.long 0x00 "MB28_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x3D0++0x03
|
|
line.long 0x00 "MB29_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x3E0++0x03
|
|
line.long 0x00 "MB30_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.long 0x3F0++0x03
|
|
line.long 0x00 "MB31_ID,Mailbox Register"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
group.word 0x204++0x01
|
|
line.word 0x00 "MB0_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x214++0x01
|
|
line.word 0x00 "MB1_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x224++0x01
|
|
line.word 0x00 "MB2_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x234++0x01
|
|
line.word 0x00 "MB3_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x244++0x01
|
|
line.word 0x00 "MB4_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x254++0x01
|
|
line.word 0x00 "MB5_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x264++0x01
|
|
line.word 0x00 "MB6_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x274++0x01
|
|
line.word 0x00 "MB7_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x284++0x01
|
|
line.word 0x00 "MB8_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x294++0x01
|
|
line.word 0x00 "MB9_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x2A4++0x01
|
|
line.word 0x00 "MB10_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x2B4++0x01
|
|
line.word 0x00 "MB11_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x2C4++0x01
|
|
line.word 0x00 "MB12_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x2D4++0x01
|
|
line.word 0x00 "MB13_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x2E4++0x01
|
|
line.word 0x00 "MB14_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x2F4++0x01
|
|
line.word 0x00 "MB15_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x304++0x01
|
|
line.word 0x00 "MB16_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x314++0x01
|
|
line.word 0x00 "MB17_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x324++0x01
|
|
line.word 0x00 "MB18_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x334++0x01
|
|
line.word 0x00 "MB19_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x344++0x01
|
|
line.word 0x00 "MB20_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x354++0x01
|
|
line.word 0x00 "MB21_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x364++0x01
|
|
line.word 0x00 "MB22_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x374++0x01
|
|
line.word 0x00 "MB23_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x384++0x01
|
|
line.word 0x00 "MB24_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x394++0x01
|
|
line.word 0x00 "MB25_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x3A4++0x01
|
|
line.word 0x00 "MB26_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x3B4++0x01
|
|
line.word 0x00 "MB27_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x3C4++0x01
|
|
line.word 0x00 "MB28_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x3D4++0x01
|
|
line.word 0x00 "MB29_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x3E4++0x01
|
|
line.word 0x00 "MB30_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.word 0x3F4++0x01
|
|
line.word 0x00 "MB31_DL,Mailbox Register"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..."
|
|
group.byte 0x206++0x00
|
|
line.byte 0x00 "MB0_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x216++0x00
|
|
line.byte 0x00 "MB1_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x226++0x00
|
|
line.byte 0x00 "MB2_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x236++0x00
|
|
line.byte 0x00 "MB3_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x246++0x00
|
|
line.byte 0x00 "MB4_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x256++0x00
|
|
line.byte 0x00 "MB5_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x266++0x00
|
|
line.byte 0x00 "MB6_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x276++0x00
|
|
line.byte 0x00 "MB7_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x286++0x00
|
|
line.byte 0x00 "MB8_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x296++0x00
|
|
line.byte 0x00 "MB9_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x2A6++0x00
|
|
line.byte 0x00 "MB10_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x2B6++0x00
|
|
line.byte 0x00 "MB11_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x2C6++0x00
|
|
line.byte 0x00 "MB12_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x2D6++0x00
|
|
line.byte 0x00 "MB13_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x2E6++0x00
|
|
line.byte 0x00 "MB14_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x2F6++0x00
|
|
line.byte 0x00 "MB15_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x306++0x00
|
|
line.byte 0x00 "MB16_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x316++0x00
|
|
line.byte 0x00 "MB17_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x326++0x00
|
|
line.byte 0x00 "MB18_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x336++0x00
|
|
line.byte 0x00 "MB19_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x346++0x00
|
|
line.byte 0x00 "MB20_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x356++0x00
|
|
line.byte 0x00 "MB21_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x366++0x00
|
|
line.byte 0x00 "MB22_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x376++0x00
|
|
line.byte 0x00 "MB23_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x386++0x00
|
|
line.byte 0x00 "MB24_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x396++0x00
|
|
line.byte 0x00 "MB25_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x3A6++0x00
|
|
line.byte 0x00 "MB26_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x3B6++0x00
|
|
line.byte 0x00 "MB27_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x3C6++0x00
|
|
line.byte 0x00 "MB28_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x3D6++0x00
|
|
line.byte 0x00 "MB29_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x3E6++0x00
|
|
line.byte 0x00 "MB30_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x3F6++0x00
|
|
line.byte 0x00 "MB31_D0,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data"
|
|
group.byte 0x207++0x00
|
|
line.byte 0x00 "MB0_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x217++0x00
|
|
line.byte 0x00 "MB1_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x227++0x00
|
|
line.byte 0x00 "MB2_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x237++0x00
|
|
line.byte 0x00 "MB3_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x247++0x00
|
|
line.byte 0x00 "MB4_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x257++0x00
|
|
line.byte 0x00 "MB5_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x267++0x00
|
|
line.byte 0x00 "MB6_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x277++0x00
|
|
line.byte 0x00 "MB7_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x287++0x00
|
|
line.byte 0x00 "MB8_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x297++0x00
|
|
line.byte 0x00 "MB9_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x2A7++0x00
|
|
line.byte 0x00 "MB10_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x2B7++0x00
|
|
line.byte 0x00 "MB11_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x2C7++0x00
|
|
line.byte 0x00 "MB12_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x2D7++0x00
|
|
line.byte 0x00 "MB13_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x2E7++0x00
|
|
line.byte 0x00 "MB14_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x2F7++0x00
|
|
line.byte 0x00 "MB15_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x307++0x00
|
|
line.byte 0x00 "MB16_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x317++0x00
|
|
line.byte 0x00 "MB17_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x327++0x00
|
|
line.byte 0x00 "MB18_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x337++0x00
|
|
line.byte 0x00 "MB19_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x347++0x00
|
|
line.byte 0x00 "MB20_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x357++0x00
|
|
line.byte 0x00 "MB21_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x367++0x00
|
|
line.byte 0x00 "MB22_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x377++0x00
|
|
line.byte 0x00 "MB23_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x387++0x00
|
|
line.byte 0x00 "MB24_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x397++0x00
|
|
line.byte 0x00 "MB25_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x3A7++0x00
|
|
line.byte 0x00 "MB26_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x3B7++0x00
|
|
line.byte 0x00 "MB27_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x3C7++0x00
|
|
line.byte 0x00 "MB28_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x3D7++0x00
|
|
line.byte 0x00 "MB29_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x3E7++0x00
|
|
line.byte 0x00 "MB30_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x3F7++0x00
|
|
line.byte 0x00 "MB31_D1,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data"
|
|
group.byte 0x208++0x00
|
|
line.byte 0x00 "MB0_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x218++0x00
|
|
line.byte 0x00 "MB1_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x228++0x00
|
|
line.byte 0x00 "MB2_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x238++0x00
|
|
line.byte 0x00 "MB3_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x248++0x00
|
|
line.byte 0x00 "MB4_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x258++0x00
|
|
line.byte 0x00 "MB5_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x268++0x00
|
|
line.byte 0x00 "MB6_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x278++0x00
|
|
line.byte 0x00 "MB7_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x288++0x00
|
|
line.byte 0x00 "MB8_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x298++0x00
|
|
line.byte 0x00 "MB9_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x2A8++0x00
|
|
line.byte 0x00 "MB10_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x2B8++0x00
|
|
line.byte 0x00 "MB11_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x2C8++0x00
|
|
line.byte 0x00 "MB12_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x2D8++0x00
|
|
line.byte 0x00 "MB13_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x2E8++0x00
|
|
line.byte 0x00 "MB14_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x2F8++0x00
|
|
line.byte 0x00 "MB15_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x308++0x00
|
|
line.byte 0x00 "MB16_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x318++0x00
|
|
line.byte 0x00 "MB17_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x328++0x00
|
|
line.byte 0x00 "MB18_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x338++0x00
|
|
line.byte 0x00 "MB19_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x348++0x00
|
|
line.byte 0x00 "MB20_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x358++0x00
|
|
line.byte 0x00 "MB21_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x368++0x00
|
|
line.byte 0x00 "MB22_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x378++0x00
|
|
line.byte 0x00 "MB23_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x388++0x00
|
|
line.byte 0x00 "MB24_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x398++0x00
|
|
line.byte 0x00 "MB25_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x3A8++0x00
|
|
line.byte 0x00 "MB26_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x3B8++0x00
|
|
line.byte 0x00 "MB27_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x3C8++0x00
|
|
line.byte 0x00 "MB28_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x3D8++0x00
|
|
line.byte 0x00 "MB29_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x3E8++0x00
|
|
line.byte 0x00 "MB30_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x3F8++0x00
|
|
line.byte 0x00 "MB31_D2,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data"
|
|
group.byte 0x209++0x00
|
|
line.byte 0x00 "MB0_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x219++0x00
|
|
line.byte 0x00 "MB1_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x229++0x00
|
|
line.byte 0x00 "MB2_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x239++0x00
|
|
line.byte 0x00 "MB3_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x249++0x00
|
|
line.byte 0x00 "MB4_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x259++0x00
|
|
line.byte 0x00 "MB5_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x269++0x00
|
|
line.byte 0x00 "MB6_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x279++0x00
|
|
line.byte 0x00 "MB7_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x289++0x00
|
|
line.byte 0x00 "MB8_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x299++0x00
|
|
line.byte 0x00 "MB9_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x2A9++0x00
|
|
line.byte 0x00 "MB10_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x2B9++0x00
|
|
line.byte 0x00 "MB11_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x2C9++0x00
|
|
line.byte 0x00 "MB12_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x2D9++0x00
|
|
line.byte 0x00 "MB13_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x2E9++0x00
|
|
line.byte 0x00 "MB14_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x2F9++0x00
|
|
line.byte 0x00 "MB15_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x309++0x00
|
|
line.byte 0x00 "MB16_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x319++0x00
|
|
line.byte 0x00 "MB17_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x329++0x00
|
|
line.byte 0x00 "MB18_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x339++0x00
|
|
line.byte 0x00 "MB19_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x349++0x00
|
|
line.byte 0x00 "MB20_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x359++0x00
|
|
line.byte 0x00 "MB21_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x369++0x00
|
|
line.byte 0x00 "MB22_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x379++0x00
|
|
line.byte 0x00 "MB23_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x389++0x00
|
|
line.byte 0x00 "MB24_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x399++0x00
|
|
line.byte 0x00 "MB25_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x3A9++0x00
|
|
line.byte 0x00 "MB26_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x3B9++0x00
|
|
line.byte 0x00 "MB27_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x3C9++0x00
|
|
line.byte 0x00 "MB28_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x3D9++0x00
|
|
line.byte 0x00 "MB29_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x3E9++0x00
|
|
line.byte 0x00 "MB30_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x3F9++0x00
|
|
line.byte 0x00 "MB31_D3,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data"
|
|
group.byte 0x20A++0x00
|
|
line.byte 0x00 "MB0_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x21A++0x00
|
|
line.byte 0x00 "MB1_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x22A++0x00
|
|
line.byte 0x00 "MB2_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x23A++0x00
|
|
line.byte 0x00 "MB3_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x24A++0x00
|
|
line.byte 0x00 "MB4_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x25A++0x00
|
|
line.byte 0x00 "MB5_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x26A++0x00
|
|
line.byte 0x00 "MB6_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x27A++0x00
|
|
line.byte 0x00 "MB7_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x28A++0x00
|
|
line.byte 0x00 "MB8_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x29A++0x00
|
|
line.byte 0x00 "MB9_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x2AA++0x00
|
|
line.byte 0x00 "MB10_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x2BA++0x00
|
|
line.byte 0x00 "MB11_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x2CA++0x00
|
|
line.byte 0x00 "MB12_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x2DA++0x00
|
|
line.byte 0x00 "MB13_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x2EA++0x00
|
|
line.byte 0x00 "MB14_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x2FA++0x00
|
|
line.byte 0x00 "MB15_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x30A++0x00
|
|
line.byte 0x00 "MB16_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x31A++0x00
|
|
line.byte 0x00 "MB17_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x32A++0x00
|
|
line.byte 0x00 "MB18_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x33A++0x00
|
|
line.byte 0x00 "MB19_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x34A++0x00
|
|
line.byte 0x00 "MB20_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x35A++0x00
|
|
line.byte 0x00 "MB21_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x36A++0x00
|
|
line.byte 0x00 "MB22_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x37A++0x00
|
|
line.byte 0x00 "MB23_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x38A++0x00
|
|
line.byte 0x00 "MB24_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x39A++0x00
|
|
line.byte 0x00 "MB25_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x3AA++0x00
|
|
line.byte 0x00 "MB26_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x3BA++0x00
|
|
line.byte 0x00 "MB27_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x3CA++0x00
|
|
line.byte 0x00 "MB28_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x3DA++0x00
|
|
line.byte 0x00 "MB29_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x3EA++0x00
|
|
line.byte 0x00 "MB30_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x3FA++0x00
|
|
line.byte 0x00 "MB31_D4,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data"
|
|
group.byte 0x20B++0x00
|
|
line.byte 0x00 "MB0_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x21B++0x00
|
|
line.byte 0x00 "MB1_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x22B++0x00
|
|
line.byte 0x00 "MB2_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x23B++0x00
|
|
line.byte 0x00 "MB3_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x24B++0x00
|
|
line.byte 0x00 "MB4_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x25B++0x00
|
|
line.byte 0x00 "MB5_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x26B++0x00
|
|
line.byte 0x00 "MB6_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x27B++0x00
|
|
line.byte 0x00 "MB7_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x28B++0x00
|
|
line.byte 0x00 "MB8_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x29B++0x00
|
|
line.byte 0x00 "MB9_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x2AB++0x00
|
|
line.byte 0x00 "MB10_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x2BB++0x00
|
|
line.byte 0x00 "MB11_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x2CB++0x00
|
|
line.byte 0x00 "MB12_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x2DB++0x00
|
|
line.byte 0x00 "MB13_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x2EB++0x00
|
|
line.byte 0x00 "MB14_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x2FB++0x00
|
|
line.byte 0x00 "MB15_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x30B++0x00
|
|
line.byte 0x00 "MB16_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x31B++0x00
|
|
line.byte 0x00 "MB17_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x32B++0x00
|
|
line.byte 0x00 "MB18_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x33B++0x00
|
|
line.byte 0x00 "MB19_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x34B++0x00
|
|
line.byte 0x00 "MB20_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x35B++0x00
|
|
line.byte 0x00 "MB21_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x36B++0x00
|
|
line.byte 0x00 "MB22_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x37B++0x00
|
|
line.byte 0x00 "MB23_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x38B++0x00
|
|
line.byte 0x00 "MB24_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x39B++0x00
|
|
line.byte 0x00 "MB25_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x3AB++0x00
|
|
line.byte 0x00 "MB26_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x3BB++0x00
|
|
line.byte 0x00 "MB27_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x3CB++0x00
|
|
line.byte 0x00 "MB28_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x3DB++0x00
|
|
line.byte 0x00 "MB29_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x3EB++0x00
|
|
line.byte 0x00 "MB30_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x3FB++0x00
|
|
line.byte 0x00 "MB31_D5,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data"
|
|
group.byte 0x20C++0x00
|
|
line.byte 0x00 "MB0_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x21C++0x00
|
|
line.byte 0x00 "MB1_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x22C++0x00
|
|
line.byte 0x00 "MB2_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x23C++0x00
|
|
line.byte 0x00 "MB3_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x24C++0x00
|
|
line.byte 0x00 "MB4_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x25C++0x00
|
|
line.byte 0x00 "MB5_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x26C++0x00
|
|
line.byte 0x00 "MB6_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x27C++0x00
|
|
line.byte 0x00 "MB7_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x28C++0x00
|
|
line.byte 0x00 "MB8_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x29C++0x00
|
|
line.byte 0x00 "MB9_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x2AC++0x00
|
|
line.byte 0x00 "MB10_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x2BC++0x00
|
|
line.byte 0x00 "MB11_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x2CC++0x00
|
|
line.byte 0x00 "MB12_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x2DC++0x00
|
|
line.byte 0x00 "MB13_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x2EC++0x00
|
|
line.byte 0x00 "MB14_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x2FC++0x00
|
|
line.byte 0x00 "MB15_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x30C++0x00
|
|
line.byte 0x00 "MB16_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x31C++0x00
|
|
line.byte 0x00 "MB17_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x32C++0x00
|
|
line.byte 0x00 "MB18_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x33C++0x00
|
|
line.byte 0x00 "MB19_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x34C++0x00
|
|
line.byte 0x00 "MB20_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x35C++0x00
|
|
line.byte 0x00 "MB21_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x36C++0x00
|
|
line.byte 0x00 "MB22_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x37C++0x00
|
|
line.byte 0x00 "MB23_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x38C++0x00
|
|
line.byte 0x00 "MB24_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x39C++0x00
|
|
line.byte 0x00 "MB25_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x3AC++0x00
|
|
line.byte 0x00 "MB26_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x3BC++0x00
|
|
line.byte 0x00 "MB27_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x3CC++0x00
|
|
line.byte 0x00 "MB28_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x3DC++0x00
|
|
line.byte 0x00 "MB29_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x3EC++0x00
|
|
line.byte 0x00 "MB30_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x3FC++0x00
|
|
line.byte 0x00 "MB31_D6,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data"
|
|
group.byte 0x20D++0x00
|
|
line.byte 0x00 "MB0_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x21D++0x00
|
|
line.byte 0x00 "MB1_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x22D++0x00
|
|
line.byte 0x00 "MB2_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x23D++0x00
|
|
line.byte 0x00 "MB3_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x24D++0x00
|
|
line.byte 0x00 "MB4_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x25D++0x00
|
|
line.byte 0x00 "MB5_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x26D++0x00
|
|
line.byte 0x00 "MB6_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x27D++0x00
|
|
line.byte 0x00 "MB7_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x28D++0x00
|
|
line.byte 0x00 "MB8_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x29D++0x00
|
|
line.byte 0x00 "MB9_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x2AD++0x00
|
|
line.byte 0x00 "MB10_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x2BD++0x00
|
|
line.byte 0x00 "MB11_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x2CD++0x00
|
|
line.byte 0x00 "MB12_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x2DD++0x00
|
|
line.byte 0x00 "MB13_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x2ED++0x00
|
|
line.byte 0x00 "MB14_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x2FD++0x00
|
|
line.byte 0x00 "MB15_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x30D++0x00
|
|
line.byte 0x00 "MB16_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x31D++0x00
|
|
line.byte 0x00 "MB17_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x32D++0x00
|
|
line.byte 0x00 "MB18_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x33D++0x00
|
|
line.byte 0x00 "MB19_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x34D++0x00
|
|
line.byte 0x00 "MB20_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x35D++0x00
|
|
line.byte 0x00 "MB21_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x36D++0x00
|
|
line.byte 0x00 "MB22_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x37D++0x00
|
|
line.byte 0x00 "MB23_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x38D++0x00
|
|
line.byte 0x00 "MB24_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x39D++0x00
|
|
line.byte 0x00 "MB25_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x3AD++0x00
|
|
line.byte 0x00 "MB26_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x3BD++0x00
|
|
line.byte 0x00 "MB27_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x3CD++0x00
|
|
line.byte 0x00 "MB28_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x3DD++0x00
|
|
line.byte 0x00 "MB29_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x3ED++0x00
|
|
line.byte 0x00 "MB30_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.byte 0x3FD++0x00
|
|
line.byte 0x00 "MB31_D7,Mailbox Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data"
|
|
group.word 0x20E++0x01
|
|
line.word 0x00 "MB0_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x21E++0x01
|
|
line.word 0x00 "MB1_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x22E++0x01
|
|
line.word 0x00 "MB2_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x23E++0x01
|
|
line.word 0x00 "MB3_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x24E++0x01
|
|
line.word 0x00 "MB4_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x25E++0x01
|
|
line.word 0x00 "MB5_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x26E++0x01
|
|
line.word 0x00 "MB6_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x27E++0x01
|
|
line.word 0x00 "MB7_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x28E++0x01
|
|
line.word 0x00 "MB8_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x29E++0x01
|
|
line.word 0x00 "MB9_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x2AE++0x01
|
|
line.word 0x00 "MB10_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x2BE++0x01
|
|
line.word 0x00 "MB11_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x2CE++0x01
|
|
line.word 0x00 "MB12_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x2DE++0x01
|
|
line.word 0x00 "MB13_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x2EE++0x01
|
|
line.word 0x00 "MB14_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x2FE++0x01
|
|
line.word 0x00 "MB15_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x30E++0x01
|
|
line.word 0x00 "MB16_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x31E++0x01
|
|
line.word 0x00 "MB17_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x32E++0x01
|
|
line.word 0x00 "MB18_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x33E++0x01
|
|
line.word 0x00 "MB19_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x34E++0x01
|
|
line.word 0x00 "MB20_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x35E++0x01
|
|
line.word 0x00 "MB21_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x36E++0x01
|
|
line.word 0x00 "MB22_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x37E++0x01
|
|
line.word 0x00 "MB23_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x38E++0x01
|
|
line.word 0x00 "MB24_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x39E++0x01
|
|
line.word 0x00 "MB25_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x3AE++0x01
|
|
line.word 0x00 "MB26_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x3BE++0x01
|
|
line.word 0x00 "MB27_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x3CE++0x01
|
|
line.word 0x00 "MB28_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x3DE++0x01
|
|
line.word 0x00 "MB29_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x3EE++0x01
|
|
line.word 0x00 "MB30_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
group.word 0x3FE++0x01
|
|
line.word 0x00 "MB31_TS,Mailbox Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox"
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x400)++0x03
|
|
line.long 0x00 "MKR[$1],Mask Register $1"
|
|
bitfld.long 0x00 29.--31. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
repeat.end
|
|
repeat 2. (strings "0" "1" )(list 0x00 0x04 )
|
|
group.long ($2+0x420)++0x03
|
|
line.long 0x00 "FIDCR$1,FIFO Received ID Compare Registers"
|
|
bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID"
|
|
bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID"
|
|
repeat.end
|
|
group.long 0x428++0x03
|
|
line.long 0x00 "MKIVLR,Mask Invalid Register"
|
|
bitfld.long 0x00 31. "MB31,mailbox 31 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 30. "MB30,mailbox 30 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 29. "MB29,mailbox 29 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 28. "MB28,mailbox 28 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 27. "MB27,mailbox 27 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 26. "MB26,mailbox 26 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 25. "MB25,mailbox 25 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 24. "MB24,mailbox 24 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 23. "MB23,mailbox 23 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 22. "MB22,mailbox 22 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 21. "MB21,mailbox 21 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 20. "MB20,mailbox 20 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 19. "MB19,mailbox 19 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 18. "MB18,mailbox 18 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 17. "MB17,mailbox 17 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 16. "MB16,mailbox 16 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 15. "MB15,mailbox 15 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 14. "MB14,mailbox 14 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 13. "MB13,mailbox 13 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 12. "MB12,mailbox 12 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 11. "MB11,mailbox 11 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 10. "MB10,mailbox 10 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 9. "MB9,mailbox 9 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 8. "MB8,mailbox 8 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 7. "MB7,mailbox 7 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 6. "MB6,mailbox 6 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 5. "MB5,mailbox 5 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 4. "MB4,mailbox 4 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 3. "MB3,mailbox 3 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 2. "MB2,mailbox 2 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
newline
|
|
bitfld.long 0x00 1. "MB1,mailbox 1 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
bitfld.long 0x00 0. "MB0,mailbox 0 Mask Invalid" "0: Mask valid,1: Mask invalid"
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "MIER,Mailbox Interrupt Enable Register (Normal mailbox mode)"
|
|
bitfld.long 0x00 31. "MB31,mailbox 31 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 30. "MB30,mailbox 30 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 29. "MB29,mailbox 29 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 28. "MB28,mailbox 28 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 27. "MB27,mailbox 27 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 26. "MB26,mailbox 26 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 25. "MB25,mailbox 25 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 24. "MB24,mailbox 24 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 23. "MB23,mailbox 23 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 22. "MB22,mailbox 22 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 21. "MB21,mailbox 21 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 20. "MB20,mailbox 20 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 19. "MB19,mailbox 19 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 18. "MB18,mailbox 18 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 17. "MB17,mailbox 17 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 16. "MB16,mailbox 16 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "MB15,mailbox 15 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 14. "MB14,mailbox 14 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 13. "MB13,mailbox 13 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 12. "MB12,mailbox 12 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "MB11,mailbox 11 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 10. "MB10,mailbox 10 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "MB9,mailbox 9 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 8. "MB8,mailbox 8 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 7. "MB7,mailbox 7 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 6. "MB6,mailbox 6 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 5. "MB5,mailbox 5 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 4. "MB4,mailbox 4 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "MB3,mailbox 3 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 2. "MB2,mailbox 2 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "MB1,mailbox 1 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 0. "MB0,mailbox 0 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "MIER_FIFO,Mailbox Interrupt Enable Register(FIFO mailbox mode)"
|
|
bitfld.long 0x00 29. "MB29,Receive FIFO Interrupt Generation Timing Control" "0: Every time reception is completed,1: When the receive FIFO becomes buffer warning.."
|
|
bitfld.long 0x00 28. "MB28,Receive FIFO Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.long 0x00 25. "MB25,Transmit FIFO Interrupt Generation Timing Control" "0: Every time transmission is completed,1: When the transmit FIFO becomes empty due to.."
|
|
newline
|
|
bitfld.long 0x00 24. "MB24,Transmit FIFO Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 23. "MB23,mailbox 23 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 22. "MB22,mailbox 22 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 21. "MB21,mailbox 21 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 20. "MB20,mailbox 20 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 19. "MB19,mailbox 19 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 18. "MB18,mailbox 18 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 17. "MB17,mailbox 17 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 16. "MB16,mailbox 16 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 15. "MB15,mailbox 15 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 14. "MB14,mailbox 14 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 13. "MB13,mailbox 13 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 12. "MB12,mailbox 12 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 11. "MB11,mailbox 11 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 10. "MB10,mailbox 10 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 9. "MB9,mailbox 9 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "MB8,mailbox 8 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 7. "MB7,mailbox 7 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "MB6,mailbox 6 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 5. "MB5,mailbox 5 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "MB4,mailbox 4 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 3. "MB3,mailbox 3 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "MB2,mailbox 2 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x00 1. "MB1,mailbox 1 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "MB0,mailbox 0 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled"
|
|
repeat 32. (increment 0 1) (increment 0 0x01)
|
|
group.byte ($2+0x820)++0x00
|
|
line.byte 0x00 "MCTL_TX[$1],Message Control Register(Transmit mode (when the TRMREQ bit is 1 and the RECREQ bit is $1"
|
|
bitfld.byte 0x00 7. "TRMREQ,Transmit Mailbox Request" "0: Not configured for transmission,1: Configured for transmission"
|
|
bitfld.byte 0x00 6. "RECREQ,Receive Mailbox Request" "0: Not configured for reception,1: Configured for reception"
|
|
newline
|
|
bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 4. "ONESHOT,One-Shot Enable" "0: One-shot reception or one-shot transmission..,1: One-shot reception or one-shot transmission.."
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "TRMABT,Transmission Abort Complete Flag (Transmit mailbox setting enabled)" "0: Transmission has started transmission abort..,1: Transmission abort is completed"
|
|
newline
|
|
rbitfld.byte 0x00 1. "TRMACTIVE,Transmission-in-Progress Status Flag (Transmit mailbox setting enabled)" "0: Transmission is pending or transmission is..,1: From acceptance of transmission request to.."
|
|
bitfld.byte 0x00 0. "SENTDATA,Transmission Complete Flag" "0: Transmission is not completed,1: Transmission is completed"
|
|
repeat.end
|
|
repeat 32. (increment 0 1) (increment 0 0x01)
|
|
group.byte ($2+0x820)++0x00
|
|
line.byte 0x00 "MCTL_RX[$1],Message Control Register( Receive mode (when the TRMREQ bit is 0 and the RECREQ bit is $1"
|
|
bitfld.byte 0x00 7. "TRMREQ,Transmit Mailbox Request" "0: Not configured for transmission,1: Configured for transmission"
|
|
bitfld.byte 0x00 6. "RECREQ,Receive Mailbox Request" "0: Not configured for reception,1: Configured for reception"
|
|
newline
|
|
bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 4. "ONESHOT,One-Shot Enable" "0: One-shot reception or one-shot transmission..,1: One-shot reception or one-shot transmission.."
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "MSGLOST,Message Lost Flag(Receive mailbox setting enabled)" "0: Message is not overwritten or overrun,1: Message is overwritten or overrun"
|
|
newline
|
|
rbitfld.byte 0x00 1. "INVALDATA,Reception-in-Progress Status Flag (Receive mailbox setting enabled)" "0: Message valid,1: Message being updated"
|
|
bitfld.byte 0x00 0. "NEWDATA,Reception Complete Flag" "0: No data has been received or 0 is written to..,1: A new message is being stored or has been.."
|
|
repeat.end
|
|
group.word 0x840++0x01
|
|
line.word 0x00 "CTLR,Control Register"
|
|
bitfld.word 0x00 14.--15. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 13. "RBOC,Forcible Return From Bus-Off" "0: Nothing occurred,1: Forcible return from bus-off"
|
|
newline
|
|
bitfld.word 0x00 11.--12. "BOM,Bus-Off Recovery Mode" "0: Normal mode (ISO11898-1 compliant),1: Entry to CAN halt mode automatically at..,2: Entry to CAN halt mode automatically at..,3: Entry to CAN halt mode (during bus-off.."
|
|
bitfld.word 0x00 10. "SLPM,CAN Sleep Mode" "0: Other than CAN sleep mode,1: CAN sleep mode"
|
|
newline
|
|
bitfld.word 0x00 8.--9. "CANM,CAN Mode of Operation Select" "0: CAN operation mode,1: CAN reset mode,2: CAN halt mode,3: CAN reset mode (forcible transition)"
|
|
bitfld.word 0x00 6.--7. "TSPS,Time Stamp Prescaler Select" "0: Every bit time,1: Every 2-bit time,2: Every 4-bit time,3: Every 8-bit time"
|
|
newline
|
|
bitfld.word 0x00 5. "TSRC,Time Stamp Counter Reset Command" "0: Nothing occurred,1: Reset"
|
|
bitfld.word 0x00 4. "TPM,Transmission Priority Mode Select" "0: ID priority transmit mode,1: Mailbox number priority transmit mode"
|
|
newline
|
|
bitfld.word 0x00 3. "MLM,Message Lost Mode Select" "0: Overwrite mode,1: Overrun mode"
|
|
bitfld.word 0x00 1.--2. "IDFM,ID Format Mode Select" "0: Standard ID mode.All mailboxes (including..,1: Extended ID mode.All mailboxes (including..,2: Mixed ID mode.All mailboxes (including FIFO..,3: Do not use this combination"
|
|
newline
|
|
bitfld.word 0x00 0. "MBM,CAN Mailbox Mode Select" "0: Normal mailbox mode,1: FIFO mailbox mode"
|
|
rgroup.word 0x842++0x01
|
|
line.word 0x00 "STR,Status Register"
|
|
bitfld.word 0x00 15. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.word 0x00 14. "RECST,Receive Status Flag (receiver)" "0: Bus idle or transmission in progress,1: Reception in progress"
|
|
newline
|
|
bitfld.word 0x00 13. "TRMST,Transmit Status Flag (transmitter)" "0: Bus idle or reception in progress,1: Transmission in progress or in bus-off state"
|
|
bitfld.word 0x00 12. "BOST,Bus-Off Status Flag" "0: Not in bus-off state,1: In bus-off state"
|
|
newline
|
|
bitfld.word 0x00 11. "EPST,Error-Passive Status Flag" "0: Not in error-passive state,1: In error-passive state"
|
|
bitfld.word 0x00 10. "SLPST,CAN Sleep Status Flag" "0: Not in CAN sleep mode,1: In CAN sleep mode"
|
|
newline
|
|
bitfld.word 0x00 9. "HLTST,CAN Halt Status Flag" "0: Not in CAN halt mode,1: In CAN halt mode"
|
|
bitfld.word 0x00 8. "RSTST,CAN Reset Status Flag" "0: Not in CAN reset mode,1: In CAN reset mode"
|
|
newline
|
|
bitfld.word 0x00 7. "EST,Error Status Flag" "0: No error occurred,1: Error occurred"
|
|
bitfld.word 0x00 6. "TABST,Transmission Abort Status Flag" "0: No mailbox with TRMABT bit = 1,1: Mailbox(es) with TRMABT bit = 1"
|
|
newline
|
|
bitfld.word 0x00 5. "FMLST,FIFO Mailbox Message Lost Status Flag" "0: RFMLF bit = 0,1: RFMLF bit = 1"
|
|
bitfld.word 0x00 4. "NMLST,Normal Mailbox Message Lost Status Flag" "0: No mailbox with MSGLOST bit = 1,1: Mailbox(es) with MSGLOST bit = 1"
|
|
newline
|
|
bitfld.word 0x00 3. "TFST,Transmit FIFO Status Flag" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
|
|
bitfld.word 0x00 2. "RFST,Receive FIFO Status Flag" "0: No message in receive FIFO (empty),1: Message in receive FIFO"
|
|
newline
|
|
bitfld.word 0x00 1. "SDST,SENTDATA Status Flag" "0: No mailbox with SENTDATA bit = 1,1: Mailbox(es) with SENTDATA bit = 1"
|
|
bitfld.word 0x00 0. "NDST,NEWDATA Status Flag" "0: No mailbox with NEWDATA bit = 1,1: Mailbox(es) with NEWDATA bit = 1"
|
|
group.long 0x844++0x03
|
|
line.long 0x00 "BCR,Bit Configuration Register"
|
|
bitfld.long 0x00 28.--31. "TSEG1,Time Segment 1 Control" "?,?,?,3: 0011,4: 0100,5: 0101,6: 0110,7: 0111,8: 1000,9: 10 Tq,10: 11 Tq,11: 12 Tq,12: 13 Tq,13: 14 Tq,14: 15 Tq,15: 16 Tq"
|
|
bitfld.long 0x00 26.--27. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x00 16.--25. 1. "BRP,Baud Rate Prescaler select"
|
|
bitfld.long 0x00 14.--15. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "SJW,Resynchronization Jump Width Control" "0: 1 Tq,1: 2 Tq,2: 3 Tq,3: 4 Tq"
|
|
bitfld.long 0x00 11. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TSEG2,Time Segment 2 Control" "0: Setting prohibited,1: 2 Tq,2: 3 Tq,3: 4 Tq,4: 5 Tq,5: 6 Tq,6: 7 Tq,7: 8 Tq"
|
|
hexmask.long.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
newline
|
|
bitfld.long 0x00 0. "CCLKS,CAN Clock Source Selection" "0: PCLK (generated by the PLL clock),1: CANMCLK (generated by the main clock)"
|
|
group.byte 0x848++0x00
|
|
line.byte 0x00 "RFCR,Receive FIFO Control Register"
|
|
rbitfld.byte 0x00 7. "RFEST,Receive FIFO Empty Status Flag" "0: Unread message in receive FIFO,1: No unread message in receive FIFO"
|
|
rbitfld.byte 0x00 6. "RFWST,Receive FIFO Buffer Warning Status Flag" "0: Receive FIFO is not buffer warning,1: Receive FIFO is buffer warning (3 unread.."
|
|
newline
|
|
rbitfld.byte 0x00 5. "RFFST,Receive FIFO Full Status Flag" "0: Receive FIFO is not full,1: Receive FIFO is full (4 unread messages)"
|
|
bitfld.byte 0x00 4. "RFMLF,Receive FIFO Message Lost Flag" "0: No receive FIFO message lost has occurred,1: Receive FIFO message lost has occurred"
|
|
newline
|
|
rbitfld.byte 0x00 1.--3. "RFUST,Receive FIFO Unread Message Number Status" "0: No unread message,1: 1 unread message,2: 2 unread messages,3: 3 unread messages,4: 4 unread messages,?..."
|
|
bitfld.byte 0x00 0. "RFE,Receive FIFO Enable" "0: Receive FIFO disabled,1: Receive FIFO enabled"
|
|
wgroup.byte 0x849++0x00
|
|
line.byte 0x00 "RFPCR,Receive FIFO Pointer Control Register"
|
|
hexmask.byte 0x00 0.--7. 1. "RFPCR,The CPU-side pointer for the receive FIFO is incremented by writing FFh to RFPCR"
|
|
group.byte 0x84A++0x00
|
|
line.byte 0x00 "TFCR,Transmit FIFO Control Register"
|
|
rbitfld.byte 0x00 7. "TFEST,Transmit FIFO Empty Status" "0: Unsent message in transmit FIFO,1: No unsent message in transmit FIFO"
|
|
rbitfld.byte 0x00 6. "TFFST,Transmit FIFO Full Status" "0: Transmit FIFO is not full,1: Transmit FIFO is full (4 unsent messages)"
|
|
newline
|
|
bitfld.byte 0x00 4.--5. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
rbitfld.byte 0x00 1.--3. "TFUST,Transmit FIFO Unsent Message Number Status" "0: No unsent message,1: 1 unsent message,2: 2 unsent messages,3: 3 unsent messages,4: 4 unsent messages,?..."
|
|
newline
|
|
bitfld.byte 0x00 0. "TFE,Transmit FIFO Enable" "0: Transmit FIFO disabled,1: Transmit FIFO enabled"
|
|
wgroup.byte 0x84B++0x00
|
|
line.byte 0x00 "TFPCR,Transmit FIFO Pointer Control Register"
|
|
hexmask.byte 0x00 0.--7. 1. "TFPCR,The CPU-side pointer for the transmit FIFO is incremented by writing FFh to TFPCR"
|
|
group.byte 0x84C++0x00
|
|
line.byte 0x00 "EIER,Error Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. "BLIE,Bus Lock Interrupt Enable" "0: Bus lock interrupt disabled,1: Bus lock interrupt enabled"
|
|
bitfld.byte 0x00 6. "OLIE,Overload Frame Transmit Interrupt Enable" "0: Overload frame transmit interrupt disabled,1: Overload frame transmit interrupt enabled"
|
|
newline
|
|
bitfld.byte 0x00 5. "ORIE,Overrun Interrupt Enable" "0: Receive overrun interrupt disabled,1: Receive overrun interrupt enabled"
|
|
bitfld.byte 0x00 4. "BORIE,Bus-Off Recovery Interrupt Enable" "0: Bus-off recovery interrupt disabled,1: Bus-off recovery interrupt enabled"
|
|
newline
|
|
bitfld.byte 0x00 3. "BOEIE,Bus-Off Entry Interrupt Enable" "0: Bus-off entry interrupt disabled,1: Bus-off entry interrupt enabled"
|
|
bitfld.byte 0x00 2. "EPIE,Error-Passive Interrupt Enable" "0: Error-passive interrupt disabled,1: Error-passive interrupt enabled"
|
|
newline
|
|
bitfld.byte 0x00 1. "EWIE,Error-Warning Interrupt Enable" "0: Error-warning interrupt disabled,1: Error-warning interrupt enabled"
|
|
bitfld.byte 0x00 0. "BEIE,Bus Error Interrupt Enable" "0: Bus error interrupt disabled,1: Bus error interrupt enabled"
|
|
group.byte 0x84D++0x00
|
|
line.byte 0x00 "EIFR,Error Interrupt Factor Judge Register"
|
|
bitfld.byte 0x00 7. "BLIF,Bus Lock Detect Flag" "0: No bus lock detected,1: Bus lock detected"
|
|
bitfld.byte 0x00 6. "OLIF,Overload Frame Transmission Detect Flag" "0: No overload frame transmission detected,1: Overload frame transmission detected"
|
|
newline
|
|
bitfld.byte 0x00 5. "ORIF,Receive Overrun Detect Flag" "0: No receive overrun detected,1: Receive overrun detected"
|
|
bitfld.byte 0x00 4. "BORIF,Bus-Off Recovery Detect Flag" "0: No bus-off recovery detected,1: Bus-off recovery detected"
|
|
newline
|
|
bitfld.byte 0x00 3. "BOEIF,Bus-Off Entry Detect Flag" "0: No bus-off entry detected,1: Bus-off entry detected"
|
|
bitfld.byte 0x00 2. "EPIF,Error-Passive Detect Flag" "0: No error-passive detected,1: Error-passive detected"
|
|
newline
|
|
bitfld.byte 0x00 1. "EWIF,Error-Warning Detect Flag" "0: No error-warning detected,1: Error-warning detected"
|
|
bitfld.byte 0x00 0. "BEIF,Bus Error Detect Flag" "0: No bus error detected,1: Bus error detected"
|
|
rgroup.byte 0x84E++0x00
|
|
line.byte 0x00 "RECR,Receive Error Count Register"
|
|
hexmask.byte 0x00 0.--7. 1. "RECR,Receive error count functionRECR increments or decrements the counter value according to the error status of the CAN module during reception"
|
|
rgroup.byte 0x84F++0x00
|
|
line.byte 0x00 "TECR,Transmit Error Count Register"
|
|
hexmask.byte 0x00 0.--7. 1. "TECR,Transmit error count functionTECR increments or decrements the counter value according to the error status of the CAN module during transmission"
|
|
group.byte 0x850++0x00
|
|
line.byte 0x00 "ECSR,Error Code Store Register"
|
|
bitfld.byte 0x00 7. "EDPM,Error Display Mode Select" "0: Output of first detected error code,1: Output of accumulated error code"
|
|
bitfld.byte 0x00 6. "ADEF,ACK Delimiter Error Flag" "0: No ACK delimiter error detected,1: ACK delimiter error detected"
|
|
newline
|
|
bitfld.byte 0x00 5. "BE0F,Bit Error (dominant) Flag" "0: No bit error (dominant) detected,1: Bit error (dominant) detected"
|
|
bitfld.byte 0x00 4. "BE1F,Bit Error (recessive) Flag" "0: No bit error (recessive) detected,1: Bit error (recessive) detected"
|
|
newline
|
|
bitfld.byte 0x00 3. "CEF,CRC Error Flag" "0: No CRC error detected,1: CRC error detected"
|
|
bitfld.byte 0x00 2. "AEF,ACK Error Flag" "0: No ACK error detected,1: ACK error detected"
|
|
newline
|
|
bitfld.byte 0x00 1. "FEF,Form Error Flag" "0: No form error detected,1: Form error detected"
|
|
bitfld.byte 0x00 0. "SEF,Stuff Error Flag" "0: No stuff error detected,1: Stuff error detected"
|
|
group.byte 0x851++0x00
|
|
line.byte 0x00 "CSSR,Channel Search Support Register"
|
|
hexmask.byte 0x00 0.--7. 1. "CSSR,When the value for the channel search is input the channel number is output to MSSR"
|
|
rgroup.byte 0x852++0x00
|
|
line.byte 0x00 "MSSR,Mailbox Search Status Register"
|
|
bitfld.byte 0x00 7. "SEST,Search Result Status" "0: Search result found,1: No search result"
|
|
bitfld.byte 0x00 5.--6. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 0.--4. "MBNST,Search Result Mailbox Number Status These bits output the smallest mailbox number that is searched in each mode of MSMR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x853++0x00
|
|
line.byte 0x00 "MSMR,Mailbox Search Mode Register"
|
|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0.--1. "MBSM,Mailbox Search Mode Select" "0: Receive mailbox search mode,1: Transmit mailbox search mode,2: Message lost search mode,3: Channel search mode"
|
|
rgroup.word 0x854++0x01
|
|
line.word 0x00 "TSR,Time Stamp Register"
|
|
hexmask.word 0x00 0.--15. 1. "TSR,Free-running counter value for the time stamp function"
|
|
group.word 0x856++0x01
|
|
line.word 0x00 "AFSR,Acceptance Filter Support Register"
|
|
hexmask.word 0x00 0.--15. 1. "AFSR,After the standard ID of a received message is written the value converted for data table search can be"
|
|
group.byte 0x858++0x00
|
|
line.byte 0x00 "TCR,Test Control Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 1.--2. "TSTM,CAN Test Mode Select" "0: Other than CAN test mode,1: Listen-only mode,2: Self-test mode 0 (external loopback),3: Self-test mode 1 (internal loopback)"
|
|
newline
|
|
bitfld.byte 0x00 0. "TSTE,CAN Test Mode Enable" "0: CAN test mode disabled,1: CAN test mode enabled"
|
|
tree.end
|
|
tree "CRC (CRC Calculator)"
|
|
base ad:0x40074000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CRCCR0,CRC Control Register0"
|
|
bitfld.byte 0x00 7. "DORCLR,CRCDOR Register Clear" "0: No effect,1: Clears the CRCDOR register"
|
|
bitfld.byte 0x00 6. "LMS,CRC Calculation Switching" "0: Generates CRC for LSB first communication,1: Generates CRC for MSB first communication"
|
|
bitfld.byte 0x00 3.--5. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. "GPS,CRC Generating Polynomial Switching" "0: No calculation is executed,1: 8-bit CRC-8 (X8 + X2 + X + 1),2: 16-bit CRC-16 (X16 + X15 + X2 + 1),3: 16-bit CRC-CCITT (X16 + X12 + X5 + 1),4: 32-bit..,5: 32-bit CRC-32C..,?..."
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "CRCCR1,CRC Control Register1"
|
|
bitfld.byte 0x00 7. "CRCSEN,Snoop enable bit" "0: Disabled,1: Enabled"
|
|
bitfld.byte 0x00 6. "CRCSWR,Snoop-on-write/read switch bit" "0: Snoop-on-read,1: Snoop-on"
|
|
bitfld.byte 0x00 0.--5. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CRCDIR,CRC Data Input Register"
|
|
hexmask.long 0x00 0.--31. 1. "CRCDIR,Calculation input Data (Case of CRC-32 CRC-32C )"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "CRCDIR_BY,CRC Data Input Register (byte access)"
|
|
hexmask.byte 0x00 0.--7. 1. "CRCDIR_BY,Calculation input Data ( Case of CRC-8 CRC-16 or CRC-CCITT )"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CRCDOR,CRC Data Output Register"
|
|
hexmask.long 0x00 0.--31. 1. "CRCDOR,Calculation output Data (Case of CRC-32 CRC-32C )"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "CRCDOR_HA,CRC Data Output Register (halfword access)"
|
|
hexmask.word 0x00 0.--15. 1. "CRCDOR_HA,Calculation output Data (Case of CRC-16 or CRC-CCITT )"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "CRCDOR_BY,CRC Data Output Register(byte access)"
|
|
hexmask.byte 0x00 0.--7. 1. "CRCDOR_BY,Calculation output Data (Case of CRC-8 )"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "CRCSAR,Snoop Address Register"
|
|
bitfld.word 0x00 14.--15. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
hexmask.word 0x00 0.--13. 1. "CRCSA,snoop address bitSet the I/O register address to snoop"
|
|
tree.end
|
|
tree "CTSU (Capacitive Touch Sensing Unit)"
|
|
base ad:0x40081000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTSUCR0,CTSU Control Register 0"
|
|
bitfld.byte 0x00 4. "CTSUINIT,CTSU Control Block Initialization" "0: Writing a 0 has no effect this bit is read as 0,1: initializes the CTSU control block and.."
|
|
bitfld.byte 0x00 2. "CTSUSNZ,CTSU Wait State Power-Saving Enable" "0: Power-saving function during wait state is..,1: Power-saving function during wait state is.."
|
|
newline
|
|
bitfld.byte 0x00 1. "CTSUCAP,CTSU Measurement Operation Start Trigger Select" "0: Software trigger,1: External trigger"
|
|
bitfld.byte 0x00 0. "CTSUSTRT,CTSU Measurement Operation Start" "0: Measurement operation stops,1: Measurement operation starts"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "CTSUCR1,CTSU Control Register 1"
|
|
bitfld.byte 0x00 6.--7. "CTSUMD,CTSU Measurement Mode Select" "0: Self-capacitance single scan mode,1: Self-capacitance multi-scan mode,2: Setting prohibited,3: Mutual capacitance full scan mode"
|
|
bitfld.byte 0x00 4.--5. "CTSUCLK,CTSU Operating Clock Select" "0: PCLK,1: PCLK/2 (PCLK divided by 2),2: PCLK/2 (PCLK divided by 4),3: Setting prohibited"
|
|
newline
|
|
bitfld.byte 0x00 3. "CTSUATUNE1,CTSU Power Supply Capacity Adjustment" "0: Normal output,1: High-current output"
|
|
bitfld.byte 0x00 2. "CTSUATUNE0,CTSU Power Supply Operating Mode Setting" "0: Normal operating mode,1: Low-voltage operating mode"
|
|
newline
|
|
bitfld.byte 0x00 1. "CTSUCSW,CTSU LPF Capacitance Charging Control" "0: Turned off capacitance switch,1: Turned on capacitance switch"
|
|
bitfld.byte 0x00 0. "CTSUPON,CTSU Power Supply Enable" "0: Powered off the CTSU,1: Powered on the CTSU"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "CTSUSDPRS,CTSU Synchronous Noise Reduction Setting Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "CTSUSOFF,CTSU High-Pass Noise Reduction Function Off Setting" "0: High-pass noise reduction function turned on,1: High-pass noise reduction function turned off"
|
|
newline
|
|
bitfld.byte 0x00 4.--5. "CTSUPRMODE,CTSU Base Period and Pulse Count Setting" "0: 510 pulses,1: 126 pulses,2: 62 pulses (recommended setting value),3: Setting prohibited"
|
|
bitfld.byte 0x00 0.--3. "CTSUPRRATIO,CTSU Measurement Time and Pulse Count AdjustmentRecommended setting: 3 (0011b)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "CTSUSST,CTSU Sensor Stabilization Wait Control Register"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUSST,CTSU Sensor Stabilization Wait ControlNOTE: The value of these bits should be fixed to 00010000b"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "CTSUMCH0,CTSU Measurement Channel Register 0"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--5. "CTSUMCH0,CTSU Measurement Channel 0.Note1: Writing to these bits is enabled only in self-capacitance single scan mode (CTSUCR1.CTSUMD[1:0] bits = 00b).Note2: If the value of CTSUMCH0 was set to b'111111 in mode other than self-capacitor single scan mode.." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.byte 0x05++0x00
|
|
line.byte 0x00 "CTSUMCH1,CTSU Measurement Channel Register 1"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--5. "CTSUMCH1,CTSU Measurement Channel 1Note1: If the value of CTSUMCH1 was set to b'111111 the measurement is stopped" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "CTSUCHAC0,CTSU Channel Enable Control Register 0"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUCHAC0,CTSU Channel Enable Control 0.0: Not measurement target1: Measurement targetNote: CTSUCHAC0[0] corresponds to TS00 and CTSUCHAC0[7] corresponds to TS07"
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "CTSUCHAC1,CTSU Channel Enable Control Register 1"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUCHAC1,CTSU Channel Enable Control 1.0: Not measurement target1: Measurement targetNote: CTSUCHAC1[0] corresponds to TS08 and CTSUCHAC1[7] corresponds to TS15"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "CTSUCHAC2,CTSU Channel Enable Control Register 2"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUCHAC2,CTSU Channel Enable Control 2.0: Not measurement target1: Measurement targetNote: CTSUCHAC2[0] corresponds to TS16 and CTSUCHAC2[7] corresponds to TS23"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "CTSUCHAC3,CTSU Channel Enable Control Register 3"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUCHAC3,CTSU Channel Enable Control 3.0: Not measurement target1: Measurement targetNote: CTSUCHAC3[0] corresponds to TS24 and CTSUCHAC3[3] corresponds to TS27"
|
|
group.byte 0x0B++0x00
|
|
line.byte 0x00 "CTSUCHTRC0,CTSU Channel Transmit/Receive Control Register 0"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUCHTRC0,CTSU Channel Transmit/Receive Control 0"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "CTSUCHTRC1,CTSU Channel Transmit/Receive Control Register 1"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUCHTRC1,CTSU Channel Transmit/Receive Control 1"
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "CTSUCHTRC2,CTSU Channel Transmit/Receive Control Register 2"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUCHRC2,CTSU Channel Transmit/Receive Control 2"
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "CTSUCHTRC3,CTSU Channel Transmit/Receive Control Register 3"
|
|
hexmask.byte 0x00 0.--7. 1. "CTSUCHRC3,CTSU Channel Transmit/Receive Control 3"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "CTSUDCLKC,CTSU High-Pass Noise Reduction Control Register"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 4.--5. "CTSUSSCNT,CTSU Diffusion Clock Mode ControlNOTE: This bit should be set to 11b" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 2.--3. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--1. "CTSUSSMOD,CTSU Diffusion Clock Mode SelectNOTE: This bit should be set to 00b" "0,1,2,3"
|
|
group.byte 0x11++0x00
|
|
line.byte 0x00 "CTSUST,CTSU Status Register"
|
|
rbitfld.byte 0x00 7. "CTSUPS,CTSU Mutual Capacitance Status Flag" "0: First measurement,1: Second measurement"
|
|
bitfld.byte 0x00 6. "CTSUROVF,CTSU Reference Counter Overflow Flag" "0: No overflow,1: An overflow"
|
|
newline
|
|
bitfld.byte 0x00 5. "CTSUSOVF,CTSU Sensor Counter Overflow Flag" "0: No overflow,1: An overflow"
|
|
rbitfld.byte 0x00 4. "CTSUDTSR,CTSU Data Transfer Status Flag" "0: Measurement result has been,1: Measurement result has not been"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
rbitfld.byte 0x00 0.--2. "CTSUSTC,CTSU Measurement Status Counter" "0: Status 0,1: Status 1,2: Status 2,3: Status 3,4: Status 4,5: Status 5,?..."
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "CTSUSSC,CTSU High-Pass Noise Reduction Spectrum Diffusion Control Register"
|
|
bitfld.word 0x00 12.--15. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 8.--11. "CTSUSSDIV,CTSU Spectrum Diffusion Frequency Division Setting" "0: 4.00 <= fb,1: 2.00 <= fb < 4.00,2: 1.33 <= fb < 2.00,3: 1.00 <= fb < 1.33,4: 0.80 <= fb < 1.00,5: 0.67 <= fb < 0.80,6: 0.57 <= fb < 0.67,7: 0.50 <= fb < 0.57,8: 0.44 <= fb < 0.50,9: 0.40 <= fb < 0.44,10: 0.36 <= fb < 0.40,11: 0.33 <= fb < 0.36,12: 0.31 <= fb < 0.33,13: 0.29 <= fb < 0.31,14: 0.27 <= fb < 0.29,15: fb < 0.27"
|
|
newline
|
|
hexmask.word.byte 0x00 0.--7. 1. "Reserved,These bits are read as 00000000"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "CTSUSO0,CTSU Sensor Offset Register 0"
|
|
bitfld.word 0x00 10.--15. "CTSUSNUM,CTSU Measurement Count Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.word 0x00 0.--9. 1. "CTSUSO,CTSU Sensor Offset AdjustmentCurrent offset amount is CTSUSO ( 0 to 1023 )"
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "CTSUSO1,CTSU Sensor Offset Register 1"
|
|
bitfld.word 0x00 15. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.word 0x00 13.--14. "CTSUICOG,CTSU ICO Gain Adjustment" "0: 100 percent gain,1: 66 percent gain,2: 50 percent gain,3: 40 percent gain"
|
|
newline
|
|
bitfld.word 0x00 8.--12. "CTSUSDPA,CTSU Base Clock SettingOperating clock divided by ( CTSUSDPA + 1 ) x 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word.byte 0x00 0.--7. 1. "CTSURICOA,CTSU Reference ICO Current AdjustmentCurrent offset amount is CTSUSO ( 0 to 255 )"
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "CTSUSC,CTSU Sensor Counter"
|
|
hexmask.word 0x00 0.--15. 1. "CTSUSC,CTSU Sensor CounterThese bits indicate the measurement result of the CTSU"
|
|
rgroup.word 0x1A++0x01
|
|
line.word 0x00 "CTSURC,CTSU Reference Counter"
|
|
hexmask.word 0x00 0.--15. 1. "CTSURC,CTSU Reference Counter"
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "CTSUERRS,CTSU Error Status Register"
|
|
bitfld.word 0x00 15. "CTSUICOMP,TSCAP Voltage Error Monitor" "0: Normal TSCAP voltage,1: Abnormal TSCAP voltage"
|
|
hexmask.word 0x00 0.--14. 1. "Reserved,These bits are read as 000000000000000"
|
|
tree.end
|
|
tree "DAC (D/A Converter)"
|
|
tree "DAC8"
|
|
base ad:0x4009E000
|
|
repeat 2. (strings "0" "1" )(list 0x0 0x1 )
|
|
group.byte ($2+0x00)++0x00
|
|
line.byte 0x00 "DACS$1,D/A Conversion Value Setting Register"
|
|
hexmask.byte 0x00 0.--7. 1. "DACS,DACS D/A conversion store data"
|
|
repeat.end
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "DAM,D/A Converter Mode Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 5. "DACE1,D/A operation enable 1" "0: D/A conversion disabled for channel 1,1: D/A conversion enabled for channel 1"
|
|
bitfld.byte 0x00 4. "DACE0,D/A operation enable 0" "0: D/A conversion disabled for channel 0,1: D/A conversion enabled for channel 0"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "DAMD1,D/A operation mode select 1" "0: Channel 1 for normal operation mode,1: Channel 1 for real-time output mode(event link)"
|
|
bitfld.byte 0x00 0. "DAMD0,D/A operation mode select 0" "0: Channel 0 for normal operation mode,1: Channel 0 for real-time output mode(event link)"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "DACADSCR,D/A A/D Synchronous Start Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "DACADST,D/A A/D Synchronous Conversion" "0: Do not synchronize DAC8 with ADC16 operation..,1: Synchronize DAC8 with ADC16 operation (enable.."
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "DACPC,D/A SW Charge Pump Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "PUMPEN,Charge pump enable" "0: Charge pump disable,1: Charge pump enable"
|
|
tree.end
|
|
tree "DAC12"
|
|
base ad:0x4005E000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "DADR0,D/A Data Register 0"
|
|
hexmask.word 0x00 0.--15. 1. "DADR,D/A Data RegisterNOTE: When DADPR.DPSEL = 0 the high-order 4 bits are fixed to"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "DACR,D/A Control Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "DAOE0,D/A Output Enable 0" "0: Analog output of channel 0 (DA0) is disabled,1: D/A conversion of channel 0 is enabled"
|
|
bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 0.--4. "Reserved,These bits are read as 11111" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "DADPR,DADR0 Format Select Register"
|
|
bitfld.byte 0x00 7. "DPSEL,DADRm Format Select" "0: Right justified format,1: Left justified format"
|
|
hexmask.byte 0x00 0.--6. 1. "Reserved,These bits are read as 0000000"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "DAADSCR,D/A-A/D Synchronous Start Control Register"
|
|
bitfld.byte 0x00 7. "DAADST,D/A-A/D Synchronous Conversion" "0: D/A converter operation does not synchronize..,1: D/A converter operation synchronizes with A/D.."
|
|
hexmask.byte 0x00 0.--6. 1. "Reserved,These bits are read as 0000000"
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "DAVREFCR,D/A VREF Control Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 0.--2. "REF,D/A Reference Voltage Select" "0: Not selected,1: AVCC0/AVSS0,?,3: Internal reference voltage/AVSS0,?,?,6: VREFH/VREFL,?..."
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "DAPC,D/A Switch Charge Pump Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "PUMPEN,Charge Pump Enable" "0: Charge pump disabled,1: Charge pump enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "DBG (Debug Function)"
|
|
base ad:0x4001B000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DBGSTR,Debug Status Register"
|
|
bitfld.long 0x00 30.--31. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.long 0x00 29. "CDBGPWRUPACK,Debug power-up acknowledge" "0: Debug power-up request is not acknowledged,1: Debug power-up request is acknowledged"
|
|
newline
|
|
bitfld.long 0x00 28. "CDBGPWRUPREQ,Debug power-up request" "0: OCD is not requesting debug power-up,1: OCD is requesting debug power-up"
|
|
hexmask.long 0x00 0.--27. 1. "Reserved,These bits are read as 0000000000000000000000000000"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DBGSTOPCR,Debug Stop Control Register"
|
|
bitfld.long 0x00 26.--31. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 25. "DBGSTOP_RECCR,Mask bit for SRAM ECC error reset/interrupt" "0: Enable SRAM ECC error reset/interrupt,1: Mask SRAM ECC error reset/interrupt"
|
|
newline
|
|
bitfld.long 0x00 24. "DBGSTOP_RPER,Mask bit for RAM parity error reset/interrupt" "0: Enable RAM parity error reset/interrupt,1: Mask RAM parity error reset/interrupt"
|
|
bitfld.long 0x00 19.--23. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 16.--18. "DBGSTOP_LVD,b18: Mask bit for LVD2 reset/interrupt (0:enable / 1:Mask)b17: Mask bit for LVD1 reset/interrupt (0:enable / 1:Mask)b16: Mask bit for LVD0 reset (0:enable / 1:Mask)" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 2.--15. 1. "Reserved,These bits are read as 00000000000000"
|
|
newline
|
|
bitfld.long 0x00 1. "DBGSTOP_WDT,Mask bit for WDT reset/interrupt" "0: Mask WDT reset/interrupt,1: Enable WDT reset"
|
|
bitfld.long 0x00 0. "DBGSTOP_IWDT,Mask bit for IWDT reset/interrupt" "0: Mask IWDT reset/interrupt,1: Enable IWDT reset"
|
|
tree.end
|
|
tree "DOC (Data Operation Circuit)"
|
|
base ad:0x40054100
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "DOCR,DOC Control Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "DOPCFCL,DOPCF Clear" "0: Maintains the DOPCF flag state,1: Clears the DOPCF flag"
|
|
rbitfld.byte 0x00 5. "DOPCF,Data Operation Circuit FlagIndicates the result of an operation" "0,1"
|
|
bitfld.byte 0x00 3.--4. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 2. "DCSEL,Detection Condition Select" "0: DOPCF is set when data mismatch is detected,1: DOPCF is set when data match is detected"
|
|
bitfld.byte 0x00 0.--1. "OMS,Operating Mode Select" "0: Data comparison mode,1: Data addition mode,2: Data subtraction mode,3: Setting prohibited"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "DODIR,DOC Data Input Register"
|
|
hexmask.word 0x00 0.--15. 1. "DODIR,16-bit read-write register in which 16-bit data for use in the operations are stored"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "DODSR,DOC Data Setting Register"
|
|
hexmask.word 0x00 0.--15. 1. "DODSR,This register stores 16-bit data for use as a reference in data comparison mode"
|
|
tree.end
|
|
tree "DTC (Data Transfer Controller)"
|
|
base ad:0x40005400
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "DTCCR,DTC Control Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 4. "RRS,DTC Transfer Information Read Skip Enable" "0: Do not skip transfer information read,1: Skip transfer information read when vector.."
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 1" "0,1"
|
|
bitfld.byte 0x00 0.--2. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DTCVBR,DTC Vector Base Register"
|
|
hexmask.long 0x00 0.--31. 1. "DTCVBR,DTC Vector Base Address.Note: A value cannot be set in the lower-order 10 bits"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "DTCST,DTC Module Start Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "DTCST,DTC Module Start" "0: DTC module stop,1: DTC module start"
|
|
rgroup.word 0x0E++0x01
|
|
line.word 0x00 "DTCSTS,DTC Status Register"
|
|
bitfld.word 0x00 15. "ACT,DTC Active Flag" "0: DTC transfer operation is not in progress,1: DTC transfer operation is in progress"
|
|
hexmask.word.byte 0x00 8.--14. 1. "Reserved,These bits are read as 0000000"
|
|
hexmask.word.byte 0x00 0.--7. 1. "VECN,DTC-Activating Vector Number MonitoringThese bits indicate the vector number for the activating source when DTC transfer is in progress.The value is only valid if DTC transfer is in progress (the value of the ACT flag is 1)"
|
|
tree.end
|
|
tree "ELC (Event Link Controller)"
|
|
base ad:0x40041000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "ELCR,Event Link Controller Register"
|
|
bitfld.byte 0x00 7. "ELCON,All Event Link Enable" "0: ELC function is disabled,1: ELC function is enabled"
|
|
hexmask.byte 0x00 0.--6. 1. "Reserved,These bits are read as 0000000"
|
|
repeat 2. (strings "0" "1" )(list 0x0 0x2 )
|
|
group.byte ($2+0x02)++0x00
|
|
line.byte 0x00 "ELSEGR$1,Event Link Software Event Generation Register"
|
|
bitfld.byte 0x00 7. "WI,ELSEGR Register Write Disable" "0: Write to ELSEGR register is enabled,1: Write to ELSEGR register is disabled"
|
|
bitfld.byte 0x00 6. "WE,SEG Bit Write Enable" "0: Write to SEG bit is disabled,1: Write to SEG bit is enabled"
|
|
bitfld.byte 0x00 1.--5. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 0. "SEG,Software Event Generation" "0: Normal operation,1: Software event is generated"
|
|
repeat.end
|
|
repeat 13. (strings "0" "1" "2" "3" "8" "9" "12" "14" "15" "" "" "" "22" )(list 0x0 0x4 0x8 0xC 0x20 0x24 0x30 0x38 0x3C 0x48 0x4C 0x50 0x58 )
|
|
group.word ($2+0x10)++0x01
|
|
line.word 0x00 "ELSR$1,Event Link Setting Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
|
|
hexmask.word.byte 0x00 0.--7. 1. "ELS,Event Link Select"
|
|
repeat.end
|
|
tree.end
|
|
tree "FCACHE (Flash Cache)"
|
|
base ad:0x4001C000
|
|
group.word 0x100++0x01
|
|
line.word 0x00 "FCACHEE,Flash Cache Enable Register"
|
|
hexmask.word 0x00 1.--15. 1. "Reserved,These bits are read as 000000000000000"
|
|
bitfld.word 0x00 0. "FCACHEEN,FCACHE Enable" "0: FCACHE is disabled,1: FCACHE is enabled"
|
|
group.word 0x104++0x01
|
|
line.word 0x00 "FCACHEIV,Flash Cache Invalidate Register"
|
|
hexmask.word 0x00 1.--15. 1. "Reserved,These bits are read as 000000000000000"
|
|
bitfld.word 0x00 0. "FCACHEIV,FCACHE Invalidation" "0: (Read)not in progress / (Write) no effect,1: (Read)in progress /(Write) Starting Cache.."
|
|
tree.end
|
|
tree "GPT_OPS (Output Phase Switching Controller)"
|
|
base ad:0x40078FF0
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "OPSCR,Output Phase Switching Control Register"
|
|
bitfld.long 0x00 30.--31. "NFCS,External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64"
|
|
bitfld.long 0x00 29. "NFEN,External Input Noise Filter Enable" "0: Do not use a noise filter to the external input,1: Use a noise filter to the external input"
|
|
newline
|
|
bitfld.long 0x00 28. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.long 0x00 27. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "GODF,Group output disable function" "0: This bit function is ignored,1: Group disable will clear OPSCR.EN Bit"
|
|
bitfld.long 0x00 25. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "GRP,Output disabled source selection" "0: Select Group A output disable source,1: Select Group B output disable source"
|
|
bitfld.long 0x00 22.--23. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 21. "ALIGN,Input phase alignment" "0: Input phase is aligned to PCLK,1: Input phase is aligned PWM"
|
|
bitfld.long 0x00 20. "RV,Output phase rotation direction reversal" "0: U/V/W-Phase output,1: Output to reverse the V / W-phase"
|
|
newline
|
|
bitfld.long 0x00 19. "INV,Invert-Phase Output Control" "0: Positive Logic (Active High)output,1: Negative Logic (Active Low)output"
|
|
bitfld.long 0x00 18. "N,Negative-Phase Output (N) Control" "0: Level signal output,1: PWM signal output (PWM of GPT0)"
|
|
newline
|
|
bitfld.long 0x00 17. "P,Positive-Phase Output (P) Control" "0: Level signal output,1: PWM signal output (PWM of GPT0)"
|
|
bitfld.long 0x00 16. "FB,External Feedback Signal EnableThis bit selects the input phase from the software settings and external input" "0: Select the external input,1: Select the soft setting(OPSCR.UF VF WF)"
|
|
newline
|
|
hexmask.long.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.long 0x00 8. "EN,Enable-Phase Output Control" "0: Not Output(Hi-Z external terminals),1: Output"
|
|
newline
|
|
bitfld.long 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
rbitfld.long 0x00 6. "W,Input W-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 5. "V,Input V-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)" "0,1"
|
|
rbitfld.long 0x00 4. "U,Input U-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.long 0x00 2. "WF,Input Phase Soft Setting UFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "VF,Input Phase Soft Setting VFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1" "0,1"
|
|
bitfld.long 0x00 0. "UF,Input Phase Soft Setting WFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1" "0,1"
|
|
tree.end
|
|
tree "GPT (General Purpose Timer)"
|
|
tree "GPT161"
|
|
base ad:0x40078100
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GTWP,General PWM Timer Write-Protection Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
|
|
hexmask.long.byte 0x00 8.--15. 1. "PRKEY,GTWP Key Code"
|
|
newline
|
|
hexmask.long.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.long 0x00 0. "WP,Register Write Disable" "0: Write to the register is enabled,1: Write to the register is disabled"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GTSTR,General PWM Timer Software Start Register"
|
|
hexmask.long 0x00 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000"
|
|
bitfld.long 0x00 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT166.GTCNT counter starts (write) / Counter.."
|
|
newline
|
|
bitfld.long 0x00 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT165.GTCNT counter starts (write) / Counter.."
|
|
bitfld.long 0x00 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT164.GTCNT counter starts (write) / Counter.."
|
|
newline
|
|
bitfld.long 0x00 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT163.GTCNT counter starts (write) / Counter.."
|
|
bitfld.long 0x00 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT162.GTCNT counter starts (write) / Counter.."
|
|
newline
|
|
bitfld.long 0x00 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT161.GTCNT counter starts (write) / Counter.."
|
|
bitfld.long 0x00 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT320.GTCNT counter starts (write) / Counter.."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GTSTP,General PWM Timer Software Stop Register"
|
|
hexmask.long 0x00 7.--31. 1. "Reserved,These bits are read as 1111111111111111111111111"
|
|
bitfld.long 0x00 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT166.GTCNT counter stops (write) / Counter.."
|
|
newline
|
|
bitfld.long 0x00 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT165.GTCNT counter stops (write) / Counter.."
|
|
bitfld.long 0x00 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT164.GTCNT counter stops (write) / Counter.."
|
|
newline
|
|
bitfld.long 0x00 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT163.GTCNT counter stops (write) / Counter.."
|
|
bitfld.long 0x00 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT162.GTCNT counter stops (write) / Counter.."
|
|
newline
|
|
bitfld.long 0x00 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT161.GTCNT counter stops (write) / Counter.."
|
|
bitfld.long 0x00 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT320.GTCNT counter stops (write) / Counter.."
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GTCLR,General PWM Timer Software Clear Register"
|
|
hexmask.long 0x00 7.--31. 1. "Reserved,The write value should be 0000000000000000000000000"
|
|
bitfld.long 0x00 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GPT166.GTCNT counter clears"
|
|
newline
|
|
bitfld.long 0x00 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GPT165.GTCNT counter clears"
|
|
bitfld.long 0x00 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GPT164.GTCNT counter clears"
|
|
newline
|
|
bitfld.long 0x00 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GPT163.GTCNT counter clears"
|
|
bitfld.long 0x00 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GPT162.GTCNT counter clears"
|
|
newline
|
|
bitfld.long 0x00 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GPT161.GTCNT counter clears"
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bitfld.long 0x00 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GPT320.GTCNT counter clears"
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group.long 0x10++0x03
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line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register"
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bitfld.long 0x00 31. "CSTRT,Software Source Counter Start Enable" "0: Counter start is disable by the GTSTR register,1: Counter start is enable by the GTSTR register"
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hexmask.long.word 0x00 20.--30. 1. "Reserved,These bits are read as 00000000000"
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newline
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bitfld.long 0x00 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Counter start is disable at the ELC_GPTD input,1: Counter start is enable at the ELC_GPTD input"
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bitfld.long 0x00 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Counter start is disable at the ELC_GPTC input,1: Counter start is enable at the ELC_GPTC input"
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bitfld.long 0x00 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Counter start is disable at the ELC_GPTB input,1: Counter start is enable at the ELC_GPTB input"
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bitfld.long 0x00 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Counter start is disable at the ELC_GPTA input,1: Counter start is enable at the ELC_GPTA input"
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bitfld.long 0x00 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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newline
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bitfld.long 0x00 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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group.long 0x14++0x03
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line.long 0x00 "GTPSR,General PWM Timer Stop Source Select Register"
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bitfld.long 0x00 31. "CSTOP,Software Source Counter Stop Enable" "0: Counter stop is disable by the GTSTP register,1: Counter stop is enable by the GTSTP register"
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hexmask.long.word 0x00 20.--30. 1. "Reserved,These bits are read as 00000000000"
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newline
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bitfld.long 0x00 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Counter stop is disable at the ELC_GPTD input,1: Counter stop is enable at the ELC_GPTD input"
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bitfld.long 0x00 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Counter stop is disable at the ELC_GPTC input,1: Counter stop is enable at the ELC_GPTC input"
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newline
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bitfld.long 0x00 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Counter stop is disable at the ELC_GPTB input,1: Counter stop is enable at the ELC_GPTB input"
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bitfld.long 0x00 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Counter stop is disable at the ELC_GPTA input,1: Counter stop is enable at the ELC_GPTA input"
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bitfld.long 0x00 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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newline
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bitfld.long 0x00 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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newline
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bitfld.long 0x00 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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newline
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bitfld.long 0x00 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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group.long 0x18++0x03
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line.long 0x00 "GTCSR,General PWM Timer Clear Source Select Register"
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bitfld.long 0x00 31. "CCLR,Software Source Counter Clear Enable" "0: Counter clear is disable by the GTCLR register,1: Counter clear is enable by the GTCLR register"
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hexmask.long.word 0x00 20.--30. 1. "Reserved,These bits are read as 00000000000"
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newline
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bitfld.long 0x00 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Counter clear is disable at the ELC_GPTD input,1: Counter clear is enable at the ELC_GPTD input"
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bitfld.long 0x00 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Counter clear is disable at the ELC_GPTC input,1: Counter clear is enable at the ELC_GPTC input"
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newline
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bitfld.long 0x00 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Counter clear is disable at the ELC_GPTB input,1: Counter clear is enable at the ELC_GPTB input"
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bitfld.long 0x00 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Counter clear is disable at the ELC_GPTA input,1: Counter clear is enable at the ELC_GPTA input"
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newline
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bitfld.long 0x00 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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newline
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bitfld.long 0x00 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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newline
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bitfld.long 0x00 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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newline
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bitfld.long 0x00 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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group.long 0x1C++0x03
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line.long 0x00 "GTUPSR,General PWM Timer Up Count Source Select Register"
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bitfld.long 0x00 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Counter count up is disable at the ELC_GPTD..,1: Counter count up is enable at the ELC_GPTD.."
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bitfld.long 0x00 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Counter count up is disable at the ELC_GPTC..,1: Counter count up is enable at the ELC_GPTC.."
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newline
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bitfld.long 0x00 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Counter count up is disable at the ELC_GPTB..,1: Counter count up is enable at the ELC_GPTB.."
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bitfld.long 0x00 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Counter count up is disable at the ELC_GPTA..,1: Counter count up is enable at the ELC_GPTA.."
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newline
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bitfld.long 0x00 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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newline
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bitfld.long 0x00 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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bitfld.long 0x00 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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newline
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bitfld.long 0x00 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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newline
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bitfld.long 0x00 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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bitfld.long 0x00 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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newline
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bitfld.long 0x00 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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newline
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bitfld.long 0x00 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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group.long 0x20++0x03
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line.long 0x00 "GTDNSR,General PWM Timer Down Count Source Select Register"
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bitfld.long 0x00 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Counter count down is disable at the ELC_GPTD..,1: Counter count down is enable at the ELC_GPTD.."
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bitfld.long 0x00 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Counter count down is disable at the ELC_GPTC..,1: Counter count down is enable at the ELC_GPTC.."
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newline
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bitfld.long 0x00 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Counter count down is disable at the ELC_GPTB..,1: Counter count down is enable at the ELC_GPTB.."
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bitfld.long 0x00 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Counter count down is disable at the ELC_GPTA..,1: Counter count down is enable at the ELC_GPTA.."
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newline
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bitfld.long 0x00 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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newline
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bitfld.long 0x00 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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bitfld.long 0x00 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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newline
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bitfld.long 0x00 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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newline
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bitfld.long 0x00 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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bitfld.long 0x00 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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newline
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bitfld.long 0x00 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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newline
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bitfld.long 0x00 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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group.long 0x24++0x03
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line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A"
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bitfld.long 0x00 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the.."
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bitfld.long 0x00 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the.."
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newline
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bitfld.long 0x00 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the.."
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bitfld.long 0x00 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the.."
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bitfld.long 0x00 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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bitfld.long 0x00 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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newline
|
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bitfld.long 0x00 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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newline
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bitfld.long 0x00 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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bitfld.long 0x00 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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bitfld.long 0x00 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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newline
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bitfld.long 0x00 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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group.long 0x28++0x03
|
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line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B"
|
|
bitfld.long 0x00 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the.."
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bitfld.long 0x00 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the.."
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newline
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bitfld.long 0x00 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the.."
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bitfld.long 0x00 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the.."
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bitfld.long 0x00 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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group.long 0x2C++0x03
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line.long 0x00 "GTCR,General PWM Timer Control Register"
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bitfld.long 0x00 24.--26. "TPCS,Timer Prescaler Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64,4: PCLK/256,5: PCLK/1024,?..."
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bitfld.long 0x00 19.--23. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,2: Setting prohibited,3: Setting prohibited,4: Triangle-wave PWM mode 1 (16-bit transfer at..,5: Triangle-wave PWM mode 2 (16-bit transfer at..,6: Triangle-wave PWM mode 3 (32-bit transfer at..,7: Setting prohibited"
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hexmask.long.word 0x00 1.--15. 1. "Reserved,These bits are read as 000000000000000"
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bitfld.long 0x00 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed"
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group.long 0x30++0x03
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line.long 0x00 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register"
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bitfld.long 0x00 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.."
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bitfld.long 0x00 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x00 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,2: GTIOCB pin duty 0 percent,3: GTIOCB pin duty 100 percent"
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bitfld.long 0x00 20.--23. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.."
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bitfld.long 0x00 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x00 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,2: GTIOCA pin duty 0 percent,3: GTIOCA pin duty 100 percent"
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bitfld.long 0x00 1. "UDF,Forcible Count Direction Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x00 0. "UD,Count Direction Setting" "0: GTCNT counts down,1: GTCNT counts up"
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group.long 0x34++0x03
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line.long 0x00 "GTIOR,General PWM Timer I/O Control Register"
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bitfld.long 0x00 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64"
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bitfld.long 0x00 29. "NFBEN,Noise Filter B Enable" "0: The noise filter for the GTIOCB pin is disabled,1: The noise filter for the GTIOCB pin is enabled"
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bitfld.long 0x00 27.--28. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.long 0x00 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Output disable is prohibited,1: GTIOCB pin is set to Hi-Z when output disable..,2: GTIOCB pin is set to 0 when output disable is..,3: GTIOCB pin is set to 1 when output disable is.."
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bitfld.long 0x00 24. "OBE,GTIOCB Pin Output Enable" "0: Output is disabled,1: Output is enabled"
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bitfld.long 0x00 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: The GTIOCB pin output level at start/stop of..,1: The GTIOCB pin output level is retained at.."
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bitfld.long 0x00 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: The GTIOCB pin outputs low when counting is..,1: The GTIOCB pin outputs high when counting is.."
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bitfld.long 0x00 21. "Reserved,This bit is read as 0" "0,1"
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bitfld.long 0x00 16.--20. "GTIOB,GTIOCB Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High"
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bitfld.long 0x00 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64"
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bitfld.long 0x00 13. "NFAEN,Noise Filter A Enable" "0: The noise filter for the GTIOCA pin is disabled,1: The noise filter for the GTIOCA pin is enabled"
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bitfld.long 0x00 11.--12. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.long 0x00 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Output disable is prohibited,1: GTIOCA pin is set to Hi-Z when output disable..,2: GTIOCA pin is set to 0 when output disable is..,3: GTIOCA pin is set to 1 when output disable is.."
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bitfld.long 0x00 8. "OAE,GTIOCA Pin Output Enable" "0: Output is disabled,1: Output is enabled"
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bitfld.long 0x00 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: The GTIOCA pin output level at start/stop of..,1: The GTIOCA pin output level is retained at.."
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bitfld.long 0x00 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: The GTIOCA pin outputs low when counting is..,1: The GTIOCA pin outputs high when counting is.."
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bitfld.long 0x00 5. "Reserved,This bit is read as 0" "0,1"
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bitfld.long 0x00 0.--4. "GTIOA,GTIOCA Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High"
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group.long 0x38++0x03
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line.long 0x00 "GTINTAD,General PWM Timer Interrupt Output Setting Register"
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bitfld.long 0x00 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Same time output level low disable request is..,1: Same time output level low disable request is.."
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bitfld.long 0x00 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Same time output level high disable request..,1: Same time output level high disable request.."
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bitfld.long 0x00 26.--28. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 24.--25. "GRP,Output Disable Source Select" "0: Group A output disable request,1: Group B output disable request,?..."
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hexmask.long.tbyte 0x00 0.--23. 1. "Reserved,These bits are read as 000000000000000000000000"
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group.long 0x3C++0x03
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line.long 0x00 "GTST,General PWM Timer Status Register"
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rbitfld.long 0x00 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at..,1: GTIOCA pin and GTIOCB pin output 0 at the.."
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rbitfld.long 0x00 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at..,1: GTIOCA pin and GTIOCB pin output 1 at the.."
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bitfld.long 0x00 25.--28. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rbitfld.long 0x00 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated"
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hexmask.long.byte 0x00 16.--23. 1. "Reserved,These bits are read as 00000000"
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rbitfld.long 0x00 15. "GTCF,Count Direction Flag" "0: The GTCNT counter counts downward,1: The GTCNT counter counts upward"
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hexmask.long.byte 0x00 8.--14. 1. "Reserved,These bits are read as 0000000"
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bitfld.long 0x00 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred,1: An underflow (trough) has occurred"
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bitfld.long 0x00 6. "TCPFO,Overflow Flag" "0: No overflow (crest) has occurred,1: An overflow (crest) has occurred"
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bitfld.long 0x00 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated"
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bitfld.long 0x00 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated"
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bitfld.long 0x00 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated"
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bitfld.long 0x00 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated"
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bitfld.long 0x00 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.."
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bitfld.long 0x00 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.."
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group.long 0x40++0x03
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line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register"
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bitfld.long 0x00 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0" "0: no effect,1: Forcibly performs buffer transfer of GTCCRA.."
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bitfld.long 0x00 20.--21. "PR,GTPR Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTPBR --> GTPR),?..."
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bitfld.long 0x00 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRB <--> GTCCRE),2: Double buffer operation (GTCCRB <--> GTCCRE..,3: Double buffer operation (GTCCRB <--> GTCCRE.."
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bitfld.long 0x00 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRA <--> GTCCRC),2: Double buffer operation (GTCCRA <--> GTCCRC..,3: Double buffer operation (GTCCRA <--> GTCCRC.."
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bitfld.long 0x00 0.--1. "BD,BD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled,?..."
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group.long 0x48++0x03
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line.long 0x00 "GTCNT,General PWM Timer Counter"
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hexmask.long 0x00 0.--31. 1. "GTCNT,Counter"
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group.long 0x4C++0x03
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line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTCCRA,Compare Capture Register A"
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group.long 0x50++0x03
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line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTCCRB,Compare Capture Register B"
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group.long 0x54++0x03
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line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTCCRC,Compare Capture Register C"
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group.long 0x58++0x03
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line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTCCRE,Compare Capture Register E"
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group.long 0x5C++0x03
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line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTCCRD,Compare Capture Register D"
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group.long 0x60++0x03
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line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTCCRF,Compare Capture Register F"
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group.long 0x64++0x03
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line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTPR,Cycle Setting Register"
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group.long 0x68++0x03
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line.long 0x00 "GTPBR,General PWM Timer Cycle Setting Buffer Register"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTPBR,Cycle Setting Buffer Register"
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group.long 0x88++0x03
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line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register"
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hexmask.long 0x00 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000"
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bitfld.long 0x00 0. "TDE,Negative-Phase Waveform Setting" "0: GTCCRB is set without using GTDVU and GTDVD,1: GTDVU and GTDVD are used to set the compare.."
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group.long 0x8C++0x03
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line.long 0x00 "GTDVU,General PWM Timer Dead Time Value Register U"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.word 0x00 0.--15. 1. "GTDVU,Dead Time Value Register U"
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tree.end
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tree "GPT320"
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base ad:0x40078000
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group.long 0x00++0x03
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line.long 0x00 "GTWP,General PWM Timer Write-Protection Register"
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hexmask.long.word 0x00 16.--31. 1. "Reserved,These bits are read as 0000000000000000"
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hexmask.long.byte 0x00 8.--15. 1. "PRKEY,GTWP Key Code"
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hexmask.long.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
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bitfld.long 0x00 0. "WP,Register Write Disable" "0: Write to the register is enabled,1: Write to the register is disabled"
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group.long 0x04++0x03
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line.long 0x00 "GTSTR,General PWM Timer Software Start Register"
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hexmask.long 0x00 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000"
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bitfld.long 0x00 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT166.GTCNT counter starts (write) / Counter.."
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bitfld.long 0x00 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT165.GTCNT counter starts (write) / Counter.."
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bitfld.long 0x00 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT164.GTCNT counter starts (write) / Counter.."
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bitfld.long 0x00 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT163.GTCNT counter starts (write) / Counter.."
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bitfld.long 0x00 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT162.GTCNT counter starts (write) / Counter.."
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bitfld.long 0x00 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT161.GTCNT counter starts (write) / Counter.."
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bitfld.long 0x00 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT320.GTCNT counter starts (write) / Counter.."
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group.long 0x08++0x03
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line.long 0x00 "GTSTP,General PWM Timer Software Stop Register"
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hexmask.long 0x00 7.--31. 1. "Reserved,These bits are read as 1111111111111111111111111"
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bitfld.long 0x00 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT166.GTCNT counter stops (write) / Counter.."
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bitfld.long 0x00 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT165.GTCNT counter stops (write) / Counter.."
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bitfld.long 0x00 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT164.GTCNT counter stops (write) / Counter.."
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bitfld.long 0x00 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT163.GTCNT counter stops (write) / Counter.."
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bitfld.long 0x00 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT162.GTCNT counter stops (write) / Counter.."
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bitfld.long 0x00 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT161.GTCNT counter stops (write) / Counter.."
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bitfld.long 0x00 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT320.GTCNT counter stops (write) / Counter.."
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wgroup.long 0x0C++0x03
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line.long 0x00 "GTCLR,General PWM Timer Software Clear Register"
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hexmask.long 0x00 7.--31. 1. "Reserved,The write value should be 0000000000000000000000000"
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bitfld.long 0x00 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GPT166.GTCNT counter clears"
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bitfld.long 0x00 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GPT165.GTCNT counter clears"
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bitfld.long 0x00 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GPT164.GTCNT counter clears"
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bitfld.long 0x00 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GPT163.GTCNT counter clears"
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bitfld.long 0x00 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GPT162.GTCNT counter clears"
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bitfld.long 0x00 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GPT161.GTCNT counter clears"
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bitfld.long 0x00 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GPT320.GTCNT counter clears"
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group.long 0x10++0x03
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line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register"
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bitfld.long 0x00 31. "CSTRT,Software Source Counter Start Enable" "0: Counter start is disable by the GTSTR register,1: Counter start is enable by the GTSTR register"
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hexmask.long.word 0x00 20.--30. 1. "Reserved,These bits are read as 00000000000"
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bitfld.long 0x00 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Counter start is disable at the ELC_GPTD input,1: Counter start is enable at the ELC_GPTD input"
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bitfld.long 0x00 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Counter start is disable at the ELC_GPTC input,1: Counter start is enable at the ELC_GPTC input"
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bitfld.long 0x00 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Counter start is disable at the ELC_GPTB input,1: Counter start is enable at the ELC_GPTB input"
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bitfld.long 0x00 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Counter start is disable at the ELC_GPTA input,1: Counter start is enable at the ELC_GPTA input"
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bitfld.long 0x00 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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bitfld.long 0x00 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Counter start is disable at the falling edge..,1: Counter start is enable at the falling edge.."
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bitfld.long 0x00 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Counter start is disable at the rising edge..,1: Counter start is enable at the rising edge of.."
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group.long 0x14++0x03
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line.long 0x00 "GTPSR,General PWM Timer Stop Source Select Register"
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bitfld.long 0x00 31. "CSTOP,Software Source Counter Stop Enable" "0: Counter stop is disable by the GTSTP register,1: Counter stop is enable by the GTSTP register"
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hexmask.long.word 0x00 20.--30. 1. "Reserved,These bits are read as 00000000000"
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bitfld.long 0x00 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Counter stop is disable at the ELC_GPTD input,1: Counter stop is enable at the ELC_GPTD input"
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bitfld.long 0x00 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Counter stop is disable at the ELC_GPTC input,1: Counter stop is enable at the ELC_GPTC input"
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bitfld.long 0x00 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Counter stop is disable at the ELC_GPTB input,1: Counter stop is enable at the ELC_GPTB input"
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bitfld.long 0x00 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Counter stop is disable at the ELC_GPTA input,1: Counter stop is enable at the ELC_GPTA input"
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bitfld.long 0x00 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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bitfld.long 0x00 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Counter stop is disable at the falling edge..,1: Counter stop is enable at the falling edge of.."
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bitfld.long 0x00 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Counter stop is disable at the rising edge of..,1: Counter stop is enable at the rising edge of.."
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group.long 0x18++0x03
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line.long 0x00 "GTCSR,General PWM Timer Clear Source Select Register"
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bitfld.long 0x00 31. "CCLR,Software Source Counter Clear Enable" "0: Counter clear is disable by the GTCLR register,1: Counter clear is enable by the GTCLR register"
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hexmask.long.word 0x00 20.--30. 1. "Reserved,These bits are read as 00000000000"
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bitfld.long 0x00 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Counter clear is disable at the ELC_GPTD input,1: Counter clear is enable at the ELC_GPTD input"
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bitfld.long 0x00 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Counter clear is disable at the ELC_GPTC input,1: Counter clear is enable at the ELC_GPTC input"
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bitfld.long 0x00 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Counter clear is disable at the ELC_GPTB input,1: Counter clear is enable at the ELC_GPTB input"
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bitfld.long 0x00 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Counter clear is disable at the ELC_GPTA input,1: Counter clear is enable at the ELC_GPTA input"
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bitfld.long 0x00 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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bitfld.long 0x00 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Counter clear is disable at the falling edge..,1: Counter clear is enable at the falling edge.."
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bitfld.long 0x00 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Counter clear is disable at the rising edge..,1: Counter clear is enable at the rising edge of.."
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group.long 0x1C++0x03
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line.long 0x00 "GTUPSR,General PWM Timer Up Count Source Select Register"
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bitfld.long 0x00 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Counter count up is disable at the ELC_GPTD..,1: Counter count up is enable at the ELC_GPTD.."
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bitfld.long 0x00 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Counter count up is disable at the ELC_GPTC..,1: Counter count up is enable at the ELC_GPTC.."
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bitfld.long 0x00 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Counter count up is disable at the ELC_GPTB..,1: Counter count up is enable at the ELC_GPTB.."
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bitfld.long 0x00 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Counter count up is disable at the ELC_GPTA..,1: Counter count up is enable at the ELC_GPTA.."
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bitfld.long 0x00 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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bitfld.long 0x00 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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bitfld.long 0x00 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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bitfld.long 0x00 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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bitfld.long 0x00 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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bitfld.long 0x00 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Counter count up is disable at the falling..,1: Counter count up is enable at the falling.."
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bitfld.long 0x00 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Counter count up is disable at the rising..,1: Counter count up is enable at the rising edge.."
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group.long 0x20++0x03
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line.long 0x00 "GTDNSR,General PWM Timer Down Count Source Select Register"
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bitfld.long 0x00 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Counter count down is disable at the ELC_GPTD..,1: Counter count down is enable at the ELC_GPTD.."
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bitfld.long 0x00 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Counter count down is disable at the ELC_GPTC..,1: Counter count down is enable at the ELC_GPTC.."
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bitfld.long 0x00 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Counter count down is disable at the ELC_GPTB..,1: Counter count down is enable at the ELC_GPTB.."
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bitfld.long 0x00 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Counter count down is disable at the ELC_GPTA..,1: Counter count down is enable at the ELC_GPTA.."
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bitfld.long 0x00 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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bitfld.long 0x00 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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bitfld.long 0x00 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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bitfld.long 0x00 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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newline
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bitfld.long 0x00 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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newline
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bitfld.long 0x00 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Counter count down is disable at the falling..,1: Counter count down is enable at the falling.."
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bitfld.long 0x00 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Counter count down is disable at the rising..,1: Counter count down is enable at the rising.."
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group.long 0x24++0x03
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line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A"
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bitfld.long 0x00 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the.."
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bitfld.long 0x00 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the.."
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bitfld.long 0x00 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the.."
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bitfld.long 0x00 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the.."
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bitfld.long 0x00 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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bitfld.long 0x00 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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bitfld.long 0x00 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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bitfld.long 0x00 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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bitfld.long 0x00 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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bitfld.long 0x00 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the..,1: GTCCRA input capture is enable at the falling.."
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bitfld.long 0x00 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: GTCCRA input capture is disable at the rising..,1: GTCCRA input capture is enable at the rising.."
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group.long 0x28++0x03
|
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line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B"
|
|
bitfld.long 0x00 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the.."
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bitfld.long 0x00 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the.."
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bitfld.long 0x00 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the.."
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bitfld.long 0x00 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the.."
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bitfld.long 0x00 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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bitfld.long 0x00 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the..,1: GTCCRB input capture is enable at the falling.."
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bitfld.long 0x00 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: GTCCRB input capture is disable at the rising..,1: GTCCRB input capture is enable at the rising.."
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group.long 0x2C++0x03
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line.long 0x00 "GTCR,General PWM Timer Control Register"
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bitfld.long 0x00 24.--26. "TPCS,Timer Prescaler Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64,4: PCLK/256,5: PCLK/1024,?..."
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bitfld.long 0x00 19.--23. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,2: Setting prohibited,3: Setting prohibited,4: Triangle-wave PWM mode 1 (16-bit transfer at..,5: Triangle-wave PWM mode 2 (16-bit transfer at..,6: Triangle-wave PWM mode 3 (32-bit transfer at..,7: Setting prohibited"
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hexmask.long.word 0x00 1.--15. 1. "Reserved,These bits are read as 000000000000000"
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bitfld.long 0x00 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed"
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group.long 0x30++0x03
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line.long 0x00 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register"
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bitfld.long 0x00 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.."
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bitfld.long 0x00 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x00 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,2: GTIOCB pin duty 0 percent,3: GTIOCB pin duty 100 percent"
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bitfld.long 0x00 20.--23. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.."
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bitfld.long 0x00 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x00 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,2: GTIOCA pin duty 0 percent,3: GTIOCA pin duty 100 percent"
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bitfld.long 0x00 1. "UDF,Forcible Count Direction Setting" "0: Not forcibly set,1: Forcibly set"
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bitfld.long 0x00 0. "UD,Count Direction Setting" "0: GTCNT counts down,1: GTCNT counts up"
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group.long 0x34++0x03
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line.long 0x00 "GTIOR,General PWM Timer I/O Control Register"
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bitfld.long 0x00 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64"
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bitfld.long 0x00 29. "NFBEN,Noise Filter B Enable" "0: The noise filter for the GTIOCB pin is disabled,1: The noise filter for the GTIOCB pin is enabled"
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bitfld.long 0x00 27.--28. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.long 0x00 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Output disable is prohibited,1: GTIOCB pin is set to Hi-Z when output disable..,2: GTIOCB pin is set to 0 when output disable is..,3: GTIOCB pin is set to 1 when output disable is.."
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bitfld.long 0x00 24. "OBE,GTIOCB Pin Output Enable" "0: Output is disabled,1: Output is enabled"
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bitfld.long 0x00 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: The GTIOCB pin output level at start/stop of..,1: The GTIOCB pin output level is retained at.."
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bitfld.long 0x00 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: The GTIOCB pin outputs low when counting is..,1: The GTIOCB pin outputs high when counting is.."
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bitfld.long 0x00 21. "Reserved,This bit is read as 0" "0,1"
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bitfld.long 0x00 16.--20. "GTIOB,GTIOCB Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High"
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bitfld.long 0x00 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64"
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bitfld.long 0x00 13. "NFAEN,Noise Filter A Enable" "0: The noise filter for the GTIOCA pin is disabled,1: The noise filter for the GTIOCA pin is enabled"
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bitfld.long 0x00 11.--12. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.long 0x00 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Output disable is prohibited,1: GTIOCA pin is set to Hi-Z when output disable..,2: GTIOCA pin is set to 0 when output disable is..,3: GTIOCA pin is set to 1 when output disable is.."
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bitfld.long 0x00 8. "OAE,GTIOCA Pin Output Enable" "0: Output is disabled,1: Output is enabled"
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bitfld.long 0x00 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: The GTIOCA pin output level at start/stop of..,1: The GTIOCA pin output level is retained at.."
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bitfld.long 0x00 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: The GTIOCA pin outputs low when counting is..,1: The GTIOCA pin outputs high when counting is.."
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bitfld.long 0x00 5. "Reserved,This bit is read as 0" "0,1"
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bitfld.long 0x00 0.--4. "GTIOA,GTIOCA Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High"
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group.long 0x38++0x03
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line.long 0x00 "GTINTAD,General PWM Timer Interrupt Output Setting Register"
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bitfld.long 0x00 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Same time output level low disable request is..,1: Same time output level low disable request is.."
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bitfld.long 0x00 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Same time output level high disable request..,1: Same time output level high disable request.."
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bitfld.long 0x00 26.--28. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 24.--25. "GRP,Output Disable Source Select" "0: Group A output disable request,1: Group B output disable request,?..."
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hexmask.long.tbyte 0x00 0.--23. 1. "Reserved,These bits are read as 000000000000000000000000"
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group.long 0x3C++0x03
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line.long 0x00 "GTST,General PWM Timer Status Register"
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rbitfld.long 0x00 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at..,1: GTIOCA pin and GTIOCB pin output 0 at the.."
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rbitfld.long 0x00 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at..,1: GTIOCA pin and GTIOCB pin output 1 at the.."
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bitfld.long 0x00 25.--28. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rbitfld.long 0x00 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated"
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hexmask.long.byte 0x00 16.--23. 1. "Reserved,These bits are read as 00000000"
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rbitfld.long 0x00 15. "GTCF,Count Direction Flag" "0: The GTCNT counter counts downward,1: The GTCNT counter counts upward"
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hexmask.long.byte 0x00 8.--14. 1. "Reserved,These bits are read as 0000000"
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bitfld.long 0x00 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred,1: An underflow (trough) has occurred"
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bitfld.long 0x00 6. "TCPFO,Overflow Flag" "0: No overflow (crest) has occurred,1: An overflow (crest) has occurred"
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bitfld.long 0x00 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated"
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bitfld.long 0x00 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated"
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bitfld.long 0x00 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated"
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bitfld.long 0x00 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated"
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bitfld.long 0x00 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.."
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bitfld.long 0x00 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.."
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group.long 0x40++0x03
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line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register"
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bitfld.long 0x00 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0" "0: no effect,1: Forcibly performs buffer transfer of GTCCRA.."
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bitfld.long 0x00 20.--21. "PR,GTPR Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTPBR --> GTPR),?..."
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bitfld.long 0x00 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRB <--> GTCCRE),2: Double buffer operation (GTCCRB <--> GTCCRE..,3: Double buffer operation (GTCCRB <--> GTCCRE.."
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bitfld.long 0x00 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRA <--> GTCCRC),2: Double buffer operation (GTCCRA <--> GTCCRC..,3: Double buffer operation (GTCCRA <--> GTCCRC.."
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bitfld.long 0x00 0.--1. "BD,BD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Buffer operation is enabled,1: Buffer operation is disabled,?..."
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group.long 0x48++0x03
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line.long 0x00 "GTCNT,General PWM Timer Counter"
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hexmask.long 0x00 0.--31. 1. "GTCNT,Counter"
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group.long 0x4C++0x03
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line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A"
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hexmask.long 0x00 0.--31. 1. "GTCCRA,Compare Capture Register A"
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group.long 0x50++0x03
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line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B"
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hexmask.long 0x00 0.--31. 1. "GTCCRB,Compare Capture Register B"
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group.long 0x54++0x03
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line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C"
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hexmask.long 0x00 0.--31. 1. "GTCCRC,Compare Capture Register C"
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group.long 0x58++0x03
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line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E"
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hexmask.long 0x00 0.--31. 1. "GTCCRE,Compare Capture Register E"
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group.long 0x5C++0x03
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line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D"
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hexmask.long 0x00 0.--31. 1. "GTCCRD,Compare Capture Register D"
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group.long 0x60++0x03
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line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F"
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hexmask.long 0x00 0.--31. 1. "GTCCRF,Compare Capture Register F"
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group.long 0x64++0x03
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line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register"
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hexmask.long 0x00 0.--31. 1. "GTPR,Cycle Setting Register"
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group.long 0x68++0x03
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line.long 0x00 "GTPBR,General PWM Timer Cycle Setting Buffer Register"
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hexmask.long 0x00 0.--31. 1. "GTPBR,Cycle Setting Buffer Register"
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group.long 0x88++0x03
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line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register"
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hexmask.long 0x00 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000"
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bitfld.long 0x00 0. "TDE,Negative-Phase Waveform Setting" "0: GTCCRB is set without using GTDVU and GTDVD,1: GTDVU and GTDVD are used to set the compare.."
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group.long 0x8C++0x03
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line.long 0x00 "GTDVU,General PWM Timer Dead Time Value Register U"
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hexmask.long 0x00 0.--31. 1. "GTDVU,Dead Time Value Register U"
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tree.end
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tree.end
|
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tree "ICU (Interrupt Controller)"
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base ad:0x40006000
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repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 )
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|
group.byte ($2+0x00)++0x00
|
|
line.byte 0x00 "IRQCR$1,IRQ Control Register"
|
|
bitfld.byte 0x00 7. "FLTEN,IRQ Digital Filter Enable" "0: Digital filter is disabled,1: Digital filter is enabled"
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|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
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newline
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bitfld.byte 0x00 4.--5. "FCLKSEL,IRQi Digital Filter Sampling Clock Select" "0: PCLKB,1: PCLKB/8,2: PCLKB/32,3: PCLKB/64"
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bitfld.byte 0x00 2.--3. "Reserved,These bits are read as 00" "0,1,2,3"
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newline
|
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bitfld.byte 0x00 0.--1. "IRQMD,IRQ Detection Sense Select" "0: Falling edge,1: Rising edge,2: Rising and falling edges,3: Low level"
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|
repeat.end
|
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rgroup.word 0x140++0x01
|
|
line.word 0x00 "NMISR,Non-Maskable Interrupt Status Register"
|
|
bitfld.word 0x00 13.--15. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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|
bitfld.word 0x00 12. "SPEST,CPU Stack Pointer Monitor Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
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bitfld.word 0x00 11. "BUSMST,MPU Bus Master Error Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
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bitfld.word 0x00 10. "BUSSST,MPU Bus Slave Error Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
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bitfld.word 0x00 9. "RECCST,SRAM ECC Error Interrupt Status Flag" "0: Interrupt not requested,1: Interrupt requested"
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|
bitfld.word 0x00 8. "RPEST,RAM Parity Error Interrupt Status Flag" "0: RAM Parity Error interrupt is not requested,1: RAM Parity Error interrupt is requested"
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bitfld.word 0x00 7. "NMIST,NMI Status Flag" "0: NMI pin interrupt is not requested,1: NMI pin interrupt is requested"
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|
bitfld.word 0x00 6. "OSTST,Oscillation Stop Detection Interrupt Status Flag" "0: Main Oscillation stop detection interrupt is..,1: Main Oscillation stop detection interrupt is.."
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|
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bitfld.word 0x00 4.--5. "Reserved,These bits are read as 00" "0,1,2,3"
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|
bitfld.word 0x00 3. "LVD2ST,Voltage-Monitoring 2 Interrupt Status Flag" "0: Voltage-monitoring 2 interrupt is not requested,1: Voltage-monitoring 2 interrupt is requested"
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newline
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bitfld.word 0x00 2. "LVD1ST,Voltage-Monitoring 1 Interrupt Status Flag" "0: Voltage-monitoring 1 interrupt is not requested,1: Voltage-monitoring 1 interrupt is requested"
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bitfld.word 0x00 1. "WDTST,WDT Underflow/Refresh Error Status Flag" "0: WDT underflow/refresh error interrupt is not..,1: WDT underflow/refresh error interrupt is.."
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|
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bitfld.word 0x00 0. "IWDTST,IWDT Underflow/Refresh Error Status Flag" "0: IWDT underflow/refresh error interrupt is not..,1: IWDT underflow/refresh error interrupt is.."
|
|
group.word 0x120++0x01
|
|
line.word 0x00 "NMIER,Non-Maskable Interrupt Enable Register"
|
|
bitfld.word 0x00 13.--15. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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|
bitfld.word 0x00 12. "SPEEN,CPU Stack Pointer Monitor Interrupt Enable" "0: CPU Stack Pointer Monitor interrupt is disabled,1: CPU Stack Pointer Monitor interrupt is enabled"
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|
newline
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bitfld.word 0x00 11. "BUSMEN,MPU Bus Master Error Interrupt Enable" "0: MPU Bus Master Error interrupt is disabled,1: MPU Bus Master Error interrupt is enabled"
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|
bitfld.word 0x00 10. "BUSSEN,MPU Bus Slave Error Interrupt Enable" "0: MPU Bus Slave Error interrupt is disabled,1: MPU Bus Slave Error interrupt is enabled"
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|
newline
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bitfld.word 0x00 9. "RECCEN,SRAM ECC Error Interrupt Enable" "0: SRAM ECC Error interrupt is disabled,1: SRAM ECC Error interrupt is enabled"
|
|
bitfld.word 0x00 8. "RPEEN,RAM Parity Error Interrupt Enable" "0: SRAM Parity Error interrupt is disabled,1: SRAM Parity Error interrupt is enabled"
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|
newline
|
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bitfld.word 0x00 7. "NMIEN,NMI Pin Interrupt Enable" "0: NMI pin interrupt is disabled,1: NMI pin interrupt is enabled"
|
|
bitfld.word 0x00 6. "OSTEN,Oscillation Stop Detection Interrupt Enable" "0: Main Oscillation stop detection interrupt is..,1: Main Oscillation stop detection interrupt is.."
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|
newline
|
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bitfld.word 0x00 4.--5. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 3. "LVD2EN,Voltage-Monitoring 2 Interrupt Enable" "0: Voltage-monitoring 2 interrupt is disabled,1: Voltage-monitoring 2 interrupt is enabled"
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|
newline
|
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bitfld.word 0x00 2. "LVD1EN,Voltage-Monitoring 1 Interrupt Enable" "0: Voltage-monitoring 1 interrupt is disabled,1: Voltage-monitoring 1 interrupt is enabled"
|
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bitfld.word 0x00 1. "WDTEN,WDT Underflow/Refresh Error Interrupt Enable" "0: WDT underflow/refresh error interrupt is..,1: WDT underflow/refresh error interrupt is.."
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|
newline
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bitfld.word 0x00 0. "IWDTEN,IWDT Underflow/Refresh Error Interrupt Enable" "0: IWDT underflow/refresh error interrupt is..,1: IWDT underflow/refresh error interrupt is.."
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|
group.word 0x130++0x01
|
|
line.word 0x00 "NMICLR,Non-Maskable Interrupt Status Clear Register"
|
|
bitfld.word 0x00 13.--15. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 12. "SPECLR,CPU Stack Pointer Monitor Interrupt Clear" "0: No effect,1: Clear the NMISR.SPEST flag"
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|
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bitfld.word 0x00 11. "BUSMCLR,MPU Bus Master Error Interrupt Clear" "0: No effect,1: Clear the NMISR.BUSMST flag"
|
|
bitfld.word 0x00 10. "BUSSCLR,MPU Bus Slave Error Interrupt Clear" "0: No effect,1: Clear the NMISR.BUSSST flag"
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|
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bitfld.word 0x00 9. "RECCCLR,SRAM ECC Error Interrupt Clear" "0: No effect,1: Clear the NMISR.RECCST flag"
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|
bitfld.word 0x00 8. "RPECLR,SRAM Parity Error Clear" "0: No effect,1: Clear the NMISR.RPEST flag"
|
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bitfld.word 0x00 7. "NMICLR,NMIST Clear" "0: No effect,1: Clear the NMISR.NMIST flag"
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|
bitfld.word 0x00 6. "OSTCLR,OSTST Clear" "0: No effect,1: Clear the NMISR.OSTST flag"
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|
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bitfld.word 0x00 4.--5. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.word 0x00 3. "LVD2CLR,LVD2ST Clear" "0: No effect,1: Clear the NMISR.LVD2ST flag"
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|
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bitfld.word 0x00 2. "LVD1CLR,LVD1ST Clear" "0: No effect,1: Clear the NMISR.LVD1ST flag"
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bitfld.word 0x00 1. "WDTCLR,WDTST Clear" "0: No effect,1: Clear the NMISR.WDTST flag"
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newline
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bitfld.word 0x00 0. "IWDTCLR,IWDTST Clear" "0: No effect,1: Clear the NMISR.IWDTST flag"
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group.byte 0x100++0x00
|
|
line.byte 0x00 "NMICR,NMI Pin Interrupt Control Register"
|
|
bitfld.byte 0x00 7. "NFLTEN,NMI Digital Filter Enable" "0: Digital filter is disabled,1: Digital filter is enabled"
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bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 4.--5. "NFCLKSEL,NMI Digital Filter Sampling Clock Select" "0: PCLKB,1: PCLKB/8,2: PCLKB/32,3: PCLKB/64"
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bitfld.byte 0x00 1.--3. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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|
newline
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bitfld.byte 0x00 0. "NMIMD,NMI Detection Set" "0: Falling edge,1: Rising edge"
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group.long 0x1A0++0x03
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line.long 0x00 "WUPEN,Wake Up Interrupt Enable Register"
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bitfld.long 0x00 31. "IIC0WUPEN,IIC0 address match interrupt S/W standby returns enable bit" "0: S/W standby returns by IIC0 address match..,1: S/W standby returns by IIC0 address match.."
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bitfld.long 0x00 30. "AGT1CBWUPEN,AGT1 compare match B interrupt S/W standby returns enable bit" "0: S/W standby returns by AGT1 compare match B..,1: S/W standby returns by AGT1 compare match B.."
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newline
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bitfld.long 0x00 29. "AGT1CAWUPEN,AGT1 compare match A interrupt S/W standby returns enable bit" "0: S/W standby returns by AGT1 compare match A..,1: S/W standby returns by AGT1 compare match A.."
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bitfld.long 0x00 28. "AGT1UDWUPEN,AGT1 underflow interrupt S/W standby returns enable bit" "0: S/W standby returns by AGT1 underflow..,1: S/W standby returns by AGT1 underflow.."
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newline
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bitfld.long 0x00 27. "USBFSWUPEN,USBFS interrupt S/W standby returns enable bit" "0: S/W standby returns by USBFS interrupt is..,1: S/W standby returns by USBFS interrupt is.."
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bitfld.long 0x00 26. "Reserved,This bit is read as 0" "0,1"
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bitfld.long 0x00 25. "RTCPRDWUPEN,RCT period interrupt S/W standby returns enable bit" "0: S/W standby returns by RTC period interrupt..,1: S/W standby returns by RTC period interrupt.."
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bitfld.long 0x00 24. "RTCALMWUPEN,RTC alarm interrupt S/W standby returns enable bit" "0: S/W standby returns by RTC alarm interrupt is..,1: S/W standby returns by RTC alarm interrupt is.."
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bitfld.long 0x00 23. "ACMPLP0WUPEN,ACMPLP0 interrupt S/W standby returns enable bit" "0: S/W standby returns by ACMPLP0 interrupt is..,1: S/W standby returns by ACMPLP0 interrupt is.."
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bitfld.long 0x00 20.--22. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 19. "LVD2WUPEN,LVD2 interrupt S/W standby returns enable bit" "0: S/W standby returns by LVD2 interrupt is..,1: S/W standby returns by LVD2 interrupt is.."
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bitfld.long 0x00 18. "LVD1WUPEN,LVD1 interrupt S/W standby returns enable bit" "0: S/W standby returns by LVD1 interrupt is..,1: S/W standby returns by LVD1 interrupt is.."
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bitfld.long 0x00 17. "KEYWUPEN,Key interrupt S/W standby returns enable bit" "0: S/W standby returns by KEY interrupt is..,1: S/W standby returns by KEY interrupt is enabled"
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bitfld.long 0x00 16. "IWDTWUPEN,IWDT interrupt S/W standby returns enable bit" "0: S/W standby returns by IWDT interrupt is..,1: S/W standby returns by IWDT interrupt is.."
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hexmask.long.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
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bitfld.long 0x00 7. "IRQWUPEN7,IRQ7 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ7 interrupt is..,1: S/W standby returns by IRQ7 interrupt is.."
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bitfld.long 0x00 6. "IRQWUPEN6,IRQ6 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ6 interrupt is..,1: S/W standby returns by IRQ6 interrupt is.."
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bitfld.long 0x00 5. "IRQWUPEN5,IRQ5 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ5 interrupt is..,1: S/W standby returns by IRQ5 interrupt is.."
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bitfld.long 0x00 4. "IRQWUPEN4,IRQ4 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ4 interrupt is..,1: S/W standby returns by IRQ4 interrupt is.."
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bitfld.long 0x00 3. "IRQWUPEN3,IRQ3 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ3 interrupt is..,1: S/W standby returns by IRQ3 interrupt is.."
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newline
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bitfld.long 0x00 2. "IRQWUPEN2,IRQ2 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ2 interrupt is..,1: S/W standby returns by IRQ2 interrupt is.."
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bitfld.long 0x00 1. "IRQWUPEN1,IRQ1 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ1 interrupt is..,1: S/W standby returns by IRQ1 interrupt is.."
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newline
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bitfld.long 0x00 0. "IRQWUPEN0,IRQ0 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ0 interrupt is..,1: S/W standby returns by IRQ0 interrupt is.."
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group.word 0x200++0x01
|
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line.word 0x00 "SELSR0,SYS Event Link Setting Register"
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hexmask.word.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
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hexmask.word.byte 0x00 0.--7. 1. "SELS,SYS Event Link Select"
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repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
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group.long ($2+0x300)++0x03
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line.long 0x00 "IELSR$1,ICU Event Link Setting Register"
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|
hexmask.long.byte 0x00 25.--31. 1. "Reserved,These bits are read as 0000000"
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bitfld.long 0x00 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled"
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|
newline
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hexmask.long.byte 0x00 17.--23. 1. "Reserved,These bits are read as 0000000"
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|
bitfld.long 0x00 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.."
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|
newline
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hexmask.long.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
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|
hexmask.long.byte 0x00 0.--7. 1. "IELS,ICU Event selection to NVICSet the number for the event signal to be linked"
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|
repeat.end
|
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repeat 16. (strings "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "30" "31" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
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group.long ($2+0x340)++0x03
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line.long 0x00 "IELSR$1,ICU Event Link Setting Register"
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hexmask.long.byte 0x00 25.--31. 1. "Reserved,These bits are read as 0000000"
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bitfld.long 0x00 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled"
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newline
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hexmask.long.byte 0x00 17.--23. 1. "Reserved,These bits are read as 0000000"
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bitfld.long 0x00 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.."
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|
newline
|
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hexmask.long.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
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|
hexmask.long.byte 0x00 0.--7. 1. "IELS,ICU Event selection to NVICSet the number for the event signal to be linked"
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repeat.end
|
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tree.end
|
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tree "IIC (Inter-Integrated Circuit)"
|
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tree "IIC0"
|
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base ad:0x40053000
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group.byte 0x00++0x00
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line.byte 0x00 "ICCR1,I2C Bus Control Register 1"
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bitfld.byte 0x00 7. "ICE,I2C Bus Interface Enable" "0: Disable (SCLn and SDAn pins in inactive state),1: Enable (SCLn and SDAn pins in active state)"
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bitfld.byte 0x00 6. "IICRST,I2C Bus Interface Internal ResetNote:If an internal reset is initiated using the IICRST bit for a bus hang-up occurred during communication with the master device in slave mode the states may become different between the slave device and the.." "0: Releases the RIIC reset or internal reset,1: Initiates the RIIC reset or internal reset"
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newline
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bitfld.byte 0x00 5. "CLO,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle,1: Outputs an extra SCL clock cycle"
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bitfld.byte 0x00 4. "SOWP,SCLO/SDAO Write Protect" "0: Bits SCLO and SDAO can be written,1: Bits SCLO and SDAO are protected"
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newline
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bitfld.byte 0x00 3. "SCLO,SCL Output Control/Monitor" "0: (Read)The RIIC has driven the SCLn pin low,1: (Read)The RIIC has released the SCLn pin"
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bitfld.byte 0x00 2. "SDAO,SDA Output Control/Monitor" "0: (Read)The RIIC has driven the SDAn pin low,1: (Read)The RIIC has released the SDAn pin./.."
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newline
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rbitfld.byte 0x00 1. "SCLI,SCL Line Monitor" "0: SCLn line is low,1: SCLn line is high"
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rbitfld.byte 0x00 0. "SDAI,SDA Line Monitor" "0: SDAn line is low,1: SDAn line is high"
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group.byte 0x01++0x00
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line.byte 0x00 "ICCR2,I2C Bus Control Register 2"
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rbitfld.byte 0x00 7. "BBSY,Bus Busy Detection Flag" "0: The I2C bus is released (bus free state),1: The I2C bus is occupied (bus busy state)"
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bitfld.byte 0x00 6. "MST,Master/Slave Mode" "0: Slave mode,1: Master mode"
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newline
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bitfld.byte 0x00 5. "TRS,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode"
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bitfld.byte 0x00 4. "Reserved,This bit is read as 0" "0,1"
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newline
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bitfld.byte 0x00 3. "SP,Stop Condition Issuance RequestNote: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state).Note: Do not set the SP bit to 1 while a restart condition is being issued" "0: Does not request to issue a stop condition,1: Requests to issue a stop condition"
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bitfld.byte 0x00 2. "RS,Restart Condition Issuance RequestNote: Do not set the RS bit to 1 while issuing a stop condition" "0: Does not request to issue a restart condition,1: Requests to issue a restart condition"
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newline
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bitfld.byte 0x00 1. "ST,Start Condition Issuance RequestSet the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)" "0: Does not request to issue a start condition,1: Requests to issue a start condition"
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bitfld.byte 0x00 0. "Reserved,This bit is read as 0" "0,1"
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group.byte 0x02++0x00
|
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line.byte 0x00 "ICMR1,I2C Bus Mode Register 1"
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bitfld.byte 0x00 7. "MTWP,MST/TRS Write Protect" "0: Disables writing to the MST and TRS bits in..,1: Enables writing to the MST and TRS bits in.."
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bitfld.byte 0x00 4.--6. "CKS,Internal Reference Clock (fIIC) Selection ( fIIC = PCLKB / 2^CKS )" "0: PCLKB/1 clock,1: PCLKB/2 clock,2: PCLKB/4 clock,3: PCLKB/8 clock,4: PCLKB/16 clock,5: PCLKB/32 clock,6: PCLKB/64 clock,7: PCLKB/128 clock"
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newline
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bitfld.byte 0x00 3. "BCWP,BC Write Protect(This bit is read as 1.)" "0: Enables a value to be written in the BC[2:0]..,1: Disables a value to be written in the BC[2:0].."
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bitfld.byte 0x00 0.--2. "BC,Bit Counter" "0: 9 bits,1: 2 bits,2: 3 bits,3: 4 bits,4: 5 bits,5: 6 bits,6: 7 bits,7: 8 bits"
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group.byte 0x03++0x00
|
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line.byte 0x00 "ICMR2,I2C Bus Mode Register 2"
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bitfld.byte 0x00 7. "DLCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (fIIC) is..,1: The internal reference clock divided by 2.."
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bitfld.byte 0x00 4.--6. "SDDL,SDA Output Delay Counter" "0: No output delay,1: 1 fIIC cycle (ICMR2.DLCS=0) / 1 or 2 fIIC..,2: 2 fIIC cycles (ICMR2.DLCS=0) / 3 or 4 fIIC..,3: 3 fIIC cycles (ICMR2.DLCS=0) / 5 or 6 fIIC..,4: 4 fIIC cycles (ICMR2.DLCS=0) / 7 or 8 fIIC..,5: 5 fIIC cycles (ICMR2.DLCS=0) / 9 or 10 fIIC..,6: 6 fIIC cycles (ICMR2.DLCS=0) / 11 or 12 fIIC..,7: 7 fIIC cycles (ICMR2.DLCS=0) / 13 or 14 fIIC.."
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|
newline
|
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bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
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|
bitfld.byte 0x00 2. "TMOH,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.."
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newline
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bitfld.byte 0x00 1. "TMOL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.."
|
|
bitfld.byte 0x00 0. "TMOS,Timeout Detection Time Selection" "0: Long mode is selected,1: Short mode is selected"
|
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group.byte 0x04++0x00
|
|
line.byte 0x00 "ICMR3,I2C Bus Mode Register 3"
|
|
bitfld.byte 0x00 7. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus is selected,1: The SMBus is selected"
|
|
bitfld.byte 0x00 6. "WAIT,WAITNote: When the value of the WAIT bit is to be read be sure to read the ICDRR beforehand" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle.."
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newline
|
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bitfld.byte 0x00 5. "RDRFS,RDRF Flag Set Timing Selection" "0: The RDRF flag is set at the rising edge of..,1: The RDRF flag is set at the rising edge of.."
|
|
bitfld.byte 0x00 4. "ACKWP,ACKBT Write Protect" "0: Modification of the ACKBT bit is disabled,1: Modification of the ACKBT bit is enabled"
|
|
newline
|
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bitfld.byte 0x00 3. "ACKBT,Transmit Acknowledge" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.."
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|
rbitfld.byte 0x00 2. "ACKBR,Receive Acknowledge" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.."
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newline
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bitfld.byte 0x00 0.--1. "NF,Noise Filter Stage Selection" "0: Noise of up to one IIC cycle is filtered out..,1: Noise of up to two IIC cycles is filtered out..,2: Noise of up to three IIC cycles is filtered..,3: Noise of up to four IIC cycles is filtered.."
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "ICFER,I2C Bus Function Enable Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "SCLE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit is used,1: An SCL synchronous circuit is used"
|
|
newline
|
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bitfld.byte 0x00 5. "NFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used,1: A digital noise filter circuit is used"
|
|
bitfld.byte 0x00 4. "NACKE,NACK Reception Transfer Suspension Enable" "0: Transfer operation is not suspended during..,1: Transfer operation is suspended during NACK.."
|
|
newline
|
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bitfld.byte 0x00 3. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection is disabled,1: Slave arbitration-lost detection is enabled"
|
|
bitfld.byte 0x00 2. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.."
|
|
newline
|
|
bitfld.byte 0x00 1. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection is disabled,1: Master arbitration-lost detection is enabled"
|
|
bitfld.byte 0x00 0. "TMOE,Timeout Function Enable" "0: The timeout function is disabled,1: The timeout function is enabled"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "ICSER,I2C Bus Status Enable Register"
|
|
bitfld.byte 0x00 7. "HOAE,Host Address Enable" "0: Host address detection is disabled,1: Host address detection is enabled"
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 5. "DIDE,Device-ID Address Detection Enable" "0: Device-ID address detection is disabled,1: Device-ID address detection is enabled"
|
|
bitfld.byte 0x00 4. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "GCAE,General Call Address Enable" "0: General call address detection is disabled,1: General call address detection is enabled"
|
|
bitfld.byte 0x00 2. "SAR2E,Slave Address Register 2 Enable" "0: Slave address in SARL2 and SARU2 is disabled,1: Slave address in SARL2 and SARU2 is enabled"
|
|
newline
|
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bitfld.byte 0x00 1. "SAR1E,Slave Address Register 1 Enable" "0: Slave address in SARL1 and SARU1 is disabled,1: Slave address in SARL1 and SARU1 is enabled"
|
|
bitfld.byte 0x00 0. "SAR0E,Slave Address Register 0 Enable" "0: Slave address in SARL0 and SARU0 is disabled,1: Slave address in SARL0 and SARU0 is enabled"
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "ICIER,I2C Bus Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. "TIE,Transmit Data Empty Interrupt Request Enable" "0: Transmit data empty interrupt request..,1: Transmit data empty interrupt request.."
|
|
bitfld.byte 0x00 6. "TEIE,Transmit End Interrupt Request Enable" "0: Transmit end interrupt request (IICn_TEI) is..,1: Transmit end interrupt request (IICn_TEI) is.."
|
|
newline
|
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bitfld.byte 0x00 5. "RIE,Receive Data Full Interrupt Request Enable" "0: Receive data full interrupt request..,1: Receive data full interrupt request.."
|
|
bitfld.byte 0x00 4. "NAKIE,NACK Reception Interrupt Request Enable" "0: NACK reception interrupt request (NAKI) is..,1: NACK reception interrupt request (NAKI) is.."
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|
newline
|
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bitfld.byte 0x00 3. "SPIE,Stop Condition Detection Interrupt Request Enable" "0: Stop condition detection interrupt request..,1: Stop condition detection interrupt request.."
|
|
bitfld.byte 0x00 2. "STIE,Start Condition Detection Interrupt Request Enable" "0: Start condition detection interrupt request..,1: Start condition detection interrupt request.."
|
|
newline
|
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bitfld.byte 0x00 1. "ALIE,Arbitration-Lost Interrupt Request Enable" "0: Arbitration-lost interrupt request (ALI) is..,1: Arbitration-lost interrupt request (ALI) is.."
|
|
bitfld.byte 0x00 0. "TMOIE,Timeout Interrupt Request Enable" "0: Timeout interrupt request (TMOI) is disabled,1: Timeout interrupt request (TMOI) is enabled"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ICSR1,I2C Bus Status Register 1"
|
|
bitfld.byte 0x00 7. "HOA,Host Address Detection Flag" "0: Host address is not detected,1: Host address is detected"
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 5. "DID,Device-ID Address Detection Flag" "0: Device-ID command is not detected,1: Device-ID command is detected"
|
|
bitfld.byte 0x00 4. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
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bitfld.byte 0x00 3. "GCA,General Call Address Detection Flag" "0: General call address is not detected,1: General call address is detected"
|
|
bitfld.byte 0x00 2. "AAS2,Slave Address 2 Detection Flag" "0: Slave address 2 is not detected,1: Slave address 2 is detected"
|
|
newline
|
|
bitfld.byte 0x00 1. "AAS1,Slave Address 1 Detection Flag" "0: Slave address 1 is not detected,1: Slave address 1 is detected"
|
|
bitfld.byte 0x00 0. "AAS0,Slave Address 0 Detection Flag" "0: Slave address 0 is not detected,1: Slave address 0 is detected"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "ICSR2,I2C Bus Status Register 2"
|
|
rbitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: ICDRT contains transmit data,1: ICDRT contains no transmit data"
|
|
bitfld.byte 0x00 6. "TEND,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted"
|
|
newline
|
|
bitfld.byte 0x00 5. "RDRF,Receive Data Full Flag" "0: ICDRR contains no receive data,1: ICDRR contains receive data"
|
|
bitfld.byte 0x00 4. "NACKF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected"
|
|
newline
|
|
bitfld.byte 0x00 3. "STOP,Stop Condition Detection Flag" "0: Stop condition is not detected,1: Stop condition is detected"
|
|
bitfld.byte 0x00 2. "START,Start Condition Detection Flag" "0: Start condition is not detected,1: Start condition is detected"
|
|
newline
|
|
bitfld.byte 0x00 1. "AL,Arbitration-Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost"
|
|
bitfld.byte 0x00 0. "TMOF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected"
|
|
repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 )
|
|
group.byte ($2+0x0A)++0x00
|
|
line.byte 0x00 "SARL$1,Slave Address Register L"
|
|
hexmask.byte 0x00 0.--7. 1. "SVA,A slave address is set.7-Bit Address = SVA[7:1] 10-Bit Address = { SVA9 SVA8 SVA[7:0] }"
|
|
repeat.end
|
|
repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 )
|
|
group.byte ($2+0x0B)++0x00
|
|
line.byte 0x00 "SARU$1,Slave Address Register U"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 2. "SVA9,10-Bit Address(bit9)" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "SVA8,10-Bit Address(bit8)" "0,1"
|
|
bitfld.byte 0x00 0. "FS,7-Bit/10-Bit Address Format Selection" "0: The 7-bit address format is selected,1: The 10-bit address format is selected"
|
|
repeat.end
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "ICBRL,I2C Bus Bit Rate Low-Level Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 111" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "BRL,Bit Rate Low-Level Period(Low-level period of SCL clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x11++0x00
|
|
line.byte 0x00 "ICBRH,I2C Bus Bit Rate High-Level Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 111" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "BRH,Bit Rate High-Level Period(High-level period of SCL clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "ICDRT,I2C Bus Transmit Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. "ICDRT,8-bit read-write register that stores transmit data"
|
|
rgroup.byte 0x13++0x00
|
|
line.byte 0x00 "ICDRR,I2C Bus Receive Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. "ICDRR,8-bit register that stores the received data"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "ICWUR,I2C Bus Wake Up Unit Register"
|
|
bitfld.byte 0x00 7. "WUE,Wake Up function Enable" "0: Wake-up function is disabled,1: Wake-up function is enabled"
|
|
bitfld.byte 0x00 6. "WUIE,Wake Up Interrupt Request Enable" "0: Wake Up Interrupt Request (WUI) is disabled,1: Wake Up Interrupt Request (WUI) is enabled"
|
|
newline
|
|
bitfld.byte 0x00 5. "WUF,Wake-Up Event Occurrence Flag" "0: Wake-Up event does not occur,1: Wake-Up event occur"
|
|
bitfld.byte 0x00 4. "WUACK,Asynchronous/Synchronous Operation State Flag" "0: State of synchronous operation,1: State of asynchronous operation"
|
|
newline
|
|
bitfld.byte 0x00 1.--3. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0. "WUAFA,Wake-Up Analog Filter Additional Selection" "0: Do not add the Wake Up analog filter,1: Add the Wake Up analog filter"
|
|
group.byte 0x17++0x00
|
|
line.byte 0x00 "ICWUR2,Reserved"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 11111" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.byte 0x00 2. "WUSYF,Wake-Up function Synchronous operation status Flag" "0: RIIC asynchronous circuit enable condition,1: RIIC synchronous circuit enable condition"
|
|
newline
|
|
rbitfld.byte 0x00 1. "WUASYF,Wake-Up function Asynchronous operation status Flag" "0: RIIC synchronous circuit enable condition,1: RIIC asynchronous circuit enable condition"
|
|
bitfld.byte 0x00 0. "WUSEN,Wake-Up function Synchronous Enable" "0: RIIC asynchronous circuit enable,1: RIIC synchronous circuit enable"
|
|
tree.end
|
|
tree "IIC1"
|
|
base ad:0x40053100
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "ICCR1,I2C Bus Control Register 1"
|
|
bitfld.byte 0x00 7. "ICE,I2C Bus Interface Enable" "0: Disable (SCLn and SDAn pins in inactive state),1: Enable (SCLn and SDAn pins in active state)"
|
|
bitfld.byte 0x00 6. "IICRST,I2C Bus Interface Internal ResetNote:If an internal reset is initiated using the IICRST bit for a bus hang-up occurred during communication with the master device in slave mode the states may become different between the slave device and the.." "0: Releases the RIIC reset or internal reset,1: Initiates the RIIC reset or internal reset"
|
|
newline
|
|
bitfld.byte 0x00 5. "CLO,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle,1: Outputs an extra SCL clock cycle"
|
|
bitfld.byte 0x00 4. "SOWP,SCLO/SDAO Write Protect" "0: Bits SCLO and SDAO can be written,1: Bits SCLO and SDAO are protected"
|
|
newline
|
|
bitfld.byte 0x00 3. "SCLO,SCL Output Control/Monitor" "0: (Read)The RIIC has driven the SCLn pin low,1: (Read)The RIIC has released the SCLn pin"
|
|
bitfld.byte 0x00 2. "SDAO,SDA Output Control/Monitor" "0: (Read)The RIIC has driven the SDAn pin low,1: (Read)The RIIC has released the SDAn pin./.."
|
|
newline
|
|
rbitfld.byte 0x00 1. "SCLI,SCL Line Monitor" "0: SCLn line is low,1: SCLn line is high"
|
|
rbitfld.byte 0x00 0. "SDAI,SDA Line Monitor" "0: SDAn line is low,1: SDAn line is high"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "ICCR2,I2C Bus Control Register 2"
|
|
rbitfld.byte 0x00 7. "BBSY,Bus Busy Detection Flag" "0: The I2C bus is released (bus free state),1: The I2C bus is occupied (bus busy state)"
|
|
bitfld.byte 0x00 6. "MST,Master/Slave Mode" "0: Slave mode,1: Master mode"
|
|
newline
|
|
bitfld.byte 0x00 5. "TRS,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode"
|
|
bitfld.byte 0x00 4. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "SP,Stop Condition Issuance RequestNote: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state).Note: Do not set the SP bit to 1 while a restart condition is being issued" "0: Does not request to issue a stop condition,1: Requests to issue a stop condition"
|
|
bitfld.byte 0x00 2. "RS,Restart Condition Issuance RequestNote: Do not set the RS bit to 1 while issuing a stop condition" "0: Does not request to issue a restart condition,1: Requests to issue a restart condition"
|
|
newline
|
|
bitfld.byte 0x00 1. "ST,Start Condition Issuance RequestSet the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)" "0: Does not request to issue a start condition,1: Requests to issue a start condition"
|
|
bitfld.byte 0x00 0. "Reserved,This bit is read as 0" "0,1"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "ICMR1,I2C Bus Mode Register 1"
|
|
bitfld.byte 0x00 7. "MTWP,MST/TRS Write Protect" "0: Disables writing to the MST and TRS bits in..,1: Enables writing to the MST and TRS bits in.."
|
|
bitfld.byte 0x00 4.--6. "CKS,Internal Reference Clock (fIIC) Selection ( fIIC = PCLKB / 2^CKS )" "0: PCLKB/1 clock,1: PCLKB/2 clock,2: PCLKB/4 clock,3: PCLKB/8 clock,4: PCLKB/16 clock,5: PCLKB/32 clock,6: PCLKB/64 clock,7: PCLKB/128 clock"
|
|
newline
|
|
bitfld.byte 0x00 3. "BCWP,BC Write Protect(This bit is read as 1.)" "0: Enables a value to be written in the BC[2:0]..,1: Disables a value to be written in the BC[2:0].."
|
|
bitfld.byte 0x00 0.--2. "BC,Bit Counter" "0: 9 bits,1: 2 bits,2: 3 bits,3: 4 bits,4: 5 bits,5: 6 bits,6: 7 bits,7: 8 bits"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "ICMR2,I2C Bus Mode Register 2"
|
|
bitfld.byte 0x00 7. "DLCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (fIIC) is..,1: The internal reference clock divided by 2.."
|
|
bitfld.byte 0x00 4.--6. "SDDL,SDA Output Delay Counter" "0: No output delay,1: 1 fIIC cycle (ICMR2.DLCS=0) / 1 or 2 fIIC..,2: 2 fIIC cycles (ICMR2.DLCS=0) / 3 or 4 fIIC..,3: 3 fIIC cycles (ICMR2.DLCS=0) / 5 or 6 fIIC..,4: 4 fIIC cycles (ICMR2.DLCS=0) / 7 or 8 fIIC..,5: 5 fIIC cycles (ICMR2.DLCS=0) / 9 or 10 fIIC..,6: 6 fIIC cycles (ICMR2.DLCS=0) / 11 or 12 fIIC..,7: 7 fIIC cycles (ICMR2.DLCS=0) / 13 or 14 fIIC.."
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "TMOH,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.."
|
|
newline
|
|
bitfld.byte 0x00 1. "TMOL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.."
|
|
bitfld.byte 0x00 0. "TMOS,Timeout Detection Time Selection" "0: Long mode is selected,1: Short mode is selected"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ICMR3,I2C Bus Mode Register 3"
|
|
bitfld.byte 0x00 7. "SMBE,SMBus/I2C Bus Selection" "0: The I2C bus is selected,1: The SMBus is selected"
|
|
bitfld.byte 0x00 6. "WAIT,WAITNote: When the value of the WAIT bit is to be read be sure to read the ICDRR beforehand" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle.."
|
|
newline
|
|
bitfld.byte 0x00 5. "RDRFS,RDRF Flag Set Timing Selection" "0: The RDRF flag is set at the rising edge of..,1: The RDRF flag is set at the rising edge of.."
|
|
bitfld.byte 0x00 4. "ACKWP,ACKBT Write Protect" "0: Modification of the ACKBT bit is disabled,1: Modification of the ACKBT bit is enabled"
|
|
newline
|
|
bitfld.byte 0x00 3. "ACKBT,Transmit Acknowledge" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.."
|
|
rbitfld.byte 0x00 2. "ACKBR,Receive Acknowledge" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.."
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "NF,Noise Filter Stage Selection" "0: Noise of up to one IIC cycle is filtered out..,1: Noise of up to two IIC cycles is filtered out..,2: Noise of up to three IIC cycles is filtered..,3: Noise of up to four IIC cycles is filtered.."
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "ICFER,I2C Bus Function Enable Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "SCLE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit is used,1: An SCL synchronous circuit is used"
|
|
newline
|
|
bitfld.byte 0x00 5. "NFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used,1: A digital noise filter circuit is used"
|
|
bitfld.byte 0x00 4. "NACKE,NACK Reception Transfer Suspension Enable" "0: Transfer operation is not suspended during..,1: Transfer operation is suspended during NACK.."
|
|
newline
|
|
bitfld.byte 0x00 3. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection is disabled,1: Slave arbitration-lost detection is enabled"
|
|
bitfld.byte 0x00 2. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.."
|
|
newline
|
|
bitfld.byte 0x00 1. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection is disabled,1: Master arbitration-lost detection is enabled"
|
|
bitfld.byte 0x00 0. "TMOE,Timeout Function Enable" "0: The timeout function is disabled,1: The timeout function is enabled"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "ICSER,I2C Bus Status Enable Register"
|
|
bitfld.byte 0x00 7. "HOAE,Host Address Enable" "0: Host address detection is disabled,1: Host address detection is enabled"
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 5. "DIDE,Device-ID Address Detection Enable" "0: Device-ID address detection is disabled,1: Device-ID address detection is enabled"
|
|
bitfld.byte 0x00 4. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "GCAE,General Call Address Enable" "0: General call address detection is disabled,1: General call address detection is enabled"
|
|
bitfld.byte 0x00 2. "SAR2E,Slave Address Register 2 Enable" "0: Slave address in SARL2 and SARU2 is disabled,1: Slave address in SARL2 and SARU2 is enabled"
|
|
newline
|
|
bitfld.byte 0x00 1. "SAR1E,Slave Address Register 1 Enable" "0: Slave address in SARL1 and SARU1 is disabled,1: Slave address in SARL1 and SARU1 is enabled"
|
|
bitfld.byte 0x00 0. "SAR0E,Slave Address Register 0 Enable" "0: Slave address in SARL0 and SARU0 is disabled,1: Slave address in SARL0 and SARU0 is enabled"
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "ICIER,I2C Bus Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. "TIE,Transmit Data Empty Interrupt Request Enable" "0: Transmit data empty interrupt request..,1: Transmit data empty interrupt request.."
|
|
bitfld.byte 0x00 6. "TEIE,Transmit End Interrupt Request Enable" "0: Transmit end interrupt request (IICn_TEI) is..,1: Transmit end interrupt request (IICn_TEI) is.."
|
|
newline
|
|
bitfld.byte 0x00 5. "RIE,Receive Data Full Interrupt Request Enable" "0: Receive data full interrupt request..,1: Receive data full interrupt request.."
|
|
bitfld.byte 0x00 4. "NAKIE,NACK Reception Interrupt Request Enable" "0: NACK reception interrupt request (NAKI) is..,1: NACK reception interrupt request (NAKI) is.."
|
|
newline
|
|
bitfld.byte 0x00 3. "SPIE,Stop Condition Detection Interrupt Request Enable" "0: Stop condition detection interrupt request..,1: Stop condition detection interrupt request.."
|
|
bitfld.byte 0x00 2. "STIE,Start Condition Detection Interrupt Request Enable" "0: Start condition detection interrupt request..,1: Start condition detection interrupt request.."
|
|
newline
|
|
bitfld.byte 0x00 1. "ALIE,Arbitration-Lost Interrupt Request Enable" "0: Arbitration-lost interrupt request (ALI) is..,1: Arbitration-lost interrupt request (ALI) is.."
|
|
bitfld.byte 0x00 0. "TMOIE,Timeout Interrupt Request Enable" "0: Timeout interrupt request (TMOI) is disabled,1: Timeout interrupt request (TMOI) is enabled"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ICSR1,I2C Bus Status Register 1"
|
|
bitfld.byte 0x00 7. "HOA,Host Address Detection Flag" "0: Host address is not detected,1: Host address is detected"
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 5. "DID,Device-ID Address Detection Flag" "0: Device-ID command is not detected,1: Device-ID command is detected"
|
|
bitfld.byte 0x00 4. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "GCA,General Call Address Detection Flag" "0: General call address is not detected,1: General call address is detected"
|
|
bitfld.byte 0x00 2. "AAS2,Slave Address 2 Detection Flag" "0: Slave address 2 is not detected,1: Slave address 2 is detected"
|
|
newline
|
|
bitfld.byte 0x00 1. "AAS1,Slave Address 1 Detection Flag" "0: Slave address 1 is not detected,1: Slave address 1 is detected"
|
|
bitfld.byte 0x00 0. "AAS0,Slave Address 0 Detection Flag" "0: Slave address 0 is not detected,1: Slave address 0 is detected"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "ICSR2,I2C Bus Status Register 2"
|
|
rbitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: ICDRT contains transmit data,1: ICDRT contains no transmit data"
|
|
bitfld.byte 0x00 6. "TEND,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted"
|
|
newline
|
|
bitfld.byte 0x00 5. "RDRF,Receive Data Full Flag" "0: ICDRR contains no receive data,1: ICDRR contains receive data"
|
|
bitfld.byte 0x00 4. "NACKF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected"
|
|
newline
|
|
bitfld.byte 0x00 3. "STOP,Stop Condition Detection Flag" "0: Stop condition is not detected,1: Stop condition is detected"
|
|
bitfld.byte 0x00 2. "START,Start Condition Detection Flag" "0: Start condition is not detected,1: Start condition is detected"
|
|
newline
|
|
bitfld.byte 0x00 1. "AL,Arbitration-Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost"
|
|
bitfld.byte 0x00 0. "TMOF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected"
|
|
repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 )
|
|
group.byte ($2+0x0A)++0x00
|
|
line.byte 0x00 "SARL$1,Slave Address Register L"
|
|
hexmask.byte 0x00 0.--7. 1. "SVA,A slave address is set.7-Bit Address = SVA[7:1] 10-Bit Address = { SVA9 SVA8 SVA[7:0] }"
|
|
repeat.end
|
|
repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 )
|
|
group.byte ($2+0x0B)++0x00
|
|
line.byte 0x00 "SARU$1,Slave Address Register U"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 2. "SVA9,10-Bit Address(bit9)" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "SVA8,10-Bit Address(bit8)" "0,1"
|
|
bitfld.byte 0x00 0. "FS,7-Bit/10-Bit Address Format Selection" "0: The 7-bit address format is selected,1: The 10-bit address format is selected"
|
|
repeat.end
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "ICBRL,I2C Bus Bit Rate Low-Level Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 111" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "BRL,Bit Rate Low-Level Period(Low-level period of SCL clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x11++0x00
|
|
line.byte 0x00 "ICBRH,I2C Bus Bit Rate High-Level Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 111" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "BRH,Bit Rate High-Level Period(High-level period of SCL clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "ICDRT,I2C Bus Transmit Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. "ICDRT,8-bit read-write register that stores transmit data"
|
|
rgroup.byte 0x13++0x00
|
|
line.byte 0x00 "ICDRR,I2C Bus Receive Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. "ICDRR,8-bit register that stores the received data"
|
|
tree.end
|
|
tree.end
|
|
tree "IWDT (Independent Watchdog Timer)"
|
|
base ad:0x40044400
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "IWDTRR,IWDT Refresh Register"
|
|
hexmask.byte 0x00 0.--7. 1. "IWDTRR,The counter is refreshed by writing 0x00 and then writing 0xFF to this register"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "IWDTSR,IWDT Status Register"
|
|
bitfld.word 0x00 15. "REFEF,Refresh Error Flag" "0: Refresh error not occurred,1: Refresh error occurred"
|
|
bitfld.word 0x00 14. "UNDFF,Underflow Flag" "0: Underflow not occurred,1: Underflow occurred"
|
|
hexmask.word 0x00 0.--13. 1. "CNTVAL,Counter ValueValue counted by the counter"
|
|
tree.end
|
|
tree "KINT (Key Interrupt Function)"
|
|
base ad:0x40080000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "KRCTL,KEY Return Control Register"
|
|
bitfld.byte 0x00 7. "KRMD,Usage of Key Interrupt Flags(KR0 to KR7)" "0: Do not use key interrupt flags,1: Use key interrupt flags"
|
|
bitfld.byte 0x00 1.--6. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0. "KREG,Detection Edge Selection (KRF0 to KRF7)" "0: Falling edge,1: Rising edge"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "KRF,KEY Return Flag Register"
|
|
bitfld.byte 0x00 7. "KRF7,Key interrupt flag 7" "0: No interrupt detected,1: Interrupt detected"
|
|
bitfld.byte 0x00 6. "KRF6,Key interrupt flag 6" "0: No interrupt detected,1: Interrupt detected"
|
|
bitfld.byte 0x00 5. "KRF5,Key interrupt flag 5" "0: No interrupt detected,1: Interrupt detected"
|
|
newline
|
|
bitfld.byte 0x00 4. "KRF4,Key interrupt flag 4" "0: No interrupt detected,1: Interrupt detected"
|
|
bitfld.byte 0x00 3. "KRF3,Key interrupt flag 3" "0: No interrupt detected,1: Interrupt detected"
|
|
bitfld.byte 0x00 2. "KRF2,Key interrupt flag 2" "0: No interrupt detected,1: Interrupt detected"
|
|
newline
|
|
bitfld.byte 0x00 1. "KRF1,Key interrupt flag 1" "0: No interrupt detected,1: Interrupt detected"
|
|
bitfld.byte 0x00 0. "KRF0,Key interrupt flag 0" "0: No interrupt detected,1: Interrupt detected"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "KRM,KEY Return Mode Register"
|
|
bitfld.byte 0x00 7. "KRM7,Key interrupt mode control 7" "0: Does not detect key interrupt signal,1: Detect key interrupt signal"
|
|
bitfld.byte 0x00 6. "KRM6,Key interrupt mode control 6" "0: Does not detect key interrupt signal,1: Detect key interrupt signal"
|
|
bitfld.byte 0x00 5. "KRM5,Key interrupt mode control 5" "0: Does not detect key interrupt signal,1: Detect key interrupt signal"
|
|
newline
|
|
bitfld.byte 0x00 4. "KRM4,Key interrupt mode control 4" "0: Does not detect key interrupt signal,1: Detect key interrupt signal"
|
|
bitfld.byte 0x00 3. "KRM3,Key interrupt mode control 3" "0: Does not detect key interrupt signal,1: Detect key interrupt signal"
|
|
bitfld.byte 0x00 2. "KRM2,Key interrupt mode control 2" "0: Does not detect key interrupt signal,1: Detect key interrupt signal"
|
|
newline
|
|
bitfld.byte 0x00 1. "KRM1,Key interrupt mode control 1" "0: Does not detect key interrupt signal,1: Detect key interrupt signal"
|
|
bitfld.byte 0x00 0. "KRM0,Key interrupt mode control 0" "0: Does not detect key interrupt signal,1: Detect key interrupt signal"
|
|
tree.end
|
|
tree "MMF (Memory Mirror Function)"
|
|
base ad:0x40001000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MMSFR,MemMirror Special Function Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "KEY,MMSFR Key Code"
|
|
bitfld.long 0x00 23. "Reserved,This bit is read as 0" "0,1"
|
|
hexmask.long.word 0x00 7.--22. 1. "MEMMIRADDR,Specifies the memory mirror address.NOTE: A value cannot be set in the low-order 7 bits"
|
|
hexmask.long.byte 0x00 0.--6. 1. "Reserved,These bits are read as 0000000"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MMEN,MemMirror Enable Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "KEY,MMEN Key Code"
|
|
hexmask.long.tbyte 0x00 1.--23. 1. "Reserved,These bits are read as 00000000000000000000000"
|
|
bitfld.long 0x00 0. "EN,Memory Mirror Function Enable" "0: Memory Mirror Function is disabled,1: Memory Mirror Function is enabled"
|
|
tree.end
|
|
tree "MMPU (Bus Master MPU)"
|
|
base ad:0x40000000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "MMPUCTLA,Bus Master MPU Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored"
|
|
bitfld.word 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 1. "OAD,Operation After Detection" "0: Non-maskable interrupt,1: Internal reset"
|
|
bitfld.word 0x00 0. "ENABLE,Master Group Enable" "0: Master Group A disabled,1: Master Group A enabled"
|
|
group.word 0x102++0x01
|
|
line.word 0x00 "MMPUPTA,Group A Protection of Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored"
|
|
hexmask.word.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 0. "PROTECT,Protection of register(MMPUSAn MMPUEAn MMPUACAn and MMPUCTLA )" "0: All Bus Master MPU Group A register writing..,1: All Bus Master MPU Group A register writing.."
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x10 0x20 0x30 )
|
|
group.word ($2+0x200)++0x01
|
|
line.word 0x00 "MMPUACA$1,Group A Region"
|
|
hexmask.word 0x00 3.--15. 1. "Reserved,These bits are read as 0000000000000"
|
|
bitfld.word 0x00 2. "WP,Write protection" "0: Write permission,1: Write protection"
|
|
bitfld.word 0x00 1. "RP,Read protection" "0: Read permission,1: Read protection"
|
|
bitfld.word 0x00 0. "ENABLE,Region enable" "0: Group m Region n unit is disabled,1: Group m Region n unit is enabled"
|
|
repeat.end
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x10 0x20 0x30 )
|
|
group.long ($2+0x204)++0x03
|
|
line.long 0x00 "MMPUSA$1,Group A Region"
|
|
hexmask.long 0x00 0.--31. 1. "MMPUSA,Address where the region starts for use in region determination.NOTE: The low-order 2 bits are fixed to 0"
|
|
bitfld.long 0x00 0.--1. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
repeat.end
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x10 0x20 0x30 )
|
|
group.long ($2+0x208)++0x03
|
|
line.long 0x00 "MMPUEA$1,Group A Region"
|
|
hexmask.long 0x00 0.--31. 1. "MMPUEA,Region end address registerAddress where the region end for use in region determination.NOTE: The low-order 2 bits are fixed to 1"
|
|
bitfld.long 0x00 0.--1. "Reserved,These bits are read as 11" "0,1,2,3"
|
|
repeat.end
|
|
tree.end
|
|
tree "MSTP (Module Stop Control)"
|
|
base ad:0x40047000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MSTPCRB,Module Stop Control Register B"
|
|
bitfld.long 0x00 31. "MSTPB31,Serial Communication Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 30. "MSTPB30,Serial Communication Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
hexmask.long.byte 0x00 23.--29. 1. "Reserved,These bits are read as 1111111"
|
|
newline
|
|
bitfld.long 0x00 22. "MSTPB22,Serial Communication Interface 9 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 20.--21. "Reserved,These bits are read as 11" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MSTPB19,Serial Peripheral Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
bitfld.long 0x00 18. "MSTPB18,Serial Peripheral Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 12.--17. "Reserved,These bits are read as 111111" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 11. "MSTPB11,Universal Serial Bus 2.0 FS Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
bitfld.long 0x00 10. "Reserved,This bit is read as 1" "0,1"
|
|
bitfld.long 0x00 9. "MSTPB9,I2C Bus Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 8. "MSTPB8,I2C Bus Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
bitfld.long 0x00 3.--7. "Reserved,These bits are read as 11111" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2. "MSTPB2,CAN0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 0.--1. "Reserved,These bits are read as 11" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSTPCRC,Module Stop Control Register C"
|
|
bitfld.long 0x00 31. "MSTPC31,AES Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 29.--30. "Reserved,These bits are read as 11" "0,1,2,3"
|
|
bitfld.long 0x00 28. "MSTPC28,Random Number Generator Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
hexmask.long.word 0x00 15.--27. 1. "Reserved,These bits are read as 1111111111111"
|
|
bitfld.long 0x00 14. "MSTPC14,Event Link Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 13. "MSTPC13,Data Operation Circuit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
hexmask.long.word 0x00 4.--12. 1. "Reserved,These bits are read as 111111111"
|
|
bitfld.long 0x00 3. "MSTPC3,Capacitive Touch Sensing Unit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 2. "Reserved,This bit is read as 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MSTPC1,CRC Calculator Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 0. "MSTPC0,CAC Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MSTPCRD,Module Stop Control Register D"
|
|
bitfld.long 0x00 31. "MSTPD31,Operational Amplifier Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 30. "Reserved,This bit is read as 1" "0,1"
|
|
bitfld.long 0x00 29. "MSTPD29,Comparator-LP Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
bitfld.long 0x00 28. "MSTPD28,ACMPHS0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
hexmask.long.byte 0x00 21.--27. 1. "Reserved,These bits are read as 1111111"
|
|
bitfld.long 0x00 20. "MSTPD20,12-bit D/A Converter Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
bitfld.long 0x00 19. "MSTPD19,8-Bit D/A Converter Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 18. "Reserved,This bit is read as 1" "0,1"
|
|
bitfld.long 0x00 17. "MSTPD17,24-bit Sigma-Delta A/DConverter Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
bitfld.long 0x00 16. "MSTPD16,16-Bit A/D Converter Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 15. "Reserved,This bit is read as 1" "0,1"
|
|
bitfld.long 0x00 14. "MSTPD14,POEG Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
hexmask.long.byte 0x00 7.--13. 1. "Reserved,These bits are read as 1111111"
|
|
bitfld.long 0x00 6. "MSTPD6,GPT ch6 - ch1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 5. "MSTPD5,GPT ch0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
bitfld.long 0x00 4. "Reserved,This bit is read as 1" "0,1"
|
|
bitfld.long 0x00 3. "MSTPD3,AGT0 Module StopNote: AGT0 is in the module stop state when the count source is either of PCLKB PCLKB/2 or PCLKB/8" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
bitfld.long 0x00 2. "MSTPD2,AGT1 Module StopNote: AGT1 is in the module stop state when the count source is either of PCLKB PCLKB/2 or PCLKB/8" "0: Cancel the module-stop state,1: Enter the module-stop state"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "Reserved,These bits are read as 11" "0,1,2,3"
|
|
tree.end
|
|
tree "OPAMP (Operational Amplifier)"
|
|
base ad:0x40086800
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "AMPMC,Operational amplifier mode control register"
|
|
bitfld.byte 0x00 6.--7. "AMPSP,OPAMP Operation mode selection" "0: Low-power mode (Low-speed),1: Middle-speed mode,2: Low-power mode (Low-speed),3: High-speed mode"
|
|
bitfld.byte 0x00 0.--5. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "AMPTRM,Operational amplifier trigger mode control register"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 5. "AMPTRM21,OPAMP function activation/stop trigger control" "0: Software trigger mode(AMPTRM20=0)/An..,1: Setting prohibited(AMPTRM20=0)/An activation.."
|
|
newline
|
|
bitfld.byte 0x00 4. "AMPTRM20,OPAMP function activation/stop trigger control" "0: Software trigger mode(AMPTRM21=0)/Setting..,1: An activation trigger mode(AMPTRM21=0)/An.."
|
|
bitfld.byte 0x00 3. "AMPTRM11,OPAMP function activation/stop trigger control" "0: Software trigger mode(AMPTRM10=0)/An..,1: Setting prohibited(AMPTRM10=0)/An activation.."
|
|
newline
|
|
bitfld.byte 0x00 2. "AMPTRM10,OPAMP function activation/stop trigger control" "0: Software trigger mode(AMPTRM11=0)/Setting..,1: An activation trigger mode(AMPTRM11=0)/An.."
|
|
bitfld.byte 0x00 1. "AMPTRM01,OPAMP function activation/stop trigger control" "0: Software trigger mode(AMPTRM00=0)/An..,1: Setting prohibited(AMPTRM00=0)/An activation.."
|
|
newline
|
|
bitfld.byte 0x00 0. "AMPTRM00,OPAMP function activation/stop trigger control" "0: Software trigger mode(AMPTRM01=0)/Setting..,1: An activation trigger mode(AMPTRM01=0)/An.."
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "AMPTRS,Operational Amplifier Activation Trigger Select Register"
|
|
bitfld.byte 0x00 0.--1. "AMPTRS,Activation Trigger SelectionNote: Do not change the value of the AMPTRS register after setting the AMPTRM register" "0: OPAMPn,1: OPAMPn,2: Setting prohibited,3: OPAMPn"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "AMPC,Operational amplifier control register"
|
|
bitfld.byte 0x00 7. "IREFE,Reference Current Circuit Operation Control" "0: Reference current circuit is stopped,1: Operation of reference current circuit is.."
|
|
bitfld.byte 0x00 3.--6. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.byte 0x00 2. "AMPE2,Operation control of operational amplifier 2" "0: OPAMP is stopped,1: OPAMP is enabled"
|
|
bitfld.byte 0x00 1. "AMPE1,Operation control of operational amplifier 1" "0: OPAMP is stopped,1: OPAMP is enabled"
|
|
newline
|
|
bitfld.byte 0x00 0. "AMPE0,Operation control of operational amplifier 0" "0: OPAMP is stopped,1: OPAMP is enabled"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "AMPMON,Operational amplifier monitor register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 2. "AMPMON2,OPAMP2 Status" "0: OPAMP is stopped,1: OPAMP is operating"
|
|
newline
|
|
bitfld.byte 0x00 1. "AMPMON1,OPAMP1 Status" "0: OPAMP is stopped,1: OPAMP is operating"
|
|
bitfld.byte 0x00 0. "AMPMON0,OPAMP0 Status" "0: OPAMP is stopped,1: OPAMP is operating"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "AMP0OS,Operational Amplifier 0 Output Select Register"
|
|
bitfld.byte 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. "AMPOS3,AMP2+ pin select" "0: AMP2+ pin is not connected to the OPAMP0 output,1: AMP2+ pin is connected to the OPAMP0 output"
|
|
newline
|
|
bitfld.byte 0x00 2. "AMPOS2,AMP2- pin select" "0: AMP2- pin is not connected to the OPAMP0 output,1: AMP2- pin is connected to the OPAMP0 output"
|
|
bitfld.byte 0x00 1. "AMPOS1,AMP1+ pin select" "0: AMP1+ pin is not connected to the OPAMP0 output,1: AMP1+ pin is connected to the OPAMP0 output"
|
|
newline
|
|
bitfld.byte 0x00 0. "AMPOS0,AMP1- pin select" "0: AMP1- pin is not connected to the OPAMP0 output,1: AMP1- pin is connected to the OPAMP0 output"
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "AMP0MS,Operational Amplifier 0 Minus Input Select Register"
|
|
bitfld.byte 0x00 7. "AMPMS7,OPAMP0 output select" "0: OPAMP0 output is not connected to the AMP0..,1: OPAMP0 output is connected to the AMP0 minus.."
|
|
bitfld.byte 0x00 5.--6. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 4. "AMPMS4,AMP2- pin select" "0: AMP2- pin is not connected to the AMP0 minus..,1: AMP2- pin is connected to the AMP0 minus input"
|
|
bitfld.byte 0x00 3. "AMPMS3,AMP1+ pin select" "0: AMP1+ pin is not connected to the AMP0 minus..,1: AMP1+ pin is connected to the AMP0 minus input"
|
|
newline
|
|
bitfld.byte 0x00 2. "AMPMS2,AMP1- pin select" "0: AMP1- pin is not connected to the AMP0 minus..,1: AMP1- pin is connected to the AMP0 minus input"
|
|
bitfld.byte 0x00 1. "AMPMS1,AMP0+ pin select" "0: AMP0+ pin is not connected to the AMP0 minus..,1: AMP0+ pin is connected to the AMP0 minus input"
|
|
newline
|
|
bitfld.byte 0x00 0. "AMPMS0,AMP0- pin select" "0: AMP0- pin is not connected to the AMP0 minus..,1: AMP0- pin is connected to the AMP0 minus input"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "AMP0PS,Operational Amplifier 0 Plus Input Select Register"
|
|
bitfld.byte 0x00 7. "AMPMS7,DAC12 output select" "0: DAC12 output is not connected to the AMP0..,1: DAC12 output is connected to the AMP0 plus.."
|
|
bitfld.byte 0x00 4.--6. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.byte 0x00 3. "AMPPS3,AMP2+ pin select" "0: AMP2+ pin is not connected to the AMP0 plus..,1: AMP2+ pin is connected to the AMP0 plus input"
|
|
bitfld.byte 0x00 2. "AMPPS2,AMP1+pin select" "0: AMP1+ pin is not connected to the AMP0 plus..,1: AMP1+ pin is connected to the AMP0 plus input"
|
|
newline
|
|
bitfld.byte 0x00 1. "AMPPS1,AMP1- pin select" "0: AMP1- pin is not connected to the AMP0 plus..,1: AMP1- pin is connected to the AMP0 plus input"
|
|
bitfld.byte 0x00 0. "AMPPS0,AMP0+ pin select" "0: AMP0+ pin is not connected to the AMP0 plus..,1: AMP0+ pin is connected to the AMP0 plus input"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "AMP1MS,Operational Amplifier 1 Minus Input Select Register"
|
|
bitfld.byte 0x00 7. "AMPMS7,OPAMP1 output select" "0: OPAMP1 output is not connected to the AMP1..,1: OPAMP1 output is connected to the AMP1 minus.."
|
|
bitfld.byte 0x00 1.--6. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.byte 0x00 0. "AMPMS0,AMP1- pin select" "0: AMP1- pin is not connected to the AMP1 minus..,1: AMP1- pin is connected to the AMP1 minus input"
|
|
group.byte 0x0B++0x00
|
|
line.byte 0x00 "AMP1PS,Operational Amplifier 1 Plus Input Select Register"
|
|
bitfld.byte 0x00 7. "AMPMS7,OPAMP2 output select" "0: OPAMP2 output is not connected to the AMP2..,1: OPAMP2 output is connected to the AMP2 minus.."
|
|
bitfld.byte 0x00 4.--6. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.byte 0x00 3. "AMPPS3,AMP2+ pin select" "0: AMP2+ pin is not connected to the AMP1 plus..,1: AMP2+ pin is connected to the AMP1"
|
|
bitfld.byte 0x00 2. "AMPPS2,AMP2- pin select" "0: AMP2- pin is not connected to the AMP1 plus..,1: AMP2- pin is connected to the AMP1 plus input"
|
|
newline
|
|
bitfld.byte 0x00 1. "AMPPS1,AMP1+ pin select" "0: AMP1+ pin is not connected to the AMP1 plus..,1: AMP1+ pin is connected to the AMP1 plus input"
|
|
bitfld.byte 0x00 0. "AMPPS0,AMP1- pin select" "0: AMP1- pin is not connected to the AMP1 plus..,1: AMP1- pin is connected to the AMP1 plus input"
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "AMP2MS,Operational Amplifier 2 Minus Input Select Register"
|
|
bitfld.byte 0x00 7. "AMPMS7,OPAMP2 output select" "0: OPAMP2 output is not connected to the AMP2..,1: OPAMP2 output is connected to the AMP2 minus.."
|
|
bitfld.byte 0x00 1.--6. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.byte 0x00 0. "AMPMS0,AMP2- pin select" "0: AMP2- pin is not connected to the AMP2 minus..,1: AMP2- pin is connected to the AMP2 minus input"
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "AMP2PS,Operational Amplifier 2 Plus Input Select Register"
|
|
bitfld.byte 0x00 7. "AMPPS7,DAC8 channel 1output select" "0: DAC8 channel 1 output is not connected to the..,1: DAC8 channel 1 output is connected to the.."
|
|
bitfld.byte 0x00 2.--6. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.byte 0x00 1. "AMPPS1,AMP2+ pin select" "0: AMP2+ pin is not connected to the AMP2 plus..,1: AMP2+ pin is connected to the AMP2 plus input"
|
|
bitfld.byte 0x00 0. "AMPPS0,AMP2- pin select" "0: AMP2- pin is not connected to the AMP2 plus..,1: AMP2- pin is connected to the AMP2 plus input"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "AMPCPC,Operational Amplifier Switch Charge Pump Control Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 2. "PUMP2EN,Charge Pump for AMP2 Enable" "0: Charge Pump for the AMP2 disabled,1: Charge Pump for the AMP2 enable"
|
|
newline
|
|
bitfld.byte 0x00 1. "PUMP1EN,Charge Pump for AMP1 Enable" "0: Charge Pump for the AMP1 disabled,1: Charge Pump for the AMP1 enable"
|
|
bitfld.byte 0x00 0. "PUMP0EN,Charge Pump for AMP0 Enable" "0: Charge Pump for the AMP0 disabled,1: Charge Pump for the AMP0 enable"
|
|
group.byte 0x17++0x00
|
|
line.byte 0x00 "AMPUOTE,Operational Amplifier User Offset Trimming Enable Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 2. "AMP2TE,AMP2OT write enable" "0: Not possible to write to the AMP2OTP and..,1: Possible to write to the AMP2OTP and AMP2OTN.."
|
|
newline
|
|
bitfld.byte 0x00 1. "AMP1TE,AMP1OT write enable" "0: Not possible to write to the AMP1OTP and..,1: Possible to write to the AMP1OTP and AMP1OTN.."
|
|
bitfld.byte 0x00 0. "AMP0TE,AMP0OT write enable" "0: Not possible to write to the AMP0OTP and..,1: Possible to write to the AMP0OTP and AMP0OTN.."
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "AMP0OTP,Operational Amplifier 0 Offset Trimming Pch Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "TRMP,AMP0 input offset trimming Pch side" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x19++0x00
|
|
line.byte 0x00 "AMP0OTN,Operational Amplifier 0 Offset Trimming Nch Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "TRMN,AMP0 input offset trimming Nch side" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x1A++0x00
|
|
line.byte 0x00 "AMP1OTP,Operational Amplifier 1 Offset Trimming Pch Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "TRMP,AMP1 input offset trimming Pch side" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x1B++0x00
|
|
line.byte 0x00 "AMP1OTN,Operational Amplifier 1 Offset Trimming Nch Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "TRMN,AMP1 input offset trimming Nch side" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "AMP2OTP,Operational Amplifier 2 Offset Trimming Pch Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "TRMP,AMP2 input offset trimming Pch side" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x1D++0x00
|
|
line.byte 0x00 "AMP2OTN,Operational Amplifier 2 Offset Trimming Nch Register"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. "TRMN,AMP2 input offset trimming Nch side" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "PFS (Pmn Pin Function Control Register)"
|
|
base ad:0x40040800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "P000PFS,P000 Pin Function Control Register"
|
|
bitfld.long 0x00 29.--31. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--28. "PSEL,Port Function Select These bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.long.byte 0x00 17.--23. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.."
|
|
newline
|
|
bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin"
|
|
bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin"
|
|
newline
|
|
bitfld.long 0x00 11.--13. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10. "DSCR,Drive Strength Control Register" "0: Low drive,1: High drive"
|
|
newline
|
|
bitfld.long 0x00 7.--9. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
newline
|
|
bitfld.long 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
newline
|
|
bitfld.long 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
newline
|
|
rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "P000PFS_HA,P000 Pin Function Control Register"
|
|
bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin"
|
|
bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin"
|
|
newline
|
|
bitfld.word 0x00 11.--13. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. "DSCR,Drive Strength Control Register" "0: Low drive,1: High drive"
|
|
newline
|
|
bitfld.word 0x00 7.--9. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
newline
|
|
bitfld.word 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
newline
|
|
bitfld.word 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
newline
|
|
rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "P000PFS_BY,P000 Pin Function Control Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
newline
|
|
bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
newline
|
|
rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "P00%sPFS,P00%s Pin Function Control Register"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "P00%sPFS_HA,P00%s Pin Function Control Register"
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "P00%sPFS_BY,P00%s Pin Function Control Register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "P0%sPFS,P0%s Pin Function Control Register"
|
|
group.word 0x32++0x01
|
|
line.word 0x00 "P0%sPFS_HA,P0%s Pin Function Control Register"
|
|
group.byte 0x33++0x00
|
|
line.byte 0x00 "P0%sPFS_BY,P0%s Pin Function Control Register"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "P100PFS,P100 Pin Function Control Register"
|
|
bitfld.long 0x00 29.--31. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--28. "PSEL,Port Function Select These bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.long.byte 0x00 17.--23. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.."
|
|
newline
|
|
bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin"
|
|
bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,2: Detect falling edge,3: Detect both edge"
|
|
bitfld.long 0x00 11. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "DSCR,Drive Strength Control Register" "0: Low drive,1: High drive"
|
|
bitfld.long 0x00 7.--9. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
bitfld.long 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
bitfld.long 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
newline
|
|
bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.word 0x42++0x01
|
|
line.word 0x00 "P100PFS_HA,P100 Pin Function Control Register"
|
|
bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin"
|
|
bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin"
|
|
newline
|
|
bitfld.word 0x00 12.--13. "EOFR,Event on Falling/Event on Rising" "0: Don't care,1: Detect rising edge,2: Detect falling edge,3: Detect both edge"
|
|
bitfld.word 0x00 11. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 10. "DSCR,Drive Strength Control Register" "0: Low drive,1: High drive"
|
|
bitfld.word 0x00 7.--9. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
bitfld.word 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
bitfld.word 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
newline
|
|
bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.byte 0x43++0x00
|
|
line.byte 0x00 "P100PFS_BY,P100 Pin Function Control Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
newline
|
|
bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
newline
|
|
rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "P10%sPFS,P10%s Pin Function Control Register"
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "P10%sPFS_HA,P10%s Pin Function Control Register"
|
|
group.byte 0x47++0x00
|
|
line.byte 0x00 "P10%sPFS_BY,P10%s Pin Function Control Register"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "P108PFS,P108 Pin Function Control Register"
|
|
group.word 0x62++0x01
|
|
line.word 0x00 "P108PFS_HA,P108 Pin Function Control Register"
|
|
group.byte 0x63++0x00
|
|
line.byte 0x00 "P108PFS_BY,P108 Pin Function Control Register"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "P109PFS,P109 Pin Function Control Register"
|
|
group.word 0x66++0x01
|
|
line.word 0x00 "P109PFS_HA,P109 Pin Function Control Register"
|
|
group.byte 0x67++0x00
|
|
line.byte 0x00 "P109PFS_BY,P109 Pin Function Control Register"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "P1%sPFS,P1%s Pin Function Control Register"
|
|
group.word 0x6A++0x01
|
|
line.word 0x00 "P1%sPFS_HA,P1%s Pin Function Control Register"
|
|
group.byte 0x6B++0x00
|
|
line.byte 0x00 "P1%sPFS_BY,P1%s Pin Function Control Register"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "P200PFS,P200 Pin Function Control Register"
|
|
group.word 0x82++0x01
|
|
line.word 0x00 "P200PFS_HA,P200 Pin Function Control Register"
|
|
group.byte 0x83++0x00
|
|
line.byte 0x00 "P200PFS_BY,P200 Pin Function Control Register"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "P201PFS,P201 Pin Function Control Register"
|
|
group.word 0x86++0x01
|
|
line.word 0x00 "P201PFS_HA,P201 Pin Function Control Register"
|
|
group.byte 0x87++0x00
|
|
line.byte 0x00 "P201PFS_BY,P201 Pin Function Control Register"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "P20%sPFS,P20%s Pin Function Control Register"
|
|
group.word 0x92++0x01
|
|
line.word 0x00 "P20%sPFS_HA,P20%s Pin Function Control Register"
|
|
group.byte 0x93++0x00
|
|
line.byte 0x00 "P20%sPFS_BY,P20%s Pin Function Control Register"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "P2%sPFS,P2%s Pin Function Control Register"
|
|
group.word 0xB2++0x01
|
|
line.word 0x00 "P2%sPFS_HA,P2%s Pin Function Control Register"
|
|
group.byte 0xB3++0x00
|
|
line.byte 0x00 "P2%sPFS_BY,P2%s Pin Function Control Register"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "P300PFS,P300 Pin Function Control Register"
|
|
group.word 0xC2++0x01
|
|
line.word 0x00 "P300PFS_HA,P300 Pin Function Control Register"
|
|
group.byte 0xC3++0x00
|
|
line.byte 0x00 "P300PFS_BY,P300 Pin Function Control Register"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "P30%sPFS,P30%s Pin Function Control Register"
|
|
group.word 0xC6++0x01
|
|
line.word 0x00 "P30%sPFS_HA,P30%s Pin Function Control Register"
|
|
group.byte 0xC7++0x00
|
|
line.byte 0x00 "P30%sPFS_BY,P30%s Pin Function Control Register"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "P40%sPFS,P40%s Pin Function Control Register"
|
|
group.word 0x102++0x01
|
|
line.word 0x00 "P40%sPFS_HA,P40%s Pin Function Control Register"
|
|
group.byte 0x103++0x00
|
|
line.byte 0x00 "P40%sPFS_BY,P40%s Pin Function Control Register"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "P407PFS,P407 Pin Function Control Register"
|
|
bitfld.long 0x00 29.--31. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--28. "PSEL,Port Function Select These bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.long.byte 0x00 17.--23. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.."
|
|
newline
|
|
bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin"
|
|
bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.long 0x00 11. "DSCR1,Drive Strength Control Register" "0: Low drive,1: Middle drive"
|
|
newline
|
|
bitfld.long 0x00 10. "DSCR," "0,1"
|
|
bitfld.long 0x00 7.--9. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
bitfld.long 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
bitfld.long 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
newline
|
|
bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.word 0x11E++0x01
|
|
line.word 0x00 "P407PFS_HA,P407 Pin Function Control Register"
|
|
bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin"
|
|
bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin"
|
|
newline
|
|
bitfld.word 0x00 12.--13. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 11. "DSCR1,Drive Strength Control Register" "0: Low drive,1: Middle drive"
|
|
newline
|
|
bitfld.word 0x00 10. "DSCR," "0,1"
|
|
bitfld.word 0x00 7.--9. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
bitfld.word 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
bitfld.word 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
newline
|
|
bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.byte 0x11F++0x00
|
|
line.byte 0x00 "P407PFS_BY,P407 Pin Function Control Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output"
|
|
newline
|
|
bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)"
|
|
newline
|
|
rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input"
|
|
bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "P40%sPFS,P40%s Pin Function Control Register"
|
|
group.word 0x122++0x01
|
|
line.word 0x00 "P40%sPFS_HA,P40%s Pin Function Control Register"
|
|
group.byte 0x123++0x00
|
|
line.byte 0x00 "P40%sPFS_BY,P40%s Pin Function Control Register"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "P4%sPFS,P4%s Pin Function Control Register"
|
|
group.word 0x12A++0x01
|
|
line.word 0x00 "P4%sPFS_HA,P4%s Pin Function Control Register"
|
|
group.byte 0x12B++0x00
|
|
line.byte 0x00 "P4%sPFS_BY,P4%s Pin Function Control Register"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "P50%sPFS,P50%s Pin Function Control Register"
|
|
group.word 0x142++0x01
|
|
line.word 0x00 "P50%sPFS_HA,P50%s Pin Function Control Register"
|
|
group.byte 0x143++0x00
|
|
line.byte 0x00 "P50%sPFS_BY,P50%s Pin Function Control Register"
|
|
group.long 0x278++0x03
|
|
line.long 0x00 "P914PFS,P914 Pin Function Control Register"
|
|
group.word 0x27A++0x01
|
|
line.word 0x00 "P914PFS_HA,P914 Pin Function Control Register"
|
|
group.byte 0x27B++0x00
|
|
line.byte 0x00 "P914PFS_BY,P914 Pin Function Control Register"
|
|
group.long 0x27C++0x03
|
|
line.long 0x00 "P915PFS,P915 Pin Function Control Register"
|
|
group.word 0x27E++0x01
|
|
line.word 0x00 "P915PFS_HA,P915 Pin Function Control Register"
|
|
group.byte 0x27F++0x00
|
|
line.byte 0x00 "P915PFS_BY,P915 Pin Function Control Register"
|
|
tree.end
|
|
tree "PMISC (Miscellaneous Port Control Register)"
|
|
base ad:0x40040D00
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "PWPR,Write-Protect Register"
|
|
bitfld.byte 0x00 7. "B0WI,PFSWE Bit Write Disable" "0: Writing to the PFSWE bit is enabled,1: Writing to the PFSWE bit is disabled"
|
|
bitfld.byte 0x00 6. "PFSWE,PFS Register Write Enable" "0: Writing to the PFS register is disabled,1: Writing to the PFS register is enabled"
|
|
bitfld.byte 0x00 0.--5. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
tree "POEG (Port Output Enable Module for GPT)"
|
|
base ad:0x40042000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "POEGGA,POEG Group"
|
|
bitfld.long 0x00 30.--31. "NFCS,Noise Filter Clock Select" "0: Sampling GTETRG pin input level for three..,1: Sampling GTETRG pin input level for three..,2: Sampling GTETRG pin input level for three..,3: Sampling GTETRG pin input level for three.."
|
|
bitfld.long 0x00 29. "NFEN,Noise Filter Enable" "0: Filtering noise disabled,1: Filtering noise enabled"
|
|
newline
|
|
bitfld.long 0x00 28. "INV,GTETRG Input Reverse" "0: GTETRG Input,1: GTETRG Input Reversed"
|
|
hexmask.long.word 0x00 17.--27. 1. "Reserved,These bits are read as 00000000000"
|
|
newline
|
|
rbitfld.long 0x00 16. "ST,GTETRG Input Status Flag" "0: GTETRG input after filtering is 0,1: GTETRG input after filtering is 1"
|
|
bitfld.long 0x00 14.--15. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 13. "CDRE5,ACMP_LP1 EnableNote: Can be modified only once after a reset" "0: Disable output-disable request from ACMPLP1,1: Enable output-disable request from ACMPLP1"
|
|
bitfld.long 0x00 12. "CDRE4,ACMP_LP0 EnableNote: Can be modified only once after a reset" "0: Disable output-disable request from ACMPLP0,1: Enable output-disable request from ACMPLP0"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8. "CDRE0,ACMP_HS0 EnableNote: Can be modified only once after a reset" "0: Disable output-disable request from ACMPHS0,1: Enable output-disable request from ACMPHS0"
|
|
newline
|
|
bitfld.long 0x00 6. "OSTPE,Oscillation Stop Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.."
|
|
bitfld.long 0x00 5. "IOCE,Real Time Overcurrent EnableNote: Can be modified only once after a reset" "0: A output-disable request from GPT disable..,1: A output-disable request from GPT disable.."
|
|
newline
|
|
bitfld.long 0x00 4. "PIDE,Port Input Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the GTETRG pins..,1: A output-disable request from the GTETRG pins.."
|
|
bitfld.long 0x00 3. "SSF,Software Stop Flag" "0: A output-disable request from software has..,1: A output-disable request from software has.."
|
|
newline
|
|
bitfld.long 0x00 2. "OSTPF,Oscillation Stop Detection Flag" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.."
|
|
bitfld.long 0x00 1. "IOCF,Real Time Overcurrent Detection Flag" "0: No output-disable request from the GPT the..,1: Output-disable request from the GPT the.."
|
|
newline
|
|
bitfld.long 0x00 0. "PIDF,Port Input Detection Flag" "0: A output-disable request from the GTETRG pin..,1: A output-disable request from the GTETRG pin.."
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "POEGGB,POEG Group"
|
|
bitfld.long 0x00 30.--31. "NFCS,Noise Filter Clock Select" "0: Sampling GTETRG pin input level for three..,1: Sampling GTETRG pin input level for three..,2: Sampling GTETRG pin input level for three..,3: Sampling GTETRG pin input level for three.."
|
|
bitfld.long 0x00 29. "NFEN,Noise Filter Enable" "0: Filtering noise disabled,1: Filtering noise enabled"
|
|
newline
|
|
bitfld.long 0x00 28. "INV,GTETRG Input Reverse" "0: GTETRG Input,1: GTETRG Input Reversed"
|
|
hexmask.long.word 0x00 17.--27. 1. "Reserved,These bits are read as 00000000000"
|
|
newline
|
|
rbitfld.long 0x00 16. "ST,GTETRG Input Status Flag" "0: GTETRG input after filtering is 0,1: GTETRG input after filtering is 1"
|
|
bitfld.long 0x00 14.--15. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 13. "CDRE5,ACMP_LP1 EnableNote: Can be modified only once after a reset" "0: Disable output-disable request from ACMPLP1,1: Enable output-disable request from ACMPLP1"
|
|
bitfld.long 0x00 12. "CDRE4,ACMP_LP0 EnableNote: Can be modified only once after a reset" "0: Disable output-disable request from ACMPLP0,1: Enable output-disable request from ACMPLP0"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8. "CDRE0,ACMP_HS0 EnableNote: Can be modified only once after a reset" "0: Disable output-disable request from ACMPHS0,1: Enable output-disable request from ACMPHS0"
|
|
newline
|
|
bitfld.long 0x00 6. "OSTPE,Oscillation Stop Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.."
|
|
bitfld.long 0x00 5. "IOCE,Real Time Overcurrent EnableNote: Can be modified only once after a reset" "0: A output-disable request from GPT disable..,1: A output-disable request from GPT disable.."
|
|
newline
|
|
bitfld.long 0x00 4. "PIDE,Port Input Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the GTETRG pins..,1: A output-disable request from the GTETRG pins.."
|
|
bitfld.long 0x00 3. "SSF,Software Stop Flag" "0: A output-disable request from software has..,1: A output-disable request from software has.."
|
|
newline
|
|
bitfld.long 0x00 2. "OSTPF,Oscillation Stop Detection Flag" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.."
|
|
bitfld.long 0x00 1. "IOCF,Real Time Overcurrent Detection Flag" "0: No output-disable request from the GPT the..,1: Output-disable request from the GPT the.."
|
|
newline
|
|
bitfld.long 0x00 0. "PIDF,Port Input Detection Flag" "0: A output-disable request from the GTETRG pin..,1: A output-disable request from the GTETRG pin.."
|
|
tree.end
|
|
tree "PORT (Port Control Registers)"
|
|
tree "PORT0"
|
|
base ad:0x40040000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PCNTR1,Port Control Register 1"
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PODR,Output data register"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "PDR,Direction register"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PCNTR2,Port Control Register 2"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "PIDR,Input data register"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCNTR3,Port Control Register 3"
|
|
wgroup.word 0x08++0x01
|
|
line.word 0x00 "PORR,Output reset register"
|
|
wgroup.word 0x0A++0x01
|
|
line.word 0x00 "POSR,Output set register"
|
|
tree.end
|
|
tree "PORT1"
|
|
base ad:0x40040020
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PCNTR1,Port Control Register 1"
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PODR,Output data register"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "PDR,Direction register"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PCNTR2,Port Control Register 2"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "EIDR,Event input data register"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "PIDR,Input data register"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "PCNTR3,Port Control Register 3"
|
|
wgroup.word 0x08++0x01
|
|
line.word 0x00 "PORR,Output reset register"
|
|
wgroup.word 0x0A++0x01
|
|
line.word 0x00 "POSR,Output set register"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PCNTR4,Port Control Register 4"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "EORR,Event output reset register"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "EOSR,Event output set register"
|
|
tree.end
|
|
tree.end
|
|
tree "RTC (Real-time Counter)"
|
|
base ad:0x40044000
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "R64CNT,64-Hz Counter"
|
|
bitfld.byte 0x00 6. "F1HZ,1Hz" "0,1"
|
|
bitfld.byte 0x00 5. "F2HZ,2Hz" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4. "F4HZ,4Hz" "0,1"
|
|
bitfld.byte 0x00 3. "F8HZ,8Hz" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "F16HZ,16Hz" "0,1"
|
|
bitfld.byte 0x00 1. "F32HZ,32Hz" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "F64HZ,64Hz" "0,1"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "RSECCNT,Second Counter"
|
|
bitfld.byte 0x00 4.--6. "SEC10,10-Second Count Counts from 0 to 5 for 60-second counting" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--3. "SEC1,1-Second Count Counts from 0 to 9 every second" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "BCNT0,Binary Counter 0"
|
|
hexmask.byte 0x00 0.--7. 1. "BCNT0,The BCNT0 counter is a readable/writable 32-bit binary counter b7 to b0"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "RMINCNT,Minute Counter"
|
|
bitfld.byte 0x00 4.--6. "MIN10,10-Minute Count Counts from 0 to 5 for 60-minute counting" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--3. "MIN1,1-Minute Count Counts from 0 to 9 every minute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "BCNT1,Binary Counter 1"
|
|
hexmask.byte 0x00 0.--7. 1. "BCNT1,The BCNT1 counter is a readable/writable 32-bit binary counter b15 to b8"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "RHRCNT,Hour Counter"
|
|
bitfld.byte 0x00 6. "PM,Time Counter Setting for a.m./p.m" "0: a.m,1: p.m"
|
|
bitfld.byte 0x00 4.--5. "HR10,10-Hour Count Counts from 0 to 2 once per carry from the ones place" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 0.--3. "HR1,1-Hour Count Counts from 0 to 9 once per hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "BCNT2,Binary Counter 2"
|
|
hexmask.byte 0x00 0.--7. 1. "BCNT2,The BCNT2 counter is a readable/writable 32-bit binary counter b23 to b16"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "RWKCNT,Day-of-Week Counter"
|
|
bitfld.byte 0x00 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,2: Tuesday,3: Wednesday,4: Thursday,5: Friday,6: Saturday,7: Setting Prohibited"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "BCNT3,Binary Counter 3"
|
|
hexmask.byte 0x00 0.--7. 1. "BCNT3,The BCNT3 counter is a readable/writable 32-bit binary counter b31 to b24"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "RDAYCNT,Day Counter"
|
|
bitfld.byte 0x00 4.--5. "DATE10,10-Day Count Counts from 0 to 3 once per carry from the ones place" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. "DATE1,1-Day Count Counts from 0 to 9 once per day" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "RMONCNT,Month Counter"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 4. "MON10,10-Month Count Counts from 0 to 1 once per carry from the ones place" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0.--3. "MON1,1-Month Count Counts from 0 to 9 once per month" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "RYRCNT,Year Counter"
|
|
hexmask.word.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
|
|
bitfld.word 0x00 4.--7. "YR10,10-Year Count Counts from 0 to 9 once per carry from ones place" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.word 0x00 0.--3. "YR1,1-Year Count Counts from 0 to 9 once per year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "RSECAR,Second Alarm Register"
|
|
bitfld.byte 0x00 7. "ENB,ENB" "0: The register value is not compared with the..,1: The register value is compared with the.."
|
|
bitfld.byte 0x00 4.--6. "SEC10,10-Seconds Value for the tens place of seconds" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.byte 0x00 0.--3. "SEC1,1-Second Value for the ones place of seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "BCNT0AR,Binary Counter 0 Alarm Register"
|
|
hexmask.byte 0x00 0.--7. 1. "BCNT0AR,he BCNT0AR counter is a readable/writable alarm register corresponding to 32-bit binary counter b7 to b0"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "RMINAR,Minute Alarm Register"
|
|
bitfld.byte 0x00 7. "ENB,ENB" "0: The register value is not compared with the..,1: The register value is compared with the.."
|
|
bitfld.byte 0x00 4.--6. "MIN10,10-Minute Count Value for the tens place of minutes" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.byte 0x00 0.--3. "MIN1,1-Minute Count Value for the ones place of minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "BCNT1AR,Binary Counter 1 Alarm Register"
|
|
hexmask.byte 0x00 0.--7. 1. "BCNT1AR,he BCNT1AR counter is a readable/writable alarm register corresponding to 32-bit binary counter b15 to b8"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "RHRAR,Hour Alarm Register"
|
|
bitfld.byte 0x00 7. "ENB,ENB" "0: The register value is not compared with the..,1: The register value is compared with the.."
|
|
bitfld.byte 0x00 6. "PM,Time Counter Setting for a.m./p.m" "0: a.m,1: p.m"
|
|
newline
|
|
bitfld.byte 0x00 4.--5. "HR10,10-Hour Count Value for the tens place of hours" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. "HR1,1-Hour Count Value for the ones place of hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "BCNT2AR,Binary Counter 2 Alarm Register"
|
|
hexmask.byte 0x00 0.--7. 1. "BCNT2AR,The BCNT2AR counter is a readable/writable 32-bit binary counter b23 to b16"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "RWKAR,Day-of-Week Alarm Register"
|
|
bitfld.byte 0x00 7. "ENB,ENB" "0: The register value is not compared with the..,1: The register value is compared with the.."
|
|
bitfld.byte 0x00 3.--6. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,2: Tuesday,3: Wednesday,4: Thursday,5: Friday,6: Saturday,7: Setting Prohibited"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "BCNT3AR,Binary Counter 3 Alarm Register"
|
|
hexmask.byte 0x00 0.--7. 1. "BCNT3AR,The BCNT3AR counter is a readable/writable 32-bit binary counter b31 to b24"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "RDAYAR,Date Alarm Register"
|
|
bitfld.byte 0x00 7. "ENB,ENB" "0: The register value is not compared with the..,1: The register value is compared with the.."
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4.--5. "DATE10,10 Days Value for the tens place of days" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. "DATE1,1 Day Value for the ones place of days" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "BCNT0AER,Binary Counter 0 Alarm Enable Register"
|
|
hexmask.byte 0x00 0.--7. 1. "ENB,The BCNT0AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b7 to b0"
|
|
group.byte 0x1A++0x00
|
|
line.byte 0x00 "RMONAR,Month Alarm Register"
|
|
bitfld.byte 0x00 7. "ENB,ENB" "0: The register value is not compared with the..,1: The register value is compared with the.."
|
|
bitfld.byte 0x00 5.--6. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 4. "MON10,10 Months Value for the tens place of months" "0,1"
|
|
bitfld.byte 0x00 0.--3. "MON1,1 Month Value for the ones place of months" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x1A++0x00
|
|
line.byte 0x00 "BCNT1AER,Binary Counter 1 Alarm Enable Register"
|
|
hexmask.byte 0x00 0.--7. 1. "ENB,The BCNT1AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b15 to b8"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "RYRAR,Year Alarm Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
|
|
bitfld.word 0x00 4.--7. "YR10,10 Years Value for the tens place of years" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.word 0x00 0.--3. "YR1,1 Year Value for the ones place of years" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "BCNT2AER,Binary Counter 2 Alarm Enable Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
|
|
hexmask.word.byte 0x00 0.--7. 1. "ENB,The BCNT2AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b23 to b16"
|
|
group.byte 0x1E++0x00
|
|
line.byte 0x00 "RYRAREN,Year Alarm Enable Register"
|
|
bitfld.byte 0x00 7. "ENB,ENB" "0: The register value is not compared with the..,1: The register value is compared with the.."
|
|
hexmask.byte 0x00 0.--6. 1. "Reserved,These bits are read as 0000000"
|
|
group.byte 0x1E++0x00
|
|
line.byte 0x00 "BCNT3AER,Binary Counter 3 Alarm Enable Register"
|
|
hexmask.byte 0x00 0.--7. 1. "ENB,The BCNT3AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b31 to b24"
|
|
group.byte 0x22++0x00
|
|
line.byte 0x00 "RCR1,RTC Control Register 1"
|
|
bitfld.byte 0x00 4.--7. "PES,Periodic Interrupt Select" "?,?,?,?,?,?,6: A periodic interrupt is generated every 1/256..,7: A periodic interrupt is generated every 1/128..,8: A periodic interrupt is generated every 1/64..,9: A periodic interrupt is generated every 1/32..,10: A periodic interrupt is generated every 1/16..,11: A periodic interrupt is generated every 1/8..,12: A periodic interrupt is generated every 1/4..,13: A periodic interrupt is generated every 1/2..,14: A periodic interrupt is generated every 1..,15: A periodic interrupt is generated every 2.."
|
|
bitfld.byte 0x00 3. "RTCOS,RTCOUT Output Select" "0: RTCOUT outputs 1 Hz,1: RTCOUT outputs 64 Hz"
|
|
newline
|
|
bitfld.byte 0x00 2. "PIE,Periodic Interrupt Enable" "0: A periodic interrupt request is disabled,1: A periodic interrupt request is enabled"
|
|
bitfld.byte 0x00 1. "CIE,Carry Interrupt Enable" "0: A carry interrupt request is disabled,1: A carry interrupt request is enabled"
|
|
newline
|
|
bitfld.byte 0x00 0. "AIE,Alarm Interrupt Enable" "0: An alarm interrupt request is disabled,1: An alarm interrupt request is enabled"
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "RCR2,RTC Control Register 2"
|
|
bitfld.byte 0x00 7. "CNTMD,Count Mode Select" "0: The calendar count mode,1: The binary count mode"
|
|
bitfld.byte 0x00 6. "HR24,Hours Mode" "0: The RTC operates in 12-hour mode,1: The RTC operates in 24-hour mode"
|
|
newline
|
|
bitfld.byte 0x00 5. "AADJP,Automatic Adjustment Period Select (When the LOCO clock is selected the setting of this bit is disabled.)" "0: The RADJ.ADJ[5:0] setting value is adjusted..,1: The RADJ.ADJ[5:0] setting value is adjusted.."
|
|
bitfld.byte 0x00 4. "AADJE,Automatic Adjustment Enable (When the LOCO clock is selected the setting of this bit is disabled.)" "0: Automatic adjustment is disabled,1: Automatic adjustment is enabled"
|
|
newline
|
|
bitfld.byte 0x00 3. "RTCOE,RTCOUT Output Enable" "0: RTCOUT output disabled,1: RTCOUT output enabled"
|
|
bitfld.byte 0x00 2. "ADJ30,30-Second Adjustment" "0: Writing is invalid.(write) / In normal time..,1: 30-second adjustment is executed.(write) /.."
|
|
newline
|
|
bitfld.byte 0x00 1. "RESET,RTC Software Reset" "0: Writing is invalid.(write) / In normal time..,1: The prescaler and the target registers for.."
|
|
bitfld.byte 0x00 0. "START,Start" "0: Prescaler and time counter are stopped,1: Prescaler and time counter operate normally"
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "RCR4,RTC Control Register 4"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "RCKSEL,Count Source Select" "0: Sub-clock oscillator is selected,1: LOCO clock oscillator is selected"
|
|
group.word 0x2A++0x01
|
|
line.word 0x00 "RFRH,Frequency Register H"
|
|
hexmask.word 0x00 1.--15. 1. "Reserved,These bits are read as 000000000000000"
|
|
bitfld.word 0x00 0. "RFC16,Frequency Comparison Value (b16) To generate the operating clock from the LOCOclock this bit sets the comparison value of the 128-Hz clock cycle" "0,1"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "RFRL,Frequency Register L"
|
|
hexmask.word 0x00 0.--15. 1. "RFC,Frequency Comparison Value(b15-b0) To generate the operating clock from the main clock this bit sets the comparison value of the 128-Hz clock cycle"
|
|
group.byte 0x2E++0x00
|
|
line.byte 0x00 "RADJ,Time Error Adjustment Register"
|
|
bitfld.byte 0x00 6.--7. "PMADJ,Plus-Minus" "0: Adjustment is not performed,1: Adjustment is performed by the addition to..,2: Adjustment is performed by the subtraction..,3: Setting prohibited"
|
|
bitfld.byte 0x00 0.--5. "ADJ,Adjustment Value These bits specify the adjustment value from the prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
tree "SCI (Serial Communication Interface)"
|
|
tree "SCI0"
|
|
base ad:0x40070000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMR,Serial Mode Register (SCMR.SMIF = 0)"
|
|
bitfld.byte 0x00 7. "CM,Communications Mode" "0: Asynchronous mode or simple I2C mode,1: Clock synchronous mode"
|
|
bitfld.byte 0x00 6. "CHR,Character Length(Valid only in asynchronous mode)" "0: Transmit/receive in 9-bit data..,1: Transmit/receive in 9-bit data.."
|
|
newline
|
|
bitfld.byte 0x00 5. "PE,Parity Enable(Valid only in asynchronous mode)" "0: Parity bit addition is not performed..,1: The parity bit is added (transmitting) / The.."
|
|
bitfld.byte 0x00 4. "PM,Parity Mode (Valid only when the PE bit is 1)" "0: Selects even parity,1: Selects odd parity"
|
|
newline
|
|
bitfld.byte 0x00 3. "STOP,Stop Bit Length(Valid only in asynchronous mode)" "0: 1 stop bit,1: 2 stop bits"
|
|
bitfld.byte 0x00 2. "MP,Multi-Processor Mode(Valid only in asynchronous mode)" "0: Multi-processor communications function is..,1: Multi-processor communications function is.."
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "CKS,Clock Select" "0: PCLK clock,1: PCLK/4 clock,2: PCLK/16 clock,3: PCLK/64 clock"
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMR_SMCI,Serial mode register (SCMR.SMIF = 1)"
|
|
bitfld.byte 0x00 7. "GM,GSM Mode" "0: Normal mode operation,1: GSM mode operation"
|
|
bitfld.byte 0x00 6. "BLK,Block Transfer Mode" "0: Normal mode operation,1: Block transfer mode operation"
|
|
newline
|
|
bitfld.byte 0x00 5. "PE,Parity Enable(Valid only in asynchronous mode)" "0: Setting Prohibited,1: Set this bit to 1 in smart card interface mode"
|
|
bitfld.byte 0x00 4. "PM,Parity Mode (Valid only when the PE bit is 1)" "0: Selects even parity,1: Selects odd parity"
|
|
newline
|
|
bitfld.byte 0x00 2.--3. "BCP,Base Clock Pulse" "0: 93 clock cycles(S=93) (SCMR.BCP2=0) / 32..,1: 128 clock cycles(S=128) (SCMR.BCP2=0) / 64..,2: 186 clock cycles(S=186) (SCMR.BCP2=0) / 372..,3: 512 clock cycles(S=512) (SCMR.BCP2=0) / 256.."
|
|
bitfld.byte 0x00 0.--1. "CKS,Clock Select" "0: PCLK clock,1: PCLK/4 clock,2: PCLK/16 clock,3: PCLK/64 clock"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "BRR,Bit Rate Register"
|
|
hexmask.byte 0x00 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "SCR,Serial Control Register (SCMR.SMIF = 0)"
|
|
bitfld.byte 0x00 7. "TIE,Transmit Interrupt Enable" "0: TXI interrupt request is disabled,1: TXI interrupt request is enabled"
|
|
bitfld.byte 0x00 6. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled"
|
|
newline
|
|
bitfld.byte 0x00 5. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled"
|
|
bitfld.byte 0x00 4. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled"
|
|
newline
|
|
bitfld.byte 0x00 3. "MPIE,Multi-Processor Interrupt Enable(Valid in asynchronous mode when SMR.MP = 1)" "0: Normal reception,1: When the data with the multi-processor bit.."
|
|
bitfld.byte 0x00 2. "TEIE,Transmit End Interrupt Enable" "0: TEI interrupt request is disabled,1: TEI interrupt request is enabled"
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "CKE,Clock Enable" "0: The SCKn pin is available for use as an I/O..,1: The clock with the same frequency as the bit..,?..."
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "SCR_SMCI,Serial Control Register (SCMR.SMIF =1)"
|
|
bitfld.byte 0x00 7. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled"
|
|
bitfld.byte 0x00 6. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled"
|
|
newline
|
|
bitfld.byte 0x00 5. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled"
|
|
bitfld.byte 0x00 4. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled"
|
|
newline
|
|
bitfld.byte 0x00 3. "MPIE,This bit should be 0 in smart card interface mode" "0,1"
|
|
bitfld.byte 0x00 2. "TEIE,This bit should be 0 in smart card interface mode" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "CKE,Clock Enable" "0: Output disabled(SMR_SMCI.GM=0) / Output fixed..,1: Clock Output,2: Setting prohibited(SMR_SMCI.GM=0) / Output..,3: Setting prohibited(SMR_SMCI.GM=0) / Clock.."
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "TDR,Transmit Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. "TDR,TDR is an 8-bit register that stores transmit data"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SSR,Serial Status Register(SCMR.SMIF = 0 and FCR.FM=0)"
|
|
bitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register"
|
|
bitfld.byte 0x00 6. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register"
|
|
newline
|
|
bitfld.byte 0x00 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred"
|
|
bitfld.byte 0x00 4. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred"
|
|
newline
|
|
bitfld.byte 0x00 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
|
|
rbitfld.byte 0x00 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed"
|
|
newline
|
|
rbitfld.byte 0x00 1. "MPB,Multi-Processor Bit" "0: Data transmission cycles,1: ID transmission cycles"
|
|
bitfld.byte 0x00 0. "MPBT,Multi-Processor Bit Transfer" "0: Data transmission cycles,1: ID transmission cycles"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SSR_FIFO,Serial Status Register(SCMR.SMIF = 0 and FCR.FM=1)"
|
|
bitfld.byte 0x00 7. "TDFE,Transmit FIFO data empty flag" "0: The quantity of transmit data written in FTDR..,1: The quantity of transmit data written in FTDR.."
|
|
bitfld.byte 0x00 6. "RDF,Receive FIFO data full flag" "0: The quantity of receive data written in FRDR..,1: The quantity of receive data written in FRDR.."
|
|
newline
|
|
bitfld.byte 0x00 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred"
|
|
bitfld.byte 0x00 4. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred"
|
|
newline
|
|
bitfld.byte 0x00 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
|
|
bitfld.byte 0x00 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed"
|
|
newline
|
|
bitfld.byte 0x00 1. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 0. "DR,Receive Data Ready flag(Valid only in asynchronous mode(including multi-processor) and FIFO selected)" "0: Receiving is in progress or no received data..,1: Next receive data has not been received for a.."
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group.byte 0x04++0x00
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line.byte 0x00 "SSR_SMCI,Serial Status Register(SCMR.SMIF = 1)"
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|
bitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register"
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|
bitfld.byte 0x00 6. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register"
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bitfld.byte 0x00 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred"
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bitfld.byte 0x00 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded"
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bitfld.byte 0x00 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
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|
rbitfld.byte 0x00 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed"
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rbitfld.byte 0x00 1. "MPB,Multi-ProcessorThis bit should be 0 in smart card interface mode" "0,1"
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|
bitfld.byte 0x00 0. "MPBT,Multi-Processor Bit TransferThis bit should be 0 in smart card interface mode" "0,1"
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|
rgroup.byte 0x05++0x00
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|
line.byte 0x00 "RDR,Receive Data Register"
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hexmask.byte 0x00 0.--7. 1. "RDR,RDR is an 8-bit register that stores receive data"
|
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group.byte 0x06++0x00
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line.byte 0x00 "SCMR,Smart Card Mode Register"
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bitfld.byte 0x00 7. "BCP2,Base Clock Pulse 2Selects the number of base clock cycles in combination with the SMR.BCP[1:0] bits" "0: S=93(SMR.BCP[1:0]=00) 128(SMR.BCP[1:0]=01)..,1: S=32(SMR.BCP[1:0]=00) 64(SMR.BCP[1:0]=01).."
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bitfld.byte 0x00 5.--6. "Reserved,These bits are read as 11" "0,1,2,3"
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bitfld.byte 0x00 4. "CHR1,Character Length 1(Only valid in asynchronous mode)" "0: Transmit/receive in 9-bit data length,1: Transmit/receive in 8-bit data.."
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bitfld.byte 0x00 3. "SDIR,Transmitted/Received Data Transfer DirectionNOTE: The setting is invalid and a fixed data length of 8 bits is used in modes other than asynchronous mode.Set this bit to 1 if operation is to be in simple I2C mode" "0: Transfer with LSB first,1: Transfer with MSB first"
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bitfld.byte 0x00 2. "SINV,Transmitted/Received Data InvertSet this bit to 0 if operation is to be in simple I2C mode" "0: TDR contents are transmitted as they are,1: TDR contents are inverted before being.."
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bitfld.byte 0x00 1. "Reserved,This bit is read as 1" "0,1"
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bitfld.byte 0x00 0. "SMIF,Smart Card Interface Mode Select" "0: Non-smart card interface mode(Asynchronous..,1: Smart card interface mode"
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group.byte 0x07++0x00
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line.byte 0x00 "SEMR,Serial Extended Mode Register"
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bitfld.byte 0x00 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select(Valid only in asynchronous mode)" "0: The low level on the RXDn pin is detected as..,1: A falling edge on the RXDn pin is detected as.."
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bitfld.byte 0x00 6. "BGDM,Baud Rate Generator Double-Speed Mode Select(Only valid the CKE[1] bit in SCR is 0 in asynchronous mode)" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.."
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bitfld.byte 0x00 5. "NFEN,Digital Noise Filter Function Enable(The NFEN bit should be 0 without simple I2C mode and asynchronous mode.)In asynchronous mode for RXDn input only" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.."
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bitfld.byte 0x00 4. "ABCS,Asynchronous Mode Base Clock Select(Valid only in asynchronous mode)" "0: Selects 16 base clock cycles for 1-bit period,1: Selects 8 base clock cycles for 1-bit period"
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bitfld.byte 0x00 3. "ABCSE,Asynchronous Mode Extended Base Clock Select1(Valid only in asynchronous mode and SCR.CKE[1]=0)" "0: Clock cycles for 1-bit period is decided with..,1: Baud rate is 6 base clock cycles for 1-bit.."
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bitfld.byte 0x00 2. "BRME,Bit Rate Modulation Enable" "0: Bit rate modulation function is disabled,1: Bit rate modulation function is enabled"
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bitfld.byte 0x00 0.--1. "Reserved,These bits are read as 00" "0,1,2,3"
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group.byte 0x08++0x00
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line.byte 0x00 "SNFR,Noise Filter Setting Register"
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bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.byte 0x00 0.--2. "NFCS,Noise Filter Clock Select" "0: The clock signal divided by 1 is used with..,1: The clock signal divided by 1 is used with..,2: The clock signal divided by 2 is used with..,3: The clock signal divided by 4 is used with..,4: The clock signal divided by 8 is used with..,?..."
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group.byte 0x09++0x00
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line.byte 0x00 "SIMR1,I2C Mode Register 1"
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bitfld.byte 0x00 3.--7. "IICDL,SSDA Delay Output SelectCycles below are of the clock signal from the on-chip baud rate generator" "0: No output delay,?..."
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bitfld.byte 0x00 1.--2. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.byte 0x00 0. "IICM,Simple I2C Mode Select" "0: Asynchronous mode Multi-processor mode Clock..,1: Simple I2C mode(SCMR.SMIF=0) / Setting.."
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group.byte 0x0A++0x00
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line.byte 0x00 "SIMR2,I2C Mode Register 2"
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bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.byte 0x00 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK"
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bitfld.byte 0x00 2.--4. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.byte 0x00 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal"
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bitfld.byte 0x00 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts,1: Use reception and transmission interrupts"
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group.byte 0x0B++0x00
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line.byte 0x00 "SIMR3,IIC Mode Register 3"
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bitfld.byte 0x00 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition,2: Output the low level on the SSCLn pin,3: Place the SSCLn pin in the high-impedance state"
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bitfld.byte 0x00 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition,2: Output the low level on the SSDAn pin,3: Place the SSDAn pin in the high-impedance state"
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bitfld.byte 0x00 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag(When 0 is written to IICSTIF it is cleared to 0.)" "0: There are no requests for generating..,1: A start restart or stop condition is.."
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bitfld.byte 0x00 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated,1: A stop condition is generated"
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bitfld.byte 0x00 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated,1: A restart condition is generated"
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bitfld.byte 0x00 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated,1: A start condition is generated"
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rgroup.byte 0x0C++0x00
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line.byte 0x00 "SISR,IIC Status Register"
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bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.byte 0x00 4.--5. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 2. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 1. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received"
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group.byte 0x0D++0x00
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line.byte 0x00 "SPMR,SPI Mode Register"
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bitfld.byte 0x00 7. "CKPH,Clock Phase Select" "0: Clock is not delayed,1: Clock is delayed"
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bitfld.byte 0x00 6. "CKPOL,Clock Polarity Select" "0: Clock polarity is not inverted,1: Clock polarity is inverted"
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bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 4. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error"
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bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 2. "MSS,Master Slave Select" "0: Transmission is through the TXDn pin and..,1: Reception is through the TXDn pin and.."
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bitfld.byte 0x00 1. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function..,1: CTS function is enabled"
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bitfld.byte 0x00 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled,1: SSn# pin function is enabled"
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group.word 0x0E++0x01
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line.word 0x00 "TDRHL,Transmit 9-bit Data Register"
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hexmask.word 0x00 0.--15. 1. "TDRHL,TDRHL is a 16-bit register that stores transmit data"
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wgroup.word 0x0E++0x01
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line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL"
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bitfld.word 0x00 10.--15. "Reserved,The write value should be 111111" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "MPBT,Multi-processor transfer bit flag(Valid only in asynchronous mode and SMR.MP=1 and FIFO selected)" "0: Data transmission cycles,1: ID transmission cycles"
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hexmask.word 0x00 0.--8. 1. "TDAT,Serial transmit data (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)"
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wgroup.byte 0x0E++0x00
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line.byte 0x00 "FTDRH,Transmit FIFO Data Register H"
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bitfld.byte 0x00 2.--7. "Reserved,The write value should be 111111" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.byte 0x00 1. "MPBT,Multi-processor transfer bit flag(Valid only in asynchronous mode and SMR.MP=1 and FIFO selected)" "0: Data transmission cycles,1: ID transmission cycles"
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bitfld.byte 0x00 0. "TDATH,Serial transmit data (b8) (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" "0,1"
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wgroup.byte 0x0F++0x00
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line.byte 0x00 "FTDRL,Transmit FIFO Data Register L"
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hexmask.byte 0x00 0.--7. 1. "TDATL,Serial transmit data(b7-b0) (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)"
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rgroup.word 0x10++0x01
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line.word 0x00 "RDRHL,Receive 9-bit Data Register"
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hexmask.word 0x00 0.--15. 1. "RDRHL,RDRHL is an 16-bit register that stores receive data"
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rgroup.word 0x10++0x01
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line.word 0x00 "FRDRHL,Receive FIFO Data Register HL"
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bitfld.word 0x00 15. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 14. "RDF,Receive FIFO data full flag(It is same as SSR.RDF)" "0: The quantity of receive data written in FRDRH..,1: The quantity of receive data written in FRDRH.."
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bitfld.word 0x00 13. "ORER,Overrun error flag(It is same as SSR.ORER)" "0: No overrun error occurred,1: An overrun error has occurred"
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bitfld.word 0x00 12. "FER,Framing error flag" "0: No framing error occurred at the first data..,1: A framing error has occurred at the first.."
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bitfld.word 0x00 11. "PER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data.."
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bitfld.word 0x00 10. "DR,Receive data ready flag(It is same as SSR.DR)" "0: Receiving is in progress or no received data..,1: Next receive data has not been received for a.."
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bitfld.word 0x00 9. "MPB,Multi-processor bit flag(Valid only in asynchronous mode with SMR.MP=1 and FIFO selected) It can read multi-processor bit corresponded to serial receive data(RDATA[8:0])" "0: Data transmission cycles,1: ID transmission cycles"
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hexmask.word 0x00 0.--8. 1. "RDAT,Serial receive data(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)"
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rgroup.byte 0x10++0x00
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line.byte 0x00 "FRDRH,Receive FIFO Data Register H"
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bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 6. "RDF,Receive FIFO data full flag(It is same as SSR.RDF)" "0: The quantity of receive data written in FRDRH..,1: The quantity of receive data written in FRDRH.."
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bitfld.byte 0x00 5. "ORER,Overrun error flag(It is same as SSR.ORER)" "0: No overrun error occurred,1: An overrun error has occurred"
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bitfld.byte 0x00 4. "FER,Framing error flag" "0: No framing error occurred at the first data..,1: A framing error has occurred at the first.."
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bitfld.byte 0x00 3. "PER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data.."
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bitfld.byte 0x00 2. "DR,Receive data ready flag(It is same as SSR.DR)" "0: Receiving is in progress or no received data..,1: Next receive data has not been received for a.."
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bitfld.byte 0x00 1. "MPB,Multi-processor bit flag(Valid only in asynchronous mode with SMR.MP=1 and FIFO selected) It can read multi-processor bit corresponded to serial receive data(RDATA[8:0])" "0: Data transmission cycles,1: ID transmission cycles"
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bitfld.byte 0x00 0. "RDATH,Serial receive data(b8)(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" "0,1"
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rgroup.byte 0x11++0x00
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line.byte 0x00 "FRDRL,Receive FIFO Data Register L"
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hexmask.byte 0x00 0.--7. 1. "RDATL,Serial receive data(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)NOTE: When reading both of FRDRH register and FRDRL register please read by an order of the FRDRH register and the FRDRL.."
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group.byte 0x12++0x00
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line.byte 0x00 "MDDR,Modulation Duty Register"
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hexmask.byte 0x00 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR register"
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group.byte 0x13++0x00
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line.byte 0x00 "DCCR,Data Compare Match Control Register"
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bitfld.byte 0x00 7. "DCME,Data Compare Match Enable(Valid only in asynchronous mode(including multi-processor)" "0: Address match function is disabled,1: Address match function is enabled"
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bitfld.byte 0x00 6. "IDSEL,ID frame select Bit(Valid only in asynchronous mode(including multi-processor)" "0: Always compare data regardless of the value..,1: Compare data when the MPB bit is 1 (ID frame).."
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bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 4. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred"
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bitfld.byte 0x00 3. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
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bitfld.byte 0x00 1.--2. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.byte 0x00 0. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched"
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group.word 0x14++0x01
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line.word 0x00 "FCR,FIFO Control Register"
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bitfld.word 0x00 12.--15. "RSTRG,RTS# Output Active Trigger Number Select(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.word 0x00 8.--11. "RTRG,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.word 0x00 4.--7. "TTRG,Transmit FIFO data trigger number(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.word 0x00 3. "DRES,Receive data ready error select bit(When detecting a reception data ready the interrupt request is selected.)" "0: Reception data full interrupt (RXIn),1: Receive error interrupt (ERIn)"
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bitfld.word 0x00 2. "TFRST,Transmit FIFO Data Register Reset(Valid only in FCR.FM=1)" "0: Not reset to FTDRHL,1: Reset to FTDRHL"
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bitfld.word 0x00 1. "RFRST,Receive FIFO Data Register Reset(Valid only in FCR.FM=1)" "0: Not reset to FRDRHL,1: Reset to FRDRHL"
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bitfld.word 0x00 0. "FM,FIFO Mode Select(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode)" "0: Non-FIFO mode,1: FIFO mode"
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rgroup.word 0x16++0x01
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line.word 0x00 "FDR,FIFO Data Count Register"
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bitfld.word 0x00 13.--15. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 8.--12. "T,Transmit FIFO Data CountIndicate the quantity of non-transmit data stored in FTDRH and FTDRL(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode while FCR.FM=1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.word 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 0.--4. "R,Receive FIFO Data CountIndicate the quantity of receive data stored in FRDRH and FRDRL(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode while FCR.FM=1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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rgroup.word 0x18++0x01
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line.word 0x00 "LSR,Line Status Register"
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bitfld.word 0x00 13.--15. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 8.--12. "PNUM,Parity Error CountIndicates the quantity of data with a parity error among the receive data stored in the receive FIFO data register (FRDRH and FRDRL)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.word 0x00 7. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 2.--6. "FNUM,Framing Error CountIndicates the quantity of data with a framing error among the receive data stored in the receive FIFO data register (FRDRH and FRDRL)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.word 0x00 1. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 0. "ORER,Overrun Error Flag (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" "0: No overrun error occurred,1: An overrun error has occurred"
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group.word 0x1A++0x01
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line.word 0x00 "CDR,Compare Match Data Register"
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hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
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hexmask.word 0x00 0.--8. 1. "CMPD,Compare Match DataCompare data pattern for address match wake-up function"
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group.byte 0x1C++0x00
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line.byte 0x00 "SPTR,Serial Port Register"
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bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.byte 0x00 2. "SPB2IO,Serial port break I/O bit(It's selected whether the value of SPB2DT is output to TxD terminal.)" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD.."
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bitfld.byte 0x00 1. "SPB2DT,Serial port break data select bit(The output level of TxD terminal is selected when SCR.TE = 0.)" "0: Low level is output in TxD terminal,1: High level is output in TxD terminal"
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rbitfld.byte 0x00 0. "RXDMON,Serial input data monitor bit(The state of the RXD terminal is shown.)" "0: RXD terminal is the Low level,1: RXD terminal is the High level"
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tree.end
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tree "SCI1"
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base ad:0x40070020
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group.byte 0x00++0x00
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line.byte 0x00 "SMR,Serial Mode Register (SCMR.SMIF = 0)"
|
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bitfld.byte 0x00 7. "CM,Communications Mode" "0: Asynchronous mode or simple I2C mode,1: Clock synchronous mode"
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|
bitfld.byte 0x00 6. "CHR,Character Length(Valid only in asynchronous mode)" "0: Transmit/receive in 9-bit data..,1: Transmit/receive in 9-bit data.."
|
|
newline
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|
bitfld.byte 0x00 5. "PE,Parity Enable(Valid only in asynchronous mode)" "0: Parity bit addition is not performed..,1: The parity bit is added (transmitting) / The.."
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|
bitfld.byte 0x00 4. "PM,Parity Mode (Valid only when the PE bit is 1)" "0: Selects even parity,1: Selects odd parity"
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|
newline
|
|
bitfld.byte 0x00 3. "STOP,Stop Bit Length(Valid only in asynchronous mode)" "0: 1 stop bit,1: 2 stop bits"
|
|
bitfld.byte 0x00 2. "MP,Multi-Processor Mode(Valid only in asynchronous mode)" "0: Multi-processor communications function is..,1: Multi-processor communications function is.."
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "CKS,Clock Select" "0: PCLK clock,1: PCLK/4 clock,2: PCLK/16 clock,3: PCLK/64 clock"
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|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SMR_SMCI,Serial mode register (SCMR.SMIF = 1)"
|
|
bitfld.byte 0x00 7. "GM,GSM Mode" "0: Normal mode operation,1: GSM mode operation"
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|
bitfld.byte 0x00 6. "BLK,Block Transfer Mode" "0: Normal mode operation,1: Block transfer mode operation"
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|
newline
|
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bitfld.byte 0x00 5. "PE,Parity Enable(Valid only in asynchronous mode)" "0: Setting Prohibited,1: Set this bit to 1 in smart card interface mode"
|
|
bitfld.byte 0x00 4. "PM,Parity Mode (Valid only when the PE bit is 1)" "0: Selects even parity,1: Selects odd parity"
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|
newline
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bitfld.byte 0x00 2.--3. "BCP,Base Clock Pulse" "0: 93 clock cycles(S=93) (SCMR.BCP2=0) / 32..,1: 128 clock cycles(S=128) (SCMR.BCP2=0) / 64..,2: 186 clock cycles(S=186) (SCMR.BCP2=0) / 372..,3: 512 clock cycles(S=512) (SCMR.BCP2=0) / 256.."
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|
bitfld.byte 0x00 0.--1. "CKS,Clock Select" "0: PCLK clock,1: PCLK/4 clock,2: PCLK/16 clock,3: PCLK/64 clock"
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|
group.byte 0x01++0x00
|
|
line.byte 0x00 "BRR,Bit Rate Register"
|
|
hexmask.byte 0x00 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "SCR,Serial Control Register (SCMR.SMIF = 0)"
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|
bitfld.byte 0x00 7. "TIE,Transmit Interrupt Enable" "0: TXI interrupt request is disabled,1: TXI interrupt request is enabled"
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|
bitfld.byte 0x00 6. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled"
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|
newline
|
|
bitfld.byte 0x00 5. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled"
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|
bitfld.byte 0x00 4. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled"
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newline
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bitfld.byte 0x00 3. "MPIE,Multi-Processor Interrupt Enable(Valid in asynchronous mode when SMR.MP = 1)" "0: Normal reception,1: When the data with the multi-processor bit.."
|
|
bitfld.byte 0x00 2. "TEIE,Transmit End Interrupt Enable" "0: TEI interrupt request is disabled,1: TEI interrupt request is enabled"
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newline
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bitfld.byte 0x00 0.--1. "CKE,Clock Enable" "0: The SCKn pin is available for use as an I/O..,1: The clock with the same frequency as the bit..,?..."
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|
group.byte 0x02++0x00
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|
line.byte 0x00 "SCR_SMCI,Serial Control Register (SCMR.SMIF =1)"
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|
bitfld.byte 0x00 7. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled"
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|
bitfld.byte 0x00 6. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled"
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|
newline
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bitfld.byte 0x00 5. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled"
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|
bitfld.byte 0x00 4. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled"
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newline
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bitfld.byte 0x00 3. "MPIE,This bit should be 0 in smart card interface mode" "0,1"
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bitfld.byte 0x00 2. "TEIE,This bit should be 0 in smart card interface mode" "0,1"
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newline
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bitfld.byte 0x00 0.--1. "CKE,Clock Enable" "0: Output disabled(SMR_SMCI.GM=0) / Output fixed..,1: Clock Output,2: Setting prohibited(SMR_SMCI.GM=0) / Output..,3: Setting prohibited(SMR_SMCI.GM=0) / Clock.."
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|
group.byte 0x03++0x00
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line.byte 0x00 "TDR,Transmit Data Register"
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|
hexmask.byte 0x00 0.--7. 1. "TDR,TDR is an 8-bit register that stores transmit data"
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|
group.byte 0x04++0x00
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line.byte 0x00 "SSR,Serial Status Register(SCMR.SMIF = 0 and FCR.FM=0)"
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|
bitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register"
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|
bitfld.byte 0x00 6. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register"
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newline
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bitfld.byte 0x00 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred"
|
|
bitfld.byte 0x00 4. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred"
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newline
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bitfld.byte 0x00 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
|
|
rbitfld.byte 0x00 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed"
|
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newline
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rbitfld.byte 0x00 1. "MPB,Multi-Processor Bit" "0: Data transmission cycles,1: ID transmission cycles"
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bitfld.byte 0x00 0. "MPBT,Multi-Processor Bit Transfer" "0: Data transmission cycles,1: ID transmission cycles"
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group.byte 0x04++0x00
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|
line.byte 0x00 "SSR_SMCI,Serial Status Register(SCMR.SMIF = 1)"
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bitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register"
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|
bitfld.byte 0x00 6. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register"
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newline
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bitfld.byte 0x00 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred"
|
|
bitfld.byte 0x00 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded"
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|
newline
|
|
bitfld.byte 0x00 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
|
|
rbitfld.byte 0x00 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed"
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newline
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rbitfld.byte 0x00 1. "MPB,Multi-ProcessorThis bit should be 0 in smart card interface mode" "0,1"
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bitfld.byte 0x00 0. "MPBT,Multi-Processor Bit TransferThis bit should be 0 in smart card interface mode" "0,1"
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|
rgroup.byte 0x05++0x00
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|
line.byte 0x00 "RDR,Receive Data Register"
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hexmask.byte 0x00 0.--7. 1. "RDR,RDR is an 8-bit register that stores receive data"
|
|
group.byte 0x06++0x00
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line.byte 0x00 "SCMR,Smart Card Mode Register"
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|
bitfld.byte 0x00 7. "BCP2,Base Clock Pulse 2Selects the number of base clock cycles in combination with the SMR.BCP[1:0] bits" "0: S=93(SMR.BCP[1:0]=00) 128(SMR.BCP[1:0]=01)..,1: S=32(SMR.BCP[1:0]=00) 64(SMR.BCP[1:0]=01).."
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|
bitfld.byte 0x00 5.--6. "Reserved,These bits are read as 11" "0,1,2,3"
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newline
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bitfld.byte 0x00 4. "CHR1,Character Length 1(Only valid in asynchronous mode)" "0: Transmit/receive in 9-bit data length,1: Transmit/receive in 8-bit data.."
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|
bitfld.byte 0x00 3. "SDIR,Transmitted/Received Data Transfer DirectionNOTE: The setting is invalid and a fixed data length of 8 bits is used in modes other than asynchronous mode.Set this bit to 1 if operation is to be in simple I2C mode" "0: Transfer with LSB first,1: Transfer with MSB first"
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newline
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bitfld.byte 0x00 2. "SINV,Transmitted/Received Data InvertSet this bit to 0 if operation is to be in simple I2C mode" "0: TDR contents are transmitted as they are,1: TDR contents are inverted before being.."
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|
bitfld.byte 0x00 1. "Reserved,This bit is read as 1" "0,1"
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newline
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bitfld.byte 0x00 0. "SMIF,Smart Card Interface Mode Select" "0: Non-smart card interface mode(Asynchronous..,1: Smart card interface mode"
|
|
group.byte 0x07++0x00
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line.byte 0x00 "SEMR,Serial Extended Mode Register"
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bitfld.byte 0x00 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select(Valid only in asynchronous mode)" "0: The low level on the RXDn pin is detected as..,1: A falling edge on the RXDn pin is detected as.."
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bitfld.byte 0x00 6. "BGDM,Baud Rate Generator Double-Speed Mode Select(Only valid the CKE[1] bit in SCR is 0 in asynchronous mode)" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.."
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newline
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bitfld.byte 0x00 5. "NFEN,Digital Noise Filter Function Enable(The NFEN bit should be 0 without simple I2C mode and asynchronous mode.)In asynchronous mode for RXDn input only" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.."
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bitfld.byte 0x00 4. "ABCS,Asynchronous Mode Base Clock Select(Valid only in asynchronous mode)" "0: Selects 16 base clock cycles for 1-bit period,1: Selects 8 base clock cycles for 1-bit period"
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newline
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bitfld.byte 0x00 3. "ABCSE,Asynchronous Mode Extended Base Clock Select1(Valid only in asynchronous mode and SCR.CKE[1]=0)" "0: Clock cycles for 1-bit period is decided with..,1: Baud rate is 6 base clock cycles for 1-bit.."
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bitfld.byte 0x00 2. "BRME,Bit Rate Modulation Enable" "0: Bit rate modulation function is disabled,1: Bit rate modulation function is enabled"
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newline
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bitfld.byte 0x00 0.--1. "Reserved,These bits are read as 00" "0,1,2,3"
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group.byte 0x08++0x00
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line.byte 0x00 "SNFR,Noise Filter Setting Register"
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|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.byte 0x00 0.--2. "NFCS,Noise Filter Clock Select" "0: The clock signal divided by 1 is used with..,1: The clock signal divided by 1 is used with..,2: The clock signal divided by 2 is used with..,3: The clock signal divided by 4 is used with..,4: The clock signal divided by 8 is used with..,?..."
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group.byte 0x09++0x00
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line.byte 0x00 "SIMR1,I2C Mode Register 1"
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|
bitfld.byte 0x00 3.--7. "IICDL,SSDA Delay Output SelectCycles below are of the clock signal from the on-chip baud rate generator" "0: No output delay,?..."
|
|
bitfld.byte 0x00 1.--2. "Reserved,These bits are read as 00" "0,1,2,3"
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newline
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bitfld.byte 0x00 0. "IICM,Simple I2C Mode Select" "0: Asynchronous mode Multi-processor mode Clock..,1: Simple I2C mode(SCMR.SMIF=0) / Setting.."
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group.byte 0x0A++0x00
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line.byte 0x00 "SIMR2,I2C Mode Register 2"
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bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.byte 0x00 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK"
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newline
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bitfld.byte 0x00 2.--4. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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|
bitfld.byte 0x00 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal"
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|
newline
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bitfld.byte 0x00 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts,1: Use reception and transmission interrupts"
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group.byte 0x0B++0x00
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line.byte 0x00 "SIMR3,IIC Mode Register 3"
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bitfld.byte 0x00 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition,2: Output the low level on the SSCLn pin,3: Place the SSCLn pin in the high-impedance state"
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bitfld.byte 0x00 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition,2: Output the low level on the SSDAn pin,3: Place the SSDAn pin in the high-impedance state"
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newline
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bitfld.byte 0x00 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag(When 0 is written to IICSTIF it is cleared to 0.)" "0: There are no requests for generating..,1: A start restart or stop condition is.."
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bitfld.byte 0x00 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated,1: A stop condition is generated"
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newline
|
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bitfld.byte 0x00 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated,1: A restart condition is generated"
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|
bitfld.byte 0x00 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated,1: A start condition is generated"
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|
rgroup.byte 0x0C++0x00
|
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line.byte 0x00 "SISR,IIC Status Register"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 4.--5. "Reserved,These bits are read as 00" "0,1,2,3"
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|
newline
|
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bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "Reserved,This bit is read as 0" "0,1"
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|
newline
|
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bitfld.byte 0x00 1. "Reserved,This bit is read as 0" "0,1"
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|
bitfld.byte 0x00 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received"
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|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "SPMR,SPI Mode Register"
|
|
bitfld.byte 0x00 7. "CKPH,Clock Phase Select" "0: Clock is not delayed,1: Clock is delayed"
|
|
bitfld.byte 0x00 6. "CKPOL,Clock Polarity Select" "0: Clock polarity is not inverted,1: Clock polarity is inverted"
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|
newline
|
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bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 4. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 2. "MSS,Master Slave Select" "0: Transmission is through the TXDn pin and..,1: Reception is through the TXDn pin and.."
|
|
newline
|
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bitfld.byte 0x00 1. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function..,1: CTS function is enabled"
|
|
bitfld.byte 0x00 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled,1: SSn# pin function is enabled"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "TDRHL,Transmit 9-bit Data Register"
|
|
hexmask.word 0x00 0.--15. 1. "TDRHL,TDRHL is a 16-bit register that stores transmit data"
|
|
rgroup.word 0x10++0x01
|
|
line.word 0x00 "RDRHL,Receive 9-bit Data Register"
|
|
hexmask.word 0x00 0.--15. 1. "RDRHL,RDRHL is an 16-bit register that stores receive data"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "MDDR,Modulation Duty Register"
|
|
hexmask.byte 0x00 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR register"
|
|
group.byte 0x13++0x00
|
|
line.byte 0x00 "DCCR,Data Compare Match Control Register"
|
|
bitfld.byte 0x00 7. "DCME,Data Compare Match Enable(Valid only in asynchronous mode(including multi-processor)" "0: Address match function is disabled,1: Address match function is enabled"
|
|
bitfld.byte 0x00 6. "IDSEL,ID frame select Bit(Valid only in asynchronous mode(including multi-processor)" "0: Always compare data regardless of the value..,1: Compare data when the MPB bit is 1 (ID frame).."
|
|
newline
|
|
bitfld.byte 0x00 5. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 4. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred"
|
|
newline
|
|
bitfld.byte 0x00 3. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred"
|
|
bitfld.byte 0x00 1.--2. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 0. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched"
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "CDR,Compare Match Data Register"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
hexmask.word 0x00 0.--8. 1. "CMPD,Compare Match DataCompare data pattern for address match wake-up function"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "SPTR,Serial Port Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 2. "SPB2IO,Serial port break I/O bit(It's selected whether the value of SPB2DT is output to TxD terminal.)" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD.."
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|
newline
|
|
bitfld.byte 0x00 1. "SPB2DT,Serial port break data select bit(The output level of TxD terminal is selected when SCR.TE = 0.)" "0: Low level is output in TxD terminal,1: High level is output in TxD terminal"
|
|
rbitfld.byte 0x00 0. "RXDMON,Serial input data monitor bit(The state of the RXD terminal is shown.)" "0: RXD terminal is the Low level,1: RXD terminal is the High level"
|
|
tree.end
|
|
tree.end
|
|
tree "SDADC24 (24-bit Sigma-Delta A/D Converter)"
|
|
base ad:0x4009C000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "STC1,Startup Control Register 1"
|
|
bitfld.word 0x00 15. "VREFSEL,VREF mode select" "0: Internal VREF mode,1: External VREF mode"
|
|
bitfld.word 0x00 12.--14. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.word 0x00 8.--11. "VSBIAS,Reference voltage select" "0: 0.8 V,1: 1.0 V,2: 1.2 V,3: 1.4 V,4: 1.6 V,5: 1.8 V,6: 2.0 V,7: 2.2 V,?,?,?,?,?,?,?,15: 2.4 V (This voltage can be set only if.."
|
|
bitfld.word 0x00 7. "SDADLPM,A/D conversion operation mode select" "0: Normal A/D conversion mode,1: Low-power A/D conversion mode(1/8 of the.."
|
|
newline
|
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bitfld.word 0x00 4.--6. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 0.--3. "CLKDIV,SDADC24 reference clock division select" "0: SDADCCLK (no division),1: SDADCCLK/2 (1/2),2: SDADCCLK/3 (1/3),3: SDADCCLK/4 (1/4),4: SDADCCLK/5 (1/5),5: SDADCCLK/6 (1/6),6: SDADCCLK/8 (1/8),7: SDADCCLK/12 (1/12),8: SDADCCLK/16 (1/16),?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "STC2,Startup Control Register 2"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 2. "ADFPWDS,ADREG forced power-down mode" "0: Power of ADREG is controlled by the BGRPON..,1: Power of only ADREG is turned off regardless.."
|
|
newline
|
|
bitfld.byte 0x00 1. "ADCPON,ADC reference supply part power control" "0: Turn off the power of VBIAS PGA and..,1: Turn on the power of VBIAS PGA and.."
|
|
bitfld.byte 0x00 0. "BGRPON,BGR part power control" "0: Turn off the power of ADBGR SBIAS/VREFI and..,1: Turn on the power of ADBGR SBIAS/VREFI and.."
|
|
repeat 5. (strings "0" "1" "2" "3" "4" )(list 0x0 0x4 0x8 0xC 0x10 )
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "PGAC$1,Input Multiplexer"
|
|
bitfld.long 0x00 31. "PGAASN,Selection of the mode for specifying the number of A/D conversions in ADSCAN" "0: Specify 1 to 8 032 times by using the value..,1: Specify 1 to 255 times linearly by using the.."
|
|
bitfld.long 0x00 30. "PGACVE,Calibration enable" "0: Do not calculate the calibration correction..,1: Calculate the calibration correction factor"
|
|
newline
|
|
bitfld.long 0x00 29. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.long 0x00 28. "PGAREV,Single-End Input A/D Converted Data Inversion Select" "0: Do not invert the conversion result data,1: Invert the conversion result data"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "PGAAVE,Selection of averaging processing" "0: Do not average the A/D conversion results,1: Do not average the A/D conversion results,2: Average the A/D conversion results and..,3: Perform averaging and generate SDADC_ADI at.."
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|
bitfld.long 0x00 24.--25. "PGAAVN,Selection of the number of data to be averaged" "0: 00,1: 01,2: 10,3: 11"
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|
newline
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bitfld.long 0x00 21.--23. "PGACTN,Coefficient (n) selection of the A/D conversion count (N) in AUTOSCAN" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,7: 111"
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|
bitfld.long 0x00 16.--20. "PGACTM,Coefficient (m) selection of the A/D conversion count (N) in AUTOSCAN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
newline
|
|
bitfld.long 0x00 15. "PGASEL,Analog Channel Input Mode Select" "0: Differential input mode,1: Single-end input mode"
|
|
bitfld.long 0x00 14. "PGAPOL,Polarity select" "0: Positive-side single-end input,1: Negative-side single-end input"
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|
newline
|
|
bitfld.long 0x00 13. "Reserved,This bit is read as 0" "0,1"
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|
bitfld.long 0x00 8.--12. "PGAOFS,Offset voltage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
newline
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bitfld.long 0x00 5.--7. "PGAOSR,Oversampling ratio select" "0: 000,1: 001,2: 010,3: 011,4: 1024,5: 2048,?..."
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|
bitfld.long 0x00 0.--4. "PGAGC,Gain selection of a programmable gain instrumentation amplifier ( Gset1 Gset2 Gtotal )" "0: (1 1 1),1: (1 2 2),2: (1 4 4),3: (1 8 8),4: (2 1 2),5: (2 2 4),6: (2 4 8),7: (2 8 16),8: (3 1 3),9: (3 2 6),10: (3 4 12),11: (3 8 24),12: (4 1 4),13: (4 2 8),14: (4 4 16),15: (4 8 32),16: (8 1 8),17: (8 2 16),18: (8 4 32),?..."
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|
repeat.end
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ADC1,Sigma-delta A/D Converter Control Register 1"
|
|
hexmask.long.word 0x00 21.--31. 1. "Reserved,These bits are read as 00000000000"
|
|
bitfld.long 0x00 20. "PGASLFT,PGA offset self-diagnosis enable" "0: Disable PGA offset self-diagnosis,1: Enable PGA offset self-diagnosis"
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|
newline
|
|
bitfld.long 0x00 18.--19. "Reserved,These bits are read as 00" "0,1,2,3"
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|
bitfld.long 0x00 17. "PGADISC,Disconnection Detection Assist Setting" "0: Discharge,1: Pre-charge"
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|
newline
|
|
bitfld.long 0x00 16. "PGADISA,Control of disconnection detection" "0: Normal operation,1: State of disconnection detection"
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|
bitfld.long 0x00 13.--15. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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|
newline
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|
bitfld.long 0x00 8.--12. "SDADBMP,A/D conversion control of the signal from input multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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newline
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bitfld.long 0x00 4. "SDADTMD,Selection of A/D conversion trigger signal" "0: Software trigger (conversion is started by a..,1: Hardware trigger (conversion is started in.."
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bitfld.long 0x00 1.--3. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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|
newline
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bitfld.long 0x00 0. "SDADSCM,Selection of autoscan mode" "0: Continuous scan mode,1: Single scan mode"
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "ADC2,Sigma-delta A/D Converter Control Register 2"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
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|
bitfld.byte 0x00 0. "SDADST,Control of A/D conversion" "0: Stop A/D conversion,1: Start A/D conversion"
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|
group.long 0x24++0x03
|
|
line.long 0x00 "ADCR,Sigma-delta A/D Converter Conversion Result Register"
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bitfld.long 0x00 28.--31. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rbitfld.long 0x00 25.--27. "SDADCRC,Channel number for an A/D conversion result" "0: Reset value (Conversion result is invalid),1: Input multiplexer 0 (ANSD0P / ANSD0N),2: Input multiplexer 1 (ANSD1P / ANSD1N),3: Input multiplexer 2 (ANSD2P / ANSD2N),4: Input multiplexer 3 (ANSD3P / ANSD3N),5: Input multiplexer 4 (AMP0O / AMP1O),?..."
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newline
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rbitfld.long 0x00 24. "SDADCRS,Status of an A/D conversion result" "0: Normal status (within the range),1: Overflow occurred"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "SDADCRD,The 24-bit A/D conversion result"
|
|
newline
|
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hexmask.long.word 0x00 0.--15. 1. "Reserved,These bits are read as 0000000000000000"
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|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "ADAR,Sigma-delta A/D Converter Average Value Register"
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bitfld.long 0x00 28.--31. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 25.--27. "SDADMVC,Channel number for an A/D conversion result" "0: Reset value (Conversion result is invalid),1: Input multiplexer 0 (ANSD0P / ANSD0N),2: Input multiplexer 1 (ANSD1P / ANSD1N),3: Input multiplexer 2 (ANSD2P / ANSD2N),4: Input multiplexer 3 (ANSD3P / ANSD3N),5: Input multiplexer 4 (AMP0O / AMP1O),?..."
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|
newline
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bitfld.long 0x00 24. "SDADMVS,Status of an A/D conversion result" "0: Normal status (within the range),1: Overflow occurred"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "SDADMVD,The 24-bit A/D average value"
|
|
newline
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hexmask.long.word 0x00 0.--15. 1. "Reserved,These bits are read as 0000000000000000"
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|
group.byte 0x30++0x00
|
|
line.byte 0x00 "CLBC,Calibration Control Register"
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|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.byte 0x00 0.--1. "CLBMD,These bits are read as 0" "0: Internal calibration mode,1: External offset calibration mode,2: External gain calibration mode,3: Settings are prohibited"
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|
group.byte 0x34++0x00
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line.byte 0x00 "CLBSTR,Calibration Start Control Register"
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hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
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bitfld.byte 0x00 0. "CLBST,Calibration start control" "0: Disable writing,1: Start calibration"
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|
rgroup.byte 0x3C++0x00
|
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line.byte 0x00 "CLBSSR,Calibration Status Register"
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|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
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bitfld.byte 0x00 0. "CLBSS,Calibration status" "0: Calibration is not running,1: Calibration is running"
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|
tree.end
|
|
tree "SMPU (Bus Slave MPU)"
|
|
base ad:0x40000C00
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SMPUCTL,Slave MPU Control Register"
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|
hexmask.word.byte 0x00 8.--15. 1. "KEY,Key Code This bit is used to enable or disable writing of the PROTECT and OAD bit"
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bitfld.word 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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newline
|
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bitfld.word 0x00 1. "PROTECT,Protection of register" "0: All Bus Slave register writing is possible,1: All Bus Slave register writing is protected"
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|
bitfld.word 0x00 0. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Reset"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SMPUMBIU,Access Control Register for MBIU"
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|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
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bitfld.word 0x00 3. "WPGRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.."
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|
newline
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bitfld.word 0x00 2. "RPGRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.."
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bitfld.word 0x00 0.--1. "Reserved,These bits are read as 00" "0,1,2,3"
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group.word 0x14++0x01
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|
line.word 0x00 "SMPUFBIU,Access Control Register for FBIU"
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hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
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bitfld.word 0x00 3. "WPGRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.."
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newline
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bitfld.word 0x00 2. "RPGRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.."
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bitfld.word 0x00 1. "WPCPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled"
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|
newline
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bitfld.word 0x00 0. "RPCPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled"
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|
group.word 0x18++0x01
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|
line.word 0x00 "SMPUSRAM0,Access Control Register for SRAM"
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|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
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bitfld.word 0x00 3. "WPGRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.."
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newline
|
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bitfld.word 0x00 2. "RPGRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.."
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bitfld.word 0x00 1. "WPCPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled"
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|
newline
|
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bitfld.word 0x00 0. "RPCPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SMPUP0BIU,Access Control Register for P"
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|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
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|
bitfld.word 0x00 3. "WPGRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.."
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|
newline
|
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bitfld.word 0x00 2. "RPGRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.."
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bitfld.word 0x00 1. "WPCPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled"
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|
newline
|
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bitfld.word 0x00 0. "RPCPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled"
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|
group.word 0x24++0x01
|
|
line.word 0x00 "SMPUP2BIU,Access Control Register for P"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
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|
bitfld.word 0x00 3. "WPGRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.."
|
|
newline
|
|
bitfld.word 0x00 2. "RPGRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.."
|
|
bitfld.word 0x00 1. "WPCPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled"
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|
newline
|
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bitfld.word 0x00 0. "RPCPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SMPUP6BIU,Access Control Register for P"
|
|
hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
|
|
bitfld.word 0x00 3. "WPGRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.."
|
|
newline
|
|
bitfld.word 0x00 2. "RPGRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.."
|
|
bitfld.word 0x00 1. "WPCPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled"
|
|
newline
|
|
bitfld.word 0x00 0. "RPCPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled"
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
tree "SPI0"
|
|
base ad:0x40072000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SPCR,SPI Control Register"
|
|
bitfld.byte 0x00 7. "SPRIE,SPI Receive Buffer Full Interrupt Enable" "0: Disables the generation of SPI receive buffer..,1: Enables the generation of SPI receive buffer.."
|
|
bitfld.byte 0x00 6. "SPE,SPI Function Enable" "0: Disables the SPI function,1: Enables the SPI function"
|
|
newline
|
|
bitfld.byte 0x00 5. "SPTIE,Transmit Buffer Empty Interrupt Enable" "0: Disables the generation of transmit buffer..,1: Enables the generation of transmit buffer.."
|
|
bitfld.byte 0x00 4. "SPEIE,SPI Error Interrupt Enable" "0: Disables the generation of SPI error..,1: Enables the generation of SPI error interrupt.."
|
|
newline
|
|
bitfld.byte 0x00 3. "MSTR,SPI Master/Slave Mode Select" "0: Slave mode,1: Master mode"
|
|
bitfld.byte 0x00 2. "MODFEN,Mode Fault Error Detection Enable" "0: Disables the detection of mode fault error,1: Enables the detection of mode fault error"
|
|
newline
|
|
bitfld.byte 0x00 1. "TXMD,Communications Operating Mode Select" "0: Full-duplex synchronous serial communications,1: Serial communications consisting of only.."
|
|
bitfld.byte 0x00 0. "SPMS,SPI Mode Select" "0: SPI operation (4-wire method),1: Clock synchronous operation (3-wire method)"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "SSLP,SPI Slave Select Polarity Register"
|
|
bitfld.byte 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. "SSL3P,SSL3 Signal Polarity Setting" "0: SSL3 signal is active low,1: SSL3 signal is active high"
|
|
newline
|
|
bitfld.byte 0x00 2. "SSL2P,SSL2 Signal Polarity Setting" "0: SSL2 signal is active low,1: SSL2 signal is active high"
|
|
bitfld.byte 0x00 1. "SSL1P,SSL1 Signal Polarity Setting" "0: SSL1 signal is active low,1: SSL1 signal is active high"
|
|
newline
|
|
bitfld.byte 0x00 0. "SSL0P,SSL0 Signal Polarity Setting" "0: SSL0 signal is active low,1: SSL0 signal is active high"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "SPPCR,SPI Pin Control Register"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 5. "MOIFE,MOSI Idle Value Fixing Enable" "0: MOSI output value equals final data from..,1: MOSI output value equals the value set in the.."
|
|
newline
|
|
bitfld.byte 0x00 4. "MOIFV,MOSI Idle Fixed Value" "0: The level output on the MOSIn pin during MOSI..,1: The level output on the MOSIn pin during MOSI.."
|
|
bitfld.byte 0x00 2.--3. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
newline
|
|
bitfld.byte 0x00 1. "SPLP2,SPI Loopback 2" "0: Normal mode,1: Loopback mode (data is not inverted for.."
|
|
bitfld.byte 0x00 0. "SPLP,SPI Loopback" "0: Normal mode,1: Loopback mode (data is inverted for.."
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "SPSR,SPI Status Register"
|
|
bitfld.byte 0x00 7. "SPRF,SPI Receive Buffer Full Flag" "0: No valid data in SPDR,1: Valid data found in SPDR"
|
|
bitfld.byte 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 5. "SPTEF,SPI Transmit Buffer Empty Flag" "0: Data found in the transmit buffer,1: No data in the transmit buffer"
|
|
bitfld.byte 0x00 4. "UDRF,Underrun Error Flag(When MODF is 0 This bit is invalid.)" "0: A mode fault error occurs (MODF=1),1: An underrun error occurs (MODF=1)"
|
|
newline
|
|
bitfld.byte 0x00 3. "PERF,Parity Error Flag" "0: No parity error occurs,1: A parity error occurs"
|
|
bitfld.byte 0x00 2. "MODF,Mode Fault Error Flag" "0: Neither mode fault error nor underrun error..,1: A mode fault error or an underrun error occurs"
|
|
newline
|
|
rbitfld.byte 0x00 1. "IDLNF,SPI Idle Flag" "0: SPI is in the idle state,1: SPI is in the transfer state"
|
|
bitfld.byte 0x00 0. "OVRF,Overrun Error Flag" "0: No overrun error occurs,1: An overrun error occurs"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPDR,SPI Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "SPDR,SPDR is the interface with the buffers that hold data for transmission and reception by the RSPI.When accessing in word (SPDCR.SPLW=1) access SPDR"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "SPDR_HA,SPI Data Register ( halfword access )"
|
|
hexmask.word 0x00 0.--15. 1. "SPDR_HA,SPDR is the interface with the buffers that hold data for transmission and reception by the SPI.When accessing in halfword (SPDCR.SPLW=0) access SPDR_HA"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "SPBR,SPI Bit Rate Register"
|
|
hexmask.byte 0x00 0.--7. 1. "SPR,SPBR sets the bit rate in master mode"
|
|
group.byte 0x0B++0x00
|
|
line.byte 0x00 "SPDCR,SPI Data Control Register"
|
|
bitfld.byte 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 5. "SPLW,SPI Word Access/Halfword Access Specification" "0: Set SPDR_HA to valid for halfword access,1: Set SPDR to valid for word access"
|
|
newline
|
|
bitfld.byte 0x00 4. "SPRDTD,SPI Receive/Transmit Data Selection" "0: SPDR values are read from the receive buffer,1: SPDR values are read from the transmit buffer.."
|
|
bitfld.byte 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "SPCKD,SPI Clock Delay Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 0.--2. "SCKDL,RSPCK Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,2: 3 RSPCK,3: 4 RSPCK,4: 5 RSPCK,5: 6 RSPCK,6: 7 RSPCK,7: 8 RSPCK"
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "SSLND,SPI Slave Select Negation Delay Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 0.--2. "SLNDL,SSL Negation Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,2: 3 RSPCK,3: 4 RSPCK,4: 5 RSPCK,5: 6 RSPCK,6: 7 RSPCK,7: 8 RSPCK"
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "SPND,SPI Next-Access Delay Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 0.--2. "SPNDL,SPI Next-Access Delay Setting" "0: 1 RSPCK + 2 PCLK,1: 2 RSPCK + 2 PCLK,2: 3 RSPCK + 2 PCLK,3: 4 RSPCK + 2 PCLK,4: 5 RSPCK + 2 PCLK,5: 6 RSPCK + 2 PCLK,6: 7 RSPCK + 2 PCLK,7: 8 RSPCK + 2 PCLK"
|
|
group.byte 0x0F++0x00
|
|
line.byte 0x00 "SPCR2,SPI Control Register 2"
|
|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 4. "SCKASE,RSPCK Auto-Stop Function Enable" "0: Disables the RSPCK auto-stop function,1: Enables the RSPCK auto-stop function"
|
|
newline
|
|
bitfld.byte 0x00 3. "PTE,Parity Self-Testing" "0: Disables the self-diagnosis function of the..,1: Enables the self-diagnosis function of the.."
|
|
bitfld.byte 0x00 2. "SPIIE,SPI Idle Interrupt Enable" "0: Disables the generation of idle interrupt..,1: Enables the generation of idle interrupt.."
|
|
newline
|
|
bitfld.byte 0x00 1. "SPOE,Parity Mode" "0: Selects even parity for use in transmission..,1: Selects odd parity for use in transmission.."
|
|
bitfld.byte 0x00 0. "SPPE,Parity Enable" "0: Does not add the parity bit to transmit data..,1: Adds the parity bit to transmit data and.."
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SPCMD0,SPI Command Register 0"
|
|
bitfld.word 0x00 15. "SCKDEN,RSPCK Delay Setting Enable" "0: An RSPCK delay of 1 RSPCK,1: An RSPCK delay is equal to the setting of the.."
|
|
bitfld.word 0x00 14. "SLNDEN,SSL Negation Delay Setting Enable" "0: An SSL negation delay of 1 RSPCK,1: An SSL negation delay is equal to the setting.."
|
|
newline
|
|
bitfld.word 0x00 13. "SPNDEN,SPI Next-Access Delay Enable" "0: A next-access delay of 1 RSPCK + 2 PCLK,1: A next-access delay is equal to the setting.."
|
|
bitfld.word 0x00 12. "LSBF,SPI LSB First" "0: MSB first,1: LSB first"
|
|
newline
|
|
bitfld.word 0x00 8.--11. "SPB,SPI Data Length Setting" "?,?,?,?,4: 8 bits,5: 8 bits,6: 8 bits,7: 8 bits,8: 9 bits,9: 10 bits,10: 11 bits,11: 12 bits,12: 13 bits,13: 14 bits,14: 15 bits,15: 16 bits"
|
|
bitfld.word 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4.--6. "SSLA,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,2: SSL2,3: SSL3,?..."
|
|
bitfld.word 0x00 2.--3. "BRDV,Bit Rate Division Setting" "0: These bits select the base bit rate,1: These bits select the base bit rate divided..,2: These bits select the base bit rate divided..,3: These bits select the base bit rate divided.."
|
|
newline
|
|
bitfld.word 0x00 1. "CPOL,RSPCK Polarity Setting" "0: RSPCK is low when idle,1: RSPCK is high when idle"
|
|
bitfld.word 0x00 0. "CPHA,RSPCK Phase Setting" "0: Data sampling on odd edge data variation on..,1: Data variation on odd edge data sampling on.."
|
|
tree.end
|
|
tree.end
|
|
tree "SPMON (CPU Stack Pointer Monitor)"
|
|
base ad:0x40000D00
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "MSPMPUOAD,Stack Pointer Monitor Operation After Detection Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored"
|
|
hexmask.word.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
newline
|
|
bitfld.word 0x00 0. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Internal reset"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "MSPMPUCTL,Stack Pointer Monitor Access Control Register"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
rbitfld.word 0x00 8. "ERROR,SP_main monitor error flag" "0: SP_main has not overflowed or underflowed,1: SP_main has overflowed or underflowed"
|
|
newline
|
|
hexmask.word.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 0. "ENABLE,SP_main monitor enable" "0: SP_main monitor is disabled,1: SP_main monitor is enabled"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "MSPMPUPT,Stack Pointer Monitor Protection Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored"
|
|
hexmask.word.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
newline
|
|
bitfld.word 0x00 0. "PROTECT,Protection of register (MSPMPUAC MSPMPUSA and MSPMPUSE)" "0: Stack Pointer Monitor register writing is..,1: Stack Pointer Monitor register writing is.."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MSPMPUSA,Main Stack Pointer Monitor Start Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "MSPMPUSA,Region start address register Address where the region starts for use in region determination.NOTE: Range: 0x1FF00000-0x200FFFFC The low-order 2 bits are fixed to 0"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "MSPMPUEA,Main Stack Pointer Monitor End Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "MSPMPUEA,Region end address register Address where the region starts for use in region determination.NOTE: Range: 0x1FF00003-0x200FFFFF The low-order 2 bits are fixed to 1"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "PSPMPUOAD,Stack Pointer Monitor Operation After Detection Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored"
|
|
hexmask.word.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
newline
|
|
bitfld.word 0x00 0. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Internal reset"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "PSPMPUCTL,Stack Pointer Monitor Access Control Register"
|
|
hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
|
|
rbitfld.word 0x00 8. "ERROR,SP_process monitor error flag" "0: SP_process has not overflowed or underflowed,1: SP_process has overflowed or underflowed"
|
|
newline
|
|
hexmask.word.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.word 0x00 0. "ENABLE,SP_process monitor enable" "0: SP_process monitor is disabled,1: SP_process monitor is enabled"
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "PSPMPUPT,Stack Pointer Monitor Protection Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored"
|
|
hexmask.word.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
newline
|
|
bitfld.word 0x00 0. "PROTECT,Protection of register (PSPMPUAC PSPMPUSA and PSPMPUSE)" "0: Stack Pointer Monitor register writing is..,1: Stack Pointer Monitor register writing is.."
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PSPMPUSA,Process Stack Pointer Monitor Start Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "PSPMPUSA,Region start address register Address where the region starts for use in region determination.NOTE: Range: 0x1FF00000-0x200FFFFC The low-order 2 bits are fixed to 0"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PSPMPUEA,Process Stack Pointer Monitor End Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "PSPMPUEA,Region end address register Address where the region starts for use in region determination.NOTE: Range: 0x1FF00003-0x200FFFFF The low-order 2 bits are fixed to 1"
|
|
tree.end
|
|
tree "SRAM (SRAM Control)"
|
|
base ad:0x40002000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "PARIOAD,SRAM Parity Error Operation After Detection Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "OAD,Operation after Detection" "0: Non maskable interrupt,1: Reset"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SRAMPRCR,SRAM Protection Register"
|
|
hexmask.byte 0x00 1.--7. 1. "KW,Write Key Code"
|
|
bitfld.byte 0x00 0. "SRAMPRCR,Register Write Control" "0: Writing to the protected register is disabled,1: Writing to the protected register is enabled"
|
|
group.byte 0xC0++0x00
|
|
line.byte 0x00 "ECCMODE,ECC Operating Mode Control Register"
|
|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0.--1. "ECCMOD,ECC Operating Mode Select" "0: ECC is disabled,1: Setting prohibited,2: ECC is enabled without error checking,3: ECC is enabled with error checking"
|
|
group.byte 0xC1++0x00
|
|
line.byte 0x00 "ECC2STS,ECC 2-Bit Error Status Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "ECC2ERR,ECC 2-Bit Error Status" "0: A 2-bit ECC error has not occurred,1: A 2-bit ECC error has occurred"
|
|
group.byte 0xC2++0x00
|
|
line.byte 0x00 "ECC1STSEN,ECC 1-Bit Error Information Update Enable Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "E1STSEN,ECC 1-Bit Error Information Update Enable" "0: Disables updating of the 1-bit ECC error..,1: Enables updating of the 1-bit ECC error.."
|
|
group.byte 0xC3++0x00
|
|
line.byte 0x00 "ECC1STS,ECC 1-Bit Error Status Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "ECC1ERR,ECC 1-Bit Error Status" "0: A 1-bit ECC error has not occurred,1: A 1-bit ECC error has occurred"
|
|
group.byte 0xC4++0x00
|
|
line.byte 0x00 "ECCPRCR,ECC Protection Register"
|
|
hexmask.byte 0x00 1.--7. 1. "KW,Write Key Code"
|
|
bitfld.byte 0x00 0. "ECCPRCR,Register Write Control" "0: Writing to the protect register is disabled,1: Writing to the protect register is enabled"
|
|
group.byte 0xD0++0x00
|
|
line.byte 0x00 "ECCPRCR2,ECC Protection Register 2"
|
|
hexmask.byte 0x00 1.--7. 1. "KW,Write Key Code"
|
|
bitfld.byte 0x00 0. "ECCPRCR2,Register Write Control" "0: Writing to the protect register is disabled,1: Writing to the protect register is enabled"
|
|
group.byte 0xD4++0x00
|
|
line.byte 0x00 "ECCETST,ECC Test Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "TSTBYP,ECC Bypass Select" "0: ECC bypass is disabled,1: ECC bypass is enabled"
|
|
group.byte 0xD8++0x00
|
|
line.byte 0x00 "ECCOAD,SRAM ECC Error Operation After Detection Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "OAD,Operation after Detection" "0: Non maskable interrupt,1: Internal reset"
|
|
tree.end
|
|
tree "SYSTEM (System Control)"
|
|
base ad:0x4001E000
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SCKDIVCR,System Clock Division Control Register"
|
|
bitfld.long 0x00 31. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.long 0x00 28.--30. "FCK,Flash IF Clock (FCLK) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..."
|
|
newline
|
|
bitfld.long 0x00 24.--26. "ICK,System Clock (ICLK) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..."
|
|
hexmask.long.word 0x00 11.--23. 1. "Reserved,These bits are read as 0000000000000"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "PCKB,Peripheral Module Clock B (PCLKB) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..."
|
|
bitfld.long 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "PCKD,Peripheral Module Clock D (PCLKD) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..."
|
|
group.byte 0x26++0x00
|
|
line.byte 0x00 "SCKSCR,System Clock Source Control Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 0.--2. "CKSEL,Clock Source Select" "0: HOCO,1: MOCO,2: LOCO,3: Main clock oscillator,4: Sub-clock oscillator,?..."
|
|
group.byte 0x31++0x00
|
|
line.byte 0x00 "MEMWAIT,Memory Wait Cycle Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "MEMWAIT,Memory Wait Cycle Select" "0: No wait,1: Wait"
|
|
group.byte 0x32++0x00
|
|
line.byte 0x00 "MOSCCR,Main Clock Oscillator Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "MOSTP,Main Clock Oscillator Stop" "0: Main clock oscillator is operating,1: Main clock oscillator is stopped"
|
|
group.byte 0x36++0x00
|
|
line.byte 0x00 "HOCOCR,High-Speed On-Chip Oscillator Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "HCSTP,HOCO Stop" "0: HOCO is operating,1: HOCO is stopped"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "MOCOCR,Middle-Speed On-Chip Oscillator Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "MCSTP,MOCO Stop" "0: MOCO is operating,1: MOCO is stopped"
|
|
rgroup.byte 0x3C++0x00
|
|
line.byte 0x00 "OSCSF,Oscillation Stabilization Flag Register"
|
|
bitfld.byte 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. "MOSCSF,Main Clock Oscillation Stabilization Flag" "0: MOSTP = 1 (stopping the main clock..,1: Oscillation of the main clock is stable so.."
|
|
newline
|
|
bitfld.byte 0x00 1.--2. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 0. "HOCOSF,HOCO Clock Oscillation Stabilization FlagNOTE: The HOCOSF bit value after a reset is 1 when the OFS1.HOCOEN bit is 0" "0: The HOCO clock is stopped or oscillation of..,1: Oscillation of the HOCO clock is stable so.."
|
|
group.byte 0x3E++0x00
|
|
line.byte 0x00 "CKOCR,Clock Out Control Register"
|
|
bitfld.byte 0x00 7. "CKOEN,Clock out enable" "0: Clock Out disable,1: Clock Out enable"
|
|
bitfld.byte 0x00 4.--6. "CKODIV,Clock out input frequency Division Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,7: /128"
|
|
newline
|
|
bitfld.byte 0x00 3. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 0.--2. "CKOSEL,Clock out source select" "0: HOCO,1: MOCO,2: LOCO,3: MOSC,4: SOSC,?..."
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "OSTDCR,Oscillation Stop Detection Control Register"
|
|
bitfld.byte 0x00 7. "OSTDE,Oscillation Stop Detection Function Enable" "0: Oscillation stop detection function is disabled,1: Oscillation stop detection function is enabled"
|
|
bitfld.byte 0x00 1.--6. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.byte 0x00 0. "OSTDIE,Oscillation Stop Detection Interrupt Enable" "0: The oscillation stop detection interrupt is..,1: The oscillation stop detection interrupt is.."
|
|
group.byte 0x41++0x00
|
|
line.byte 0x00 "OSTDSR,Oscillation Stop Detection Status Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "OSTDF,Oscillation Stop Detection Flag" "0: The main clock oscillation stop has not been..,1: The main clock oscillation stop has been.."
|
|
group.byte 0x61++0x00
|
|
line.byte 0x00 "MOCOUTCR,MOCO User Trimming Control Register"
|
|
abitfld.byte 0x00 0.--7. "MOCOUTRM,MOCO User Trimming" "0x00=0: Center Code,0x01=1: +1,0x7D=125: +125,0x7E=126: +126,0x7F=127: +127These bits,0x80=128: -128,0x81=129: -127,0x82=130: -126,0xFF=255: -1"
|
|
group.byte 0x62++0x00
|
|
line.byte 0x00 "HOCOUTCR,HOCO User Trimming Control Register"
|
|
abitfld.byte 0x00 0.--7. "HOCOUTRM,HOCO User Trimming" "0x00=0: Center Code,0x01=1: +1,0x7D=125: +125,0x7E=126: +126,0x7F=127: +127These bits,0x80=128: -128,0x81=129: -127,0x82=130: -126,0xFF=255: -1"
|
|
group.byte 0xD1++0x00
|
|
line.byte 0x00 "SDADCCKCR,24-bit Sigma-Delta A/D Converter Clock Control Register"
|
|
bitfld.byte 0x00 7. "SDADCCKEN,24-bit Sigma-Delta A/D Converter Clock Select" "0: MOSC is chosen by a source clock of 24-bit..,1: HOCO is chosen by a source clock of 24-bit.."
|
|
bitfld.byte 0x00 1.--6. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.byte 0x00 0. "SDADCCKSEL,24-bit Sigma-Delta A/D Converter Clock Enable" "0: 24-bit Sigma-Delta A/D Converter Clock is..,1: 24-bit Sigma-Delta A/D Converter Clock is.."
|
|
group.byte 0x413++0x00
|
|
line.byte 0x00 "MOMCR,Main Clock Oscillator Mode Oscillation Control Register"
|
|
bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.byte 0x00 6. "MOSEL,Main Clock Oscillator Switching" "0: Resonator,1: External clock input"
|
|
newline
|
|
bitfld.byte 0x00 4.--5. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.byte 0x00 3. "MODRV1,Main Clock Oscillator Drive Capability 1 Switching" "0: 10 MHz to 20 MHz,1: 1 MHz to 10 MHz"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
group.byte 0x480++0x00
|
|
line.byte 0x00 "SOSCCR,Sub-clock Oscillator Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "SOSTP,Sub-Clock Oscillator Stop" "0: Sub-clock oscillator is operating,1: Sub-clock oscillator is stopped"
|
|
group.byte 0x481++0x00
|
|
line.byte 0x00 "SOMCR,Sub-clock Oscillator Mode Control Register"
|
|
bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0.--1. "SODRV,Sub Clock Oscillator Drive Capability Switching" "0: Normal Mode,1: Low power mode 1,2: Low power mode 2,3: Low power mode 3"
|
|
group.byte 0x490++0x00
|
|
line.byte 0x00 "LOCOCR,Low-Speed On-Chip Oscillator Control Register"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "LCSTP,LOCO Stop" "0: LOCO is operating,1: LOCO is stopped"
|
|
group.byte 0x492++0x00
|
|
line.byte 0x00 "LOCOUTCR,LOCO User Trimming Control Register"
|
|
abitfld.byte 0x00 0.--7. "LOCOUTRM,LOCO User Trimming" "0x00=0: Center Code,0x01=1: +1,0x7D=125: +125,0x7E=126: +126,0x7F=127: +127These bits,0x80=128: -128,0x81=129: -127,0x82=130: -126,0xFF=255: -1"
|
|
group.byte 0xA2++0x00
|
|
line.byte 0x00 "MOSCWTCR,Main Clock Oscillator Wait Control Register"
|
|
bitfld.byte 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. "MSTS,Main clock oscillator wait time setting" "0: Wait time= 3 cycles (11.4us : calculated at..,1: Wait time= 35 cycles (133.5us : calculated at..,2: Wait time= 67 cycles (255.6us: calculated at..,3: Wait time= 131 cycles (499.7us: calculated at..,4: Wait time= 259 cycles (988.0us: calculated at..,5: Wait time= 547 cycles (2086.6us: calculated..,6: Wait time= 1059 cycles (4039.8us: calculated..,7: Wait time= 2147 cycles (8190.2us: calculated..,8: Wait time= 4291 cycles (16368.9us: calculated..,9: Wait time= 8163 cycles (31139.4us: calculated..,?..."
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|
group.byte 0xA5++0x00
|
|
line.byte 0x00 "HOCOWTCR,High-Speed On-Chip Oscillator Wait Control Register"
|
|
bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.byte 0x00 0.--2. "HSTS,HOCO wait time setting" "?,?,?,?,?,5: If HOCO frequency is other than 64MHz should..,6: If HOCO frequency = 64MHz should set the..,?..."
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|
group.word 0x0C++0x01
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|
line.word 0x00 "SBYCR,Standby Control Register"
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|
bitfld.word 0x00 15. "SSBY,Software Standby" "0: Sleep Mode,1: Software Standby Mode"
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|
hexmask.word 0x00 0.--14. 1. "Reserved,These bits are read as 000000000000000"
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|
group.long 0x1C++0x03
|
|
line.long 0x00 "MSTPCRA,Module Stop Control Register A"
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|
hexmask.long.word 0x00 23.--31. 1. "Reserved,These bits are read as 111111111"
|
|
bitfld.long 0x00 22. "MSTPA22,Data Transfer Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state"
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|
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hexmask.long.tbyte 0x00 0.--21. 1. "Reserved,These bits are read as 1111111111111111111111"
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group.byte 0x92++0x00
|
|
line.byte 0x00 "SNZCR,Snooze Control Register"
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|
bitfld.byte 0x00 7. "SNZE,Snooze Mode Enable" "0: Disable Snooze Mode,1: Enable Snooze Mode"
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|
bitfld.byte 0x00 2.--6. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.byte 0x00 1. "SNZDTCEN,DTC Enable in Snooze Mode" "0: Disable DTC operation,1: Enable DTC operation"
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bitfld.byte 0x00 0. "RXDREQEN,RXD0 Snooze Request Enable NOTE: Do not set to 1 other than in asynchronous mode" "0: Ignore RXD0 falling edge in Standby mode,1: Accept RXD0 falling edge in Standby mode as a.."
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|
group.byte 0x94++0x00
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|
line.byte 0x00 "SNZEDCR,Snooze End Control Register"
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bitfld.byte 0x00 7. "SCI0UMTED,SCI0 address unmatch Snooze End EnableNote: Do not set to 1 other than in asynchronous mode" "0: Disable the Snooze End request,1: Enable the Snooze End request"
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bitfld.byte 0x00 5.--6. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.byte 0x00 4. "AD0UMTED,AD compare mismatch 0 Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request"
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bitfld.byte 0x00 3. "AD0MATED,AD compare match 0 Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request"
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bitfld.byte 0x00 2. "DTCNZRED,Not Last DTC transmission completion Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request"
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bitfld.byte 0x00 1. "DTCZRED,Last DTC transmission completion Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request"
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newline
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bitfld.byte 0x00 0. "AGTUNFED,AGT1 underflow Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request"
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group.long 0x98++0x03
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line.long 0x00 "SNZREQCR,Snooze Request Control Register"
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bitfld.long 0x00 31. "Reserved,This bit is read as 0" "0,1"
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bitfld.long 0x00 30. "SNZREQEN30,Snooze Request Enable 30Enable AGT1 compare match B snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 29. "SNZREQEN29,Snooze Request Enable 29Enable AGT1 compare match A snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 28. "SNZREQEN28,Snooze Request Enable 28Enable AGT1 underflow snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 26.--27. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.long 0x00 25. "SNZREQEN25,Snooze Request Enable 25Enable RTC period snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 24. "SNZREQEN24,Snooze Request Enable 24Enable RTC alarm snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 23. "SNZREQEN23,Snooze Request Enable 24Enable RTC alarm snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 18.--22. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 17. "SNZREQEN17,Snooze Request Enable 17Enable KINT snooze request" "0: Disable snooze request,1: Enable snooze request"
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hexmask.long.word 0x00 8.--16. 1. "Reserved,These bits are read as 000000000"
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bitfld.long 0x00 7. "SNZREQEN7,Snooze Request Enable 7Enable IRQ7 pin snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 6. "SNZREQEN6,Snooze Request Enable 6Enable IRQ6 pin snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 5. "SNZREQEN5,Snooze Request Enable 5Enable IRQ5 pin snooze request" "0: Disable snooze request,1: Enable snooze request"
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newline
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bitfld.long 0x00 4. "SNZREQEN4,Snooze Request Enable 4Enable IRQ4 pin snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 3. "SNZREQEN3,Snooze Request Enable 3Enable IRQ3 pin snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 2. "SNZREQEN2,Snooze Request Enable 2Enable IRQ2 pin snooze request" "0: Disable snooze request,1: Enable snooze request"
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bitfld.long 0x00 1. "SNZREQEN1,Snooze Request Enable 1Enable IRQ1 pin snooze request" "0: Disable snooze request,1: Enable snooze request"
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newline
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bitfld.long 0x00 0. "SNZREQEN0,Snooze Request Enable 0Enable IRQ0 pin snooze request" "0: Disable snooze request,1: Enable snooze request"
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group.byte 0x9E++0x00
|
|
line.byte 0x00 "FLSTOP,Flash Operation Control Register"
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|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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|
rbitfld.byte 0x00 4. "FLSTPF,Flash Memory Operation Status Flag" "0: Transition completed,1: During transition (from the flash-stop-status.."
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|
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bitfld.byte 0x00 1.--3. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.byte 0x00 0. "FLSTOP,Selecting ON/OFF of the Flash Memory Operation" "0: Code flash memory operates,1: Code flash/Data flash memory stops"
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|
group.byte 0xA0++0x00
|
|
line.byte 0x00 "OPCCR,Operating Power Control Register"
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|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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rbitfld.byte 0x00 4. "OPCMTSF,Operating Power Control Mode Transition Status Flag" "0: Transition completed,1: During transition"
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bitfld.byte 0x00 2.--3. "Reserved,These bits are read as 00" "0,1,2,3"
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|
bitfld.byte 0x00 0.--1. "OPCM,Operating Power Control Mode Select" "0: High-speed mode,1: Prohibited,2: Prohibited,3: Low-speed mode"
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|
group.byte 0xAA++0x00
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line.byte 0x00 "SOPCCR,Sub Operating Power Control Register"
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|
bitfld.byte 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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rbitfld.byte 0x00 4. "SOPCMTSF,Sub Operating Power Control Mode Transition Status Flag" "0: Transition completed,1: During transition"
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newline
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bitfld.byte 0x00 1.--3. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.byte 0x00 0. "SOPCM,Sub Operating Power Control Mode Select" "0: Other than Subosc-speed mode,1: Subosc-speed mode"
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group.byte 0x417++0x00
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line.byte 0x00 "LVCMPCR,Voltage Monitor Circuit Control Register"
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bitfld.byte 0x00 7. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 6. "LVD2E,Voltage Detection 2 Enable" "0: Voltage detection 2 circuit disabled,1: Voltage detection 2 circuit enabled"
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bitfld.byte 0x00 5. "LVD1E,Voltage Detection 1 Enable" "0: Voltage detection 1 circuit disabled,1: Voltage detection 1 circuit enabled"
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bitfld.byte 0x00 0.--4. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.byte 0x418++0x00
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line.byte 0x00 "LVDLVLR,Voltage Detection Level Select Register"
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bitfld.byte 0x00 5.--7. "LVD2LVL,Voltage Detection 2 Level Select (Standard voltage during drop in voltage)" "0: 4.29V(Vdet2_0),1: 4.14V(Vdet2_1),2: 4.02V(Vdet2_2),3: 3.84V(Vdet2_3),?..."
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bitfld.byte 0x00 0.--4. "LVD1LVL,Voltage Detection 1 Level Select (Standard voltage during drop in voltage)" "0: 4.29V(Vdet1_0),1: 4.14V(Vdet1_1),2: 4.02V(Vdet1_2),3: 3.84V(Vdet1_3),4: 3.10V(Vdet1_4),5: 3.00V(Vdet1_5),6: 2.90V(Vdet1_6),7: 2.79V(Vdet1_7),8: 2.68V(Vdet1_8),9: 2.58V(Vdet1_9),10: 2.48V(Vdet1_A),11: 2.20V(Vdet1_B),12: 1.96V(Vdet1_C),13: 1.86V(Vdet1_D),14: 1.75V(Vdet1_E),15: 1.65V(Vdet1_F),?..."
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group.byte 0x41A++0x00
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line.byte 0x00 "LVD1CR0,Voltage Monitor 1 Circuit Control Register 0"
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bitfld.byte 0x00 7. "RN,Voltage Monitor 1 Reset Negate Select" "0: Negation follows a stabilization time (tLVD1)..,1: Negation follows a stabilization time (tLVD1).."
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bitfld.byte 0x00 6. "RI,Voltage Monitor 1 Circuit Mode Select" "0: Voltage monitor 1 interrupt during Vdet1..,1: Voltage monitor 1 reset enabled when the.."
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newline
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bitfld.byte 0x00 3.--5. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.byte 0x00 2. "CMPE,Voltage Monitor 1 Circuit Comparison Result Output Enable" "0: Voltage monitor 1 circuit comparison result..,1: Voltage monitor 1 circuit comparison result.."
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newline
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bitfld.byte 0x00 1. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 0. "RIE,Voltage Monitor 1 Interrupt/ Reset Enable" "0: Disabled,1: Enabled"
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group.byte 0x41B++0x00
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line.byte 0x00 "LVD2CR0,Voltage Monitor 2 Circuit Control Register 0"
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bitfld.byte 0x00 7. "RN,Voltage Monitor 2 Reset Negate Select" "0: Negation follows a stabilization time (tLVD2)..,1: Negation follows a stabilization time (tLVD2).."
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bitfld.byte 0x00 6. "RI,Voltage Monitor 2 Circuit Mode Select" "0: Voltage monitor 2 interrupt during Vdet2..,1: Voltage monitor 2 reset enabled when the.."
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newline
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bitfld.byte 0x00 3.--5. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.byte 0x00 2. "CMPE,Voltage Monitor 2 Circuit Comparison Result Output Enable" "0: Voltage monitor 2 circuit comparison result..,1: Voltage monitor 2 circuit comparison result.."
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newline
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bitfld.byte 0x00 1. "Reserved,This bit is read as 0" "0,1"
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bitfld.byte 0x00 0. "RIE,Voltage Monitor 2 Interrupt/Reset Enable" "0: Disabled,1: Enabled"
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group.byte 0xE0++0x00
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line.byte 0x00 "LVD1CR1,Voltage Monitor 1 Circuit Control Register 1"
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bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.byte 0x00 2. "IRQSEL,Voltage Monitor 1 Interrupt Type Select" "0: Non-maskable interrupt,1: Maskable interrupt"
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newline
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bitfld.byte 0x00 0.--1. "IDTSEL,Voltage Monitor 1 Interrupt Generation Condition Select" "0: When VCC>=Vdet1 (rise) is detected,1: When VCC<Vdet1 (drop) is detected,2: When drop and rise are detected,3: Settings prohibited"
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group.byte 0xE1++0x00
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line.byte 0x00 "LVD1SR,Voltage Monitor 1 Circuit Status Register"
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bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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rbitfld.byte 0x00 1. "MON,Voltage Monitor 1 Signal Monitor Flag" "0: VCC < Vdet1,1: VCC >= Vdet1 or MON is disabled"
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bitfld.byte 0x00 0. "DET,Voltage Monitor 1 Voltage Change Detection Flag" "0: Not detected,1: Vdet1 passage detection"
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group.byte 0xE2++0x00
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line.byte 0x00 "LVD2CR1,Voltage Monitor 2 Circuit Control Register 1"
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bitfld.byte 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.byte 0x00 2. "IRQSEL,Voltage Monitor 2 Interrupt Type Select" "0: Non-maskable interrupt,1: Maskable interrupt"
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newline
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bitfld.byte 0x00 0.--1. "IDTSEL,Voltage Monitor 2 Interrupt Generation Condition Select" "0: When VCC>=Vdet2 (rise) is detected,1: When VCC<Vdet2 (drop) is detected,2: When drop and rise are detected,3: Settings prohibited"
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group.byte 0xE3++0x00
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line.byte 0x00 "LVD2SR,Voltage Monitor 2 Circuit Status Register"
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bitfld.byte 0x00 2.--7. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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rbitfld.byte 0x00 1. "MON,Voltage Monitor 2 Signal Monitor Flag" "0: VCC < Vdet2,1: VCC >= Vdet2 or MON is disabled"
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newline
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bitfld.byte 0x00 0. "DET,Voltage Monitor 2 Voltage Change Detection Flag" "0: Not detected,1: Vdet2 passage detection"
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|
group.byte 0x40E++0x00
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line.byte 0x00 "SYOCDCR,System Control OCD Control Register"
|
|
bitfld.byte 0x00 7. "DBGEN,Debugger Enable" "0: On-chip debugger is disabled,1: On-chip debugger is enabled"
|
|
hexmask.byte 0x00 0.--6. 1. "Reserved,These bits are read as 0000000"
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group.word 0x3FE++0x01
|
|
line.word 0x00 "PRCR,Protect Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "PRKEY,PRKEY Key Code"
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bitfld.word 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
|
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bitfld.word 0x00 3. "PRC3,Enables writing to the registers related to the LVD" "0: Writes protected,1: Writes not protected"
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|
bitfld.word 0x00 2. "Reserved,This bit is read as 0" "0,1"
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newline
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bitfld.word 0x00 1. "PRC1,Enables writing to the registers related to the operating modes the low power consumption modes and the battery backup function" "0: Writes protected,1: Writes not protected"
|
|
bitfld.word 0x00 0. "PRC0,Enables writing to the registers related to the clock generation circuit" "0: Writes protected,1: Writes not protected"
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|
group.byte 0x410++0x00
|
|
line.byte 0x00 "RSTSR0,Reset Status Register 0"
|
|
bitfld.byte 0x00 4.--7. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. "LVD2RF,Voltage Monitor 2 Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Voltage Monitor 2 reset not detected,1: Voltage Monitor 2 reset detected"
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newline
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bitfld.byte 0x00 2. "LVD1RF,Voltage Monitor 1 Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Voltage Monitor 1 reset not detected,1: Voltage Monitor 1 reset detected"
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bitfld.byte 0x00 1. "LVD0RF,Voltage Monitor 0 Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Voltage Monitor 0 reset not detected,1: Voltage Monitor 0 reset detected"
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newline
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bitfld.byte 0x00 0. "PORF,Power-On Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Power-on reset not detected,1: Power-on reset detected"
|
|
group.byte 0x411++0x00
|
|
line.byte 0x00 "RSTSR2,Reset Status Register 2"
|
|
hexmask.byte 0x00 1.--7. 1. "Reserved,These bits are read as 0000000"
|
|
bitfld.byte 0x00 0. "CWSF,Cold/Warm Start Determination FlagNote: Only 1 can be written to set the flag" "0: Cold start,1: Warm start"
|
|
group.word 0xC0++0x01
|
|
line.word 0x00 "RSTSR1,Reset Status Register 1"
|
|
bitfld.word 0x00 13.--15. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 12. "SPERF,SP Error Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: SP error reset not detected,1: SP error reset detected"
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|
newline
|
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bitfld.word 0x00 11. "BUSMRF,Bus Master MPU Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Bus Master MPU reset not detected,1: Bus Master MPU reset detected"
|
|
bitfld.word 0x00 10. "BUSSRF,Bus Slave MPU Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Bus Slave MPU reset not detected,1: Bus Slave MPU reset detected"
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|
newline
|
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bitfld.word 0x00 9. "REERF,RAM ECC Error Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: RAM ECC error reset not detected,1: RAM ECC error reset detected"
|
|
bitfld.word 0x00 8. "RPERF,RAM Parity Error Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: RAM parity error reset not detected,1: RAM parity error reset detected"
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|
newline
|
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bitfld.word 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 2. "SWRF,Software Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Software reset not detected,1: Software reset detected"
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newline
|
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bitfld.word 0x00 1. "WDTRF,Watchdog Timer Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Watchdog timer reset not detected,1: Watchdog timer reset detected"
|
|
bitfld.word 0x00 0. "IWDTRF,Independent Watchdog Timer Reset Detect FlagNote: Only 0 can be written to clear the flag" "0: Independent watchdog timer reset not detected,1: Independent watchdog timer reset detected"
|
|
tree.end
|
|
tree "TSN (Temperature Sensor)"
|
|
base ad:0x407EC000
|
|
rgroup.byte 0x229++0x00
|
|
line.byte 0x00 "TSCDRH,Temperature Sensor Calibration Data Register H"
|
|
hexmask.byte 0x00 0.--7. 1. "TSCDRH,The calibration data stores the higher 8 bits of the convertedvalue"
|
|
rgroup.byte 0x228++0x00
|
|
line.byte 0x00 "TSCDRL,Temperature Sensor Calibration Data Register L"
|
|
hexmask.byte 0x00 0.--7. 1. "TSCDRL,The calibration data stores the lower 8 bits of the convertedvalue"
|
|
tree.end
|
|
tree "USBFS (USB 2.0 FS Module)"
|
|
base ad:0x40090000
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|
group.word 0x00++0x01
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line.word 0x00 "SYSCFG,System Configuration Control Register"
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bitfld.word 0x00 11.--15. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.word 0x00 10. "SCKE,USB Clock Enable" "0: Stops supplying the clock signal to the USB,1: Enables supplying the clock signal to the USB"
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bitfld.word 0x00 9. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 8. "CNEN,CNEN Single End Receiver Enable" "0: Single end receiver operation is disabled,1: Single end receiver operation is enabled"
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bitfld.word 0x00 5.--7. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 4. "DPRPU,D+ Line Resistor Control" "0: Pulling up the line is disabled,1: Pulling up the line is enabled"
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bitfld.word 0x00 3. "DMRPU,D- Line Resistor Control" "0: Pulling up the line is disabled,1: Pulling up the line is enabled"
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bitfld.word 0x00 1.--2. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.word 0x00 0. "USBE,USB Operation Enable" "0: USB operation is disabled,1: USB operation is enabled"
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rgroup.word 0x04++0x01
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line.word 0x00 "SYSSTS0,System Configuration Status Register 0"
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hexmask.word 0x00 2.--15. 1. "Reserved,These bits are read as 00000000000000"
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bitfld.word 0x00 0.--1. "LNST,USB Data Line Status Monitor" "0: SE0,1: J-State,2: K-State,3: SE1"
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group.word 0x08++0x01
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line.word 0x00 "DVSTCTR0,Device State Control Register 0"
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hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
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bitfld.word 0x00 8. "WKUP,Wakeup Detection Enable" "0: Remote wakeup signal is not output,1: Remote wakeup signal is output"
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bitfld.word 0x00 3.--7. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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rbitfld.word 0x00 0.--2. "RHST,USB Bus Reset Status" "0: Communication speed not determined,1: USB bus reset in progress or low-speed..,2: USB bus reset in progress or full-speed..,?..."
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group.word 0x14++0x01
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line.word 0x00 "CFIFO,CFIFO Port Register"
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hexmask.word 0x00 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits"
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group.byte 0x14++0x00
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line.byte 0x00 "CFIFOL,CFIFO Port Register L"
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group.word 0x20++0x01
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line.word 0x00 "CFIFOSEL,CFIFO Port Select Register"
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bitfld.word 0x00 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time.."
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bitfld.word 0x00 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound"
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bitfld.word 0x00 11.--13. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 10. "MBW,CFIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width"
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bitfld.word 0x00 9. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 8. "BIGEND,CFIFO Port Endian Control" "0: Little endian,1: Big endian"
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bitfld.word 0x00 6.--7. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.word 0x00 5. "ISEL,CFIFO Port Access Direction When DCP is Selected" "0: Reading from the buffer memory is selected,1: Writing to the buffer memory is selected"
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bitfld.word 0x00 4. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 0.--3. "CURPIPE,CFIFO Port Access Pipe Specification" "0: DCP(Defaultcontrolpipe),1: Pipe1,2: Pipe2,3: Pipe3,4: Pipe4,5: Pipe5,6: Pipe6,7: Pipe7,8: Pipe8,9: Pipe9,?..."
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group.word 0x22++0x01
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line.word 0x00 "CFIFOCTR,CFIFO Port Control Register"
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bitfld.word 0x00 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended"
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bitfld.word 0x00 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side"
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rbitfld.word 0x00 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled,1: FIFO port access is enabled"
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bitfld.word 0x00 9.--12. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.word 0x00 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data"
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group.word 0x30++0x01
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line.word 0x00 "INTENB0,Interrupt Enable Register 0"
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bitfld.word 0x00 15. "VBSE,VBUS Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 14. "RSME,Resume Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 13. "SOFE,Frame Number Update Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 12. "DVSE,Device State Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 11. "CTRE,Control Transfer Stage Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 10. "BEMPE,Buffer Empty Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 9. "NRDYE,Buffer Not Ready Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 8. "BRDYE,Buffer Ready Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled"
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hexmask.word.byte 0x00 0.--7. 1. "Reserved,These bits are read as 00000000"
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group.word 0x36++0x01
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line.word 0x00 "BRDYENB,BRDY Interrupt Enable Register"
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bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "PIPE9BRDYE,BRDY Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 8. "PIPE8BRDYE,BRDY Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 7. "PIPE7BRDYE,BRDY Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 6. "PIPE6BRDYE,BRDY Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 5. "PIPE5BRDYE,BRDY Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 4. "PIPE4BRDYE,BRDY Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 3. "PIPE3BRDYE,BRDY Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 2. "PIPE2BRDYE,BRDY Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 1. "PIPE1BRDYE,BRDY Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 0. "PIPE0BRDYE,BRDY Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled"
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group.word 0x38++0x01
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line.word 0x00 "NRDYENB,NRDY Interrupt Enable Register"
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bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "PIPE9NRDYE,NRDY Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 8. "PIPE8NRDYE,NRDY Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 7. "PIPE7NRDYE,NRDY Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 6. "PIPE6NRDYE,NRDY Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 5. "PIPE5NRDYE,NRDY Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 4. "PIPE4NRDYE,NRDY Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 3. "PIPE3NRDYE,NRDY Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 2. "PIPE2NRDYE,NRDY Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 1. "PIPE1NRDYE,NRDY Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 0. "PIPE0NRDYE,NRDY Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled"
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group.word 0x3A++0x01
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line.word 0x00 "BEMPENB,BEMP Interrupt Enable Register"
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bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "PIPE9BEMPE,BEMP Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 8. "PIPE8BEMPE,BEMP Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 7. "PIPE7BEMPE,BEMP Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 6. "PIPE6BEMPE,BEMP Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 5. "PIPE5BEMPE,BEMP Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 4. "PIPE4BEMPE,BEMP Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 3. "PIPE3BEMPE,BEMP Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 2. "PIPE2BEMPE,BEMP Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 1. "PIPE1BEMPE,BEMP Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled"
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bitfld.word 0x00 0. "PIPE0BEMPE,BEMP Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled"
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group.word 0x3C++0x01
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line.word 0x00 "SOFCFG,SOF Output Configuration Register"
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hexmask.word.byte 0x00 9.--15. 1. "Reserved,These bits are read as 0000000"
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bitfld.word 0x00 8. "TRNENSEL,Transaction-Enabled Time Select" "0: For non-low-speed communication,1: For low-speed communication"
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bitfld.word 0x00 7. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 6. "BRDYM,BRDY Interrupt Status Clear Timing" "0: Software clears the status,1: The USB clears the status when data has been.."
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bitfld.word 0x00 5. "Reserved,This bit is read as 0" "0,1"
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rbitfld.word 0x00 4. "EDGESTS,Edge Interrupt Output Status Monitor" "0: before stopping the clock supply to the USB..,1: the edge interrupt output signal is in the.."
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bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.word 0x40++0x01
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line.word 0x00 "INTSTS0,Interrupt Status Register 0"
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bitfld.word 0x00 15. "VBINT,VBUS Interrupt Status" "0: VBUS interrupts are not generated,1: VBUS interrupts are generated"
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bitfld.word 0x00 14. "RESM,Resume Interrupt Status" "0: Resume interrupts are not generated,1: Resume interrupts are generated"
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bitfld.word 0x00 13. "SOFR,Frame Number Refresh Interrupt Status" "0: SOF interrupts are not generated,1: SOF interrupts are generated"
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bitfld.word 0x00 12. "DVST,Device State Transition Interrupt Status" "0: Device state transition interrupts are not..,1: Device state transition interrupts are.."
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bitfld.word 0x00 11. "CTRT,Control Transfer Stage Transition Interrupt Status" "0: Control transfer stage transition interrupts..,1: Control transfer stage transition interrupts.."
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rbitfld.word 0x00 10. "BEMP,Buffer Empty Interrupt Status" "0: BEMP interrupts are not generated,1: BEMP interrupts are generated"
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rbitfld.word 0x00 9. "NRDY,Buffer Not Ready Interrupt Status" "0: NRDY interrupts are not generated,1: NRDY interrupts are generated"
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rbitfld.word 0x00 8. "BRDY,Buffer Ready Interrupt Status" "0: BRDY interrupts are not generated,1: BRDY interrupts are generated"
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rbitfld.word 0x00 7. "VBSTS,VBUS Input Status" "0: USB0_VBUS pin is low,1: USB0_VBUS pin is high"
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rbitfld.word 0x00 4.--6. "DVSQ,Device State" "0: Powered state,1: Default state,2: Address state,3: Configured state,?..."
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bitfld.word 0x00 3. "VALID,USB Request Reception" "0: Setup packet is not received,1: Setup packet is received"
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rbitfld.word 0x00 0.--2. "CTSQ,Control Transfer Stage" "0: Idle or setup stage,1: Control read data stage,2: Control read status stage,3: Control write data stage,4: Control write status stage,5: Control write(nodata) status stage,6: Control transfer sequence error,?..."
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group.word 0x46++0x01
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line.word 0x00 "BRDYSTS,BRDY Interrupt Status Register"
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bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "PIPE9BRDY,BRDY Interrupt Status for PIPE9" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 8. "PIPE8BRDY,BRDY Interrupt Status for PIPE8" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 7. "PIPE7BRDY,BRDY Interrupt Status for PIPE7" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 6. "PIPE6BRDY,BRDY Interrupt Status for PIPE6" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 5. "PIPE5BRDY,BRDY Interrupt Status for PIPE5" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 4. "PIPE4BRDY,BRDY Interrupt Status for PIPE4" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 3. "PIPE3BRDY,BRDY Interrupt Status for PIPE3" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 2. "PIPE2BRDY,BRDY Interrupt Status for PIPE2" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 1. "PIPE1BRDY,BRDY Interrupt Status for PIPE1" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 0. "PIPE0BRDY,BRDY Interrupt Status for PIPE0" "0: Interrupts are not generated,1: Interrupts are generated"
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group.word 0x48++0x01
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line.word 0x00 "NRDYSTS,NRDY Interrupt Status Register"
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bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "PIPE9NRDY,NRDY Interrupt Status for PIPE9" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 8. "PIPE8NRDY,NRDY Interrupt Status for PIPE8" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 7. "PIPE7NRDY,NRDY Interrupt Status for PIPE7" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 6. "PIPE6NRDY,NRDY Interrupt Status for PIPE6" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 5. "PIPE5NRDY,NRDY Interrupt Status for PIPE5" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 4. "PIPE4NRDY,NRDY Interrupt Status for PIPE4" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 3. "PIPE3NRDY,NRDY Interrupt Status for PIPE3" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 2. "PIPE2NRDY,NRDY Interrupt Status for PIPE2" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 1. "PIPE1NRDY,NRDY Interrupt Status for PIPE1" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 0. "PIPE0NRDY,NRDY Interrupt Status for PIPE0" "0: Interrupts are not generated,1: Interrupts are generated"
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group.word 0x4A++0x01
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line.word 0x00 "BEMPSTS,BEMP Interrupt Status Register"
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bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "PIPE9BEMP,BEMP Interrupt Status for PIPE9" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 8. "PIPE8BEMP,BEMP Interrupt Status for PIPE8" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 7. "PIPE7BEMP,BEMP Interrupt Status for PIPE7" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 6. "PIPE6BEMP,BEMP Interrupt Status for PIPE6" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 5. "PIPE5BEMP,BEMP Interrupt Status for PIPE5" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 4. "PIPE4BEMP,BEMP Interrupt Status for PIPE4" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 3. "PIPE3BEMP,BEMP Interrupt Status for PIPE3" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 2. "PIPE2BEMP,BEMP Interrupt Status for PIPE2" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 1. "PIPE1BEMP,BEMP Interrupt Status for PIPE1" "0: Interrupts are not generated,1: Interrupts are generated"
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bitfld.word 0x00 0. "PIPE0BEMP,BEMP Interrupt Status for PIPE0" "0: Interrupts are not generated,1: Interrupts are generated"
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group.word 0x4C++0x01
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line.word 0x00 "FRMNUM,Frame Number Register"
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bitfld.word 0x00 15. "OVRN,Overrun/Underrun Detection Status" "0: No error,1: An error occurred"
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bitfld.word 0x00 14. "CRCE,Receive Data Error" "0: No error,1: An error occurred"
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bitfld.word 0x00 11.--13. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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|
hexmask.word 0x00 0.--10. 1. "FRNM,Frame NumberLatest frame number"
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|
rgroup.word 0x54++0x01
|
|
line.word 0x00 "USBREQ,USB Request Type Register"
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|
hexmask.word.byte 0x00 8.--15. 1. "BREQUEST,RequestThese bits store the USB request bRequest value"
|
|
hexmask.word.byte 0x00 0.--7. 1. "BMREQUESTTYPE,Request TypeThese bits store the USB request bmRequestType value"
|
|
rgroup.word 0x56++0x01
|
|
line.word 0x00 "USBVAL,USB Request Value Register"
|
|
hexmask.word 0x00 0.--15. 1. "WVALUE,ValueThese bits store the USB request wValue value"
|
|
rgroup.word 0x58++0x01
|
|
line.word 0x00 "USBINDX,USB Request Index Register"
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|
hexmask.word 0x00 0.--15. 1. "WINDEX,IndexThese bits store the USB request wIndex value"
|
|
rgroup.word 0x5A++0x01
|
|
line.word 0x00 "USBLENG,USB Request Length Register"
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|
hexmask.word 0x00 0.--15. 1. "WLENGTUH,LengthThese bits store the USB request wLength value"
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|
group.word 0x5C++0x01
|
|
line.word 0x00 "DCPCFG,DCP Configuration Register"
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|
hexmask.word.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
|
|
bitfld.word 0x00 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Pipe continued at the end of transfer,1: Pipe disabled at the end of transfer"
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bitfld.word 0x00 5.--6. "Reserved,These bits are read as 00" "0,1,2,3"
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|
bitfld.word 0x00 4. "DIR,Transfer Direction" "0: Data receiving direction,1: Data transmitting direction"
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bitfld.word 0x00 0.--3. "Reserved,These bits are read as 0000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.word 0x5E++0x01
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|
line.word 0x00 "DCPMAXP,DCP Maximum Packet Size Register"
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|
bitfld.word 0x00 12.--15. "DEVSEL,Device Select" "0: Address 0000,1: Address 0001,2: Address 0010,3: Address 0011,4: Address 0100,5: Address 0101,?..."
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bitfld.word 0x00 7.--11. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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hexmask.word.byte 0x00 0.--6. 1. "MXPS,Maximum Packet SizeThese bits set the maximum amount of data (maximum packet size) in payloads for the DCP"
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|
group.word 0x60++0x01
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|
line.word 0x00 "DCPCTR,DCP Control Register"
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|
rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access is disabled,1: Buffer access is enabled"
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|
bitfld.word 0x00 14. "SUREQ,Setup Token Transmission" "0: Invalid,1: Transmits the setup packet"
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bitfld.word 0x00 12.--13. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.word 0x00 11. "SUREQCLR,SUREQ Bit Clear" "0: Invalid,1: Clears the SUREQ bit to 0"
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bitfld.word 0x00 9.--10. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0"
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bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1"
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rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Monitor" "0: DATA0,1: DATA1"
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rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: DCP is not used for the transaction,1: DCP is used for the transaction"
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bitfld.word 0x00 3.--4. "Reserved,These bits are read as 00" "0,1,2,3"
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bitfld.word 0x00 2. "CCPL,Control Transfer End Enable" "0: Invalid,1: Completion of control transfer is enabled"
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bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response"
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group.word 0x64++0x01
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line.word 0x00 "PIPESEL,Pipe Window Select Register"
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hexmask.word 0x00 4.--15. 1. "Reserved,These bits are read as 000000000000"
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bitfld.word 0x00 0.--3. "PIPESEL,Pipe Window Select" "0: No pipe selected,?,?,?,4: PIPE4,5: PIPE5,6: PIPE6,7: PIPE7,?..."
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group.word 0x68++0x01
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line.word 0x00 "PIPECFG,Pipe Configuration Register"
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bitfld.word 0x00 14.--15. "TYPE,Transfer Type" "0: Pipe not used,1: Bulk transfer(PIPE1 and PIPE5) /Setting..,2: Setting prohibited(PIPE1 and PIPE5)..,3: Isochronous transfer(PIPE1 and PIPE2).."
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bitfld.word 0x00 11.--13. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 10. "BFRE,BRDY Interrupt Operation Specification" "0: BRDY interrupt upon transmitting or receiving..,1: BRDY interrupt upon completion of reading data"
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bitfld.word 0x00 9. "DBLB,Double Buffer Mode" "0: Single buffer,1: Double buffer"
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bitfld.word 0x00 8. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Pipe assignment continued at the end of..,1: Pipe assignment disabled at the end of transfer"
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bitfld.word 0x00 6. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 5. "Reserved,This bit is read as 0" "0,1"
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bitfld.word 0x00 4. "DIR,Transfer Direction" "0: Receiving direction,1: Transmitting direction"
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bitfld.word 0x00 0.--3. "EPNUM,Endpoint NumberThese bits specify the endpoint number for the selected pipe.Setting 0000b means unused pipe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.word 0x6C++0x01
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line.word 0x00 "PIPEMAXP,Pipe Maximum Packet Size Register"
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bitfld.word 0x00 12.--15. "DEVSEL,Device Select" "0: Address 0000,1: Address 0001,2: Address 0010,3: Address 0011,4: Address 0100,5: Address 0101,?..."
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bitfld.word 0x00 9.--11. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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hexmask.word 0x00 0.--8. 1. "MXPS,Maximum Packet SizePIPE1 and PIPE2: 1 byte (001h) to 256 bytes (100h)PIPE3 to PIPE5: 8 bytes (008h) 16 bytes (010h) 32 bytes (020h) 64 bytes (040h) (Bits [8:7] and [2:0] are not provided.)PIPE6 to PIPE9: 1 byte (001h) to 64 bytes (040h) (Bits [8:7].."
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group.word 0x76++0x01
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line.word 0x00 "PIPE4CTR,Pipe"
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rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled,1: Buffer access by the CPU is enabled"
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rbitfld.word 0x00 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer"
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bitfld.word 0x00 11.--13. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled,1: Auto response is enabled"
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bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)"
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|
bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0"
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bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1"
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rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1"
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rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the..,1: The relevant pipe is used for the transaction"
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bitfld.word 0x00 2.--4. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response"
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group.word 0x78++0x01
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line.word 0x00 "PIPE5CTR,Pipe"
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rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled,1: Buffer access by the CPU is enabled"
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rbitfld.word 0x00 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer"
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bitfld.word 0x00 11.--13. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled,1: Auto response is enabled"
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bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)"
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bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0"
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bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1"
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rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1"
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rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the..,1: The relevant pipe is used for the transaction"
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bitfld.word 0x00 2.--4. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response"
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group.word 0x7A++0x01
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line.word 0x00 "PIPE6CTR,Pipe"
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rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access is disabled,1: Buffer access is enabled"
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bitfld.word 0x00 10.--14. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled (all.."
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bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0"
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bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1"
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rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1"
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rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used at the USB bus,1: The relevant pipe is used at the USB bus"
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bitfld.word 0x00 2.--4. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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newline
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bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response(dependingonthebufferstate),2: STALL response,3: STALL response"
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group.word 0x7C++0x01
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line.word 0x00 "PIPE7CTR,Pipe"
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rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access is disabled,1: Buffer access is enabled"
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bitfld.word 0x00 10.--14. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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newline
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bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled (all.."
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bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0"
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bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1"
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rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1"
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newline
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rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used at the USB bus,1: The relevant pipe is used at the USB bus"
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bitfld.word 0x00 2.--4. "Reserved,These bits are read as 000" "0,1,2,3,4,5,6,7"
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newline
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bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response(dependingonthebufferstate),2: STALL response,3: STALL response"
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group.word 0x9C++0x01
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line.word 0x00 "PIPE4TRE,Pipe"
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bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled,1: Transaction counter is enabled"
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|
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|
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bitfld.word 0x00 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared"
|
|
hexmask.word.byte 0x00 0.--7. 1. "Reserved,These bits are read as 00000000"
|
|
group.word 0xA0++0x01
|
|
line.word 0x00 "PIPE5TRE,Pipe"
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|
bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.word 0x00 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled,1: Transaction counter is enabled"
|
|
newline
|
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bitfld.word 0x00 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared"
|
|
hexmask.word.byte 0x00 0.--7. 1. "Reserved,These bits are read as 00000000"
|
|
group.word 0x9E++0x01
|
|
line.word 0x00 "PIPE4TRN,Pipe"
|
|
hexmask.word 0x00 0.--15. 1. "TRNCNT,Transaction Counter"
|
|
group.word 0xA2++0x01
|
|
line.word 0x00 "PIPE5TRN,Pipe"
|
|
hexmask.word 0x00 0.--15. 1. "TRNCNT,Transaction Counter"
|
|
group.word 0xCC++0x01
|
|
line.word 0x00 "USBMC,USB Module Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "Reserved,These bits are read as 00000000"
|
|
bitfld.word 0x00 7. "VDCEN,USB Regulator On/Off Control" "0: USB regulator off,1: USB regulator on"
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|
newline
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bitfld.word 0x00 2.--6. "Reserved,These bits are read as 00000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 1. "Reserved,This bit is read as 1" "0,1"
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|
newline
|
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bitfld.word 0x00 0. "VDDUSBE,USB Reference Power Supply Circuit On/Off Control" "0: USB reference power supply circuit off,1: USB reference power supply circuit on"
|
|
group.word 0xB0++0x01
|
|
line.word 0x00 "USBBCCTRL0,BC Control Register 0"
|
|
bitfld.word 0x00 10.--15. "Reserved,These bits are read as 000000" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rbitfld.word 0x00 9. "PDDETSTS0,D+ Pin 0.6 V Input Detection Status" "0: Not detected,1: Detected"
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|
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rbitfld.word 0x00 8. "CHGDETSTS0,D- Pin 0.6 V Input Detection Status" "0: Not detected,1: Detected"
|
|
bitfld.word 0x00 7. "BATCHGE0,BC (Battery Charger) Function General Enable Control" "0: Disabled,1: Enabled"
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|
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|
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bitfld.word 0x00 6. "Reserved,This bit is read as 0" "0,1"
|
|
bitfld.word 0x00 5. "VDMSRCE0,D- Pin VDMSRC (0.6 V) Output Control" "0: Stop,1: 0.6 V output"
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|
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bitfld.word 0x00 4. "IDPSINKE0,D+ Pin 0.6 V Input Detection (Comparator and Sink) Control" "0: Detection off,1: Detection on (comparator and sink current on)"
|
|
bitfld.word 0x00 3. "VDPSRCE0,D+ Pin VDPSRC (0.6 V) Output Control" "0: Stop,1: 0.6 V output"
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|
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|
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bitfld.word 0x00 2. "IDMSINKE0,D- Pin 0.6 V Input Detection (Comparator and Sink) Control" "0: Detection off,1: Detection on (comparator and sink current on)"
|
|
bitfld.word 0x00 1. "IDPSRCE0,D+ Pin IDPSRC Output Control" "0: Stop,1: 10 uA output"
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|
newline
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bitfld.word 0x00 0. "RPDME0,D- Pin Pull-Down Control" "0: Pull-down off,1: Pull-down on"
|
|
group.word 0xC4++0x01
|
|
line.word 0x00 "UCKSEL,USB Clock Selection Register"
|
|
hexmask.word 0x00 1.--15. 1. "Reserved,These bits are read as 000000000000000"
|
|
bitfld.word 0x00 0. "UCKSELC,USB Clock Selection" "0: High-speed on-chip oscillator clock (HOCO) is..,1: High-speed on-chip oscillator clock (HOCO) is.."
|
|
tree.end
|
|
tree "WDT (Watchdog Timer Unit)"
|
|
base ad:0x40044200
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "WDTRR,WDT Refresh Register"
|
|
hexmask.byte 0x00 0.--7. 1. "WDTRR,WDTRR is an 8-bit register that refreshes the down-counter of the WDT"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "WDTCR,WDT Control Register"
|
|
bitfld.word 0x00 14.--15. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 12.--13. "RPSS,Window Start Position Selection" "0: 25 percent,1: 50 percent,2: 75 percent,3: 100 percent (window start position is not.."
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|
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|
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bitfld.word 0x00 10.--11. "Reserved,These bits are read as 00" "0,1,2,3"
|
|
bitfld.word 0x00 8.--9. "RPES,Window End Position Selection" "0: 75 percent,1: 50 percent,2: 25 percent,3: 0 percent (window end position is not.."
|
|
newline
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bitfld.word 0x00 4.--7. "CKS,Clock Division Ratio Selection" "?,1: PCLK/4,?,?,4: PCLK/64,?,6: PCLK/512,7: PCLK/2048,8: PCLK/8192,?,?,?,?,?,?,15: PCLK/128"
|
|
bitfld.word 0x00 2.--3. "Reserved,These bits are read as 00" "0,1,2,3"
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|
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|
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bitfld.word 0x00 0.--1. "TOPS,Timeout Period Selection" "0: 1 024 cycles (03FFh),1: 4 096 cycles (0FFFh),2: 8 192 cycles (1FFFh),3: 16 384 cycles (3FFFh)"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "WDTSR,WDT Status Register"
|
|
bitfld.word 0x00 15. "REFEF,Refresh Error Flag" "0: No refresh error occurred,1: Refresh error occurred"
|
|
bitfld.word 0x00 14. "UNDFF,Underflow Flag" "0: No underflow occurred,1: Underflow occurred"
|
|
newline
|
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hexmask.word 0x00 0.--13. 1. "CNTVAL,Down-Counter ValueValue counted by the down-counter"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "WDTRCR,WDT Reset Control Register"
|
|
bitfld.byte 0x00 7. "RSTIRQS,Reset Interrupt Request Selection" "0: Non-maskable interrupt request or interrupt..,1: Reset output is enabled"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "WDTCSTPR,WDT Count Stop Control Register"
|
|
bitfld.byte 0x00 7. "SLCSTP,Sleep-Mode Count Stop Control" "0: Count stop is disabled,1: Count is stopped at a transition to sleep mode"
|
|
hexmask.byte 0x00 0.--6. 1. "Reserved,These bits are read as 0000000"
|
|
tree.end
|
|
autoindent.off
|
|
newline
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