15654 lines
1006 KiB
Plaintext
15654 lines
1006 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: PXA320/290 On-Chip Peripheral
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; @Props: Released
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; @Author: JAZ
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; @Changelog: 2007-04-20 JAZ
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; @Manufacturer: INTEL - Intel Corporation
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; @Doc: Monahans_P_Processor_DM_Vol._1_Rev_0.95.pdf
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; @Core: Xscale
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perpxa32.per 7582 2017-02-17 15:40:55Z askoncej $
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;Errors and Problems found in the documentation:
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;-Slave Power Management Unit : AGENP - description not found, taken from PXA300/310.
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;-USB 2.0 : U2DMAINT description not found, taken from PXA300/310.
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config 16. 8.
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width 0x8
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; --------------------------------------------------------------------------------
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; CP15 for Manzano core
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; --------------------------------------------------------------------------------
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tree "CP15"
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; --------------------------------------------------------------------------------
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; *** Intel IXP2350 ***
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; --------------------------------------------------------------------------------
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if (d.l(c15:0x0)&0xffffe3f0)==0x69056200
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--15. "CoreGen ,Core Generation" "0,1,2,Manzano,4,5,6,7"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "IXP2350,IXP2350"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,res,res,res,res,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel PXA290, Marvell PXA320 ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69056020
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--15. "CoreGen ,Core Generation" "0,1,2,Manzano,4,5,6,7"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "PXA290/320,PXA290/320"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,res,res,B-0,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel/Marvell Tavor ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69056030
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--15. "CoreGen ,Core Generation" "0,1,2,Manzano,4,5,6,7"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "Tavor,Tavor"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "res,res,res,res,A-0,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** other Intel XScale Manzano Core ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe000)==0x69056000
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--15. "CoreGen ,Core Generation" "0,1,2,Manzano,4,5,6,7"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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hexmask.long 0x0 4.--9. 1. "ProdNum ,Product Number"
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hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision"
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; --------------------------------------------------------------------------------
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; *** other Intel XScale V5TE ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffff0000)==0x69050000
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..."
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textline " "
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bitfld.long 0x0 13.--15. "CoreGen ,Core Generation" "0,1,2,Manzano,4,5,6,7"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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hexmask.long 0x0 4.--9. 1. "ProdNum ,Product Number"
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hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision"
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; --------------------------------------------------------------------------------
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; *** any else ***
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; --------------------------------------------------------------------------------
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else
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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; 0x41 = ARM, 0x44 = Digital, 0x69 = Intel
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hexmask.long 0x0 24.--31. 1. "Implementor ,Implementation Trademark"
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hexmask.long 0x0 20.--23. 1. " Variant ,Implementation defined variant number"
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textline " "
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hexmask.long 0x0 16.--19. 1. "Architecture ,Architecture Version Code"
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hexmask.long 0x0 13.--15. 1. " Primary part number ,Core Generation"
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textline " "
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hexmask.long 0x0 0.--3. 1. "Revision ,Product Revision"
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endif
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; --------------------------------------------------------------------------------
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group c15:0x100--0x100
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line.long 0x0 "L1TYPE,L1 Cache Type Register"
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bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--20. "DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--8. "ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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group c15:0x1000--0x1000
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line.long 0x0 "L2ID,L2 System ID"
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hexmask.long 0x0 24.--31. 1. "Trademark ,Implementation Trademark"
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group c15:0x1100--0x1100
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line.long 0x0 "L2TYPE,L2 Cache Type Register"
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bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 20.--23. " Way Size ,L2 Unified Cache Way Size" "res,res,32k,64k,res,res,res,res,res,?..."
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bitfld.long 0x0 15.--19. " Associativity ,L2 Unified Cache Associativity" "not present,res,res,res,res,res,res,res,8-way,?..."
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bitfld.long 0x0 12.--13. " Line Length ,L2 Unified Cache Line Length" "32b,res,res,res"
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textline " "
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bitfld.long 0x0 8.--11. "Way Size ,L2 Unified Cache Way Size" "res,res,32k,64k,res,res,res,res,res,?..."
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bitfld.long 0x0 3.--7. " Associativity ,L2 Unified Cache Associativity" "not present,res,res,res,res,res,res,res,8-way,?..."
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bitfld.long 0x0 0.--1. " Line Length ,L2 Unified Cache Line Length" "32b,res,res,res"
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group c15:0x1--0x1
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 26. "L2 ,L2 Unified Cache Enable" "disable,enable"
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bitfld.long 0x0 13. " V ,Exception Vector Relocation" "0x00000000,0xffff0000"
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bitfld.long 0x0 12. " I ,Instruction Cache" "disable,enable"
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bitfld.long 0x0 11. " Z ,Branch Target Buffer" "disable,enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "off,on"
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bitfld.long 0x0 8. " S ,System Protection" "off,on"
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textline " "
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bitfld.long 0x0 7. "B ,Endianism" "little,big"
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bitfld.long 0x0 2. " C ,Data Cache" "disable,enable"
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bitfld.long 0x0 1. " A ,Alignment Fault" "disable,enable"
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bitfld.long 0x0 0. " M ,Memory Management Unit" "disable,enable"
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group c15:0x101--0x101
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line.long 0x0 "AuxCR,Auxiliary Control Register"
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bitfld.long 0x0 10.--11. "OC ,LLR Outer Cache Attributes" "non-cacheable,write back - write allocate,res,res"
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bitfld.long 0x0 4.--5. " IC ,LLR Inner (Data) Cache Attributes" "write back - read allocate,write back - read allocate,write through - read allocate,write back - read allocate"
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bitfld.long 0x0 1. " P ,Page Table Memory Attribute" "0,1"
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group c15:0x2--0x2
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line.long 0x0 "TTB,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 "TTBA ,Translation Table Base Address"
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bitfld.long 0x0 3.--4. " OC ,Table Walk Outer Cache Attributes" "non-cacheable,res,non-cacheable,write back"
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bitfld.long 0x0 2. " P ,Table Walk Memory Attribute" "0,1"
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group c15:0x3--0x3
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line.long 0x0 "DAC,Domain Access Control Register"
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bitfld.long 0x0 30.--31. "D15 ,Domain Access 15" "no access,client,reserved,manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "no access,client,reserved,manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "no access,client,reserved,manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 22.--23. "D11 ,Domain Access 11" "no access,client,reserved,manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "no access,client,reserved,manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "no access,client,reserved,manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 14.--15. "D7 ,Domain Access 7" "no access,client,reserved,manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "no access,client,reserved,manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "no access,client,reserved,manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 6.--7. "D3 ,Domain Access 3" "no access,client,reserved,manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "no access,client,reserved,manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "no access,client,reserved,manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "no access,client,reserved,manager"
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group c15:0x5--0x5
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line.long 0x0 "FSR,Fault Status Register"
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bitfld.long 0x0 10. "X ,Status Field Extension" "0,1"
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bitfld.long 0x0 9. " D ,Debug event" "no,yes"
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bitfld.long 0x0 4.--7. " Domain ,Domain for Data Abort" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " Status ,Status X=0/X=1" "reserved/IMMU Exception,alignment/reserved,reserved,alignment/reserved,reserved/lock abort,transl_sect/reserved,reserved/external,transl_page,reserved/cache parity,domain_sect/reserved,reserved,domain_page,trans_lev_1/reserved,permission_sect/reserved,trans_lev_2/reserved,permission_page"
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group c15:0x6--0x6
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line.long 0x0 "FAR,Fault Address Registerr"
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group c15:0x29--0x29
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line.long 0x0 "DCLR, Data Cache Lock Register"
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bitfld.long 0x0 0. "L ,Data Cache Lock Register" "no locking,fill with lock"
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group c15:0xd--0xd
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line.long 0x0 "PID,Process Identifier"
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hexmask.long 0x0 25.--31. 0x2000000 "PID ,Process Identifier"
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group c15:0x8e--0x8e
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line.long 0x0 "IBCR0,Inctruction Breakpoint Register 0"
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hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA"
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bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable"
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group c15:0x9e--0x9e
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line.long 0x0 "IBCR1,Inctruction Breakpoint Register 1"
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hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA"
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bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable"
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group c15:0x0e--0x0e
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line.long 0x0 "DBR0,Data Breakpoint Register 0"
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group c15:0x3e--0x3e
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line.long 0x0 "DBR1,Data Breakpoint Register 1"
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group c15:0x4e--0x4e
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line.long 0x0 "DBCON,Data Breakpoint Configuration Register"
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bitfld.long 0x0 8. "M ,DBR1 Mode" "Data Breakpoint Address,Data Address Mask"
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bitfld.long 0x0 2.--3. " E1 ,DBR1 Breakpoint Enable" "disable,enable store,enable load/store,enable load"
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bitfld.long 0x0 0.--1. " E0 ,DBR0 Enable" "disable,enable store,enable load/store,enable load"
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; --------------------------------------------------------------------------------
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; *** Intel 80200 ***
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; --------------------------------------------------------------------------------
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if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
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bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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; *** Intel 80321 (IOP321) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
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bitfld.long 0x0 7. " CP7 ,Coprocessor Access Rights" "denied,allowed"
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bitfld.long 0x0 6. " CP6 ,Coprocessor Access Rights" "denied,allowed"
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bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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; *** Intel PXA210, PXA250 (Sabinal, Cotulla) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed"
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bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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; *** Intel (Bulverde) ***
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; --------------------------------------------------------------------------------
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; wrong Product ID in developer's manual revision 0.1 (ID of PXA250!!!)
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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; *** Intel (Manitoba) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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; *** Intel IXP2400, IXP2800 (Sausolito, Castine) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffff41a0)==0x69052120
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed"
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bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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; *** other Intel XScale V5TE ***
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; *** includes XScale IXP425, because no product ID is available now ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe000)==0x69054000
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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; *** other Intel XScale V5TE ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe000)==0x69052000
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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; *** any else ***
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; --------------------------------------------------------------------------------
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else
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
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; --------------------------------------------------------------------------------
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endif
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tree.end
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; --------------------------------------------------------------------------------
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; IXP2325, IXP2350
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; --------------------------------------------------------------------------------
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tree "CP14"
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group c14:0x10++0x00 "Performance Monitoring"
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line.long 4.*0x00 "PMNC, Performance Monitor control Register"
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bitfld.long 4.*0x00 20.--27. "EvtCnt1 ,Source of Events that PMN1 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..."
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bitfld.long 4.*0x00 12.--19. " EvtCnt0 ,Source of Events that PMN0 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..."
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textline " "
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bitfld.long 4.*0x00 10. "CCNT-OV ,Clock Counter Overflow Flag" "no,yes"
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bitfld.long 4.*0x00 9. " PMN1-OV ,Performace Counter 1 Overflow Flag" "no,yes"
|
|
bitfld.long 4.*0x00 8. " PMN0-OV ,Performace Counter 0 Overflow Flag" "no,yes"
|
|
textline " "
|
|
bitfld.long 4.*0x00 6. "CCNT-IE ,Clock Counter Interrupt" "disable,enable"
|
|
bitfld.long 4.*0x00 5. " PMN1-IE ,Performace Counter 1 Interrupt" "disable,enable"
|
|
bitfld.long 4.*0x00 4. " PMN0-IE ,Performace Counter 0 Interrupt" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4.*0x00 3. "D ,Clock Count Divider" "1,64"
|
|
bitfld.long 4.*0x00 2. " C ,Clock Counter Reset" "no action,reset to 0"
|
|
bitfld.long 4.*0x00 1. " P ,Performace Counter Reset (both)" "no action,reset to 0"
|
|
bitfld.long 4.*0x00 0. " E ,Enable all 3 Counters" "disable,enable"
|
|
group c14:0x11++0x00
|
|
line.long 4.*0x00 "CCNT, 32-bit clock counter"
|
|
group c14:0x14++0x00
|
|
line.long 4.*0x00 "INTEN, 32-bit clock counter"
|
|
group c14:0x15++0x00
|
|
line.long 4.*0x00 "FLAG, 32-bit clock counter"
|
|
group c14:0x18++0x00
|
|
line.long 4.*0x00 "EVTSEL, 32-bit clock counter"
|
|
group c14:0x20++0x03
|
|
line.long 4.*0x00 "PMN0, 32-bit event counter"
|
|
line.long 4.*0x01 "PMN1, 32-bit event counter"
|
|
line.long 4.*0x02 "PMN2, 32-bit event counter"
|
|
line.long 4.*0x03 "PMN3, 32-bit event counter"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80200 ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 4.*0x00 0.--3. "CCLKCFG ,Core Clock Configuration" "res,3,4,5,6,7,8,9,res,?..."
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,IDLE,res,SLEEP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80321 or IOP321 (Verde) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel PXA210, PXA250 (Sabinal, Cotulla) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 4.*0x00 1.--1. "FCS ,Frequency Change Sequence" "do not enter,enter"
|
|
bitfld.long 4.*0x00 0.--0. " TURBO ,Turbo Mode" "exit,enter"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "Run/Turbo,Idle,res,Sleep/Deep Sleep"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel (Bulverde) ***
|
|
; --------------------------------------------------------------------------------
|
|
; wrong Product ID in developer's manual revision 0.1 (ID of PXA250!!!)
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel IXP2400, IXP2800 (Sausolito, Castine) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel (Manitoba) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69052000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; *** includes XScale IXP425 ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69054000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel XScale PXA300 ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xfffffff0)==0x69056880
|
|
group c14:0x06--0x06 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 0x00 1. " F ,Core Ferquency Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " T ,Turbo Mode" "Not changed,Changed"
|
|
group c14:0x07--0x07
|
|
line.long 4.*0x00 "PWRMODE,Power Management Register"
|
|
bitfld.long 0x00 0.--2. " M ,Mode" "S0/D0/C0,S0/D0/C1,S0/D1/C2,S0/D2/C2,Reserved,D0CS,S2/D3/C4,S3/D4/C4"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel XScale PXA310 ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xfffffff0)==0x69056890
|
|
group c14:0x06--0x06 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 0x00 1. " F ,Core Ferquency Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " T ,Turbo Mode" "Not changed,Changed"
|
|
group c14:0x07--0x07
|
|
line.long 4.*0x00 "PWRMODE,Power Management Register"
|
|
bitfld.long 0x00 0.--2. " M ,Mode" "S0/D0/C0,S0/D0/C1,S0/D1/C2,S0/D2/C2,Reserved,D0CS,S2/D3/C4,S3/D4/C4"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel XScale PXA320 ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xfffffffe)==0x69056824
|
|
group c14:0x06--0x06 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 0x00 1. " F ,Core Ferquency Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " T ,Turbo Mode" "Not changed,Changed"
|
|
group c14:0x07--0x07
|
|
line.long 4.*0x00 "PWRMODE,Power Management Register"
|
|
bitfld.long 0x00 0.--2. " M ,Mode" "S0/D0/C0,S0/D0/C1,S0/D1/C2,S0/D2/C2,Reserved,D0CS,S2/D3/C4,S3/D4/C4"
|
|
; --------------------------------------------------------------------------------
|
|
; *** any other XScale ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
endif
|
|
group c14:0x08--0x0d "Software Debug"
|
|
line.long 4.*0x02 "DCSR,Debug Control and Status Register"
|
|
bitfld.long 4.*0x02 31. "GE ,Global Enable" "disable,enable"
|
|
bitfld.long 4.*0x02 30. " H ,Halt Mode" "Monitor Mode,Halt Mode"
|
|
textline " "
|
|
bitfld.long 4.*0x02 23. "TF ,Trap FIQ" "disable,enable"
|
|
bitfld.long 4.*0x02 22. " TI ,Trap IRQ" "disable,enable"
|
|
bitfld.long 4.*0x02 20. " TD ,Trap Data Abort" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4.*0x02 19. "TA ,Trap Prefetch Abort" "disable,enable"
|
|
bitfld.long 4.*0x02 18. " TS ,Trap Software Interrupt" "disable,enable"
|
|
bitfld.long 4.*0x02 17. " TU ,Trap Undefined Instruction" "disable,enable"
|
|
bitfld.long 4.*0x02 16. " TR ,Trap Reset" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4.*0x02 5. "SA ,Sticky Abort" "no,yes"
|
|
bitfld.long 4.*0x02 2.--4. " MOE ,Method of Entry" "Reset,Inst Bkpt, Data Bkpt, BKPT Inst, Ext Debug Event, Vector Trap, Trace Buffer full, reserved"
|
|
bitfld.long 4.*0x02 1. " M ,Trace Buffer Mode" "wrap around,fill-once"
|
|
bitfld.long 4.*0x02 0. " E ,Trace Buffer Enable" "no,yes"
|
|
line.long 4.*0x04 "CHKPT0,Checkpoint 0 Register"
|
|
line.long 4.*0x05 "CHKPT1,Checkpoint 1 Register"
|
|
tree.end
|
|
; %include ../common/cp6-manzano.ph
|
|
; --------------------------------------------------------------------------------
|
|
; Wireless MMX registers
|
|
; --------------------------------------------------------------------------------
|
|
tree "Wireless MMX"
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(c1:0x0)&0xffff0f00)==0x69050000
|
|
group c1:0x0--0x0
|
|
line.long 0x0 "wCID,Coprocessor ID, Revision, Status"
|
|
bitfld.long 0x0 24.--24. "Vendor ,Vendor ID" "Intel,Intel"
|
|
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
|
|
textline " "
|
|
bitfld.long 0x0 12.--15. "CPTyp ,Coprocessor Type" "res,Wireless MMX,Wireless MMX2,res,res,res,res,res,res,?..."
|
|
bitfld.long 0x0 04.--07. " Major ,Major Revision Number" "0,1,2,3,4,5,6,7,8,910,11,12,13,14,15,%d..."
|
|
bitfld.long 0x0 00.--03. " Minor ,Minor Revision Number" "0,1,2,3,4,5,6,7,8,910,11,12,13,14,15,%d..."
|
|
; --------------------------------------------------------------------------------
|
|
; *** any else ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group c1:0x0--0x0
|
|
line.long 0x0 "wCID,Coprocessor ID, Revision, Status"
|
|
hexmask.long 0x0 24.--31. 1. "Vendor ,Vendor ID"
|
|
hexmask.long 0x0 16.--23. 1. " Arch ,Architecture Version"
|
|
textline " "
|
|
hexmask.long 0x0 08.--15. 1. "CPTyp ,Coprocessor Type"
|
|
bitfld.long 0x0 04.--07. " Major ,Major Revision Number" "0,1,2,3,4,5,6,7,8,910,11,12,13,14,15,%d..."
|
|
bitfld.long 0x0 00.--03. " Minor ,Minor Revision Number" "0,1,2,3,4,5,6,7,8,910,11,12,13,14,15,%d..."
|
|
endif
|
|
; --------------------------------------------------------------------------------
|
|
group c1:0x1--0x1
|
|
line.long 0x0 "wCON,Coprocessor Control Register"
|
|
bitfld.long 0x0 01.--01. "MUP ,One of main registers wRn has been updated" "no,yes"
|
|
bitfld.long 0x0 00.--00. " CUP ,One of control registers wCx has been updated" "no,yes"
|
|
group c1:0x2--0x2
|
|
line.long 0x0 "wCSSF,Saturation SIMD Flags"
|
|
bitfld.long 0x0 7. "B7 ,Saturation flag for Byte 7 or Half Word 3 or Word 1 or Double Word 0" "no,yes"
|
|
bitfld.long 0x0 6. " B6 ,Saturation flag for Byte 6" "no,yes"
|
|
bitfld.long 0x0 5. " B5 ,Saturation flag for Byte 5 or Half Word 2" "no,yes"
|
|
bitfld.long 0x0 4. " B4 ,Saturation flag for Byte 4" "no,yes"
|
|
bitfld.long 0x0 3. " B3 ,Saturation flag for Byte 3 or Half Word 1 or Word 0" "no,yes"
|
|
bitfld.long 0x0 2. " B2 ,Saturation flag for Byte 2" "no,yes"
|
|
bitfld.long 0x0 1. " B1 ,Saturation flag for Byte 1 or Half Word 0" "no,yes"
|
|
bitfld.long 0x0 0. " B0 ,Saturation flag for Byte 0" "no,yes"
|
|
group c1:0x3--0x3
|
|
line.long 0x0 "wCASF,Arithmetic SIMD Flags"
|
|
bitfld.long 0x0 31. "SIMD8/16/32/64 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 30. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 29. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 28. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 27. "SIMD8 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 26. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 25. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 24. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 23. "SIMD8/16 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 22. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 21. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 20. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 19. "SIMD8 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 18. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 17. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 16. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 15. "SIMD8/16/32 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 14. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 13. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 12. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 11. "SIMD8 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 10. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 9. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 8. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 7. "SIMD8/16 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 6. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 5. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 4. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 3. "SIMD8 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 2. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 1. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 0. " ,Result in this byte field oVerflowed" "-,V"
|
|
group c1:0x4--0x4
|
|
line.long 0x0 "wCGR0 ,General Purpose register 0"
|
|
group c1:0x5--0x5
|
|
line.long 0x0 "wCGR1 ,General Purpose register 1"
|
|
group c1:0x6--0x6
|
|
line.long 0x0 "wCGR2 ,General Purpose register 2"
|
|
group c1:0x7--0x7
|
|
line.long 0x0 "wCGR3 ,General Purpose register 3"
|
|
group c0:0x00--0x1f
|
|
line.quad 4.*0x00 "wR0 ,SIMD Data Register 0"
|
|
line.quad 4.*0x02 "wR1 ,SIMD Data Register 1"
|
|
line.quad 4.*0x04 "wR2 ,SIMD Data Register 2"
|
|
line.quad 4.*0x06 "wR3 ,SIMD Data Register 3"
|
|
line.quad 4.*0x08 "wR4 ,SIMD Data Register 4"
|
|
line.quad 4.*0x0a "wR5 ,SIMD Data Register 5"
|
|
line.quad 4.*0x0c "wR6 ,SIMD Data Register 6"
|
|
line.quad 4.*0x0e "wR7 ,SIMD Data Register 7"
|
|
line.quad 4.*0x10 "wR8 ,SIMD Data Register 8"
|
|
line.quad 4.*0x12 "wR9 ,SIMD Data Register 9"
|
|
line.quad 4.*0x14 "wR10 ,SIMD Data Register 10"
|
|
line.quad 4.*0x16 "wR11 ,SIMD Data Register 11"
|
|
line.quad 4.*0x18 "wR12 ,SIMD Data Register 12"
|
|
line.quad 4.*0x1a "wR13 ,SIMD Data Register 13"
|
|
line.quad 4.*0x1c "wR14 ,SIMD Data Register 14"
|
|
line.quad 4.*0x1e "wR15 ,SIMD Data Register 15"
|
|
tree.end
|
|
tree "General-Purpose I/O"
|
|
base ad:0x40E00000
|
|
width 0x7
|
|
rgroup.long 0x00++3 "GPIO Pin-Level Registers"
|
|
line.long 0x00 "GPLR0,GPIO Pin-Level 0 Register"
|
|
bitfld.long 0x0 31. " PL31 ,GPIO Port Level 31" "Low,High"
|
|
bitfld.long 0x0 30. " PL30 ,GPIO Port Level 30" "Low,High"
|
|
bitfld.long 0x0 29. " PL29 ,GPIO Port Level 29" "Low,High"
|
|
bitfld.long 0x0 28. " PL28 ,GPIO Port Level 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PL27 ,GPIO Port Level 27" "Low,High"
|
|
bitfld.long 0x0 26. " PL26 ,GPIO Port Level 26" "Low,High"
|
|
bitfld.long 0x0 25. " PL25 ,GPIO Port Level 25" "Low,High"
|
|
bitfld.long 0x0 24. " PL24 ,GPIO Port Level 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PL23 ,GPIO Port Level 23" "Low,High"
|
|
bitfld.long 0x0 22. " PL22 ,GPIO Port Level 22" "Low,High"
|
|
bitfld.long 0x0 21. " PL21 ,GPIO Port Level 21" "Low,High"
|
|
bitfld.long 0x0 20. " PL20 ,GPIO Port Level 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PL19 ,GPIO Port Level 19" "Low,High"
|
|
bitfld.long 0x0 18. " PL18 ,GPIO Port Level 18" "Low,High"
|
|
bitfld.long 0x0 17. " PL17 ,GPIO Port Level 17" "Low,High"
|
|
bitfld.long 0x0 16. " PL16 ,GPIO Port Level 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PL15 ,GPIO Port Level 15" "Low,High"
|
|
bitfld.long 0x0 14. " PL14 ,GPIO Port Level 14" "Low,High"
|
|
bitfld.long 0x0 13. " PL13 ,GPIO Port Level 13" "Low,High"
|
|
bitfld.long 0x0 12. " PL12 ,GPIO Port Level 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PL11 ,GPIO Port Level 11" "Low,High"
|
|
bitfld.long 0x0 10. " PL10 ,GPIO Port Level 10" "Low,High"
|
|
bitfld.long 0x0 9. " PL9 ,GPIO Port Level 9" "Low,High"
|
|
bitfld.long 0x0 8. " PL8 ,GPIO Port Level 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PL7 ,GPIO Port Level 7" "Low,High"
|
|
bitfld.long 0x0 6. " PL6 ,GPIO Port Level 6" "Low,High"
|
|
bitfld.long 0x0 5. " PL5 ,GPIO Port Level 5" "Low,High"
|
|
bitfld.long 0x0 4. " PL4 ,GPIO Port Level 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PL3 ,GPIO Port Level 3" "Low,High"
|
|
bitfld.long 0x0 2. " PL2 ,GPIO Port Level 2" "Low,High"
|
|
bitfld.long 0x0 1. " PL1 ,GPIO Port Level 1" "Low,High"
|
|
bitfld.long 0x0 0. " PL0 ,GPIO Port Level 0" "Low,High"
|
|
rgroup.long 0x04++3
|
|
line.long 0x00 "GPLR1,GPIO Pin-Level 1 Register"
|
|
bitfld.long 0x0 31. " PL63 ,GPIO Port Level 63" "Low,High"
|
|
bitfld.long 0x0 30. " PL62 ,GPIO Port Level 62" "Low,High"
|
|
bitfld.long 0x0 29. " PL61 ,GPIO Port Level 61" "Low,High"
|
|
bitfld.long 0x0 28. " PL60 ,GPIO Port Level 60" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PL59 ,GPIO Port Level 59" "Low,High"
|
|
bitfld.long 0x0 26. " PL58 ,GPIO Port Level 58" "Low,High"
|
|
bitfld.long 0x0 25. " PL57 ,GPIO Port Level 57" "Low,High"
|
|
bitfld.long 0x0 24. " PL56 ,GPIO Port Level 56" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PL55 ,GPIO Port Level 55" "Low,High"
|
|
bitfld.long 0x0 22. " PL54 ,GPIO Port Level 54" "Low,High"
|
|
bitfld.long 0x0 21. " PL53 ,GPIO Port Level 53" "Low,High"
|
|
bitfld.long 0x0 20. " PL52 ,GPIO Port Level 52" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PL51 ,GPIO Port Level 51" "Low,High"
|
|
bitfld.long 0x0 18. " PL50 ,GPIO Port Level 50" "Low,High"
|
|
bitfld.long 0x0 17. " PL49 ,GPIO Port Level 49" "Low,High"
|
|
bitfld.long 0x0 16. " PL48 ,GPIO Port Level 48" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PL47 ,GPIO Port Level 47" "Low,High"
|
|
bitfld.long 0x0 14. " PL46 ,GPIO Port Level 46" "Low,High"
|
|
bitfld.long 0x0 13. " PL45 ,GPIO Port Level 45" "Low,High"
|
|
bitfld.long 0x0 12. " PL44 ,GPIO Port Level 44" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PL43 ,GPIO Port Level 43" "Low,High"
|
|
bitfld.long 0x0 10. " PL42 ,GPIO Port Level 42" "Low,High"
|
|
bitfld.long 0x0 9. " PL41 ,GPIO Port Level 41" "Low,High"
|
|
bitfld.long 0x0 8. " PL40 ,GPIO Port Level 40" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PL39 ,GPIO Port Level 39" "Low,High"
|
|
bitfld.long 0x0 6. " PL38 ,GPIO Port Level 38" "Low,High"
|
|
bitfld.long 0x0 5. " PL37 ,GPIO Port Level 37" "Low,High"
|
|
bitfld.long 0x0 4. " PL36 ,GPIO Port Level 36" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PL35 ,GPIO Port Level 35" "Low,High"
|
|
bitfld.long 0x0 2. " PL34 ,GPIO Port Level 34" "Low,High"
|
|
bitfld.long 0x0 1. " PL33 ,GPIO Port Level 33" "Low,High"
|
|
bitfld.long 0x0 0. " PL32 ,GPIO Port Level 32" "Low,High"
|
|
rgroup.long 0x08++3
|
|
line.long 0x00 "GPLR2,GPIO Pin-Level 2 Register"
|
|
bitfld.long 0x0 31. " PL95 ,GPIO Port Level 95" "Low,High"
|
|
bitfld.long 0x0 30. " PL94 ,GPIO Port Level 94" "Low,High"
|
|
bitfld.long 0x0 29. " PL93 ,GPIO Port Level 93" "Low,High"
|
|
bitfld.long 0x0 28. " PL92 ,GPIO Port Level 92" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PL91 ,GPIO Port Level 91" "Low,High"
|
|
bitfld.long 0x0 26. " PL90 ,GPIO Port Level 90" "Low,High"
|
|
bitfld.long 0x0 25. " PL89 ,GPIO Port Level 89" "Low,High"
|
|
bitfld.long 0x0 24. " PL88 ,GPIO Port Level 88" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PL87 ,GPIO Port Level 87" "Low,High"
|
|
bitfld.long 0x0 22. " PL86 ,GPIO Port Level 86" "Low,High"
|
|
bitfld.long 0x0 21. " PL85 ,GPIO Port Level 85" "Low,High"
|
|
bitfld.long 0x0 20. " PL84 ,GPIO Port Level 84" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PL83 ,GPIO Port Level 83" "Low,High"
|
|
bitfld.long 0x0 18. " PL82 ,GPIO Port Level 82" "Low,High"
|
|
bitfld.long 0x0 17. " PL81 ,GPIO Port Level 81" "Low,High"
|
|
bitfld.long 0x0 16. " PL80 ,GPIO Port Level 80" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PL79 ,GPIO Port Level 79" "Low,High"
|
|
bitfld.long 0x0 14. " PL78 ,GPIO Port Level 78" "Low,High"
|
|
bitfld.long 0x0 13. " PL77 ,GPIO Port Level 77" "Low,High"
|
|
bitfld.long 0x0 12. " PL76 ,GPIO Port Level 76" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PL75 ,GPIO Port Level 75" "Low,High"
|
|
bitfld.long 0x0 10. " PL74 ,GPIO Port Level 74" "Low,High"
|
|
bitfld.long 0x0 9. " PL73 ,GPIO Port Level 73" "Low,High"
|
|
bitfld.long 0x0 8. " PL72 ,GPIO Port Level 72" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PL71 ,GPIO Port Level 71" "Low,High"
|
|
bitfld.long 0x0 6. " PL70 ,GPIO Port Level 70" "Low,High"
|
|
bitfld.long 0x0 5. " PL69 ,GPIO Port Level 69" "Low,High"
|
|
bitfld.long 0x0 4. " PL68 ,GPIO Port Level 68" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PL67 ,GPIO Port Level 67" "Low,High"
|
|
bitfld.long 0x0 2. " PL66 ,GPIO Port Level 66" "Low,High"
|
|
bitfld.long 0x0 1. " PL65 ,GPIO Port Level 65" "Low,High"
|
|
bitfld.long 0x0 0. " PL64 ,GPIO Port Level 64" "Low,High"
|
|
rgroup.long 0x100++3
|
|
line.long 0x00 "GPLR3,GPIO Pin-Level 3 Register"
|
|
bitfld.long 0x0 31. " PL127 ,GPIO Port Level 127" "Low,High"
|
|
bitfld.long 0x0 30. " PL126 ,GPIO Port Level 126" "Low,High"
|
|
bitfld.long 0x0 29. " PL125 ,GPIO Port Level 125" "Low,High"
|
|
bitfld.long 0x0 28. " PL124 ,GPIO Port Level 124" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PL123 ,GPIO Port Level 123" "Low,High"
|
|
bitfld.long 0x0 26. " PL122 ,GPIO Port Level 122" "Low,High"
|
|
bitfld.long 0x0 25. " PL121 ,GPIO Port Level 121" "Low,High"
|
|
bitfld.long 0x0 24. " PL120 ,GPIO Port Level 120" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PL119 ,GPIO Port Level 119" "Low,High"
|
|
bitfld.long 0x0 22. " PL118 ,GPIO Port Level 118" "Low,High"
|
|
bitfld.long 0x0 21. " PL117 ,GPIO Port Level 117" "Low,High"
|
|
bitfld.long 0x0 20. " PL116 ,GPIO Port Level 116" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PL115 ,GPIO Port Level 115" "Low,High"
|
|
bitfld.long 0x0 18. " PL114 ,GPIO Port Level 114" "Low,High"
|
|
bitfld.long 0x0 17. " PL113 ,GPIO Port Level 113" "Low,High"
|
|
bitfld.long 0x0 16. " PL112 ,GPIO Port Level 112" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PL111 ,GPIO Port Level 111" "Low,High"
|
|
bitfld.long 0x0 14. " PL110 ,GPIO Port Level 110" "Low,High"
|
|
bitfld.long 0x0 13. " PL109 ,GPIO Port Level 109" "Low,High"
|
|
bitfld.long 0x0 12. " PL108 ,GPIO Port Level 108" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PL107 ,GPIO Port Level 107" "Low,High"
|
|
bitfld.long 0x0 10. " PL106 ,GPIO Port Level 106" "Low,High"
|
|
bitfld.long 0x0 9. " PL105 ,GPIO Port Level 105" "Low,High"
|
|
bitfld.long 0x0 8. " PL104 ,GPIO Port Level 104" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PL103 ,GPIO Port Level 103" "Low,High"
|
|
bitfld.long 0x0 6. " PL102 ,GPIO Port Level 102" "Low,High"
|
|
bitfld.long 0x0 5. " PL101 ,GPIO Port Level 101" "Low,High"
|
|
bitfld.long 0x0 4. " PL100 ,GPIO Port Level 100" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PL99 ,GPIO Port Level 99" "Low,High"
|
|
bitfld.long 0x0 2. " PL98 ,GPIO Port Level 98" "Low,High"
|
|
bitfld.long 0x0 1. " PL97 ,GPIO Port Level 97" "Low,High"
|
|
bitfld.long 0x0 0. " PL96 ,GPIO Port Level 96" "Low,High"
|
|
; --------------------------------------------------------------------------------
|
|
group.long 0x0c++3 "GPIO Pin Direction Registers"
|
|
line.long 0x00 "GPDR0,GPIO Pin Direction 0 Register"
|
|
setclrfld.long 0x0 31. 0x3F4 31. 0x414 31. " PD31_Set/Clr ,GPIO Port Direction 31" "Input,Output"
|
|
setclrfld.long 0x0 30. 0x3F4 30. 0x414 30. " PD30_Set/Clr ,GPIO Port Direction 30" "Input,Output"
|
|
setclrfld.long 0x0 29. 0x3F4 29. 0x414 29. " PD29_Set/Clr ,GPIO Port Direction 29" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x3F4 28. 0x414 28. " PD28_Set/Clr ,GPIO Port Direction 28" "Input,Output"
|
|
setclrfld.long 0x0 27. 0x3F4 27. 0x414 27. " PD27_Set/Clr ,GPIO Port Direction 27" "Input,Output"
|
|
setclrfld.long 0x0 26. 0x3F4 26. 0x414 26. " PD26_Set/Clr ,GPIO Port Direction 26" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x3F4 25. 0x414 25. " PD25_Set/Clr ,GPIO Port Direction 25" "Input,Output"
|
|
setclrfld.long 0x0 24. 0x3F4 24. 0x414 24. " PD24_Set/Clr ,GPIO Port Direction 24" "Input,Output"
|
|
setclrfld.long 0x0 23. 0x3F4 23. 0x414 23. " PD23_Set/Clr ,GPIO Port Direction 23" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x3F4 22. 0x414 22. " PD22_Set/Clr ,GPIO Port Direction 22" "Input,Output"
|
|
setclrfld.long 0x0 21. 0x3F4 21. 0x414 21. " PD21_Set/Clr ,GPIO Port Direction 21" "Input,Output"
|
|
setclrfld.long 0x0 20. 0x3F4 20. 0x414 20. " PD20_Set/Clr ,GPIO Port Direction 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x3F4 19. 0x414 19. " PD19_Set/Clr ,GPIO Port Direction 19" "Input,Output"
|
|
setclrfld.long 0x0 18. 0x3F4 18. 0x414 18. " PD18_Set/Clr ,GPIO Port Direction 18" "Input,Output"
|
|
setclrfld.long 0x0 17. 0x3F4 17. 0x414 17. " PD17_Set/Clr ,GPIO Port Direction 17" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x3F4 16. 0x414 16. " PD16_Set/Clr ,GPIO Port Direction 16" "Input,Output"
|
|
setclrfld.long 0x0 15. 0x3F4 15. 0x414 15. " PD15_Set/Clr ,GPIO Port Direction 15" "Input,Output"
|
|
setclrfld.long 0x0 14. 0x3F4 14. 0x414 14. " PD14_Set/Clr ,GPIO Port Direction 14" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x3F4 13. 0x414 13. " PD13_Set/Clr ,GPIO Port Direction 13" "Input,Output"
|
|
setclrfld.long 0x0 12. 0x3F4 12. 0x414 12. " PD12_Set/Clr ,GPIO Port Direction 12" "Input,Output"
|
|
setclrfld.long 0x0 11. 0x3F4 11. 0x414 11. " PD11_Set/Clr ,GPIO Port Direction 11" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x3F4 10. 0x414 10. " PD10_Set/Clr ,GPIO Port Direction 10" "Input,Output"
|
|
setclrfld.long 0x0 9. 0x3F4 9. 0x414 9. " PD9_Set/Clr ,GPIO Port Direction 9" "Input,Output"
|
|
setclrfld.long 0x0 8. 0x3F4 8. 0x414 8. " PD8_Set/Clr ,GPIO Port Direction 8" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x3F4 7. 0x414 7. " PD7_Set/Clr ,GPIO Port Direction 7" "Input,Output"
|
|
setclrfld.long 0x0 6. 0x3F4 6. 0x414 6. " PD6_Set/Clr ,GPIO Port Direction 6" "Input,Output"
|
|
setclrfld.long 0x0 5. 0x3F4 5. 0x414 5. " PD5_Set/Clr ,GPIO Port Direction 5" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x3F4 4. 0x414 4. " PD4_Set/Clr ,GPIO Port Direction 4" "Input,Output"
|
|
setclrfld.long 0x0 3. 0x3F4 3. 0x414 3. " PD3_Set/Clr ,GPIO Port Direction 3" "Input,Output"
|
|
setclrfld.long 0x0 2. 0x3F4 2. 0x414 2. " PD2_Set/Clr ,GPIO Port Direction 2" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x3F4 1. 0x414 1. " PD1_Set/Clr ,GPIO Port Direction 1" "Input,Output"
|
|
setclrfld.long 0x0 0. 0x3F4 0. 0x414 0. " PD0_Set/Clr ,GPIO Port Direction 0" "Input,Output"
|
|
group.long 0x10++3
|
|
line.long 0x00 "GPDR1,GPIO Pin-Direction 1 Register"
|
|
setclrfld.long 0x0 31. 0x3F4 31. 0x414 31. " PD63_Set/Clr ,GPIO Port Direction 63" "Input,Output"
|
|
setclrfld.long 0x0 30. 0x3F4 30. 0x414 30. " PD62_Set/Clr ,GPIO Port Direction 62" "Input,Output"
|
|
setclrfld.long 0x0 29. 0x3F4 29. 0x414 29. " PD61_Set/Clr ,GPIO Port Direction 61" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x3F4 28. 0x414 28. " PD60_Set/Clr ,GPIO Port Direction 60" "Input,Output"
|
|
setclrfld.long 0x0 27. 0x3F4 27. 0x414 27. " PD59_Set/Clr ,GPIO Port Direction 59" "Input,Output"
|
|
setclrfld.long 0x0 26. 0x3F4 26. 0x414 26. " PD58_Set/Clr ,GPIO Port Direction 58" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x3F4 25. 0x414 25. " PD57_Set/Clr ,GPIO Port Direction 57" "Input,Output"
|
|
setclrfld.long 0x0 24. 0x3F4 24. 0x414 24. " PD56_Set/Clr ,GPIO Port Direction 56" "Input,Output"
|
|
setclrfld.long 0x0 23. 0x3F4 23. 0x414 23. " PD55_Set/Clr ,GPIO Port Direction 55" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x3F4 22. 0x414 22. " PD54_Set/Clr ,GPIO Port Direction 54" "Input,Output"
|
|
setclrfld.long 0x0 21. 0x3F4 21. 0x414 21. " PD53_Set/Clr ,GPIO Port Direction 53" "Input,Output"
|
|
setclrfld.long 0x0 20. 0x3F4 20. 0x414 20. " PD52_Set/Clr ,GPIO Port Direction 52" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x3F4 19. 0x414 19. " PD51_Set/Clr ,GPIO Port Direction 51" "Input,Output"
|
|
setclrfld.long 0x0 18. 0x3F4 18. 0x414 18. " PD50_Set/Clr ,GPIO Port Direction 50" "Input,Output"
|
|
setclrfld.long 0x0 17. 0x3F4 17. 0x414 17. " PD49_Set/Clr ,GPIO Port Direction 49" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x3F4 16. 0x414 16. " PD48_Set/Clr ,GPIO Port Direction 48" "Input,Output"
|
|
setclrfld.long 0x0 15. 0x3F4 15. 0x414 15. " PD47_Set/Clr ,GPIO Port Direction 47" "Input,Output"
|
|
setclrfld.long 0x0 14. 0x3F4 14. 0x414 14. " PD46_Set/Clr ,GPIO Port Direction 46" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x3F4 13. 0x414 13. " PD45_Set/Clr ,GPIO Port Direction 45" "Input,Output"
|
|
setclrfld.long 0x0 12. 0x3F4 12. 0x414 12. " PD44_Set/Clr ,GPIO Port Direction 44" "Input,Output"
|
|
setclrfld.long 0x0 11. 0x3F4 11. 0x414 11. " PD43_Set/Clr ,GPIO Port Direction 43" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x3F4 10. 0x414 10. " PD42_Set/Clr ,GPIO Port Direction 42" "Input,Output"
|
|
setclrfld.long 0x0 9. 0x3F4 9. 0x414 9. " PD41_Set/Clr ,GPIO Port Direction 41" "Input,Output"
|
|
setclrfld.long 0x0 8. 0x3F4 8. 0x414 8. " PD40_Set/Clr ,GPIO Port Direction 40" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x3F4 7. 0x414 7. " PD39_Set/Clr ,GPIO Port Direction 39" "Input,Output"
|
|
setclrfld.long 0x0 6. 0x3F4 6. 0x414 6. " PD38_Set/Clr ,GPIO Port Direction 38" "Input,Output"
|
|
setclrfld.long 0x0 5. 0x3F4 5. 0x414 5. " PD37_Set/Clr ,GPIO Port Direction 37" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x3F4 4. 0x414 4. " PD36_Set/Clr ,GPIO Port Direction 36" "Input,Output"
|
|
setclrfld.long 0x0 3. 0x3F4 3. 0x414 3. " PD35_Set/Clr ,GPIO Port Direction 35" "Input,Output"
|
|
setclrfld.long 0x0 2. 0x3F4 2. 0x414 2. " PD34_Set/Clr ,GPIO Port Direction 34" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x3F4 1. 0x414 1. " PD33_Set/Clr ,GPIO Port Direction 33" "Input,Output"
|
|
setclrfld.long 0x0 0. 0x3F4 0. 0x414 0. " PD32_Set/Clr ,GPIO Port Direction 32" "Input,Output"
|
|
group.long 0x14++3
|
|
line.long 0x00 "GPDR2,GPIO Pin-Direction 2 Register"
|
|
setclrfld.long 0x0 31. 0x3F4 31. 0x414 31. " PD95_Set/Clr ,GPIO Port Direction 95" "Input,Output"
|
|
setclrfld.long 0x0 30. 0x3F4 30. 0x414 30. " PD94_Set/Clr ,GPIO Port Direction 94" "Input,Output"
|
|
setclrfld.long 0x0 29. 0x3F4 29. 0x414 29. " PD93_Set/Clr ,GPIO Port Direction 93" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x3F4 28. 0x414 28. " PD92_Set/Clr ,GPIO Port Direction 92" "Input,Output"
|
|
setclrfld.long 0x0 27. 0x3F4 27. 0x414 27. " PD91_Set/Clr ,GPIO Port Direction 91" "Input,Output"
|
|
setclrfld.long 0x0 26. 0x3F4 26. 0x414 26. " PD90_Set/Clr ,GPIO Port Direction 90" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x3F4 25. 0x414 25. " PD89_Set/Clr ,GPIO Port Direction 89" "Input,Output"
|
|
setclrfld.long 0x0 24. 0x3F4 24. 0x414 24. " PD88_Set/Clr ,GPIO Port Direction 88" "Input,Output"
|
|
setclrfld.long 0x0 23. 0x3F4 23. 0x414 23. " PD87_Set/Clr ,GPIO Port Direction 87" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x3F4 22. 0x414 22. " PD86_Set/Clr ,GPIO Port Direction 86" "Input,Output"
|
|
setclrfld.long 0x0 21. 0x3F4 21. 0x414 21. " PD85_Set/Clr ,GPIO Port Direction 85" "Input,Output"
|
|
setclrfld.long 0x0 20. 0x3F4 20. 0x414 20. " PD84_Set/Clr ,GPIO Port Direction 84" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x3F4 19. 0x414 19. " PD83_Set/Clr ,GPIO Port Direction 83" "Input,Output"
|
|
setclrfld.long 0x0 18. 0x3F4 18. 0x414 18. " PD82_Set/Clr ,GPIO Port Direction 82" "Input,Output"
|
|
setclrfld.long 0x0 17. 0x3F4 17. 0x414 17. " PD81_Set/Clr ,GPIO Port Direction 81" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x3F4 16. 0x414 16. " PD80_Set/Clr ,GPIO Port Direction 80" "Input,Output"
|
|
setclrfld.long 0x0 15. 0x3F4 15. 0x414 15. " PD79_Set/Clr ,GPIO Port Direction 79" "Input,Output"
|
|
setclrfld.long 0x0 14. 0x3F4 14. 0x414 14. " PD78_Set/Clr ,GPIO Port Direction 78" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x3F4 13. 0x414 13. " PD77_Set/Clr ,GPIO Port Direction 77" "Input,Output"
|
|
setclrfld.long 0x0 12. 0x3F4 12. 0x414 12. " PD76_Set/Clr ,GPIO Port Direction 76" "Input,Output"
|
|
setclrfld.long 0x0 11. 0x3F4 11. 0x414 11. " PD75_Set/Clr ,GPIO Port Direction 75" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x3F4 10. 0x414 10. " PD74_Set/Clr ,GPIO Port Direction 74" "Input,Output"
|
|
setclrfld.long 0x0 9. 0x3F4 9. 0x414 9. " PD73_Set/Clr ,GPIO Port Direction 73" "Input,Output"
|
|
setclrfld.long 0x0 8. 0x3F4 8. 0x414 8. " PD72_Set/Clr ,GPIO Port Direction 72" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x3F4 7. 0x414 7. " PD71_Set/Clr ,GPIO Port Direction 71" "Input,Output"
|
|
setclrfld.long 0x0 6. 0x3F4 6. 0x414 6. " PD70_Set/Clr ,GPIO Port Direction 70" "Input,Output"
|
|
setclrfld.long 0x0 5. 0x3F4 5. 0x414 5. " PD69_Set/Clr ,GPIO Port Direction 69" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x3F4 4. 0x414 4. " PD68_Set/Clr ,GPIO Port Direction 68" "Input,Output"
|
|
setclrfld.long 0x0 3. 0x3F4 3. 0x414 3. " PD67_Set/Clr ,GPIO Port Direction 67" "Input,Output"
|
|
setclrfld.long 0x0 2. 0x3F4 2. 0x414 2. " PD66_Set/Clr ,GPIO Port Direction 66" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x3F4 1. 0x414 1. " PD65_Set/Clr ,GPIO Port Direction 65" "Input,Output"
|
|
setclrfld.long 0x0 0. 0x3F4 0. 0x414 0. " PD64_Set/Clr ,GPIO Port Direction 64" "Input,Output"
|
|
group.long 0x10c++3
|
|
line.long 0x00 "GPDR3,GPIO Pin Direction 3 Register"
|
|
setclrfld.long 0x0 31. 0x300 31. 0x320 31. " PD127_Set/Clr ,GPIO Port Direction 127" "Input,Output"
|
|
setclrfld.long 0x0 30. 0x300 30. 0x320 30. " PD126_Set/Clr ,GPIO Port Direction 126" "Input,Output"
|
|
setclrfld.long 0x0 29. 0x300 29. 0x320 29. " PD125_Set/Clr ,GPIO Port Direction 125" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x300 28. 0x320 28. " PD124_Set/Clr ,GPIO Port Direction 124" "Input,Output"
|
|
setclrfld.long 0x0 27. 0x300 27. 0x320 27. " PD123_Set/Clr ,GPIO Port Direction 123" "Input,Output"
|
|
setclrfld.long 0x0 26. 0x300 26. 0x320 26. " PD122_Set/Clr ,GPIO Port Direction 122" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x300 25. 0x320 25. " PD121_Set/Clr ,GPIO Port Direction 121" "Input,Output"
|
|
setclrfld.long 0x0 24. 0x300 24. 0x320 24. " PD120_Set/Clr ,GPIO Port Direction 120" "Input,Output"
|
|
setclrfld.long 0x0 23. 0x300 23. 0x320 23. " PD119_Set/Clr ,GPIO Port Direction 119" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x300 22. 0x320 22. " PD118_Set/Clr ,GPIO Port Direction 118" "Input,Output"
|
|
setclrfld.long 0x0 21. 0x300 21. 0x320 21. " PD117_Set/Clr ,GPIO Port Direction 117" "Input,Output"
|
|
setclrfld.long 0x0 20. 0x300 20. 0x320 20. " PD116_Set/Clr ,GPIO Port Direction 116" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x300 19. 0x320 19. " PD115_Set/Clr ,GPIO Port Direction 115" "Input,Output"
|
|
setclrfld.long 0x0 18. 0x300 18. 0x320 18. " PD114_Set/Clr ,GPIO Port Direction 114" "Input,Output"
|
|
setclrfld.long 0x0 17. 0x300 17. 0x320 17. " PD113_Set/Clr ,GPIO Port Direction 113" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x300 16. 0x320 16. " PD112_Set/Clr ,GPIO Port Direction 112" "Input,Output"
|
|
setclrfld.long 0x0 15. 0x300 15. 0x320 15. " PD111_Set/Clr ,GPIO Port Direction 111" "Input,Output"
|
|
setclrfld.long 0x0 14. 0x300 14. 0x320 14. " PD110_Set/Clr ,GPIO Port Direction 110" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x300 13. 0x320 13. " PD109_Set/Clr ,GPIO Port Direction 109" "Input,Output"
|
|
setclrfld.long 0x0 12. 0x300 12. 0x320 12. " PD108_Set/Clr ,GPIO Port Direction 108" "Input,Output"
|
|
setclrfld.long 0x0 11. 0x300 11. 0x320 11. " PD107_Set/Clr ,GPIO Port Direction 107" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x300 10. 0x320 10. " PD106_Set/Clr ,GPIO Port Direction 106" "Input,Output"
|
|
setclrfld.long 0x0 9. 0x300 9. 0x320 9. " PD105_Set/Clr ,GPIO Port Direction 105" "Input,Output"
|
|
setclrfld.long 0x0 8. 0x300 8. 0x320 8. " PD104_Set/Clr ,GPIO Port Direction 104" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x300 7. 0x320 7. " PD103_Set/Clr ,GPIO Port Direction 103" "Input,Output"
|
|
setclrfld.long 0x0 6. 0x300 6. 0x320 6. " PD102_Set/Clr ,GPIO Port Direction 102" "Input,Output"
|
|
setclrfld.long 0x0 5. 0x300 5. 0x320 5. " PD101_Set/Clr ,GPIO Port Direction 101" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x300 4. 0x320 4. " PD100_Set/Clr ,GPIO Port Direction 100" "Input,Output"
|
|
setclrfld.long 0x0 3. 0x300 3. 0x320 3. " PD99_Set/Clr ,GPIO Port Direction 99" "Input,Output"
|
|
setclrfld.long 0x0 2. 0x300 2. 0x320 2. " PD98_Set/Clr ,GPIO Port Direction 98" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x300 1. 0x320 1. " PD97_Set/Clr ,GPIO Port Direction 97" "Input,Output"
|
|
setclrfld.long 0x0 0. 0x300 0. 0x320 0. " PD96_Set/Clr ,GPIO Port Direction 96" "Input,Output"
|
|
wgroup.long 0x18++3 "GPIO Pin Output Set Registers"
|
|
line.long 0x00 "GPSR0,GPIO Pin Output Set Register 0"
|
|
bitfld.long 0x0 31. " PS31 ,GPIO Output Port Set 31" "No effect,Set"
|
|
bitfld.long 0x0 30. " PS30 ,GPIO Output Port Set 30" "No effect,Set"
|
|
bitfld.long 0x0 29. " PS29 ,GPIO Output Port Set 29" "No effect,Set"
|
|
bitfld.long 0x0 28. " PS28 ,GPIO Output Port Set 28" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PS27 ,GPIO Output Port Set 27" "No effect,Set"
|
|
bitfld.long 0x0 26. " PS26 ,GPIO Output Port Set 26" "No effect,Set"
|
|
bitfld.long 0x0 25. " PS25 ,GPIO Output Port Set 25" "No effect,Set"
|
|
bitfld.long 0x0 24. " PS24 ,GPIO Output Port Set 24" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PS23 ,GPIO Output Port Set 23" "No effect,Set"
|
|
bitfld.long 0x0 22. " PS22 ,GPIO Output Port Set 22" "No effect,Set"
|
|
bitfld.long 0x0 21. " PS21 ,GPIO Output Port Set 21" "No effect,Set"
|
|
bitfld.long 0x0 20. " PS20 ,GPIO Output Port Set 20" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PS19 ,GPIO Output Port Set 19" "No effect,Set"
|
|
bitfld.long 0x0 18. " PS18 ,GPIO Output Port Set 18" "No effect,Set"
|
|
bitfld.long 0x0 17. " PS17 ,GPIO Output Port Set 17" "No effect,Set"
|
|
bitfld.long 0x0 16. " PS16 ,GPIO Output Port Set 16" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PS15 ,GPIO Output Port Set 15" "No effect,Set"
|
|
bitfld.long 0x0 14. " PS14 ,GPIO Output Port Set 14" "No effect,Set"
|
|
bitfld.long 0x0 13. " PS13 ,GPIO Output Port Set 13" "No effect,Set"
|
|
bitfld.long 0x0 12. " PS12 ,GPIO Output Port Set 12" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PS11 ,GPIO Output Port Set 11" "No effect,Set"
|
|
bitfld.long 0x0 10. " PS10 ,GPIO Output Port Set 10" "No effect,Set"
|
|
bitfld.long 0x0 9. " PS9 ,GPIO Output Port Set 9" "No effect,Set"
|
|
bitfld.long 0x0 8. " PS8 ,GPIO Output Port Set 8" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PS7 ,GPIO Output Port Set 7" "No effect,Set"
|
|
bitfld.long 0x0 6. " PS6 ,GPIO Output Port Set 6" "No effect,Set"
|
|
bitfld.long 0x0 5. " PS5 ,GPIO Output Port Set 5" "No effect,Set"
|
|
bitfld.long 0x0 4. " PS4 ,GPIO Output Port Set 4" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PS3 ,GPIO Output Port Set 3" "No effect,Set"
|
|
bitfld.long 0x0 2. " PS2 ,GPIO Output Port Set 2" "No effect,Set"
|
|
bitfld.long 0x0 1. " PS1 ,GPIO Output Port Set 1" "No effect,Set"
|
|
bitfld.long 0x0 0. " PS0 ,GPIO Output Port Set 0" "No effect,Set"
|
|
wgroup.long 0x1c++3
|
|
line.long 0x00 "GPSR1,GPIO Pin Output Set Register 1"
|
|
bitfld.long 0x0 31. " PS63 ,GPIO Output Port Set 63" "No effect,Set"
|
|
bitfld.long 0x0 30. " PS62 ,GPIO Output Port Set 62" "No effect,Set"
|
|
bitfld.long 0x0 29. " PS61 ,GPIO Output Port Set 61" "No effect,Set"
|
|
bitfld.long 0x0 28. " PS60 ,GPIO Output Port Set 60" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PS59 ,GPIO Output Port Set 59" "No effect,Set"
|
|
bitfld.long 0x0 26. " PS58 ,GPIO Output Port Set 58" "No effect,Set"
|
|
bitfld.long 0x0 25. " PS57 ,GPIO Output Port Set 57" "No effect,Set"
|
|
bitfld.long 0x0 24. " PS56 ,GPIO Output Port Set 56" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PS55 ,GPIO Output Port Set 55" "No effect,Set"
|
|
bitfld.long 0x0 22. " PS54 ,GPIO Output Port Set 54" "No effect,Set"
|
|
bitfld.long 0x0 21. " PS53 ,GPIO Output Port Set 53" "No effect,Set"
|
|
bitfld.long 0x0 20. " PS52 ,GPIO Output Port Set 52" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PS51 ,GPIO Output Port Set 51" "No effect,Set"
|
|
bitfld.long 0x0 18. " PS50 ,GPIO Output Port Set 50" "No effect,Set"
|
|
bitfld.long 0x0 17. " PS49 ,GPIO Output Port Set 49" "No effect,Set"
|
|
bitfld.long 0x0 16. " PS48 ,GPIO Output Port Set 48" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PS47 ,GPIO Output Port Set 47" "No effect,Set"
|
|
bitfld.long 0x0 14. " PS46 ,GPIO Output Port Set 46" "No effect,Set"
|
|
bitfld.long 0x0 13. " PS45 ,GPIO Output Port Set 45" "No effect,Set"
|
|
bitfld.long 0x0 12. " PS44 ,GPIO Output Port Set 44" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PS43 ,GPIO Output Port Set 43" "No effect,Set"
|
|
bitfld.long 0x0 10. " PS42 ,GPIO Output Port Set 42" "No effect,Set"
|
|
bitfld.long 0x0 9. " PS41 ,GPIO Output Port Set 41" "No effect,Set"
|
|
bitfld.long 0x0 8. " PS40 ,GPIO Output Port Set 40" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PS39 ,GPIO Output Port Set 39" "No effect,Set"
|
|
bitfld.long 0x0 6. " PS38 ,GPIO Output Port Set 38" "No effect,Set"
|
|
bitfld.long 0x0 5. " PS37 ,GPIO Output Port Set 37" "No effect,Set"
|
|
bitfld.long 0x0 4. " PS36 ,GPIO Output Port Set 36" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PS35 ,GPIO Output Port Set 35" "No effect,Set"
|
|
bitfld.long 0x0 2. " PS34 ,GPIO Output Port Set 34" "No effect,Set"
|
|
bitfld.long 0x0 1. " PS33 ,GPIO Output Port Set 33" "No effect,Set"
|
|
bitfld.long 0x0 0. " PS32 ,GPIO Output Port Set 32" "No effect,Set"
|
|
wgroup.long 0x20++3
|
|
line.long 0x00 "GPSR2,GPIO Pin Output Set Register 2"
|
|
bitfld.long 0x0 31. " PS95 ,GPIO Output Port Set 95" "No effect,Set"
|
|
bitfld.long 0x0 30. " PS94 ,GPIO Output Port Set 94" "No effect,Set"
|
|
bitfld.long 0x0 29. " PS93 ,GPIO Output Port Set 93" "No effect,Set"
|
|
bitfld.long 0x0 28. " PS92 ,GPIO Output Port Set 92" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PS91 ,GPIO Output Port Set 91" "No effect,Set"
|
|
bitfld.long 0x0 26. " PS90 ,GPIO Output Port Set 90" "No effect,Set"
|
|
bitfld.long 0x0 25. " PS89 ,GPIO Output Port Set 89" "No effect,Set"
|
|
bitfld.long 0x0 24. " PS88 ,GPIO Output Port Set 88" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PS87 ,GPIO Output Port Set 87" "No effect,Set"
|
|
bitfld.long 0x0 22. " PS86 ,GPIO Output Port Set 86" "No effect,Set"
|
|
bitfld.long 0x0 21. " PS85 ,GPIO Output Port Set 85" "No effect,Set"
|
|
bitfld.long 0x0 20. " PS84 ,GPIO Output Port Set 84" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PS83 ,GPIO Output Port Set 83" "No effect,Set"
|
|
bitfld.long 0x0 18. " PS82 ,GPIO Output Port Set 82" "No effect,Set"
|
|
bitfld.long 0x0 17. " PS81 ,GPIO Output Port Set 81" "No effect,Set"
|
|
bitfld.long 0x0 16. " PS80 ,GPIO Output Port Set 80" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PS79 ,GPIO Output Port Set 79" "No effect,Set"
|
|
bitfld.long 0x0 14. " PS78 ,GPIO Output Port Set 78" "No effect,Set"
|
|
bitfld.long 0x0 13. " PS77 ,GPIO Output Port Set 77" "No effect,Set"
|
|
bitfld.long 0x0 12. " PS76 ,GPIO Output Port Set 76" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PS75 ,GPIO Output Port Set 75" "No effect,Set"
|
|
bitfld.long 0x0 10. " PS74 ,GPIO Output Port Set 74" "No effect,Set"
|
|
bitfld.long 0x0 9. " PS73 ,GPIO Output Port Set 73" "No effect,Set"
|
|
bitfld.long 0x0 8. " PS72 ,GPIO Output Port Set 72" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PS71 ,GPIO Output Port Set 71" "No effect,Set"
|
|
bitfld.long 0x0 6. " PS70 ,GPIO Output Port Set 70" "No effect,Set"
|
|
bitfld.long 0x0 5. " PS69 ,GPIO Output Port Set 69" "No effect,Set"
|
|
bitfld.long 0x0 4. " PS68 ,GPIO Output Port Set 68" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PS67 ,GPIO Output Port Set 67" "No effect,Set"
|
|
bitfld.long 0x0 2. " PS66 ,GPIO Output Port Set 66" "No effect,Set"
|
|
bitfld.long 0x0 1. " PS65 ,GPIO Output Port Set 65" "No effect,Set"
|
|
bitfld.long 0x0 0. " PS64 ,GPIO Output Port Set 64" "No effect,Set"
|
|
wgroup.long 0x118++3
|
|
line.long 0x00 "GPSR3,GPIO Pin Output Set Register 3"
|
|
bitfld.long 0x0 31. " PS127 ,GPIO Output Port Set 127" "No effect,Set"
|
|
bitfld.long 0x0 30. " PS126 ,GPIO Output Port Set 126" "No effect,Set"
|
|
bitfld.long 0x0 29. " PS125 ,GPIO Output Port Set 125" "No effect,Set"
|
|
bitfld.long 0x0 28. " PS124 ,GPIO Output Port Set 124" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PS123 ,GPIO Output Port Set 123" "No effect,Set"
|
|
bitfld.long 0x0 26. " PS122 ,GPIO Output Port Set 122" "No effect,Set"
|
|
bitfld.long 0x0 25. " PS121 ,GPIO Output Port Set 121" "No effect,Set"
|
|
bitfld.long 0x0 24. " PS120 ,GPIO Output Port Set 120" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PS119 ,GPIO Output Port Set 119" "No effect,Set"
|
|
bitfld.long 0x0 22. " PS118 ,GPIO Output Port Set 118" "No effect,Set"
|
|
bitfld.long 0x0 21. " PS117 ,GPIO Output Port Set 117" "No effect,Set"
|
|
bitfld.long 0x0 20. " PS116 ,GPIO Output Port Set 116" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PS115 ,GPIO Output Port Set 115" "No effect,Set"
|
|
bitfld.long 0x0 18. " PS114 ,GPIO Output Port Set 114" "No effect,Set"
|
|
bitfld.long 0x0 17. " PS113 ,GPIO Output Port Set 113" "No effect,Set"
|
|
bitfld.long 0x0 16. " PS112 ,GPIO Output Port Set 112" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PS111 ,GPIO Output Port Set 111" "No effect,Set"
|
|
bitfld.long 0x0 14. " PS110 ,GPIO Output Port Set 110" "No effect,Set"
|
|
bitfld.long 0x0 13. " PS109 ,GPIO Output Port Set 109" "No effect,Set"
|
|
bitfld.long 0x0 12. " PS108 ,GPIO Output Port Set 108" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PS107 ,GPIO Output Port Set 107" "No effect,Set"
|
|
bitfld.long 0x0 10. " PS106 ,GPIO Output Port Set 106" "No effect,Set"
|
|
bitfld.long 0x0 9. " PS105 ,GPIO Output Port Set 105" "No effect,Set"
|
|
bitfld.long 0x0 8. " PS104 ,GPIO Output Port Set 104" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PS103 ,GPIO Output Port Set 103" "No effect,Set"
|
|
bitfld.long 0x0 6. " PS102 ,GPIO Output Port Set 102" "No effect,Set"
|
|
bitfld.long 0x0 5. " PS101 ,GPIO Output Port Set 101" "No effect,Set"
|
|
bitfld.long 0x0 4. " PS100 ,GPIO Output Port Set 100" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PS99 ,GPIO Output Port Set 99" "No effect,Set"
|
|
bitfld.long 0x0 2. " PS98 ,GPIO Output Port Set 98" "No effect,Set"
|
|
bitfld.long 0x0 1. " PS97 ,GPIO Output Port Set 97" "No effect,Set"
|
|
bitfld.long 0x0 0. " PS96 ,GPIO Output Port Set 96" "No effect,Set"
|
|
wgroup.long 0x24++3 "GPIO Pin Output Clear Registers"
|
|
line.long 0x00 "GPCR0,GPIO Pin Output Clear Register 0"
|
|
bitfld.long 0x0 31. " PC31 ,GPIO Output Port Clear 31" "No effect,Cleared"
|
|
bitfld.long 0x0 30. " PC30 ,GPIO Output Port Clear 30" "No effect,Cleared"
|
|
bitfld.long 0x0 29. " PC29 ,GPIO Output Port Clear 29" "No effect,Cleared"
|
|
bitfld.long 0x0 28. " PC28 ,GPIO Output Port Clear 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PC27 ,GPIO Output Port Clear 27" "No effect,Cleared"
|
|
bitfld.long 0x0 26. " PC26 ,GPIO Output Port Clear 26" "No effect,Cleared"
|
|
bitfld.long 0x0 25. " PC25 ,GPIO Output Port Clear 25" "No effect,Cleared"
|
|
bitfld.long 0x0 24. " PC24 ,GPIO Output Port Clear 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PC23 ,GPIO Output Port Clear 23" "No effect,Cleared"
|
|
bitfld.long 0x0 22. " PC22 ,GPIO Output Port Clear 22" "No effect,Cleared"
|
|
bitfld.long 0x0 21. " PC21 ,GPIO Output Port Clear 21" "No effect,Cleared"
|
|
bitfld.long 0x0 20. " PC20 ,GPIO Output Port Clear 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PC19 ,GPIO Output Port Clear 19" "No effect,Cleared"
|
|
bitfld.long 0x0 18. " PC18 ,GPIO Output Port Clear 18" "No effect,Cleared"
|
|
bitfld.long 0x0 17. " PC17 ,GPIO Output Port Clear 17" "No effect,Cleared"
|
|
bitfld.long 0x0 16. " PC16 ,GPIO Output Port Clear 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PC15 ,GPIO Output Port Clear 15" "No effect,Cleared"
|
|
bitfld.long 0x0 14. " PC14 ,GPIO Output Port Clear 14" "No effect,Cleared"
|
|
bitfld.long 0x0 13. " PC13 ,GPIO Output Port Clear 13" "No effect,Cleared"
|
|
bitfld.long 0x0 12. " PC12 ,GPIO Output Port Clear 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PC11 ,GPIO Output Port Clear 11" "No effect,Cleared"
|
|
bitfld.long 0x0 10. " PC10 ,GPIO Output Port Clear 10" "No effect,Cleared"
|
|
bitfld.long 0x0 9. " PC9 ,GPIO Output Port Clear 9" "No effect,Cleared"
|
|
bitfld.long 0x0 8. " PC8 ,GPIO Output Port Clear 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PC7 ,GPIO Output Port Clear 7" "No effect,Cleared"
|
|
bitfld.long 0x0 6. " PC6 ,GPIO Output Port Clear 6" "No effect,Cleared"
|
|
bitfld.long 0x0 5. " PC5 ,GPIO Output Port Clear 5" "No effect,Cleared"
|
|
bitfld.long 0x0 4. " PC4 ,GPIO Output Port Clear 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PC3 ,GPIO Output Port Clear 3" "No effect,Cleared"
|
|
bitfld.long 0x0 2. " PC2 ,GPIO Output Port Clear 2" "No effect,Cleared"
|
|
bitfld.long 0x0 1. " PC1 ,GPIO Output Port Clear 1" "No effect,Cleared"
|
|
bitfld.long 0x0 0. " PC0 ,GPIO Output Port Clear 0" "No effect,Cleared"
|
|
wgroup.long 0x28++3
|
|
line.long 0x00 "GPCR1,GPIO Pin Output Clear Register 1"
|
|
bitfld.long 0x0 31. " PC63 ,GPIO Output Port Clear 63" "No effect,Cleared"
|
|
bitfld.long 0x0 30. " PC62 ,GPIO Output Port Clear 62" "No effect,Cleared"
|
|
bitfld.long 0x0 29. " PC61 ,GPIO Output Port Clear 61" "No effect,Cleared"
|
|
bitfld.long 0x0 28. " PC60 ,GPIO Output Port Clear 60" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PC59 ,GPIO Output Port Clear 59" "No effect,Cleared"
|
|
bitfld.long 0x0 26. " PC58 ,GPIO Output Port Clear 58" "No effect,Cleared"
|
|
bitfld.long 0x0 25. " PC57 ,GPIO Output Port Clear 57" "No effect,Cleared"
|
|
bitfld.long 0x0 24. " PC56 ,GPIO Output Port Clear 56" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PC55 ,GPIO Output Port Clear 55" "No effect,Cleared"
|
|
bitfld.long 0x0 22. " PC54 ,GPIO Output Port Clear 54" "No effect,Cleared"
|
|
bitfld.long 0x0 21. " PC53 ,GPIO Output Port Clear 53" "No effect,Cleared"
|
|
bitfld.long 0x0 20. " PC52 ,GPIO Output Port Clear 52" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PC51 ,GPIO Output Port Clear 51" "No effect,Cleared"
|
|
bitfld.long 0x0 18. " PC50 ,GPIO Output Port Clear 50" "No effect,Cleared"
|
|
bitfld.long 0x0 17. " PC49 ,GPIO Output Port Clear 49" "No effect,Cleared"
|
|
bitfld.long 0x0 16. " PC48 ,GPIO Output Port Clear 48" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PC47 ,GPIO Output Port Clear 47" "No effect,Cleared"
|
|
bitfld.long 0x0 14. " PC46 ,GPIO Output Port Clear 46" "No effect,Cleared"
|
|
bitfld.long 0x0 13. " PC45 ,GPIO Output Port Clear 45" "No effect,Cleared"
|
|
bitfld.long 0x0 12. " PC44 ,GPIO Output Port Clear 44" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PC43 ,GPIO Output Port Clear 43" "No effect,Cleared"
|
|
bitfld.long 0x0 10. " PC42 ,GPIO Output Port Clear 42" "No effect,Cleared"
|
|
bitfld.long 0x0 9. " PC41 ,GPIO Output Port Clear 41" "No effect,Cleared"
|
|
bitfld.long 0x0 8. " PC40 ,GPIO Output Port Clear 40" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PC39 ,GPIO Output Port Clear 39" "No effect,Cleared"
|
|
bitfld.long 0x0 6. " PC38 ,GPIO Output Port Clear 38" "No effect,Cleared"
|
|
bitfld.long 0x0 5. " PC37 ,GPIO Output Port Clear 37" "No effect,Cleared"
|
|
bitfld.long 0x0 4. " PC36 ,GPIO Output Port Clear 36" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PC35 ,GPIO Output Port Clear 35" "No effect,Cleared"
|
|
bitfld.long 0x0 2. " PC34 ,GPIO Output Port Clear 34" "No effect,Cleared"
|
|
bitfld.long 0x0 1. " PC33 ,GPIO Output Port Clear 33" "No effect,Cleared"
|
|
bitfld.long 0x0 0. " PC32 ,GPIO Output Port Clear 32" "No effect,Cleared"
|
|
wgroup.long 0x2c++3
|
|
line.long 0x00 "GPCR2,GPIO Pin Output Clear Register 2"
|
|
bitfld.long 0x0 31. " PC95 ,GPIO Output Port Clear 95" "No effect,Cleared"
|
|
bitfld.long 0x0 30. " PC94 ,GPIO Output Port Clear 94" "No effect,Cleared"
|
|
bitfld.long 0x0 29. " PC93 ,GPIO Output Port Clear 93" "No effect,Cleared"
|
|
bitfld.long 0x0 28. " PC92 ,GPIO Output Port Clear 92" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PC91 ,GPIO Output Port Clear 91" "No effect,Cleared"
|
|
bitfld.long 0x0 26. " PC90 ,GPIO Output Port Clear 90" "No effect,Cleared"
|
|
bitfld.long 0x0 25. " PC89 ,GPIO Output Port Clear 89" "No effect,Cleared"
|
|
bitfld.long 0x0 24. " PC88 ,GPIO Output Port Clear 88" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PC87 ,GPIO Output Port Clear 87" "No effect,Cleared"
|
|
bitfld.long 0x0 22. " PC86 ,GPIO Output Port Clear 86" "No effect,Cleared"
|
|
bitfld.long 0x0 21. " PC85 ,GPIO Output Port Clear 85" "No effect,Cleared"
|
|
bitfld.long 0x0 20. " PC84 ,GPIO Output Port Clear 84" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PC83 ,GPIO Output Port Clear 83" "No effect,Cleared"
|
|
bitfld.long 0x0 18. " PC82 ,GPIO Output Port Clear 82" "No effect,Cleared"
|
|
bitfld.long 0x0 17. " PC81 ,GPIO Output Port Clear 81" "No effect,Cleared"
|
|
bitfld.long 0x0 16. " PC80 ,GPIO Output Port Clear 80" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PC79 ,GPIO Output Port Clear 79" "No effect,Cleared"
|
|
bitfld.long 0x0 14. " PC78 ,GPIO Output Port Clear 78" "No effect,Cleared"
|
|
bitfld.long 0x0 13. " PC77 ,GPIO Output Port Clear 77" "No effect,Cleared"
|
|
bitfld.long 0x0 12. " PC76 ,GPIO Output Port Clear 76" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PC75 ,GPIO Output Port Clear 75" "No effect,Cleared"
|
|
bitfld.long 0x0 10. " PC74 ,GPIO Output Port Clear 74" "No effect,Cleared"
|
|
bitfld.long 0x0 9. " PC73 ,GPIO Output Port Clear 73" "No effect,Cleared"
|
|
bitfld.long 0x0 8. " PC72 ,GPIO Output Port Clear 72" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PC71 ,GPIO Output Port Clear 71" "No effect,Cleared"
|
|
bitfld.long 0x0 6. " PC70 ,GPIO Output Port Clear 70" "No effect,Cleared"
|
|
bitfld.long 0x0 5. " PC69 ,GPIO Output Port Clear 69" "No effect,Cleared"
|
|
bitfld.long 0x0 4. " PC68 ,GPIO Output Port Clear 68" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PC67 ,GPIO Output Port Clear 67" "No effect,Cleared"
|
|
bitfld.long 0x0 2. " PC66 ,GPIO Output Port Clear 66" "No effect,Cleared"
|
|
bitfld.long 0x0 1. " PC65 ,GPIO Output Port Clear 65" "No effect,Cleared"
|
|
bitfld.long 0x0 0. " PC64 ,GPIO Output Port Clear 64" "No effect,Cleared"
|
|
wgroup.long 0x124++3
|
|
line.long 0x00 "GPCR3,GPIO Pin Output Clear Register 3"
|
|
bitfld.long 0x0 31. " PC127 ,GPIO Output Port Clear 127" "No effect,Cleared"
|
|
bitfld.long 0x0 30. " PC126 ,GPIO Output Port Clear 126" "No effect,Cleared"
|
|
bitfld.long 0x0 29. " PC125 ,GPIO Output Port Clear 125" "No effect,Cleared"
|
|
bitfld.long 0x0 28. " PC124 ,GPIO Output Port Clear 124" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PC123 ,GPIO Output Port Clear 123" "No effect,Cleared"
|
|
bitfld.long 0x0 26. " PC122 ,GPIO Output Port Clear 122" "No effect,Cleared"
|
|
bitfld.long 0x0 25. " PC121 ,GPIO Output Port Clear 121" "No effect,Cleared"
|
|
bitfld.long 0x0 24. " PC120 ,GPIO Output Port Clear 120" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PC119 ,GPIO Output Port Clear 119" "No effect,Cleared"
|
|
bitfld.long 0x0 22. " PC118 ,GPIO Output Port Clear 118" "No effect,Cleared"
|
|
bitfld.long 0x0 21. " PC117 ,GPIO Output Port Clear 117" "No effect,Cleared"
|
|
bitfld.long 0x0 20. " PC116 ,GPIO Output Port Clear 116" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PC115 ,GPIO Output Port Clear 115" "No effect,Cleared"
|
|
bitfld.long 0x0 18. " PC114 ,GPIO Output Port Clear 114" "No effect,Cleared"
|
|
bitfld.long 0x0 17. " PC113 ,GPIO Output Port Clear 113" "No effect,Cleared"
|
|
bitfld.long 0x0 16. " PC112 ,GPIO Output Port Clear 112" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PC111 ,GPIO Output Port Clear 111" "No effect,Cleared"
|
|
bitfld.long 0x0 14. " PC110 ,GPIO Output Port Clear 110" "No effect,Cleared"
|
|
bitfld.long 0x0 13. " PC109 ,GPIO Output Port Clear 109" "No effect,Cleared"
|
|
bitfld.long 0x0 12. " PC108 ,GPIO Output Port Clear 108" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 11. " PC107 ,GPIO Output Port Clear 107" "No effect,Cleared"
|
|
bitfld.long 0x0 10. " PC106 ,GPIO Output Port Clear 106" "No effect,Cleared"
|
|
bitfld.long 0x0 9. " PC105 ,GPIO Output Port Clear 105" "No effect,Cleared"
|
|
bitfld.long 0x0 8. " PC104 ,GPIO Output Port Clear 104" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PC103 ,GPIO Output Port Clear 103" "No effect,Cleared"
|
|
bitfld.long 0x0 6. " PC102 ,GPIO Output Port Clear 102" "No effect,Cleared"
|
|
bitfld.long 0x0 5. " PC101 ,GPIO Output Port Clear 101" "No effect,Cleared"
|
|
bitfld.long 0x0 4. " PC100 ,GPIO Output Port Clear 100" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PC99 ,GPIO Output Port Clear 99" "No effect,Cleared"
|
|
bitfld.long 0x0 2. " PC98 ,GPIO Output Port Clear 98" "No effect,Cleared"
|
|
bitfld.long 0x0 1. " PC97 ,GPIO Output Port Clear 97" "No effect,Cleared"
|
|
bitfld.long 0x0 0. " PC96 ,GPIO Output Port Clear 96" "No effect,Cleared"
|
|
group.long 0x30++3 "GPIO Rising-Edge Detect Enable Registers"
|
|
line.long 0x00 "GRER0,GPIO Rising-Edge Detect Enable Register 0"
|
|
setclrfld.long 0x0 31. 0x410 31. 0x430 31. " RE31_Set/Clr ,GPIO Port 31 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 30. 0x410 30. 0x430 30. " RE30_Set/Clr ,GPIO Port 30 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 29. 0x410 29. 0x430 29. " RE29_Set/Clr ,GPIO Port 29 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x410 28. 0x430 28. " RE28_Set/Clr ,GPIO Port 28 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 27. 0x410 27. 0x430 27. " RE27_Set/Clr ,GPIO Port 27 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 26. 0x410 26. 0x430 26. " RE26_Set/Clr ,GPIO Port 26 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x410 25. 0x430 25. " RE25_Set/Clr ,GPIO Port 25 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 24. 0x410 24. 0x430 24. " RE24_Set/Clr ,GPIO Port 24 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 23. 0x410 23. 0x430 23. " RE23_Set/Clr ,GPIO Port 23 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x410 22. 0x430 22. " RE22_Set/Clr ,GPIO Port 22 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 21. 0x410 21. 0x430 21. " RE21_Set/Clr ,GPIO Port 21 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 20. 0x410 20. 0x430 20. " RE20_Set/Clr ,GPIO Port 20 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x410 19. 0x430 19. " RE19_Set/Clr ,GPIO Port 19 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 18. 0x410 18. 0x430 18. " RE18_Set/Clr ,GPIO Port 18 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x410 17. 0x430 17. " RE17_Set/Clr ,GPIO Port 17 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x410 16. 0x430 16. " RE16_Set/Clr ,GPIO Port 16 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 15. 0x410 15. 0x430 15. " RE15_Set/Clr ,GPIO Port 15 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 14. 0x410 14. 0x430 14. " RE14_Set/Clr ,GPIO Port 14 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x410 13. 0x430 13. " RE13_Set/Clr ,GPIO Port 13 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 12. 0x410 12. 0x430 12. " RE12_Set/Clr ,GPIO Port 12 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 11. 0x410 11. 0x430 11. " RE11_Set/Clr ,GPIO Port 11 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x410 10. 0x430 10. " RE10_Set/Clr ,GPIO Port 10 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 9. 0x410 9. 0x430 9. " RE9_Set/Clr ,GPIO Port 9 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 8. 0x410 8. 0x430 8. " RE8_Set/Clr ,GPIO Port 8 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x410 7. 0x430 7. " RE7_Set/Clr ,GPIO Port 7 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x410 6. 0x430 6. " RE6_Set/Clr ,GPIO Port 6 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 5. 0x410 5. 0x430 5. " RE5_Set/Clr ,GPIO Port 5 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x410 4. 0x430 4. " RE4_Set/Clr ,GPIO Port 4 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x410 3. 0x430 3. " RE3_Set/Clr ,GPIO Port 3 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 2. 0x410 2. 0x430 2. " RE2_Set/Clr ,GPIO Port 2 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x410 1. 0x430 1. " RE1_Set/Clr ,GPIO Port 1 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x410 0. 0x430 0. " RE0_Set/Clr ,GPIO Port 0 Rising-edge Enable" "Disabled,Enabled"
|
|
group.long 0x34++3
|
|
line.long 0x00 "GRER1,GPIO Rising-Edge Detect Enable Register 1"
|
|
setclrfld.long 0x0 31. 0x410 31. 0x430 31. " RE63_Set/Clr ,GPIO Port 63 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 30. 0x410 30. 0x430 30. " RE62_Set/Clr ,GPIO Port 62 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 29. 0x410 29. 0x430 29. " RE61_Set/Clr ,GPIO Port 61 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x410 28. 0x430 28. " RE60_Set/Clr ,GPIO Port 60 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 27. 0x410 27. 0x430 27. " RE59_Set/Clr ,GPIO Port 59 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 26. 0x410 26. 0x430 26. " RE58_Set/Clr ,GPIO Port 58 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x410 25. 0x430 25. " RE57_Set/Clr ,GPIO Port 57 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 24. 0x410 24. 0x430 24. " RE56_Set/Clr ,GPIO Port 56 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 23. 0x410 23. 0x430 23. " RE55_Set/Clr ,GPIO Port 55 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x410 22. 0x430 22. " RE54_Set/Clr ,GPIO Port 54 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 21. 0x410 21. 0x430 21. " RE53_Set/Clr ,GPIO Port 53 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 20. 0x410 20. 0x430 20. " RE52_Set/Clr ,GPIO Port 52 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x410 19. 0x430 19. " RE51_Set/Clr ,GPIO Port 51 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 18. 0x410 18. 0x430 18. " RE50_Set/Clr ,GPIO Port 50 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x410 17. 0x430 17. " RE49_Set/Clr ,GPIO Port 49 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x410 16. 0x430 16. " RE48_Set/Clr ,GPIO Port 48 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 15. 0x410 15. 0x430 15. " RE47_Set/Clr ,GPIO Port 47 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 14. 0x410 14. 0x430 14. " RE46_Set/Clr ,GPIO Port 46 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x410 13. 0x430 13. " RE45_Set/Clr ,GPIO Port 45 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 12. 0x410 12. 0x430 12. " RE44_Set/Clr ,GPIO Port 44 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 11. 0x410 11. 0x430 11. " RE43_Set/Clr ,GPIO Port 43 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x410 10. 0x430 10. " RE42_Set/Clr ,GPIO Port 42 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 9. 0x410 9. 0x430 9. " RE41_Set/Clr ,GPIO Port 41 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 8. 0x410 8. 0x430 8. " RE40_Set/Clr ,GPIO Port 40 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x410 7. 0x430 7. " RE39_Set/Clr ,GPIO Port 39 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x410 6. 0x430 6. " RE38_Set/Clr ,GPIO Port 38 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 5. 0x410 5. 0x430 5. " RE37_Set/Clr ,GPIO Port 37 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x410 4. 0x430 4. " RE36_Set/Clr ,GPIO Port 36 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x410 3. 0x430 3. " RE35_Set/Clr ,GPIO Port 35 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 2. 0x410 2. 0x430 2. " RE34_Set/Clr ,GPIO Port 34 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x410 1. 0x430 1. " RE33_Set/Clr ,GPIO Port 33 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x410 0. 0x430 0. " RE32_Set/Clr ,GPIO Port 32 Rising-edge Enable" "Disabled,Enabled"
|
|
group.long 0x38++3
|
|
line.long 0x00 "GRER2,GPIO Rising-Edge Detect Enable Register 2"
|
|
setclrfld.long 0x0 31. 0x410 31. 0x430 31. " RE95_Set/Clr ,GPIO Port 95 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 30. 0x410 30. 0x430 30. " RE94_Set/Clr ,GPIO Port 94 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 29. 0x410 29. 0x430 29. " RE93_Set/Clr ,GPIO Port 93 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x410 28. 0x430 28. " RE92_Set/Clr ,GPIO Port 92 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 27. 0x410 27. 0x430 27. " RE91_Set/Clr ,GPIO Port 91 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 26. 0x410 26. 0x430 26. " RE90_Set/Clr ,GPIO Port 90 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x410 25. 0x430 25. " RE89_Set/Clr ,GPIO Port 89 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 24. 0x410 24. 0x430 24. " RE88_Set/Clr ,GPIO Port 88 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 23. 0x410 23. 0x430 23. " RE87_Set/Clr ,GPIO Port 87 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x410 22. 0x430 22. " RE86_Set/Clr ,GPIO Port 86 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 21. 0x410 21. 0x430 21. " RE85_Set/Clr ,GPIO Port 85 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 20. 0x410 20. 0x430 20. " RE84_Set/Clr ,GPIO Port 84 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x410 19. 0x430 19. " RE83_Set/Clr ,GPIO Port 83 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 18. 0x410 18. 0x430 18. " RE82_Set/Clr ,GPIO Port 82 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x410 17. 0x430 17. " RE81_Set/Clr ,GPIO Port 81 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x410 16. 0x430 16. " RE80_Set/Clr ,GPIO Port 80 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 15. 0x410 15. 0x430 15. " RE79_Set/Clr ,GPIO Port 79 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 14. 0x410 14. 0x430 14. " RE78_Set/Clr ,GPIO Port 78 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x410 13. 0x430 13. " RE77_Set/Clr ,GPIO Port 77 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 12. 0x410 12. 0x430 12. " RE76_Set/Clr ,GPIO Port 76 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 11. 0x410 11. 0x430 11. " RE75_Set/Clr ,GPIO Port 75 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x410 10. 0x430 10. " RE74_Set/Clr ,GPIO Port 74 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 9. 0x410 9. 0x430 9. " RE73_Set/Clr ,GPIO Port 73 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 8. 0x410 8. 0x430 8. " RE72_Set/Clr ,GPIO Port 72 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x410 7. 0x430 7. " RE71_Set/Clr ,GPIO Port 71 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x410 6. 0x430 6. " RE70_Set/Clr ,GPIO Port 70 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 5. 0x410 5. 0x430 5. " RE69_Set/Clr ,GPIO Port 69 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x410 4. 0x430 4. " RE68_Set/Clr ,GPIO Port 68 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x410 3. 0x430 3. " RE67_Set/Clr ,GPIO Port 67 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 2. 0x410 2. 0x430 2. " RE66_Set/Clr ,GPIO Port 66 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x410 1. 0x430 1. " RE65_Set/Clr ,GPIO Port 65 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x410 0. 0x430 0. " RE64_Set/Clr ,GPIO Port 64 Rising-edge Enable" "Disabled,Enabled"
|
|
group.long 0x130++3
|
|
line.long 0x00 "GRER3,GPIO Rising-Edge Detect Enable Register 3"
|
|
setclrfld.long 0x0 31. 0x31c 31. 0x33c 31. " RE127_Set/Clr ,GPIO Port 127 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 30. 0x31c 30. 0x33c 30. " RE126_Set/Clr ,GPIO Port 126 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 29. 0x31c 29. 0x33c 29. " RE125_Set/Clr ,GPIO Port 125 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x31c 28. 0x33c 28. " RE124_Set/Clr ,GPIO Port 124 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 27. 0x31c 27. 0x33c 27. " RE123_Set/Clr ,GPIO Port 123 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 26. 0x31c 26. 0x33c 26. " RE122_Set/Clr ,GPIO Port 122 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x31c 25. 0x33c 25. " RE121_Set/Clr ,GPIO Port 121 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 24. 0x31c 24. 0x33c 24. " RE120_Set/Clr ,GPIO Port 120 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 23. 0x31c 23. 0x33c 23. " RE119_Set/Clr ,GPIO Port 119 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x31c 22. 0x33c 22. " RE118_Set/Clr ,GPIO Port 118 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 21. 0x31c 21. 0x33c 21. " RE117_Set/Clr ,GPIO Port 117 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 20. 0x31c 20. 0x33c 20. " RE116_Set/Clr ,GPIO Port 116 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x31c 19. 0x33c 19. " RE115_Set/Clr ,GPIO Port 115 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 18. 0x31c 18. 0x33c 18. " RE114_Set/Clr ,GPIO Port 114 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x31c 17. 0x33c 17. " RE113_Set/Clr ,GPIO Port 113 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x31c 16. 0x33c 16. " RE112_Set/Clr ,GPIO Port 112 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 15. 0x31c 15. 0x33c 15. " RE111_Set/Clr ,GPIO Port 111 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 14. 0x31c 14. 0x33c 14. " RE110_Set/Clr ,GPIO Port 110 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x31c 13. 0x33c 13. " RE109_Set/Clr ,GPIO Port 109 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 12. 0x31c 12. 0x33c 12. " RE108_Set/Clr ,GPIO Port 108 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 11. 0x31c 11. 0x33c 11. " RE107_Set/Clr ,GPIO Port 107 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x31c 10. 0x33c 10. " RE106_Set/Clr ,GPIO Port 106 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 9. 0x31c 9. 0x33c 9. " RE105_Set/Clr ,GPIO Port 105 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 8. 0x31c 8. 0x33c 8. " RE104_Set/Clr ,GPIO Port 104 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x31c 7. 0x33c 7. " RE103_Set/Clr ,GPIO Port 103 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x31c 6. 0x33c 6. " RE102_Set/Clr ,GPIO Port 102 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 5. 0x31c 5. 0x33c 5. " RE101_Set/Clr ,GPIO Port 101 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x31c 4. 0x33c 4. " RE100_Set/Clr ,GPIO Port 100 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x31c 3. 0x33c 3. " RE99_Set/Clr ,GPIO Port 99 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 2. 0x31c 2. 0x33c 2. " RE98_Set/Clr ,GPIO Port 98 Rising-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x31c 1. 0x33c 1. " RE97_Set/Clr ,GPIO Port 97 Rising-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x31c 0. 0x33c 0. " RE96_Set/Clr ,GPIO Port 96 Rising-edge Enable" "Disabled,Enabled"
|
|
; --------------------------------------------------------------------------------
|
|
group.long 0x3c++3 "GPIO Falling-Edge Detect Enable Registers"
|
|
line.long 0x00 "GFER0,GPIO Falling-Edge Detect Enable Register 0"
|
|
setclrfld.long 0x0 31. 0x444 31. 0x464 31. " FE31_Set/Clr ,GPIO Port 31 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 30. 0x444 30. 0x464 30. " FE30_Set/Clr ,GPIO Port 30 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 29. 0x444 29. 0x464 29. " FE29_Set/Clr ,GPIO Port 29 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x444 28. 0x464 28. " FE28_Set/Clr ,GPIO Port 28 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 27. 0x444 27. 0x464 27. " FE27_Set/Clr ,GPIO Port 27 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 26. 0x444 26. 0x464 26. " FE26_Set/Clr ,GPIO Port 26 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x444 25. 0x464 25. " FE25_Set/Clr ,GPIO Port 25 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 24. 0x444 24. 0x464 24. " FE24_Set/Clr ,GPIO Port 24 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 23. 0x444 23. 0x464 23. " FE23_Set/Clr ,GPIO Port 23 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x444 22. 0x464 22. " FE22_Set/Clr ,GPIO Port 22 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 21. 0x444 21. 0x464 21. " FE21_Set/Clr ,GPIO Port 21 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 20. 0x444 20. 0x464 20. " FE20_Set/Clr ,GPIO Port 20 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x444 19. 0x464 19. " FE19_Set/Clr ,GPIO Port 19 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 18. 0x444 18. 0x464 18. " FE18_Set/Clr ,GPIO Port 18 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x444 17. 0x464 17. " FE17_Set/Clr ,GPIO Port 17 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x444 16. 0x464 16. " FE16_Set/Clr ,GPIO Port 16 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 15. 0x444 15. 0x464 15. " FE15_Set/Clr ,GPIO Port 15 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 14. 0x444 14. 0x464 14. " FE14_Set/Clr ,GPIO Port 14 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x444 13. 0x464 13. " FE13_Set/Clr ,GPIO Port 13 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 12. 0x444 12. 0x464 12. " FE12_Set/Clr ,GPIO Port 12 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 11. 0x444 11. 0x464 11. " FE11_Set/Clr ,GPIO Port 11 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x444 10. 0x464 10. " FE10_Set/Clr ,GPIO Port 10 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 9. 0x444 9. 0x464 9. " FE9_Set/Clr ,GPIO Port 9 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 8. 0x444 8. 0x464 8. " FE8_Set/Clr ,GPIO Port 8 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x444 7. 0x464 7. " FE7_Set/Clr ,GPIO Port 7 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x444 6. 0x464 6. " FE6_Set/Clr ,GPIO Port 6 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 5. 0x444 5. 0x464 5. " FE5_Set/Clr ,GPIO Port 5 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x444 4. 0x464 4. " FE4_Set/Clr ,GPIO Port 4 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x444 3. 0x464 3. " FE3_Set/Clr ,GPIO Port 3 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 2. 0x444 2. 0x464 2. " FE2_Set/Clr ,GPIO Port 2 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x444 1. 0x464 1. " FE1_Set/Clr ,GPIO Port 1 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x444 0. 0x464 0. " FE0_Set/Clr ,GPIO Port 0 Falling-edge Enable" "Disabled,Enabled"
|
|
group.long 0x40++3
|
|
line.long 0x00 "GFER1,GPIO Falling-Edge Detect Enable Register 1"
|
|
setclrfld.long 0x0 31. 0x444 31. 0x464 31. " FE63_Set/Clr ,GPIO Port 63 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 30. 0x444 30. 0x464 30. " FE62_Set/Clr ,GPIO Port 62 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 29. 0x444 29. 0x464 29. " FE61_Set/Clr ,GPIO Port 61 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x444 28. 0x464 28. " FE60_Set/Clr ,GPIO Port 60 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 27. 0x444 27. 0x464 27. " FE59_Set/Clr ,GPIO Port 59 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 26. 0x444 26. 0x464 26. " FE58_Set/Clr ,GPIO Port 58 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x444 25. 0x464 25. " FE57_Set/Clr ,GPIO Port 57 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 24. 0x444 24. 0x464 24. " FE56_Set/Clr ,GPIO Port 56 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 23. 0x444 23. 0x464 23. " FE55_Set/Clr ,GPIO Port 55 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x444 22. 0x464 22. " FE54_Set/Clr ,GPIO Port 54 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 21. 0x444 21. 0x464 21. " FE53_Set/Clr ,GPIO Port 53 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 20. 0x444 20. 0x464 20. " FE52_Set/Clr ,GPIO Port 52 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x444 19. 0x464 19. " FE51_Set/Clr ,GPIO Port 51 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 18. 0x444 18. 0x464 18. " FE50_Set/Clr ,GPIO Port 50 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x444 17. 0x464 17. " FE49_Set/Clr ,GPIO Port 49 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x444 16. 0x464 16. " FE48_Set/Clr ,GPIO Port 48 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 15. 0x444 15. 0x464 15. " FE47_Set/Clr ,GPIO Port 47 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 14. 0x444 14. 0x464 14. " FE46_Set/Clr ,GPIO Port 46 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x444 13. 0x464 13. " FE45_Set/Clr ,GPIO Port 45 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 12. 0x444 12. 0x464 12. " FE44_Set/Clr ,GPIO Port 44 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 11. 0x444 11. 0x464 11. " FE43_Set/Clr ,GPIO Port 43 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x444 10. 0x464 10. " FE42_Set/Clr ,GPIO Port 42 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 9. 0x444 9. 0x464 9. " FE41_Set/Clr ,GPIO Port 41 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 8. 0x444 8. 0x464 8. " FE40_Set/Clr ,GPIO Port 40 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x444 7. 0x464 7. " FE39_Set/Clr ,GPIO Port 39 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x444 6. 0x464 6. " FE38_Set/Clr ,GPIO Port 38 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 5. 0x444 5. 0x464 5. " FE37_Set/Clr ,GPIO Port 37 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x444 4. 0x464 4. " FE36_Set/Clr ,GPIO Port 36 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x444 3. 0x464 3. " FE35_Set/Clr ,GPIO Port 35 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 2. 0x444 2. 0x464 2. " FE34_Set/Clr ,GPIO Port 34 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x444 1. 0x464 1. " FE33_Set/Clr ,GPIO Port 33 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x444 0. 0x464 0. " FE32_Set/Clr ,GPIO Port 32 Falling-edge Enable" "Disabled,Enabled"
|
|
group.long 0x44++3
|
|
line.long 0x00 "GFER2,GPIO Falling-Edge Detect Enable Register 2"
|
|
setclrfld.long 0x0 31. 0x444 31. 0x464 31. " FE95_Set/Clr ,GPIO Port 95 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 30. 0x444 30. 0x464 30. " FE94_Set/Clr ,GPIO Port 94 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 29. 0x444 29. 0x464 29. " FE93_Set/Clr ,GPIO Port 93 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x444 28. 0x464 28. " FE92_Set/Clr ,GPIO Port 92 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 27. 0x444 27. 0x464 27. " FE91_Set/Clr ,GPIO Port 91 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 26. 0x444 26. 0x464 26. " FE90_Set/Clr ,GPIO Port 90 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x444 25. 0x464 25. " FE89_Set/Clr ,GPIO Port 89 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 24. 0x444 24. 0x464 24. " FE88_Set/Clr ,GPIO Port 88 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 23. 0x444 23. 0x464 23. " FE87_Set/Clr ,GPIO Port 87 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x444 22. 0x464 22. " FE86_Set/Clr ,GPIO Port 86 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 21. 0x444 21. 0x464 21. " FE85_Set/Clr ,GPIO Port 85 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 20. 0x444 20. 0x464 20. " FE84_Set/Clr ,GPIO Port 84 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x444 19. 0x464 19. " FE83_Set/Clr ,GPIO Port 83 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 18. 0x444 18. 0x464 18. " FE82_Set/Clr ,GPIO Port 82 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x444 17. 0x464 17. " FE81_Set/Clr ,GPIO Port 81 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x444 16. 0x464 16. " FE80_Set/Clr ,GPIO Port 80 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 15. 0x444 15. 0x464 15. " FE79_Set/Clr ,GPIO Port 79 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 14. 0x444 14. 0x464 14. " FE78_Set/Clr ,GPIO Port 78 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x444 13. 0x464 13. " FE77_Set/Clr ,GPIO Port 77 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 12. 0x444 12. 0x464 12. " FE76_Set/Clr ,GPIO Port 76 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 11. 0x444 11. 0x464 11. " FE75_Set/Clr ,GPIO Port 75 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x444 10. 0x464 10. " FE74_Set/Clr ,GPIO Port 74 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 9. 0x444 9. 0x464 9. " FE73_Set/Clr ,GPIO Port 73 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 8. 0x444 8. 0x464 8. " FE72_Set/Clr ,GPIO Port 72 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x444 7. 0x464 7. " FE71_Set/Clr ,GPIO Port 71 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x444 6. 0x464 6. " FE70_Set/Clr ,GPIO Port 70 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 5. 0x444 5. 0x464 5. " FE69_Set/Clr ,GPIO Port 69 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x444 4. 0x464 4. " FE68_Set/Clr ,GPIO Port 68 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x444 3. 0x464 3. " FE67_Set/Clr ,GPIO Port 67 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 2. 0x444 2. 0x464 2. " FE66_Set/Clr ,GPIO Port 66 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x444 1. 0x464 1. " FE65_Set/Clr ,GPIO Port 65 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x444 0. 0x464 0. " FE64_Set/Clr ,GPIO Port 64 Falling-edge Enable" "Disabled,Enabled"
|
|
group.long 0x13c++3
|
|
line.long 0x00 "GFER3,GPIO Falling-Edge Detect Enable Register 3"
|
|
setclrfld.long 0x0 31. 0x350 31. 0x370 31. " FE127_Set/Clr ,GPIO Port 127 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 30. 0x350 30. 0x370 30. " FE126_Set/Clr ,GPIO Port 126 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 29. 0x350 29. 0x370 29. " FE125_Set/Clr ,GPIO Port 125 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x350 28. 0x370 28. " FE124_Set/Clr ,GPIO Port 124 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 27. 0x350 27. 0x370 27. " FE123_Set/Clr ,GPIO Port 123 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 26. 0x350 26. 0x370 26. " FE122_Set/Clr ,GPIO Port 122 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x350 25. 0x370 25. " FE121_Set/Clr ,GPIO Port 121 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 24. 0x350 24. 0x370 24. " FE120_Set/Clr ,GPIO Port 120 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 23. 0x350 23. 0x370 23. " FE119_Set/Clr ,GPIO Port 119 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x350 22. 0x370 22. " FE118_Set/Clr ,GPIO Port 118 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 21. 0x350 21. 0x370 21. " FE117_Set/Clr ,GPIO Port 117 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 20. 0x350 20. 0x370 20. " FE116_Set/Clr ,GPIO Port 116 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x350 19. 0x370 19. " FE115_Set/Clr ,GPIO Port 115 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 18. 0x350 18. 0x370 18. " FE114_Set/Clr ,GPIO Port 114 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x350 17. 0x370 17. " FE113_Set/Clr ,GPIO Port 113 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x350 16. 0x370 16. " FE112_Set/Clr ,GPIO Port 112 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 15. 0x350 15. 0x370 15. " FE111_Set/Clr ,GPIO Port 111 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 14. 0x350 14. 0x370 14. " FE110_Set/Clr ,GPIO Port 110 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x350 13. 0x370 13. " FE109_Set/Clr ,GPIO Port 109 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 12. 0x350 12. 0x370 12. " FE108_Set/Clr ,GPIO Port 108 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 11. 0x350 11. 0x370 11. " FE107_Set/Clr ,GPIO Port 107 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x350 10. 0x370 10. " FE106_Set/Clr ,GPIO Port 106 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 9. 0x350 9. 0x370 9. " FE105_Set/Clr ,GPIO Port 105 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 8. 0x350 8. 0x370 8. " FE104_Set/Clr ,GPIO Port 104 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x350 7. 0x370 7. " FE103_Set/Clr ,GPIO Port 103 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x350 6. 0x370 6. " FE102_Set/Clr ,GPIO Port 102 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 5. 0x350 5. 0x370 5. " FE101_Set/Clr ,GPIO Port 101 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x350 4. 0x370 4. " FE100_Set/Clr ,GPIO Port 100 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x350 3. 0x370 3. " FE99_Set/Clr ,GPIO Port 99 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 2. 0x350 2. 0x370 2. " FE98_Set/Clr ,GPIO Port 98 Falling-edge Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x350 1. 0x370 1. " FE97_Set/Clr ,GPIO Port 97 Falling-edge Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x350 0. 0x370 0. " FE96_Set/Clr ,GPIO Port 96 Falling-edge Enable" "Disabled,Enabled"
|
|
group.long 0x48++3 "GPIO Edge Detect Status Registers"
|
|
line.long 0x00 "GEDR0,GPIO Edge Detect Status Register 0"
|
|
eventfld.long 0x0 31. " ED31 ,GPIO Edge Detect Status 31" "Not occurred,Occurred"
|
|
eventfld.long 0x0 30. " ED30 ,GPIO Edge Detect Status 30" "Not occurred,Occurred"
|
|
eventfld.long 0x0 29. " ED29 ,GPIO Edge Detect Status 29" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 28. " ED28 ,GPIO Edge Detect Status 28" "Not occurred,Occurred"
|
|
eventfld.long 0x0 27. " ED27 ,GPIO Edge Detect Status 27" "Not occurred,Occurred"
|
|
eventfld.long 0x0 26. " ED26 ,GPIO Edge Detect Status 26" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 25. " ED25 ,GPIO Edge Detect Status 25" "Not occurred,Occurred"
|
|
eventfld.long 0x0 24. " ED24 ,GPIO Edge Detect Status 24" "Not occurred,Occurred"
|
|
eventfld.long 0x0 23. " ED23 ,GPIO Edge Detect Status 23" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 22. " ED22 ,GPIO Edge Detect Status 22" "Not occurred,Occurred"
|
|
eventfld.long 0x0 21. " ED21 ,GPIO Edge Detect Status 21" "Not occurred,Occurred"
|
|
eventfld.long 0x0 20. " ED20 ,GPIO Edge Detect Status 20" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 19. " ED19 ,GPIO Edge Detect Status 19" "Not occurred,Occurred"
|
|
eventfld.long 0x0 18. " ED18 ,GPIO Edge Detect Status 18" "Not occurred,Occurred"
|
|
eventfld.long 0x0 17. " ED17 ,GPIO Edge Detect Status 17" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 16. " ED16 ,GPIO Edge Detect Status 16" "Not occurred,Occurred"
|
|
eventfld.long 0x0 15. " ED15 ,GPIO Edge Detect Status 15" "Not occurred,Occurred"
|
|
eventfld.long 0x0 14. " ED14 ,GPIO Edge Detect Status 14" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 13. " ED13 ,GPIO Edge Detect Status 13" "Not occurred,Occurred"
|
|
eventfld.long 0x0 12. " ED12 ,GPIO Edge Detect Status 12" "Not occurred,Occurred"
|
|
eventfld.long 0x0 11. " ED11 ,GPIO Edge Detect Status 11" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 10. " ED10 ,GPIO Edge Detect Status 10" "Not occurred,Occurred"
|
|
eventfld.long 0x0 9. " ED9 ,GPIO Edge Detect Status 9" "Not occurred,Occurred"
|
|
eventfld.long 0x0 8. " ED8 ,GPIO Edge Detect Status 8" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 7. " ED7 ,GPIO Edge Detect Status 7" "Not occurred,Occurred"
|
|
eventfld.long 0x0 6. " ED6 ,GPIO Edge Detect Status 6" "Not occurred,Occurred"
|
|
eventfld.long 0x0 5. " ED5 ,GPIO Edge Detect Status 5" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 4. " ED4 ,GPIO Edge Detect Status 4" "Not occurred,Occurred"
|
|
eventfld.long 0x0 3. " ED3 ,GPIO Edge Detect Status 3" "Not occurred,Occurred"
|
|
eventfld.long 0x0 2. " ED2 ,GPIO Edge Detect Status 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 1. " ED1 ,GPIO Edge Detect Status 1" "Not occurred,Occurred"
|
|
eventfld.long 0x0 0. " ED0 ,GPIO Edge Detect Status 0" "Not occurred,Occurred"
|
|
group.long 0x4c++3
|
|
line.long 0x00 "GEDR1,GPIO Edge Detect Status Register 1"
|
|
eventfld.long 0x0 31. " ED63 ,GPIO Edge Detect Status 63" "Not occurred,Occurred"
|
|
eventfld.long 0x0 30. " ED62 ,GPIO Edge Detect Status 62" "Not occurred,Occurred"
|
|
eventfld.long 0x0 29. " ED61 ,GPIO Edge Detect Status 61" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 28. " ED60 ,GPIO Edge Detect Status 60" "Not occurred,Occurred"
|
|
eventfld.long 0x0 27. " ED59 ,GPIO Edge Detect Status 59" "Not occurred,Occurred"
|
|
eventfld.long 0x0 26. " ED58 ,GPIO Edge Detect Status 58" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 25. " ED57 ,GPIO Edge Detect Status 57" "Not occurred,Occurred"
|
|
eventfld.long 0x0 24. " ED56 ,GPIO Edge Detect Status 56" "Not occurred,Occurred"
|
|
eventfld.long 0x0 23. " ED55 ,GPIO Edge Detect Status 55" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 22. " ED54 ,GPIO Edge Detect Status 54" "Not occurred,Occurred"
|
|
eventfld.long 0x0 21. " ED53 ,GPIO Edge Detect Status 53" "Not occurred,Occurred"
|
|
eventfld.long 0x0 20. " ED52 ,GPIO Edge Detect Status 52" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 19. " ED51 ,GPIO Edge Detect Status 51" "Not occurred,Occurred"
|
|
eventfld.long 0x0 18. " ED50 ,GPIO Edge Detect Status 50" "Not occurred,Occurred"
|
|
eventfld.long 0x0 17. " ED49 ,GPIO Edge Detect Status 49" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 16. " ED48 ,GPIO Edge Detect Status 48" "Not occurred,Occurred"
|
|
eventfld.long 0x0 15. " ED47 ,GPIO Edge Detect Status 47" "Not occurred,Occurred"
|
|
eventfld.long 0x0 14. " ED46 ,GPIO Edge Detect Status 46" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 13. " ED45 ,GPIO Edge Detect Status 45" "Not occurred,Occurred"
|
|
eventfld.long 0x0 12. " ED44 ,GPIO Edge Detect Status 44" "Not occurred,Occurred"
|
|
eventfld.long 0x0 11. " ED43 ,GPIO Edge Detect Status 43" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 10. " ED42 ,GPIO Edge Detect Status 42" "Not occurred,Occurred"
|
|
eventfld.long 0x0 9. " ED41 ,GPIO Edge Detect Status 41" "Not occurred,Occurred"
|
|
eventfld.long 0x0 8. " ED40 ,GPIO Edge Detect Status 40" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 7. " ED39 ,GPIO Edge Detect Status 39" "Not occurred,Occurred"
|
|
eventfld.long 0x0 6. " ED38 ,GPIO Edge Detect Status 38" "Not occurred,Occurred"
|
|
eventfld.long 0x0 5. " ED37 ,GPIO Edge Detect Status 37" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 4. " ED36 ,GPIO Edge Detect Status 36" "Not occurred,Occurred"
|
|
eventfld.long 0x0 3. " ED35 ,GPIO Edge Detect Status 35" "Not occurred,Occurred"
|
|
eventfld.long 0x0 2. " ED34 ,GPIO Edge Detect Status 34" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 1. " ED33 ,GPIO Edge Detect Status 33" "Not occurred,Occurred"
|
|
eventfld.long 0x0 0. " ED32 ,GPIO Edge Detect Status 32" "Not occurred,Occurred"
|
|
group.long 0x50++3
|
|
line.long 0x00 "GEDR2,GPIO Edge Detect Status Register 2"
|
|
eventfld.long 0x0 31. " ED95 ,GPIO Edge Detect Status 95" "Not occurred,Occurred"
|
|
eventfld.long 0x0 30. " ED94 ,GPIO Edge Detect Status 94" "Not occurred,Occurred"
|
|
eventfld.long 0x0 29. " ED93 ,GPIO Edge Detect Status 93" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 28. " ED92 ,GPIO Edge Detect Status 92" "Not occurred,Occurred"
|
|
eventfld.long 0x0 27. " ED91 ,GPIO Edge Detect Status 91" "Not occurred,Occurred"
|
|
eventfld.long 0x0 26. " ED90 ,GPIO Edge Detect Status 90" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 25. " ED89 ,GPIO Edge Detect Status 89" "Not occurred,Occurred"
|
|
eventfld.long 0x0 24. " ED88 ,GPIO Edge Detect Status 88" "Not occurred,Occurred"
|
|
eventfld.long 0x0 23. " ED87 ,GPIO Edge Detect Status 87" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 22. " ED86 ,GPIO Edge Detect Status 86" "Not occurred,Occurred"
|
|
eventfld.long 0x0 21. " ED85 ,GPIO Edge Detect Status 85" "Not occurred,Occurred"
|
|
eventfld.long 0x0 20. " ED84 ,GPIO Edge Detect Status 84" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 19. " ED83 ,GPIO Edge Detect Status 83" "Not occurred,Occurred"
|
|
eventfld.long 0x0 18. " ED82 ,GPIO Edge Detect Status 82" "Not occurred,Occurred"
|
|
eventfld.long 0x0 17. " ED81 ,GPIO Edge Detect Status 81" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 16. " ED80 ,GPIO Edge Detect Status 80" "Not occurred,Occurred"
|
|
eventfld.long 0x0 15. " ED79 ,GPIO Edge Detect Status 79" "Not occurred,Occurred"
|
|
eventfld.long 0x0 14. " ED78 ,GPIO Edge Detect Status 78" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 13. " ED77 ,GPIO Edge Detect Status 77" "Not occurred,Occurred"
|
|
eventfld.long 0x0 12. " ED76 ,GPIO Edge Detect Status 76" "Not occurred,Occurred"
|
|
eventfld.long 0x0 11. " ED75 ,GPIO Edge Detect Status 75" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 10. " ED74 ,GPIO Edge Detect Status 74" "Not occurred,Occurred"
|
|
eventfld.long 0x0 9. " ED73 ,GPIO Edge Detect Status 73" "Not occurred,Occurred"
|
|
eventfld.long 0x0 8. " ED72 ,GPIO Edge Detect Status 72" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 7. " ED71 ,GPIO Edge Detect Status 71" "Not occurred,Occurred"
|
|
eventfld.long 0x0 6. " ED70 ,GPIO Edge Detect Status 70" "Not occurred,Occurred"
|
|
eventfld.long 0x0 5. " ED69 ,GPIO Edge Detect Status 69" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 4. " ED68 ,GPIO Edge Detect Status 68" "Not occurred,Occurred"
|
|
eventfld.long 0x0 3. " ED67 ,GPIO Edge Detect Status 67" "Not occurred,Occurred"
|
|
eventfld.long 0x0 2. " ED66 ,GPIO Edge Detect Status 66" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 1. " ED65 ,GPIO Edge Detect Status 65" "Not occurred,Occurred"
|
|
eventfld.long 0x0 0. " ED64 ,GPIO Edge Detect Status 64" "Not occurred,Occurred"
|
|
group.long 0x148++3
|
|
line.long 0x00 "GEDR3,GPIO Edge Detect Status Register 3"
|
|
eventfld.long 0x0 31. " ED127 ,GPIO Edge Detect Status 127" "Not occurred,Occurred"
|
|
eventfld.long 0x0 30. " ED126 ,GPIO Edge Detect Status 126" "Not occurred,Occurred"
|
|
eventfld.long 0x0 29. " ED125 ,GPIO Edge Detect Status 125" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 28. " ED124 ,GPIO Edge Detect Status 124" "Not occurred,Occurred"
|
|
eventfld.long 0x0 27. " ED123 ,GPIO Edge Detect Status 123" "Not occurred,Occurred"
|
|
eventfld.long 0x0 26. " ED122 ,GPIO Edge Detect Status 122" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 25. " ED121 ,GPIO Edge Detect Status 121" "Not occurred,Occurred"
|
|
eventfld.long 0x0 24. " ED120 ,GPIO Edge Detect Status 120" "Not occurred,Occurred"
|
|
eventfld.long 0x0 23. " ED119 ,GPIO Edge Detect Status 119" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 22. " ED118 ,GPIO Edge Detect Status 118" "Not occurred,Occurred"
|
|
eventfld.long 0x0 21. " ED117 ,GPIO Edge Detect Status 117" "Not occurred,Occurred"
|
|
eventfld.long 0x0 20. " ED116 ,GPIO Edge Detect Status 116" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 19. " ED115 ,GPIO Edge Detect Status 115" "Not occurred,Occurred"
|
|
eventfld.long 0x0 18. " ED114 ,GPIO Edge Detect Status 114" "Not occurred,Occurred"
|
|
eventfld.long 0x0 17. " ED113 ,GPIO Edge Detect Status 113" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 16. " ED112 ,GPIO Edge Detect Status 112" "Not occurred,Occurred"
|
|
eventfld.long 0x0 15. " ED111 ,GPIO Edge Detect Status 111" "Not occurred,Occurred"
|
|
eventfld.long 0x0 14. " ED110 ,GPIO Edge Detect Status 110" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 13. " ED109 ,GPIO Edge Detect Status 109" "Not occurred,Occurred"
|
|
eventfld.long 0x0 12. " ED108 ,GPIO Edge Detect Status 108" "Not occurred,Occurred"
|
|
eventfld.long 0x0 11. " ED107 ,GPIO Edge Detect Status 107" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 10. " ED106 ,GPIO Edge Detect Status 106" "Not occurred,Occurred"
|
|
eventfld.long 0x0 9. " ED105 ,GPIO Edge Detect Status 105" "Not occurred,Occurred"
|
|
eventfld.long 0x0 8. " ED104 ,GPIO Edge Detect Status 104" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 7. " ED103 ,GPIO Edge Detect Status 103" "Not occurred,Occurred"
|
|
eventfld.long 0x0 6. " ED102 ,GPIO Edge Detect Status 102" "Not occurred,Occurred"
|
|
eventfld.long 0x0 5. " ED101 ,GPIO Edge Detect Status 101" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 4. " ED100 ,GPIO Edge Detect Status 100" "Not occurred,Occurred"
|
|
eventfld.long 0x0 3. " ED99 ,GPIO Edge Detect Status 99" "Not occurred,Occurred"
|
|
eventfld.long 0x0 2. " ED98 ,GPIO Edge Detect Status 98" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 1. " ED97 ,GPIO Edge Detect Status 97" "Not occurred,Occurred"
|
|
eventfld.long 0x0 0. " ED96 ,GPIO Edge Detect Status 96" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "Services Clock Control"
|
|
base ad:0x41350000
|
|
width 0x6
|
|
group.long 0x00++3
|
|
line.long 0x00 "OSCC,Oscillator Configuration Register"
|
|
bitfld.long 0x00 16. " TD ,Frequency Change due to Temperature Condition Disable" "Not changed,Changed"
|
|
bitfld.long 0x00 12. " ROS ,Ring Oscillator Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PEN ,CLK_POUT Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TENS3 ,CLK_TOUT S3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TENS2 ,CLK_TOUT S2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TENS0 ,CLK_TOUT S0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " VCXOST ,Wait time for processor oscillator stabilization"
|
|
width 0xb
|
|
tree.end
|
|
tree "Slave Clock Control"
|
|
base ad:0x41340000
|
|
width 0xa
|
|
group.long 0x00++3
|
|
line.long 0x00 "ACCR,Application Subsystem Clock Configuration Register"
|
|
bitfld.long 0x00 31. " XPDIS ,Core PLL Output Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. " SPDIS ,System PLL Output Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " D0CS ,D0 Mode Clock Select" "Core PLL,Ring oscillator"
|
|
textline " "
|
|
bitfld.long 0x00 23.--25. " SMCFS ,Static Memory Controller Frequency Select" "78 MHz,Reserved,104 MHz,Reserved,Reserved,208 MHz,Reserved,Reserved"
|
|
bitfld.long 0x00 18.--19. " SFLFS ,Frequency Select for SRAM Controllers" "104 MHz,156 MHz,208 MHz,312 MHz"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " XSPCLK ,Core Frequency During Frequency Change" "156 MHz,Reserved,Reserved,No clock"
|
|
bitfld.long 0x00 14.--15. " HSS ,HSIO Bus-Clock Frequency Select" "104 MHz,156 MHz,208 MHz,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " DMCFS ,DDR Memory Controller Clock Frequency Select" "26 MHz,Reserved,Reserved,260 MHz"
|
|
bitfld.long 0x00 11. " PCCE ,Power Mode Change Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " XN ,Core PLL Turbo-Mode-to-Run-Mode Ratio" "Reserved,1:1,2:1,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 0.--4. " XL ,Core PLL Run-Mode-to-Oscillator Ratio" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8:1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16:1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,24:1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31:1"
|
|
rgroup.long 0x04++3
|
|
line.long 0x00 "ACSR,Application Subsystem Clock Status Register"
|
|
bitfld.long 0x00 31. " XPDIS_S ,Core PLL Output Status" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. " SPDIS_S ,System PLL Output Status" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " XPLCK ,Core PLL Lock" "Not locked,Locked"
|
|
bitfld.long 0x00 28. " SPLCK ,System PLL Lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " RO_S ,Ring Oscillator Status" "Not used,Used"
|
|
bitfld.long 0x00 23.--25. " SMC_S ,Static Memory Controller Frequency Select" "78 MHz,Reserved,104 MHz,Reserved,Reserved,208 MHz,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " VAUF_S ,Selected Video Accelerator" "104 MHz,156 MHz,208 MHz,78 MHz"
|
|
bitfld.long 0x00 18.--19. " SFL_S ,Frequency Select for SRAM Controllers" "Reserved,156 MHz,208 MHz,312 MHz"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " XSPCLK_S ,Core Frequency During Frequency Change" "156 MHz,Reserved,Reserved,No clock"
|
|
bitfld.long 0x00 14.--15. " HSS_S ,HSIO Bus-Clock Frequency Select" "104 MHz,156 MHz,208 MHz,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " DMC_S ,DDR Memory Controller Clock Frequency Select" "26 MHz,Reserved,Reserved,260 MHz"
|
|
bitfld.long 0x00 8.--10. " XN_S ,Core PLL Turbo-Mode-to-Run-Mode Ratio" "Reserved,1:1,2:1,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " XL_S ,Core PLL Run-Mode-to-Oscillator Ratio" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8:1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16:1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,24:1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31:1"
|
|
group.long 0x08++3
|
|
line.long 0x00 "AICSR,Application Subsystem Interrupt Control/Status Register"
|
|
eventfld.long 0x00 5. " PCIS ,Power-Mode Change-Induced Frequency Change Interrupt Status" "Not ready,Ready"
|
|
bitfld.long 0x00 4. " PCIE ,Power-Mode Change-Induced Frequency Change Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 3. " TCIS ,Temperature-Induced Frequency Change Interrupt Status" "Not switched,Switched"
|
|
bitfld.long 0x00 2. " TCIE ,Temperature-Induced Frequency Change Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " FCIS ,Frequency Change Interrupt Status" "Not switched,Switched"
|
|
bitfld.long 0x00 0. " FCIE ,Frequency Change Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x0c++3
|
|
line.long 0x00 "D0CKEN_A,D0 Mode Clock Enable Register A"
|
|
bitfld.long 0x0 31. " CKEN31 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 30. " CKEN30 ,MSL0 Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 29. " CKEN29 ,SSP4 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " CKEN28 ,SSP3 Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " CKEN27 ,SSP2 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " CKEN26 ,SSP1 Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " CKEN25 ,Toutchscreen Interface Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " CKEN24 ,AC97 Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " CKEN23 ,UART3 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " CKEN22 ,UART1 Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " CKEN21 ,UART2 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " CKEN20 ,UDC Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 19. " CKEN19 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 18. " CKEN18 ,USIM[1] Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 17. " CKEN17 ,USIM[0] Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " CKEN16 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 15. " CKEN15 ,Consumer IR Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " CKEN14 ,Keypad Controller Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 13. " CKEN13 ,MMC1 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " CKEN12 ,MMC0 Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " CKEN11 ,Boot ROM Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " CKEN10 ,Internal SRAM Controller Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 9. " CKEN9 ,Static Memory Controller Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " CKEN8 ,Dynamic Memory Controller Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " CKEN7 ,Graphics Controller Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " CKEN6 ,USB 2.0 Client Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CKEN5 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 4. " CKEN4 ,Nand Flash Controller Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CKEN3 ,Camera Interface Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " CKEN2 ,USB Host Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CKEN1 ,LCD Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " CKEN5 ,Allways set" "Reserved,1"
|
|
group.long 0x10++3
|
|
line.long 0x00 "D0CKEN_B,D0 Mode Clock Enable Register B"
|
|
bitfld.long 0x0 31. " CKEN31 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 30. " CKEN30 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 29. " CKEN29 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 28. " CKEN28 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 27. " CKEN27 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 26. " CKEN26 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 25. " CKEN25 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 24. " CKEN24 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 23. " CKEN23 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 22. " CKEN22 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 21. " CKEN21 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 20. " CKEN20 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 19. " CKEN19 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 18. " CKEN18 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 17. " CKEN17 ,Mini-LCD Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " CKEN16 ,Mini-IMClock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " CKEN15 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 14. " CKEN14 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 13. " CKEN13 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 12. " CKEN12 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
sif (cpu()=="PXA310")
|
|
bitfld.long 0x0 11. " CKEN12 ,Monahans LV Video Accelerator Clock Enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0 11. " CKEN12 ,Allways set" "Reserved,1"
|
|
endif
|
|
bitfld.long 0x0 10. " CKEN10 ,HSIO_GCU Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 9. " CKEN9 ,HSIO2 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " CKEN8 ,1-Wire Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " CKEN7 ,GPIO Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " CKEN6 ,Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CKEN5 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 4. " CKEN4 ,Standart I2C Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CKEN3 ,Allways set" "Reserved,1"
|
|
bitfld.long 0x0 2. " CKEN2 ,Allways set" "Reserved,1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CKEN1 ,PWM[3:2] Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " CKEN0 ,PWM[1:0] Clock Enable" "Disabled,Enabled"
|
|
group.long 0x14++3
|
|
line.long 0x00 "AC97_DIV,AC97 Clock Divisor Value Register"
|
|
hexmask.long.word 0x00 12.--26. 1. " Num ,Numerator value in the dithering divider used for generating clk_ac97"
|
|
hexmask.long.word 0x00 0.--11. 1. " Denom ,Denominator value in the dithering divider used for generating clk_ac97"
|
|
width 0xb
|
|
tree.end
|
|
tree "Services Power Management Unit"
|
|
base ad:0x40F50000
|
|
width 0x6
|
|
group.long 0x00++3
|
|
line.long 0x00 "PMCR,Power Management Unit Control Register"
|
|
bitfld.long 0x00 31. " SWGR ,Software GPIO Reset" "No reset,Reset"
|
|
eventfld.long 0x00 13. " VIS ,Interrupt Status for VCC_APPS and VCC_SRAM Voltage Change Due to a High-Temperature Condition" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " VIE ,Interrupt Enable for VCC_APPS and VCC_SRAM Voltage Change Due to a High-Temperature Condition" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " TIS ,Interrupt Status for Aplication Core Frequency Change Due to Temperature Condition" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TIE ,Interrupt Enable for Aplication Core Frequency Change Due to Temperature Condition" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " BIS ,Interrupt Status for nBATT_FAULT" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BIE ,Interrupt Enable for nBATT_FAULT" "Disabled,Enabled"
|
|
group.long 0x04++3
|
|
line.long 0x00 "PSR,Power Management Unit S2 Status Register"
|
|
bitfld.long 0x00 31. " PTS ,Part Type Status" "Monahans,Reserved"
|
|
bitfld.long 0x00 12.--14. " TSS ,Temperature Sensor Status" "Disabled,<40 deg C,>40 and <80 deg C,>80 and <100 deg C,>100 deg C,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 2. " BFS ,Battery Fault Status" "Not asserted,Asserted"
|
|
eventfld.long 0x00 1. " SS3S ,Software S3 Status" "MPMU not in S3,MPMU in S3"
|
|
textline " "
|
|
eventfld.long 0x00 0. " SS2S ,Software S3 Status" "MPMU not in S2,MPMU in S2"
|
|
group.long 0x08++3
|
|
line.long 0x00 "PSPR,Power Management Unit Scratch Pad Register"
|
|
bitfld.long 0x0 31. " SP31 ,Scratch Pad Register bit 31" "Low,High"
|
|
bitfld.long 0x0 30. " SP30 ,Scratch Pad Register bit 30" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 29. " SP29 ,Scratch Pad Register bit 29" "Low,High"
|
|
bitfld.long 0x0 28. " SP28 ,Scratch Pad Register bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 27. " SP27 ,Scratch Pad Register bit 27" "Low,High"
|
|
bitfld.long 0x0 26. " SP26 ,Scratch Pad Register bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SP25 ,Scratch Pad Register bit 25" "Low,High"
|
|
bitfld.long 0x0 24. " SP24 ,Scratch Pad Register bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 23. " SP23 ,Scratch Pad Register bit 23" "Low,High"
|
|
bitfld.long 0x0 22. " SP22 ,Scratch Pad Register bit 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 21. " SP21 ,Scratch Pad Register bit 21" "Low,High"
|
|
bitfld.long 0x0 20. " SP20 ,Scratch Pad Register bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 19. " SP19 ,Scratch Pad Register bit 19" "Low,High"
|
|
bitfld.long 0x0 18. " SP18 ,Scratch Pad Register bit 18" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 17. " SP17 ,Scratch Pad Register bit 17" "Low,High"
|
|
bitfld.long 0x0 16. " SP16 ,Scratch Pad Register bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 15. " SP15 ,Scratch Pad Register bit 15" "Low,High"
|
|
bitfld.long 0x0 14. " SP14 ,Scratch Pad Register bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 13. " SP13 ,Scratch Pad Register bit 13" "Low,High"
|
|
bitfld.long 0x0 12. " SP12 ,Scratch Pad Register bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 11. " SP11 ,Scratch Pad Register bit 11" "Low,High"
|
|
bitfld.long 0x0 10. " SP10 ,Scratch Pad Register bit 10" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 9. " SP9 ,Scratch Pad Register bit 9" "Low,High"
|
|
bitfld.long 0x0 8. " SP8 ,Scratch Pad Register bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 7. " SP7 ,Scratch Pad Register bit 7" "Low,High"
|
|
bitfld.long 0x0 6. " SP6 ,Scratch Pad Register bit 6" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SP5 ,Scratch Pad Register bit 5" "Low,High"
|
|
bitfld.long 0x0 4. " SP4 ,Scratch Pad Register bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 3. " SP3 ,Scratch Pad Register bit 3" "Low,High"
|
|
bitfld.long 0x0 2. " SP2 ,Scratch Pad Register bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 1. " SP1 ,Scratch Pad Register bit 1" "Low,High"
|
|
bitfld.long 0x0 0. " SP0 ,Scratch Pad Register bit 0" "Low,High"
|
|
group.long 0x0c++3
|
|
line.long 0x00 "PCFR,Power Management Unit General Configuration Register"
|
|
bitfld.long 0x00 28.--31. " SYS_DEL ,System-Power-Supply Ramp Delay" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,4096,4096,4096"
|
|
bitfld.long 0x00 24.--27. " PWR_DEL ,Power-Supply (VCC_APPS and VCC_SRAM) Ramp Delay" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,4096,4096,4096"
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " LPM_DEL ,Power-Supply (VCC_APPS and VCC_SRAM) Ramp Delay when D1/D2/Low-Power Modes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 13. " L1_DIS ,S2 Mode L1 Regulator Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " L0_EN ,S3 Mode L0 Regulator Enable" "Enabled,Reserved"
|
|
bitfld.long 0x00 8. " SWDD ,Shorten Wake-up Delay Disable" "Not shorten,Shorten"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PUDH ,Pull-up/Pull-down Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SL_ROD ,S2 State nRESET_OUT Disable" "Asserted,Not asserted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " GP_ROD ,GPIO nRESET_OUT Disable" "Asserted,Not asserted"
|
|
group.long 0x10++3
|
|
line.long 0x00 "PWER,Power Management Wake-up Enable Register"
|
|
bitfld.long 0x00 31. " WERTC ,Wake-up Enable for RTC or S3 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WEF1 ,Wake-up Enable for Falling-Edge EXT_WAKUP 1 for S2 or S3 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WEF0 ,Wake-up Enable for Falling-Edge EXT_WAKUP 0 for S2 or S3 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WER1 ,Wake-up Enable for Rising-Edge EXT_WAKUP 1 for S2 or S3 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WER0 ,Wake-up Enable for Rising-Edge EXT_WAKUP 0 for S2 or S3 State" "Disabled,Enabled"
|
|
group.long 0x14++3
|
|
line.long 0x00 "PWSR,Power Management Wake-up Status Register"
|
|
eventfld.long 0x00 31. " EERTC ,S2 or S3 Wake-up from RTC" "Not detected,Detected"
|
|
eventfld.long 0x00 3. " EDF1 ,S2 or S3 Wake-up for Falling-edge from EXT_WAKEUP 1" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 2. " EDF0 ,S2 or S3 Wake-up for Falling-edge from EXT_WAKEUP 0" "Not detected,Detected"
|
|
eventfld.long 0x00 1. " EDR1 ,S2 or S3 Wake-up for Rising-edge from EXT_WAKEUP 1" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 0. " EDR0 ,S2 or S3 Wake-up for Rising-edge from EXT_WAKEUP 0" "Not detected,Detected"
|
|
group.long 0x18++3
|
|
line.long 0x00 "PECR,Power Management EXT_WAKEUP<1:0> Control Register"
|
|
eventfld.long 0x00 31. " E1IS ,EXT_WAKEUP<1> Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " E1IE ,EXT_WAKEUP<1> Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 29. " E0IS ,EXT_WAKEUP<0> Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " E0IE ,EXT_WAKEUP<0> Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IN1 ,Input Value for EXT_WAKEUP<1>" "0,1"
|
|
bitfld.long 0x00 0. " IN0 ,Input Value for EXT_WAKEUP<0>" "0,1"
|
|
group.long 0x100++3
|
|
line.long 0x00 "PVCR,Power Management Unit Voltage Change Control Register"
|
|
bitfld.long 0x00 31. " FVE ,Frequency/Voltage Change Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PVE ,Power Change Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " TVE ,Voltage Change Due to Temperature Condition Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " VCSA ,Voltage-Change Sequencer Active" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " SADDR ,Slave Address"
|
|
width 0xb
|
|
tree.end
|
|
tree "Slave Power Management Unit"
|
|
base ad:0x40F40000
|
|
width 0x9
|
|
group.long 0x00++3
|
|
line.long 0x00 "ASCR,Application Subsystem Power Status/Configuration Register"
|
|
bitfld.long 0x00 31. " RDH ,Controls the de-assertion of FW_RDH" "RDH firewall deasserted,RDH firewall asserted"
|
|
bitfld.long 0x00 12.--14. " MTS ,Maximum Turbo Setting" "Reserved,XN-1,XN-2,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " MTS_S ,Maximum Turbo Setting Status" "Reserved,XN-1,XN-2,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 2. " D1S ,Application Subsystem D1 State Status" "Not in D1,In D1"
|
|
textline " "
|
|
eventfld.long 0x00 1. " D2S ,Application Subsystem D2 State Status" "Not in D2,In D2"
|
|
eventfld.long 0x00 0. " D3S ,Application Subsystem D3 State Status" "Not in D3,In D3"
|
|
group.long 0x04++3
|
|
line.long 0x00 "ARSR,Application Subsystem Reset Status Register"
|
|
eventfld.long 0x00 3. " GPR ,GPIO Reset" "No reset,Reset"
|
|
eventfld.long 0x00 2. " LPMR ,S3 Low-Power Mode Exit Reset" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 1. " WDT ,Watchdog Time-out Reset" "No reset,Reset"
|
|
eventfld.long 0x00 0. " HWR ,Hardware/Power-on Reset " "No reset,Reset"
|
|
group.long 0x08++3
|
|
line.long 0x00 "AD3ER,Application Subsystem D3 State Wake-up Enable Register"
|
|
bitfld.long 0x00 31. " WERTC ,Wake-up Options for RTC from D3 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " WEOST ,Wake-up Options for OS Timer from D3 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WETSI ,Wake-up Options for Touch Screen Interface from D3 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " WEUSBH ,Wake-up Options for USB Host Port from D3 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WEUSB2 ,Wake-up Options for USB Client 2.0 Port from D3 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " WEMSL0 ,Wake-up Options for a Rising Edge from MSL Port 0 from D3 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " WEDMUX3 ,Wake-up Options for a Rising Edge from USB EDMUX3 Port from D3 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " WEDMUX2 ,Wake-up Options for a Rising Edge from USB EDMUX2 Port from D3 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " WEKP ,Wake-up Options for a Keypad from D3 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WEUSIM1 ,Wake-up Options for USIM Port 1 from D3 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WEUSIM0 ,Wake-up Options for USIM Port 0 from D3 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " WE_OTG ,Wake-up Options for USBOTG Input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " WE_GENERIC13 ,Wake-up Options for generic event inputs from D3 to D0 State 13" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " WE_GENERIC12 ,Wake-up Options for generic event inputs from D3 to D0 State 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 13. " WE_GENERIC11 ,Wake-up Options for generic event inputs from D3 to D0 State 11" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " WE_GENERIC10 ,Wake-up Options for generic event inputs from D3 to D0 State 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " WE_GENERIC9 ,Wake-up Options for generic event inputs from D3 to D0 State 9" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " WE_GENERIC8 ,Wake-up Options for generic event inputs from D3 to D0 State 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 9. " WE_GENERIC7 ,Wake-up Options for generic event inputs from D3 to D0 State 7" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " WE_GENERIC6 ,Wake-up Options for generic event inputs from D3 to D0 State 6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " WE_GENERIC5 ,Wake-up Options for generic event inputs from D3 to D0 State 5" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " WE_GENERIC4 ,Wake-up Options for generic event inputs from D3 to D0 State 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " WE_GENERIC3 ,Wake-up Options for generic event inputs from D3 to D0 State 3" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " WE_GENERIC2 ,Wake-up Options for generic event inputs from D3 to D0 State 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " WE_GENERIC1 ,Wake-up Options for generic event inputs from D3 to D0 State 1" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " WE_GENERIC0 ,Wake-up Options for generic event inputs from D3 to D0 State 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WE_EXTERNAL1 ,Wake-up for EXT_WAKE <1>" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WE_EXTERNAL0 ,Wake-up for EXT_WAKE <0>" "Disabled,Enabled"
|
|
group.long 0x0c++3
|
|
line.long 0x00 "AD3SR,Application Subsystem D3 State Wake-up Staus Register"
|
|
eventfld.long 0x00 31. " WSRTC ,Wake-up Status for RTC from D3 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 30. " WSOST ,Wake-up Status for OS Timer from D3 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 29. " WSTSI ,Wake-up Status for Touch Screen Interface from D3 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 28. " WSUSBH ,Wake-up Status for USB Host Port from D3 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 26. " WSUSB2 ,Wake-up Status for USB Client 2.0 Port from D3 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 24. " WSMSL0 ,Wake-up Status for a Rising Edge from MSL Port 0 from D3 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 23. " WSDMUX3 ,Wake-up Status for a Rising Edge from USB EDMUX3 Port from D3 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 22. " WSDMUX2 ,Wake-up Status for a Rising Edge from USB EDMUX2 Port from D3 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 21. " WSKP ,Wake-up Status for a Keypad from D3 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 20. " WSUSIM1 ,Wake-up Status for USIM Port 1 from D3 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 19. " WSUSIM0 ,Wake-up Status for USIM Port 0 from D3 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 16. " WS_OTG ,Wake-up Status for a Rising Edge from USBOTG Port from D3 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 15. " WS_GENERIC13 ,Wake-up Status for generic event inputs from D3 to D0 State 13" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 14. " WS_GENERIC12 ,Wake-up Status for generic event inputs from D3 to D0 State 12" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 13. " WS_GENERIC11 ,Wake-up Status for generic event inputs from D3 to D0 State 11" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 12. " WS_GENERIC10 ,Wake-up Status for generic event inputs from D3 to D0 State 10" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 11. " WS_GENERIC9 ,Wake-up Status for generic event inputs from D3 to D0 State 9" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 10. " WS_GENERIC8 ,Wake-up Status for generic event inputs from D3 to D0 State 8" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 9. " WS_GENERIC7 ,Wake-up Status for generic event inputs from D3 to D0 State 7" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 8. " WS_GENERIC6 ,Wake-up Status for generic event inputs from D3 to D0 State 6" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 7. " WS_GENERIC5 ,Wake-up Status for generic event inputs from D3 to D0 State 5" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 6. " WS_GENERIC4 ,Wake-up Status for generic event inputs from D3 to D0 State 4" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 5. " WS_GENERIC3 ,Wake-up Status for generic event inputs from D3 to D0 State 3" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 4. " WS_GENERIC2 ,Wake-up Status for generic event inputs from D3 to D0 State 2" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 3. " WS_GENERIC1 ,Wake-up Status for generic event inputs from D3 to D0 State 1" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 2. " WS_GENERIC0 ,Wake-up Status for generic event inputs from D3 to D0 State 0" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 1. " WS_EXTERNAL1 ,Wake-up Status for external event inputs from D3 to D0" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 0. " WS_EXTERNAL0 ,Wake-up Status for external event inputs from D3 to D0" "No wake-up,Wake-up"
|
|
group.long 0x10++3
|
|
line.long 0x00 "AD2D0ER,Application Subsystem D2 to D0 State Wake-up Enable Register"
|
|
bitfld.long 0x00 31. " WERTC ,Wake-up Options for RTC from D2 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " WEOST ,Wake-up Options for OS Timer from D2 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WETSI ,Wake-up Options for Touch Screen Interface from D2 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " WEUSBH ,Wake-up Options for USB Host Port from D2 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WEUSB2 ,Wake-up Options for USB Client 2.0 Port from D2 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " WEMSL0 ,Wake-up Options for a Rising Edge from MSL Port 0 from D2 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " WEDMUX3 ,Wake-up Options for a Rising Edge from USB EDMUX3 Port from D2 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " WEDMUX2 ,Wake-up Options for a Rising Edge from USB EDMUX2 Port from D2 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " WEKP ,Wake-up Options for a Keypad from D2 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WEUSIM1 ,Wake-up Options for USIM Port 1 from D2 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WEUSIM0 ,Wake-up Options for USIM Port 0 from D2 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " WE_OTG ,Wake-up Options for USBOTG Port from D2 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " WE_GENERIC13 ,Wake-up Options for generic event inputs from D2 to D0 State 13" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " WE_GENERIC12 ,Wake-up Options for generic event inputs from D2 to D0 State 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 13. " WE_GENERIC11 ,Wake-up Options for generic event inputs from D2 to D0 State 11" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " WE_GENERIC10 ,Wake-up Options for generic event inputs from D2 to D0 State 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " WE_GENERIC9 ,Wake-up Options for generic event inputs from D2 to D0 State 9" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " WE_GENERIC8 ,Wake-up Options for generic event inputs from D2 to D0 State 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 9. " WE_GENERIC7 ,Wake-up Options for generic event inputs from D2 to D0 State 7" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " WE_GENERIC6 ,Wake-up Options for generic event inputs from D2 to D0 State 6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " WE_GENERIC5 ,Wake-up Options for generic event inputs from D2 to D0 State 5" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " WE_GENERIC4 ,Wake-up Options for generic event inputs from D2 to D0 State 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " WE_GENERIC3 ,Wake-up Options for generic event inputs from D2 to D0 State 3" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " WE_GENERIC2 ,Wake-up Options for generic event inputs from D2 to D0 State 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " WE_GENERIC1 ,Wake-up Options for generic event inputs from D2 to D0 State 1" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " WE_GENERIC0 ,Wake-up Options for generic event inputs from D2 to D0 State 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WE_EXTERNAL1 ,Wake-up for external event inputs from D2 to D0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WE_EXTERNAL0 ,Wake-up for external event inputs from D2 to D0" "Disabled,Enabled"
|
|
group.long 0x14++3
|
|
line.long 0x00 "AD2D0SR,Application Subsystem D2 to D0 State Wake-up Status Register"
|
|
eventfld.long 0x00 31. " WSRTC ,Wake-up Status for RTC from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 30. " WSOST ,Wake-up Status for OS Timer from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 29. " WSTSI ,Wake-up Status for Touch Screen Interface from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 28. " WSUSBH ,Wake-up Status for USB Host Port from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 26. " WSUSB2 ,Wake-up Status for USB Client 2.0 Port from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 24. " WSMSL0 ,Wake-up Status for a Rising Edge from MSL Port 0 from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 23. " WSDMUX3 ,Wake-up Status for a Rising Edge from USB EDMUX3 Port from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 22. " WSDMUX2 ,Wake-up Status for a Rising Edge from USB EDMUX2 Port from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 21. " WSKP ,Wake-up Status for a Keypad from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 20. " WSUSIM1 ,Wake-up Status for USIM Port 1 from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 19. " WSUSIM0 ,Wake-up Status for USIM Port 0 from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 16. " WS_OTG ,Wake-up Status for USBOTG Port from D2 to D0 " "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 15. " WS_GENERIC13 ,Wake-up Status for generic event inputs from D2 to D0 State 13" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 14. " WS_GENERIC12 ,Wake-up Status for generic event inputs from D2 to D0 State 12" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 13. " WS_GENERIC11 ,Wake-up Status for generic event inputs from D2 to D0 State 11" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 12. " WS_GENERIC10 ,Wake-up Status for generic event inputs from D2 to D0 State 10" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 11. " WS_GENERIC9 ,Wake-up Status for generic event inputs from D2 to D0 State 9" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 10. " WS_GENERIC8 ,Wake-up Status for generic event inputs from D2 to D0 State 8" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 9. " WS_GENERIC7 ,Wake-up Status for generic event inputs from D2 to D0 State 7" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 8. " WS_GENERIC6 ,Wake-up Status for generic event inputs from D2 to D0 State 6" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 7. " WS_GENERIC5 ,Wake-up Status for generic event inputs from D2 to D0 State 5" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 6. " WS_GENERIC4 ,Wake-up Status for generic event inputs from D2 to D0 State 4" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 5. " WS_GENERIC3 ,Wake-up Status for generic event inputs from D2 to D0 State 3" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 4. " WS_GENERIC2 ,Wake-up Status for generic event inputs from D2 to D0 State 2" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 3. " WS_GENERIC1 ,Wake-up Status for generic event inputs from D2 to D0 State 1" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 2. " WS_GENERIC0 ,Wake-up Status for generic event inputs from D2 to D0 State 0" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 1. " WS_EXTERNAL1 ,Wake-up Status for external event inputs from D2 to D0" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 0. " WS_EXTERNAL0 ,Wake-up Status for external event inputs from D2 to D0" "No wake-up,Wake-up"
|
|
group.long 0x18++3
|
|
line.long 0x00 "AD2D1ER,Application Subsystem D2 to D1 State Wake-up Enable Register"
|
|
bitfld.long 0x00 31. " WERTC ,Wake-up options for RTC from D2 to D1 State" "Disabled,Enabled"
|
|
group.long 0x1c++3
|
|
line.long 0x00 "AD2D1SR,Application Subsystem D2 to D1 State Wake-up Status Register"
|
|
eventfld.long 0x00 31. " WSRTC ,Wake-up Status for RTC from D2 to D1 State" "No wake-up,Wake-up"
|
|
group.long 0x20++3
|
|
line.long 0x00 "AD1D0ER,Application Subsystem D1 to D0 State Wake-up Enable Register"
|
|
bitfld.long 0x00 31. " WERTC ,Wake-up Options for RTC from D1 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " WEOST ,Wake-up Options for OS Timer from D1 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WETSI ,Wake-up Options for Touch Screen Interface from D1 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " WEUSBH ,Wake-up Options for USB Host Port from D1 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WEUSB2 ,Wake-up Options for USB Client 2.0 Port from D1 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " WEMSL0 ,Wake-up Options for a Rising Edge from MSL Port 0 from D1 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " WEDMUX3 ,Wake-up Options for a Rising Edge from USB EDMUX3 Port from D1 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " WEDMUX2 ,Wake-up Options for a Rising Edge from USB EDMUX2 Port from D1 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " WEKP ,Wake-up Options for a Keypad from D1 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WEUSIM1 ,Wake-up Options for USIM Port 1 from D1 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WEUSIM0 ,Wake-up Options for USIM Port 0 from D1 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " WEMLCD ,Wake-up Options for mini-LCD from D1 to D0 State" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " WE_OTG ,Wake-up Options for USBOTG Port from D1 to D0 State" "Disabled,Enabled"
|
|
bitfld.long 0x0 15. " WE_GENERIC13 ,Wake-up Options for generic event inputs from D1 to D0 State 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 14. " WE_GENERIC12 ,Wake-up Options for generic event inputs from D1 to D0 State 12" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " WE_GENERIC11 ,Wake-up Options for generic event inputs from D1 to D0 State 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " WE_GENERIC10 ,Wake-up Options for generic event inputs from D1 to D0 State 10" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " WE_GENERIC9 ,Wake-up Options for generic event inputs from D1 to D0 State 9" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " WE_GENERIC8 ,Wake-up Options for generic event inputs from D1 to D0 State 8" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " WE_GENERIC7 ,Wake-up Options for generic event inputs from D1 to D0 State 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 8. " WE_GENERIC6 ,Wake-up Options for generic event inputs from D1 to D0 State 6" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " WE_GENERIC5 ,Wake-up Options for generic event inputs from D1 to D0 State 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " WE_GENERIC4 ,Wake-up Options for generic event inputs from D1 to D0 State 4" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " WE_GENERIC3 ,Wake-up Options for generic event inputs from D1 to D0 State 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " WE_GENERIC2 ,Wake-up Options for generic event inputs from D1 to D0 State 2" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " WE_GENERIC1 ,Wake-up Options for generic event inputs from D1 to D0 State 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " WE_GENERIC0 ,Wake-up Options for generic event inputs from D1 to D0 State 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WE_EXTERNAL1 ,Wake-up for external event inputs from D1 to D0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WE_EXTERNAL0 ,Wake-up for external event inputs from D1 to D0" "Disabled,Enabled"
|
|
group.long 0x24++3
|
|
line.long 0x00 "AD1D0SR,Application Subsystem D1 to D0 State Wake-up Status Register"
|
|
eventfld.long 0x00 31. " WSRTC ,Wake-up Status for RTC from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 30. " WSOST ,Wake-up Status for OS Timer from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 29. " WSTSI ,Wake-up Status for Touch Screen Interface from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 28. " WSUSBH ,Wake-up Status for USB Host Port from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 26. " WSUSB2 ,Wake-up Status for USB Client 2.0 Port from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 24. " WSMSL0 ,Wake-up Status for a Rising Edge from MSL Port 0 from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 23. " WSDMUX3 ,Wake-up Status for a Rising Edge from USB EDMUX3 Port from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 22. " WSDMUX2 ,Wake-up Status for a Rising Edge from USB EDMUX2 Port from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 21. " WSKP ,Wake-up Status for a Keypad from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 20. " WSUSIM1 ,Wake-up Status for USIM Port 1 from D2 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 19. " WSUSIM0 ,Wake-up Status for USIM Port 0 from D2 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 18. " WSMLCD ,Wake-up Status for mini-LCD from D1 to D0 State" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 16. " WS_OTG ,Wake-up Status for USBOTG Port from D1 to D0 State" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 15. " WS_GENERIC13 ,Wake-up Status for generic event inputs from D2 to D0 State 13" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 14. " WS_GENERIC12 ,Wake-up Status for generic event inputs from D2 to D0 State 12" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 13. " WS_GENERIC11 ,Wake-up Status for generic event inputs from D2 to D0 State 11" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 12. " WS_GENERIC10 ,Wake-up Status for generic event inputs from D2 to D0 State 10" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 11. " WS_GENERIC9 ,Wake-up Status for generic event inputs from D2 to D0 State 9" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 10. " WS_GENERIC8 ,Wake-up Status for generic event inputs from D2 to D0 State 8" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 9. " WS_GENERIC7 ,Wake-up Status for generic event inputs from D2 to D0 State 7" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 8. " WS_GENERIC6 ,Wake-up Status for generic event inputs from D2 to D0 State 6" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 7. " WS_GENERIC5 ,Wake-up Status for generic event inputs from D2 to D0 State 5" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 6. " WS_GENERIC4 ,Wake-up Status for generic event inputs from D2 to D0 State 4" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 5. " WS_GENERIC3 ,Wake-up Status for generic event inputs from D2 to D0 State 3" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 4. " WS_GENERIC2 ,Wake-up Status for generic event inputs from D2 to D0 State 2" "No wake-up,Wake-up"
|
|
eventfld.long 0x0 3. " WS_GENERIC1 ,Wake-up Status for generic event inputs from D2 to D0 State 1" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x0 2. " WS_GENERIC0 ,Wake-up Status for generic event inputs from D2 to D0 State 0" "No wake-up,Wake-up"
|
|
eventfld.long 0x00 1. " WS_EXTERNAL1 ,Wake-up Status for external event inputs from D2 to D0" "No wake-up,Wake-up"
|
|
textline " "
|
|
eventfld.long 0x00 0. " WS_EXTERNAL0 ,Wake-up Status for external event inputs from D2 to D0" "No wake-up,Wake-up"
|
|
group.long 0x2c++3
|
|
line.long 0x00 "AGENP,Application Subsystem General Purpose Register"
|
|
bitfld.long 0x00 31. " RO_CTRL ,Toggle bit to turn off the RO depending on RO_ST bit" "Ignored,Turned off"
|
|
bitfld.long 0x00 30. " RO_ST ,RO Status" "Turned off,Turned on"
|
|
textline " "
|
|
bitfld.long 0x00 29. " GBPLL_CTRL ,Toggle bit to turn off the GBPLL depending on GBPLL_ST bit" "Ignored,Turned off/on"
|
|
bitfld.long 0x00 28. " GBPLL_DATA ,Turn off/on when GBPLL_CTRL" "Turned off,Turned on"
|
|
group.long 0x30++3
|
|
line.long 0x00 "AD3R,Application Subsystem D3 State Configuration Register"
|
|
bitfld.long 0x00 5. " AD3_R5 ,D3 state unit operation - application subsystem internal SRAM bank 5" "Off,State retained"
|
|
bitfld.long 0x00 4. " AD3_R4 ,D3 state unit operation - application subsystem internal SRAM bank 4" "Off,State retained"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AD3_R3 ,D3 state unit operation - application subsystem internal SRAM bank 3" "Off,State retained"
|
|
bitfld.long 0x00 2. " AD3_R2 ,D3 state unit operation - application subsystem internal SRAM bank 2" "Off,State retained"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AD3_R1 ,D3 state unit operation - application subsystem internal SRAM bank 1" "Off,State retained"
|
|
bitfld.long 0x00 0. " AD3_R0 ,D3 state unit operation - application subsystem internal SRAM bank 0" "Off,State retained"
|
|
group.long 0x34++3
|
|
line.long 0x00 "AD2R,Application Subsystem D2 State Configuration Register"
|
|
bitfld.long 0x00 5. " AD2_R5 ,D2 state unit operation - application subsystem internal SRAM bank 5" "Off,State retained"
|
|
bitfld.long 0x00 4. " AD2_R4 ,D2 state unit operation - application subsystem internal SRAM bank 4" "Off,State retained"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AD2_R3 ,D2 state unit operation - application subsystem internal SRAM bank 3" "Off,State retained"
|
|
bitfld.long 0x00 2. " AD2_R2 ,D2 state unit operation - application subsystem internal SRAM bank 2" "Off,State retained"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AD2_R1 ,D2 state unit operation - application subsystem internal SRAM bank 1" "Off,State retained"
|
|
bitfld.long 0x00 0. " AD2_R0 ,D2 state unit operation - application subsystem internal SRAM bank 0" "Off,State retained"
|
|
group.long 0x38++3
|
|
line.long 0x00 "AD1R,Application Subsystem D1 State Configuration Register"
|
|
bitfld.long 0x00 5. " AD1_R5 ,D1 state unit operation - application subsystem internal SRAM bank 5" "Off,State retained"
|
|
bitfld.long 0x00 4. " AD1_R4 ,D1 state unit operation - application subsystem internal SRAM bank 4" "Off,State retained"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AD1_R3 ,D1 state unit operation - application subsystem internal SRAM bank 3" "Off,State retained"
|
|
bitfld.long 0x00 2. " AD1_R2 ,D1 state unit operation - application subsystem internal SRAM bank 2" "Off,State retained"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AD1_R1 ,D1 state unit operation - application subsystem internal SRAM bank 1" "Off,State retained"
|
|
bitfld.long 0x00 0. " AD1_R0 ,D1 state unit operation - application subsystem internal SRAM bank 0" "Off,State retained"
|
|
width 0xb
|
|
tree.end
|
|
tree "1-Wire Bus Master Interface"
|
|
base ad:0x41B00000
|
|
width 0x8
|
|
group.long 0x00++3
|
|
line.long 0x00 "W1CMDR,1-Wire Command Register"
|
|
bitfld.long 0x00 3. " DQI ,ONE_WIRE Input" "Low,High"
|
|
bitfld.long 0x00 2. " DGO ,ONE_WIRE Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SRA ,Search ROM Accelerator" "Off,On"
|
|
bitfld.long 0x00 0. " 1WR ,ONE_WIRE Reset" "No reset,Reset"
|
|
group.long 0x04++3
|
|
line.long 0x00 "W1TRR,1-Wire Transmit/Receive Buffer"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data ,Transmitted/Received Data"
|
|
hgroup.long 0x08++3
|
|
hide.long 0x00 "W1INTR,1-Wire Interrupt Register"
|
|
in
|
|
group.long 0x0C++3
|
|
line.long 0x00 "W1IER,1-Wire Interrupt Enable Register"
|
|
bitfld.long 0x00 7. " DQOE ,ONE_WIRE Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ERBF ,Enable Receive Buffer Full Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ETMT ,Enable Tx Shift Register Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ETBE ,Enable Transmit Buffer Empty Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EPD ,Enable Presence Detect Interrupt " "Disabled,Enabled"
|
|
group.long 0x10++3
|
|
line.long 0x00 "W1CDR,1-Wire Clock Divisor Register"
|
|
hexmask.long.byte 0x00 0.--4. 1. " DIVISOR ,Divider"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "DMA Controller"
|
|
base ad:0x40000000
|
|
width 0xa
|
|
tree "DMA Control/Status Channel Registers"
|
|
tree "Channel 0"
|
|
group.long 0x0++3
|
|
line.long 0x00 "DCSR0,DMA Control/Status Register for Channel 0"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x4++3
|
|
line.long 0x00 "DCSR1,DMA Control/Status Register for Channel 1"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x8++3
|
|
line.long 0x00 "DCSR2,DMA Control/Status Register for Channel 2"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0xC++3
|
|
line.long 0x00 "DCSR3,DMA Control/Status Register for Channel 3"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long 0x10++3
|
|
line.long 0x00 "DCSR4,DMA Control/Status Register for Channel 4"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long 0x14++3
|
|
line.long 0x00 "DCSR5,DMA Control/Status Register for Channel 5"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long 0x18++3
|
|
line.long 0x00 "DCSR6,DMA Control/Status Register for Channel 6"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "DCSR7,DMA Control/Status Register for Channel 7"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 8"
|
|
group.long 0x20++3
|
|
line.long 0x00 "DCSR8,DMA Control/Status Register for Channel 8"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 9"
|
|
group.long 0x24++3
|
|
line.long 0x00 "DCSR9,DMA Control/Status Register for Channel 9"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 10"
|
|
group.long 0x28++3
|
|
line.long 0x00 "DCSR10,DMA Control/Status Register for Channel 10"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 11"
|
|
group.long 0x2C++3
|
|
line.long 0x00 "DCSR11,DMA Control/Status Register for Channel 11"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 12"
|
|
group.long 0x30++3
|
|
line.long 0x00 "DCSR12,DMA Control/Status Register for Channel 12"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 13"
|
|
group.long 0x34++3
|
|
line.long 0x00 "DCSR13,DMA Control/Status Register for Channel 13"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 14"
|
|
group.long 0x38++3
|
|
line.long 0x00 "DCSR14,DMA Control/Status Register for Channel 14"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 15"
|
|
group.long 0x3C++3
|
|
line.long 0x00 "DCSR15,DMA Control/Status Register for Channel 15"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 16"
|
|
group.long 0x40++3
|
|
line.long 0x00 "DCSR16,DMA Control/Status Register for Channel 16"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 17"
|
|
group.long 0x44++3
|
|
line.long 0x00 "DCSR17,DMA Control/Status Register for Channel 17"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 18"
|
|
group.long 0x48++3
|
|
line.long 0x00 "DCSR18,DMA Control/Status Register for Channel 18"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 19"
|
|
group.long 0x4C++3
|
|
line.long 0x00 "DCSR19,DMA Control/Status Register for Channel 19"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 20"
|
|
group.long 0x50++3
|
|
line.long 0x00 "DCSR20,DMA Control/Status Register for Channel 20"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 21"
|
|
group.long 0x54++3
|
|
line.long 0x00 "DCSR21,DMA Control/Status Register for Channel 21"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 22"
|
|
group.long 0x58++3
|
|
line.long 0x00 "DCSR22,DMA Control/Status Register for Channel 22"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 23"
|
|
group.long 0x5C++3
|
|
line.long 0x00 "DCSR23,DMA Control/Status Register for Channel 23"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 24"
|
|
group.long 0x60++3
|
|
line.long 0x00 "DCSR24,DMA Control/Status Register for Channel 24"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 25"
|
|
group.long 0x64++3
|
|
line.long 0x00 "DCSR25,DMA Control/Status Register for Channel 25"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 26"
|
|
group.long 0x68++3
|
|
line.long 0x00 "DCSR26,DMA Control/Status Register for Channel 26"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 27"
|
|
group.long 0x6C++3
|
|
line.long 0x00 "DCSR27,DMA Control/Status Register for Channel 27"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 28"
|
|
group.long 0x70++3
|
|
line.long 0x00 "DCSR28,DMA Control/Status Register for Channel 28"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 29"
|
|
group.long 0x74++3
|
|
line.long 0x00 "DCSR29,DMA Control/Status Register for Channel 29"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 30"
|
|
group.long 0x78++3
|
|
line.long 0x00 "DCSR30,DMA Control/Status Register for Channel 30"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Channel 31"
|
|
group.long 0x7C++3
|
|
line.long 0x00 "DCSR31,DMA Control/Status Register for Channel 31"
|
|
bitfld.long 0x00 31. " RUN ,Channel Run" "Stopped,Started"
|
|
bitfld.long 0x00 30. " NODESCFETCH ,No-Descriptor Fetch" "Descriptor-fetch,No-descriptor-fetch"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EORIRQEN ,Setting the End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor on EOR" "Hold,Jumped"
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETCMPST ,Set Descriptor Compare Status" "No effect,Set"
|
|
bitfld.long 0x00 24. " CLRCMPST ,Clear Descriptor Compare Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RASIRQEN ,Request After Channel Stopped Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " MASKRUN ,Mask DCSR[RUN] during a programmed IO write to the DCSR Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CMPST ,Descriptor Compare Status" "Unsuccessful,Successful"
|
|
eventfld.long 0x00 9. " EORINT ,End of Receive Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " RASINTR ,Request After Channel Stopped" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree.end
|
|
tree "DMA Common Register"
|
|
group.long 0xA0++3
|
|
line.long 0x00 "DALGN,DMA Alignment Register"
|
|
bitfld.long 0x0 31. " DALGN31 ,Alignment Control for Channel 31" "Default,Def by user"
|
|
bitfld.long 0x0 30. " DALGN30 ,Alignment Control for Channel 30" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 29. " DALGN29 ,Alignment Control for Channel 29" "Default,Def by user"
|
|
bitfld.long 0x0 28. " DALGN28 ,Alignment Control for Channel 28" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 27. " DALGN27 ,Alignment Control for Channel 27" "Default,Def by user"
|
|
bitfld.long 0x0 26. " DALGN26 ,Alignment Control for Channel 26" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 25. " DALGN25 ,Alignment Control for Channel 25" "Default,Def by user"
|
|
bitfld.long 0x0 24. " DALGN24 ,Alignment Control for Channel 24" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 23. " DALGN23 ,Alignment Control for Channel 23" "Default,Def by user"
|
|
bitfld.long 0x0 22. " DALGN22 ,Alignment Control for Channel 22" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 21. " DALGN21 ,Alignment Control for Channel 21" "Default,Def by user"
|
|
bitfld.long 0x0 20. " DALGN20 ,Alignment Control for Channel 20" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 19. " DALGN19 ,Alignment Control for Channel 19" "Default,Def by user"
|
|
bitfld.long 0x0 18. " DALGN18 ,Alignment Control for Channel 18" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 17. " DALGN17 ,Alignment Control for Channel 17" "Default,Def by user"
|
|
bitfld.long 0x0 16. " DALGN16 ,Alignment Control for Channel 16" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 15. " DALGN15 ,Alignment Control for Channel 15" "Default,Def by user"
|
|
bitfld.long 0x0 14. " DALGN14 ,Alignment Control for Channel 14" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 13. " DALGN13 ,Alignment Control for Channel 13" "Default,Def by user"
|
|
bitfld.long 0x0 12. " DALGN12 ,Alignment Control for Channel 12" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DALGN11 ,Alignment Control for Channel 11" "Default,Def by user"
|
|
bitfld.long 0x0 10. " DALGN10 ,Alignment Control for Channel 10" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 9. " DALGN9 ,Alignment Control for Channel 9" "Default,Def by user"
|
|
bitfld.long 0x0 8. " DALGN8 ,Alignment Control for Channel 8" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 7. " DALGN7 ,Alignment Control for Channel 7" "Default,Def by user"
|
|
bitfld.long 0x0 6. " DALGN6 ,Alignment Control for Channel 6" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 5. " DALGN5 ,Alignment Control for Channel 5" "Default,Def by user"
|
|
bitfld.long 0x0 4. " DALGN4 ,Alignment Control for Channel 4" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 3. " DALGN3 ,Alignment Control for Channel 3" "Default,Def by user"
|
|
bitfld.long 0x0 2. " DALGN2 ,Alignment Control for Channel 2" "Default,Def by user"
|
|
textline " "
|
|
bitfld.long 0x0 1. " DALGN1 ,Alignment Control for Channel 1" "Default,Def by user"
|
|
bitfld.long 0x0 0. " DALGN0 ,Alignment Control for Channel 0" "Default,Def by user"
|
|
group.long 0xA4++3
|
|
line.long 0x00 "DPCSR,DMA Programmed IO Control Status Register"
|
|
bitfld.long 0x00 31. " BRGSPLIT ,Activate Posted Writes and Split Reads" "De-activated,Activated"
|
|
bitfld.long 0x00 0. " BRGBUSY ,Bridge Busy Status" "Not pending,Pending"
|
|
group.long 0xE0++3
|
|
line.long 0x00 "DRQSR0,DMA DREQ Status Register"
|
|
bitfld.long 0x00 8. " CLR ,Clearing Pending Request" "No effect,Cleared"
|
|
bitfld.long 0x00 0.--4. " REQPEND ,Request Pending Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0xF0++3
|
|
line.long 0x00 "DINT,DMA Interrupt Register"
|
|
bitfld.long 0x0 31. " CHLINTR31 ,Channel 31 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 30. " CHLINTR30 ,Channel 30 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 29. " CHLINTR29 ,Channel 29 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 28. " CHLINTR28 ,Channel 28 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 27. " CHLINTR27 ,Channel 27 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 26. " CHLINTR26 ,Channel 26 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " CHLINTR25 ,Channel 25 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 24. " CHLINTR24 ,Channel 24 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 23. " CHLINTR23 ,Channel 23 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 22. " CHLINTR22 ,Channel 22 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 21. " CHLINTR21 ,Channel 21 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 20. " CHLINTR20 ,Channel 20 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 19. " CHLINTR19 ,Channel 19 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 18. " CHLINTR18 ,Channel 18 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 17. " CHLINTR17 ,Channel 17 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 16. " CHLINTR16 ,Channel 16 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 15. " CHLINTR15 ,Channel 15 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 14. " CHLINTR14 ,Channel 14 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " CHLINTR13 ,Channel 13 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " CHLINTR12 ,Channel 12 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " CHLINTR11 ,Channel 11 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " CHLINTR10 ,Channel 10 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " CHLINTR9 ,Channel 9 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " CHLINTR8 ,Channel 8 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " CHLINTR7 ,Channel 7 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " CHLINTR6 ,Channel 6 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CHLINTR5 ,Channel 5 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " CHLINTR4 ,Channel 4 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CHLINTR3 ,Channel 3 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " CHLINTR2 ,Channel 2 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CHLINTR1 ,Channel 1 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " CHLINTR0 ,Channel 0 Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "Request to Channel Map Registers"
|
|
group.long 0x100++3
|
|
line.long 0x00 "DRCMR0,Request to Channel Map Register for DREQ"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x108++3
|
|
line.long 0x00 "DRCMR2,Request to Channel Map Register for SSP4 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x10c++3
|
|
line.long 0x00 "DRCMR3,Request to Channel Map Register for SSP4 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x110++3
|
|
line.long 0x00 "DRCMR4,Request to Channel Map Register for UART2 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x114++3
|
|
line.long 0x00 "DRCMR5,Request to Channel Map Register for UART2 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x118++3
|
|
line.long 0x00 "DRCMR6,Request to Channel Map Register for UART1 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x11c++3
|
|
line.long 0x00 "DRCMR7,Request to Channel Map Register for UART1 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x120++3
|
|
line.long 0x00 "DRCMR8,Request to Channel Map Register for AC97 Microphone Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x124++3
|
|
line.long 0x00 "DRCMR9,Request to Channel Map Register for AC97 Modem Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x128++3
|
|
line.long 0x00 "DRCMR10,Request to Channel Map Register for AC97 Modem Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x12c++3
|
|
line.long 0x00 "DRCMR11,Request to Channel Map Register for AC97 Audio Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x130++3
|
|
line.long 0x00 "DRCMR12,Request to Channel Map Register for AC97 Audio Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x134++3
|
|
line.long 0x00 "DRCMR13,Request to Channel Map Register for SSP1 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x138++3
|
|
line.long 0x00 "DRCMR14,Request to Channel Map Register for SSP1 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x13c++3
|
|
line.long 0x00 "DRCMR15,Request to Channel Map Register for SSP2 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x140++3
|
|
line.long 0x00 "DRCMR16,Request to Channel Map Register for SSP2 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x14c++3
|
|
line.long 0x00 "DRCMR19,Request to Channel Map Register for UART3 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x150++3
|
|
line.long 0x00 "DRCMR20,Request to Channel Map Register for UART3 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x154++3
|
|
line.long 0x00 "DRCMR21,Request to Channel Map Register for MMC/SDIO Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x158++3
|
|
line.long 0x00 "DRCMR22,Request to Channel Map Register for MMC/SDIO Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x160++3
|
|
line.long 0x00 "DRCMR24,Request to Channel Map Register for USB Endpoint 0 Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x164++3
|
|
line.long 0x00 "DRCMR25,Request to Channel Map Register for USB Endpoint A Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x168++3
|
|
line.long 0x00 "DRCMR26,Request to Channel Map Register for USB Endpoint B Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x16C++3
|
|
line.long 0x00 "DRCMR27,Request to Channel Map Register for USB Endpoint C Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x170++3
|
|
line.long 0x00 "DRCMR28,Request to Channel Map Register for USB Endpoint D Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x174++3
|
|
line.long 0x00 "DRCMR29,Request to Channel Map Register for USB Endpoint E Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x178++3
|
|
line.long 0x00 "DRCMR30,Request to Channel Map Register for USB Endpoint F Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x17C++3
|
|
line.long 0x00 "DRCMR31,Request to Channel Map Register for USB Endpoint G Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x180++3
|
|
line.long 0x00 "DRCMR32,Request to Channel Map Register for USB Endpoint H Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x184++3
|
|
line.long 0x00 "DRCMR33,Request to Channel Map Register for USB Endpoint I Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x188++3
|
|
line.long 0x00 "DRCMR34,Request to Channel Map Register for USB Endpoint J Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x18C++3
|
|
line.long 0x00 "DRCMR35,Request to Channel Map Register for USB Endpoint K Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x190++3
|
|
line.long 0x00 "DRCMR36,Request to Channel Map Register for USB Endpoint L Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x194++3
|
|
line.long 0x00 "DRCMR37,Request to Channel Map Register for USB Endpoint M Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x198++3
|
|
line.long 0x00 "DRCMR38,Request to Channel Map Register for USB Endpoint N Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x19C++3
|
|
line.long 0x00 "DRCMR39,Request to Channel Map Register for USB Endpoint P Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1A0++3
|
|
line.long 0x00 "DRCMR40,Request to Channel Map Register for USB Endpoint Q Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1A4++3
|
|
line.long 0x00 "DRCMR41,Request to Channel Map Register for USB Endpoint R Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1A8++3
|
|
line.long 0x00 "DRCMR42,Request to Channel Map Register for USB Endpoint S Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1AC++3
|
|
line.long 0x00 "DRCMR43,Request to Channel Map Register for USB Endpoint T Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1B0++3
|
|
line.long 0x00 "DRCMR44,Request to Channel Map Register for USB Endpoint U Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1B4++3
|
|
line.long 0x00 "DRCMR45,Request to Channel Map Register for USB Endpoint V Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1B8++3
|
|
line.long 0x00 "DRCMR46,Request to Channel Map Register for USB Endpoint W Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1BC++3
|
|
line.long 0x00 "DRCMR47,Request to Channel Map Register for USB Endpoint X Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1c0++3
|
|
line.long 0x00 "DRCMR48,Request to Channel Map Register for MSL Receive Request 1"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1c4++3
|
|
line.long 0x00 "DRCMR49,Request to Channel Map Register for MSL Transmit Request 1"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1c8++3
|
|
line.long 0x00 "DRCMR50,Request to Channel Map Register for MSL Receive Request 2"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1cc++3
|
|
line.long 0x00 "DRCMR51,Request to Channel Map Register for MSL Transmit Request 2"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1D0++3
|
|
line.long 0x00 "DRCMR52,Request to Channel Map Register for MSL Receive Request 3"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1D4++3
|
|
line.long 0x00 "DRCMR53,Request to Channel Map Register for MSL Transmit Request 3"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1D8++3
|
|
line.long 0x00 "DRCMR54,Request to Channel Map Register for MSL Receive Request 4"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1Dc++3
|
|
line.long 0x00 "DRCMR55,Request to Channel Map Register for MSL Transmit Request 4"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1E0++3
|
|
line.long 0x00 "DRCMR56,Request to Channel Map Register for MSL Receive Request 5"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1E4++3
|
|
line.long 0x00 "DRCMR57,Request to Channel Map Register for MSL Transmit Request 5"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1E8++3
|
|
line.long 0x00 "DRCMR58,Request to Channel Map Register for MSL Receive Request 6"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1EC++3
|
|
line.long 0x00 "DRCMR59,Request to Channel Map Register for MSL Transmit Request 6"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1F0++3
|
|
line.long 0x00 "DRCMR60,Request to Channel Map Register for MSL Receive Request 7"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1F4++3
|
|
line.long 0x00 "DRCMR61,Request to Channel Map Register for MSL Transmit Request 7"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1F8++3
|
|
line.long 0x00 "DRCMR62,Request to Channel Map Register for USIM 1 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1Fc++3
|
|
line.long 0x00 "DRCMR63,Request to Channel Map Register for USIM 1 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1108++3
|
|
line.long 0x00 "DRCMR66,Request to Channel Map Register for SSP3 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x110C++3
|
|
line.long 0x00 "DRCMR67,Request to Channel Map Register for SSP3 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x116C++3
|
|
line.long 0x00 "DRCMR91,Request to Channel Map Register for USIM 2 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1170++3
|
|
line.long 0x00 "DRCMR92,Request to Channel Map Register for USIM 2 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1174++3
|
|
line.long 0x00 "DRCMR93,Request to Channel Map Register for MMC/SDIO 2 Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1178++3
|
|
line.long 0x00 "DRCMR94,Request to Channel Map Register for MMC/SDIO 2 Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x117C++3
|
|
line.long 0x00 "DRCMR95,Request to Channel Map Register for AC97 Surround Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1180++3
|
|
line.long 0x00 "DRCMR96,Request to Channel Map Register for AC97 centre/LFE Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1184++3
|
|
line.long 0x00 "DRCMR97,Request to Channel Map Register for NAND Interface Data Transmit and Receive Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x118C++3
|
|
line.long 0x00 "DRCMR99,Request to Channel Map Register for NAND Interface Command Transmit Request"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel" "Unmapped,Mapped"
|
|
bitfld.long 0x00 0.--4. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "DMA Address Channel Registers"
|
|
tree "Channel 0"
|
|
group.long 0x200++3
|
|
line.long 0x00 "DDADR0,DMA Descriptor Address Register Channel 0"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x200+0x4)++3
|
|
line.long 0x00 "DSADR0,DMA Source Address Register Channel 0"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x200+0x8)++3
|
|
line.long 0x00 "DTADR0,DMA Target Address Register Channel 0"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x200+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x200+0xc)++3
|
|
line.long 0x00 "DCMD0,DMA Command Address Register Channel 0"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x200+0xc)++3
|
|
line.long 0x00 "DCMD0,DMA Command Address Register Channel 0"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x210++3
|
|
line.long 0x00 "DDADR1,DMA Descriptor Address Register Channel 1"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x210+0x4)++3
|
|
line.long 0x00 "DSADR1,DMA Source Address Register Channel 1"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x210+0x8)++3
|
|
line.long 0x00 "DTADR1,DMA Target Address Register Channel 1"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x210+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x210+0xc)++3
|
|
line.long 0x00 "DCMD1,DMA Command Address Register Channel 1"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x210+0xc)++3
|
|
line.long 0x00 "DCMD1,DMA Command Address Register Channel 1"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x220++3
|
|
line.long 0x00 "DDADR2,DMA Descriptor Address Register Channel 2"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x220+0x4)++3
|
|
line.long 0x00 "DSADR2,DMA Source Address Register Channel 2"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x220+0x8)++3
|
|
line.long 0x00 "DTADR2,DMA Target Address Register Channel 2"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x220+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x220+0xc)++3
|
|
line.long 0x00 "DCMD2,DMA Command Address Register Channel 2"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x220+0xc)++3
|
|
line.long 0x00 "DCMD2,DMA Command Address Register Channel 2"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0x230++3
|
|
line.long 0x00 "DDADR3,DMA Descriptor Address Register Channel 3"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x230+0x4)++3
|
|
line.long 0x00 "DSADR3,DMA Source Address Register Channel 3"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x230+0x8)++3
|
|
line.long 0x00 "DTADR3,DMA Target Address Register Channel 3"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x230+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x230+0xc)++3
|
|
line.long 0x00 "DCMD3,DMA Command Address Register Channel 3"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x230+0xc)++3
|
|
line.long 0x00 "DCMD3,DMA Command Address Register Channel 3"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long 0x240++3
|
|
line.long 0x00 "DDADR4,DMA Descriptor Address Register Channel 4"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x240+0x4)++3
|
|
line.long 0x00 "DSADR4,DMA Source Address Register Channel 4"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x240+0x8)++3
|
|
line.long 0x00 "DTADR4,DMA Target Address Register Channel 4"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x240+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x240+0xc)++3
|
|
line.long 0x00 "DCMD4,DMA Command Address Register Channel 4"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x240+0xc)++3
|
|
line.long 0x00 "DCMD4,DMA Command Address Register Channel 4"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long 0x250++3
|
|
line.long 0x00 "DDADR5,DMA Descriptor Address Register Channel 5"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x250+0x4)++3
|
|
line.long 0x00 "DSADR5,DMA Source Address Register Channel 5"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x250+0x8)++3
|
|
line.long 0x00 "DTADR5,DMA Target Address Register Channel 5"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x250+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x250+0xc)++3
|
|
line.long 0x00 "DCMD5,DMA Command Address Register Channel 5"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x250+0xc)++3
|
|
line.long 0x00 "DCMD5,DMA Command Address Register Channel 5"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long 0x260++3
|
|
line.long 0x00 "DDADR6,DMA Descriptor Address Register Channel 6"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x260+0x4)++3
|
|
line.long 0x00 "DSADR6,DMA Source Address Register Channel 6"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x260+0x8)++3
|
|
line.long 0x00 "DTADR6,DMA Target Address Register Channel 6"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x260+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x260+0xc)++3
|
|
line.long 0x00 "DCMD6,DMA Command Address Register Channel 6"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x260+0xc)++3
|
|
line.long 0x00 "DCMD6,DMA Command Address Register Channel 6"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long 0x270++3
|
|
line.long 0x00 "DDADR7,DMA Descriptor Address Register Channel 7"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x270+0x4)++3
|
|
line.long 0x00 "DSADR7,DMA Source Address Register Channel 7"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x270+0x8)++3
|
|
line.long 0x00 "DTADR7,DMA Target Address Register Channel 7"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x270+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x270+0xc)++3
|
|
line.long 0x00 "DCMD7,DMA Command Address Register Channel 7"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x270+0xc)++3
|
|
line.long 0x00 "DCMD7,DMA Command Address Register Channel 7"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 8"
|
|
group.long 0x280++3
|
|
line.long 0x00 "DDADR8,DMA Descriptor Address Register Channel 8"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x280+0x4)++3
|
|
line.long 0x00 "DSADR8,DMA Source Address Register Channel 8"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x280+0x8)++3
|
|
line.long 0x00 "DTADR8,DMA Target Address Register Channel 8"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x280+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x280+0xc)++3
|
|
line.long 0x00 "DCMD8,DMA Command Address Register Channel 8"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x280+0xc)++3
|
|
line.long 0x00 "DCMD8,DMA Command Address Register Channel 8"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 9"
|
|
group.long 0x290++3
|
|
line.long 0x00 "DDADR9,DMA Descriptor Address Register Channel 9"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x290+0x4)++3
|
|
line.long 0x00 "DSADR9,DMA Source Address Register Channel 9"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x290+0x8)++3
|
|
line.long 0x00 "DTADR9,DMA Target Address Register Channel 9"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x290+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x290+0xc)++3
|
|
line.long 0x00 "DCMD9,DMA Command Address Register Channel 9"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x290+0xc)++3
|
|
line.long 0x00 "DCMD9,DMA Command Address Register Channel 9"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 10"
|
|
group.long 0x2A0++3
|
|
line.long 0x00 "DDADR10,DMA Descriptor Address Register Channel 10"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x2A0+0x4)++3
|
|
line.long 0x00 "DSADR10,DMA Source Address Register Channel 10"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x2A0+0x8)++3
|
|
line.long 0x00 "DTADR10,DMA Target Address Register Channel 10"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x2A0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x2A0+0xc)++3
|
|
line.long 0x00 "DCMD10,DMA Command Address Register Channel 10"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x2A0+0xc)++3
|
|
line.long 0x00 "DCMD10,DMA Command Address Register Channel 10"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 11"
|
|
group.long 0x2B0++3
|
|
line.long 0x00 "DDADR11,DMA Descriptor Address Register Channel 11"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x2B0+0x4)++3
|
|
line.long 0x00 "DSADR11,DMA Source Address Register Channel 11"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x2B0+0x8)++3
|
|
line.long 0x00 "DTADR11,DMA Target Address Register Channel 11"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x2B0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x2B0+0xc)++3
|
|
line.long 0x00 "DCMD11,DMA Command Address Register Channel 11"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x2B0+0xc)++3
|
|
line.long 0x00 "DCMD11,DMA Command Address Register Channel 11"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 12"
|
|
group.long 0x2C0++3
|
|
line.long 0x00 "DDADR12,DMA Descriptor Address Register Channel 12"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x2C0+0x4)++3
|
|
line.long 0x00 "DSADR12,DMA Source Address Register Channel 12"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x2C0+0x8)++3
|
|
line.long 0x00 "DTADR12,DMA Target Address Register Channel 12"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x2C0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x2C0+0xc)++3
|
|
line.long 0x00 "DCMD12,DMA Command Address Register Channel 12"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x2C0+0xc)++3
|
|
line.long 0x00 "DCMD12,DMA Command Address Register Channel 12"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 13"
|
|
group.long 0x2D0++3
|
|
line.long 0x00 "DDADR13,DMA Descriptor Address Register Channel 13"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x2D0+0x4)++3
|
|
line.long 0x00 "DSADR13,DMA Source Address Register Channel 13"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x2D0+0x8)++3
|
|
line.long 0x00 "DTADR13,DMA Target Address Register Channel 13"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x2D0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x2D0+0xc)++3
|
|
line.long 0x00 "DCMD13,DMA Command Address Register Channel 13"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x2D0+0xc)++3
|
|
line.long 0x00 "DCMD13,DMA Command Address Register Channel 13"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 14"
|
|
group.long 0x2E0++3
|
|
line.long 0x00 "DDADR14,DMA Descriptor Address Register Channel 14"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x2E0+0x4)++3
|
|
line.long 0x00 "DSADR14,DMA Source Address Register Channel 14"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x2E0+0x8)++3
|
|
line.long 0x00 "DTADR14,DMA Target Address Register Channel 14"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x2E0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x2E0+0xc)++3
|
|
line.long 0x00 "DCMD14,DMA Command Address Register Channel 14"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x2E0+0xc)++3
|
|
line.long 0x00 "DCMD14,DMA Command Address Register Channel 14"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 15"
|
|
group.long 0x2F0++3
|
|
line.long 0x00 "DDADR15,DMA Descriptor Address Register Channel 15"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x2F0+0x4)++3
|
|
line.long 0x00 "DSADR15,DMA Source Address Register Channel 15"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x2F0+0x8)++3
|
|
line.long 0x00 "DTADR15,DMA Target Address Register Channel 15"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x2F0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x2F0+0xc)++3
|
|
line.long 0x00 "DCMD15,DMA Command Address Register Channel 15"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x2F0+0xc)++3
|
|
line.long 0x00 "DCMD15,DMA Command Address Register Channel 15"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 16"
|
|
group.long 0x300++3
|
|
line.long 0x00 "DDADR16,DMA Descriptor Address Register Channel 16"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x300+0x4)++3
|
|
line.long 0x00 "DSADR16,DMA Source Address Register Channel 16"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x300+0x8)++3
|
|
line.long 0x00 "DTADR16,DMA Target Address Register Channel 16"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x300+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x300+0xc)++3
|
|
line.long 0x00 "DCMD16,DMA Command Address Register Channel 16"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x300+0xc)++3
|
|
line.long 0x00 "DCMD16,DMA Command Address Register Channel 16"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 17"
|
|
group.long 0x310++3
|
|
line.long 0x00 "DDADR17,DMA Descriptor Address Register Channel 17"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x310+0x4)++3
|
|
line.long 0x00 "DSADR17,DMA Source Address Register Channel 17"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x310+0x8)++3
|
|
line.long 0x00 "DTADR17,DMA Target Address Register Channel 17"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x310+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x310+0xc)++3
|
|
line.long 0x00 "DCMD17,DMA Command Address Register Channel 17"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x310+0xc)++3
|
|
line.long 0x00 "DCMD17,DMA Command Address Register Channel 17"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 18"
|
|
group.long 0x320++3
|
|
line.long 0x00 "DDADR18,DMA Descriptor Address Register Channel 18"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x320+0x4)++3
|
|
line.long 0x00 "DSADR18,DMA Source Address Register Channel 18"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x320+0x8)++3
|
|
line.long 0x00 "DTADR18,DMA Target Address Register Channel 18"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x320+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x320+0xc)++3
|
|
line.long 0x00 "DCMD18,DMA Command Address Register Channel 18"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x320+0xc)++3
|
|
line.long 0x00 "DCMD18,DMA Command Address Register Channel 18"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 19"
|
|
group.long 0x330++3
|
|
line.long 0x00 "DDADR19,DMA Descriptor Address Register Channel 19"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x330+0x4)++3
|
|
line.long 0x00 "DSADR19,DMA Source Address Register Channel 19"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x330+0x8)++3
|
|
line.long 0x00 "DTADR19,DMA Target Address Register Channel 19"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x330+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x330+0xc)++3
|
|
line.long 0x00 "DCMD19,DMA Command Address Register Channel 19"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x330+0xc)++3
|
|
line.long 0x00 "DCMD19,DMA Command Address Register Channel 19"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 20"
|
|
group.long 0x340++3
|
|
line.long 0x00 "DDADR20,DMA Descriptor Address Register Channel 20"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x340+0x4)++3
|
|
line.long 0x00 "DSADR20,DMA Source Address Register Channel 20"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x340+0x8)++3
|
|
line.long 0x00 "DTADR20,DMA Target Address Register Channel 20"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x340+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x340+0xc)++3
|
|
line.long 0x00 "DCMD20,DMA Command Address Register Channel 20"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x340+0xc)++3
|
|
line.long 0x00 "DCMD20,DMA Command Address Register Channel 20"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 21"
|
|
group.long 0x350++3
|
|
line.long 0x00 "DDADR21,DMA Descriptor Address Register Channel 21"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x350+0x4)++3
|
|
line.long 0x00 "DSADR21,DMA Source Address Register Channel 21"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x350+0x8)++3
|
|
line.long 0x00 "DTADR21,DMA Target Address Register Channel 21"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x350+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x350+0xc)++3
|
|
line.long 0x00 "DCMD21,DMA Command Address Register Channel 21"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x350+0xc)++3
|
|
line.long 0x00 "DCMD21,DMA Command Address Register Channel 21"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 22"
|
|
group.long 0x360++3
|
|
line.long 0x00 "DDADR22,DMA Descriptor Address Register Channel 22"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x360+0x4)++3
|
|
line.long 0x00 "DSADR22,DMA Source Address Register Channel 22"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x360+0x8)++3
|
|
line.long 0x00 "DTADR22,DMA Target Address Register Channel 22"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x360+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x360+0xc)++3
|
|
line.long 0x00 "DCMD22,DMA Command Address Register Channel 22"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x360+0xc)++3
|
|
line.long 0x00 "DCMD22,DMA Command Address Register Channel 22"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 23"
|
|
group.long 0x370++3
|
|
line.long 0x00 "DDADR23,DMA Descriptor Address Register Channel 23"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x370+0x4)++3
|
|
line.long 0x00 "DSADR23,DMA Source Address Register Channel 23"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x370+0x8)++3
|
|
line.long 0x00 "DTADR23,DMA Target Address Register Channel 23"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x370+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x370+0xc)++3
|
|
line.long 0x00 "DCMD23,DMA Command Address Register Channel 23"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x370+0xc)++3
|
|
line.long 0x00 "DCMD23,DMA Command Address Register Channel 23"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 24"
|
|
group.long 0x380++3
|
|
line.long 0x00 "DDADR24,DMA Descriptor Address Register Channel 24"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x380+0x4)++3
|
|
line.long 0x00 "DSADR24,DMA Source Address Register Channel 24"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x380+0x8)++3
|
|
line.long 0x00 "DTADR24,DMA Target Address Register Channel 24"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x380+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x380+0xc)++3
|
|
line.long 0x00 "DCMD24,DMA Command Address Register Channel 24"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x380+0xc)++3
|
|
line.long 0x00 "DCMD24,DMA Command Address Register Channel 24"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 25"
|
|
group.long 0x390++3
|
|
line.long 0x00 "DDADR25,DMA Descriptor Address Register Channel 25"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x390+0x4)++3
|
|
line.long 0x00 "DSADR25,DMA Source Address Register Channel 25"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x390+0x8)++3
|
|
line.long 0x00 "DTADR25,DMA Target Address Register Channel 25"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x390+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x390+0xc)++3
|
|
line.long 0x00 "DCMD25,DMA Command Address Register Channel 25"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x390+0xc)++3
|
|
line.long 0x00 "DCMD25,DMA Command Address Register Channel 25"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 26"
|
|
group.long 0x3A0++3
|
|
line.long 0x00 "DDADR26,DMA Descriptor Address Register Channel 26"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x3A0+0x4)++3
|
|
line.long 0x00 "DSADR26,DMA Source Address Register Channel 26"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x3A0+0x8)++3
|
|
line.long 0x00 "DTADR26,DMA Target Address Register Channel 26"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x3A0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x3A0+0xc)++3
|
|
line.long 0x00 "DCMD26,DMA Command Address Register Channel 26"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x3A0+0xc)++3
|
|
line.long 0x00 "DCMD26,DMA Command Address Register Channel 26"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 27"
|
|
group.long 0x3B0++3
|
|
line.long 0x00 "DDADR27,DMA Descriptor Address Register Channel 27"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x3B0+0x4)++3
|
|
line.long 0x00 "DSADR27,DMA Source Address Register Channel 27"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x3B0+0x8)++3
|
|
line.long 0x00 "DTADR27,DMA Target Address Register Channel 27"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x3B0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x3B0+0xc)++3
|
|
line.long 0x00 "DCMD27,DMA Command Address Register Channel 27"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x3B0+0xc)++3
|
|
line.long 0x00 "DCMD27,DMA Command Address Register Channel 27"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 28"
|
|
group.long 0x3C0++3
|
|
line.long 0x00 "DDADR28,DMA Descriptor Address Register Channel 28"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x3C0+0x4)++3
|
|
line.long 0x00 "DSADR28,DMA Source Address Register Channel 28"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x3C0+0x8)++3
|
|
line.long 0x00 "DTADR28,DMA Target Address Register Channel 28"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x3C0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x3C0+0xc)++3
|
|
line.long 0x00 "DCMD28,DMA Command Address Register Channel 28"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x3C0+0xc)++3
|
|
line.long 0x00 "DCMD28,DMA Command Address Register Channel 28"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 29"
|
|
group.long 0x3D0++3
|
|
line.long 0x00 "DDADR29,DMA Descriptor Address Register Channel 29"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x3D0+0x4)++3
|
|
line.long 0x00 "DSADR29,DMA Source Address Register Channel 29"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x3D0+0x8)++3
|
|
line.long 0x00 "DTADR29,DMA Target Address Register Channel 29"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x3D0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x3D0+0xc)++3
|
|
line.long 0x00 "DCMD29,DMA Command Address Register Channel 29"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x3D0+0xc)++3
|
|
line.long 0x00 "DCMD29,DMA Command Address Register Channel 29"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 30"
|
|
group.long 0x3E0++3
|
|
line.long 0x00 "DDADR30,DMA Descriptor Address Register Channel 30"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x3E0+0x4)++3
|
|
line.long 0x00 "DSADR30,DMA Source Address Register Channel 30"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x3E0+0x8)++3
|
|
line.long 0x00 "DTADR30,DMA Target Address Register Channel 30"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x3E0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x3E0+0xc)++3
|
|
line.long 0x00 "DCMD30,DMA Command Address Register Channel 30"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x3E0+0xc)++3
|
|
line.long 0x00 "DCMD30,DMA Command Address Register Channel 30"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree "Channel 31"
|
|
group.long 0x3F0++3
|
|
line.long 0x00 "DDADR31,DMA Descriptor Address Register Channel 31"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
bitfld.long 0x00 1. " BREN ,Enable Descriptor Branch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOP ,Stop" "Running,Stopped"
|
|
group.long (0x3F0+0x4)++3
|
|
line.long 0x00 "DSADR31,DMA Source Address Register Channel 31"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address"
|
|
group.long (0x3F0+0x8)++3
|
|
line.long 0x00 "DTADR31,DMA Target Address Register Channel 31"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address"
|
|
if (((d.l(ad:0x40000000+(0x3F0+0xc)))&0x2000000)==0x2000000)
|
|
group.long (0x3F0+0xc)++3
|
|
line.long 0x00 "DCMD31,DMA Command Address Register Channel 31"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADDRMODE ,Addressing Mode" "Address,Data"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
else
|
|
group.long (0x3F0+0xc)++3
|
|
line.long 0x00 "DCMD31,DMA Command Address Register Channel 31"
|
|
bitfld.long 0x00 31. " INCSRCADDR ,Source Address Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 30. " INCTRGADDR ,Target Address Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLOWSRC ,Source Flow Control" "No wait,Wait"
|
|
bitfld.long 0x00 28. " FLOWTRG ,Target Flow Control" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CMPEN ,Descriptor Compare Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDIRQEN ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " SIZE ,Maximum Burst Size" "Reserved,8B,16B,32B"
|
|
bitfld.long 0x00 14.--15. " WIDTH ,Width of the on-chip peripheral" "Reserved,1B,2B,4B"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " LEN ,Length of the tansfer in bytes"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Interrupt Controller"
|
|
base ad:0x40D00000
|
|
width 0x7
|
|
tree "Interrupt Control Registers"
|
|
rgroup.long 0x00++3
|
|
line.long 0x00 "ICIP,Interrupt Controller IRQ Pending Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real Time Clock Alarm" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MMC1 ,Multimedia Card" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " UART1 ,UART1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " UART2 ,UART2" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " UART3 ,UART3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 18. " I2C ,I2C" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " USIM1 ,USIM 1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " SSP4 ,SSP4" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PML ,Performance Monitor Unit" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " USBH1 ,USB Host 1" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " USBH2 ,USB Host 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSLv1 ,MSLv1" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "Not pending,Pending"
|
|
rgroup.long 0x9C++3
|
|
line.long 0x00 "ICIP2,Interrupt Controller IRQ Pending Register 2"
|
|
bitfld.long 0x00 20. " BCCU ,BCCU" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " DMEMC ,DMEMC" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " WAKEUP1 ,WAKEUP 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " WAKEUP0 ,WAKEUP 0" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SGPPMU ,SGP PMU" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " USB2 ,USB 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NANDINF ,NAND INF" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " ONEWIRE ,ONE WIRE" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MMC2 ,MMC 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " GRAPHICS ,GRAPHICS" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USIM2 ,USIM 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " CONSUMERIR ,Consumer IR" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CIF ,Capture Interface" "No interrupt,Interrupt"
|
|
group.long 0x04++3
|
|
line.long 0x00 "ICMR,Interrupt Controller Mask Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real Time Clock Alarm" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MMC1 ,Multimedia Card" "Masked,Not masked"
|
|
bitfld.long 0x00 22. " UART1 ,UART1" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " UART2 ,UART2" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " UART3 ,UART3" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " I2C ,I2C" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " USIM1 ,USIM 1" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "Masked,Not masked"
|
|
bitfld.long 0x00 13. " SSP4 ,SSP4" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PML ,Performance Monitor Unit" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " USBH1 ,USB Host 1" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " USBH2 ,USB Host 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSLv1 ,MSLv1" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "Masked,Not masked"
|
|
group.long 0xA0++3
|
|
line.long 0x00 "ICMR2,Interrupt Controller Mask Register 2"
|
|
bitfld.long 0x00 20. " BCCU ,BCCU" "Masked,Not masked"
|
|
bitfld.long 0x00 19. " DMEMC ,DMEMC" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " WAKEUP1 ,WAKEUP 1" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " WAKEUP0 ,WAKEUP 0" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SGPPMU ,SGP PMU" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " USB2 ,USB 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NANDINF ,NAND INF" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " ONEWIRE ,ONE WIRE" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MMC2 ,MMC 2" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " GRAPHICS ,GRAPHICS" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USIM2 ,USIM 2" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " CONSUMERIR ,Consumer IR" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CIF ,Capture Interface" "Masked,Not masked"
|
|
group.long 0x08++3
|
|
line.long 0x00 "ICLR,Interrupt Controller Level Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real Time Clock Alarm" "IRQ,FIQ"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "IRQ,FIQ"
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "IRQ,FIQ"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "IRQ,FIQ"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MMC1 ,Multimedia Card" "IRQ,FIQ"
|
|
bitfld.long 0x00 22. " UART1 ,UART1" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 21. " UART2 ,UART2" "IRQ,FIQ"
|
|
bitfld.long 0x00 20. " UART3 ,UART3" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 18. " I2C ,I2C" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "IRQ,FIQ"
|
|
bitfld.long 0x00 15. " USIM1 ,USIM 1" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " SSP4 ,SSP4" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PML ,Performance Monitor Unit" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "IRQ,FIQ"
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "IRQ,FIQ"
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 3. " USBH1 ,USB Host 1" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " USBH2 ,USB Host 2" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSLv1 ,MSLv1" "IRQ,FIQ"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "IRQ,FIQ"
|
|
group.long 0xA4++3
|
|
line.long 0x00 "ICLR2,Interrupt Controller Level Register 2"
|
|
bitfld.long 0x00 20. " BCCU ,BCCU" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " DMEMC ,DMEMC" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " WAKEUP1 ,WAKEUP 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " WAKEUP0 ,WAKEUP 0" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SGPPMU ,SGP PMU" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " USB2 ,USB 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NANDINF ,NAND INF" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " ONEWIRE ,ONE WIRE" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MMC2 ,MMC 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " GRAPHICS ,GRAPHICS" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USIM2 ,USIM 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " CONSUMERIR ,Consumer IR" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CIF ,Capture Interface" "No interrupt,Interrupt"
|
|
rgroup.long 0x0C++3
|
|
line.long 0x00 "ICFP,Interrupt Controller FIQ Pending Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real Time Clock Alarm" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MMC1 ,Multimedia Card" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " UART1 ,UART1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " UART2 ,UART2" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " UART3 ,UART3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 18. " I2C ,I2C" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " USIM1 ,USIM 1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " SSP4 ,SSP4" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PML ,Performance Monitor Unit" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " USBH1 ,USB Host 1" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " USBH2 ,USB Host 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSLv1 ,MSLv1" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "Not pending,Pending"
|
|
rgroup.long 0xA8++3
|
|
line.long 0x00 "ICFP2,Interrupt Controller FIQ Pending Register 2"
|
|
bitfld.long 0x00 20. " BCCU ,BCCU" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " DMEMC ,DMEMC" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " WAKEUP1 ,WAKEUP 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " WAKEUP0 ,WAKEUP 0" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SGPPMU ,SGP PMU" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " USB2 ,USB 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NANDINF ,NAND INF" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " ONEWIRE ,ONE WIRE" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MMC2 ,MMC 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " GRAPHICS ,GRAPHICS" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USIM2 ,USIM 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " CONSUMERIR ,Consumer IR" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CIF ,Capture Interface" "No interrupt,Interrupt"
|
|
rgroup.long 0x10++3
|
|
line.long 0x00 "ICPR,Interrupt Controller Pending Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real Time Clock Alarm" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MMC1 ,Multimedia Card" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " UART1 ,UART1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " UART2 ,UART2" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " UART3 ,UART3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 18. " I2C ,I2C" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " USIM1 ,USIM 1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " SSP4 ,SSP4" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PML ,Performance Monitor Unit" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " USBH1 ,USB Host 1" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " USBH2 ,USB Host 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSLv1 ,MSLv1" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "Not pending,Pending"
|
|
rgroup.long 0xAC++3
|
|
line.long 0x00 "ICPR2,Interrupt Controller Pending Register 2"
|
|
bitfld.long 0x00 20. " BCCU ,BCCU" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " DMEMC ,DMEMC" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 18. " WAKEUP1 ,WAKEUP 1" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " WAKEUP0 ,WAKEUP 0" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SGPPMU ,SGP PMU" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " USB2 ,USB 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NANDINF ,NAND INF" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " ONEWIRE ,ONE WIRE" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MMC2 ,MMC 2" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " GRAPHICS ,GRAPHICS" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USIM2 ,USIM 2" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " CONSUMERIR ,Consumer IR" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CIF ,Capture Interface" "Not requested,Requested"
|
|
group.long 0x14++3
|
|
line.long 0x00 "ICCR,Interrupt Controller Control Register"
|
|
bitfld.long 0x00 0. " DIM ,Disable Idle Mask" "Any interrupt,Active int only"
|
|
rgroup.long 0x18++3
|
|
line.long 0x00 "ICHP,Interrupt Controller Highest Priority Register"
|
|
bitfld.long 0x00 31. " VAL_IRQ ,Valid IRQ" "Not valid,Valid"
|
|
bitfld.long 0x00 16.--21. " IRQ ,IRQ Highest Priority Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 15. " VAL_FIQ ,Valid FIQ" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " FIQ ,FIQ Highest Priority Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
tree "Interrupt Priority Registers for Interrupts 0-31"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "IPR0,Interrupt Priority Register 0"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 0" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x20++3
|
|
line.long 0x00 "IPR1,Interrupt Priority Register 1"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 1" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x24++3
|
|
line.long 0x00 "IPR2,Interrupt Priority Register 2"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 2" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x28++3
|
|
line.long 0x00 "IPR3,Interrupt Priority Register 3"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 3" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x2C++3
|
|
line.long 0x00 "IPR4,Interrupt Priority Register 4"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 4" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x30++3
|
|
line.long 0x00 "IPR5,Interrupt Priority Register 5"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 5" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x34++3
|
|
line.long 0x00 "IPR6,Interrupt Priority Register 6"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 6" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x38++3
|
|
line.long 0x00 "IPR7,Interrupt Priority Register 7"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 7" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x3C++3
|
|
line.long 0x00 "IPR8,Interrupt Priority Register 8"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 8" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x40++3
|
|
line.long 0x00 "IPR9,Interrupt Priority Register 9"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 9" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x44++3
|
|
line.long 0x00 "IPR10,Interrupt Priority Register 10"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 10" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x48++3
|
|
line.long 0x00 "IPR11,Interrupt Priority Register 11"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 11" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x4C++3
|
|
line.long 0x00 "IPR12,Interrupt Priority Register 12"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 12" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x50++3
|
|
line.long 0x00 "IPR13,Interrupt Priority Register 13"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 13" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x54++3
|
|
line.long 0x00 "IPR14,Interrupt Priority Register 14"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 14" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x58++3
|
|
line.long 0x00 "IPR15,Interrupt Priority Register 15"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 15" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x5C++3
|
|
line.long 0x00 "IPR16,Interrupt Priority Register 16"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 16" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x60++3
|
|
line.long 0x00 "IPR17,Interrupt Priority Register 17"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 17" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x64++3
|
|
line.long 0x00 "IPR18,Interrupt Priority Register 18"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 18" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x68++3
|
|
line.long 0x00 "IPR19,Interrupt Priority Register 19"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 19" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x6C++3
|
|
line.long 0x00 "IPR20,Interrupt Priority Register 20"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 20" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x70++3
|
|
line.long 0x00 "IPR21,Interrupt Priority Register 21"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 21" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x74++3
|
|
line.long 0x00 "IPR22,Interrupt Priority Register 22"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 22" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x78++3
|
|
line.long 0x00 "IPR23,Interrupt Priority Register 23"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 23" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x7C++3
|
|
line.long 0x00 "IPR24,Interrupt Priority Register 24"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 24" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x80++3
|
|
line.long 0x00 "IPR25,Interrupt Priority Register 25"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 25" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x84++3
|
|
line.long 0x00 "IPR26,Interrupt Priority Register 26"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 26" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x88++3
|
|
line.long 0x00 "IPR27,Interrupt Priority Register 27"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 27" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x8C++3
|
|
line.long 0x00 "IPR28,Interrupt Priority Register 28"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 28" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x90++3
|
|
line.long 0x00 "IPR29,Interrupt Priority Register 29"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 29" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x94++3
|
|
line.long 0x00 "IPR30,Interrupt Priority Register 30"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 30" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x98++3
|
|
line.long 0x00 "IPR31,Interrupt Priority Register 31"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "Not valid,Valid"
|
|
bitfld.long 0x00 0.--5. " PID ,Peripheral ID for Priority 31" "SSP3,MSL,USBH2,USBH1,Keypad,Reserved,Power I2C,OSTim,GPIO0,GPIO1,GPIO_x,USBC,PML,SSP4,AC97,USIM,SSP2,LCD,I2C,Reserved,UART3,UART2,UART1,MMC/SDIO/Flash error,SSP1,DMA,OSTim Match 0,OSTim Match 1,OSTim Match 2,OSTim Match 3,One-Hz,RTC,Reserved,QCI,CIrDA,Reserved,Reserved,Reserved,USIM2,Graphics,Reserved,MMC2,Reserved,Reserved,1-Wire,NAND,USB2,SGP,Reserved,Reserved,Reserved,DMEM,Clock,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "Real-Time Clock (RTC)"
|
|
base ad:0x40900000
|
|
width 0x9
|
|
group.long 0x00++3
|
|
line.long 0x00 "RCNR,RTC Counter Register"
|
|
hexmask.long 0x00 0.--31. 1. " RCV ,Counter Value"
|
|
group.long 0x04++3
|
|
line.long 0x00 "RTAR,RTC Alarm Register"
|
|
hexmask.long 0x00 0.--31. 1. " RTMV ,Target Match Value"
|
|
group.long 0x08++3
|
|
line.long 0x00 "RTSR,RTC Status Register"
|
|
bitfld.long 0x00 15. " PICE ,Periodic Interrupt Count Enable for RTCPICR Count Register" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PIALE ,Periodic Interrupt Alarm Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " PIAL ,Periodic Interrupt Alarm Status" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " SWCE ,Stopwatch Count Enable for SWCR Count Register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SWALE2 ,Stopwatch Alarm Enable for Stopwatch Alarm 2" "Disabled,Enabled"
|
|
eventfld.long 0x00 10. " SWAL2 ,Stopwatch Alarm 2 Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SWALE1 ,Stopwatch Alarm Enable for Stopwatch Alarm 1" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " SWAL1 ,Stopwatch Alarm 1 Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RDALE2 ,Wristwatch Alarm Enable for Wristwatch Alarm 2" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " RDAL2 ,Wristwatch Alarm 2 Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RDALE1 ,Wristwatch Alarm Enable for Wristwatch Alarm 1" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " RDAL1 ,Wristwatch Alarm 1 Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HZE ,HZ Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ALE ,RTC Alarm Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " HZ ,HZ Rising-edge Detected" "Not detected,Detected"
|
|
eventfld.long 0x00 0. " AL ,RTC Alarm Detected" "Not detected,Detected"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "RTTR,RTC Timer Trim Register"
|
|
bitfld.long 0x00 31. " LCK ,Lock Bit for the RTTR" "Not locked,Locked"
|
|
hexmask.long.word 0x00 16.--25. 1. " DEL ,Trim Delete count"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " CK_DIV ,Clock Divider Count"
|
|
group.long 0x10++3
|
|
line.long 0x00 "RDCR,RTC Day Counter Register"
|
|
bitfld.long 0x00 20.--22. " WOM ,Week of month" "-,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 17.--19. " DOW ,Day of week" "-,Sun,Mon,Tue,Wed,Thu,Fri,Sat"
|
|
textline " "
|
|
bitfld.long 0x00 12.--16. " HOURS ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 6.--11. " MINUTES ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 0.--5. " SECONDS ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
group.long 0x14++3
|
|
line.long 0x00 "RYCR,RTC Year Counter Register"
|
|
hexmask.long.word 0x00 9.--20. 1. " YEAR ,Current year"
|
|
bitfld.long 0x00 5.--8. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " DOM ,Day of month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x18++3
|
|
line.long 0x00 "RDAR1,Wristwatch Day Alarm Register 1"
|
|
bitfld.long 0x00 20.--22. " WOM ,Match value for week of month" "-,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 17.--19. " DOW ,Match value for day of week" "-,Sun,Mon,Tue,Wed,Thu,Fri,Sat"
|
|
textline " "
|
|
bitfld.long 0x00 12.--16. " HOURS ,Match value for hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 6.--11. " MINUTES ,Match value for minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 0.--5. " SECONDS ,Match value for seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
group.long 0x1c++3
|
|
line.long 0x00 "RYAR1,Wristwatch Year Alarm Register 1"
|
|
hexmask.long.word 0x00 9.--20. 1. " YEAR ,Match value for current year"
|
|
bitfld.long 0x00 5.--8. " MONTH ,Match value for month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " DOM ,Match value for day of month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x20++3
|
|
line.long 0x00 "RDAR2,Wristwatch Day Alarm Register 2"
|
|
bitfld.long 0x00 20.--22. " WOM ,Match value for week of month" "-,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 17.--19. " DOW ,Match value for day of week" "-,Sun,Mon,Tue,Wed,Thu,Fri,Sat"
|
|
textline " "
|
|
bitfld.long 0x00 12.--16. " HOURS ,Match value for hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 6.--11. " MINUTES ,Match value for minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 0.--5. " SECONDS ,Match value for seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
group.long 0x24++3
|
|
line.long 0x00 "RYAR2,Wristwatch Year Alarm Register 2"
|
|
hexmask.long.word 0x00 9.--20. 1. " YEAR ,Match value for current year"
|
|
bitfld.long 0x00 5.--8. " MONTH ,Match value for month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " DOM ,Match value for day of month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x28++3
|
|
line.long 0x00 "SWCR,Stopwatch Counter Register"
|
|
bitfld.long 0x00 19.--23. " HOURS ,Number of elapsed hours in the stopwatch counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 13.--18. " MINUTES ,Number of elapsed minutes in the stopwatch counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 7.--12. " SECONDS ,Number of elapsed seconds in the stopwatch counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " HUNDRETHS ,Hundreths of a second in the stopwatch counter"
|
|
group.long 0x2c++3
|
|
line.long 0x00 "SWAR1,Stopwatch Alarm Register 1"
|
|
bitfld.long 0x00 19.--23. " HOURS ,Match value for the stopwatch time in hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 13.--18. " MINUTES ,Match value for the stopwatch time in minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 7.--12. " SECONDS ,Match value for the stopwatch time in in seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " HUNDRETHS ,Match value for the stopwatch time in hundreths of a second"
|
|
group.long 0x30++3
|
|
line.long 0x00 "SWAR2,Stopwatch Alarm Register 2"
|
|
bitfld.long 0x00 19.--23. " HOURS ,Match value for the stopwatch time in hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 13.--18. " MINUTES ,Match value for the stopwatch time in minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 7.--12. " SECONDS ,Match value for the stopwatch time in in seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " HUNDRETHS ,Match value for the stopwatch time in hundreths of a second"
|
|
group.long 0x34++3
|
|
line.long 0x00 "RTCPICR,Periodic Interrupt Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MILLISECONDS ,Periodic interrupt time in milliseconds"
|
|
group.long 0x38++3
|
|
line.long 0x00 "PIAR,Periodic Interrupt Alarm Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MILLISECONDS ,Periodic interrupt time in milliseconds"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Operating System Timers"
|
|
base ad:0x40A00000
|
|
width 0x8
|
|
tree "Timer Match Registers"
|
|
group.long 0x0++3
|
|
line.long 0x00 "OSMR0,OS Timer Match 0 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x4++3
|
|
line.long 0x00 "OSMR1,OS Timer Match 1 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x8++3
|
|
line.long 0x00 "OSMR2,OS Timer Match 2 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0xC++3
|
|
line.long 0x00 "OSMR3,OS Timer Match 3 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x80++3
|
|
line.long 0x00 "OSMR4,OS Timer Match 4 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x84++3
|
|
line.long 0x00 "OSMR5,OS Timer Match 5 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x88++3
|
|
line.long 0x00 "OSMR6,OS Timer Match 6 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x8C++3
|
|
line.long 0x00 "OSMR7,OS Timer Match 7 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x90++3
|
|
line.long 0x00 "OSMR8,OS Timer Match 8 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x94++3
|
|
line.long 0x00 "OSMR9,OS Timer Match 9 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x98++3
|
|
line.long 0x00 "OSMR10,OS Timer Match 10 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
group.long 0x9C++3
|
|
line.long 0x00 "OSMR11,OS Timer Match 11 Register"
|
|
hexmask.long 0x00 0.--31. 1. " Match_Value ,Match Value"
|
|
tree.end
|
|
tree "Timer Counter Registers"
|
|
group.long 0x10++3
|
|
line.long 0x00 "OSCR0,OS Timer Counter Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " Count0 ,Count for Channel 0"
|
|
group.long 0x40++3
|
|
line.long 0x00 "OSCR4 ,OS Timer Counter Register 4 "
|
|
hexmask.long 0x00 0.--31. 1. " Count4 ,Count for Channel 4 "
|
|
group.long 0x44++3
|
|
line.long 0x00 "OSCR5 ,OS Timer Counter Register 5 "
|
|
hexmask.long 0x00 0.--31. 1. " Count5 ,Count for Channel 5 "
|
|
group.long 0x48++3
|
|
line.long 0x00 "OSCR6 ,OS Timer Counter Register 6 "
|
|
hexmask.long 0x00 0.--31. 1. " Count6 ,Count for Channel 6 "
|
|
group.long 0x4C++3
|
|
line.long 0x00 "OSCR7 ,OS Timer Counter Register 7 "
|
|
hexmask.long 0x00 0.--31. 1. " Count7 ,Count for Channel 7 "
|
|
group.long 0x50++3
|
|
line.long 0x00 "OSCR8 ,OS Timer Counter Register 8 "
|
|
hexmask.long 0x00 0.--31. 1. " Count8 ,Count for Channel 8 "
|
|
group.long 0x54++3
|
|
line.long 0x00 "OSCR9 ,OS Timer Counter Register 9 "
|
|
hexmask.long 0x00 0.--31. 1. " Count9 ,Count for Channel 9 "
|
|
group.long 0x58++3
|
|
line.long 0x00 "OSCR10,OS Timer Counter Register 10"
|
|
hexmask.long 0x00 0.--31. 1. " Count10 ,Count for Channel 10"
|
|
group.long 0x5C++3
|
|
line.long 0x00 "OSCR11,OS Timer Counter Register 11"
|
|
hexmask.long 0x00 0.--31. 1. " Count11 ,Count for Channel 11"
|
|
tree.end
|
|
tree "Status/Enable Registers"
|
|
group.long 0x14++3
|
|
line.long 0x00 "OSSR,OS Timer Status Register"
|
|
eventfld.long 0x0 11. " M11 ,Match Status Channel 11" "Not occurred,Occurred"
|
|
eventfld.long 0x0 10. " M10 ,Match Status Channel 10" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 9. " M9 ,Match Status Channel 9" "Not occurred,Occurred"
|
|
eventfld.long 0x0 8. " M8 ,Match Status Channel 8" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 7. " M7 ,Match Status Channel 7" "Not occurred,Occurred"
|
|
eventfld.long 0x0 6. " M6 ,Match Status Channel 6" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 5. " M5 ,Match Status Channel 5" "Not occurred,Occurred"
|
|
eventfld.long 0x0 4. " M4 ,Match Status Channel 4" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 3. " M3 ,Match Status Channel 3" "Not occurred,Occurred"
|
|
eventfld.long 0x0 2. " M2 ,Match Status Channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x0 1. " M1 ,Match Status Channel 1" "Not occurred,Occurred"
|
|
eventfld.long 0x0 0. " M0 ,Match Status Channel 0" "Not occurred,Occurred"
|
|
group.long 0x18++3
|
|
line.long 0x00 "OWER,OS Timer Watchdog Enable Register"
|
|
bitfld.long 0x00 0. " WME ,Watchdog Match Enable" "Disabled,Enabled"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "OIER,OS Timer Interrupt Enable Register"
|
|
bitfld.long 0x0 11. " E11 ,Interrupt Enable Channel 11" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " E10 ,Interrupt Enable Channel 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 9. " E9 ,Interrupt Enable Channel 9" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " E8 ,Interrupt Enable Channel 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " E7 ,Interrupt Enable Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " E6 ,Interrupt Enable Channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " E5 ,Interrupt Enable Channel 5" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " E4 ,Interrupt Enable Channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " E3 ,Interrupt Enable Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " E2 ,Interrupt Enable Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " E1 ,Interrupt Enable Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " E0 ,Interrupt Enable Channel 0" "Disabled,Enabled"
|
|
rgroup.long 0x20++3
|
|
line.long 0x00 "OSNR,OS Timer Snapshot Register"
|
|
hexmask.long 0x00 0.--31. 1. " Snapshot_Value ,Snapshot Value of Channel 10 or Channel 8"
|
|
tree.end
|
|
tree "Match Control Registers"
|
|
group.long 0xC0++3
|
|
line.long 0x00 "OMCR4,OS Match Control Register 4"
|
|
bitfld.long 0x00 7. " C ,Channel to Match Against" "OSCR4,OSCR4"
|
|
bitfld.long 0x00 6. " P ,Periodic Timer" "Stopped,Continuing"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " S ,External Synchronization Control" "No sync,EXT_SYNC0,EXT_SYNC1,Reserved"
|
|
bitfld.long 0x00 3. " R ,Reset OSCR4 on Match" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. 0.--2. " CRES ,Counter Resolution" "Disabled,1/32768th of s,1 ms,1 s,1 us,CLK_EXT,SPP1 Detect,SPP2 Detect,SPP3 Detect,UDC Detect,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xC4++3
|
|
line.long 0x00 "OMCR5,OS Match Control Register 5"
|
|
bitfld.long 0x00 7. " C ,Channel to Match Against" "OSCR4,OSCR5"
|
|
bitfld.long 0x00 6. " P ,Periodic Timer" "Stopped,Continuing"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " S ,External Synchronization Control" "No sync,EXT_SYNC0,EXT_SYNC1,Reserved"
|
|
bitfld.long 0x00 3. " R ,Reset OSCR5 on Match" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. 0.--2. " CRES ,Counter Resolution" "Disabled,1/32768th of s,1 ms,1 s,1 us,CLK_EXT,SPP1 Detect,SPP2 Detect,SPP3 Detect,UDC Detect,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xC8++3
|
|
line.long 0x00 "OMCR6,OS Match Control Register 6"
|
|
bitfld.long 0x00 7. " C ,Channel to Match Against" "OSCR4,OSCR6"
|
|
bitfld.long 0x00 6. " P ,Periodic Timer" "Stopped,Continuing"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " S ,External Synchronization Control" "No sync,EXT_SYNC0,EXT_SYNC1,Reserved"
|
|
bitfld.long 0x00 3. " R ,Reset OSCR6 on Match" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. 0.--2. " CRES ,Counter Resolution" "Disabled,1/32768th of s,1 ms,1 s,1 us,CLK_EXT,SPP1 Detect,SPP2 Detect,SPP3 Detect,UDC Detect,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xCC++3
|
|
line.long 0x00 "OMCR7,OS Match Control Register 7"
|
|
bitfld.long 0x00 7. " C ,Channel to Match Against" "OSCR4,OSCR7"
|
|
bitfld.long 0x00 6. " P ,Periodic Timer" "Stopped,Continuing"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " S ,External Synchronization Control" "No sync,EXT_SYNC0,EXT_SYNC1,Reserved"
|
|
bitfld.long 0x00 3. " R ,Reset OSCR7 on Match" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. 0.--2. " CRES ,Counter Resolution" "Disabled,1/32768th of s,1 ms,1 s,1 us,CLK_EXT,SPP1 Detect,SPP2 Detect,SPP3 Detect,UDC Detect,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xD0++3
|
|
line.long 0x00 "OMCR8,OS Match Control Register 8"
|
|
bitfld.long 0x00 7. " C ,Channel to Match Against" "OSCR8,OSCR8"
|
|
bitfld.long 0x00 6. " P ,Periodic Timer" "Stopped,Continuing"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " S ,External Synchronization Control" "No sync,EXT_SYNC0,EXT_SYNC1,Reserved"
|
|
bitfld.long 0x00 3. " R ,Reset OSCR8 on Match" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. 0.--2. " CRES ,Counter Resolution" "Disabled,1/32768th of s,1 ms,1 s,1 us,CLK_EXT,SPP1 Detect,SPP2 Detect,SPP3 Detect,UDC Detect,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xD4++3
|
|
line.long 0x00 "OMCR9,OS Match Control Register 9"
|
|
bitfld.long 0x00 9. " N ,Snapshot Mode" "Disabled,Read OSCR9/OSCR8->OSNR"
|
|
bitfld.long 0x00 7. " C ,Channel to Match Against" "OSCR8,OSCR9"
|
|
textline " "
|
|
bitfld.long 0x00 6. " P ,Periodic Timer" "Stopped,Continuing"
|
|
bitfld.long 0x00 4.--5. " S ,External Synchronization Control" "No sync,EXT_SYNC0,EXT_SYNC1,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 3. " R ,Reset OSCR9 on Match" "No reset,Reset"
|
|
bitfld.long 0x00 8. 0.--2. " CRES ,Counter Resolution" "Disabled,1/32768th of s,1 ms,1 s,1 us,CLK_EXT,SPP1 Detect,SPP2 Detect,SPP3 Detect,UDC Detect,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xD8++3
|
|
line.long 0x00 "OMCR10,OS Match Control Register 10"
|
|
bitfld.long 0x00 7. " C ,Channel to Match Against" "OSCR8,OSCR10"
|
|
bitfld.long 0x00 6. " P ,Periodic Timer" "Stopped,Continuing"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " S ,External Synchronization Control" "No sync,EXT_SYNC0,EXT_SYNC1,Reserved"
|
|
bitfld.long 0x00 3. " R ,Reset OSCR10 on Match" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. 0.--2. " CRES ,Counter Resolution" "Disabled,1/32768th of s,1 ms,1 s,1 us,CLK_EXT,SPP1 Detect,SPP2 Detect,SPP3 Detect,UDC Detect,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xDC++3
|
|
line.long 0x00 "OMCR11,OS Match Control Register 11"
|
|
bitfld.long 0x00 9. " N ,Snapshot Mode" "Disabled,Read OSCR11/OSCR10->OSNR"
|
|
bitfld.long 0x00 7. " C ,Channel to Match Against" "OSCR8,OSCR11"
|
|
textline " "
|
|
bitfld.long 0x00 6. " P ,Periodic Timer" "Stopped,Continuing"
|
|
bitfld.long 0x00 4.--5. " S ,External Synchronization Control" "No sync,EXT_SYNC0,EXT_SYNC1,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 3. " R ,Reset OSCR11 on Match" "No reset,Reset"
|
|
bitfld.long 0x00 8. 0.--2. " CRES ,Counter Resolution" "Disabled,1/32768th of s,1 ms,1 s,1 us,CLK_EXT,SPP1 Detect,SPP2 Detect,SPP3 Detect,UDC Detect,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
width 0x8
|
|
tree.end
|
|
tree.end
|
|
tree "Performance Monitoring and Debug"
|
|
base ad:0x4600FF00
|
|
width 0xf
|
|
wgroup.long 0x0++3
|
|
line.long 0x00 "PML_ESL0,Event Select Register 0"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EVENT_NUMBER0 ,Number of PML event which is to be sent to the core event input 0"
|
|
wgroup.long 0x4++3
|
|
line.long 0x00 "PML_ESL1,Event Select Register 1"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EVENT_NUMBER1 ,Number of PML event which is to be sent to the core event input 1"
|
|
wgroup.long 0x8++3
|
|
line.long 0x00 "PML_ESL2,Event Select Register 2"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EVENT_NUMBER2 ,Number of PML event which is to be sent to the core event input 2"
|
|
wgroup.long 0xC++3
|
|
line.long 0x00 "PML_ESL3,Event Select Register 3"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EVENT_NUMBER3 ,Number of PML event which is to be sent to the core event input 3"
|
|
wgroup.long 0x10++3
|
|
line.long 0x00 "PML_ESL4,Event Select Register 4"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EVENT_NUMBER4 ,Number of PML event which is to be sent to the core event input 4"
|
|
wgroup.long 0x14++3
|
|
line.long 0x00 "PML_ESL5,Event Select Register 5"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EVENT_NUMBER5 ,Number of PML event which is to be sent to the core event input 5"
|
|
wgroup.long 0x18++3
|
|
line.long 0x00 "PML_ESL6,Event Select Register 6"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EVENT_NUMBER6 ,Number of PML event which is to be sent to the core event input 6"
|
|
wgroup.long 0x1C++3
|
|
line.long 0x00 "PML_ESL7,Event Select Register 7"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EVENT_NUMBER7 ,Number of PML event which is to be sent to the core event input 7"
|
|
wgroup.long 0x40++3
|
|
line.long 0x00 "MDU_XSCALE_BP,MDU Intel Xscale Breakpoint Register"
|
|
bitfld.long 0x00 8. " XCS_EVENT ,Intel Xscale abrupt-stop event to provoke the output result" "Not allowed,Allowed"
|
|
bitfld.long 0x00 7. " XDB_EVENT ,Intel Xscale debug event to provoke the output result" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " 2DG_CS_EVENT ,2D Graphics Subsystem abrupt-stop event to provoke the output result" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " 2DG_DB_EVENT ,2D Graphics debug event to provoke the output result" "Not allowed,Allowed"
|
|
wgroup.long 0x54++3
|
|
line.long 0x00 "MDU_2DG_EVENT,MDU 2DG Stop Register"
|
|
bitfld.long 0x00 8. " XCS_EVENT ,Intel Xscale abrupt-stop event to provoke the output result" "Not allowed,Allowed"
|
|
bitfld.long 0x00 7. " XDB_EVENT ,Intel Xscale debug event to provoke the output result" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " 2DG_CS_EVENT ,2D Graphics Subsystem abrupt-stop event to provoke the output result" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " 2DG_DB_EVENT ,2D Graphics debug event to provoke the output result" "Not allowed,Allowed"
|
|
wgroup.long 0x58++3
|
|
line.long 0x00 "MDU_CW_MATCH,MDU CW Signal Register"
|
|
bitfld.long 0x00 8. " XCS_EVENT ,Intel Xscale abrupt-stop event to provoke the output result" "Not allowed,Allowed"
|
|
bitfld.long 0x00 7. " XDB_EVENT ,Intel Xscale debug event to provoke the output result" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " 2DG_CS_EVENT ,2D Graphics Subsystem abrupt-stop event to provoke the output result" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " 2DG_DB_EVENT ,2D Graphics debug event to provoke the output result" "Not allowed,Allowed"
|
|
tree.end
|
|
tree "System Bus Arbiters"
|
|
base ad:0x4600FE00
|
|
width 0xd
|
|
group.long 0x00++3
|
|
line.long 0x00 "ARB_CNTRL_1,System Bus #1 Bus Arbiter Control Register"
|
|
bitfld.long 0x00 29. " DMA_SLV_PARK ,DMA Slave Park" "Not parked,Parked"
|
|
bitfld.long 0x00 28. " SWITCH_SLV_PARK ,System Bus #1 Switch Slave Park" "Not parked,Parked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " USBH_PARK ,USB Host Park" "Not parked,Parked"
|
|
bitfld.long 0x00 26. " CI_PARK ,Quick Capture Interface Park" "Not parked,Parked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " LCD_PARK ,LCD Park" "Not parked,Parked"
|
|
bitfld.long 0x00 24. " DMA_PARK ,DMA Master Park" "Not parked,Parked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWITCH_PARK ,System Bus #1 Switch Master Park" "Not parked,Parked"
|
|
bitfld.long 0x00 22. " LOCK_FLAG ,Lock Flag (Master gain bus access)" "All,Locked only"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CAMERA_WT ,Camera Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " LCD_WT ,LCD Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DMA_WT ,DMA Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " SWITCH_WT ,Switch (Core) Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x04++3
|
|
line.long 0x00 "ARB_CNTRL_2,System Bus #2 Bus Arbiter Control Register"
|
|
bitfld.long 0x00 31. " USB2_SLV_PARK ,USB 2.0 Client Slave Park" "Not parked,Parked"
|
|
bitfld.long 0x00 29. " SWITCH_SLV_PARK ,System Bus #2 Switch Slave Park" "Not parked,Parked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " USB2_PARK ,USB 2.0 Client Master Park" "Not parked,Parked"
|
|
bitfld.long 0x00 27. " 2DG_PARK ,2-D Graphics Park" "Not parked,Parked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SWITCH_PARK ,System Bus #2 Switch Master Park" "Not parked,Parked"
|
|
bitfld.long 0x00 25. " LOCK_FLAG ,Lock Flag (Master gain bus access)" "All,Locked only"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " USB_20_WT ,USB 2.0 Client Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " 2D_GRAPHICS_WT ,2-D Graphics Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SWITCH_WT ,Switch (Core) Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0xb
|
|
tree.end
|
|
tree "Dynamic Memory Controller"
|
|
base ad:0x48100000
|
|
width 0xa
|
|
group.long 0x00++3 "Dynamic Memory Controller Registers"
|
|
line.long 0x00 "MDCNFG,SDRAM Configuration Register"
|
|
bitfld.long 0x00 31. " SETALLWAYS ,Set to 1" "Reserved,1"
|
|
bitfld.long 0x00 30. " DMCEN ,Enable Dynamic Memory Controller" "Ignored,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SETALLWAYS ,Set to 1" "Reserved,1"
|
|
bitfld.long 0x00 8.--9. " DTC[1:0] ,Timing Category for SDRAM (tRP/CL/tRCD/tRAS(min)/tRC) in Clocks" "2/2/2/3/5,2/2/2/5/10,4/3/4/6/10,3/3/3/6/10"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " DRAC[1:0] ,Number of Row Address Bits for SDRAM Partitions" "12,13,14,Reserved"
|
|
bitfld.long 0x00 3.--4. " DCAC[1:0] ,Number of Column Address Bits for SDRAM Partitions" "9,10,11,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DBW ,SDRAM Data Bus Width" "32 bits,16 bits"
|
|
bitfld.long 0x00 1. " DCSE1 ,SDRAM SDCS1 Enable Register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DCSE0 ,SDRAM SDCS0 Enable Register" "Disabled,Enabled"
|
|
group.long 0x04++3
|
|
line.long 0x00 "MDREFR,SDRAM Refresh Control Register"
|
|
bitfld.long 0x00 8. " SWREF ,Software Refresh" "No refresh,Refresh"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DRI[7:0] ,SDRAM Refresh Interval"
|
|
group.long 0x40++3
|
|
line.long 0x00 "MDMRS,SDRAM Mode Register Set Configuration Register"
|
|
bitfld.long 0x00 31. " MDCS1 ,Control Assertion of Chip Select 1 during MRS Command" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " MDCS0 ,Control Assertion of Chip Select 0 during MRS Command" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MDCOND ,Control Conditioning of SDRAM" "Not conditioned,Conditioned"
|
|
bitfld.long 0x00 28. " MDPEND ,MRS request made by writting to the MDMRS register and is pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " MDBA ,Bank Address for Selecting MRS or EMRS" "00,01,02,03"
|
|
hexmask.long.word 0x00 0.--13. 1. " MDMRS ,MRS command passed as is written here to SDRAM address bits"
|
|
group.long 0x60++3
|
|
line.long 0x00 "DDR_HCAL,DDR Hardware Calibration Register"
|
|
bitfld.long 0x00 31. " HCEN ,Hardware Calibration Phase Detector Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " HCPROG ,Hardware Calibration Program" "Observe,Program"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " SETALLWAYS ,Must be set to 08" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,08,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 18.--21. " HCOFF3 ,Hardware Calibration Offset for DQS[3]" "No offset,1/8,2/8,3/8,4/8,5/8,6/8,7/8,No offset,9/8,10/8,11/8,12/8,13/8,14/8,15/8"
|
|
textline " "
|
|
bitfld.long 0x00 14.--17. " HCOFF2 ,Hardware Calibration Offset for DQS[2]" "No offset,1/8,2/8,3/8,4/8,5/8,6/8,7/8,No offset,9/8,10/8,11/8,12/8,13/8,14/8,15/8"
|
|
bitfld.long 0x00 10.--13. " HCOFF1 ,Hardware Calibration Offset for DQS[1]" "No offset,1/8,2/8,3/8,4/8,5/8,6/8,7/8,No offset,9/8,10/8,11/8,12/8,13/8,14/8,15/8"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " HCOFF0 ,Hardware Calibration Offset for DQS[0]" "No offset,1/8,2/8,3/8,4/8,5/8,6/8,7/8,No offset,9/8,10/8,11/8,12/8,13/8,14/8,15/8"
|
|
bitfld.long 0x00 0.--4. " HCRNG ,Hardware Calibration Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x68++3
|
|
line.long 0x00 "DDR_WCAL,DDR Write Strobe Calibration"
|
|
bitfld.long 0x00 31. " WCEN ,Write Calibration Enable" "Default,Strobe"
|
|
hexmask.long.byte 0x00 16.--22. 1. " WSDLV_STATUS ,Write Strobe DLV Status"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " WCOFF ,Write Strobe Offset" "No offset,1/8,2/8,3/8,4/8,5/8,6/8,7/8,8/8,9/8,10/8,11/8,12/8,13/8,14/8,15/8"
|
|
group.long 0x70++3
|
|
line.long 0x00 "DMCIER,Dynamic Memory Controller Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " ERCI ,Rcomp Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EORF ,Out of Range Found Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EDLP ,Delay Lines Programmed Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x78++3
|
|
line.long 0x00 "DMCISR,Dynamic Memory Controller Interrupt Status Register"
|
|
eventfld.long 0x00 31. " RCI ,Rcomp Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " ORF ,Out of Range Found" "Not found,Found"
|
|
textline " "
|
|
eventfld.long 0x00 29. " DLP ,Delay Lines Programmed by Hardware Calibration" "Not programmed,Programmed"
|
|
hexmask.long.byte 0x00 22.--28. 1. " PCODE ,Rcomp Value of p Transistor Legs Returned from Rcomp Pad"
|
|
textline " "
|
|
hexmask.long.byte 0x00 15.--21. 1. " NCODE ,Rcomp Value of n Transistor Legs Returned from Rcomp Pad"
|
|
hexmask.long.byte 0x00 8.--14. 1. " PDV ,Phase Detector Value"
|
|
textline " "
|
|
eventfld.long 0x00 7. " SLFREF ,Self-Refresh Status" "No refresh,Refresh"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ORV ,Out-of-Range Value"
|
|
group.long 0x80++3
|
|
line.long 0x00 "DDR_DLS,Delay Line Status Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " SSDLV3 ,Delay Line Value of DQS[3] Controlling MD[31:24]"
|
|
hexmask.long.byte 0x00 16.--22. 1. " SSDLV2 ,Delay Line Value of DQS[2] Controlling MD[23:16]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SSDLV1 ,Delay Line Value of DQS[1] controlling MD[15:8]"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SSDLV0 ,Delay Line Value of DQS[0] controlling MD[7:0]"
|
|
group.long 0x90++3
|
|
line.long 0x00 "EMPI,EMPI Control Register"
|
|
bitfld.long 0x00 31. " PD_DQS ,Control Weak Pulldown on DQS (DDR Strobe) Pads" "If DQS not driven,Allways"
|
|
bitfld.long 0x00 30. " PW_DQN ,Control Weak Pulldown/Down on DQ (Data) Pads" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SCHM_CMD ,Enable Schmitter Mode on EMPI Command Pads" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCHM_DMEM_EN ,Enable Schmitter Mode on Pads Used by DMENC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SETALLWAYS ,Must be set to 1" "Reserved,1"
|
|
group.long 0x100++3
|
|
line.long 0x00 "RCOMP,Rcomp Control Register"
|
|
bitfld.long 0x00 31. " SWEVAL ,Software Rcomp Evaluation Request" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " UPDATE ,Update" "Not updated,Updated"
|
|
textline " "
|
|
bitfld.long 0x00 25.--29. " RCRNG ,Resistive Compensation Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " SETALLWAYS ,Must be set to 1" "Reserved,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " REI ,Rcomp Evaluation Interval"
|
|
group.long 0x110++3 "Programmable Buffer Strength and Slew Registers"
|
|
line.long 0x00 "PAD_MA,PAD_MA Strength and Slew Setting Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " PCODE ,P transistor strength code"
|
|
hexmask.long.byte 0x00 16.--22. 1. " NCODE ,N transistor strength code"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--11. 1. " PSLEW ,P transistor slew rate code"
|
|
hexmask.long.byte 0x00 0.--3. 1. " NSLEW ,N transistor slew rate code"
|
|
group.long 0x114++3
|
|
line.long 0x00 "PAD_MDMSB,PAD_MDMSB Strenght and Slew Settings Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " PCODE ,P transistor strength code"
|
|
hexmask.long.byte 0x00 16.--22. 1. " NCODE ,N transistor strength code"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--11. 1. " PSLEW ,P transistor slew rate code"
|
|
hexmask.long.byte 0x00 0.--3. 1. " NSLEW ,N transistor slew rate code"
|
|
group.long 0x118++3
|
|
line.long 0x00 "PAD_MDLSB,PAD_MDLSB Strenght and Slew Settings Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " PCODE ,P transistor strength code"
|
|
hexmask.long.byte 0x00 16.--22. 1. " NCODE ,N transistor strength code"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--11. 1. " PSLEW ,P transistor slew rate code"
|
|
hexmask.long.byte 0x00 0.--3. 1. " NSLEW ,N transistor slew rate code"
|
|
group.long 0x11C++3
|
|
line.long 0x00 "PAD_SDRAM,PAD_SDRAM Strenght and Slew Settings Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " PCODE ,P transistor strength code"
|
|
hexmask.long.byte 0x00 16.--22. 1. " NCODE ,N transistor strength code"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--11. 1. " PSLEW ,P transistor slew rate code"
|
|
hexmask.long.byte 0x00 0.--3. 1. " NSLEW ,N transistor slew rate code"
|
|
group.long 0x120++3
|
|
line.long 0x00 "PAD_SDCLK,PAD_SDCLK Strenght and Slew Settings Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " PCODE ,P transistor strength code"
|
|
hexmask.long.byte 0x00 16.--22. 1. " NCODE ,N transistor strength code"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--11. 1. " PSLEW ,P transistor slew rate code"
|
|
hexmask.long.byte 0x00 0.--3. 1. " NSLEW ,N transistor slew rate code"
|
|
group.long 0x124++3
|
|
line.long 0x00 "PAD_SDCS,PAD_SDCS Strenght and Slew Settings Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " PCODE ,P transistor strength code"
|
|
hexmask.long.byte 0x00 16.--22. 1. " NCODE ,N transistor strength code"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--11. 1. " PSLEW ,P transistor slew rate code"
|
|
hexmask.long.byte 0x00 0.--3. 1. " NSLEW ,N transistor slew rate code"
|
|
group.long 0x12C++3
|
|
line.long 0x00 "PAD_SCLK,PAD_SCLK Strenght and Slew Settings Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " PCODE ,P transistor strength code"
|
|
hexmask.long.byte 0x00 16.--22. 1. " NCODE ,N transistor strength code"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--11. 1. " PSLEW ,P transistor slew rate code"
|
|
hexmask.long.byte 0x00 0.--3. 1. " NSLEW ,N transistor slew rate code"
|
|
tree.end
|
|
tree "Static Memory Controller"
|
|
base ad:0x4A000000
|
|
width 0xc
|
|
group.long 0x0c++3
|
|
line.long 0x00 "MSC1,Static Memory Control Register 1"
|
|
bitfld.long 0x00 24.--27. " RDN1/3 ,Programmable Number of External Clock Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RDF1/3 ,Programmable Number of External Clock Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SETALLWAYS ,Must be set to 1" "Reserved,1"
|
|
bitfld.long 0x00 16.--18. " RT1/3 ,Memory Type" "Flash,SRAM,Reserved,Reserved,VLIO,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " RDN0/2 ,Programmable Number of External Clock Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " RDF0/2 ,Programmable Number of External Clock Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SETALLWAYS ,Must be set to 1" "Reserved,1"
|
|
bitfld.long 0x00 0.--2. " RT0/2 ,Memory Type" "Flash,SRAM,Reserved,Reserved,VLIO,Reserved,Reserved,Reserved"
|
|
group.long 0x14++3
|
|
line.long 0x00 "MECR,Expansion Memory (Compact Flash) Configuration Register"
|
|
bitfld.long 0x00 1. " CIT ,Card Interface" "Not inserted,Inserted"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "SXCNFG,Synchronous Static Memory Control Register"
|
|
bitfld.long 0x00 28.--29. " SETALLWAYS ,Must be set to 3" "Reserved,Reserved,Reserved,3"
|
|
bitfld.long 0x00 21.--24. " SXWRCL2 ,Write Latency for Synchronous writes for nCS[3:2]" "1 clk,2 clks,3 clks,4 clks,5 clks,6 clks,7 clks,8 clks,9 clks,10 clks,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 18.--20. 31. " SXCL2/SXCLEXT2 ,Frequency Code for nCS[3:2] for Synchronous Read Operations" "Reserved,Reserved,3 clks,4 clks,5 clks,6 clks,7 clks,8 clks,9 clks,10 clks,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 17. " SXEN3 ,Enabe Bits for SX Memory Parition 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SXEN2 ,Enabe Bits for SX Memory Parition 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " SETALLWAYS ,Must be set to 3" "Reserved,Reserved,Reserved,3"
|
|
group.long 0x28++3
|
|
line.long 0x00 "MCMEM0,Expansion Memory Common Memory Space Timing Configuration"
|
|
bitfld.long 0x00 14.--19. " MEM0_HOLD ,Number of Memory Clocks to hold address after command deassertion for memory for socet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7.--11. " MEM0_ASST ,Code for the command assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " MEM0_SET ,Number of memory clocks to setup address command assertion for memory for socet"
|
|
group.long 0x30++3
|
|
line.long 0x00 "MCATT0,Expansion Memory Attribute Space Timing Configuration"
|
|
bitfld.long 0x00 14.--19. " ATT0_HOLD ,Number of Memory Clocks to hold address after command deassertion for attribute for socet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7.--11. " ATT0_ASST ,Code for the command assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " ATT0_SET ,Number of memory clocks to setup address command assertion for attribute for socet"
|
|
group.long 0x38++3
|
|
line.long 0x00 "MCIO0,Expansion Memory I/O Space Timing Configuration"
|
|
bitfld.long 0x00 14.--19. " IO0_HOLD ,Number of Memory Clocks to hold address after command deassertion for IO for socet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7.--11. " IO0_ASST ,Code for the command assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " IO0_SET ,Number of memory clocks to setup address command assertion for IO for socet"
|
|
group.long 0x68++3
|
|
line.long 0x00 "MEMCLKCFG,Clock Configuration"
|
|
bitfld.long 0x00 16.--18. " df_clkdiv ,Generate the clock sent out of the SCLK output for the DF_SCLK" "Reserved,CLK_SMEM,CLK_SMEM/2,CLK_SMEM/4,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 0.--2. " SETALLWAYS ,Must be set to 3" "Reserved,Reserved,Reserved,3,?..."
|
|
group 0x80++3
|
|
line.long 0x00 "CSADRCFG0,Address Configuration Register for Chip Select 0"
|
|
bitfld.long 0x00 20.--21. " ALT ,Address Latch Timing" "No setup/hold,No setup,No hold,1 DF_SCLK setup/1 DF_SCLK hold"
|
|
bitfld.long 0x00 17.--19. " ALW ,Address Latch Width" "Illegal,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--16. " ADDRCONFIG ,Address Configuration" "Full-latch,Full-latch,Reserved,Low-order,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 8.--11. " ADDRSPLIT ,Address Split" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Byte addr bit 16,Byte addr bit 17,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ADDRBASE ,Address Base" "Byte addr bit 0,Byte addr bit 1,Byte addr bit 2,Reserved"
|
|
bitfld.long 0x00 0.--3. " INFTYPE ,Interface and Addressing Type" "Reserved,Reserved,EMPI AA/D mux flash,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DFI AA/D mux SRAM/async Flash,Reserved,DFI AA/D mux VLIO,DFI AA/D mux Card interface,DFI AA/D mux sync Flash,DFI AA/D mux device,Reserved"
|
|
group 0x84++3
|
|
line.long 0x00 "CSADRCFG1,Address Configuration Register for Chip Select 1"
|
|
bitfld.long 0x00 20.--21. " ALT ,Address Latch Timing" "No setup/hold,No setup,No hold,1 DF_SCLK setup/1 DF_SCLK hold"
|
|
bitfld.long 0x00 17.--19. " ALW ,Address Latch Width" "Illegal,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--16. " ADDRCONFIG ,Address Configuration" "Full-latch,Full-latch,Reserved,Low-order,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 8.--11. " ADDRSPLIT ,Address Split" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Byte addr bit 16,Byte addr bit 17,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ADDRBASE ,Address Base" "Byte addr bit 0,Byte addr bit 1,Byte addr bit 2,Reserved"
|
|
bitfld.long 0x00 0.--3. " INFTYPE ,Interface and Addressing Type" "Reserved,Reserved,EMPI AA/D mux flash,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DFI AA/D mux SRAM/async Flash,Reserved,DFI AA/D mux VLIO,DFI AA/D mux Card interface,DFI AA/D mux sync Flash,DFI AA/D mux device,Reserved"
|
|
group 0x88++3
|
|
line.long 0x00 "CSADRCFG2,Address Configuration Register for Chip Select 2"
|
|
bitfld.long 0x00 20.--21. " ALT ,Address Latch Timing" "No setup/hold,No setup,No hold,1 DF_SCLK setup/1 DF_SCLK hold"
|
|
bitfld.long 0x00 17.--19. " ALW ,Address Latch Width" "Illegal,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--16. " ADDRCONFIG ,Address Configuration" "Full-latch,Full-latch,Reserved,Low-order,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 8.--11. " ADDRSPLIT ,Address Split" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Byte addr bit 16,Byte addr bit 17,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ADDRBASE ,Address Base" "Byte addr bit 0,Byte addr bit 1,Byte addr bit 2,Reserved"
|
|
bitfld.long 0x00 0.--3. " INFTYPE ,Interface and Addressing Type" "Reserved,Reserved,EMPI AA/D mux flash,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DFI AA/D mux SRAM/async Flash,Reserved,DFI AA/D mux VLIO,DFI AA/D mux Card interface,DFI AA/D mux sync Flash,DFI AA/D mux device,Reserved"
|
|
group 0x8C++3
|
|
line.long 0x00 "CSADRCFG3,Address Configuration Register for Chip Select 3"
|
|
bitfld.long 0x00 20.--21. " ALT ,Address Latch Timing" "No setup/hold,No setup,No hold,1 DF_SCLK setup/1 DF_SCLK hold"
|
|
bitfld.long 0x00 17.--19. " ALW ,Address Latch Width" "Illegal,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--16. " ADDRCONFIG ,Address Configuration" "Full-latch,Full-latch,Reserved,Low-order,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 8.--11. " ADDRSPLIT ,Address Split" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Byte addr bit 16,Byte addr bit 17,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ADDRBASE ,Address Base" "Byte addr bit 0,Byte addr bit 1,Byte addr bit 2,Reserved"
|
|
bitfld.long 0x00 0.--3. " INFTYPE ,Interface and Addressing Type" "Reserved,Reserved,EMPI AA/D mux flash,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DFI AA/D mux SRAM/async Flash,Reserved,DFI AA/D mux VLIO,DFI AA/D mux Card interface,DFI AA/D mux sync Flash,DFI AA/D mux device,Reserved"
|
|
group 0x90++3
|
|
line.long 0x00 "CSADRCFG_P,Address Configuration Register for PC Card Interface"
|
|
bitfld.long 0x00 20.--21. " ALT ,Address Latch Timing" "No setup/hold,No setup,No hold,1 DF_SCLK setup/1 DF_SCLK hold"
|
|
bitfld.long 0x00 17.--19. " ALW ,Address Latch Width" "Illegal,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--16. " ADDRCONFIG ,Address Configuration" "Full-latch,Full-latch,Reserved,Low-order,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 8.--11. " ADDRSPLIT ,Address Split" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Byte addr bit 16,Byte addr bit 17,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ADDRBASE ,Address Base" "Byte addr bit 0,Byte addr bit 1,Byte addr bit 2,Reserved"
|
|
bitfld.long 0x00 0.--3. " INFTYPE ,Interface and Addressing Type" "Reserved,Reserved,EMPI AA/D mux flash,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DFI AA/D mux SRAM/async Flash,Reserved,DFI AA/D mux VLIO,DFI AA/D mux Card interface,DFI AA/D mux sync Flash,DFI AA/D mux device,Reserved"
|
|
group.long 0xa0++3
|
|
line.long 0x00 "CSMSADRCFG,Chip Select Configuration Register"
|
|
bitfld.long 0x00 1. " SETALLWAYS ,Must be set to 1" "Reserved,1"
|
|
tree.end
|
|
tree "Data Flash Controller"
|
|
base ad:0x43100000
|
|
width 0xb
|
|
group.long 0x00++3
|
|
line.long 0x00 "NDCR,Data Flash Control Register"
|
|
bitfld.long 0x00 31. " SPARE_EN ,Spare Area Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " ECC_EN ,ECC Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DMA_EN ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " ND_RUN ,NAND Controller Run Mode" "Not in run,Run"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " DWIDTH_C/DWIDTH_M ,Data Bus Width of the NAND Flash Controller" "FlashCtrl,Invalid,8-bit,16-bit"
|
|
bitfld.long 0x00 24.--25. " PAGE_SZ ,Page Size of the Flash Device" "512/16 bytes,2048/16 bytes,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 23. " NCSX ,Chip Select Don't Care Bit" "Should asserted,Not cared"
|
|
bitfld.long 0x00 22. " ND_STOP ,NAND Flash Controller Clean Stop" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CLR_PG_CNT ,Clear Page Count" "Not cleared,Cleared"
|
|
bitfld.long 0x00 19. " CLR_ECC ,Clear ECC" "No effect,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " RD_ID_CNT ,Read ID Byte Count" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " RA_START ,Row Address Start Position" "2nd,3rd"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PG_PER_BLK ,Pages Per Block" "32,64"
|
|
bitfld.long 0x00 12. " ND_ARB_EN ,Data Flash Bus Arbiter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RDYM ,Flash Device Ready Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " CS0_PAGEDM ,ND_nCS0 Page Done Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CS1_PAGEDM ,ND_nCS1 Page Done Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " CS0_CMDDM ,ND_nCS0 Command Done Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CS1_CMDDM ,ND_nCS1 Command Done Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " CS0_BBDM ,ND_nCS0 Bad Block Detect Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CS1_BBDM ,ND_nCS1 Bad Block Detect Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " DBERRM ,Double-Bit Error Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SBERRM ,Single-Bit Error Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x00 2. " WRDREQM ,Write Data Request Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RDDREQM ,Read Data Request Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " WRCMDREQM ,Write Command Request Interrupt Mask" "Enabled,Disabled"
|
|
group.long 0x04++3
|
|
line.long 0x00 "NDTR0CS0,Data Controller Timing Parameter 0 Register for ND_nCS0"
|
|
bitfld.long 0x00 19.--21. " tCH ,Enable Signal Hold Time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 16.--18. " tCS ,Enable Signal Setup Time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " tWH ,ND_nWE high duration" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 8.--10. " tWP ,ND_nWE pulse width" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " tRH ,ND_nRE high duration" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0.--2. " tRP ,ND_RE pulse width" "1,2,3,4,5,6,7,8"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "NDTR1CS0,Data Controller Timing Parameter 1 Register for ND_nCS0"
|
|
hexmask.long.word 0x00 16.--31. 1. " tR ,ND_nWE High to ND_nRE Low for Read"
|
|
bitfld.long 0x00 4.--7. " tWHR ,ND_nWE High to ND_nRE Low for a Read Status or Read ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " tAR ,ND_ALE Low to ND_nRE Low Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++3
|
|
line.long 0x00 "NDSR,Data Controller Status Register"
|
|
eventfld.long 0x00 11. " RDY ,NAND Flash Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 10. " CS0_PAGED ,ND_nCS0 Page Done" "Not done,Done"
|
|
textline " "
|
|
eventfld.long 0x00 9. " CS1_PAGED ,ND_nCS1 Page Done" "Not done,Done"
|
|
eventfld.long 0x00 8. " CS0_CMDD ,ND_nCS0 Command Done" "Not done,Done"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CS1_CMDD ,ND_nCS1 Command Done" "Not done,Done"
|
|
eventfld.long 0x00 6. " CS0_BBD ,ND_nCS0 Bad Block Detect" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 5. " CS1_BBD ,ND_nCS0 Bad Block Detect" "Not detected,Detected"
|
|
eventfld.long 0x00 4. " DBERR ,Double-Bit Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 3. " SBERR ,Single-Bit Error" "No error,Error"
|
|
eventfld.long 0x00 2. " WRDREQ ,Write Data Request" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 1. " RDDREQ ,Read Data Request" "Not requested,Requested"
|
|
eventfld.long 0x00 0. " WRCMDREQ ,Write Command Request" "Not requested,Requested"
|
|
rgroup.long 0x18++3
|
|
line.long 0x00 "NDPCR,Data Controller Page Count Register"
|
|
bitfld.long 0x00 16.--21. " PG_CNT_1 ,Page count for device interfaced using ND_nCS1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " PG_CNT_0 ,Page count for device interfaced using ND_nCS0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x1C++3
|
|
line.long 0x00 "NDBDR0,Data Controller Bad Block Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " BAD_BLK_INFO ,Bad Block Information"
|
|
rgroup.long 0x20++3
|
|
line.long 0x00 "NDBDR1,Data Controller Bad Block Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " BAD_BLK_INFO ,Bad Block Information"
|
|
group.long 0x40++3
|
|
line.long 0x00 "NDDB,Data Controller Data Buffer"
|
|
hexmask.long 0x00 0.--31. 1. " NAND_Flash_Data ,Write/read data"
|
|
group.long 0x48++3
|
|
line.long 0x00 "NDCB0,Data Controller Command Buffer 0"
|
|
bitfld.long 0x00 25. " AUTO_RS ,Auto Read Status" "No auto read,Auto read"
|
|
bitfld.long 0x00 24. " CSEL ,CS Select" "ND_nCS0,ND_nCS1"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " CMD_TYPE ,Command Type" "Read,Program,Erase,Read ID,Status Read,Reset,Reserved,Reserved"
|
|
bitfld.long 0x00 20. " NC ,Next Command" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBC ,Double Byte Command" "Single,Double"
|
|
bitfld.long 0x00 16.--18. " ADDR_CYC ,Number of Address Cycles" "Reserved,1,2,3,4,5,Reserved,Reserved"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMD2 ,Second Command"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMD1 ,First Command"
|
|
rgroup.long 0x4C++3
|
|
line.long 0x00 "NDCB1,Data Controller Command Buffer 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ADDR4 ,Address sent out to the flash device on the fourth addressing cycle"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ADDR3 ,Address sent out to the flash device on the third addressing cycle"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ADDR2 ,Address sent out to the flash device on the second addressing cycle"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ADDR1 ,Address sent out to the flash device on the first addressing cycle"
|
|
rgroup.long 0x50++3
|
|
line.long 0x00 "NDCB2,Data Controller Command Buffer 2"
|
|
bitfld.long 0x00 8.--13. " Page_Count ,Page Count" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ADDR5 ,Address sent out to the flash device on the fifth addressing cycle"
|
|
tree.end
|
|
tree "Internal Memory"
|
|
base ad:0x58000000
|
|
width 0x8
|
|
group.long 0x00++3
|
|
line.long 0x00 "IMPMCR,IM Power Management Control Register"
|
|
bitfld.long 0x00 13. " AW5 ,Upper Bank Array 2 Automatic Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " AW4 ,Lower Bank Array 2 Automatic Wake-up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " AW3 ,Upper Bank Array 1 Automatic Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " AW2 ,Lower Bank Array 1 Automatic Wake-up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " AW1 ,Upper Bank Array 0 Automatic Wake-up Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DDT ,Delay State-retentive Time"
|
|
base ad:0x5C000000
|
|
group.long 0x00++3
|
|
line.long 0x00 "LBA0,Lower Bank Array 0 128KB SRAM"
|
|
button "LBA0 " "d ad:0x5C000000--ad:0x5C01FFFF /long"
|
|
base ad:0x5C020000
|
|
group.long 0x00++3
|
|
line.long 0x00 "UBA0,Upper Bank Array 0 128KB SRAM"
|
|
button "UBA0 " "d ad:0x5C020000--ad:0x5C03FFFF /long"
|
|
base ad:0x5C040000
|
|
group.long 0x00++3
|
|
line.long 0x00 "LBA1,Lower Bank Array 1 128KB SRAM"
|
|
button "LBA1 " "d ad:0x5C040000--ad:0x5C05FFFF /long"
|
|
base ad:0x5C060000
|
|
group.long 0x00++3
|
|
line.long 0x00 "UBA1,Upper Bank Array 1 128KB SRAM"
|
|
button "UBA1 " "d ad:0x5C060000--ad:0x5C07FFFF /long"
|
|
base ad:0x5C080000
|
|
group.long 0x00++3
|
|
line.long 0x00 "LBA2,Lower Bank Array 2 128KB SRAM"
|
|
button "LBA2 " "d ad:0x5C080000--ad:0x5C09FFFF /long"
|
|
base ad:0x5C0A0000
|
|
group.long 0x00++3
|
|
line.long 0x00 "UBA2,Upper Bank Array 2 128KB SRAM"
|
|
button "UBA2 " "d ad:0x5C0A0000--ad:0x5C0BFFFF /long"
|
|
width 0xb
|
|
tree.end
|
|
tree "MMC/SD/SDIO Controller"
|
|
tree "MMC1"
|
|
base ad:0x41100000
|
|
width 0xe
|
|
group.long 0x00++3
|
|
line.long 0x00 "MMC_STRPCL,Control to Start and Stop MMC/SD/SDIO Clock"
|
|
bitfld.long 0x00 1. " STRT_CLK ,Start MMCLK" "No effect,Started"
|
|
bitfld.long 0x00 0. " STOP_CLK ,Stop MMCLK" "No effect,Stopped"
|
|
rgroup.long 0x04++3
|
|
line.long 0x00 "MMC_STAT,MMC/SD/SDIO Status Register"
|
|
bitfld.long 0x00 16. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Not suspended,Suspended"
|
|
bitfld.long 0x00 15. " SDIO_INT ,SDIO Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RD_STALLED ,Read Stalled" "Not stalled,Stalled"
|
|
bitfld.long 0x00 13. " END_CMD_RES ,End Command Response" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PRG_DONE ,Programming Done" "Not done,Done"
|
|
bitfld.long 0x00 11. " DATA_TRAN_DONE ,Data Transmission Done" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI_WR_ERR ,SPI Write Error" "No error,Error"
|
|
bitfld.long 0x00 9. " FLASH_ERR ,FLASH Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLK_EN ,MMCLK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RES_CRC_ERR ,Response CRC Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DAT_ERR_TOKEN ,Data Error Token" "No error,Error"
|
|
bitfld.long 0x00 3. " CRC_RD_ERR ,CRC Read Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRC_WR_ERR ,CRC Write Error" "No error,Error"
|
|
bitfld.long 0x00 1. " TIME_OUT_RES ,Time Out Response" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TIME_OUT_READ ,Time Out Read" "No time-out,Time-out"
|
|
group.long 0x08++3
|
|
line.long 0x00 "MMC_CLKRT,MMC/SD/SDIO Clock Rate"
|
|
bitfld.long 0x00 0.--2. " CLK_RATE ,Clock Rate (MMCLK Frequency)" "19.5 MHz,9.75 MHz,4.88 MHz,2.44 MHz,1.22 MHz,609 kHz,304 kHz,Reserved"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "MMC_SPI,SPI Mode Control Bits"
|
|
bitfld.long 0x00 3. " SPI_CS_ADDRESS ,SPI Chip-Select Address" "MMCCS0,MMCCS1"
|
|
bitfld.long 0x00 2. " SPI_CS_EN ,SPI Chip Select Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI_CRC_EN ,SPI CRC Generation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SPI_MODE ,SPI Mode" "Disabled,Enabled"
|
|
group.long 0x10++3
|
|
line.long 0x00 "MMC_CMDAT,Command/Response/Data Sequence Control"
|
|
bitfld.long 0x00 13. " SDIO_RESUME ,SDIO Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND ,SDIO Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SDIO_INT_EN ,SDIO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " STOP_TRAN ,Stop Transmission of Data" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SD_4DAT ,SD 4-Bit Data" "1-bit,4-bit"
|
|
bitfld.long 0x00 7. " DMA_EN ,DMA Enable" "Programmed IO,DMA"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INIT ,Initialization" "No initialization,Initialization"
|
|
bitfld.long 0x00 5. " BUSY ,Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STRM_BLK ,Stream Block" "Not in stream,Stream"
|
|
bitfld.long 0x00 3. " WR_RD ,Write Read" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DATA_EN ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " RES_TYPE ,Response Type (MMC/SD/SDIO/MMC-SPI/SD-SPI/SDIO-SPI) in bytes" "No response,6/6/6/1/1/1,17/17/17/2/2/2,6/6/6/5/5/5"
|
|
group.long 0x14++3
|
|
line.long 0x00 "MMC_RESTO,Expected Response Time Out"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RES_TO ,Respond to Time Out"
|
|
group.long 0x18++3
|
|
line.long 0x00 "MMC_RDTO,Expected Data Read Time Out"
|
|
hexmask.long.word 0x00 0.--15. 1. " READ_TO ,Read Time Out"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "MMC_BLKLEN,Block Length of Data Transaction"
|
|
hexmask.long.word 0x00 0.--11. 1. " BLK_EN ,Block Length"
|
|
group.long 0x20++3
|
|
line.long 0x00 "MMC_NUMBLK,Number of Blocks for Block Mode"
|
|
hexmask.long.word 0x00 0.--15. 1. " NUM_BLK ,Number of blocks for single and multiple block data transfers"
|
|
group.long 0x24++3
|
|
line.long 0x00 "MMC_PRTBUF,Partial MMC_TXFIFO FIFO Written"
|
|
bitfld.long 0x00 0. " PRT_BUF ,MMC_TXFIFO Partially Full" "Not full,Full"
|
|
group.long 0x28++3
|
|
line.long 0x00 "MMC_I_MASK,Interrupt Mask"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Enabled,Masked"
|
|
bitfld.long 0x00 11. " SDIO_INT ,SDIO Interrupt" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_STALLED ,Read Stalled" "Enabled,Masked"
|
|
bitfld.long 0x00 9. " RES_ERR ,Response Error" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DAT_ERR ,Data Error" "Enabled,Masked"
|
|
bitfld.long 0x00 7. " TINT ,Timeout Interrupt" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXFIFO_WR_REQ ,TXFIFO Write Request" "Enabled,Masked"
|
|
bitfld.long 0x00 5. " TXFIFO_RD_REQ ,RXFIFO Read Request" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_IS_OFF ,Clock is Off" "Enabled,Masked"
|
|
bitfld.long 0x00 3. " STOP_CMD ,Stop Command" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Enabled,Masked"
|
|
bitfld.long 0x00 1. " PRG_DONE ,Programming Done" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DATA_TRAN_DONE ,Data Transfer Done" "Enabled,Masked"
|
|
rgroup.long 0x2C++3
|
|
line.long 0x00 "MMC_I_REG,Interrupt Register"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Not suspended,Suspended"
|
|
bitfld.long 0x00 11. " SDIO_INT ,SDIO Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_STALLED ,Read Stalled" "Not stalled,Stalled"
|
|
bitfld.long 0x00 9. " RES_ERR ,Response Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DAT_ERR ,Data Error" "No error,Error"
|
|
bitfld.long 0x00 7. " TINT ,Timeout Interrupt" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXFIFO_WR_REQ ,TXFIFO Write Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TXFIFO_RD_REQ ,RXFIFO Read Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_IS_OFF ,Clock is Off" "Not off,Off"
|
|
bitfld.long 0x00 3. " STOP_CMD ,Stop Command" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Not responsed,Responsed"
|
|
bitfld.long 0x00 1. " PRG_DONE ,Programming Done" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DATA_TRAN_DONE ,Data Transfer Done" "Not done,Done"
|
|
group.long 0x30++3
|
|
line.long 0x00 "MMC_CMD,Index of Current Command"
|
|
bitfld.long 0x00 0.--5. " CMD_INDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x34++3
|
|
line.long 0x00 "MMC_ARGH,MSW Part of the Current Command"
|
|
hexmask.long.word 0x00 0.--15. 1. " ARG_H ,Upper 16 bits of command argument"
|
|
group.long 0x38++3
|
|
line.long 0x00 "MMC_ARGL,LSW Part of the Current Command"
|
|
hexmask.long.word 0x00 0.--15. 1. " ARG_L ,Lower 16 bits of command argument"
|
|
rgroup.long 0x3C++3
|
|
line.long 0x00 "MMC_RES,Response FIFO"
|
|
hexmask.long.word 0x00 0.--15. 1. " Data ,Two bytes of response data"
|
|
hgroup.long 0x40++3
|
|
hide.long 0x00 "MMC_RXFIFO,Receive FIFO"
|
|
in
|
|
wgroup.long 0x44++3
|
|
line.long 0x00 "MMC_TXFIFO,Transmit FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data ,One/two/four bytes of data to be transmitted to a card"
|
|
group.long 0x48++3
|
|
line.long 0x00 "MMC_RDWAIT,SDIO RD_WAIT (Stall read data transfer)"
|
|
bitfld.long 0x00 1. " RD_WAIT_START ,Read_Wait Start" "Not restarted,Restarted"
|
|
bitfld.long 0x00 0. " RD_WAIT_EN ,Read_Wait Enable" "Disabled,Enabled"
|
|
group.long 0x4C++3
|
|
line.long 0x00 "MMC_BLKS_REM,Blocks Remaining"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLKS_REM ,Number of data blocks not transferred due to various conditions"
|
|
width 0xb
|
|
tree.end
|
|
tree "MMC2"
|
|
base ad:0x42000000
|
|
width 0xe
|
|
group.long 0x00++3
|
|
line.long 0x00 "MMC_STRPCL,Control to Start and Stop MMC/SD/SDIO Clock"
|
|
bitfld.long 0x00 1. " STRT_CLK ,Start MMCLK" "No effect,Started"
|
|
bitfld.long 0x00 0. " STOP_CLK ,Stop MMCLK" "No effect,Stopped"
|
|
rgroup.long 0x04++3
|
|
line.long 0x00 "MMC_STAT,MMC/SD/SDIO Status Register"
|
|
bitfld.long 0x00 16. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Not suspended,Suspended"
|
|
bitfld.long 0x00 15. " SDIO_INT ,SDIO Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RD_STALLED ,Read Stalled" "Not stalled,Stalled"
|
|
bitfld.long 0x00 13. " END_CMD_RES ,End Command Response" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PRG_DONE ,Programming Done" "Not done,Done"
|
|
bitfld.long 0x00 11. " DATA_TRAN_DONE ,Data Transmission Done" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI_WR_ERR ,SPI Write Error" "No error,Error"
|
|
bitfld.long 0x00 9. " FLASH_ERR ,FLASH Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLK_EN ,MMCLK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RES_CRC_ERR ,Response CRC Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DAT_ERR_TOKEN ,Data Error Token" "No error,Error"
|
|
bitfld.long 0x00 3. " CRC_RD_ERR ,CRC Read Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRC_WR_ERR ,CRC Write Error" "No error,Error"
|
|
bitfld.long 0x00 1. " TIME_OUT_RES ,Time Out Response" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TIME_OUT_READ ,Time Out Read" "No time-out,Time-out"
|
|
group.long 0x08++3
|
|
line.long 0x00 "MMC_CLKRT,MMC/SD/SDIO Clock Rate"
|
|
bitfld.long 0x00 0.--2. " CLK_RATE ,Clock Rate (MMCLK Frequency)" "19.5 MHz,9.75 MHz,4.88 MHz,2.44 MHz,1.22 MHz,609 kHz,304 kHz,Reserved"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "MMC_SPI,SPI Mode Control Bits"
|
|
bitfld.long 0x00 3. " SPI_CS_ADDRESS ,SPI Chip-Select Address" "MMCCS0,MMCCS1"
|
|
bitfld.long 0x00 2. " SPI_CS_EN ,SPI Chip Select Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI_CRC_EN ,SPI CRC Generation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SPI_MODE ,SPI Mode" "Disabled,Enabled"
|
|
group.long 0x10++3
|
|
line.long 0x00 "MMC_CMDAT,Command/Response/Data Sequence Control"
|
|
bitfld.long 0x00 13. " SDIO_RESUME ,SDIO Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND ,SDIO Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SDIO_INT_EN ,SDIO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " STOP_TRAN ,Stop Transmission of Data" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SD_4DAT ,SD 4-Bit Data" "1-bit,4-bit"
|
|
bitfld.long 0x00 7. " DMA_EN ,DMA Enable" "Programmed IO,DMA"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INIT ,Initialization" "No initialization,Initialization"
|
|
bitfld.long 0x00 5. " BUSY ,Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STRM_BLK ,Stream Block" "Not in stream,Stream"
|
|
bitfld.long 0x00 3. " WR_RD ,Write Read" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DATA_EN ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " RES_TYPE ,Response Type (MMC/SD/SDIO/MMC-SPI/SD-SPI/SDIO-SPI) in bytes" "No response,6/6/6/1/1/1,17/17/17/2/2/2,6/6/6/5/5/5"
|
|
group.long 0x14++3
|
|
line.long 0x00 "MMC_RESTO,Expected Response Time Out"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RES_TO ,Respond to Time Out"
|
|
group.long 0x18++3
|
|
line.long 0x00 "MMC_RDTO,Expected Data Read Time Out"
|
|
hexmask.long.word 0x00 0.--15. 1. " READ_TO ,Read Time Out"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "MMC_BLKLEN,Block Length of Data Transaction"
|
|
hexmask.long.word 0x00 0.--11. 1. " BLK_EN ,Block Length"
|
|
group.long 0x20++3
|
|
line.long 0x00 "MMC_NUMBLK,Number of Blocks for Block Mode"
|
|
hexmask.long.word 0x00 0.--15. 1. " NUM_BLK ,Number of blocks for single and multiple block data transfers"
|
|
group.long 0x24++3
|
|
line.long 0x00 "MMC_PRTBUF,Partial MMC_TXFIFO FIFO Written"
|
|
bitfld.long 0x00 0. " PRT_BUF ,MMC_TXFIFO Partially Full" "Not full,Full"
|
|
group.long 0x28++3
|
|
line.long 0x00 "MMC_I_MASK,Interrupt Mask"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Enabled,Masked"
|
|
bitfld.long 0x00 11. " SDIO_INT ,SDIO Interrupt" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_STALLED ,Read Stalled" "Enabled,Masked"
|
|
bitfld.long 0x00 9. " RES_ERR ,Response Error" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DAT_ERR ,Data Error" "Enabled,Masked"
|
|
bitfld.long 0x00 7. " TINT ,Timeout Interrupt" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXFIFO_WR_REQ ,TXFIFO Write Request" "Enabled,Masked"
|
|
bitfld.long 0x00 5. " TXFIFO_RD_REQ ,RXFIFO Read Request" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_IS_OFF ,Clock is Off" "Enabled,Masked"
|
|
bitfld.long 0x00 3. " STOP_CMD ,Stop Command" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Enabled,Masked"
|
|
bitfld.long 0x00 1. " PRG_DONE ,Programming Done" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DATA_TRAN_DONE ,Data Transfer Done" "Enabled,Masked"
|
|
rgroup.long 0x2C++3
|
|
line.long 0x00 "MMC_I_REG,Interrupt Register"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Not suspended,Suspended"
|
|
bitfld.long 0x00 11. " SDIO_INT ,SDIO Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_STALLED ,Read Stalled" "Not stalled,Stalled"
|
|
bitfld.long 0x00 9. " RES_ERR ,Response Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DAT_ERR ,Data Error" "No error,Error"
|
|
bitfld.long 0x00 7. " TINT ,Timeout Interrupt" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXFIFO_WR_REQ ,TXFIFO Write Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TXFIFO_RD_REQ ,RXFIFO Read Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_IS_OFF ,Clock is Off" "Not off,Off"
|
|
bitfld.long 0x00 3. " STOP_CMD ,Stop Command" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Not responsed,Responsed"
|
|
bitfld.long 0x00 1. " PRG_DONE ,Programming Done" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DATA_TRAN_DONE ,Data Transfer Done" "Not done,Done"
|
|
group.long 0x30++3
|
|
line.long 0x00 "MMC_CMD,Index of Current Command"
|
|
bitfld.long 0x00 0.--5. " CMD_INDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x34++3
|
|
line.long 0x00 "MMC_ARGH,MSW Part of the Current Command"
|
|
hexmask.long.word 0x00 0.--15. 1. " ARG_H ,Upper 16 bits of command argument"
|
|
group.long 0x38++3
|
|
line.long 0x00 "MMC_ARGL,LSW Part of the Current Command"
|
|
hexmask.long.word 0x00 0.--15. 1. " ARG_L ,Lower 16 bits of command argument"
|
|
rgroup.long 0x3C++3
|
|
line.long 0x00 "MMC_RES,Response FIFO"
|
|
hexmask.long.word 0x00 0.--15. 1. " Data ,Two bytes of response data"
|
|
hgroup.long 0x40++3
|
|
hide.long 0x00 "MMC_RXFIFO,Receive FIFO"
|
|
in
|
|
wgroup.long 0x44++3
|
|
line.long 0x00 "MMC_TXFIFO,Transmit FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data ,One/two/four bytes of data to be transmitted to a card"
|
|
group.long 0x48++3
|
|
line.long 0x00 "MMC_RDWAIT,SDIO RD_WAIT (Stall read data transfer)"
|
|
bitfld.long 0x00 1. " RD_WAIT_START ,Read_Wait Start" "Not restarted,Restarted"
|
|
bitfld.long 0x00 0. " RD_WAIT_EN ,Read_Wait Enable" "Disabled,Enabled"
|
|
group.long 0x4C++3
|
|
line.long 0x00 "MMC_BLKS_REM,Blocks Remaining"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLKS_REM ,Number of data blocks not transferred due to various conditions"
|
|
width 0xb
|
|
tree.end
|
|
tree "MMC3"
|
|
base ad:0x42500000
|
|
width 0xe
|
|
group.long 0x00++3
|
|
line.long 0x00 "MMC_STRPCL,Control to Start and Stop MMC/SD/SDIO Clock"
|
|
bitfld.long 0x00 1. " STRT_CLK ,Start MMCLK" "No effect,Started"
|
|
bitfld.long 0x00 0. " STOP_CLK ,Stop MMCLK" "No effect,Stopped"
|
|
rgroup.long 0x04++3
|
|
line.long 0x00 "MMC_STAT,MMC/SD/SDIO Status Register"
|
|
bitfld.long 0x00 16. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Not suspended,Suspended"
|
|
bitfld.long 0x00 15. " SDIO_INT ,SDIO Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RD_STALLED ,Read Stalled" "Not stalled,Stalled"
|
|
bitfld.long 0x00 13. " END_CMD_RES ,End Command Response" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PRG_DONE ,Programming Done" "Not done,Done"
|
|
bitfld.long 0x00 11. " DATA_TRAN_DONE ,Data Transmission Done" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI_WR_ERR ,SPI Write Error" "No error,Error"
|
|
bitfld.long 0x00 9. " FLASH_ERR ,FLASH Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLK_EN ,MMCLK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RES_CRC_ERR ,Response CRC Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DAT_ERR_TOKEN ,Data Error Token" "No error,Error"
|
|
bitfld.long 0x00 3. " CRC_RD_ERR ,CRC Read Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRC_WR_ERR ,CRC Write Error" "No error,Error"
|
|
bitfld.long 0x00 1. " TIME_OUT_RES ,Time Out Response" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TIME_OUT_READ ,Time Out Read" "No time-out,Time-out"
|
|
group.long 0x08++3
|
|
line.long 0x00 "MMC_CLKRT,MMC/SD/SDIO Clock Rate"
|
|
bitfld.long 0x00 0.--2. " CLK_RATE ,Clock Rate (MMCLK Frequency)" "19.5 MHz,9.75 MHz,4.88 MHz,2.44 MHz,1.22 MHz,609 kHz,304 kHz,Reserved"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "MMC_SPI,SPI Mode Control Bits"
|
|
bitfld.long 0x00 3. " SPI_CS_ADDRESS ,SPI Chip-Select Address" "MMCCS0,MMCCS1"
|
|
bitfld.long 0x00 2. " SPI_CS_EN ,SPI Chip Select Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI_CRC_EN ,SPI CRC Generation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SPI_MODE ,SPI Mode" "Disabled,Enabled"
|
|
group.long 0x10++3
|
|
line.long 0x00 "MMC_CMDAT,Command/Response/Data Sequence Control"
|
|
bitfld.long 0x00 13. " SDIO_RESUME ,SDIO Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND ,SDIO Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SDIO_INT_EN ,SDIO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " STOP_TRAN ,Stop Transmission of Data" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SD_4DAT ,SD 4-Bit Data" "1-bit,4-bit"
|
|
bitfld.long 0x00 7. " DMA_EN ,DMA Enable" "Programmed IO,DMA"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INIT ,Initialization" "No initialization,Initialization"
|
|
bitfld.long 0x00 5. " BUSY ,Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STRM_BLK ,Stream Block" "Not in stream,Stream"
|
|
bitfld.long 0x00 3. " WR_RD ,Write Read" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DATA_EN ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " RES_TYPE ,Response Type (MMC/SD/SDIO/MMC-SPI/SD-SPI/SDIO-SPI) in bytes" "No response,6/6/6/1/1/1,17/17/17/2/2/2,6/6/6/5/5/5"
|
|
group.long 0x14++3
|
|
line.long 0x00 "MMC_RESTO,Expected Response Time Out"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RES_TO ,Respond to Time Out"
|
|
group.long 0x18++3
|
|
line.long 0x00 "MMC_RDTO,Expected Data Read Time Out"
|
|
hexmask.long.word 0x00 0.--15. 1. " READ_TO ,Read Time Out"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "MMC_BLKLEN,Block Length of Data Transaction"
|
|
hexmask.long.word 0x00 0.--11. 1. " BLK_EN ,Block Length"
|
|
group.long 0x20++3
|
|
line.long 0x00 "MMC_NUMBLK,Number of Blocks for Block Mode"
|
|
hexmask.long.word 0x00 0.--15. 1. " NUM_BLK ,Number of blocks for single and multiple block data transfers"
|
|
group.long 0x24++3
|
|
line.long 0x00 "MMC_PRTBUF,Partial MMC_TXFIFO FIFO Written"
|
|
bitfld.long 0x00 0. " PRT_BUF ,MMC_TXFIFO Partially Full" "Not full,Full"
|
|
group.long 0x28++3
|
|
line.long 0x00 "MMC_I_MASK,Interrupt Mask"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Enabled,Masked"
|
|
bitfld.long 0x00 11. " SDIO_INT ,SDIO Interrupt" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_STALLED ,Read Stalled" "Enabled,Masked"
|
|
bitfld.long 0x00 9. " RES_ERR ,Response Error" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DAT_ERR ,Data Error" "Enabled,Masked"
|
|
bitfld.long 0x00 7. " TINT ,Timeout Interrupt" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXFIFO_WR_REQ ,TXFIFO Write Request" "Enabled,Masked"
|
|
bitfld.long 0x00 5. " TXFIFO_RD_REQ ,RXFIFO Read Request" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_IS_OFF ,Clock is Off" "Enabled,Masked"
|
|
bitfld.long 0x00 3. " STOP_CMD ,Stop Command" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Enabled,Masked"
|
|
bitfld.long 0x00 1. " PRG_DONE ,Programming Done" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DATA_TRAN_DONE ,Data Transfer Done" "Enabled,Masked"
|
|
rgroup.long 0x2C++3
|
|
line.long 0x00 "MMC_I_REG,Interrupt Register"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND_ACK ,SDIO Suspend Acknowledge" "Not suspended,Suspended"
|
|
bitfld.long 0x00 11. " SDIO_INT ,SDIO Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_STALLED ,Read Stalled" "Not stalled,Stalled"
|
|
bitfld.long 0x00 9. " RES_ERR ,Response Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DAT_ERR ,Data Error" "No error,Error"
|
|
bitfld.long 0x00 7. " TINT ,Timeout Interrupt" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXFIFO_WR_REQ ,TXFIFO Write Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TXFIFO_RD_REQ ,RXFIFO Read Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_IS_OFF ,Clock is Off" "Not off,Off"
|
|
bitfld.long 0x00 3. " STOP_CMD ,Stop Command" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Not responsed,Responsed"
|
|
bitfld.long 0x00 1. " PRG_DONE ,Programming Done" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DATA_TRAN_DONE ,Data Transfer Done" "Not done,Done"
|
|
group.long 0x30++3
|
|
line.long 0x00 "MMC_CMD,Index of Current Command"
|
|
bitfld.long 0x00 0.--5. " CMD_INDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x34++3
|
|
line.long 0x00 "MMC_ARGH,MSW Part of the Current Command"
|
|
hexmask.long.word 0x00 0.--15. 1. " ARG_H ,Upper 16 bits of command argument"
|
|
group.long 0x38++3
|
|
line.long 0x00 "MMC_ARGL,LSW Part of the Current Command"
|
|
hexmask.long.word 0x00 0.--15. 1. " ARG_L ,Lower 16 bits of command argument"
|
|
rgroup.long 0x3C++3
|
|
line.long 0x00 "MMC_RES,Response FIFO"
|
|
hexmask.long.word 0x00 0.--15. 1. " Data ,Two bytes of response data"
|
|
hgroup.long 0x40++3
|
|
hide.long 0x00 "MMC_RXFIFO,Receive FIFO"
|
|
in
|
|
wgroup.long 0x44++3
|
|
line.long 0x00 "MMC_TXFIFO,Transmit FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data ,One/two/four bytes of data to be transmitted to a card"
|
|
group.long 0x48++3
|
|
line.long 0x00 "MMC_RDWAIT,SDIO RD_WAIT (Stall read data transfer)"
|
|
bitfld.long 0x00 1. " RD_WAIT_START ,Read_Wait Start" "Not restarted,Restarted"
|
|
bitfld.long 0x00 0. " RD_WAIT_EN ,Read_Wait Enable" "Disabled,Enabled"
|
|
group.long 0x4C++3
|
|
line.long 0x00 "MMC_BLKS_REM,Blocks Remaining"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLKS_REM ,Number of data blocks not transferred due to various conditions"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "LCD Controller"
|
|
base ad:0x44000000
|
|
width 0x8
|
|
tree "Control and Status Registers"
|
|
group.long 0x00++3
|
|
line.long 0x00 "LCCR0,LCD Controller Control Register 0"
|
|
bitfld.long 0x00 27. " DELAY_LBIAS ,L_BIAS Delay " "Not delayed,Delayed"
|
|
bitfld.long 0x00 26. " LDDALT ,LDD Alternate Mapping Control Bit" "0&(5R)&(5G)&(5B),(5R)&(6G)&(5B)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SETALLWAYS ,Must be set to 1" "Reserved,1"
|
|
bitfld.long 0x00 24. " CMDIM ,LCD Command Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RDSTM ,LCD Read Status Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " LCDT ,LCD Panel Type" "No buffer,Buffer"
|
|
textline " "
|
|
bitfld.long 0x00 21. " OUM ,Output FIFO Underrun Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " BSM0 ,Branch Status Mask" "Not masked,Masked"
|
|
textline " "
|
|
hexmask.long.byte 0x00 12.--19. 1. " PDD ,Palette DMA Request Delay"
|
|
bitfld.long 0x00 11. " QDM ,LCD Quick Disable Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DIS ,LCD Disable" "Not enabled,Disabled"
|
|
bitfld.long 0x00 7. " PAS ,Passive/Active Display Select" "Passive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 6. " EOFM0 ,End of Frame Mask for Channel 0" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " IUM ,Input FIFO Underrun Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SOFM0 ,Start of Frame Mask for Channel 0" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " LDM ,LCD Disable Done Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENB ,LCD Controller Enable" "Disabled,Enabled"
|
|
group.long 0x04++3
|
|
line.long 0x00 "LCCR1,LCD Controller Control Register 1"
|
|
hexmask.long.word 0x00 24.--31. 1. 1. " BLW ,Beginning-of-Line Pixel Clock Wait Count"
|
|
hexmask.long.word 0x00 16.--23. 1. 1. " ELW ,End-of-Line Pixel Clock Wait Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 10.--15. 1. 1. " HSW ,Horizontal Sync Pulse Width"
|
|
hexmask.long.word 0x00 0.--9. 1. 1. " PPL ,Pixels per Line for the Base Frame"
|
|
group.long 0x08++3
|
|
line.long 0x00 "LCCR2,LCD Controller Control Register 2"
|
|
hexmask.long.word 0x00 24.--31. 1. 1. " BFW ,Beginning-of-Frame Pixel Clock Wait Count"
|
|
hexmask.long.word 0x00 16.--23. 1. 1. " EFW ,End-of-Frame Pixel Clock Wait Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 10.--15. 1. 1. " VSW ,Vertical Sync Pulse Width"
|
|
hexmask.long.word 0x00 0.--9. 1. 1. " LPP ,Lines per Panel for the Base Frame"
|
|
group.long 0x0c++3
|
|
line.long 0x00 "LCCR3,LCD Controller Control Register 3"
|
|
bitfld.long 0x00 30.--31. " PDFOR ,Pixel Data Format" "Format 1,Format 2,Format 3,Format 4"
|
|
bitfld.long 0x00 27. " DPC ,Double Pixel Clock Mode" "Not double,Double"
|
|
textline " "
|
|
sif (cpu()=="PXA310")
|
|
bitfld.long 0x00 24.--26. 29. " BPP ,Pits per Pixel" "Reserved,Reserved,Reserved,8,16,18,18 pack,19,19 pack,24,25,18,18 pack,19,Reserved,Reserved"
|
|
else
|
|
bitfld.long 0x00 24.--26. 29. " BPP ,Pits per Pixel" "Reserved,Reserved,Reserved,8,16,18,18 pack,19,19 pack,24,25,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
endif
|
|
bitfld.long 0x00 23. " OEP ,Output Enable Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PCP ,Pixel Clock Polarity" "Rising,Falling"
|
|
bitfld.long 0x00 21. " HSP ,Horizontal Sync Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 20. " VSP ,Vertical Sync Polarity" "High,Low"
|
|
bitfld.long 0x00 16.--19. " API ,AC Bias Transitions per Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ACB ,AC Bias Pin Frequency"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCD ,Pixel Clock Divisor"
|
|
group.long 0x10++3
|
|
line.long 0x00 "LCCR4,LCD Controller Control Register 4"
|
|
bitfld.long 0x00 31. " PCDDIV ,PCD Divisor Selection" "LCLK/2*(PCD+1),LCLK/(PCD+1)"
|
|
bitfld.long 0x00 26. " REOFM6 ,Real End of Fram mask for Command (Channel 6)" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " PAL_FOR ,Palette Data Format" "16,25 for 16 bpp,25 for 18 bpp,25 for 24 bpp"
|
|
bitfld.long 0x00 14. " REOFM5 ,Real End of Frame Mask for Coursor (Channel 5)" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " REOFM4 ,Real End of Frame Mask for Overlay 2/Cr (Channel 4)" "Enabled,Masked"
|
|
bitfld.long 0x00 12. " REOFM3 ,Real End of Frame Mask for Overlay 2/Cb (Channel 3)" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REOFM2 ,Real End of Frame Mask for Overlay 2/Y (Channel 2)" "Enabled,Masked"
|
|
bitfld.long 0x00 10. " REOFM1 ,Real End of Frame Mask for Overlay 1 (Channel 1)" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " REOFM0 ,Real End of Frame Mask for Base (Channel 0)" "Enabled,Masked"
|
|
bitfld.long 0x00 6.--8. " K3 ,Multiplication Constant for Green for Half Transparency" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,1"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " K2 ,Multiplication Constant for Blue for Half Transparency" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,1"
|
|
bitfld.long 0x00 0.--2. " K1 ,Multiplication Constant for Red for Half Transparency" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,1"
|
|
group.long 0x14++3
|
|
line.long 0x00 "LCCR5,LCD Controller Control Register 5"
|
|
bitfld.long 0x00 29. " IUM6 ,Input FIFO Underrun Mask for Command Data" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " IUM5 ,Input FIFO Underrun Mask for Cursor" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IUM4 ,Input FIFO Underrun Mask for Overlay 2" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " IUM3 ,Input FIFO Underrun Mask for Overlay 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IUM2 ,Input FIFO Underrun Mask for Overlay 2" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " IUM1 ,Input FIFO Underrun Mask for Overlay 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BSM6 ,Branch Mask for Command Register (DMA Channel 6)" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " BSM5 ,Branch Mask for Cursor (DMA Channel 5)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BSM4 ,Branch Mask for Overlay 2 (DMA Channel 4)" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " BSM3 ,Branch Mask for Overlay 2 (DMA Channel 3)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BSM2 ,Branch Mask for Overlay 2 (DMA Channel 2)" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " BSM1 ,Branch Mask for Overlay 1 (DMA Channel 1)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EOFM6 ,End of Frame Mask for Command Data (DMA Channel 6)" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " EOFM5 ,End of Frame Mask for Cursor (DMA Channel 5)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EOFM4 ,End of Frame Mask for Overlay 2 (DMA Channel 4)" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " EOFM3 ,End of Frame Mask for Overlay 2 (DMA Channel 3)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EOFM2 ,End of Frame Mask for Overlay 2 (DMA Channel 2)" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " EOFM1 ,End of Frame Mask for Overlay (DMA Channel 1)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SOFM6 ,End of Frame Mask for Command Data (DMA Channel 6)" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SOFM5 ,End of Frame Mask for Cursor (DMA Channel 5)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SOFM4 ,End of Frame Mask for Overlay 2 (DMA Channel 4)" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SOFM3 ,End of Frame Mask for Overlay 2 (DMA Channel 3)" "Not masked,Mask"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SOFM2 ,End of Frame Mask for Overlay 2 (DMA Channel 2)" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SOFM1 ,End of Frame Mask for Overlay 1 (DMA Channel 1)" "Not masked,Masked"
|
|
group.long 0x18++3
|
|
line.long 0x00 "LCCR6,LCD Controller Control Register 6"
|
|
bitfld.long 0x00 31. " BF_OFF ,Turn off fetching the Base frame from the frame buffer" "Fetched,Not fetched"
|
|
hexmask.long.byte 0x00 16.--23. 1. " B_RED ,Base Red Value"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " B_GREEN ,Base Green Value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " B_BLUE ,Base Blue Value"
|
|
tree.end
|
|
tree "DMA Channels Registers"
|
|
group.long 0x20++3
|
|
line.long 0x00 "FBR0,DMA Channel 0 Frame Branch Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x24++3
|
|
line.long 0x00 "FBR1,DMA Channel 1 Frame Branch Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x28++3
|
|
line.long 0x00 "FBR2,DMA Channel 2 Frame Branch Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x2C++3
|
|
line.long 0x00 "FBR3,DMA Channel 3 Frame Branch Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x30++3
|
|
line.long 0x00 "FBR4,DMA Channel 4 Frame Branch Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x34++3
|
|
line.long 0x00 "LCSR1,LCD Controller Status Register 1"
|
|
eventfld.long 0x00 29. " IU6 ,Input FIFO Underrun for Channel 6" "No underrun,Underrun"
|
|
eventfld.long 0x00 28. " IU5 ,Input FIFO Underrun for Channel 5" "No underrun,Underrun"
|
|
textline " "
|
|
eventfld.long 0x00 27. " IU4 ,Input FIFO Underrun for Channel 4" "No underrun,Underrun"
|
|
eventfld.long 0x00 26. " IU3 ,Input FIFO Underrun for Channel 3" "No underrun,Underrun"
|
|
textline " "
|
|
eventfld.long 0x00 25. " IU2 ,Input FIFO Underrun for Channel 2" "No underrun,Underrun"
|
|
textline " "
|
|
eventfld.long 0x00 21. " BS6 ,Branch Status for Command Register (Channel 6)" "Not branched,Branched"
|
|
eventfld.long 0x00 20. " BS5 ,Branch Status for Cursor (Channel 5)" "Not branched,Branched"
|
|
textline " "
|
|
eventfld.long 0x00 19. " BS4 ,Branch Status for Overlay 2 (Channel 4)" "Not branched,Branched"
|
|
eventfld.long 0x00 18. " BS3 ,Branch Status for Overlay 2 (Channel 3)" "Not branched,Branched"
|
|
textline " "
|
|
eventfld.long 0x00 17. " BS2 ,Branch Status for Overlay 2 (Channel 2)" "Not branched,Branched"
|
|
eventfld.long 0x00 16. " BS1 ,Branch Status for Overlay 1 (Channel 1)" "Not branched,Branched"
|
|
textline " "
|
|
eventfld.long 0x00 13. " EOF6 ,End of Frame for Command Data (Channel 6)" "No ended,Ended"
|
|
eventfld.long 0x00 12. " EOF5 ,End of Frame for Cursor (Channel 5)" "No ended,Ended"
|
|
textline " "
|
|
eventfld.long 0x00 11. " EOF4 ,End of Frame for Overlay 2 (Channel 4)" "No ended,Ended"
|
|
eventfld.long 0x00 10. " EOF3 ,End of Frame for Overlay 2 (Channel 3)" "No ended,Ended"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EOF2 ,End of Frame for Overlay 2 (Channel 2)" "No ended,Ended"
|
|
eventfld.long 0x00 8. " EOF1 ,End of Frame for Status Channel 1" "No ended,Ended"
|
|
textline " "
|
|
eventfld.long 0x00 5. " SOF6 ,Start of Frame for Command Data" "No started,Started"
|
|
eventfld.long 0x00 4. " SOF5 ,Start of Frame for Cursor" "No started,Started"
|
|
textline " "
|
|
eventfld.long 0x00 3. " SOF4 ,Start of Frame for Overlay 2" "No started,Started"
|
|
eventfld.long 0x00 2. " SOF3 ,Start of Frame for Overlay 2" "No started,Started"
|
|
textline " "
|
|
eventfld.long 0x00 1. " SOF2 ,Start of Frame for Overlay 2" "No started,Started"
|
|
eventfld.long 0x00 0. " SOF1 ,Start of Frame for Overlay 1" "No started,Started"
|
|
group.long 0x38++3
|
|
line.long 0x00 "LCSR0,LCD Controller Status Register 0"
|
|
bitfld.long 0x00 28.--30. " BER_CH ,Bus Error Channel Number" "0,1,2,3,4,5,6,7"
|
|
eventfld.long 0x00 19. " REOF6 ,Real End of Frame Status for Command (Channel 6)" "No ended,Ended"
|
|
textline " "
|
|
eventfld.long 0x00 18. " REOF5 ,Real End of Frame Status for Cursor (Channel 5)" "No ended,Ended"
|
|
eventfld.long 0x00 17. " REOF4 ,Real End of Frame Status for Overlay 2/Cr" "No ended,Ended"
|
|
textline " "
|
|
eventfld.long 0x00 16. " REOF3 ,Real End of Frame Status for Overlay 2/Cb (Channel 3)" "No ended,Ended"
|
|
eventfld.long 0x00 15. " REOF2 ,Real End of Frame Status for Overlay 2/Y (Channel 2)" "No ended,Ended"
|
|
textline " "
|
|
eventfld.long 0x00 14. " REOF1 ,Real End of Frame Status for Overlay 1 (Channel 1)" "No ended,Ended"
|
|
eventfld.long 0x00 13. " REOF0 ,Real End of Frame Status for Base (Channel 0)" "No ended,Ended"
|
|
textline " "
|
|
eventfld.long 0x00 12. " CMD_INT ,Command Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 11. " RD_ST ,Read Status" "No read,Read"
|
|
textline " "
|
|
eventfld.long 0x00 10. " SINT ,Subsequent Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " BS0 ,Branch Status for Base" "Not branched,Branched"
|
|
textline " "
|
|
eventfld.long 0x00 8. " EOF0 ,End of Frame Status for Base (Channel 0)" "No ended,Ended"
|
|
eventfld.long 0x00 7. " QD ,LCD Quick Disable Status" "Not disabled,Disabled"
|
|
textline " "
|
|
eventfld.long 0x00 6. " OU ,Output FIFO Underrun" "No underrun,Underrun"
|
|
eventfld.long 0x00 5. " IU1 ,Input FIFO Underrun for Channel 1" "No underrun,Underrun"
|
|
textline " "
|
|
eventfld.long 0x00 4. " IU0 ,Input FIFO Underrun for Channel 0" "No underrun,Underrun"
|
|
eventfld.long 0x00 3. " ABC ,AC Bias Count Status" "Not decremented,Decremented"
|
|
textline " "
|
|
eventfld.long 0x00 2. " BER ,Bus Error Status" "No error,Error"
|
|
eventfld.long 0x00 1. " SOF0 ,Start of Frame Status for Base (Channel 0)" "Not started,Started"
|
|
textline " "
|
|
eventfld.long 0x00 0. " LDD ,LCD Disable Done Flag" "Not done,Done"
|
|
rgroup.long 0x3C++3
|
|
line.long 0x00 "LIIDR,LCD Controller Interrupt ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " IFRAMEID ,Interrupt Frame ID"
|
|
group.long 0x40++3
|
|
line.long 0x00 "TRGBR,TMED RGB Seed Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TBS ,TMED Blue Seed Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TGS ,TMED Green Seed Value"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TRS ,TMED Red Seed Value"
|
|
group.long 0x44++3
|
|
line.long 0x00 "TCR,TMED Control Register"
|
|
bitfld.long 0x00 14. " TED ,TMED Energy Distribution Select" "Scheme 1,Scheme 2"
|
|
bitfld.long 0x00 12.--13. " TSCS ,TMED Shades per Color Select (red/blue/green)" "33/65/33,65,129,256"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " THBS ,TMED Horizontal Beat Suppression" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " TVBS ,TMED Vertical Beat Suppression" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TM1EN ,TMED Method 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TM2EN ,TMED Method 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TM1S ,TMED Method 1 Select" "Scheme 1,Scheme 2"
|
|
bitfld.long 0x00 0. " TM2S ,TMED Method 2 Select" "Scheme 1,Scheme 2"
|
|
group.long 0x50++3
|
|
line.long 0x00 "OVL1C1,Overlay 1 Control Register 1"
|
|
bitfld.long 0x00 31. " O1EN ,Enable bit for Overaly" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--23. " BPP1 ,Bits per Pixel for Overlay" "24-bit,Reserved,Reserved,8 bpp,16 bpp,18 bpp,18 bpp,19 bpp,19 bpp,24 bpp,25 bpp,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
hexmask.long.word 0x00 10.--19. 1. " LPO1 ,Number of Lines for Overlay"
|
|
hexmask.long.word 0x00 0.--9. 1. " PPL1 ,Pixels per Line for Overlay 1 Frame"
|
|
group.long 0x60++3
|
|
line.long 0x00 "OVL1C2,Overlay 1 Control Register 2"
|
|
hexmask.long.word 0x00 10.--19. 1. " O1YPOS ,Vertical Position of the Upper Left-Most Pixel of Overlay 1 Window"
|
|
hexmask.long.word 0x00 0.--9. 1. " O1XPOS ,Horizontal Position of the Upper Left-Most Pixel of Overlay 1 Window"
|
|
group.long 0x70++3
|
|
line.long 0x00 "OVL2C1,Overlay 2 Control Register 1"
|
|
bitfld.long 0x00 31. " O2EN ,Enable bit for Overaly" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--23. " BPP2 ,Bits per Pixel for Overlay 2" "24-bit,Reserved,Reserved,8 bpp,16 bpp,18 bpp,18 bpp,19 bpp,19 bpp,24 bpp,25 bpp,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
hexmask.long.word 0x00 10.--19. 1. " LPO2 ,Number of Lines for Overlay 2 Frame"
|
|
hexmask.long.word 0x00 0.--9. 1. " PPL2 ,Pixels per Line for Overlay 2 Frame"
|
|
group.long 0x80++3
|
|
line.long 0x00 "OVL2C2,Overlay 2 Control Register 2"
|
|
bitfld.long 0x00 20.--22. " FOR ,Format" "RGB,YCbCr 4:4:4 Packed,YCbCr 4:4:4 Planar,YCbCr 4:2:2 Planar,YCbCr 4:2:0 Planar,Reserved,Reserved,Reserved"
|
|
hexmask.long.word 0x00 10.--19. 1. " O2YPOS ,Vertical Position of the Upper Left-Most Pixel of Overlay 2"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " O2XPOS ,Horizontal Position of the Upper Left-Most Pixel of Overlay 2"
|
|
group.long 0x90++3
|
|
line.long 0x00 "CCR,Cursor Control Register"
|
|
bitfld.long 0x00 31. " CEN ,Cursor Enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 15.--24. 1. " CYPOS ,Vertical Position of the Cursor"
|
|
textline " "
|
|
hexmask.long.word 0x00 5.--14. 1. " CXPOS ,Horizontal Position of the Cursor"
|
|
bitfld.long 0x00 0.--2. " CURMS ,Cursor Mode Select" "32x32x2 bpp 2-color,32x32x2 bpp 3-color,32x32x2 bpp 4-color,64x64x2 bpp 2-color,64x64x2 bpp 3-color,64x64x2 bpp 4-color,128x128x1 bpp 2-color,128x128x1 bpp 1-color"
|
|
group.long 0x100++3
|
|
line.long 0x00 "CMDCR,Command Control Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SYNC_CNT ,Synchronous Count"
|
|
group.long 0x104++3
|
|
line.long 0x00 "PRSR,Panel Read Status Register"
|
|
bitfld.long 0x00 10. " CON_NT ,Continue to Next Command" "Wait,Continue"
|
|
bitfld.long 0x00 9. " ST_OK ,Status OK" "Not OK,OK"
|
|
textline " "
|
|
bitfld.long 0x00 8. " A0 ,Read Data Source" "Status reg,Buffer RAM"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Panel Data"
|
|
group.long 0x110++3
|
|
line.long 0x00 "FBR5,DMA Channel 5 Frame Branch Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "Not branched,Branched"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x114++3
|
|
line.long 0x00 "FBR6,DMA Channel 6 Frame Branch Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "Not branched,Branched"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x200++3
|
|
line.long 0x00 "FDADR0,DMA Channel 0 Frame Descriptor Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
group.long 0x204++3
|
|
line.long 0x00 "FSADR0,DMA Channel 0 Frame Source Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCCRADDR ,Frame Source Address Address"
|
|
rgroup.long 0x208++3
|
|
line.long 0x00 "FIDR0,DMA Channel 0 Frame ID Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " FRAMEID ,Frame ID"
|
|
rgroup.long 0x20c++3
|
|
line.long 0x00 "LDCMD0,LCD DMA Channel 0 Command Register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "Frame,Palette"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor" "Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "Not started,Started"
|
|
bitfld.long 0x00 21. " EOFINT ,End of Frame Interrupt Mask" "Not ended,Ended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length"
|
|
group.long 0x210++3
|
|
line.long 0x00 "FDADR1,DMA Channel 1 Frame Descriptor Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
group.long 0x214++3
|
|
line.long 0x00 "FSADR1,DMA Channel 1 Frame Source Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCCRADDR ,Frame Source Address Address"
|
|
group.long 0x218++3
|
|
line.long 0x00 "FIDR1,DMA Channel 1 Frame ID Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " FRAMEID ,Frame ID"
|
|
group.long 0x21c++3
|
|
line.long 0x00 "LDCMD1,LCD DMA Channel 1 Command Register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "Frame,Palette"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor" "Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "Not started,Started"
|
|
bitfld.long 0x00 21. " EOFINT ,End of Frame Interrupt Mask" "Not ended,Ended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length"
|
|
group.long 0x220++3
|
|
line.long 0x00 "FDADR2,DMA Channel 2 Frame Descriptor Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
group.long 0x224++3
|
|
line.long 0x00 "FSADR2,DMA Channel 2 Frame Source Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCCRADDR ,Frame Source Address Address"
|
|
group.long 0x228++3
|
|
line.long 0x00 "FIDR2,DMA Channel 2 Frame ID Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " FRAMEID ,Frame ID"
|
|
group.long 0x22c++3
|
|
line.long 0x00 "LDCMD2,LCD DMA Channel 2 Command Register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "Frame,Palette"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor" "Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "Not started,Started"
|
|
bitfld.long 0x00 21. " EOFINT ,End of Frame Interrupt Mask" "Not ended,Ended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length"
|
|
group.long 0x230++3
|
|
line.long 0x00 "FDADR3,DMA Channel 3 Frame Descriptor Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
group.long 0x234++3
|
|
line.long 0x00 "FSADR3,DMA Channel 3 Frame Source Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCCRADDR ,Frame Source Address Address"
|
|
group.long 0x238++3
|
|
line.long 0x00 "FIDR3,DMA Channel 3 Frame ID Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " FRAMEID ,Frame ID"
|
|
group.long 0x23c++3
|
|
line.long 0x00 "LDCMD3,LCD DMA Channel 3 Command Register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "Frame,Palette"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor" "Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "Not started,Started"
|
|
bitfld.long 0x00 21. " EOFINT ,End of Frame Interrupt Mask" "Not ended,Ended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length"
|
|
group.long 0x240++3
|
|
line.long 0x00 "FDADR4,DMA Channel 4 Frame Descriptor Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
group.long 0x244++3
|
|
line.long 0x00 "FSADR4,DMA Channel 4 Frame Source Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCCRADDR ,Frame Source Address Address"
|
|
group.long 0x248++3
|
|
line.long 0x00 "FIDR4,DMA Channel 4 Frame ID Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " FRAMEID ,Frame ID"
|
|
group.long 0x24c++3
|
|
line.long 0x00 "LDCMD4,LCD DMA Channel 4 Command Register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "Frame,Palette"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor" "Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "Not started,Started"
|
|
bitfld.long 0x00 21. " EOFINT ,End of Frame Interrupt Mask" "Not ended,Ended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length"
|
|
group.long 0x250++3
|
|
line.long 0x00 "FDADR5,DMA Channel 5 Frame Descriptor Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
group.long 0x254++3
|
|
line.long 0x00 "FSADR5,DMA Channel 5 Frame Source Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCCRADDR ,Frame Source Address Address"
|
|
group.long 0x258++3
|
|
line.long 0x00 "FIDR5,DMA Channel 5 Frame ID Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " FRAMEID ,Frame ID"
|
|
group.long 0x25c++3
|
|
line.long 0x00 "LDCMD5,LCD DMA Channel 5 Command Register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "Frame,Palette"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor" "Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "Not started,Started"
|
|
bitfld.long 0x00 21. " EOFINT ,End of Frame Interrupt Mask" "Not ended,Ended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length"
|
|
group.long 0x260++3
|
|
line.long 0x00 "FDADR6,DMA Channel 6 Frame Descriptor Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRADDR ,Descriptor Address"
|
|
group.long 0x264++3
|
|
line.long 0x00 "FSADR6,DMA Channel 6 Frame Source Address Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCCRADDR ,Frame Source Address Address"
|
|
group.long 0x268++3
|
|
line.long 0x00 "FIDR6,DMA Channel 6 Frame ID Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " FRAMEID ,Frame ID"
|
|
group.long 0x26c++3
|
|
line.long 0x00 "LDCMD6,LCD DMA Channel 6 Command Register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "Frame,Palette"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor" "Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Set LCSR0[REOFx]/LCSR1[EOFx]/LCSR0[EOF0],Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "Not started,Started"
|
|
bitfld.long 0x00 21. " EOFINT ,End of Frame Interrupt Mask" "Not ended,Ended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "Mini-LCD Controller"
|
|
base ad:0x46000000
|
|
width 0xa
|
|
group.long 0x00++3
|
|
line.long 0x00 "MLCCR0,Mini-LCD Controller Control Register 0"
|
|
bitfld.long 0x00 11. " OEP ,Output Enable Polarity" "High,Low"
|
|
bitfld.long 0x00 10. " PCP ,Pixel Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VSP ,Vertical Sync Polarity" "High,Low"
|
|
bitfld.long 0x00 8. " HSP ,Horizontal Sync Polarity" "High,Low"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PCD ,Pixel Clock Divisor"
|
|
group.long 0x04++3
|
|
line.long 0x00 "MLCCR1,Mini-LCD Controller Control Register 1"
|
|
hexmask.long.word 0x00 24.--31. 1. 1. " BLW ,Beginning-of-Line Pixel Clock Wait Count"
|
|
hexmask.long.word 0x00 16.--23. 1. 1. " ELW ,End-of-Line Pixel Clock Wait Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 10.--15. 1. 1. " HSW ,Horizontal Sync Pulse Width"
|
|
hexmask.long.word 0x00 0.--9. 1. 1. " PPL ,Pixels per Line"
|
|
group.long 0x08++3
|
|
line.long 0x00 "MLCCR2,Mini-LCD Controller Control Register 2"
|
|
hexmask.long.word 0x00 24.--31. 1. 1. " BFW ,Beginning-of-Frame Pixel Clock Wait Count"
|
|
hexmask.long.word 0x00 16.--23. 1. 1. " EFW ,End-of-Frame Pixel Clock Wait Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 10.--15. 1. 1. " VSW ,Vertical Sync Pulse Width"
|
|
hexmask.long.word 0x00 0.--9. 1. 1. " PPL ,Lines per Panel"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "MLSADD,Mini-LCD SRAM Address Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " FRADD ,Starting address of the frame data in the internal SRAM"
|
|
group.long 0x10++3
|
|
line.long 0x00 "MLFRMCNT,Mini-LCD Frame Count Register"
|
|
bitfld.long 0x00 31. " WKUP_EN ,Wake-Up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FWKUP_EN ,Frame Wake-Up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " FRCOUNT ,Wake-Up Frame Count"
|
|
width 0xb
|
|
tree.end
|
|
tree "Quick Capture Interface"
|
|
base ad:0x50000000
|
|
width 0x9
|
|
group.long 0x00++3
|
|
line.long 0x00 "CICR0,Quick Capture Interface Control Register 0"
|
|
bitfld.long 0x00 29. " SL_CAP_EN ,Capture Enable for Slave Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " ENB ,Quick Capture Interface Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DIS ,Quick Capture Interface Disable" "Not disabled,Disabled"
|
|
bitfld.long 0x00 24.--26. " SIM ,Sensor Interface Mode" "Master-paraller,Slave-paraller,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " LCD_MODE ,LCD Handshaking Plane" "Disabled,Base CI,Overaly 1 CI,Overlay 2 CI"
|
|
bitfld.long 0x00 21. " GCU_EN ,GCU Handshaking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EOFXM ,End-of-Frame Transfer to Memory Mask" "Enabled,Masked"
|
|
bitfld.long 0x00 11. " BSM ,Branch Status Mask" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FUM ,Input FIFO Underrun Mask Channel 3" "Enabled,Masked"
|
|
bitfld.long 0x00 9. " TOM ,Time-out Mask" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " EOLM ,End-of-Line Mask" "Enabled,Masked"
|
|
bitfld.long 0x00 4. " QDM ,Quick Capture Interface Quick Disable Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CDM ,Quick Capture Interface Quick Disable Done Mask" "Done,Masked"
|
|
bitfld.long 0x00 2. " SOFM ,Quick Capture Interface Start-of-Frame Mask" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EOFM ,Quick Capture Interface End-of-Frame Mask" "Enabled,Masked"
|
|
bitfld.long 0x00 0. " FOM ,FIFO Overrun Mask" "Enabled,Masked"
|
|
group.long 0x04++3
|
|
line.long 0x00 "CICR1,Quick Capture Interface Control Register 1"
|
|
hexmask.long.word 0x00 15.--26. 1. " PPL ,Pixels per Line for the Frame"
|
|
bitfld.long 0x00 10. " YCBCR_F ,YCbCr Format" "Reserved,Planarized"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " RAW_BPP ,RAW Bits Per Pixel" "8 bits,Reserved,10 bits,Reserved"
|
|
bitfld.long 0x00 3.--4. " COLOR_SP ,Color Space" "RAW,Reserved,YCbCr,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " DW ,Data Width" "Reserved,Reserved,8 bits,Reserved,10 bits,Reserved,Reserved,Reserved"
|
|
group.long 0x08++3
|
|
line.long 0x00 "CICR2,Quick Capture Interface Control Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BLW ,Beginning-of-Line Pixel Clock Wait Count"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ELW ,End-of-Line Pixel Clock Wait Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 10.--15. 1. " HSW ,Horizontal Sync Pulse Width"
|
|
hexmask.long.byte 0x00 3.--8. 1. " BFPW ,Beginning-of-Frame Pixel Clock Wait Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--2. 1. " FSW ,Frame Stabilization Wait Count"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "CICR3,Quick Capture Interface Control Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BFW ,Beginning-of-Frame Pixel Clock Wait Count"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EFW ,End-of-Frame Pixel Clock Wait Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--15. 1. " VSW ,Vertical Sync Pulse Width"
|
|
hexmask.long.word 0x00 0.--10. 1. " LPF ,Lines per Frame"
|
|
group.long 0x10++3
|
|
line.long 0x00 "CICR4,Quick Capture Interface Control Register 4"
|
|
bitfld.long 0x00 23. " PCLK_EN ,Pixel Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " PCP ,Pixel Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 21. " HSP ,Horizontal Sync Polarity" "High,Low"
|
|
bitfld.long 0x00 20. " VSP ,Vertical Sync Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MCLK_EN ,MCLK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " FR_RATE ,Frame Capture Rate" "All,1 of 2,1 of 3,1of 4,1 of 5,1 of 6,1 of 7,1 of 8"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Clock Divisor"
|
|
group.long 0x14++3
|
|
line.long 0x00 "CISR,Quick Capture Interface Status Register"
|
|
eventfld.long 0x00 31. " SINT ,Subsequent Intrrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " EOFX ,End-of-Frame Transferred to Memory (Channel 0-2)" "Not transferred,Transferred"
|
|
textline " "
|
|
eventfld.long 0x00 15. " FTO ,FIFO Time-out" "No time-out,Time-out"
|
|
eventfld.long 0x00 10. " CGC_INT ,Compander Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 9. " HST_INT ,Histogram Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " EOL ,End-of-Line" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 6. " CQD ,Quick Capture Interface Quick Disable Status" "Not disabled,Disabled"
|
|
eventfld.long 0x00 5. " CDD ,Quick Capture Interface Disable" "Not done,Done"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SOF ,Start-of-Frame" "Not received,Received"
|
|
eventfld.long 0x00 3. " EOF ,End-of-Frame" "Not received,Received"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "CITOR,Quick Capture Interface Time-Out Register"
|
|
hexmask.long 0x00 0.--31. 1. " TIMEOUT ,Time-Out"
|
|
rgroup.long 0x28++3
|
|
line.long 0x00 "CIBR0,Quick Capture Interface Channel 0 Receive Buffer"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BYTE3 ,Byte 3 of the Captured Data in Channel 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " BYTE2 ,Byte 2 of the Captured Data in Channel 0"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " BYTE1 ,Byte 1 of the Captured Data in Channel 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BYTE0 ,Byte 0 of the Captured Data in Channel 0"
|
|
rgroup.long 0x30++3
|
|
line.long 0x00 "CIBR1,Quick Capture Interface Channel 1 Receive Buffer"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BYTE3 ,Byte 3 of the Captured Data in Channel 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " BYTE2 ,Byte 2 of the Captured Data in Channel 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " BYTE1 ,Byte 1 of the Captured Data in Channel 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BYTE0 ,Byte 0 of the Captured Data in Channel 1"
|
|
rgroup.long 0x38++3
|
|
line.long 0x00 "CIBR2,Quick Capture Interface Channel 2 Receive Buffer"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BYTE3 ,Byte 3 of the Captured Data in Channel 2"
|
|
hexmask.long.byte 0x00 16.--23. 1. " BYTE2 ,Byte 2 of the Captured Data in Channel 2"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " BYTE1 ,Byte 1 of the Captured Data in Channel 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BYTE0 ,Byte 0 of the Captured Data in Channel 2"
|
|
group.long 0x40++3
|
|
line.long 0x00 "CIBR3,Quick Capture Interface Channel 3 Receive Buffer"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BYTE3 ,Byte 3 of the Captured Data in Channel 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " BYTE2 ,Byte 2 of the Captured Data in Channel 3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " BYTE1 ,Byte 1 of the Captured Data in Channel 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BYTE0 ,Byte 0 of the Captured Data in Channel 3"
|
|
group.long 0x44++3
|
|
line.long 0x00 "CIRCD,Quick Capture Interface Return Clock Register"
|
|
bitfld.long 0x00 31. " CLK_SEL ,Clock Select" "Return path,Non return path"
|
|
bitfld.long 0x00 30. " FV_SEL ,Frame Valid Select" "Return path,Non return path"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LV_SEL ,Line Valid Select" "Return path,Non return path"
|
|
bitfld.long 0x00 28. " DATA_SEL ,Data Select" "Return path,Non return path"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DLYCELL_SEL ,Delay Element to be choosel Select" "No delay,1,2,3,4,5,6,Reserved,7,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 21.--23. " CELL1_DLY ,Delay on Cell 1 Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18.--20. " CELL2_DLY ,Delay on Cell 2 Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--17. " CELL3_DLY ,Delay on Cell 3 Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " CELL4_DLY ,Delay on Cell 4 Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 9.--11. " CELL5_DLY ,Delay on Cell 5 Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " CELL6_DLY ,Delay on Cell 6 Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " CELL7_DLY ,Delay on Cell 7 Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " CELL8_DLY ,Delay on Cell 8 Control" "0,1,2,3,4,5,6,7"
|
|
group.long 0x64++3
|
|
line.long 0x00 "CIPSS,Quick Capture Interface Pixel Substitution Status Register"
|
|
bitfld.long 0x00 31. " PSU_EN ,Pixel Substitution Enable" "Bypassed,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " RAMADDR ,Pixel Substitution RAM Address"
|
|
textline " "
|
|
hexmask.long.word 0x00 12.--23. 1. " LNCNT ,Pixel Substitution Line Count"
|
|
hexmask.long.word 0x00 0.--11. 1. " PXLCNT ,Pixel Substitution Pixel Count"
|
|
group.long 0x68++3
|
|
line.long 0x00 "CIPBUF,Quick Capture Interface Pixel Substitution Buffer"
|
|
hexmask.long.word 0x00 16.--27. 1. " DEADCOL ,Pixel Substitution Dead Column Address"
|
|
hexmask.long.word 0x00 0.--10. 1. " DEADROW ,Pixel Substitution Dead Row Address"
|
|
group.long 0x6C++3
|
|
line.long 0x00 "CIHST,Quick Capture Interface Histogram Configuration"
|
|
bitfld.long 0x00 6. " CLR_RAM ,Histogram Clear RAM" "Not cleared,Cleared"
|
|
bitfld.long 0x00 4.--5. " SCALE ,Histogram Scale Factor" "[7:0],[8:0],[9:1],Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ColorSel[3] ,Green 2 Color Selection" "Not passed,Passed"
|
|
bitfld.long 0x00 2. " ColorSel[2] ,Green 1 Color Selection" "Not passed,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ColorSel[1] ,Blue Color Selection" "Not passed,Passed"
|
|
bitfld.long 0x00 0. " ColorSel[0] ,Red Color Selection" "Not passed,Passed"
|
|
group.long 0x70++3
|
|
line.long 0x00 "CISUM,Quick Capture Interface Histogram Summation Register"
|
|
hexmask.long 0x00 0.--31. 1. " SUM ,32-bit Unsigned Summation"
|
|
group.long 0x74++3
|
|
line.long 0x00 "CICCR,Quick Capture Interface Compander Configuration"
|
|
bitfld.long 0x00 19. " LUT_LD ,Load Compander Look-up-Table" "Not loaded,Loaded"
|
|
hexmask.long.byte 0x00 11.--18. 1. " BLC ,Black-Level Clamp Offset Value"
|
|
textline " "
|
|
hexmask.long.byte 0x00 3.--10. 1. " BLC/CLUT ,Black-Level Clamp Offset/Compander Look-up Table"
|
|
bitfld.long 0x00 1.--2. " SCALE ,Commpander Address Selection" "[7:0],Reserved,[9:2],Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Compander Enable" "Bypassed,Enabled"
|
|
group.long 0x7C++3
|
|
line.long 0x00 "CISSC,Quick Capture Interface Spatial Scaling Configuration"
|
|
bitfld.long 0x00 0.--1. " SCALE ,Scaling Ratio" "Disabled,2:1,4:1,Reserved"
|
|
group.long 0x90++3
|
|
line.long 0x00 "CICMR,Quick Capture Interface Color Management Register"
|
|
bitfld.long 0x00 0.--1. " DMODE ,Data Format" "Disabled,RGB,YCbCr 4:2:2,Reserved"
|
|
group.long 0x94++3
|
|
line.long 0x00 "CICMC0,Quick Capture Interface Color Management Coefficients 0"
|
|
hexmask.long.word 0x00 20.--29. 1. " COF00 ,First Row First Column Coefficient"
|
|
hexmask.long.word 0x00 10.--19. 1. " COF01 ,First Row Second Column Coefficient"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " COF02 ,First Row Third Column Coefficient"
|
|
group.long 0x98++3
|
|
line.long 0x00 "CICMC1,Quick Capture Interface Color Management Coefficients 1"
|
|
hexmask.long.word 0x00 20.--29. 1. " COF10 ,Second Row First Column Coefficient"
|
|
hexmask.long.word 0x00 10.--19. 1. " COF11 ,Second Row Second Column Coefficient"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " COF12 ,Second Row Third Column Coefficient"
|
|
group.long 0x9C++3
|
|
line.long 0x00 "CICMC2,Quick Capture Interface Color Management Coefficients 2"
|
|
hexmask.long.word 0x00 20.--29. 1. " COF20 ,Third Row First Column Coefficient"
|
|
hexmask.long.word 0x00 10.--19. 1. " COF21 ,Third Row Second Column Coefficient"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " COF22 ,Third Row Third Column Coefficient"
|
|
group.long 0xB0++3
|
|
line.long 0x00 "CIFR0,Quick Capture Interface FIFO Control Register 0"
|
|
hexmask.long.byte 0x00 23.--29. 1. " FLVL2 ,FIFO 2 Level"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLVL1 ,FIFO 1 Level"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " FLV0 ,FIFO 0 Level"
|
|
bitfld.long 0x00 3. " RESETF ,Reset Input FIFOs" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FEN2 ,FIFO Enable for Channel 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FEN1 ,FIFO Enable for Channel 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FEN0 ,FIFO Enable for Channel 0" "Disabled,Enabled"
|
|
group.long 0xB4++3
|
|
line.long 0x00 "CIFR1,Quick Capture Interface FIFO Control Register 1"
|
|
hexmask.long.byte 0x00 1.--8. 1. " FLVL3 ,FIFO 3 Level"
|
|
bitfld.long 0x00 0. " FEN3 ,FIFO Enable for Channel 3" "Disabled,Enabled"
|
|
group.long 0xC0++3
|
|
line.long 0x00 "CIFSR,Quick Capture Interface FIFO Status Register"
|
|
eventfld.long 0x00 28. " IFU_3 ,FIFO Underrun for Channel 3" "No underrun,Underrun"
|
|
eventfld.long 0x00 24. " BS3 ,Branch Status for Channel 3" "Not branched,Branched"
|
|
textline " "
|
|
eventfld.long 0x00 23. " BS2 ,Branch Status for Channel 2" "Not branched,Branched"
|
|
eventfld.long 0x00 22. " BS1 ,Branch Status for Channel 1" "Not branched,Branched"
|
|
textline " "
|
|
eventfld.long 0x00 21. " BS0 ,Branch Status for Channel 0" "Not branched,Branched"
|
|
eventfld.long 0x00 17. " SOF3 ,Start-of-Frame for Channel 3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 16. " SOF2 ,Start-of-Frame for Channel 2" "Not occurred,Occurred"
|
|
eventfld.long 0x00 15. " SOF1 ,Start-of-Frame for Channel 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 14. " SOF0 ,Start-of-Frame for Channel 0" "Not occurred,Occurred"
|
|
eventfld.long 0x00 10. " EOF3 ,End-of-Frame for Channel 3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 3. " IFO_3 ,FIFO Overrun for Channel 3" "No overrun,Overrun"
|
|
eventfld.long 0x00 2. " IFO_2 ,FIFO Overrun for Channel 2" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 1. " IFO_1 ,FIFO Overrun for Channel 1" "No overrun,Overrun"
|
|
eventfld.long 0x00 0. " IFO_0 ,FIFO Overrun for Channel 0" "No overrun,Overrun"
|
|
group.long 0x200++3
|
|
line.long 0x00 "CIDCSR0,Quick Capture Interface DMA Controller/Status Channel 0 Register"
|
|
bitfld.long 0x00 29. " StopIrqEn ,Stop Channel Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " ReqPend ,Internal Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " StopIntr ,Stop Interrupt Channel 0" "Running,Stopped"
|
|
bitfld.long 0x00 0. " BusErrIntr ,Internal Bus Error Interrupt Channel 0" "No interrupt,Interrupt"
|
|
group.long 0x204++3
|
|
line.long 0x00 "CIDCSR1,Quick Capture Interface DMA Controller/Status Channel 1 Register"
|
|
bitfld.long 0x00 29. " StopIrqEn ,Stop Channel Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " ReqPend ,Internal Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " StopIntr ,Stop Interrupt Channel 1" "Running,Stopped"
|
|
bitfld.long 0x00 0. " BusErrIntr ,Internal Bus Error Interrupt Channel 1" "No interrupt,Interrupt"
|
|
group.long 0x208++3
|
|
line.long 0x00 "CIDCSR2,Quick Capture Interface DMA Controller/Status Channel 2 Register"
|
|
bitfld.long 0x00 29. " StopIrqEn ,Stop Channel Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " ReqPend ,Internal Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " StopIntr ,Stop Interrupt Channel 2" "Running,Stopped"
|
|
bitfld.long 0x00 0. " BusErrIntr ,Internal Bus Error Interrupt Channel 2" "No interrupt,Interrupt"
|
|
group.long 0x20C++3
|
|
line.long 0x00 "CIDCSR3,Quick Capture Interface DMA Controller/Status Channel 3 Register"
|
|
bitfld.long 0x00 29. " StopIrqEn ,Stop Channel Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " ReqPend ,Internal Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " StopIntr ,Stop Interrupt Channel 3" "Running,Stopped"
|
|
bitfld.long 0x00 0. " BusErrIntr ,Internal Bus Error Interrupt Channel 3" "No interrupt,Interrupt"
|
|
group.long 0x220++3
|
|
line.long 0x00 "CIDBR0,Quick Capture Interface DMA Branch Channel 0 Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SrcAddr ,Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x224++3
|
|
line.long 0x00 "CIDBR1,Quick Capture Interface DMA Branch Channel 1 Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SrcAddr ,Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x228++3
|
|
line.long 0x00 "CIDBR2,Quick Capture Interface DMA Branch Channel 2 Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SrcAddr ,Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x22C++3
|
|
line.long 0x00 "CIDBR3,Quick Capture Interface DMA Branch Channel 3 Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SrcAddr ,Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRA ,Branch After Finishing the Current Frame" "Not branched,Branched"
|
|
group.long 0x240++3
|
|
line.long 0x00 "CIDADR0,Quick Capture Interface DMA Descriptor Address Channel 0"
|
|
hexmask.long 0x00 4.--31. 0x10 " DADDR ,Descriptor Address"
|
|
rgroup.long 0x244++3
|
|
line.long 0x00 "CISADR0,Quick Capture Interface DMA Source Address Channel 0"
|
|
hexmask.long 0x00 4.--31. 0x10 " FSA ,Frame Source Address"
|
|
rgroup.long 0x248++3
|
|
line.long 0x00 "CITADR0,Quick Capture Interface DMA Target Address Channel 0"
|
|
hexmask.long 0x00 4.--31. 0x10 " TADDR ,Target Address"
|
|
rgroup.long 0x24C++3
|
|
line.long 0x00 "CICMD0,Quick Capture Interface DMA Command Channel 0 Register"
|
|
bitfld.long 0x00 30. " IncTrgAddr ,Target Address Increment Setting" "Not incremented,Incremented"
|
|
bitfld.long 0x00 22. " SOFInt ,Start-of-Frame Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 3.--20. 1. " Length ,Transfer Length"
|
|
group.long 0x250++3
|
|
line.long 0x00 "CIDADR1,Quick Capture Interface DMA Descriptor Address Channel 1"
|
|
hexmask.long 0x00 4.--31. 0x10 " DADDR ,Descriptor Address"
|
|
rgroup.long 0x254++3
|
|
line.long 0x00 "CISADR1,Quick Capture Interface DMA Source Address Channel 1"
|
|
hexmask.long 0x00 4.--31. 0x10 " FSA ,Frame Source Address"
|
|
rgroup.long 0x258++3
|
|
line.long 0x00 "CITADR1,Quick Capture Interface DMA Target Address Channel 1"
|
|
hexmask.long 0x00 4.--31. 0x10 " TADDR ,Target Address"
|
|
rgroup.long 0x25C++3
|
|
line.long 0x00 "CICMD1,Quick Capture Interface DMA Command Channel 1 Register"
|
|
bitfld.long 0x00 30. " IncTrgAddr ,Target Address Increment Setting" "Not incremented,Incremented"
|
|
bitfld.long 0x00 22. " SOFInt ,Start-of-Frame Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 3.--20. 1. " Length ,Transfer Length"
|
|
group.long 0x260++3
|
|
line.long 0x00 "CIDADR2,Quick Capture Interface DMA Descriptor Address Channel 2"
|
|
hexmask.long 0x00 4.--31. 0x10 " DADDR ,Descriptor Address"
|
|
rgroup.long 0x264++3
|
|
line.long 0x00 "CISADR2,Quick Capture Interface DMA Source Address Channel 2"
|
|
hexmask.long 0x00 4.--31. 0x10 " FSA ,Frame Source Address"
|
|
rgroup.long 0x268++3
|
|
line.long 0x00 "CITADR2,Quick Capture Interface DMA Target Address Channel 2"
|
|
hexmask.long 0x00 4.--31. 0x10 " TADDR ,Target Address"
|
|
rgroup.long 0x26C++3
|
|
line.long 0x00 "CICMD2,Quick Capture Interface DMA Command Channel 2 Register"
|
|
bitfld.long 0x00 30. " IncTrgAddr ,Target Address Increment Setting" "Not incremented,Incremented"
|
|
bitfld.long 0x00 22. " SOFInt ,Start-of-Frame Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 3.--20. 1. " Length ,Transfer Length"
|
|
group.long 0x270++3
|
|
line.long 0x00 "CIDADR3,Quick Capture Interface DMA Descriptor Address Channel 3"
|
|
hexmask.long 0x00 4.--31. 0x10 " DADDR ,Descriptor Address"
|
|
rgroup.long 0x274++3
|
|
line.long 0x00 "CISADR3,Quick Capture Interface DMA Source Address Channel 3"
|
|
hexmask.long 0x00 4.--31. 0x10 " FSA ,Frame Source Address"
|
|
rgroup.long 0x278++3
|
|
line.long 0x00 "CITADR3,Quick Capture Interface DMA Target Address Channel 3"
|
|
hexmask.long 0x00 4.--31. 0x10 " TADDR ,Target Address"
|
|
rgroup.long 0x27C++3
|
|
line.long 0x00 "CICMD3,Quick Capture Interface DMA Command Channel 3 Register"
|
|
bitfld.long 0x00 30. " IncTrgAddr ,Target Address Increment Setting" "Not incremented,Incremented"
|
|
bitfld.long 0x00 22. " SOFInt ,Start-of-Frame Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 3.--20. 1. " Length ,Transfer Length"
|
|
tree.end
|
|
tree "Graphics Controller"
|
|
base ad:0x54000000
|
|
width 0xc
|
|
group.long 0x00++3
|
|
line.long 0x00 "GCCR,Graphics Controller Configuration Register"
|
|
bitfld.long 0x00 10. " INT_ERR_EN ,Interrupt Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SYNC_CLR ,Synchronization Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BP_RST ,Breakpoint Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " ABORT ,Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STOP ,Stop" "Not Stopped,Stopped"
|
|
bitfld.long 0x00 2.--3. " CURR_DES ,Current Destination Buffer" "Buffer 0,Buffer 1,Buffer 2,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DEST ,Current Destination Buffer Method" "Buffer 2,Buffer 0/Buffer 1,Reserved,Reserved"
|
|
group.long 0x04++3
|
|
line.long 0x00 "GCISCR,Graphics Controller Interrupt Status Control Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " IN_INT_ID ,Interrupt Identification"
|
|
eventfld.long 0x00 7. " STOP_INTST ,Stop Interrupt Status" "Not stopped,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 6. " PF_INTST ,Pixel Format Interrupt Status" "Not occurred,Occurred"
|
|
eventfld.long 0x00 5. " EEOB_INTST ,Execution End of Buffer Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 4. " IIN_INTST ,Illegal Instruction Interrupt Status" "Not occurred,Occurred"
|
|
eventfld.long 0x00 3. " IOP_INTST ,Illegal Operation Interrupt Status " "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " BF_INTST ,Display Buffer Flip Interrupt Status" "Not executed,Executed"
|
|
eventfld.long 0x00 1. " IN_INTST ,Instruction Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 0. " EOB_INTST ,End of Buffer Interrupt Status" "Not ended,Ended"
|
|
group.long 0x08++3
|
|
line.long 0x00 "GCIECR,Graphics Controller Interrupt Enable Control Register"
|
|
bitfld.long 0x00 7. " STOP_INTEN ,GCCR Stop Response Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PF_INTEN ,Illegal Pixel/Format/Step Size/Incompatible Pixel Format and Step Size Interrupt Enable " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EEOB_INTEN ,Execution End of Buffer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IIN_INTEN ,Illegal Instruction Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IOP_INTEN ,Illegal Operation Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " BF_INTEN ,Buffer Flip Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IN_INTEN ,Instruction Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EOB_INTEN ,End of Buffer Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "GCNOPID,Graphics Controller NOP ID From Instruction Stream Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " NOP_ID ,NOP Identification Value"
|
|
group.long 0x10++3
|
|
line.long 0x00 "GCALPHASET,Graphics Controller Default Alpha Value Control Register"
|
|
bitfld.long 0x00 16. " VALID ,Valid Alpha Value Selection" "Not valid,Valid"
|
|
hexmask.long.word 0x00 0.--15. 1. " ALPHA ,ALPHA value for use according to GCALPHASET_[VALID]"
|
|
group.long 0x14++3
|
|
line.long 0x00 "GCTSET,Graphics Controller Default Transparency Value Control Register"
|
|
bitfld.long 0x00 16. " VALID ,Valid Transparency Value Selection" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " TBIT ,Default Transparency Value for Use According to GCTSET_[VALID]" "0,1"
|
|
group.long 0x20++3
|
|
line.long 0x00 "GCRBBR,Graphics Controller Ring Buffer Base Address Register"
|
|
hexmask.long. 0x00 8.--31. 0x100 " BASE ,Ring Buffer base Physical Byte Address"
|
|
group.long 0x24++3
|
|
line.long 0x00 "GCRBLR,Graphics Controller Ring Buffer Length Register"
|
|
hexmask.long.tbyte 0x00 8.--17. 1. " LENGTH ,Ring Buffer Length"
|
|
rgroup.long 0x28++3
|
|
line.long 0x00 "GCRBHR,Graphics Controller Ring Buffer Head Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " HEAD ,Ring Buffer Head Physical Byte Address"
|
|
group.long 0x2C++3
|
|
line.long 0x00 "GCRBTR,Graphics Controller Ring Buffer Tail Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " TAIL ,Ring Buffer Tail Physical Byte Address"
|
|
rgroup.long 0x30++3
|
|
line.long 0x00 "GCRBEXHR,Graphics Controller Ring Buffer Execution Head Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " EX_HEAD ,Ring Buffer Execution Head Physical Byte Address"
|
|
rgroup.long 0x40++3
|
|
line.long 0x00 "GCBBBR,Graphics Controller Batch Buffer Base Address Register"
|
|
hexmask.long. 0x00 2.--31. 0x4 " BASE ,Batch Buffer base Physical Byte Address"
|
|
rgroup.long 0x44++3
|
|
line.long 0x00 "GCBBHR,Graphics Controller Batch Buffer Head Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " HEAD ,Batch Buffer Head Physical Byte Address"
|
|
rgroup.long 0x48++3
|
|
line.long 0x00 "GCBBEXHR,Graphics Controller Batch Buffer Execution Head Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " EX_HEAD ,Batch Buffer Execution Head Physical Byte Address"
|
|
group.long 0x60++3
|
|
line.long 0x00 "GCD0BR,Graphics Controller Destination 0 (Dispaly Buffer 0) Base Address Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " BASE ,Destination Buffer 0 Base Physical Byte Address"
|
|
group.long 0x64++3
|
|
line.long 0x00 "GCD0STP,Graphics Controller Destination 0 (Dispaly Buffer 0) Step Size Register"
|
|
bitfld.long 0x00 0.--3. " STEP ,Destination Buffer 0 Step Size in Bytes" "Reserved,1B/pixel,2B/pixel,3B/pixel,4B/pixel,Reserved,Reserved,Reserved,8B/pixel,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x68++3
|
|
line.long 0x00 "GCD0STR,Graphics Controller Destination 0 (Dispaly Buffer 0) Stride Size Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " STRIDE ,Destination Buffer 0 Stride Size in Bytes"
|
|
group.long 0x6C++3
|
|
line.long 0x00 "GCD0PF,Graphics Controller Destination 0 (Dispaly Buffer 0) Pixel Type Register"
|
|
bitfld.long 0x00 0.--3. " PFORM ,Pixel format per Destination Buffer 0" "8b/pixel,15b/pixel,16b/pixel,16b/pixel,18b/pixel,19b/pixel,24b/pixel,24b/pixel,25b/pixel,32b/pixel,48b/pixel,64b/pixel,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x70++3
|
|
line.long 0x00 "GCD1BR,Graphics Controller Destination 1 (Dispaly Buffer 1) Base Address Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " BASE ,Destination Buffer 1 Base Physical Byte Address"
|
|
group.long 0x74++3
|
|
line.long 0x00 "GCD1STP,Graphics Controller Destination 1 (Dispaly Buffer 1) Step Size Register"
|
|
bitfld.long 0x00 0.--3. " STEP ,Destination Buffer 1 Step Size in Bytes" "Reserved,1B/pixel,2B/pixel,3B/pixel,4B/pixel,Reserved,Reserved,Reserved,8B/pixel,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x78++3
|
|
line.long 0x00 "GCD1STR,Graphics Controller Destination 1 (Dispaly Buffer 1) Stride Size Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " STRIDE ,Destination Buffer 1 Stride Size in Bytes"
|
|
group.long 0x7C++3
|
|
line.long 0x00 "GCD1PF,Graphics Controller Destination 1 (Dispaly Buffer 1) Pixel Type Register"
|
|
bitfld.long 0x00 0.--3. " PFORM ,Pixel format per Destination Buffer 1" "8b/pixel,15b/pixel,16b/pixel,16b/pixel,18b/pixel,19b/pixel,24b/pixel,24b/pixel,25b/pixel,32b/pixel,48b/pixel,64b/pixel,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x80++3
|
|
line.long 0x00 "GCD2BR,Graphics Controller Destination 2 Base Address Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " BASE ,Destination Buffer 2 Base Physical Byte Address"
|
|
group.long 0x84++3
|
|
line.long 0x00 "GCD2STP,Graphics Controller Destination 2 Step Size Register"
|
|
bitfld.long 0x00 0.--3. " STEP ,Destination Buffer 2 Step Size in Bytes" "Reserved,1B/pixel,2B/pixel,3B/pixel,4B/pixel,Reserved,Reserved,Reserved,8B/pixel,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x88++3
|
|
line.long 0x00 "GCD2STR,Graphics Controller Destination 2 Stride Size Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " STRIDE ,Destination Buffer 2 Stride Size in Bytes"
|
|
group.long 0x8C++3
|
|
line.long 0x00 "GCD2PF,Graphics Controller Destination 2 Pixel Type Register"
|
|
bitfld.long 0x00 0.--3. " PFORM ,Pixel format per Destination Buffer 2" "8b/pixel,15b/pixel,16b/pixel,16b/pixel,18b/pixel,19b/pixel,24b/pixel,24b/pixel,25b/pixel,32b/pixel,48b/pixel,64b/pixel,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xE0++3
|
|
line.long 0x00 "GCS0BR,Graphics Controller Source 0 Base Address Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " BASE ,Source Buffer 0 Base Physical Byte Address"
|
|
group.long 0xE4++3
|
|
line.long 0x00 "GCS0STP,Graphics Controller Source 0 Step Size Register"
|
|
bitfld.long 0x00 0.--3. " STEP ,Source Buffer 0 Step Size in Bytes" "Reserved,1B/pixel,2B/pixel,3B/pixel,4B/pixel,Reserved,Reserved,Reserved,8B/pixel,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xE8++3
|
|
line.long 0x00 "GCS0STR,Graphics Controller Source 0 Stride Size Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " STRIDE ,Source Buffer 0 Stride Size in Bytes"
|
|
group.long 0xEC++3
|
|
line.long 0x00 "GCS0PF,Graphics Controller Source 0 Pixel Type Register"
|
|
bitfld.long 0x00 0.--3. " PFORM ,Pixel format per Destination Buffer 2" "8b/pixel,15b/pixel,16b/pixel,16b/pixel,18b/pixel,19b/pixel,24b/pixel,24b/pixel,25b/pixel,32b/pixel,48b/pixel,64b/pixel,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xF0++3
|
|
line.long 0x00 "GCS1BR,Graphics Controller Source 1 Base Address Register"
|
|
hexmask.long 0x00 3.--31. 0x8 " BASE ,Source Buffer 1 Base Physical Byte Address"
|
|
group.long 0xF4++3
|
|
line.long 0x00 "GCS1STP,Graphics Controller Source 1 Step Size Register"
|
|
bitfld.long 0x00 0.--3. " STEP ,Source Buffer 1 Step Size in Bytes" "Reserved,1B/pixel,2B/pixel,3B/pixel,4B/pixel,Reserved,Reserved,Reserved,8B/pixel,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0xF8++3
|
|
line.long 0x00 "GCS1STR,Graphics Controller Source 1 Stride Size Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " STRIDE ,Source Buffer 0 Stride Size in Bytes"
|
|
group.long 0xFC++3
|
|
line.long 0x00 "GCS1PF,Graphics Controller Source 1 Pixel Type Register"
|
|
bitfld.long 0x00 0.--3. " PFORM ,Pixel format per Destination Buffer 2" "8b/pixel,15b/pixel,16b/pixel,16b/pixel,18b/pixel,19b/pixel,24b/pixel,24b/pixel,25b/pixel,32b/pixel,48b/pixel,64b/pixel,Reserved,Reserved,Reserved,Reserved"
|
|
group.long 0x160++3
|
|
line.long 0x00 "GCSC0WD0,Graphics Controller Pixel ALU Scratch Register 0 Word 0"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x164++3
|
|
line.long 0x00 "GCSC0WD1,Graphics Controller Pixel ALU Scratch Register 0 Word 1"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x168++3
|
|
line.long 0x00 "GCSC1WD0,Graphics Controller Pixel ALU Scratch Register 1 Word 0"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x16C++3
|
|
line.long 0x00 "GCSC1WD1,Graphics Controller Pixel ALU Scratch Register 1 Word 1"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x170++3
|
|
line.long 0x00 "GCSC2WD0,Graphics Controller Pixel ALU Scratch Register 2 Word 0"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x174++3
|
|
line.long 0x00 "GCSC2WD1,Graphics Controller Pixel ALU Scratch Register 2 Word 1"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x178++3
|
|
line.long 0x00 "GCSC3WD0,Graphics Controller Pixel ALU Scratch Register 3 Word 0"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x17C++3
|
|
line.long 0x00 "GCSC3WD1,Graphics Controller Pixel ALU Scratch Register 3 Word 1"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x180++3
|
|
line.long 0x00 "GCSC4WD0,Graphics Controller Pixel ALU Scratch Register 4 Word 0"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x184++3
|
|
line.long 0x00 "GCSC4WD1,Graphics Controller Pixel ALU Scratch Register 4 Word 1"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x188++3
|
|
line.long 0x00 "GCSC5WD0,Graphics Controller Pixel ALU Scratch Register 5 Word 0"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x18C++3
|
|
line.long 0x00 "GCSC5WD1,Graphics Controller Pixel ALU Scratch Register 5 Word 1"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x190++3
|
|
line.long 0x00 "GCSC6WD0,Graphics Controller Pixel ALU Scratch Register 6 Word 0"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x194++3
|
|
line.long 0x00 "GCSC6WD1,Graphics Controller Pixel ALU Scratch Register 6 Word 1"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x198++3
|
|
line.long 0x00 "GCSC7WD0,Graphics Controller Pixel ALU Scratch Register 7 Word 0"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
group.long 0x19C++3
|
|
line.long 0x00 "GCSC7WD1,Graphics Controller Pixel ALU Scratch Register 7 Word 1"
|
|
hexmask.long 0x00 0.--31. 1. " WORD ,32-bit Data Word"
|
|
rgroup.long 0x1E0++3
|
|
line.long 0x00 "GCCABADDR,Configuration Register Read/Write Illegal Access Bad Address"
|
|
hexmask.long 0x00 0.--31. 1. " GCCABADDR ,Address of the Illegal Read/Write Access from System bus #2"
|
|
rgroup.long 0x1E4++3
|
|
line.long 0x00 "GCTABADDR,Target Abort Bad Address"
|
|
hexmask.long 0x00 0.--31. 1. " GCTABADDR ,Target Abort Address placed on System bus #2 during the aborted transfer"
|
|
rgroup.long 0x1E8++3
|
|
line.long 0x00 "GCMABADDR,Master Abort Bad Address"
|
|
hexmask.long 0x00 0.--31. 1. " GCMABADDR ,Master Abort Address placed on System bus #2 during the aborted transfer"
|
|
width 0xb
|
|
tree.end
|
|
tree "Keypad Controller"
|
|
base ad:0x41500000
|
|
width 0xa
|
|
group.long 0x00++3
|
|
line.long 0x00 "KPC,Keypad Control Register"
|
|
bitfld.long 0x00 30. " AS ,Automatic Scan" "No effect,Scanned"
|
|
bitfld.long 0x00 29. " ASACT ,Automatic Scan on Activity" "No ScanOnActivity,ScanOnActivity"
|
|
textline " "
|
|
bitfld.long 0x00 26.--28. " MKRN ,Matrix Keypad Row Number" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 23.--25. " MKCN ,Matrix Keypad Column Number" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MI ,Matrix Keypad Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IMKP ,Ignore Multiple Keypress" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MS7 ,Manual Matrix Scan Line 7" "Not scanned,Scanned"
|
|
bitfld.long 0x00 19. " MS6 ,Manual Matrix Scan Line 6" "Not scanned,Scanned"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MS5 ,Manual Matrix Scan Line 5" "Not scanned,Scanned"
|
|
bitfld.long 0x00 17. " MS4 ,Manual Matrix Scan Line 4" "Not scanned,Scanned"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MS3 ,Manual Matrix Scan Line 3" "Not scanned,Scanned"
|
|
bitfld.long 0x00 15. " MS2 ,Manual Matrix Scan Line 2" "Not scanned,Scanned"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MS1 ,Manual Matrix Scan Line 1" "Not scanned,Scanned"
|
|
bitfld.long 0x00 13. " MS0 ,Manual Matrix Scan Line 0" "Not scanned,Scanned"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ME ,Matrix Keypad Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " MIE ,Matrix Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DK_DEB_SEL ,Direct Keypad Debounce Select" "Matrix,Direct"
|
|
bitfld.long 0x00 6.--8. " DKN ,Direct Key Number" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DI ,Direct Keypad Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RE_ZERO_DEB ,Rotary Encoder Zero Debounce Interval" "DK_DEB_INTERV,Zero"
|
|
textline " "
|
|
bitfld.long 0x00 2. " REEA ,Rotary Encoder A Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DE ,Direct Keypad Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIE ,Direct Keypad Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x08++3
|
|
line.long 0x00 "KPDK,Keypad Direct Key Register"
|
|
bitfld.long 0x00 31. " DKP ,Direct Key Pressed" "Reset,Pressed"
|
|
bitfld.long 0x00 7. " DK7 ,Direct Key 7 Input" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DK6 ,Direct Key 6 Input" "0,1"
|
|
bitfld.long 0x00 5. " DK5 ,Direct Key 5 Input" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DK4 ,Direct Key 4 Input" "0,1"
|
|
bitfld.long 0x00 3. " RB1-DK3 ,Rotary Encoder B/Direct Key 3 Input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RB1-DK2 ,Rotary Encoder B/Direct Key 2 Input" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RB1-DK1 ,Rotary Encoder B/Direct Key 1 Input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RB1-DK0 ,Rotary Encoder B/Direct Key 0 Input" "Disabled,Enabled"
|
|
group.long 0x10++3
|
|
line.long 0x00 "KPREC,Keypad Rotary Encoder Count Register"
|
|
bitfld.long 0x00 15. " OF0 ,Overflow Bit for Rotary Encoder 0" "No overflow,Overflow"
|
|
bitfld.long 0x00 14. " UF0 ,Underflow Bit for Rotary Encoder 0" "No underflow,Underflow"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " RECount0 ,Count Value for Rotary Encoder 0"
|
|
rgroup.long 0x18++3
|
|
line.long 0x00 "KPMK,Keypad Matrix Key Register"
|
|
bitfld.long 0x00 31. " MKP ,Matrix Key Pressed Since last Read" "Reset,Pressed"
|
|
bitfld.long 0x00 7. " MR7 ,Matrix Row 7" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " MR6 ,Matrix Row 6" "0,1"
|
|
bitfld.long 0x00 5. " MR5 ,Matrix Row 5" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MR4 ,Matrix Row 4" "0,1"
|
|
bitfld.long 0x00 3. " MR3 ,Matrix Row 3" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MR2 ,Matrix Row 2" "0,1"
|
|
bitfld.long 0x00 1. " MR1 ,Matrix Row 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MR0 ,Matrix Row 0" "0,1"
|
|
group.long 0x20++3
|
|
line.long 0x00 "KPAS,Keypad Automatic Scan Register"
|
|
bitfld.long 0x00 31. " SO ,Scan On" "Off,On"
|
|
bitfld.long 0x00 26.--30. " MUKP ,Multiple Keys Pressed" "No key,Single,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple,Multiple"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " RP ,Row Pressed" "0,1,2,3,4,5,6,7,Invalid,Invalid,Invalid,Invalid,Invalid,Invalid,Invalid,Invalid"
|
|
bitfld.long 0x00 0.--3. " CP ,Column Pressed" "0,1,2,3,4,5,6,7,Invalid,Invalid,Invalid,Invalid,Invalid,Invalid,Invalid,Invalid"
|
|
rgroup.long 0x28++3
|
|
line.long 0x00 "KPASMKP0,Keypad Automatic Scan Multiple Keypress Register 0"
|
|
bitfld.long 0x00 31. " SO ,Scan On bit" "Not set,Set"
|
|
bitfld.long 0x0 23. " MKC23 ,Matrix Keypad Column 1/Row 7 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 22. " MKC22 ,Matrix Keypad Column 1/Row 6 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 21. " MKC21 ,Matrix Keypad Column 1/Row 5 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 20. " MKC20 ,Matrix Keypad Column 1/Row 4 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 19. " MKC19 ,Matrix Keypad Column 1/Row 3 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 18. " MKC18 ,Matrix Keypad Column 1/Row 2 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 17. " MKC17 ,Matrix Keypad Column 1/Row 1 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 16. " MKC16 ,Matrix Keypad Column 1/Row 0 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 7. " MKC7 ,Matrix Keypad Column 0/Row 7 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 6. " MKC6 ,Matrix Keypad Column 0/Row 6 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 5. " MKC5 ,Matrix Keypad Column 0/Row 5 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 4. " MKC4 ,Matrix Keypad Column 0/Row 4 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 3. " MKC3 ,Matrix Keypad Column 0/Row 3 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 2. " MKC2 ,Matrix Keypad Column 0/Row 2 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 1. " MKC1 ,Matrix Keypad Column 0/Row 1 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 0. " MKC0 ,Matrix Keypad Column 0/Row 0 Reading" "Not identified,Identified"
|
|
rgroup.long 0x30++3
|
|
line.long 0x00 "KPASMKP1,Keypad Automatic Scan Multiple Keypress Register 1"
|
|
bitfld.long 0x00 31. " SO ,Scan On bit" "Not set,Set"
|
|
bitfld.long 0x0 23. " MKC23 ,Matrix Keypad Column 3/Row 7 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 22. " MKC22 ,Matrix Keypad Column 3/Row 6 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 21. " MKC21 ,Matrix Keypad Column 3/Row 5 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 20. " MKC20 ,Matrix Keypad Column 3/Row 4 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 19. " MKC19 ,Matrix Keypad Column 3/Row 3 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 18. " MKC18 ,Matrix Keypad Column 3/Row 2 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 17. " MKC17 ,Matrix Keypad Column 3/Row 1 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 16. " MKC16 ,Matrix Keypad Column 3/Row 0 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 7. " MKC7 ,Matrix Keypad Column 2/Row 7 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 6. " MKC6 ,Matrix Keypad Column 2/Row 6 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 5. " MKC5 ,Matrix Keypad Column 2/Row 5 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 4. " MKC4 ,Matrix Keypad Column 2/Row 4 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 3. " MKC3 ,Matrix Keypad Column 2/Row 3 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 2. " MKC2 ,Matrix Keypad Column 2/Row 2 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 1. " MKC1 ,Matrix Keypad Column 2/Row 1 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 0. " MKC0 ,Matrix Keypad Column 2/Row 0 Reading" "Not identified,Identified"
|
|
rgroup.long 0x38++3
|
|
line.long 0x00 "KPASMKP2,Keypad Automatic Scan Multiple Keypress Register 2"
|
|
bitfld.long 0x00 31. " SO ,Scan On bit" "Not set,Set"
|
|
bitfld.long 0x0 23. " MKC23 ,Matrix Keypad Column 5/Row 7 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 22. " MKC22 ,Matrix Keypad Column 5/Row 6 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 21. " MKC21 ,Matrix Keypad Column 5/Row 5 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 20. " MKC20 ,Matrix Keypad Column 5/Row 4 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 19. " MKC19 ,Matrix Keypad Column 5/Row 3 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 18. " MKC18 ,Matrix Keypad Column 5/Row 2 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 17. " MKC17 ,Matrix Keypad Column 5/Row 1 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 16. " MKC16 ,Matrix Keypad Column 5/Row 0 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 7. " MKC7 ,Matrix Keypad Column 4/Row 7 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 6. " MKC6 ,Matrix Keypad Column 4/Row 6 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 5. " MKC5 ,Matrix Keypad Column 4/Row 5 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 4. " MKC4 ,Matrix Keypad Column 4/Row 4 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 3. " MKC3 ,Matrix Keypad Column 4/Row 3 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 2. " MKC2 ,Matrix Keypad Column 4/Row 2 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 1. " MKC1 ,Matrix Keypad Column 4/Row 1 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 0. " MKC0 ,Matrix Keypad Column 4/Row 0 Reading" "Not identified,Identified"
|
|
rgroup.long 0x40++3
|
|
line.long 0x00 "KPASMKP3,Keypad Automatic Scan Multiple Keypress Register 3"
|
|
bitfld.long 0x00 31. " SO ,Scan On bit" "Not set,Set"
|
|
bitfld.long 0x0 23. " MKC23 ,Matrix Keypad Column 7/Row 7 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 22. " MKC22 ,Matrix Keypad Column 7/Row 6 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 21. " MKC21 ,Matrix Keypad Column 7/Row 5 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 20. " MKC20 ,Matrix Keypad Column 7/Row 4 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 19. " MKC19 ,Matrix Keypad Column 7/Row 3 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 18. " MKC18 ,Matrix Keypad Column 7/Row 2 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 17. " MKC17 ,Matrix Keypad Column 7/Row 1 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 16. " MKC16 ,Matrix Keypad Column 7/Row 0 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 7. " MKC7 ,Matrix Keypad Column 6/Row 7 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 6. " MKC6 ,Matrix Keypad Column 6/Row 6 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 5. " MKC5 ,Matrix Keypad Column 6/Row 5 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 4. " MKC4 ,Matrix Keypad Column 6/Row 4 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 3. " MKC3 ,Matrix Keypad Column 6/Row 3 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 2. " MKC2 ,Matrix Keypad Column 6/Row 2 Reading" "Not identified,Identified"
|
|
bitfld.long 0x0 1. " MKC1 ,Matrix Keypad Column 6/Row 1 Reading" "Not identified,Identified"
|
|
textline " "
|
|
bitfld.long 0x0 0. " MKC0 ,Matrix Keypad Column 6/Row 0 Reading" "Not identified,Identified"
|
|
group.long 0x48++3
|
|
line.long 0x00 "KPKDI,Keypad Key Debounce Interval Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DK_DEB_INTERV ,Direct Key Debounce Interval"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MK_DEB_INTERV ,Matrix Key Debounce Interval"
|
|
width 0xb
|
|
tree.end
|
|
tree "ADC and Touch Screen Interface"
|
|
base ad:0x41C00000
|
|
width 0x6
|
|
rgroup.long 0x00++3
|
|
line.long 0x00 "ADCD,Analog-to-Digital Converter Data Register"
|
|
bitfld.long 0x00 31. " SD ,Stylus Event" "No event,Event"
|
|
bitfld.long 0x00 30. " VAL ,ADC Data Conversion Valid" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SV ,Stylus Value" "Up,Down"
|
|
hexmask.long.word 0x00 15.--26. 1. " ADC_DATA1 ,ADC Data Value 1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " ADC_MUX0 ,ADC Input Mux Selection (copy) for Generating ADC_DATA0" "Reserved,Reserved,Reserved,Reserved,Ym -pressure,Xm -pressure,Yp -pressure/Y Conversion,Yp -pressure/X Conversion"
|
|
hexmask.long.word 0x00 0.--11. 1. " ADC_DATA0 ,ADC Data Value 0"
|
|
group.long 0x04++3
|
|
line.long 0x00 "ADCS,Analog-to-Digital Converter Setup Register"
|
|
bitfld.long 0x00 31. " RUN ,ADC Begin Conversion Strobe (RUN)" "Complete,Started"
|
|
bitfld.long 0x00 30. " CC ,Continous Convert Mode Bit" "Stopped,Operating"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SD_EN ,Stylus Detect Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " VAL_EN ,Conversion Valid Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " XY_MODE ,XY Mode" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 20.--26. 1. " PRECHARGE_DELAY ,Precharge Delay"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RESOLUTION ,Resolution" "12 bit,6 bit"
|
|
bitfld.long 0x00 16.--18. " ADC_MUX ,ADC Input Select Mux" "Reserved,Reserved,Reserved,Reserved,Ym -pressure,Xm -pressure,Yp -pressure/Y Conversion,Yp -pressure/X Conversion"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " ADC_DELAY ,ADC Run Delay Value"
|
|
group.long 0x08++3
|
|
line.long 0x00 "ADCE,Analog-to-Digital Converter Enable Register"
|
|
bitfld.long 0x00 8. " P2 ,Touch Pressure Measurement" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " P1 ,Touch Pressure Measurement" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BIAS_EN ,ADC Internal Bias Enable" "Enabled,Disabled"
|
|
rgroup.long 0x0C++3
|
|
line.long 0x00 "ADCP,Analog-to-Digital Converter Pressure Register"
|
|
hexmask.long.byte 0x00 12.--17. 1. " X/Y ,x-position( (P1 or XYP1)/y-position(P2 or XYP2)"
|
|
hexmask.long.byte 0x00 6.--11. 1. " XP ,Xp measurement (P1 or XYP1)/Ym measurement(P2 or XYP2)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " YP ,Ym measurement (P1 or XYP1)/Yp measurement(P2 or XYP2)"
|
|
width 0xb
|
|
tree.end
|
|
tree "Universal Serial Bus 1.1 Client Controller"
|
|
base ad:0x40600000
|
|
width 0xb
|
|
tree "Control and Status Registers"
|
|
group.long 0x00++3
|
|
line.long 0x00 "UDCCR,UDC Control Register"
|
|
bitfld.long 0x00 31. " OEN ,On-the-Go Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " AALTHNP ,A-Device Alternate Host Negotiation Protocol Port Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 29. " AHNP ,A-device Host Negotiation Protocol Support" "Not supported,Supported"
|
|
bitfld.long 0x00 28. " BHNP ,B-device Host Negotiation Protocol Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DWRE ,Device Remote Wake-up Feature" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " PWRMD ,Power Mode" "Self,Bus"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " ACN ,Active UDC Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " AIN ,Active UDC Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " AAISN ,Active UDC Alternate Interface Setting Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. " SMAC ,Switch Endpoint Memory to Active Configuration" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 3. " EMCE ,Endpoint Memory Configuration Error" "No error,Error"
|
|
bitfld.long 0x00 2. " UDR ,UDC Resume" "Suspended,Not suspended"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UDA ,UDC Active" "Inactive,Active"
|
|
bitfld.long 0x00 0. " UDE ,UDC Enable" "Disabled,Enabled"
|
|
group.long 0x04++3
|
|
line.long 0x00 "UDCICR0,UDC Interrupt Control Register 0"
|
|
bitfld.long 0x00 30.--31. " IEP ,Interrupt Enables - Endpoint P" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 28.--29. " IEN ,Interrupt Enables - Endpoint N" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " IEM ,Interrupt Enables - Endpoint M" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 24.--25. " IEL ,Interrupt Enables - Endpoint L" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " IEK ,Interrupt Enables - Endpoint K" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 20.--21. " IEJ ,Interrupt Enables - Endpoint J" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IEI ,Interrupt Enables - Endpoint I" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 16.--17. " IEH ,Interrupt Enables - Endpoint H" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " IEG ,Interrupt Enables - Endpoint G" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 12.--13. " IEF ,Interrupt Enables - Endpoint F" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " IEE ,Interrupt Enables - Endpoint E" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 8.--9. " IED ,Interrupt Enables - Endpoint D" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IEC ,Interrupt Enables - Endpoint C" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 4.--5. " IEB ,Interrupt Enables - Endpoint B" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " IEA ,Interrupt Enables - Endpoint A" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 0.--1. " IE0 ,Interrupt Enables - Endpoint 0" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
group.long 0x08++3
|
|
line.long 0x00 "UDCICR1,UDC Interrupt Control Register 1"
|
|
bitfld.long 0x00 31. " IECC ,Interrupt Enables - Configuration Change" "Not changed,Changed"
|
|
bitfld.long 0x00 30. " IESOF ,Interrupt Enables - Start of Frame" "Not started ,Started"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IERU ,Interrupt Enables - Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x00 28. " IESU ,Interrupt Enables - Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IERS ,Interrupt Enables - Reset" "No reset,Reset"
|
|
bitfld.long 0x00 14.--15. " IEX ,Interrupt Enables - Endpoint X" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IEW ,Interrupt Enables - Endpoint W" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 10.--11. " IEV ,Interrupt Enables - Endpoint V" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " IEU ,Interrupt Enables - Endpoint U" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 6.--7. " IET ,Interrupt Enables - Endpoint T" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " IES ,Interrupt Enables - Endpoint S" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 2.--3. " IER ,Interrupt Enables - Endpoint R" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IEQ ,Interrupt Enables - Endpoint Q" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "UDCISR0,UDC Interrupt Status Register 0"
|
|
bitfld.long 0x00 30.--31. " IRP ,Interrupt Requests - Endpoint P" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 28.--29. " IRN ,Interrupt Requests - Endpoint N" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " IRM ,Interrupt Requests - Endpoint M" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 24.--25. " IRL ,Interrupt Requests - Endpoint L" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " IRK ,Interrupt Requests - Endpoint K" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 20.--21. " IRJ ,Interrupt Requests - Endpoint J" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IRI ,Interrupt Requests - Endpoint I" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 16.--17. " IRH ,Interrupt Requests - Endpoint H" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " IRG ,Interrupt Requests - Endpoint G" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 12.--13. " IRF ,Interrupt Requests - Endpoint F" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " IRE ,Interrupt Requests - Endpoint E" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 8.--9. " IRD ,Interrupt Requests - Endpoint D" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IRC ,Interrupt Requests - Endpoint C" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 4.--5. " IRB ,Interrupt Requests - Endpoint B" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " IRA ,Interrupt Requests - Endpoint A" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 0.--1. " IR0 ,Interrupt Requests - Endpoint 0" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
group.long 0x10++3
|
|
line.long 0x00 "UDCISR1,UDC Interrupt Status Register 1"
|
|
bitfld.long 0x00 31. " IRCC ,Interrupt Requests - Configuration Change" "Not changed,Changed"
|
|
bitfld.long 0x00 30. " IRSOF ,Interrupt Requests - Start of Frame" "Not started ,Started"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IRRU ,Interrupt Requests - Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x00 28. " IRSU ,Interrupt Requests - Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRRS ,Interrupt Requests - Reset" "No reset,Reset"
|
|
bitfld.long 0x00 14.--15. " IRX ,Interrupt Requests - Endpoint X" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IRW ,Interrupt Requests - Endpoint W" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 10.--11. " IRV ,Interrupt Requests - Endpoint V" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " IRU ,Interrupt Requests - Endpoint U" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 6.--7. " IRT ,Interrupt Requests - Endpoint T" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " IRS ,Interrupt Requests - Endpoint S" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
bitfld.long 0x00 2.--3. " IRR ,Interrupt Requests - Endpoint R" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IRQ ,Interrupt Requests - Endpoint Q" "Disabled,Packet complete,FIFO error,Packet complete and FIFO error"
|
|
rgroup.long 0x14++3
|
|
line.long 0x00 "UDCFNR,UDC Frame Number Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " FN ,Frame Number Associated with Last Received SOF"
|
|
group.long 0x18++3
|
|
line.long 0x00 "UDCOTGICR,UDC OTG Interrupt Control Register"
|
|
bitfld.long 0x00 24. " IESF ,OTG Set_feature Command Received" "Not received,Received"
|
|
bitfld.long 0x00 17. " IEXR ,External Transceiver Interrupt Rising Edge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IEXF ,External Transceiver Interrupt Falling Edge Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IEVV40R ,OTG Vbus Valid 4.0 V Rising Edge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IEVV40F ,OTG Vbus Valid 4.0 V Falling Edge Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IEVV44R ,OTG Vbus Valid 4.4 V Rising Edge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IEVV44F ,OTG Vbus Valid 4.4 V Falling Edge Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IESVR ,OTG Session Valid Rising Edge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IESVF ,OTG Session Valid Falling Edge Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IESDR ,OTG A-Device SRP Detect Rising Edge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IESDF ,OTG A-Device SRP Detect Falling Edge Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IEIDR ,OTG ID Change Rising Edge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IEIDF ,OTG A-Device SRP Detect Falling Edge Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "UDCOTGISR,UDC OTG Interrupt Status Register"
|
|
eventfld.long 0x00 24. " IRSF ,OTG Set_feature Command Received" "Not received,Received"
|
|
eventfld.long 0x00 16. " IRXR ,External Transceiver Interrupt Rising Edge Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 15. " IRXF ,External Transceiver Interrupt Falling Edge Interrupt Request" "Not requested,Requested"
|
|
eventfld.long 0x00 9. " IRVV40R ,OTG Vbus Valid 4.0 V Rising Edge Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 8. " IRVV40F ,OTG Vbus Valid 4.0 V Falling Edge Interrupt Request" "Not requested,Requested"
|
|
eventfld.long 0x00 7. " IRVV44R ,OTG Vbus Valid 4.4 V Rising Edge Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 6. " IRVV44F ,OTG Vbus Valid 4.4 V Falling Edge Interrupt Request" "Not requested,Requested"
|
|
eventfld.long 0x00 5. " IRSVR ,OTG Session Valid Rising Edge Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 4. " IRSVF ,OTG Session Valid Falling Edge Interrupt Request" "Not requested,Requested"
|
|
eventfld.long 0x00 3. " IRSDR ,OTG A-Device SRP Detect Rising Edge Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 2. " IRSDF ,OTG A-Device SRP Detect Falling Edge Interrupt Request" "Not requested,Requested"
|
|
eventfld.long 0x00 1. " IRIDR ,OTG ID Change Rising Edge Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 0. " IRIDF ,OTG A-Device SRP Detect Falling Edge Interrupt Request" "Not requested,Requested"
|
|
rgroup.long 0x20++3
|
|
line.long 0x00 "UP2OCR,USB Port 2 Output Control Register"
|
|
bitfld.long 0x00 24.--26. " SEOS ,Single-Ended Output Select" "Off,Not used,Device single-ended,Host single-ended,Device Ext OTG Transceiver,Host Ext OTG Transceiver,Device Ext Charge Pump,Host Ext Charge Pump"
|
|
bitfld.long 0x00 17. " HXOE ,Host Port 2 Transceiver Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HXS ,Host Port 2 Transceiver Output Select" "Device,Host"
|
|
bitfld.long 0x00 10. " IDON ,OTG ID Read Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EXSUS ,External Transceiver Suspend Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EXSP ,External Transceiver Speed Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMSTAT ,Host Port 2 Transceiver Status of D- pin" "Low,High"
|
|
bitfld.long 0x00 6. " VPMBlockEnbN ,Host Port 3 Vp/Vm Block Enable_N (control bit for single ended mode)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DPSTAT ,Host Port 2 Transceiver Status of D+ pin" "Low,High"
|
|
bitfld.long 0x00 4. " DPPUE ,Host Port 2 Transceiver D+ Pullup Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMPDE ,Host Port 2 Transceiver D- Pulldown Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DPPDE ,Host Port 2 Transceiver D+ Pulldown Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CPVPE ,Charge Pump Vbus Pulse Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CPVEN ,Charge Pump Vbus Enable" "Disabled,Enabled"
|
|
group.long 0x24++3
|
|
line.long 0x00 "UP3OCR,USB Port 3 Output Control Register"
|
|
bitfld.long 0x00 0.--1. " CFG ,Host Port 3 Configuration" "Host,Reserved,Device,Reserved"
|
|
tree.end
|
|
tree "Endpoint Control and Status Registers"
|
|
group.long 0x100++3
|
|
line.long 0x00 "UDCCSR0,UDC Control/Status Register Endpoint 0"
|
|
bitfld.long 0x00 10. " ODFCLR ,OPC Disable FIFO Clear" "Enabled,Disabled"
|
|
bitfld.long 0x00 9. " ACM ,ACK Control Mode" "ACK,NAK"
|
|
textline " "
|
|
bitfld.long 0x00 8. " AREN ,ACK Response Enable" "NAK,ACK"
|
|
eventfld.long 0x00 7. " SA ,Setup Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FTF ,Flush Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 1. " IPR ,In Packet Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 0. " OPC ,Out Packet Complete" "Not complete,Complete"
|
|
if ((d.l(ad:0x40600300+0x104)&0x1000)==0x1000)
|
|
group.long 0x104++3
|
|
line.long 0x00 "UDCCSRA,UDC Control/Status Register - Endpoint A"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x104++3
|
|
line.long 0x00 "UDCCSRA,UDC Control/Status Register - Endpoint A"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x108)&0x1000)==0x1000)
|
|
group.long 0x108++3
|
|
line.long 0x00 "UDCCSRB,UDC Control/Status Register - Endpoint B"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x108++3
|
|
line.long 0x00 "UDCCSRB,UDC Control/Status Register - Endpoint B"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x10C)&0x1000)==0x1000)
|
|
group.long 0x10C++3
|
|
line.long 0x00 "UDCCSRC,UDC Control/Status Register - Endpoint C"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x10C++3
|
|
line.long 0x00 "UDCCSRC,UDC Control/Status Register - Endpoint C"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x110)&0x1000)==0x1000)
|
|
group.long 0x110++3
|
|
line.long 0x00 "UDCCSRD,UDC Control/Status Register - Endpoint D"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x110++3
|
|
line.long 0x00 "UDCCSRD,UDC Control/Status Register - Endpoint D"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x114)&0x1000)==0x1000)
|
|
group.long 0x114++3
|
|
line.long 0x00 "UDCCSRE,UDC Control/Status Register - Endpoint E"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x114++3
|
|
line.long 0x00 "UDCCSRE,UDC Control/Status Register - Endpoint E"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x118)&0x1000)==0x1000)
|
|
group.long 0x118++3
|
|
line.long 0x00 "UDCCSRF,UDC Control/Status Register - Endpoint F"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x118++3
|
|
line.long 0x00 "UDCCSRF,UDC Control/Status Register - Endpoint F"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x11C)&0x1000)==0x1000)
|
|
group.long 0x11C++3
|
|
line.long 0x00 "UDCCSRG,UDC Control/Status Register - Endpoint G"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x11C++3
|
|
line.long 0x00 "UDCCSRG,UDC Control/Status Register - Endpoint G"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x120)&0x1000)==0x1000)
|
|
group.long 0x120++3
|
|
line.long 0x00 "UDCCSRH,UDC Control/Status Register - Endpoint H"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x120++3
|
|
line.long 0x00 "UDCCSRH,UDC Control/Status Register - Endpoint H"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x124)&0x1000)==0x1000)
|
|
group.long 0x124++3
|
|
line.long 0x00 "UDCCSRI,UDC Control/Status Register - Endpoint I"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x124++3
|
|
line.long 0x00 "UDCCSRI,UDC Control/Status Register - Endpoint I"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x128)&0x1000)==0x1000)
|
|
group.long 0x128++3
|
|
line.long 0x00 "UDCCSRJ,UDC Control/Status Register - Endpoint J"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x128++3
|
|
line.long 0x00 "UDCCSRJ,UDC Control/Status Register - Endpoint J"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x12C)&0x1000)==0x1000)
|
|
group.long 0x12C++3
|
|
line.long 0x00 "UDCCSRK,UDC Control/Status Register - Endpoint K"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x12C++3
|
|
line.long 0x00 "UDCCSRK,UDC Control/Status Register - Endpoint K"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x130)&0x1000)==0x1000)
|
|
group.long 0x130++3
|
|
line.long 0x00 "UDCCSRL,UDC Control/Status Register - Endpoint L"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x130++3
|
|
line.long 0x00 "UDCCSRL,UDC Control/Status Register - Endpoint L"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x134)&0x1000)==0x1000)
|
|
group.long 0x134++3
|
|
line.long 0x00 "UDCCSRM,UDC Control/Status Register - Endpoint M"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x134++3
|
|
line.long 0x00 "UDCCSRM,UDC Control/Status Register - Endpoint M"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x138)&0x1000)==0x1000)
|
|
group.long 0x138++3
|
|
line.long 0x00 "UDCCSRN,UDC Control/Status Register - Endpoint N"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x138++3
|
|
line.long 0x00 "UDCCSRN,UDC Control/Status Register - Endpoint N"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x13C)&0x1000)==0x1000)
|
|
group.long 0x13C++3
|
|
line.long 0x00 "UDCCSRP,UDC Control/Status Register - Endpoint P"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x13C++3
|
|
line.long 0x00 "UDCCSRP,UDC Control/Status Register - Endpoint P"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x140)&0x1000)==0x1000)
|
|
group.long 0x140++3
|
|
line.long 0x00 "UDCCSRQ,UDC Control/Status Register - Endpoint Q"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x140++3
|
|
line.long 0x00 "UDCCSRQ,UDC Control/Status Register - Endpoint Q"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x144)&0x1000)==0x1000)
|
|
group.long 0x144++3
|
|
line.long 0x00 "UDCCSRR,UDC Control/Status Register - Endpoint R"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x144++3
|
|
line.long 0x00 "UDCCSRR,UDC Control/Status Register - Endpoint R"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x148)&0x1000)==0x1000)
|
|
group.long 0x148++3
|
|
line.long 0x00 "UDCCSRS,UDC Control/Status Register - Endpoint S"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x148++3
|
|
line.long 0x00 "UDCCSRS,UDC Control/Status Register - Endpoint S"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x14C)&0x1000)==0x1000)
|
|
group.long 0x14C++3
|
|
line.long 0x00 "UDCCSRT,UDC Control/Status Register - Endpoint T"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x14C++3
|
|
line.long 0x00 "UDCCSRT,UDC Control/Status Register - Endpoint T"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x150)&0x1000)==0x1000)
|
|
group.long 0x150++3
|
|
line.long 0x00 "UDCCSRU,UDC Control/Status Register - Endpoint U"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x150++3
|
|
line.long 0x00 "UDCCSRU,UDC Control/Status Register - Endpoint U"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x154)&0x1000)==0x1000)
|
|
group.long 0x154++3
|
|
line.long 0x00 "UDCCSRV,UDC Control/Status Register - Endpoint V"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x154++3
|
|
line.long 0x00 "UDCCSRV,UDC Control/Status Register - Endpoint V"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x158)&0x1000)==0x1000)
|
|
group.long 0x158++3
|
|
line.long 0x00 "UDCCSRW,UDC Control/Status Register - Endpoint W"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x158++3
|
|
line.long 0x00 "UDCCSRW,UDC Control/Status Register - Endpoint W"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if ((d.l(ad:0x40600300+0x15C)&0x1000)==0x1000)
|
|
group.long 0x15C++3
|
|
line.long 0x00 "UDCCSRX,UDC Control/Status Register - Endpoint X"
|
|
bitfld.long 0x00 10. " HBNF ,Hidden Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Transmit Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Transmmision" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Transmit FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x15C++3
|
|
line.long 0x00 "UDCCSRX,UDC Control/Status Register - Endpoint X"
|
|
bitfld.long 0x00 10. " HBNE ,Hidden Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Receive Endpoint FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Ready for Reading" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNE ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx/Rx NAK" "0,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,Receive FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
tree.end
|
|
tree "Endpoint Byte Count Registers"
|
|
rgroup.long 0x200++3
|
|
line.long 0x00 "UDCBCR0,UDC Byte Count Register - Endpoint 0"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x204++3
|
|
line.long 0x00 "UDCBCRA,UDC Byte Count Register - Endpoint A"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x208++3
|
|
line.long 0x00 "UDCBCRB,UDC Byte Count Register - Endpoint B"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x20C++3
|
|
line.long 0x00 "UDCBCRC,UDC Byte Count Register - Endpoint C"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x210++3
|
|
line.long 0x00 "UDCBCRD,UDC Byte Count Register - Endpoint D"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x214++3
|
|
line.long 0x00 "UDCBCRE,UDC Byte Count Register - Endpoint E"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x218++3
|
|
line.long 0x00 "UDCBCRF,UDC Byte Count Register - Endpoint F"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x21C++3
|
|
line.long 0x00 "UDCBCRG,UDC Byte Count Register - Endpoint G"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x220++3
|
|
line.long 0x00 "UDCBCRH,UDC Byte Count Register - Endpoint H"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x224++3
|
|
line.long 0x00 "UDCBCRI,UDC Byte Count Register - Endpoint I"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x228++3
|
|
line.long 0x00 "UDCBCRJ,UDC Byte Count Register - Endpoint J"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x22C++3
|
|
line.long 0x00 "UDCBCRK,UDC Byte Count Register - Endpoint K"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x230++3
|
|
line.long 0x00 "UDCBCRL,UDC Byte Count Register - Endpoint L"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x234++3
|
|
line.long 0x00 "UDCBCRM,UDC Byte Count Register - Endpoint M"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x238++3
|
|
line.long 0x00 "UDCBCRN,UDC Byte Count Register - Endpoint N"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x23C++3
|
|
line.long 0x00 "UDCBCRP,UDC Byte Count Register - Endpoint P"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x240++3
|
|
line.long 0x00 "UDCBCRQ,UDC Byte Count Register - Endpoint Q"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x244++3
|
|
line.long 0x00 "UDCBCRR,UDC Byte Count Register - Endpoint R"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x248++3
|
|
line.long 0x00 "UDCBCRS,UDC Byte Count Register - Endpoint S"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x24C++3
|
|
line.long 0x00 "UDCBCRT,UDC Byte Count Register - Endpoint T"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x250++3
|
|
line.long 0x00 "UDCBCRU,UDC Byte Count Register - Endpoint U"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x254++3
|
|
line.long 0x00 "UDCBCRV,UDC Byte Count Register - Endpoint V"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x258++3
|
|
line.long 0x00 "UDCBCRW,UDC Byte Count Register - Endpoint W"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
rgroup.long 0x25C++3
|
|
line.long 0x00 "UDCBCRX,UDC Byte Count Register - Endpoint X"
|
|
hexmask.long.word 0x00 0.--9. 1. " BC ,Byte Count"
|
|
tree.end
|
|
tree "Endpoint Data Registers"
|
|
group.long 0x300++3
|
|
line.long 0x00 "UDCDR0,UDC Data Register - Endpoint 0"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x304++3
|
|
line.long 0x00 "UDCDRA,UDC Data Register - Endpoint A"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x308++3
|
|
line.long 0x00 "UDCDRB,UDC Data Register - Endpoint B"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x30C++3
|
|
line.long 0x00 "UDCDRC,UDC Data Register - Endpoint C"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x310++3
|
|
line.long 0x00 "UDCDRD,UDC Data Register - Endpoint D"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x314++3
|
|
line.long 0x00 "UDCDRE,UDC Data Register - Endpoint E"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x318++3
|
|
line.long 0x00 "UDCDRF,UDC Data Register - Endpoint F"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x31C++3
|
|
line.long 0x00 "UDCDRG,UDC Data Register - Endpoint G"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x320++3
|
|
line.long 0x00 "UDCDRH,UDC Data Register - Endpoint H"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x324++3
|
|
line.long 0x00 "UDCDRI,UDC Data Register - Endpoint I"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x328++3
|
|
line.long 0x00 "UDCDRJ,UDC Data Register - Endpoint J"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x32C++3
|
|
line.long 0x00 "UDCDRK,UDC Data Register - Endpoint K"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x330++3
|
|
line.long 0x00 "UDCDRL,UDC Data Register - Endpoint L"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x334++3
|
|
line.long 0x00 "UDCDRM,UDC Data Register - Endpoint M"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x338++3
|
|
line.long 0x00 "UDCDRN,UDC Data Register - Endpoint N"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x33C++3
|
|
line.long 0x00 "UDCDRP,UDC Data Register - Endpoint P"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x340++3
|
|
line.long 0x00 "UDCDRQ,UDC Data Register - Endpoint Q"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x344++3
|
|
line.long 0x00 "UDCDRR,UDC Data Register - Endpoint R"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x348++3
|
|
line.long 0x00 "UDCDRS,UDC Data Register - Endpoint S"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x34C++3
|
|
line.long 0x00 "UDCDRT,UDC Data Register - Endpoint T"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x350++3
|
|
line.long 0x00 "UDCDRU,UDC Data Register - Endpoint U"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x354++3
|
|
line.long 0x00 "UDCDRV,UDC Data Register - Endpoint V"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x358++3
|
|
line.long 0x00 "UDCDRW,UDC Data Register - Endpoint W"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
group.long 0x35C++3
|
|
line.long 0x00 "UDCDRX,UDC Data Register - Endpoint X"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
tree.end
|
|
tree "Endpoint Configuration Registers"
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x404++3
|
|
line.long 0x00 "UDCCRA,UDC Configuration Register - Endpoint A"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x404++3
|
|
line.long 0x00 "UDCCRA,UDC Configuration Register - Endpoint A"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x408++3
|
|
line.long 0x00 "UDCCRB,UDC Configuration Register - Endpoint B"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x408++3
|
|
line.long 0x00 "UDCCRB,UDC Configuration Register - Endpoint B"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x40C++3
|
|
line.long 0x00 "UDCCRC,UDC Configuration Register - Endpoint C"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x40C++3
|
|
line.long 0x00 "UDCCRC,UDC Configuration Register - Endpoint C"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x410++3
|
|
line.long 0x00 "UDCCRD,UDC Configuration Register - Endpoint D"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x410++3
|
|
line.long 0x00 "UDCCRD,UDC Configuration Register - Endpoint D"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x414++3
|
|
line.long 0x00 "UDCCRE,UDC Configuration Register - Endpoint E"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x414++3
|
|
line.long 0x00 "UDCCRE,UDC Configuration Register - Endpoint E"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x418++3
|
|
line.long 0x00 "UDCCRF,UDC Configuration Register - Endpoint F"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x418++3
|
|
line.long 0x00 "UDCCRF,UDC Configuration Register - Endpoint F"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x41C++3
|
|
line.long 0x00 "UDCCRG,UDC Configuration Register - Endpoint G"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x41C++3
|
|
line.long 0x00 "UDCCRG,UDC Configuration Register - Endpoint G"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x420++3
|
|
line.long 0x00 "UDCCRH,UDC Configuration Register - Endpoint H"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x420++3
|
|
line.long 0x00 "UDCCRH,UDC Configuration Register - Endpoint H"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x424++3
|
|
line.long 0x00 "UDCCRI,UDC Configuration Register - Endpoint I"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x424++3
|
|
line.long 0x00 "UDCCRI,UDC Configuration Register - Endpoint I"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x428++3
|
|
line.long 0x00 "UDCCRJ,UDC Configuration Register - Endpoint J"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x428++3
|
|
line.long 0x00 "UDCCRJ,UDC Configuration Register - Endpoint J"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x42C++3
|
|
line.long 0x00 "UDCCRK,UDC Configuration Register - Endpoint K"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x42C++3
|
|
line.long 0x00 "UDCCRK,UDC Configuration Register - Endpoint K"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x430++3
|
|
line.long 0x00 "UDCCRL,UDC Configuration Register - Endpoint L"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x430++3
|
|
line.long 0x00 "UDCCRL,UDC Configuration Register - Endpoint L"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x434++3
|
|
line.long 0x00 "UDCCRM,UDC Configuration Register - Endpoint M"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x434++3
|
|
line.long 0x00 "UDCCRM,UDC Configuration Register - Endpoint M"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x438++3
|
|
line.long 0x00 "UDCCRN,UDC Configuration Register - Endpoint N"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x438++3
|
|
line.long 0x00 "UDCCRN,UDC Configuration Register - Endpoint N"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x43C++3
|
|
line.long 0x00 "UDCCRP,UDC Configuration Register - Endpoint P"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x43C++3
|
|
line.long 0x00 "UDCCRP,UDC Configuration Register - Endpoint P"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x440++3
|
|
line.long 0x00 "UDCCRQ,UDC Configuration Register - Endpoint Q"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x440++3
|
|
line.long 0x00 "UDCCRQ,UDC Configuration Register - Endpoint Q"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x444++3
|
|
line.long 0x00 "UDCCRR,UDC Configuration Register - Endpoint R"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x444++3
|
|
line.long 0x00 "UDCCRR,UDC Configuration Register - Endpoint R"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x448++3
|
|
line.long 0x00 "UDCCRS,UDC Configuration Register - Endpoint S"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x448++3
|
|
line.long 0x00 "UDCCRS,UDC Configuration Register - Endpoint S"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x44C++3
|
|
line.long 0x00 "UDCCRT,UDC Configuration Register - Endpoint T"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x44C++3
|
|
line.long 0x00 "UDCCRT,UDC Configuration Register - Endpoint T"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x450++3
|
|
line.long 0x00 "UDCCRU,UDC Configuration Register - Endpoint U"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x450++3
|
|
line.long 0x00 "UDCCRU,UDC Configuration Register - Endpoint U"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x454++3
|
|
line.long 0x00 "UDCCRV,UDC Configuration Register - Endpoint V"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x454++3
|
|
line.long 0x00 "UDCCRV,UDC Configuration Register - Endpoint V"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x458++3
|
|
line.long 0x00 "UDCCRW,UDC Configuration Register - Endpoint W"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x458++3
|
|
line.long 0x00 "UDCCRW,UDC Configuration Register - Endpoint W"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x40600000))&0x1)==0x1)
|
|
rgroup.long 0x45C++3
|
|
line.long 0x00 "UDCCRX,UDC Configuration Register - Endpoint X"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x45C++3
|
|
line.long 0x00 "UDCCRX,UDC Configuration Register - Endpoint X"
|
|
bitfld.long 0x00 25.--26. " CN ,Configuration Number" "Reserved,1,2,3"
|
|
bitfld.long 0x00 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " ASIN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--18. " EN ,Endpoint Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ET ,USB Endpoint Type" "Interrupt,Bulk,Isochronous,Not used"
|
|
bitfld.long 0x00 12. " ED ,USB Endpoint Direction" "Out,In"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x00 1. " DE ,Double-buffering Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EE ,Endpoint Enable" "Disabled,Enabled"
|
|
endif
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Universal Serial Bus 2.0 Client Controller"
|
|
base ad:0x54100000
|
|
width 0xd
|
|
tree "Common Registers"
|
|
group.long 0x00++3
|
|
line.long 0x00 "U2DCR,U2D Control Register"
|
|
bitfld.long 0x00 21. " ABP ,Application Bus Power" "Self,Bus"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ADD ,Application Device Disconnect" "Not disconnected,Disconnected"
|
|
eventfld.long 0x00 19. " CC ,Configuration Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 18. " HS ,High Speed USB Detection" "Full,High"
|
|
bitfld.long 0x00 17. " SMAC ,Switch Endpoint Memory to Active Configuration" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DWRE ,Device Remote Wake-up Feature" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--15. " ACN ,Active U2D Configuration Number" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " AIN ,Associated U2D Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " AAISN ,Active U2D Alternate Interface Setting Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
eventfld.long 0x00 3. " EMCE ,Endpoint Memory Configuration Error" "No error,Error"
|
|
bitfld.long 0x00 2. " UDR ,U2D Resume" "Suspended,Not suspended"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UDA ,U2D Active" "Inactive,Active"
|
|
bitfld.long 0x00 0. " UDE ,U2D Enable" "Disabled,Enabled"
|
|
group.long 0x04++3
|
|
line.long 0x00 "U2DICR,U2D Interrupt Control Register"
|
|
bitfld.long 0x00 31. " IECC ,Interrupt Enable - Configuration Change" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 30. " IESOF ,Interrupt Enable - Start of Frame" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IEUSOF ,Interrupt Enable - Micro Start of Frame" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IERU ,Interrupt Enable - Resume" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IESU ,Interrupt Enable - Suspend" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " IERS ,Interrupt Enable - Reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IEDPE ,Interrupt Enable - Data Packet Error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IEG[2] ,Short Packet Complete Interrupt Enable - Endpoint G" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " IEG[1] ,Packet Complete Interrupt Enable - Endpoint G" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IEG[0] ,FIFO Error Interrupt Enable - Endpoint G" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IEF[2] ,Short Packet Complete Interrupt Enable - Endpoint F" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IEF[1] ,Packet Complete Interrupt Enable - Endpoint F" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IEF[0] ,FIFO Error Interrupt Enable - Endpoint F" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IEE[2] ,Short Packet Complete Interrupt Enable - Endpoint E" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IEE[1] ,Packet Complete Interrupt Enable - Endpoint E" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IEE[0] ,FIFO Error Interrupt Enable - Endpoint E" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IED[2] ,Short Packet Complete Interrupt Enable - Endpoint D" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IED[1] ,Packet Complete Interrupt Enable - Endpoint D" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IED[0] ,FIFO Error Interrupt Enable - Endpoint D" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IEC[2] ,Short Packet Complete Interrupt Enable - Endpoint C" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " IEC[1] ,Packet Complete Interrupt Enable - Endpoint C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IEC[0] ,FIFO Error Interrupt Enable - Endpoint C" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IEB[2] ,Short Packet Complete Interrupt Enable - Endpoint B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IEB[1] ,Packet Complete Interrupt Enable - Endpoint B" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IEB[0] ,FIFO Error Interrupt Enable - Endpoint B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IEA[2] ,Short Packet Complete Interrupt Enable - Endpoint A" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IEA[1] ,Packet Complete Interrupt Enable - Endpoint A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IEA[0] ,FIFO Error Interrupt Enable - Endpoint A" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IE0[2] ,Short Packet Complete Interrupt Enable - Endpoint 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IE0[1] ,Packet Complete Interrupt Enable - Endpoint 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IE0[0] ,FIFO Error Interrupt Enable - Endpoint 0" "Disabled,Enabled"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "U2DISR,U2D Interrupt Status Register"
|
|
eventfld.long 0x00 31. " IRCC ,Interrupt Request - Configuration Change" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 30. " IRSOF ,Interrupt Request - Start of Frame" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 29. " IRUSOF ,Interrupt Request - Micro Start of Frame" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 28. " IRRU ,Interrupt Request - Resume" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 27. " IRSU ,Interrupt Request - Suspend" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 26. " IRRS ,Interrupt Request - Reset" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 25. " IRDPE ,Interrupt Request - Data Packet Error" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 23. " IEG[2] ,Short Packet Complete Interrupt Enable - Endpoint G" "Not requested,Requested"
|
|
eventfld.long 0x00 22. " IEG[1] ,Packet Complete Interrupt Enable - Endpoint G" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 21. " IEG[0] ,FIFO Error Interrupt Enable - Endpoint G" "Not requested,Requested"
|
|
eventfld.long 0x00 20. " IEF[2] ,Short Packet Complete Interrupt Enable - Endpoint F" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 19. " IEF[1] ,Packet Complete Interrupt Enable - Endpoint F" "Not requested,Requested"
|
|
eventfld.long 0x00 18. " IEF[0] ,FIFO Error Interrupt Enable - Endpoint F" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 17. " IEE[2] ,Short Packet Complete Interrupt Enable - Endpoint E" "Not requested,Requested"
|
|
eventfld.long 0x00 16. " IEE[1] ,Packet Complete Interrupt Enable - Endpoint E" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 15. " IEE[0] ,FIFO Error Interrupt Enable - Endpoint E" "Not requested,Requested"
|
|
eventfld.long 0x00 14. " IED[2] ,Short Packet Complete Interrupt Enable - Endpoint D" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 13. " IED[1] ,Packet Complete Interrupt Enable - Endpoint D" "Not requested,Requested"
|
|
eventfld.long 0x00 12. " IED[0] ,FIFO Error Interrupt Enable - Endpoint D" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 11. " IEC[2] ,Short Packet Complete Interrupt Enable - Endpoint C" "Not requested,Requested"
|
|
eventfld.long 0x00 10. " IEC[1] ,Packet Complete Interrupt Enable - Endpoint C" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 9. " IEC[0] ,FIFO Error Interrupt Enable - Endpoint C" "Not requested,Requested"
|
|
eventfld.long 0x00 8. " IEB[2] ,Short Packet Complete Interrupt Enable - Endpoint B" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 7. " IEB[1] ,Packet Complete Interrupt Enable - Endpoint B" "Not requested,Requested"
|
|
eventfld.long 0x00 6. " IEB[0] ,FIFO Error Interrupt Enable - Endpoint B" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 5. " IEA[2] ,Short Packet Complete Interrupt Enable - Endpoint A" "Not requested,Requested"
|
|
eventfld.long 0x00 4. " IEA[1] ,Packet Complete Interrupt Enable - Endpoint A" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 3. " IEA[0] ,FIFO Error Interrupt Enable - Endpoint A" "Not requested,Requested"
|
|
eventfld.long 0x00 2. " IE0[2] ,Short Packet Complete Interrupt Enable - Endpoint 0" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 1. " IE0[1] ,Packet Complete Interrupt Enable - Endpoint 0" "Not requested,Requested"
|
|
eventfld.long 0x00 0. " IE0[0] ,FIFO Error Interrupt Enable - Endpoint 0" "Not requested,Requested"
|
|
group.long 0x14++3
|
|
line.long 0x00 "U2DFNR,U2D Frame Number Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " FN ,Frame Number Associated with Last Received SOF/uSOF"
|
|
tree.end
|
|
tree "U2D Control/Status Registers for Endpoints"
|
|
group.long 0x100++3
|
|
line.long 0x00 "U2DCSR0,UD2 Control/Status Register Endpoint 0"
|
|
bitfld.long 0x00 8. " IPA ,In Packet Adjusted" "Not adjusted,Adjusted"
|
|
eventfld.long 0x00 7. " SA ,Setup Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FTF ,Flush Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 1. " IPR ,In Packet Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 0. " OPC ,Out Packet Complete" "Not complete,Complete"
|
|
if (((d.l(ad:0x54100404+0x104)&0x10)==0x10)&&((d.l(ad:0x54100404+0x104))&0x60)==0x20)
|
|
group.long 0x104++3
|
|
line.long 0x00 "U2DCSRA,UDC Control/Status Register - Endpoint A"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x104)&0x10)==0x10)&&((d.l(ad:0x54100404+0x104))&0x60)!=0x20)
|
|
group.long 0x104++3
|
|
line.long 0x00 "U2DCSRA,UDC Control/Status Register - Endpoint A"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x104)&0x10)==0x00)&&((d.l(ad:0x54100404+0x104))&0x60)==0x20)
|
|
group.long 0x104++3
|
|
line.long 0x00 "U2DCSRA,UDC Control/Status Register - Endpoint A"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x104++3
|
|
line.long 0x00 "U2DCSRA,UDC Control/Status Register - Endpoint A"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if (((d.l(ad:0x54100404+0x108)&0x10)==0x10)&&((d.l(ad:0x54100404+0x108))&0x60)==0x20)
|
|
group.long 0x108++3
|
|
line.long 0x00 "U2DCSRB,UDC Control/Status Register - Endpoint B"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x108)&0x10)==0x10)&&((d.l(ad:0x54100404+0x108))&0x60)!=0x20)
|
|
group.long 0x108++3
|
|
line.long 0x00 "U2DCSRB,UDC Control/Status Register - Endpoint B"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x108)&0x10)==0x00)&&((d.l(ad:0x54100404+0x108))&0x60)==0x20)
|
|
group.long 0x108++3
|
|
line.long 0x00 "U2DCSRB,UDC Control/Status Register - Endpoint B"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x108++3
|
|
line.long 0x00 "U2DCSRB,UDC Control/Status Register - Endpoint B"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if (((d.l(ad:0x54100404+0x10C)&0x10)==0x10)&&((d.l(ad:0x54100404+0x10C))&0x60)==0x20)
|
|
group.long 0x10C++3
|
|
line.long 0x00 "U2DCSRC,UDC Control/Status Register - Endpoint C"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x10C)&0x10)==0x10)&&((d.l(ad:0x54100404+0x10C))&0x60)!=0x20)
|
|
group.long 0x10C++3
|
|
line.long 0x00 "U2DCSRC,UDC Control/Status Register - Endpoint C"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x10C)&0x10)==0x00)&&((d.l(ad:0x54100404+0x10C))&0x60)==0x20)
|
|
group.long 0x10C++3
|
|
line.long 0x00 "U2DCSRC,UDC Control/Status Register - Endpoint C"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x10C++3
|
|
line.long 0x00 "U2DCSRC,UDC Control/Status Register - Endpoint C"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if (((d.l(ad:0x54100404+0x110)&0x10)==0x10)&&((d.l(ad:0x54100404+0x110))&0x60)==0x20)
|
|
group.long 0x110++3
|
|
line.long 0x00 "U2DCSRD,UDC Control/Status Register - Endpoint D"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x110)&0x10)==0x10)&&((d.l(ad:0x54100404+0x110))&0x60)!=0x20)
|
|
group.long 0x110++3
|
|
line.long 0x00 "U2DCSRD,UDC Control/Status Register - Endpoint D"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x110)&0x10)==0x00)&&((d.l(ad:0x54100404+0x110))&0x60)==0x20)
|
|
group.long 0x110++3
|
|
line.long 0x00 "U2DCSRD,UDC Control/Status Register - Endpoint D"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x110++3
|
|
line.long 0x00 "U2DCSRD,UDC Control/Status Register - Endpoint D"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if (((d.l(ad:0x54100404+0x114)&0x10)==0x10)&&((d.l(ad:0x54100404+0x114))&0x60)==0x20)
|
|
group.long 0x114++3
|
|
line.long 0x00 "U2DCSRE,UDC Control/Status Register - Endpoint E"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x114)&0x10)==0x10)&&((d.l(ad:0x54100404+0x114))&0x60)!=0x20)
|
|
group.long 0x114++3
|
|
line.long 0x00 "U2DCSRE,UDC Control/Status Register - Endpoint E"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x114)&0x10)==0x00)&&((d.l(ad:0x54100404+0x114))&0x60)==0x20)
|
|
group.long 0x114++3
|
|
line.long 0x00 "U2DCSRE,UDC Control/Status Register - Endpoint E"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x114++3
|
|
line.long 0x00 "U2DCSRE,UDC Control/Status Register - Endpoint E"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if (((d.l(ad:0x54100404+0x118)&0x10)==0x10)&&((d.l(ad:0x54100404+0x118))&0x60)==0x20)
|
|
group.long 0x118++3
|
|
line.long 0x00 "U2DCSRF,UDC Control/Status Register - Endpoint F"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x118)&0x10)==0x10)&&((d.l(ad:0x54100404+0x118))&0x60)!=0x20)
|
|
group.long 0x118++3
|
|
line.long 0x00 "U2DCSRF,UDC Control/Status Register - Endpoint F"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x118)&0x10)==0x00)&&((d.l(ad:0x54100404+0x118))&0x60)==0x20)
|
|
group.long 0x118++3
|
|
line.long 0x00 "U2DCSRF,UDC Control/Status Register - Endpoint F"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x118++3
|
|
line.long 0x00 "U2DCSRF,UDC Control/Status Register - Endpoint F"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
if (((d.l(ad:0x54100404+0x11C)&0x10)==0x10)&&((d.l(ad:0x54100404+0x11C))&0x60)==0x20)
|
|
group.long 0x11C++3
|
|
line.long 0x00 "U2DCSRG,UDC Control/Status Register - Endpoint G"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x11C)&0x10)==0x10)&&((d.l(ad:0x54100404+0x11C))&0x60)!=0x20)
|
|
group.long 0x11C++3
|
|
line.long 0x00 "U2DCSRG,UDC Control/Status Register - Endpoint G"
|
|
bitfld.long 0x00 10. " BE ,Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Transmit FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Full" "Full,Not full"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Tx NAK" "Not empty,Empty"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
elif (((d.l(ad:0x54100404+0x11C)&0x10)==0x00)&&((d.l(ad:0x54100404+0x11C))&0x60)==0x20)
|
|
group.long 0x11C++3
|
|
line.long 0x00 "U2DCSRG,UDC Control/Status Register - Endpoint G"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 9. " DPE ,Data Packet Error (Isochronous Endpoints only)" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
else
|
|
group.long 0x11C++3
|
|
line.long 0x00 "U2DCSRG,UDC Control/Status Register - Endpoint G"
|
|
bitfld.long 0x00 10. " BF ,Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " FEF ,Flush Endpoint Receive FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SP ,Short Packet Control/Status" "Not received,Received"
|
|
bitfld.long 0x00 6. " BNF ,Buffer Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FST ,Force Stall" "Not forced,Forced"
|
|
eventfld.long 0x00 4. " SST ,Sent Stall" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DME ,DMA Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " TRN ,Rx NAK" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PC ,Packet Complete" "Invalid,Valid"
|
|
bitfld.long 0x00 0. " FS ,FIFO Needs Service" "No room,Complete data"
|
|
endif
|
|
tree.end
|
|
tree "U2D Byte Count Register"
|
|
rgroup.long 0x200++3
|
|
line.long 0x00 "U2DBCR0,U2D Byte Count Register - Endpoint 0"
|
|
hexmask.long.word 0x00 0.--10. 1. " BC ,Byte Count"
|
|
tree.end
|
|
tree "U2D Data Register"
|
|
group.long 0x300++3
|
|
line.long 0x00 "U2DDR0,U2D Data Register - Endpoint"
|
|
hexmask.long 0x00 0.--31. 1. " ED ,Endpoint Data"
|
|
tree.end
|
|
tree "U2D Configuration Registers for Endpoints"
|
|
group.long 0x404++3
|
|
line.long 0x00 "U2DCRA,U2D Configuration Register - Endpoint A"
|
|
hexmask.long.word 0x00 1.--10. 1. " BS ,Buffer Size"
|
|
bitfld.long 0x00 0. " EE ,Endponit Enable" "Disabled,Enabled"
|
|
group.long 0x408++3
|
|
line.long 0x00 "U2DCRB,U2D Configuration Register - Endpoint B"
|
|
hexmask.long.word 0x00 1.--10. 1. " BS ,Buffer Size"
|
|
bitfld.long 0x00 0. " EE ,Endponit Enable" "Disabled,Enabled"
|
|
group.long 0x40C++3
|
|
line.long 0x00 "U2DCRC,U2D Configuration Register - Endpoint C"
|
|
hexmask.long.word 0x00 1.--10. 1. " BS ,Buffer Size"
|
|
bitfld.long 0x00 0. " EE ,Endponit Enable" "Disabled,Enabled"
|
|
group.long 0x410++3
|
|
line.long 0x00 "U2DCRD,U2D Configuration Register - Endpoint D"
|
|
hexmask.long.word 0x00 1.--10. 1. " BS ,Buffer Size"
|
|
bitfld.long 0x00 0. " EE ,Endponit Enable" "Disabled,Enabled"
|
|
group.long 0x414++3
|
|
line.long 0x00 "U2DCRE,U2D Configuration Register - Endpoint E"
|
|
hexmask.long.word 0x00 1.--10. 1. " BS ,Buffer Size"
|
|
bitfld.long 0x00 0. " EE ,Endponit Enable" "Disabled,Enabled"
|
|
group.long 0x418++3
|
|
line.long 0x00 "U2DCRF,U2D Configuration Register - Endpoint F"
|
|
hexmask.long.word 0x00 1.--10. 1. " BS ,Buffer Size"
|
|
bitfld.long 0x00 0. " EE ,Endponit Enable" "Disabled,Enabled"
|
|
group.long 0x41C++3
|
|
line.long 0x00 "U2DCRG,U2D Configuration Register - Endpoint G"
|
|
hexmask.long.word 0x00 1.--10. 1. " BS ,Buffer Size"
|
|
bitfld.long 0x00 0. " EE ,Endponit Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "U2D Setup Command Address Register"
|
|
hgroup.long 0x500++3
|
|
hide.long 0x00 "U2DSCA,U2D Setup Command Address"
|
|
tree.end
|
|
tree "Endpoint Information Registers"
|
|
group.long 0x504++3
|
|
line.long 0x00 "U2DEN0,U2D Endpoint Information Register - Endpoint 0"
|
|
hexmask.long.word 0x00 19.--29. 1. " MPS ,Maximum Packet Size"
|
|
group.long 0x508++3
|
|
line.long 0x00 "U2DENA,U2D Endpoint Information Register - Endpoint A"
|
|
bitfld.long 0x00 30.--31. " HBW ,High Bandwidth Commands per Micro-frame" "Normal,Normal,High,High"
|
|
hexmask.long.word 0x00 19.--29. 1. " MPS ,Maximum Packet Size"
|
|
textline " "
|
|
bitfld.long 0x00 15.--18. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. " IN ,Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " CN ,Configuration Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--6. " ET ,USB Endpoint Type" "Not used,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ED ,USB Endpoint Direction" "Out,In"
|
|
bitfld.long 0x00 0.--3. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x50C++3
|
|
line.long 0x00 "U2DENB,U2D Endpoint Information Register - Endpoint B"
|
|
bitfld.long 0x00 30.--31. " HBW ,High Bandwidth Commands per Micro-frame" "Normal,Normal,High,High"
|
|
hexmask.long.word 0x00 19.--29. 1. " MPS ,Maximum Packet Size"
|
|
textline " "
|
|
bitfld.long 0x00 15.--18. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. " IN ,Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " CN ,Configuration Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--6. " ET ,USB Endpoint Type" "Not used,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ED ,USB Endpoint Direction" "Out,In"
|
|
bitfld.long 0x00 0.--3. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x510++3
|
|
line.long 0x00 "U2DENC,U2D Endpoint Information Register - Endpoint C"
|
|
bitfld.long 0x00 30.--31. " HBW ,High Bandwidth Commands per Micro-frame" "Normal,Normal,High,High"
|
|
hexmask.long.word 0x00 19.--29. 1. " MPS ,Maximum Packet Size"
|
|
textline " "
|
|
bitfld.long 0x00 15.--18. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. " IN ,Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " CN ,Configuration Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--6. " ET ,USB Endpoint Type" "Not used,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ED ,USB Endpoint Direction" "Out,In"
|
|
bitfld.long 0x00 0.--3. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x514++3
|
|
line.long 0x00 "U2DEND,U2D Endpoint Information Register - Endpoint D"
|
|
bitfld.long 0x00 30.--31. " HBW ,High Bandwidth Commands per Micro-frame" "Normal,Normal,High,High"
|
|
hexmask.long.word 0x00 19.--29. 1. " MPS ,Maximum Packet Size"
|
|
textline " "
|
|
bitfld.long 0x00 15.--18. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. " IN ,Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " CN ,Configuration Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--6. " ET ,USB Endpoint Type" "Not used,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ED ,USB Endpoint Direction" "Out,In"
|
|
bitfld.long 0x00 0.--3. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x518++3
|
|
line.long 0x00 "U2DENE,U2D Endpoint Information Register - Endpoint E"
|
|
bitfld.long 0x00 30.--31. " HBW ,High Bandwidth Commands per Micro-frame" "Normal,Normal,High,High"
|
|
hexmask.long.word 0x00 19.--29. 1. " MPS ,Maximum Packet Size"
|
|
textline " "
|
|
bitfld.long 0x00 15.--18. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. " IN ,Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " CN ,Configuration Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--6. " ET ,USB Endpoint Type" "Not used,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ED ,USB Endpoint Direction" "Out,In"
|
|
bitfld.long 0x00 0.--3. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x51C++3
|
|
line.long 0x00 "U2DENF,U2D Endpoint Information Register - Endpoint F"
|
|
bitfld.long 0x00 30.--31. " HBW ,High Bandwidth Commands per Micro-frame" "Normal,Normal,High,High"
|
|
hexmask.long.word 0x00 19.--29. 1. " MPS ,Maximum Packet Size"
|
|
textline " "
|
|
bitfld.long 0x00 15.--18. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. " IN ,Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " CN ,Configuration Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--6. " ET ,USB Endpoint Type" "Not used,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ED ,USB Endpoint Direction" "Out,In"
|
|
bitfld.long 0x00 0.--3. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x520++3
|
|
line.long 0x00 "U2DENG,U2D Endpoint Information Register - Endpoint G"
|
|
bitfld.long 0x00 30.--31. " HBW ,High Bandwidth Commands per Micro-frame" "Normal,Normal,High,High"
|
|
hexmask.long.word 0x00 19.--29. 1. " MPS ,Maximum Packet Size"
|
|
textline " "
|
|
bitfld.long 0x00 15.--18. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. " IN ,Interface Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " CN ,Configuration Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--6. " ET ,USB Endpoint Type" "Not used,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ED ,USB Endpoint Direction" "Out,In"
|
|
bitfld.long 0x00 0.--3. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "U2DMA Control/Status"
|
|
if (d.l(ad:0x54100000+0x1000)&0xC0000)==0x0
|
|
group.long 0x1000++3
|
|
line.long 0x00 "U2DMACSR0,U2DMA Control/Status Register for Channel 0"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Normal Completion,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1000)&0xC0000)==0x40000
|
|
group.long 0x1000++3
|
|
line.long 0x00 "U2DMACSR0,U2DMA Control/Status Register for Channel 0"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Master Abort,Target Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1000)&0xC0000)==0x80000
|
|
group.long 0x1000++3
|
|
line.long 0x00 "U2DMACSR0,U2DMA Control/Status Register for Channel 0"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Byte cnt out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x1000++3
|
|
line.long 0x00 "U2DMACSR0,U2DMA Control/Status Register for Channel 0"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
if (d.l(ad:0x54100000+0x1004)&0xC0000)==0x0
|
|
group.long 0x1004++3
|
|
line.long 0x00 "U2DMACSR1,U2DMA Control/Status Register for Channel 1"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Normal Completion,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1004)&0xC0000)==0x40000
|
|
group.long 0x1004++3
|
|
line.long 0x00 "U2DMACSR1,U2DMA Control/Status Register for Channel 1"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Master Abort,Target Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1004)&0xC0000)==0x80000
|
|
group.long 0x1004++3
|
|
line.long 0x00 "U2DMACSR1,U2DMA Control/Status Register for Channel 1"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Byte cnt out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x1004++3
|
|
line.long 0x00 "U2DMACSR1,U2DMA Control/Status Register for Channel 1"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
if (d.l(ad:0x54100000+0x1008)&0xC0000)==0x0
|
|
group.long 0x1008++3
|
|
line.long 0x00 "U2DMACSR2,U2DMA Control/Status Register for Channel 2"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Normal Completion,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1008)&0xC0000)==0x40000
|
|
group.long 0x1008++3
|
|
line.long 0x00 "U2DMACSR2,U2DMA Control/Status Register for Channel 2"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Master Abort,Target Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1008)&0xC0000)==0x80000
|
|
group.long 0x1008++3
|
|
line.long 0x00 "U2DMACSR2,U2DMA Control/Status Register for Channel 2"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Byte cnt out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x1008++3
|
|
line.long 0x00 "U2DMACSR2,U2DMA Control/Status Register for Channel 2"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
if (d.l(ad:0x54100000+0x100C)&0xC0000)==0x0
|
|
group.long 0x100C++3
|
|
line.long 0x00 "U2DMACSR3,U2DMA Control/Status Register for Channel 3"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Normal Completion,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x100C)&0xC0000)==0x40000
|
|
group.long 0x100C++3
|
|
line.long 0x00 "U2DMACSR3,U2DMA Control/Status Register for Channel 3"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Master Abort,Target Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x100C)&0xC0000)==0x80000
|
|
group.long 0x100C++3
|
|
line.long 0x00 "U2DMACSR3,U2DMA Control/Status Register for Channel 3"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Byte cnt out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x100C++3
|
|
line.long 0x00 "U2DMACSR3,U2DMA Control/Status Register for Channel 3"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
if (d.l(ad:0x54100000+0x1010)&0xC0000)==0x0
|
|
group.long 0x1010++3
|
|
line.long 0x00 "U2DMACSR4,U2DMA Control/Status Register for Channel 4"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Normal Completion,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1010)&0xC0000)==0x40000
|
|
group.long 0x1010++3
|
|
line.long 0x00 "U2DMACSR4,U2DMA Control/Status Register for Channel 4"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Master Abort,Target Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1010)&0xC0000)==0x80000
|
|
group.long 0x1010++3
|
|
line.long 0x00 "U2DMACSR4,U2DMA Control/Status Register for Channel 4"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Byte cnt out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x1010++3
|
|
line.long 0x00 "U2DMACSR4,U2DMA Control/Status Register for Channel 4"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
if (d.l(ad:0x54100000+0x1014)&0xC0000)==0x0
|
|
group.long 0x1014++3
|
|
line.long 0x00 "U2DMACSR5,U2DMA Control/Status Register for Channel 5"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Normal Completion,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1014)&0xC0000)==0x40000
|
|
group.long 0x1014++3
|
|
line.long 0x00 "U2DMACSR5,U2DMA Control/Status Register for Channel 5"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Master Abort,Target Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1014)&0xC0000)==0x80000
|
|
group.long 0x1014++3
|
|
line.long 0x00 "U2DMACSR5,U2DMA Control/Status Register for Channel 5"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Byte cnt out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x1014++3
|
|
line.long 0x00 "U2DMACSR5,U2DMA Control/Status Register for Channel 5"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
if (d.l(ad:0x54100000+0x1018)&0xC0000)==0x0
|
|
group.long 0x1018++3
|
|
line.long 0x00 "U2DMACSR6,U2DMA Control/Status Register for Channel 6"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Normal Completion,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1018)&0xC0000)==0x40000
|
|
group.long 0x1018++3
|
|
line.long 0x00 "U2DMACSR6,U2DMA Control/Status Register for Channel 6"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Master Abort,Target Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x1018)&0xC0000)==0x80000
|
|
group.long 0x1018++3
|
|
line.long 0x00 "U2DMACSR6,U2DMA Control/Status Register for Channel 6"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Byte cnt out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x1018++3
|
|
line.long 0x00 "U2DMACSR6,U2DMA Control/Status Register for Channel 6"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
if (d.l(ad:0x54100000+0x101C)&0xC0000)==0x0
|
|
group.long 0x101C++3
|
|
line.long 0x00 "U2DMACSR7,U2DMA Control/Status Register for Channel 7"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Normal Completion,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x101C)&0xC0000)==0x40000
|
|
group.long 0x101C++3
|
|
line.long 0x00 "U2DMACSR7,U2DMA Control/Status Register for Channel 7"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Master Abort,Target Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
elif (d.l(ad:0x54100000+0x101C)&0xC0000)==0x80000
|
|
group.long 0x101C++3
|
|
line.long 0x00 "U2DMACSR7,U2DMA Control/Status Register for Channel 7"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 13.--17. " SCEMI ,System Bus Split Completion Error Message Index" "Byte cnt out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error,Device-specific error"
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x101C++3
|
|
line.long 0x00 "U2DMACSR7,U2DMA Control/Status Register for Channel 7"
|
|
bitfld.long 0x00 31. " RUN ,Run" "Stopped,Started"
|
|
bitfld.long 0x00 29. " STOPIRQEN ,Stop Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EORJMPEN ,Jump to the next descriptor" "Hold,Jumped"
|
|
textline " "
|
|
bitfld.long 0x00 26. " EORSTOPEN ,Stop Channel on EOR" "Hold,Stopped"
|
|
bitfld.long 0x00 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MaskRun ,Mask Run" "Not masked,Masked"
|
|
bitfld.long 0x00 18.--19. " SCEMC ,System Bus Split Completion Error Message Class" "Write Completion,Bus Bridge Error,Bus Completer Error,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " BUSERRTYPE ,PX Bus Error Type" "No error,Master Abort,Target Abort,Split Completion Error,Retry Timeout,Reserved,Reserved,Reserved"
|
|
eventfld.long 0x00 9. " EORINTR ,End of Receive" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REQPEND ,Request Pending" "Not pending,Pending"
|
|
eventfld.long 0x00 4. " RASIntr ,Request After Channel Stopped" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOPINTR ,Stop Interrupt" "Running,Stopped"
|
|
eventfld.long 0x00 2. " ENDINTR ,End Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " STARTINTR ,Start Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " BUSERRINTR ,Bus Error Interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
tree.end
|
|
tree "U2DMA Control Register"
|
|
group.long 0x1080++3
|
|
line.long 0x00 "U2DMACR,U2DMA Control Register"
|
|
bitfld.long 0x00 2. " RETRYTOEN ,Internal System Bus Retry Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " MAXOCT ,Maximum Number of Outstanding Concurrent Transactions on the System Bus for All Channels" "4,1,2,3"
|
|
tree.end
|
|
tree "U2DMA Interrupt Register"
|
|
rgroup.long 0x10F0++3
|
|
line.long 0x00 "U2DMAINT,U2DMA Interrupt Register"
|
|
bitfld.long 0x00 15. " CHLINTR15 ,Channel 15 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " CHLINTR14 ,Channel 14 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CHLINTR13 ,Channel 13 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " CHLINTR12 ,Channel 12 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CHLINTR11 ,Channel 11 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " CHLINTR10 ,Channel 10 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CHLINTR9 ,Channel 9 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " CHLINTR8 ,Channel 8 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CHLINTR7 ,Channel 7 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " CHLINTR6 ,Channel 6 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CHLINTR5 ,Channel 5 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " CHLINTR4 ,Channel 4 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CHLINTR3 ,Channel 3 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " CHLINTR2 ,Channel 2 Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHLINTR1 ,Channel 1 Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " CHLINTR0 ,Channel 0 Interrupt" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "U2DMA Descriptor Address Channel Registers"
|
|
group.long 0x1200++3
|
|
line.long 0x00 "U2DMADADR0,U2DMA Descriptor Address Register Channel 0"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRIPA ,Descriptor Address Contains Address of Next Descriptor"
|
|
bitfld.long 0x00 0. " STOP ,Stop Channel" "Running,Stopped"
|
|
rgroup.long 0x1204++3
|
|
line.long 0x00 "U2DMASADR0,U2DMA Descriptor Address Register Channel 0"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x1208++3
|
|
line.long 0x00 "U2DMATADR0,U2DMA Target Address Register Chasnnel 0"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x120C++3
|
|
line.long 0x00 "U2DMACMD0,U2DMA Command Address Register Channel 0"
|
|
bitfld.long 0x00 31. " XFRDIR ,Transfer Direction" "FIFO to memory,Memory to FIFO"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor Enable" "No effect,No effect,Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EndIrqEn ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PACKCOMP ,Packet Complete" "Not complete,Complete"
|
|
hexmask.long.word 0x00 0.--10. 1. " LEN ,Length"
|
|
group.long 0x1210++3
|
|
line.long 0x00 "U2DMADADR1,U2DMA Descriptor Address Register Channel 1"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRIPA ,Descriptor Address Contains Address of Next Descriptor"
|
|
bitfld.long 0x00 0. " STOP ,Stop Channel" "Running,Stopped"
|
|
rgroup.long 0x1214++3
|
|
line.long 0x00 "U2DMASADR1,U2DMA Descriptor Address Register Channel 1"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x1218++3
|
|
line.long 0x00 "U2DMATADR1,U2DMA Target Address Register Chasnnel 1"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x121C++3
|
|
line.long 0x00 "U2DMACMD1,U2DMA Command Address Register Channel 1"
|
|
bitfld.long 0x00 31. " XFRDIR ,Transfer Direction" "FIFO to memory,Memory to FIFO"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor Enable" "No effect,No effect,Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EndIrqEn ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PACKCOMP ,Packet Complete" "Not complete,Complete"
|
|
hexmask.long.word 0x00 0.--10. 1. " LEN ,Length"
|
|
group.long 0x1220++3
|
|
line.long 0x00 "U2DMADADR2,U2DMA Descriptor Address Register Channel 2"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRIPA ,Descriptor Address Contains Address of Next Descriptor"
|
|
bitfld.long 0x00 0. " STOP ,Stop Channel" "Running,Stopped"
|
|
rgroup.long 0x1224++3
|
|
line.long 0x00 "U2DMASADR2,U2DMA Descriptor Address Register Channel 2"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x1228++3
|
|
line.long 0x00 "U2DMATADR2,U2DMA Target Address Register Chasnnel 2"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x122C++3
|
|
line.long 0x00 "U2DMACMD2,U2DMA Command Address Register Channel 2"
|
|
bitfld.long 0x00 31. " XFRDIR ,Transfer Direction" "FIFO to memory,Memory to FIFO"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor Enable" "No effect,No effect,Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EndIrqEn ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PACKCOMP ,Packet Complete" "Not complete,Complete"
|
|
hexmask.long.word 0x00 0.--10. 1. " LEN ,Length"
|
|
group.long 0x1230++3
|
|
line.long 0x00 "U2DMADADR3,U2DMA Descriptor Address Register Channel 3"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRIPA ,Descriptor Address Contains Address of Next Descriptor"
|
|
bitfld.long 0x00 0. " STOP ,Stop Channel" "Running,Stopped"
|
|
rgroup.long 0x1234++3
|
|
line.long 0x00 "U2DMASADR3,U2DMA Descriptor Address Register Channel 3"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x1238++3
|
|
line.long 0x00 "U2DMATADR3,U2DMA Target Address Register Chasnnel 3"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x123C++3
|
|
line.long 0x00 "U2DMACMD3,U2DMA Command Address Register Channel 3"
|
|
bitfld.long 0x00 31. " XFRDIR ,Transfer Direction" "FIFO to memory,Memory to FIFO"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor Enable" "No effect,No effect,Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EndIrqEn ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PACKCOMP ,Packet Complete" "Not complete,Complete"
|
|
hexmask.long.word 0x00 0.--10. 1. " LEN ,Length"
|
|
group.long 0x1240++3
|
|
line.long 0x00 "U2DMADADR4,U2DMA Descriptor Address Register Channel 4"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRIPA ,Descriptor Address Contains Address of Next Descriptor"
|
|
bitfld.long 0x00 0. " STOP ,Stop Channel" "Running,Stopped"
|
|
rgroup.long 0x1244++3
|
|
line.long 0x00 "U2DMASADR4,U2DMA Descriptor Address Register Channel 4"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x1248++3
|
|
line.long 0x00 "U2DMATADR4,U2DMA Target Address Register Chasnnel 4"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x124C++3
|
|
line.long 0x00 "U2DMACMD4,U2DMA Command Address Register Channel 4"
|
|
bitfld.long 0x00 31. " XFRDIR ,Transfer Direction" "FIFO to memory,Memory to FIFO"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor Enable" "No effect,No effect,Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EndIrqEn ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PACKCOMP ,Packet Complete" "Not complete,Complete"
|
|
hexmask.long.word 0x00 0.--10. 1. " LEN ,Length"
|
|
group.long 0x1250++3
|
|
line.long 0x00 "U2DMADADR5,U2DMA Descriptor Address Register Channel 5"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRIPA ,Descriptor Address Contains Address of Next Descriptor"
|
|
bitfld.long 0x00 0. " STOP ,Stop Channel" "Running,Stopped"
|
|
rgroup.long 0x1254++3
|
|
line.long 0x00 "U2DMASADR5,U2DMA Descriptor Address Register Channel 5"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x1258++3
|
|
line.long 0x00 "U2DMATADR5,U2DMA Target Address Register Chasnnel 5"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x125C++3
|
|
line.long 0x00 "U2DMACMD5,U2DMA Command Address Register Channel 5"
|
|
bitfld.long 0x00 31. " XFRDIR ,Transfer Direction" "FIFO to memory,Memory to FIFO"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor Enable" "No effect,No effect,Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EndIrqEn ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PACKCOMP ,Packet Complete" "Not complete,Complete"
|
|
hexmask.long.word 0x00 0.--10. 1. " LEN ,Length"
|
|
group.long 0x1260++3
|
|
line.long 0x00 "U2DMADADR6,U2DMA Descriptor Address Register Channel 6"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRIPA ,Descriptor Address Contains Address of Next Descriptor"
|
|
bitfld.long 0x00 0. " STOP ,Stop Channel" "Running,Stopped"
|
|
rgroup.long 0x1264++3
|
|
line.long 0x00 "U2DMASADR6,U2DMA Descriptor Address Register Channel 6"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x1268++3
|
|
line.long 0x00 "U2DMATADR6,U2DMA Target Address Register Chasnnel 6"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x126C++3
|
|
line.long 0x00 "U2DMACMD6,U2DMA Command Address Register Channel 6"
|
|
bitfld.long 0x00 31. " XFRDIR ,Transfer Direction" "FIFO to memory,Memory to FIFO"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor Enable" "No effect,No effect,Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EndIrqEn ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PACKCOMP ,Packet Complete" "Not complete,Complete"
|
|
hexmask.long.word 0x00 0.--10. 1. " LEN ,Length"
|
|
group.long 0x1270++3
|
|
line.long 0x00 "U2DMADADR7,U2DMA Descriptor Address Register Channel 7"
|
|
hexmask.long 0x00 4.--31. 0x10 " DESCRIPA ,Descriptor Address Contains Address of Next Descriptor"
|
|
bitfld.long 0x00 0. " STOP ,Stop Channel" "Running,Stopped"
|
|
rgroup.long 0x1274++3
|
|
line.long 0x00 "U2DMASADR7,U2DMA Descriptor Address Register Channel 7"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x1278++3
|
|
line.long 0x00 "U2DMATADR7,U2DMA Target Address Register Chasnnel 7"
|
|
hexmask.long 0x00 0.--31. 1. " TRGADDR ,Target Address of a Memory Location for In Endpoint Transfers"
|
|
rgroup.long 0x127C++3
|
|
line.long 0x00 "U2DMACMD7,U2DMA Command Address Register Channel 7"
|
|
bitfld.long 0x00 31. " XFRDIR ,Transfer Direction" "FIFO to memory,Memory to FIFO"
|
|
bitfld.long 0x00 23.--24. " LSTDES_EN ,Last Descriptor Enable" "No effect,No effect,Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STARTIRQEN ,Start Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EndIrqEn ,End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PACKCOMP ,Packet Complete" "Not complete,Complete"
|
|
hexmask.long.word 0x00 0.--10. 1. " LEN ,Length"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "Universal Serial Bus Host Controller"
|
|
base ad:0x4C000000
|
|
width 0x9
|
|
rgroup.long 0x00++3
|
|
line.long 0x00 "UHCREV,UHC HCI Spec Revision"
|
|
hexmask.long 0x00 0.--31. 1. " Rev ,Revision"
|
|
group.long 0x04++3
|
|
line.long 0x00 "UHCHCON,UHC Host Control Register"
|
|
bitfld.long 0x00 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IR ,Interrupt Routing" "Normal host bus,System management"
|
|
bitfld.long 0x00 6.--7. " HCFS ,Host Controller Functional State" "USBRESET,USBRESUME,USBOPERATIONAL,USBSUSPEND"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BLE ,Bulk List Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CLE ,Control List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IE ,Isochronous Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PLE ,Periodic List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1"
|
|
group.long 0x08++3
|
|
line.long 0x00 "UHCCOMS,UHC Command Status"
|
|
bitfld.long 0x00 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3"
|
|
bitfld.long 0x00 3. " OCR ,Ownership Change Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BLF ,Bulk List Filled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CLF ,Control List Filled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HCR ,Host Controller Reset" "No reset,Reset"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "UHCINTS,UHC Interrupt Status"
|
|
eventfld.long 0x00 30. " OC ,Ownership Change" "Not changed,Changed"
|
|
eventfld.long 0x00 6. " RHSC ,Root Hub Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 5. " FNO ,Frame Number Overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 4. " UE ,Unrecoverable Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 3. " RD ,Resume Detected" "Not detected,Detected"
|
|
eventfld.long 0x00 2. " SF ,Start of Frame" "Not started,Started"
|
|
textline " "
|
|
eventfld.long 0x00 1. " WDH ,Writeback Done Head" "Not done,Done"
|
|
eventfld.long 0x00 0. " SO ,Scheduling Overrun" "No overrun,Overrun"
|
|
group.long 0x10++3
|
|
line.long 0x00 "UHCINTE,UHC Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " MIE ,Master Interrupt Enable" "Ignored,Enabled"
|
|
bitfld.long 0x00 30. " OC ,Ownership Change" "Ignored,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RHSC ,Root Hub Status Change" "Ignored,Enabled"
|
|
bitfld.long 0x00 5. " FNO ,Frame Number Overflow" "Ignored,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UE ,Unrecoverable Error" "Ignored,Enabled"
|
|
bitfld.long 0x00 3. " RD ,Resume Detect" "Ignored,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SF ,Start of Frame" "Ignored,Enabled"
|
|
bitfld.long 0x00 1. " WDH ,Writeback UHCDHEAD" "Ignored,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SO ,Scheduling Overrun" "Ignored,Enabled"
|
|
group.long 0x14++3
|
|
line.long 0x00 "UHCINTD,UHC Interrupt Disable Register"
|
|
bitfld.long 0x00 31. " MIE ,Master Interrupt Enable" "Ignored,Disabled"
|
|
bitfld.long 0x00 30. " OC ,Ownership Change" "Ignored,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RHSC ,Root Hub Status Change" "Ignored,Disabled"
|
|
bitfld.long 0x00 5. " FNO ,Frame Number Overflow" "Ignored,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UE ,Unrecoverable Error" "Ignored,Disabled"
|
|
bitfld.long 0x00 3. " RD ,Resume Detect" "Ignored,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SF ,Start of Frame" "Ignored,Disabled"
|
|
bitfld.long 0x00 1. " WDH ,Writeback UHCDHEAD" "Ignored,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SO ,Scheduling Overrun" "Ignored,Disabled"
|
|
group.long 0x18++3
|
|
line.long 0x00 "UHCHCCA,UHC Host Controller Communication Area"
|
|
hexmask.long 0x00 8.--31. 0x100 " HCCA ,Host Controller Communication Area"
|
|
rgroup.long 0x1C++3
|
|
line.long 0x00 "UHCPCED,UHC Period Current Endpoint Descriptor"
|
|
hexmask.long 0x00 4.--31. 0x10 " PCED ,Period Current Endpoint Descriptor"
|
|
group.long 0x20++3
|
|
line.long 0x00 "UHCCHED,UHC Control Head Endpoint Descriptor Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " CHED ,Control Head Endpoint Descriptor"
|
|
group.long 0x24++3
|
|
line.long 0x00 "UHCCCED,UHC Control Current Endpoint Descriptor Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " CCED ,Control Current Endpoint Descriptor"
|
|
group.long 0x28++3
|
|
line.long 0x00 "UHCBHED,UHC Bulk Head Endpoint Descriptor Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " BHED ,Bulk Head Endpoint Descriptor"
|
|
group.long 0x2C++3
|
|
line.long 0x00 "UHCBCED,UHC Bulk Current Endpoint Descriptor Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " BCED ,Bulk Current Endpoint Descriptor"
|
|
rgroup.long 0x30++3
|
|
line.long 0x00 "UHCDHEAD,UHC Done Head Register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DHED ,Done Head Endpoint Descriptor"
|
|
group.long 0x34++3
|
|
line.long 0x00 "UHCFMI,UHC Frame Interval Register"
|
|
bitfld.long 0x00 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled"
|
|
hexmask.long.word 0x00 16.--30. 1. " FSMPS ,FS Largest Data Packet"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--13. 1. " FI ,Frame Interval"
|
|
rgroup.long 0x38++3
|
|
line.long 0x00 "UHCFMR,UHC Frame Remaining Register"
|
|
bitfld.long 0x00 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled"
|
|
hexmask.long.word 0x00 0.--13. 1. " FR ,Frame Remaining"
|
|
rgroup.long 0x3C++3
|
|
line.long 0x00 "UHCFMN,UHC Frame Number Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " FN ,Frame Number"
|
|
group.long 0x40++3
|
|
line.long 0x00 "UHCPERS,UHC Periodic Start Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " PS ,Periodic Start"
|
|
group.long 0x44++3
|
|
line.long 0x00 "UHCLST,UHC Low-Speed Thershold Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " LST ,LS Threshold"
|
|
group.long 0x48++3
|
|
line.long 0x00 "UHCRHDA,UHC Root Hub Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,Power onto Power Good Time"
|
|
bitfld.long 0x00 12. " NOCP ,No Over-current Protection" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OCPM ,Over-Current Protection Mode" "Switched on,Reserved"
|
|
bitfld.long 0x00 10. " DT ,Device Type" "Not compound device,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 9. " NPS ,No Power Switching" "Powered,Powered when UHC"
|
|
bitfld.long 0x00 8. " PSM ,Power Switching Mode" "At the same time,Individually"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " NDP ,Number Downstream Ports"
|
|
group.long 0x4C++3
|
|
line.long 0x00 "UHCRHDB,UHC Root Hub Descriptor B Register"
|
|
bitfld.long 0x00 19. " PPCM3 ,Power-Control Mask no Port 3" "No masked,Masked"
|
|
bitfld.long 0x00 18. " PPCM2 ,Power-Control Mask no Port 2" "No masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PPCM1 ,Power-Control Mask no Port 1" "No masked,Masked"
|
|
bitfld.long 0x00 3. " DR3 ,Device Removable for Port 3" "Not removable,Removable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DR2 ,Device Removable for Port 2" "Not removable,Removable"
|
|
bitfld.long 0x00 1. " DR1 ,Device Removable for Port 1" "Not removable,Removable"
|
|
group.long 0x50++3
|
|
line.long 0x00 "UHCRHS,UHC Root Hub Status Register"
|
|
bitfld.long 0x00 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared"
|
|
eventfld.long 0x00 17. " OCIC ,Over Current Indicator Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LPSC ,(Read)Local Power Status Change/(Write) Set Global Power" "Not changed,Changed"
|
|
bitfld.long 0x00 15. " DRWE ,(Read)Device Remote Wakeup Enable/(Write)Set Remote Wakeup Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OCI ,Over-current Indicator" "Normal,Over-current"
|
|
bitfld.long 0x00 0. " LPS ,(Read)Local Power Status/(Write) Clear Global Power" "No effect,Power off"
|
|
group.long 0x54++3
|
|
line.long 0x00 "UHCRHPS1,UHC Root Hub Port 1 Status Register"
|
|
bitfld.long 0x00 20. " PRSC ,Port Reset Status Change" "Not complete,Complete"
|
|
bitfld.long 0x00 18. " PSSC ,Port Suspend Status Change" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 16. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LSDA ,(Read)Low Speed Device Attached/(Write) Clear Port Power" "Full,Low"
|
|
bitfld.long 0x00 8. " PPS ,(Read) Port Power Status/(Write) Set Port Power" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PRS ,(Read) Port Reset Status/(Write) Set Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 3. " POCI ,(Write) Clear Suspend Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSS ,(Read) Port Suspend Status/(Write) Set Port Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 1. " PES ,(Read) Port Enable Status/(Write) Set Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CCS ,(Read) Current Connect Status/(Write) Clear Current Connect Status" "Not connected,Connected"
|
|
group.long 0x58++3
|
|
line.long 0x00 "UHCRHPS2,UHC Root Hub Port 2 Status Register"
|
|
bitfld.long 0x00 20. " PRSC ,Port Reset Status Change" "Not complete,Complete"
|
|
bitfld.long 0x00 18. " PSSC ,Port Suspend Status Change" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 16. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LSDA ,(Read)Low Speed Device Attached/(Write) Clear Port Power" "Full,Low"
|
|
bitfld.long 0x00 8. " PPS ,(Read) Port Power Status/(Write) Set Port Power" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PRS ,(Read) Port Reset Status/(Write) Set Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 3. " POCI ,(Write) Clear Suspend Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSS ,(Read) Port Suspend Status/(Write) Set Port Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 1. " PES ,(Read) Port Enable Status/(Write) Set Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CCS ,(Read) Current Connect Status/(Write) Clear Current Connect Status" "Not connected,Connected"
|
|
group.long 0x5C++3
|
|
line.long 0x00 "UHCRHPS3,UHC Root Hub Port 3 Status Register"
|
|
bitfld.long 0x00 20. " PRSC ,Port Reset Status Change" "Not complete,Complete"
|
|
bitfld.long 0x00 18. " PSSC ,Port Suspend Status Change" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 16. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LSDA ,(Read)Low Speed Device Attached/(Write) Clear Port Power" "Full,Low"
|
|
bitfld.long 0x00 8. " PPS ,(Read) Port Power Status/(Write) Set Port Power" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PRS ,(Read) Port Reset Status/(Write) Set Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 3. " POCI ,(Write) Clear Suspend Status" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSS ,(Read) Port Suspend Status/(Write) Set Port Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 1. " PES ,(Read) Port Enable Status/(Write) Set Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CCS ,(Read) Current Connect Status/(Write) Clear Current Connect Status" "Not connected,Connected"
|
|
group.long 0x60++3
|
|
line.long 0x00 "UHCSTAT,UHC Status Register"
|
|
eventfld.long 0x00 15. " SBMAI ,System Bus Master Abort Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " SBTAI ,System Bus Target Abort Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 13. " UPRI ,USB Port Resume Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 11. " UPS1 ,USB Power Sense Port 1" "No over current,Over current"
|
|
textline " "
|
|
eventfld.long 0x00 10. " HTA ,HCI Transfer Abort" "Not aborted,Aborted"
|
|
eventfld.long 0x00 8. " HBA ,HCI Buffer Active" "Not active,Active"
|
|
textline " "
|
|
eventfld.long 0x00 7. " RWUE ,HCI Remote Wakeup Event" "No event,Event"
|
|
group.long 0x64++3
|
|
line.long 0x00 "UHCHR,UHC Reset Register"
|
|
bitfld.long 0x00 11. " SSEP3 ,Sleep Standby Enable for Port 3" "Power on,Standby"
|
|
bitfld.long 0x00 10. " SSEP2 ,Sleep Standby Enable for Port 2" "Power on,Standby"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SSEP1 ,Sleep Standby Enable for Port 1" "Power on,Standby"
|
|
bitfld.long 0x00 7. " PCPL ,Power Control Polarity Low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PSPL ,Power Sense Polarity Low" "High,Low"
|
|
bitfld.long 0x00 5. " SSE ,Sleep Standby Enable" "Power on,Standby"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UIT ,USB Interrupt Test" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SSDC ,Simulation Scale Down Clock" "Normal,1 msec -> 1usec"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CGR ,Clock Generation Reset" "Reset,No reset"
|
|
bitfld.long 0x00 1. " FHR ,Force Host Controller Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FSBIR ,Force System Bus Interface Reset" "No reset,Reset"
|
|
group.long 0x68++3
|
|
line.long 0x00 "UHCHIE,UHC Interrupt Enable Register"
|
|
bitfld.long 0x00 14. " UPS3IE ,USB Power Sense Port 3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " UPRIE ,USB Port Resume Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UPS2IE ,USB Power Sense Port 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " UPS1IE ,USB Power Sense Port 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TAIE ,HCI Interface Transfer Abort Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " HBAIE ,HCI Buffer Active Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RWIE ,HCI Remote Wakeup Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x6C++3
|
|
line.long 0x00 "UHCHIT,UHC Interrupt Target Register"
|
|
bitfld.long 0x00 16. " UPS3T ,USB Power Sense Port 3 Interrupt Test" "No effect,Interrupt"
|
|
bitfld.long 0x00 15. " SMAT ,System Bus Master Abort Interrupt Test" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 14. " STAT ,System Bus Target Abort Interrupt Test" "No effect,Interrupt"
|
|
bitfld.long 0x00 13. " UPRT ,USB Port Resume Interrupt Test" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UPS2T ,USB Power Sense Port 2 Interrupt Test" "No effect,Interrupt"
|
|
bitfld.long 0x00 11. " UPS1T ,USB Power Sense Port 1 Interrupt Test" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TAT ,HCI Interface Transfer Abort Interrupt Test" "No effect,Interrupt"
|
|
bitfld.long 0x00 9. " IRQT ,Normal OHC Interrupt Test" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BAT ,HCI Buffer Active Interrupt Test" "No effect,Interrupt"
|
|
bitfld.long 0x00 7. " RWUT ,HCI Remote Wakeup Interrupt Test" "No effect,Interrupt"
|
|
width 0xb
|
|
tree.end
|
|
tree "Mobile Scalable Link Controller"
|
|
base ad:0x41400000
|
|
width 0xa
|
|
tree "Channel Receive/Transmit FIFO Registers"
|
|
hgroup.long 0x4++3
|
|
hide.long 0x00 "BBFIFO1,Cahnnel 1 Receive/Transmit FIFO Register"
|
|
in
|
|
hgroup.long 0x8++3
|
|
hide.long 0x00 "BBFIFO2,Cahnnel 2 Receive/Transmit FIFO Register"
|
|
in
|
|
hgroup.long 0xC++3
|
|
hide.long 0x00 "BBFIFO3,Cahnnel 3 Receive/Transmit FIFO Register"
|
|
in
|
|
hgroup.long 0x10++3
|
|
hide.long 0x00 "BBFIFO4,Cahnnel 4 Receive/Transmit FIFO Register"
|
|
in
|
|
hgroup.long 0x14++3
|
|
hide.long 0x00 "BBFIFO5,Cahnnel 5 Receive/Transmit FIFO Register"
|
|
in
|
|
hgroup.long 0x18++3
|
|
hide.long 0x00 "BBFIFO6,Cahnnel 6 Receive/Transmit FIFO Register"
|
|
in
|
|
hgroup.long 0x1C++3
|
|
hide.long 0x00 "BBFIFO7,Cahnnel 7 Receive/Transmit FIFO Register"
|
|
in
|
|
tree.end
|
|
tree "Chanel Configuration Registers"
|
|
group.long 0x44++3
|
|
line.long 0x00 "BBCFG1,Channel 1 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " EOCservice ,Early End of Chain Service Select" "None,Interrupt,Reserved,Reserved"
|
|
bitfld.long 0x00 21.--23. " RxService ,Receive FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RxThreshLevel ,Receive FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 18. " RxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RxEnable ,Receive FIFO Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " TxBlock ,Transmit Block Size" "4 bytes,8 bytes,16 bytes,32 bytes,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " TxService ,Transmit FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 3.--4. " TxThreshLevel ,Transmit FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TxEnable ,Transmit FIFO Channel Enable" "Disabled,Enabled"
|
|
group.long 0x48++3
|
|
line.long 0x00 "BBCFG2,Channel 2 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " EOCservice ,Early End of Chain Service Select" "None,Interrupt,Reserved,Reserved"
|
|
bitfld.long 0x00 21.--23. " RxService ,Receive FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RxThreshLevel ,Receive FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 18. " RxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RxEnable ,Receive FIFO Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " TxBlock ,Transmit Block Size" "4 bytes,8 bytes,16 bytes,32 bytes,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " TxService ,Transmit FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 3.--4. " TxThreshLevel ,Transmit FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TxEnable ,Transmit FIFO Channel Enable" "Disabled,Enabled"
|
|
group.long 0x4C++3
|
|
line.long 0x00 "BBCFG3,Channel 3 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " EOCservice ,Early End of Chain Service Select" "None,Interrupt,Reserved,Reserved"
|
|
bitfld.long 0x00 21.--23. " RxService ,Receive FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RxThreshLevel ,Receive FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 18. " RxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RxEnable ,Receive FIFO Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " TxBlock ,Transmit Block Size" "4 bytes,8 bytes,16 bytes,32 bytes,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " TxService ,Transmit FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 3.--4. " TxThreshLevel ,Transmit FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TxEnable ,Transmit FIFO Channel Enable" "Disabled,Enabled"
|
|
group.long 0x50++3
|
|
line.long 0x00 "BBCFG4,Channel 4 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " EOCservice ,Early End of Chain Service Select" "None,Interrupt,Reserved,Reserved"
|
|
bitfld.long 0x00 21.--23. " RxService ,Receive FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RxThreshLevel ,Receive FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 18. " RxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RxEnable ,Receive FIFO Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " TxBlock ,Transmit Block Size" "4 bytes,8 bytes,16 bytes,32 bytes,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " TxService ,Transmit FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 3.--4. " TxThreshLevel ,Transmit FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TxEnable ,Transmit FIFO Channel Enable" "Disabled,Enabled"
|
|
group.long 0x54++3
|
|
line.long 0x00 "BBCFG5,Channel 5 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " EOCservice ,Early End of Chain Service Select" "None,Interrupt,Reserved,Reserved"
|
|
bitfld.long 0x00 21.--23. " RxService ,Receive FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RxThreshLevel ,Receive FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 18. " RxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RxEnable ,Receive FIFO Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " TxBlock ,Transmit Block Size" "4 bytes,8 bytes,16 bytes,32 bytes,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " TxService ,Transmit FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 3.--4. " TxThreshLevel ,Transmit FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TxEnable ,Transmit FIFO Channel Enable" "Disabled,Enabled"
|
|
group.long 0x58++3
|
|
line.long 0x00 "BBCFG6,Channel 6 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " EOCservice ,Early End of Chain Service Select" "None,Interrupt,Reserved,Reserved"
|
|
bitfld.long 0x00 21.--23. " RxService ,Receive FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RxThreshLevel ,Receive FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 18. " RxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RxEnable ,Receive FIFO Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " TxBlock ,Transmit Block Size" "4 bytes,8 bytes,16 bytes,32 bytes,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " TxService ,Transmit FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 3.--4. " TxThreshLevel ,Transmit FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TxEnable ,Transmit FIFO Channel Enable" "Disabled,Enabled"
|
|
group.long 0x5C++3
|
|
line.long 0x00 "BBCFG7,Channel 7 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " EOCservice ,Early End of Chain Service Select" "None,Interrupt,Reserved,Reserved"
|
|
bitfld.long 0x00 21.--23. " RxService ,Receive FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RxThreshLevel ,Receive FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 18. " RxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RxEnable ,Receive FIFO Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " TxBlock ,Transmit Block Size" "4 bytes,8 bytes,16 bytes,32 bytes,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " TxService ,Transmit FIFO Service Select" "None,DMA,Interrupt,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 3.--4. " TxThreshLevel ,Transmit FIFO Service Trigger Threshold" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxWAITEnable ,Direct Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TxEnable ,Transmit FIFO Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel Status Registers"
|
|
rgroup.long 0x84++3
|
|
line.long 0x00 "BBSTAT1,Channel 1 Status Register"
|
|
bitfld.long 0x00 31. " RxEOM_3 ,Fourth Byte to Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 30. " RxEOM_2 ,Third Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RxEOM_1 ,Second Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 28. " RxEOM_0 ,Next Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RxEOM_FIFO ,RXFIFOx Contains an EOM" "Not contained,Contained"
|
|
bitfld.long 0x00 24. " RxWait ,RX Channel in WAIT State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RxEmpty ,RXFIFOx Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RxFull ,RXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " RxFulliness ,Fullness of RXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
bitfld.long 0x00 8. " TxWait ,TX Channel in Wait State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TxEmpty ,TXFIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 6. " TxFull ,TXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " TxFullness ,Fullness of TXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
rgroup.long 0x88++3
|
|
line.long 0x00 "BBSTAT2,Channel 2 Status Register"
|
|
bitfld.long 0x00 31. " RxEOM_3 ,Fourth Byte to Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 30. " RxEOM_2 ,Third Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RxEOM_1 ,Second Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 28. " RxEOM_0 ,Next Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RxEOM_FIFO ,RXFIFOx Contains an EOM" "Not contained,Contained"
|
|
bitfld.long 0x00 24. " RxWait ,RX Channel in WAIT State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RxEmpty ,RXFIFOx Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RxFull ,RXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " RxFulliness ,Fullness of RXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
bitfld.long 0x00 8. " TxWait ,TX Channel in Wait State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TxEmpty ,TXFIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 6. " TxFull ,TXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " TxFullness ,Fullness of TXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
rgroup.long 0x8C++3
|
|
line.long 0x00 "BBSTAT3,Channel 3 Status Register"
|
|
bitfld.long 0x00 31. " RxEOM_3 ,Fourth Byte to Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 30. " RxEOM_2 ,Third Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RxEOM_1 ,Second Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 28. " RxEOM_0 ,Next Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RxEOM_FIFO ,RXFIFOx Contains an EOM" "Not contained,Contained"
|
|
bitfld.long 0x00 24. " RxWait ,RX Channel in WAIT State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RxEmpty ,RXFIFOx Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RxFull ,RXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " RxFulliness ,Fullness of RXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
bitfld.long 0x00 8. " TxWait ,TX Channel in Wait State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TxEmpty ,TXFIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 6. " TxFull ,TXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " TxFullness ,Fullness of TXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
rgroup.long 0x90++3
|
|
line.long 0x00 "BBSTAT4,Channel 4 Status Register"
|
|
bitfld.long 0x00 31. " RxEOM_3 ,Fourth Byte to Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 30. " RxEOM_2 ,Third Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RxEOM_1 ,Second Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 28. " RxEOM_0 ,Next Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RxEOM_FIFO ,RXFIFOx Contains an EOM" "Not contained,Contained"
|
|
bitfld.long 0x00 24. " RxWait ,RX Channel in WAIT State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RxEmpty ,RXFIFOx Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RxFull ,RXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " RxFulliness ,Fullness of RXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
bitfld.long 0x00 8. " TxWait ,TX Channel in Wait State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TxEmpty ,TXFIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 6. " TxFull ,TXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " TxFullness ,Fullness of TXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
rgroup.long 0x94++3
|
|
line.long 0x00 "BBSTAT5,Channel 5 Status Register"
|
|
bitfld.long 0x00 31. " RxEOM_3 ,Fourth Byte to Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 30. " RxEOM_2 ,Third Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RxEOM_1 ,Second Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 28. " RxEOM_0 ,Next Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RxEOM_FIFO ,RXFIFOx Contains an EOM" "Not contained,Contained"
|
|
bitfld.long 0x00 24. " RxWait ,RX Channel in WAIT State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RxEmpty ,RXFIFOx Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RxFull ,RXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " RxFulliness ,Fullness of RXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
bitfld.long 0x00 8. " TxWait ,TX Channel in Wait State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TxEmpty ,TXFIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 6. " TxFull ,TXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " TxFullness ,Fullness of TXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
rgroup.long 0x98++3
|
|
line.long 0x00 "BBSTAT6,Channel 6 Status Register"
|
|
bitfld.long 0x00 31. " RxEOM_3 ,Fourth Byte to Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 30. " RxEOM_2 ,Third Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RxEOM_1 ,Second Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 28. " RxEOM_0 ,Next Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RxEOM_FIFO ,RXFIFOx Contains an EOM" "Not contained,Contained"
|
|
bitfld.long 0x00 24. " RxWait ,RX Channel in WAIT State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RxEmpty ,RXFIFOx Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RxFull ,RXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " RxFulliness ,Fullness of RXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
bitfld.long 0x00 8. " TxWait ,TX Channel in Wait State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TxEmpty ,TXFIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 6. " TxFull ,TXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " TxFullness ,Fullness of TXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
rgroup.long 0x9C++3
|
|
line.long 0x00 "BBSTAT7,Channel 7 Status Register"
|
|
bitfld.long 0x00 31. " RxEOM_3 ,Fourth Byte to Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 30. " RxEOM_2 ,Third Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RxEOM_1 ,Second Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
bitfld.long 0x00 28. " RxEOM_0 ,Next Byte to be Read from FIFO in a Message" "Not last,Last"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RxEOM_FIFO ,RXFIFOx Contains an EOM" "Not contained,Contained"
|
|
bitfld.long 0x00 24. " RxWait ,RX Channel in WAIT State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RxEmpty ,RXFIFOx Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RxFull ,RXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " RxFulliness ,Fullness of RXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
bitfld.long 0x00 8. " TxWait ,TX Channel in Wait State" "Not wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TxEmpty ,TXFIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 6. " TxFull ,TXFIFOx Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " TxFullness ,Fullness of TXFIFOx" "Full/Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
tree.end
|
|
tree "Channel EOM Registers"
|
|
wgroup.long 0xC4++3
|
|
line.long 0x00 "BBEOM1,Channel 1 EOM Register"
|
|
hexmask.long 0x00 0.--31. 1. " EOM ,Write any value to indicate EOM"
|
|
wgroup.long 0xC8++3
|
|
line.long 0x00 "BBEOM2,Channel 2 EOM Register"
|
|
hexmask.long 0x00 0.--31. 1. " EOM ,Write any value to indicate EOM"
|
|
wgroup.long 0xCC++3
|
|
line.long 0x00 "BBEOM3,Channel 3 EOM Register"
|
|
hexmask.long 0x00 0.--31. 1. " EOM ,Write any value to indicate EOM"
|
|
wgroup.long 0xD0++3
|
|
line.long 0x00 "BBEOM4,Channel 4 EOM Register"
|
|
hexmask.long 0x00 0.--31. 1. " EOM ,Write any value to indicate EOM"
|
|
wgroup.long 0xD4++3
|
|
line.long 0x00 "BBEOM5,Channel 5 EOM Register"
|
|
hexmask.long 0x00 0.--31. 1. " EOM ,Write any value to indicate EOM"
|
|
wgroup.long 0xD8++3
|
|
line.long 0x00 "BBEOM6,Channel 6 EOM Register"
|
|
hexmask.long 0x00 0.--31. 1. " EOM ,Write any value to indicate EOM"
|
|
wgroup.long 0xDC++3
|
|
line.long 0x00 "BBEOM7,Channel 7 EOM Register"
|
|
hexmask.long 0x00 0.--31. 1. " EOM ,Write any value to indicate EOM"
|
|
tree.end
|
|
tree "Common"
|
|
group.long 0x108++3
|
|
line.long 0x00 "BBIID,Interrupt ID Register"
|
|
bitfld.long 0x00 23. " TX_INT7 ,TXFIFO 7 Interrupt for Channel 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " TX_INT6 ,TXFIFO 6 Interrupt for Channel 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TX_INT5 ,TXFIFO 5 Interrupt for Channel 5" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " TX_INT4 ,TXFIFO 4 Interrupt for Channel 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TX_INT3 ,TXFIFO 3 Interrupt for Channel 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " TX_INT2 ,TXFIFO 2 Interrupt for Channel 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TX_INT1 ,TXFIFO 1Interrupt for Channel 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " EOC_INT7 ,END_OF_CHAIN Interrupt for Channel 7" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EOC_INT6 ,END_OF_CHAIN Interrupt for Channel 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " EOC_INT5 ,END_OF_CHAIN Interrupt for Channel 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EOC_INT4 ,END_OF_CHAIN Interrupt for Channel 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " EOC_INT3 ,END_OF_CHAIN Interrupt for Channel 3" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EOC_INT2 ,END_OF_CHAIN Interrupt for Channel 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " EOC_INT1 ,END_OF_CHAIN Interrupt for Channel 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RX_INT7 ,RXFIFO 7 Interrupt for Channel 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " RX_INT6 ,RXFIFO 6 Interrupt for Channel 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_INT5 ,RXFIFO 5 Interrupt for Channel 5" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RX_INT4 ,RXFIFO 4 Interrupt for Channel 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RX_INT3 ,RXFIFO 3 Interrupt for Channel 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RX_INT2 ,RXFIFO 2 Interrupt for Channel 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RX_INT1 ,RXFIFO 1 Interrupt for Channel 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " VGPIO_INT ,Virtual GPIO Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x110++3
|
|
line.long 0x00 "BBFREQ,TX Frequency Select Register"
|
|
hexmask.long.byte 0x00 4.--11. 1. " DIV ,DIVIDER Value"
|
|
group.long 0x114++3
|
|
line.long 0x00 "BBWAIT,Wait Count Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " Count ,Number of MSL1_OB_CLK cycles waited before retrying a waiting channel"
|
|
group.long 0x118++3
|
|
line.long 0x00 "BBCST,Clock Stop Time Register"
|
|
bitfld.long 0x00 0.--3. " Count ,Number of MSL1_OB_CLK cycles to wait before turning off MSL1_OB_CLK when there is no data to transmit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Clk never stopped"
|
|
tree.end
|
|
tree "Virtual GPIO Regisers"
|
|
rgroup.long 0x11C++3
|
|
line.long 0x00 "BBVGIL,Virtual GPIO Input Pin Level Register"
|
|
bitfld.long 0x00 31. " PIN_LEVEL31 ,Virtual GPIO Input Pin 31 Level" "Low,High"
|
|
bitfld.long 0x00 30. " PIN_LEVEL30 ,Virtual GPIO Input Pin 30 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " PIN_LEVEL29 ,Virtual GPIO Input Pin 29 Level" "Low,High"
|
|
bitfld.long 0x00 28. " PIN_LEVEL28 ,Virtual GPIO Input Pin 28 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PIN_LEVEL27 ,Virtual GPIO Input Pin 27 Level" "Low,High"
|
|
bitfld.long 0x00 26. " PIN_LEVEL26 ,Virtual GPIO Input Pin 26 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PIN_LEVEL25 ,Virtual GPIO Input Pin 25 Level" "Low,High"
|
|
bitfld.long 0x00 24. " PIN_LEVEL24 ,Virtual GPIO Input Pin 24 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PIN_LEVEL23 ,Virtual GPIO Input Pin 23 Level" "Low,High"
|
|
bitfld.long 0x00 22. " PIN_LEVEL22 ,Virtual GPIO Input Pin 22 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PIN_LEVEL21 ,Virtual GPIO Input Pin 21 Level" "Low,High"
|
|
bitfld.long 0x00 20. " PIN_LEVEL20 ,Virtual GPIO Input Pin 20 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PIN_LEVEL19 ,Virtual GPIO Input Pin 19 Level" "Low,High"
|
|
bitfld.long 0x00 18. " PIN_LEVEL18 ,Virtual GPIO Input Pin 18 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PIN_LEVEL17 ,Virtual GPIO Input Pin 17 Level" "Low,High"
|
|
bitfld.long 0x00 16. " PIN_LEVEL16 ,Virtual GPIO Input Pin 16 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PIN_LEVEL15 ,Virtual GPIO Input Pin 15 Level" "Low,High"
|
|
bitfld.long 0x00 14. " PIN_LEVEL14 ,Virtual GPIO Input Pin 14 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PIN_LEVEL13 ,Virtual GPIO Input Pin 13 Level" "Low,High"
|
|
bitfld.long 0x00 12. " PIN_LEVEL12 ,Virtual GPIO Input Pin 12 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PIN_LEVEL11 ,Virtual GPIO Input Pin 11 Level" "Low,High"
|
|
bitfld.long 0x00 10. " PIN_LEVEL10 ,Virtual GPIO Input Pin 10 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PIN_LEVEL9 ,Virtual GPIO Input Pin 9 Level" "Low,High"
|
|
bitfld.long 0x00 8. " PIN_LEVEL8 ,Virtual GPIO Input Pin 8 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PIN_LEVEL7 ,Virtual GPIO Input Pin 7 Level" "Low,High"
|
|
bitfld.long 0x00 6. " PIN_LEVEL6 ,Virtual GPIO Input Pin 6 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PIN_LEVEL5 ,Virtual GPIO Input Pin 5 Level" "Low,High"
|
|
bitfld.long 0x00 4. " PIN_LEVEL4 ,Virtual GPIO Input Pin 4 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PIN_LEVEL3 ,Virtual GPIO Input Pin 3 Level" "Low,High"
|
|
bitfld.long 0x00 2. " PIN_LEVEL2 ,Virtual GPIO Input Pin 2 Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PIN_LEVEL1 ,Virtual GPIO Input Pin 1 Level" "Low,High"
|
|
bitfld.long 0x00 0. " PIN_LEVEL0 ,Virtual GPIO Input Pin 0 Level" "Low,High"
|
|
rgroup.long 0x120++3
|
|
line.long 0x00 "BBVGOL,Virtual GPIO Output Pin Level Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " PIN_LEVEL_Set/Clr31 ,Virtual GPIO Output Pin 31 Level" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " PIN_LEVEL_Set/Clr30 ,Virtual GPIO Output Pin 30 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " PIN_LEVEL_Set/Clr29 ,Virtual GPIO Output Pin 29 Level" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " PIN_LEVEL_Set/Clr28 ,Virtual GPIO Output Pin 28 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " PIN_LEVEL_Set/Clr27 ,Virtual GPIO Output Pin 27 Level" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " PIN_LEVEL_Set/Clr26 ,Virtual GPIO Output Pin 26 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PIN_LEVEL_Set/Clr25 ,Virtual GPIO Output Pin 25 Level" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PIN_LEVEL_Set/Clr24 ,Virtual GPIO Output Pin 24 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " PIN_LEVEL_Set/Clr23 ,Virtual GPIO Output Pin 23 Level" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " PIN_LEVEL_Set/Clr22 ,Virtual GPIO Output Pin 22 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " PIN_LEVEL_Set/Clr21 ,Virtual GPIO Output Pin 21 Level" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " PIN_LEVEL_Set/Clr20 ,Virtual GPIO Output Pin 20 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PIN_LEVEL_Set/Clr19 ,Virtual GPIO Output Pin 19 Level" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PIN_LEVEL_Set/Clr18 ,Virtual GPIO Output Pin 18 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PIN_LEVEL_Set/Clr17 ,Virtual GPIO Output Pin 17 Level" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PIN_LEVEL_Set/Clr16 ,Virtual GPIO Output Pin 16 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " PIN_LEVEL_Set/Clr15 ,Virtual GPIO Output Pin 15 Level" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " PIN_LEVEL_Set/Clr14 ,Virtual GPIO Output Pin 14 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " PIN_LEVEL_Set/Clr13 ,Virtual GPIO Output Pin 13 Level" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " PIN_LEVEL_Set/Clr12 ,Virtual GPIO Output Pin 12 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " PIN_LEVEL_Set/Clr11 ,Virtual GPIO Output Pin 11 Level" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PIN_LEVEL_Set/Clr10 ,Virtual GPIO Output Pin 10 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " PIN_LEVEL_Set/Clr9 ,Virtual GPIO Output Pin 9 Level" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " PIN_LEVEL_Set/Clr8 ,Virtual GPIO Output Pin 8 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " PIN_LEVEL_Set/Clr7 ,Virtual GPIO Output Pin 7 Level" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PIN_LEVEL_Set/Clr6 ,Virtual GPIO Output Pin 6 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PIN_LEVEL_Set/Clr5 ,Virtual GPIO Output Pin 5 Level" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PIN_LEVEL_Set/Clr4 ,Virtual GPIO Output Pin 4 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PIN_LEVEL_Set/Clr3 ,Virtual GPIO Output Pin 3 Level" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PIN_LEVEL_Set/Clr2 ,Virtual GPIO Output Pin 2 Level" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PIN_LEVEL_Set/Clr1 ,Virtual GPIO Output Pin 1 Level" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PIN_LEVEL_Set/Clr0 ,Virtual GPIO Output Pin 0 Level" "Low,High"
|
|
group.long 0x12C++3
|
|
line.long 0x00 "BBVGRE,Virtual GPIO Rising Edge Detect Register"
|
|
bitfld.long 0x00 31. " REDGE_DETECT31 ,Virtual GPIO Input 31 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " REDGE_DETECT30 ,Virtual GPIO Input 30 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 29. " REDGE_DETECT29 ,Virtual GPIO Input 29 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " REDGE_DETECT28 ,Virtual GPIO Input 28 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " REDGE_DETECT27 ,Virtual GPIO Input 27 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " REDGE_DETECT26 ,Virtual GPIO Input 26 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " REDGE_DETECT25 ,Virtual GPIO Input 25 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " REDGE_DETECT24 ,Virtual GPIO Input 24 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " REDGE_DETECT23 ,Virtual GPIO Input 23 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 22. " REDGE_DETECT22 ,Virtual GPIO Input 22 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " REDGE_DETECT21 ,Virtual GPIO Input 21 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " REDGE_DETECT20 ,Virtual GPIO Input 20 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " REDGE_DETECT19 ,Virtual GPIO Input 19 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " REDGE_DETECT18 ,Virtual GPIO Input 18 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " REDGE_DETECT17 ,Virtual GPIO Input 17 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " REDGE_DETECT16 ,Virtual GPIO Input 16 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " REDGE_DETECT15 ,Virtual GPIO Input 15 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 14. " REDGE_DETECT14 ,Virtual GPIO Input 14 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " REDGE_DETECT13 ,Virtual GPIO Input 13 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " REDGE_DETECT12 ,Virtual GPIO Input 12 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REDGE_DETECT11 ,Virtual GPIO Input 11 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " REDGE_DETECT10 ,Virtual GPIO Input 10 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " REDGE_DETECT9 ,Virtual GPIO Input 9 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " REDGE_DETECT8 ,Virtual GPIO Input 8 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " REDGE_DETECT7 ,Virtual GPIO Input 7 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " REDGE_DETECT6 ,Virtual GPIO Input 6 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " REDGE_DETECT5 ,Virtual GPIO Input 5 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " REDGE_DETECT4 ,Virtual GPIO Input 4 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " REDGE_DETECT3 ,Virtual GPIO Input 3 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " REDGE_DETECT2 ,Virtual GPIO Input 2 Rising Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " REDGE_DETECT1 ,Virtual GPIO Input 1 Rising Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " REDGE_DETECT0 ,Virtual GPIO Input 0 Rising Edge is to be Detected" "Not detected,Detected"
|
|
group.long 0x130++3
|
|
line.long 0x00 "BBVGFE,Virtual GPIO Falling Edge Detect Register"
|
|
bitfld.long 0x00 31. " FEDGE_DETECT31 ,Virtual GPIO Input 31 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " FEDGE_DETECT30 ,Virtual GPIO Input 30 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FEDGE_DETECT29 ,Virtual GPIO Input 29 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " FEDGE_DETECT28 ,Virtual GPIO Input 28 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FEDGE_DETECT27 ,Virtual GPIO Input 27 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " FEDGE_DETECT26 ,Virtual GPIO Input 26 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FEDGE_DETECT25 ,Virtual GPIO Input 25 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " FEDGE_DETECT24 ,Virtual GPIO Input 24 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FEDGE_DETECT23 ,Virtual GPIO Input 23 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 22. " FEDGE_DETECT22 ,Virtual GPIO Input 22 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FEDGE_DETECT21 ,Virtual GPIO Input 21 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " FEDGE_DETECT20 ,Virtual GPIO Input 20 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FEDGE_DETECT19 ,Virtual GPIO Input 19 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " FEDGE_DETECT18 ,Virtual GPIO Input 18 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " FEDGE_DETECT17 ,Virtual GPIO Input 17 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " FEDGE_DETECT16 ,Virtual GPIO Input 16 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FEDGE_DETECT15 ,Virtual GPIO Input 15 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 14. " FEDGE_DETECT14 ,Virtual GPIO Input 14 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FEDGE_DETECT13 ,Virtual GPIO Input 13 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " FEDGE_DETECT12 ,Virtual GPIO Input 12 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FEDGE_DETECT11 ,Virtual GPIO Input 11 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " FEDGE_DETECT10 ,Virtual GPIO Input 10 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FEDGE_DETECT9 ,Virtual GPIO Input 9 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " FEDGE_DETECT8 ,Virtual GPIO Input 8 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FEDGE_DETECT7 ,Virtual GPIO Input 7 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " FEDGE_DETECT6 ,Virtual GPIO Input 6 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FEDGE_DETECT5 ,Virtual GPIO Input 5 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " FEDGE_DETECT4 ,Virtual GPIO Input 4 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FEDGE_DETECT3 ,Virtual GPIO Input 3 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " FEDGE_DETECT2 ,Virtual GPIO Input 2 Falling Edge is to be Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FEDGE_DETECT1 ,Virtual GPIO Input 1 Falling Edge is to be Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " FEDGE_DETECT0 ,Virtual GPIO Input 0 Falling Edge is to be Detected" "Not detected,Detected"
|
|
group.long 0x134++3
|
|
line.long 0x00 "BBVGED,Virtual GPIO Edge Detect Status Register"
|
|
bitfld.long 0x00 31. " EDGE_STATUS31 ,Virtual GPIO Input 31 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " EDGE_STATUS30 ,Virtual GPIO Input 30 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EDGE_STATUS29 ,Virtual GPIO Input 29 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " EDGE_STATUS28 ,Virtual GPIO Input 28 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE_STATUS27 ,Virtual GPIO Input 27 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " EDGE_STATUS26 ,Virtual GPIO Input 26 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EDGE_STATUS25 ,Virtual GPIO Input 25 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " EDGE_STATUS24 ,Virtual GPIO Input 24 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EDGE_STATUS23 ,Virtual GPIO Input 23 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 22. " EDGE_STATUS22 ,Virtual GPIO Input 22 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EDGE_STATUS21 ,Virtual GPIO Input 21 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " EDGE_STATUS20 ,Virtual GPIO Input 20 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EDGE_STATUS19 ,Virtual GPIO Input 19 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " EDGE_STATUS18 ,Virtual GPIO Input 18 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EDGE_STATUS17 ,Virtual GPIO Input 17 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " EDGE_STATUS16 ,Virtual GPIO Input 16 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EDGE_STATUS15 ,Virtual GPIO Input 15 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 14. " EDGE_STATUS14 ,Virtual GPIO Input 14 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EDGE_STATUS13 ,Virtual GPIO Input 13 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " EDGE_STATUS12 ,Virtual GPIO Input 12 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EDGE_STATUS11 ,Virtual GPIO Input 11 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " EDGE_STATUS10 ,Virtual GPIO Input 10 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EDGE_STATUS9 ,Virtual GPIO Input 9 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " EDGE_STATUS8 ,Virtual GPIO Input 8 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EDGE_STATUS7 ,Virtual GPIO Input 7 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " EDGE_STATUS6 ,Virtual GPIO Input 6 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EDGE_STATUS5 ,Virtual GPIO Input 5 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " EDGE_STATUS4 ,Virtual GPIO Input 4 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EDGE_STATUS3 ,Virtual GPIO Input 3 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " EDGE_STATUS2 ,Virtual GPIO Input 2 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EDGE_STATUS1 ,Virtual GPIO Input 1 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " EDGE_STATUS0 ,Virtual GPIO Input 0 Rising/Falling Edge Detected Status" "Not detected,Detected"
|
|
group.long 0x138++3
|
|
line.long 0x00 "BBVGVI,Virtual GPIO Value Interrupt Register"
|
|
bitfld.long 0x00 0. " ENABLE0 ,Virtual GPIO Input 0 Value Interrupt Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Wakeup/Width/Wait Registers"
|
|
wgroup.long 0x140++3
|
|
line.long 0x00 "BBWAKE,Wake-up Register"
|
|
hexmask.long 0x00 0.--31. 1. " WAKE ,Write any value to initiate Channel 12 wake-up signaling"
|
|
group.long 0x144++3
|
|
line.long 0x00 "BBITFC,Interface Width Register"
|
|
bitfld.long 0x00 16.--17. " RX_ITFC ,RX (Inbound) Link Interface Width" "1 bit,2 bits,4 bits,Reserved"
|
|
bitfld.long 0x00 0.--1. " TX_ITFC ,TX (Outbound) Link Interface Width" "1 bit,2 bits,4 bits,Reserved"
|
|
group.long 0x148++3
|
|
line.long 0x00 "BBWST,Wait Sample Time Register"
|
|
bitfld.long 0x00 0. " MB1 ,Must be set to 1" "Reserved,1"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "SSP Serial Ports"
|
|
base ad:0x41000000
|
|
width 0xa
|
|
if (((d.l(ad:(0x41000000+0x000000+0x00)))&0x100000)==0x100000)
|
|
group.long (0x000000+0x00)++3
|
|
line.long 0x00 "SSCR0_1,SSP1 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "Normal,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS ,Audio"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FPCKE ,FIFO Packing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "No masked,Masked"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "Determined by ECS,Network"
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "8-16 bits,18-32 bits"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECS ,External Clock Select" "On-chip,External"
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,Reserved,PSP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Select" "Reserved,18-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,32-bit"
|
|
else
|
|
group.long (0x000000+0x00)++3
|
|
line.long 0x00 "SSCR0_1,SSP1 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "Normal,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS ,Audio"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FPCKE ,FIFO Packing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "No masked,Masked"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "Determined by ECS,Network"
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "8-16 bits,18-32 bits"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECS ,External Clock Select" "On-chip,External"
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,Reserved,PSP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16-bit"
|
|
endif
|
|
if (((d.l(ad:(0x41000000+0x000000+0x04)))&0x4000)==0x4000)
|
|
group.long (0x000000+0x04)++3
|
|
line.long 0x00 "SSCR1_1,SSP1 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Three-state Enable on Last Phase" "1/2 clk after beginning,Last clk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Three-state Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "Continously,When data transfer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSP Serial Bit Rate Clock (SSPSCLKx) Direction" "Master,Slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame (SSPSFRMx) Direction" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "Transmit/receive,Receive w/o transmit"
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "Monahans,DMA bursts"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "Determined by PSP,Inverted"
|
|
bitfld.long 0x00 15. " STRF ,Select FIFO for Efwr (Test Mode Bit)" "TXFIFO,RXFIFO"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/read (Test Mode Bit)" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--13. " RFT ,RXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TFT ,TXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " SPH ,Motorola SPI SSPSCLK Phase Setting" "1 clk,1/2 clk"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SPO ,Motorola SPI SSPSCLK Polarity Setting" "Low,High"
|
|
bitfld.long 0x00 2. " LBM ,Loopback Mode (Test Mode Bit)" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x000000+0x04)++3
|
|
line.long 0x00 "SSCR1_1,SSP1 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Three-state Enable on Last Phase" "1/2 clk after beginning,Last clk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Three-state Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "Continously,When data transfer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSP Serial Bit Rate Clock (SSPSCLKx) Direction" "Master,Slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame (SSPSFRMx) Direction" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "Transmit/receive,Receive w/o transmit"
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "Monahans,DMA bursts"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "Determined by PSP,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/read (Test Mode Bit)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--13. " RFT ,RXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6.--9. " TFT ,TXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPH ,Motorola SPI SSPSCLK Phase Setting" "1 clk,1/2 clk"
|
|
bitfld.long 0x00 3. " SPO ,Motorola SPI SSPSCLK Polarity Setting" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LBM ,Loopback Mode (Test Mode Bit)" "Normal,Loopback"
|
|
bitfld.long 0x00 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x000000+0x08)++3
|
|
line.long 0x00 "SSSR_1,SSP1 Status Register"
|
|
bitfld.long 0x00 31. " OSS ,Odd Sample Status" "2 samples,1 sample"
|
|
eventfld.long 0x00 23. " BCE ,Bit Count Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CSS ,Clock Synchronization Status" "Ready,Busy"
|
|
eventfld.long 0x00 21. " TUR ,Transmit FIFO Underrun" "No underrun,Underrun"
|
|
textline " "
|
|
eventfld.long 0x00 20. " EOC ,End of Chain" "Not ended,Ended"
|
|
eventfld.long 0x00 19. " TINT ,Receiver Time-out Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 18. " PINT ,Peripheral Trailing Byte Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12.--15. " RFL ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Empty or full"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " TFL ,Transmit FIFO Level" "Empty or full,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
eventfld.long 0x00 7. " ROR ,Receive FIFO Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFS ,Receive FIFO Service Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TFS ,Transmit FIFO Service Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BSY ,SSP Busy" "Idle,Busy"
|
|
bitfld.long 0x00 3. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TNF ,Transmit FIFO Not Full" "Full,Not full"
|
|
group.long (0x000000+0x0C)++3
|
|
line.long 0x00 "SSITR_1,SSP1 Interrupt Test Register"
|
|
bitfld.long 0x00 7. " TROR ,Test RXFIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x00 6. " TRFS ,Test RXFIFO Service Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTFS ,Test TXFIFO Service Request" "Not requested,Requested"
|
|
group.long (0x000000+0x10)++3
|
|
line.long 0x00 "SSDR_1,SSP1 Data Write Register/SSP1 Data Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data to written to the TXFIFO read from the RXFIFO"
|
|
group.long (0x000000+0x28)++3
|
|
line.long 0x00 "SSTO_1,SSP1 Time Out Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TIMEOUT ,Timeout Value"
|
|
group.long (0x000000+0x2C)++3
|
|
line.long 0x00 "SSPSP_1,SSP1 Programmable Serial Protocol Register"
|
|
bitfld.long 0x00 28.--30. " EDMYSTOP ,Extended Dummy Stop" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26.--27. " EDMYSTRT ,Extended Dummy Start" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FSRT ,Frame Sync Relative Timing Bit" "After end of DMTSTOP,With LSB of prev frame"
|
|
bitfld.long 0x00 23.--24. " DMYSTOP ,Dummy Stop" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SFRMWDTH ,Serial Frame Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 9.--15. 1. " SFRMDLY ,Serial Frame Delay"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " DMYSTRT ,Dummy Start" "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " STRTDLY ,Start Delay" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ETDS ,End of Transfer Data State" "Low,Last value <Bit 0>"
|
|
bitfld.long 0x00 2. " SFRMP ,Serial Frame Polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SCMODE ,Serial Bit-rate Clock Mode (Data Driven/Data Sampled/Idle State)" "Falling/Rising/Low,Rising/Falling/Low,Rising/Falling/High,Falling/Rising/High"
|
|
group.long (0x000000+0x30)++3
|
|
line.long 0x00 "SSTA_1,SSP1 TX Time Slot Active Register"
|
|
bitfld.long 0x00 7. " TTSA7 ,SSP7 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 6. " TTSA6 ,SSP6 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTSA5 ,SSP5 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 4. " TTSA4 ,SSP4 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TTSA3 ,SSP3 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 2. " TTSA2 ,SSP2 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TTSA1 ,SSP1 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 0. " TTSA0 ,SSP0 TX Time Slot Active" "Not active,Active"
|
|
group.long (0x000000+0x34)++3
|
|
line.long 0x00 "SSRSA_1,SSP1 RX Time Slot Status Register"
|
|
bitfld.long 0x00 7. " RTSA7 ,SSP7 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 6. " RTSA6 ,SSP6 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSA5 ,SSP5 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 4. " RTSA4 ,SSP4 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTSA3 ,SSP3 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 2. " RTSA2 ,SSP2 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTSA1 ,SSP1 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 0. " RTSA0 ,SSP0 RX Time Slot Active" "Not active,Active"
|
|
rgroup.long (0x000000+0x38)++3
|
|
line.long 0x00 "SSTSS_1,SSP1 Time Slot Status Register"
|
|
bitfld.long 0x00 31. " NMBSY ,Network Mode Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0.--2. " TSS ,Time Slot Status" "0,1,2,3,4,5,6,7"
|
|
group.long (0x000000+0x3C)++3
|
|
line.long 0x00 "SSACD_1,SSP1 Audio Clock Divider Register"
|
|
bitfld.long 0x00 7. " SCDX8 ,SYSCLK Divided By 8" "Div by 4,Div by 8"
|
|
bitfld.long 0x00 4.--6. " ACPS ,Audio Clock PLL Select" "5.622 MHz,11.345 MHz,12.235 MHz,14.857 MHz,32.842 MHz,48.000 MHz,Determined by SSACDD,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCDB ,SYSCLK Divider Bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 0.--2. " ACDS ,Audio Clock Divider Select" "1,2,4,8,16,32,Reserved,Reserved"
|
|
group.long (0x000000+0x40)++3
|
|
line.long 0x00 "SSACDD_1,SSP1 Audio Clock Dither Divider Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " NUM ,Numerator"
|
|
hexmask.long.word 0x00 0.--11. 1. " DEN ,Denominator"
|
|
if (((d.l(ad:(0x41000000+0x700000+0x00)))&0x100000)==0x100000)
|
|
group.long (0x700000+0x00)++3
|
|
line.long 0x00 "SSCR0_2,SSP2 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "Normal,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS ,Audio"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FPCKE ,FIFO Packing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "No masked,Masked"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "Determined by ECS,Network"
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "8-16 bits,18-32 bits"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECS ,External Clock Select" "On-chip,External"
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,Reserved,PSP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Select" "Reserved,18-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,32-bit"
|
|
else
|
|
group.long (0x700000+0x00)++3
|
|
line.long 0x00 "SSCR0_2,SSP2 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "Normal,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS ,Audio"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FPCKE ,FIFO Packing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "No masked,Masked"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "Determined by ECS,Network"
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "8-16 bits,18-32 bits"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECS ,External Clock Select" "On-chip,External"
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,Reserved,PSP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16-bit"
|
|
endif
|
|
if (((d.l(ad:(0x41000000+0x700000+0x04)))&0x4000)==0x4000)
|
|
group.long (0x700000+0x04)++3
|
|
line.long 0x00 "SSCR1_2,SSP2 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Three-state Enable on Last Phase" "1/2 clk after beginning,Last clk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Three-state Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "Continously,When data transfer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSP Serial Bit Rate Clock (SSPSCLKx) Direction" "Master,Slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame (SSPSFRMx) Direction" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "Transmit/receive,Receive w/o transmit"
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "Monahans,DMA bursts"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "Determined by PSP,Inverted"
|
|
bitfld.long 0x00 15. " STRF ,Select FIFO for Efwr (Test Mode Bit)" "TXFIFO,RXFIFO"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/read (Test Mode Bit)" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--13. " RFT ,RXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TFT ,TXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " SPH ,Motorola SPI SSPSCLK Phase Setting" "1 clk,1/2 clk"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SPO ,Motorola SPI SSPSCLK Polarity Setting" "Low,High"
|
|
bitfld.long 0x00 2. " LBM ,Loopback Mode (Test Mode Bit)" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x700000+0x04)++3
|
|
line.long 0x00 "SSCR1_2,SSP2 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Three-state Enable on Last Phase" "1/2 clk after beginning,Last clk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Three-state Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "Continously,When data transfer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSP Serial Bit Rate Clock (SSPSCLKx) Direction" "Master,Slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame (SSPSFRMx) Direction" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "Transmit/receive,Receive w/o transmit"
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "Monahans,DMA bursts"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "Determined by PSP,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/read (Test Mode Bit)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--13. " RFT ,RXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6.--9. " TFT ,TXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPH ,Motorola SPI SSPSCLK Phase Setting" "1 clk,1/2 clk"
|
|
bitfld.long 0x00 3. " SPO ,Motorola SPI SSPSCLK Polarity Setting" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LBM ,Loopback Mode (Test Mode Bit)" "Normal,Loopback"
|
|
bitfld.long 0x00 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x700000+0x08)++3
|
|
line.long 0x00 "SSSR_2,SSP2 Status Register"
|
|
bitfld.long 0x00 31. " OSS ,Odd Sample Status" "2 samples,1 sample"
|
|
eventfld.long 0x00 23. " BCE ,Bit Count Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CSS ,Clock Synchronization Status" "Ready,Busy"
|
|
eventfld.long 0x00 21. " TUR ,Transmit FIFO Underrun" "No underrun,Underrun"
|
|
textline " "
|
|
eventfld.long 0x00 20. " EOC ,End of Chain" "Not ended,Ended"
|
|
eventfld.long 0x00 19. " TINT ,Receiver Time-out Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 18. " PINT ,Peripheral Trailing Byte Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12.--15. " RFL ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Empty or full"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " TFL ,Transmit FIFO Level" "Empty or full,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
eventfld.long 0x00 7. " ROR ,Receive FIFO Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFS ,Receive FIFO Service Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TFS ,Transmit FIFO Service Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BSY ,SSP Busy" "Idle,Busy"
|
|
bitfld.long 0x00 3. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TNF ,Transmit FIFO Not Full" "Full,Not full"
|
|
group.long (0x700000+0x0C)++3
|
|
line.long 0x00 "SSITR_2,SSP2 Interrupt Test Register"
|
|
bitfld.long 0x00 7. " TROR ,Test RXFIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x00 6. " TRFS ,Test RXFIFO Service Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTFS ,Test TXFIFO Service Request" "Not requested,Requested"
|
|
group.long (0x700000+0x10)++3
|
|
line.long 0x00 "SSDR_2,SSP2 Data Write Register/SSP1 Data Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data to written to the TXFIFO read from the RXFIFO"
|
|
group.long (0x700000+0x28)++3
|
|
line.long 0x00 "SSTO_2,SSP2 Time Out Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TIMEOUT ,Timeout Value"
|
|
group.long (0x700000+0x2C)++3
|
|
line.long 0x00 "SSPSP_2,SSP2 Programmable Serial Protocol Register"
|
|
bitfld.long 0x00 28.--30. " EDMYSTOP ,Extended Dummy Stop" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26.--27. " EDMYSTRT ,Extended Dummy Start" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FSRT ,Frame Sync Relative Timing Bit" "After end of DMTSTOP,With LSB of prev frame"
|
|
bitfld.long 0x00 23.--24. " DMYSTOP ,Dummy Stop" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SFRMWDTH ,Serial Frame Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 9.--15. 1. " SFRMDLY ,Serial Frame Delay"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " DMYSTRT ,Dummy Start" "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " STRTDLY ,Start Delay" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ETDS ,End of Transfer Data State" "Low,Last value <Bit 0>"
|
|
bitfld.long 0x00 2. " SFRMP ,Serial Frame Polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SCMODE ,Serial Bit-rate Clock Mode (Data Driven/Data Sampled/Idle State)" "Falling/Rising/Low,Rising/Falling/Low,Rising/Falling/High,Falling/Rising/High"
|
|
group.long (0x700000+0x30)++3
|
|
line.long 0x00 "SSTA_2,SSP2 TX Time Slot Active Register"
|
|
bitfld.long 0x00 7. " TTSA7 ,SSP7 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 6. " TTSA6 ,SSP6 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTSA5 ,SSP5 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 4. " TTSA4 ,SSP4 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TTSA3 ,SSP3 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 2. " TTSA2 ,SSP2 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TTSA1 ,SSP1 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 0. " TTSA0 ,SSP0 TX Time Slot Active" "Not active,Active"
|
|
group.long (0x700000+0x34)++3
|
|
line.long 0x00 "SSRSA_2,SSP2 RX Time Slot Status Register"
|
|
bitfld.long 0x00 7. " RTSA7 ,SSP7 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 6. " RTSA6 ,SSP6 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSA5 ,SSP5 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 4. " RTSA4 ,SSP4 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTSA3 ,SSP3 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 2. " RTSA2 ,SSP2 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTSA1 ,SSP1 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 0. " RTSA0 ,SSP0 RX Time Slot Active" "Not active,Active"
|
|
rgroup.long (0x700000+0x38)++3
|
|
line.long 0x00 "SSTSS_2,SSP2 Time Slot Status Register"
|
|
bitfld.long 0x00 31. " NMBSY ,Network Mode Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0.--2. " TSS ,Time Slot Status" "0,1,2,3,4,5,6,7"
|
|
group.long (0x700000+0x3C)++3
|
|
line.long 0x00 "SSACD_2,SSP2 Audio Clock Divider Register"
|
|
bitfld.long 0x00 7. " SCDX8 ,SYSCLK Divided By 8" "Div by 4,Div by 8"
|
|
bitfld.long 0x00 4.--6. " ACPS ,Audio Clock PLL Select" "5.622 MHz,11.345 MHz,12.235 MHz,14.857 MHz,32.842 MHz,48.000 MHz,Determined by SSACDD,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCDB ,SYSCLK Divider Bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 0.--2. " ACDS ,Audio Clock Divider Select" "1,2,4,8,16,32,Reserved,Reserved"
|
|
group.long (0x700000+0x40)++3
|
|
line.long 0x00 "SSACDD_2,SSP2 Audio Clock Dither Divider Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " NUM ,Numerator"
|
|
hexmask.long.word 0x00 0.--11. 1. " DEN ,Denominator"
|
|
if (((d.l(ad:(0x41000000+0x900000+0x00)))&0x100000)==0x100000)
|
|
group.long (0x900000+0x00)++3
|
|
line.long 0x00 "SSCR0_3,SSP3 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "Normal,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS ,Audio"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FPCKE ,FIFO Packing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "No masked,Masked"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "Determined by ECS,Network"
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "8-16 bits,18-32 bits"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECS ,External Clock Select" "On-chip,External"
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,Reserved,PSP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Select" "Reserved,18-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,32-bit"
|
|
else
|
|
group.long (0x900000+0x00)++3
|
|
line.long 0x00 "SSCR0_3,SSP3 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "Normal,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS ,Audio"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FPCKE ,FIFO Packing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "No masked,Masked"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "Determined by ECS,Network"
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "8-16 bits,18-32 bits"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECS ,External Clock Select" "On-chip,External"
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,Reserved,PSP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16-bit"
|
|
endif
|
|
if (((d.l(ad:(0x41000000+0x900000+0x04)))&0x4000)==0x4000)
|
|
group.long (0x900000+0x04)++3
|
|
line.long 0x00 "SSCR1_3,SSP3 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Three-state Enable on Last Phase" "1/2 clk after beginning,Last clk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Three-state Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "Continously,When data transfer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSP Serial Bit Rate Clock (SSPSCLKx) Direction" "Master,Slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame (SSPSFRMx) Direction" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "Transmit/receive,Receive w/o transmit"
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "Monahans,DMA bursts"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "Determined by PSP,Inverted"
|
|
bitfld.long 0x00 15. " STRF ,Select FIFO for Efwr (Test Mode Bit)" "TXFIFO,RXFIFO"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/read (Test Mode Bit)" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--13. " RFT ,RXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TFT ,TXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " SPH ,Motorola SPI SSPSCLK Phase Setting" "1 clk,1/2 clk"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SPO ,Motorola SPI SSPSCLK Polarity Setting" "Low,High"
|
|
bitfld.long 0x00 2. " LBM ,Loopback Mode (Test Mode Bit)" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x900000+0x04)++3
|
|
line.long 0x00 "SSCR1_3,SSP3 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Three-state Enable on Last Phase" "1/2 clk after beginning,Last clk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Three-state Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "Continously,When data transfer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSP Serial Bit Rate Clock (SSPSCLKx) Direction" "Master,Slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame (SSPSFRMx) Direction" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "Transmit/receive,Receive w/o transmit"
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "Monahans,DMA bursts"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "Determined by PSP,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/read (Test Mode Bit)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--13. " RFT ,RXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6.--9. " TFT ,TXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPH ,Motorola SPI SSPSCLK Phase Setting" "1 clk,1/2 clk"
|
|
bitfld.long 0x00 3. " SPO ,Motorola SPI SSPSCLK Polarity Setting" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LBM ,Loopback Mode (Test Mode Bit)" "Normal,Loopback"
|
|
bitfld.long 0x00 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x900000+0x08)++3
|
|
line.long 0x00 "SSSR_3,SSP3 Status Register"
|
|
bitfld.long 0x00 31. " OSS ,Odd Sample Status" "2 samples,1 sample"
|
|
eventfld.long 0x00 23. " BCE ,Bit Count Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CSS ,Clock Synchronization Status" "Ready,Busy"
|
|
eventfld.long 0x00 21. " TUR ,Transmit FIFO Underrun" "No underrun,Underrun"
|
|
textline " "
|
|
eventfld.long 0x00 20. " EOC ,End of Chain" "Not ended,Ended"
|
|
eventfld.long 0x00 19. " TINT ,Receiver Time-out Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 18. " PINT ,Peripheral Trailing Byte Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12.--15. " RFL ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Empty or full"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " TFL ,Transmit FIFO Level" "Empty or full,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
eventfld.long 0x00 7. " ROR ,Receive FIFO Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFS ,Receive FIFO Service Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TFS ,Transmit FIFO Service Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BSY ,SSP Busy" "Idle,Busy"
|
|
bitfld.long 0x00 3. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TNF ,Transmit FIFO Not Full" "Full,Not full"
|
|
group.long (0x900000+0x0C)++3
|
|
line.long 0x00 "SSITR_3,SSP3 Interrupt Test Register"
|
|
bitfld.long 0x00 7. " TROR ,Test RXFIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x00 6. " TRFS ,Test RXFIFO Service Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTFS ,Test TXFIFO Service Request" "Not requested,Requested"
|
|
group.long (0x900000+0x10)++3
|
|
line.long 0x00 "SSDR_3,SSP3 Data Write Register/SSP1 Data Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data to written to the TXFIFO read from the RXFIFO"
|
|
group.long (0x900000+0x28)++3
|
|
line.long 0x00 "SSTO_3,SSP3 Time Out Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TIMEOUT ,Timeout Value"
|
|
group.long (0x900000+0x2C)++3
|
|
line.long 0x00 "SSPSP_3,SSP3 Programmable Serial Protocol Register"
|
|
bitfld.long 0x00 28.--30. " EDMYSTOP ,Extended Dummy Stop" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26.--27. " EDMYSTRT ,Extended Dummy Start" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FSRT ,Frame Sync Relative Timing Bit" "After end of DMTSTOP,With LSB of prev frame"
|
|
bitfld.long 0x00 23.--24. " DMYSTOP ,Dummy Stop" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SFRMWDTH ,Serial Frame Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 9.--15. 1. " SFRMDLY ,Serial Frame Delay"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " DMYSTRT ,Dummy Start" "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " STRTDLY ,Start Delay" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ETDS ,End of Transfer Data State" "Low,Last value <Bit 0>"
|
|
bitfld.long 0x00 2. " SFRMP ,Serial Frame Polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SCMODE ,Serial Bit-rate Clock Mode (Data Driven/Data Sampled/Idle State)" "Falling/Rising/Low,Rising/Falling/Low,Rising/Falling/High,Falling/Rising/High"
|
|
group.long (0x900000+0x30)++3
|
|
line.long 0x00 "SSTA_3,SSP3 TX Time Slot Active Register"
|
|
bitfld.long 0x00 7. " TTSA7 ,SSP7 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 6. " TTSA6 ,SSP6 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTSA5 ,SSP5 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 4. " TTSA4 ,SSP4 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TTSA3 ,SSP3 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 2. " TTSA2 ,SSP2 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TTSA1 ,SSP1 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 0. " TTSA0 ,SSP0 TX Time Slot Active" "Not active,Active"
|
|
group.long (0x900000+0x34)++3
|
|
line.long 0x00 "SSRSA_3,SSP3 RX Time Slot Status Register"
|
|
bitfld.long 0x00 7. " RTSA7 ,SSP7 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 6. " RTSA6 ,SSP6 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSA5 ,SSP5 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 4. " RTSA4 ,SSP4 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTSA3 ,SSP3 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 2. " RTSA2 ,SSP2 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTSA1 ,SSP1 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 0. " RTSA0 ,SSP0 RX Time Slot Active" "Not active,Active"
|
|
rgroup.long (0x900000+0x38)++3
|
|
line.long 0x00 "SSTSS_3,SSP3 Time Slot Status Register"
|
|
bitfld.long 0x00 31. " NMBSY ,Network Mode Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0.--2. " TSS ,Time Slot Status" "0,1,2,3,4,5,6,7"
|
|
group.long (0x900000+0x3C)++3
|
|
line.long 0x00 "SSACD_3,SSP3 Audio Clock Divider Register"
|
|
bitfld.long 0x00 7. " SCDX8 ,SYSCLK Divided By 8" "Div by 4,Div by 8"
|
|
bitfld.long 0x00 4.--6. " ACPS ,Audio Clock PLL Select" "5.622 MHz,11.345 MHz,12.235 MHz,14.857 MHz,32.842 MHz,48.000 MHz,Determined by SSACDD,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCDB ,SYSCLK Divider Bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 0.--2. " ACDS ,Audio Clock Divider Select" "1,2,4,8,16,32,Reserved,Reserved"
|
|
group.long (0x900000+0x40)++3
|
|
line.long 0x00 "SSACDD_3,SSP3 Audio Clock Dither Divider Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " NUM ,Numerator"
|
|
hexmask.long.word 0x00 0.--11. 1. " DEN ,Denominator"
|
|
if (((d.l(ad:(0x41000000+0xA00000+0x00)))&0x100000)==0x100000)
|
|
group.long (0xA00000+0x00)++3
|
|
line.long 0x00 "SSCR0_4,SSP4 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "Normal,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS ,Audio"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FPCKE ,FIFO Packing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "No masked,Masked"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "Determined by ECS,Network"
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "8-16 bits,18-32 bits"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECS ,External Clock Select" "On-chip,External"
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,Reserved,PSP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Select" "Reserved,18-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,32-bit"
|
|
else
|
|
group.long (0xA00000+0x00)++3
|
|
line.long 0x00 "SSCR0_4,SSP4 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "Normal,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS ,Audio"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FPCKE ,FIFO Packing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "No masked,Masked"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "Determined by ECS,Network"
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "8-16 bits,18-32 bits"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " SSE ,Synchronous Serial Port Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECS ,External Clock Select" "On-chip,External"
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,Reserved,PSP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16-bit"
|
|
endif
|
|
if (((d.l(ad:(0x41000000+0xA00000+0x04)))&0x4000)==0x4000)
|
|
group.long (0xA00000+0x04)++3
|
|
line.long 0x00 "SSCR1_4,SSP4 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Three-state Enable on Last Phase" "1/2 clk after beginning,Last clk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Three-state Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "Continously,When data transfer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSP Serial Bit Rate Clock (SSPSCLKx) Direction" "Master,Slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame (SSPSFRMx) Direction" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "Transmit/receive,Receive w/o transmit"
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "Monahans,DMA bursts"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "Determined by PSP,Inverted"
|
|
bitfld.long 0x00 15. " STRF ,Select FIFO for Efwr (Test Mode Bit)" "TXFIFO,RXFIFO"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/read (Test Mode Bit)" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--13. " RFT ,RXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " TFT ,TXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " SPH ,Motorola SPI SSPSCLK Phase Setting" "1 clk,1/2 clk"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SPO ,Motorola SPI SSPSCLK Polarity Setting" "Low,High"
|
|
bitfld.long 0x00 2. " LBM ,Loopback Mode (Test Mode Bit)" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0xA00000+0x04)++3
|
|
line.long 0x00 "SSCR1_4,SSP4 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Three-state Enable on Last Phase" "1/2 clk after beginning,Last clk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Three-state Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "Continously,When data transfer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSP Serial Bit Rate Clock (SSPSCLKx) Direction" "Master,Slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame (SSPSFRMx) Direction" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "Transmit/receive,Receive w/o transmit"
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "Monahans,DMA bursts"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "Determined by PSP,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/read (Test Mode Bit)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--13. " RFT ,RXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6.--9. " TFT ,TXFIFO Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPH ,Motorola SPI SSPSCLK Phase Setting" "1 clk,1/2 clk"
|
|
bitfld.long 0x00 3. " SPO ,Motorola SPI SSPSCLK Polarity Setting" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LBM ,Loopback Mode (Test Mode Bit)" "Normal,Loopback"
|
|
bitfld.long 0x00 1. " TIE ,Transmit FIFO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RIE ,Receive FIFO Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0xA00000+0x08)++3
|
|
line.long 0x00 "SSSR_4,SSP4 Status Register"
|
|
bitfld.long 0x00 31. " OSS ,Odd Sample Status" "2 samples,1 sample"
|
|
eventfld.long 0x00 23. " BCE ,Bit Count Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CSS ,Clock Synchronization Status" "Ready,Busy"
|
|
eventfld.long 0x00 21. " TUR ,Transmit FIFO Underrun" "No underrun,Underrun"
|
|
textline " "
|
|
eventfld.long 0x00 20. " EOC ,End of Chain" "Not ended,Ended"
|
|
eventfld.long 0x00 19. " TINT ,Receiver Time-out Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 18. " PINT ,Peripheral Trailing Byte Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12.--15. " RFL ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Empty or full"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " TFL ,Transmit FIFO Level" "Empty or full,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
eventfld.long 0x00 7. " ROR ,Receive FIFO Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFS ,Receive FIFO Service Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TFS ,Transmit FIFO Service Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BSY ,SSP Busy" "Idle,Busy"
|
|
bitfld.long 0x00 3. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TNF ,Transmit FIFO Not Full" "Full,Not full"
|
|
group.long (0xA00000+0x0C)++3
|
|
line.long 0x00 "SSITR_4,SSP4 Interrupt Test Register"
|
|
bitfld.long 0x00 7. " TROR ,Test RXFIFO Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x00 6. " TRFS ,Test RXFIFO Service Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTFS ,Test TXFIFO Service Request" "Not requested,Requested"
|
|
group.long (0xA00000+0x10)++3
|
|
line.long 0x00 "SSDR_4,SSP4 Data Write Register/SSP1 Data Read Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data to written to the TXFIFO read from the RXFIFO"
|
|
group.long (0xA00000+0x28)++3
|
|
line.long 0x00 "SSTO_4,SSP4 Time Out Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TIMEOUT ,Timeout Value"
|
|
group.long (0xA00000+0x2C)++3
|
|
line.long 0x00 "SSPSP_4,SSP4 Programmable Serial Protocol Register"
|
|
bitfld.long 0x00 28.--30. " EDMYSTOP ,Extended Dummy Stop" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26.--27. " EDMYSTRT ,Extended Dummy Start" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FSRT ,Frame Sync Relative Timing Bit" "After end of DMTSTOP,With LSB of prev frame"
|
|
bitfld.long 0x00 23.--24. " DMYSTOP ,Dummy Stop" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SFRMWDTH ,Serial Frame Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 9.--15. 1. " SFRMDLY ,Serial Frame Delay"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " DMYSTRT ,Dummy Start" "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " STRTDLY ,Start Delay" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ETDS ,End of Transfer Data State" "Low,Last value <Bit 0>"
|
|
bitfld.long 0x00 2. " SFRMP ,Serial Frame Polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SCMODE ,Serial Bit-rate Clock Mode (Data Driven/Data Sampled/Idle State)" "Falling/Rising/Low,Rising/Falling/Low,Rising/Falling/High,Falling/Rising/High"
|
|
group.long (0xA00000+0x30)++3
|
|
line.long 0x00 "SSTA_4,SSP4 TX Time Slot Active Register"
|
|
bitfld.long 0x00 7. " TTSA7 ,SSP7 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 6. " TTSA6 ,SSP6 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTSA5 ,SSP5 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 4. " TTSA4 ,SSP4 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TTSA3 ,SSP3 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 2. " TTSA2 ,SSP2 TX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TTSA1 ,SSP1 TX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 0. " TTSA0 ,SSP0 TX Time Slot Active" "Not active,Active"
|
|
group.long (0xA00000+0x34)++3
|
|
line.long 0x00 "SSRSA_4,SSP4 RX Time Slot Status Register"
|
|
bitfld.long 0x00 7. " RTSA7 ,SSP7 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 6. " RTSA6 ,SSP6 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RTSA5 ,SSP5 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 4. " RTSA4 ,SSP4 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTSA3 ,SSP3 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 2. " RTSA2 ,SSP2 RX Time Slot Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTSA1 ,SSP1 RX Time Slot Active" "Not active,Active"
|
|
bitfld.long 0x00 0. " RTSA0 ,SSP0 RX Time Slot Active" "Not active,Active"
|
|
rgroup.long (0xA00000+0x38)++3
|
|
line.long 0x00 "SSTSS_4,SSP4 Time Slot Status Register"
|
|
bitfld.long 0x00 31. " NMBSY ,Network Mode Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0.--2. " TSS ,Time Slot Status" "0,1,2,3,4,5,6,7"
|
|
group.long (0xA00000+0x3C)++3
|
|
line.long 0x00 "SSACD_4,SSP4 Audio Clock Divider Register"
|
|
bitfld.long 0x00 7. " SCDX8 ,SYSCLK Divided By 8" "Div by 4,Div by 8"
|
|
bitfld.long 0x00 4.--6. " ACPS ,Audio Clock PLL Select" "5.622 MHz,11.345 MHz,12.235 MHz,14.857 MHz,32.842 MHz,48.000 MHz,Determined by SSACDD,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCDB ,SYSCLK Divider Bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 0.--2. " ACDS ,Audio Clock Divider Select" "1,2,4,8,16,32,Reserved,Reserved"
|
|
group.long (0xA00000+0x40)++3
|
|
line.long 0x00 "SSACDD_4,SSP4 Audio Clock Dither Divider Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " NUM ,Numerator"
|
|
hexmask.long.word 0x00 0.--11. 1. " DEN ,Denominator"
|
|
tree.end
|
|
tree "AC97 Controller"
|
|
base ad:0x40500000
|
|
width 0x8
|
|
group.long 0x00++3
|
|
line.long 0x00 "POCR,PCM Out Control Register"
|
|
bitfld.long 0x00 3. " FEIE ,FIFO Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FSRIE ,FIFO Service Request Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x04++3
|
|
line.long 0x00 "PCMICR,PCM In Control Register"
|
|
bitfld.long 0x00 3. " FEIE ,FIFO Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FSRIE ,FIFO Service Request Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x08++3
|
|
line.long 0x00 "MCCR,Mic In Control Register"
|
|
bitfld.long 0x00 3. " FEIE ,FIFO Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FSRIE ,FIFO Service Request Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "GCR,Global Control Register"
|
|
bitfld.long 0x00 31. " CLKBPB ,Internal Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FRCRST ,Force AC97 Controller Reset" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 24. " nDMAEN ,DMA Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 19. " CDONE_IE ,Command Done Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SDONE_IE ,Status Done Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " S1RDY_IE ,Secondary CODEC Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PRDY_IE ,Primary CODEC Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " S1RES_IE ,Secondary Resume Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PRES_IE ,Primary Resume Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACOFF ,AC-Link Shut Off" "Not shut off,Shut off"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WRST ,AC97 Warm Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " nCRST ,AC97 Cold Reset" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " GPI_IE ,CODEC GPIO Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x10++3
|
|
line.long 0x00 "POSR,PCM Out Status Register"
|
|
eventfld.long 0x00 4. " FIFOE ,PCM-Out FIFO Error" "No error,Error"
|
|
bitfld.long 0x00 2. " FSR ,PCM-Out FIFO Service Request" "Not requested,Requested"
|
|
group.long 0x14++3
|
|
line.long 0x00 "PCMISR,PCM In Status Register"
|
|
eventfld.long 0x00 4. " FIFOE ,PCM-In FIFO Error" "No error,Error"
|
|
eventfld.long 0x00 3. " EOC ,DMA End of Chain Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSR ,PCM-In FIFO Service Request" "Not requested,Requested"
|
|
group.long 0x18++3
|
|
line.long 0x00 "MCSR,Mic In Status Register"
|
|
eventfld.long 0x00 4. " FIFOE ,FIFO Error" "No error,Error"
|
|
eventfld.long 0x00 3. " EOC ,DMA End of Chain Interrupt" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSR ,FIFO Service Request" "Not requested,Requested"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "GSR,Global Status Register"
|
|
bitfld.long 0x00 21. " PSOINT ,PCM-Surround-Out Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " PCLINT ,PCM-Center/LFE Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CDONE ,Command Done" "Not done,Done"
|
|
eventfld.long 0x00 18. " SDONE ,Status Done" "Not done,Done"
|
|
textline " "
|
|
eventfld.long 0x00 15. " RCS ,Read Completion Status" "Normal,Timeout"
|
|
bitfld.long 0x00 14. " B3S12 ,Bit 3 of Slot 12" "Not displayed,Dispalyed"
|
|
textline " "
|
|
bitfld.long 0x00 13. " B2S12 ,Bit 2 of Slot 12" "Not displayed,Dispalyed"
|
|
bitfld.long 0x00 12. " B1S12 ,Bit 1of Slot 12" "Not displayed,Dispalyed"
|
|
textline " "
|
|
eventfld.long 0x00 11. " S1RESINT ,Secondary Resume Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " PRESINT ,Primary Resume Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 9. " S1CRDY ,Secondary CODEC Ready" "Not ready,Ready"
|
|
eventfld.long 0x00 8. " PCRDY ,Primary CODEC Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MCINT ,Mic-In Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " POINT ,PCM-Out Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PIINT ,PCM-In Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " ACOFFD ,AC-Link Shut Off Done" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MOINT ,Modem-Out Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " MIINT ,Modem-In Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " GSCI ,CODEC GPIO Status Change Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x20++3
|
|
line.long 0x00 "CAR,CODEC Access Register"
|
|
bitfld.long 0x00 0. " CAIP ,CODEC Access In Progress" "Not in progress,In progress"
|
|
group.long 0x24++3
|
|
line.long 0x00 "PCSCR,PCM Surround Out Control Register"
|
|
bitfld.long 0x00 3. " FEIE ,FIFO Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FSRIE ,FIFO Service Request Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x28++3
|
|
line.long 0x00 "PCSSR,PCM Surround Out Status Register"
|
|
eventfld.long 0x00 4. " FIFOE ,FIFO Error" "No error,Error"
|
|
bitfld.long 0x00 2. " FSR ,FIFO Service Request" "Not requested,Requested"
|
|
group.long 0x2C++3
|
|
line.long 0x00 "PCSDR,PCM Surround Out Data Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PSMR ,PCM Surround Right Channel Data"
|
|
hexmask.long.word 0x00 0.--15. 1. " PSML ,PCM Surround Left Channel Data"
|
|
group.long 0x30++3
|
|
line.long 0x00 "PCCLCR,PCM Center/LFE Control Register"
|
|
bitfld.long 0x00 3. " FEIE ,FIFO Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FSRIE ,FIFO Service Request Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x34++3
|
|
line.long 0x00 "PCCLSR,PCM Center/LFE Status Register"
|
|
eventfld.long 0x00 4. " FIFOE ,PCM Center/LFE FIFO Error" "No error,Error"
|
|
bitfld.long 0x00 2. " FSR ,PCM Center/LFE FIFO Service Request" "Not requested,Requested"
|
|
group.long 0x38++3
|
|
line.long 0x00 "PCCLDR,PCM Center/LFE Data Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PCLMR ,PCM Center Channel Data"
|
|
hexmask.long.word 0x00 0.--15. 1. " PCLML ,PCM LFE Channel Data"
|
|
group.long 0x40++3
|
|
line.long 0x00 "PCDR,PCM FIFO Data Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PCMR ,PCM Right Channel Data"
|
|
hexmask.long.word 0x00 0.--15. 1. " PCML ,PCM Left Channel Data"
|
|
rgroup.long 0x60++3
|
|
line.long 0x00 "MCDR,Mic-In FIFO Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MCDAT ,Mic-In Data"
|
|
group.long 0x100++3
|
|
line.long 0x00 "MOCR,Modem Out Control Register"
|
|
bitfld.long 0x00 3. " FEIE ,FIFO Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FSRIE ,FIFO Service Request Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x108++3
|
|
line.long 0x00 "MICR,Modem In Control Register"
|
|
bitfld.long 0x00 3. " FEIE ,FIFO Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FSRIE ,FIFO Service Request Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x110++3
|
|
line.long 0x00 "MOSR,Modem Out Status Register"
|
|
eventfld.long 0x00 4. " FIFOE ,FIFO Error" "No error,Error"
|
|
bitfld.long 0x00 2. " FSR ,FIFO Service Request" "Not requested,Requested"
|
|
group.long 0x118++3
|
|
line.long 0x00 "MISR,Modem In Status Register"
|
|
eventfld.long 0x00 4. " FIFOE ,FIFO Error" "No error,Error"
|
|
eventfld.long 0x00 3. " EOC ,DMA End of Chain Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSR ,FIFO Service Request" "Not requested,Requested"
|
|
group.long 0x140++3
|
|
line.long 0x00 "MODR,Modem FIFO Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MODAT ,Modem Data"
|
|
tree "Primary Audio CODEC Registers"
|
|
group.long 0x200++3
|
|
line.long 0x00 "PACR_0,Primary Audio CODEC Register 0"
|
|
group.long 0x204++3
|
|
line.long 0x00 "PACR_1,Primary Audio CODEC Register 1"
|
|
group.long 0x208++3
|
|
line.long 0x00 "PACR_2,Primary Audio CODEC Register 2"
|
|
group.long 0x20C++3
|
|
line.long 0x00 "PACR_3,Primary Audio CODEC Register 3"
|
|
group.long 0x210++3
|
|
line.long 0x00 "PACR_4,Primary Audio CODEC Register 4"
|
|
group.long 0x214++3
|
|
line.long 0x00 "PACR_5,Primary Audio CODEC Register 5"
|
|
group.long 0x218++3
|
|
line.long 0x00 "PACR_6,Primary Audio CODEC Register 6"
|
|
group.long 0x21C++3
|
|
line.long 0x00 "PACR_7,Primary Audio CODEC Register 7"
|
|
group.long 0x220++3
|
|
line.long 0x00 "PACR_8,Primary Audio CODEC Register 8"
|
|
group.long 0x224++3
|
|
line.long 0x00 "PACR_9,Primary Audio CODEC Register 9"
|
|
group.long 0x228++3
|
|
line.long 0x00 "PACR_10,Primary Audio CODEC Register 10"
|
|
group.long 0x22C++3
|
|
line.long 0x00 "PACR_11,Primary Audio CODEC Register 11"
|
|
group.long 0x230++3
|
|
line.long 0x00 "PACR_12,Primary Audio CODEC Register 12"
|
|
group.long 0x234++3
|
|
line.long 0x00 "PACR_13,Primary Audio CODEC Register 13"
|
|
group.long 0x238++3
|
|
line.long 0x00 "PACR_14,Primary Audio CODEC Register 14"
|
|
group.long 0x23C++3
|
|
line.long 0x00 "PACR_15,Primary Audio CODEC Register 15"
|
|
group.long 0x240++3
|
|
line.long 0x00 "PACR_16,Primary Audio CODEC Register 16"
|
|
group.long 0x244++3
|
|
line.long 0x00 "PACR_17,Primary Audio CODEC Register 17"
|
|
group.long 0x248++3
|
|
line.long 0x00 "PACR_18,Primary Audio CODEC Register 18"
|
|
group.long 0x24C++3
|
|
line.long 0x00 "PACR_19,Primary Audio CODEC Register 19"
|
|
group.long 0x250++3
|
|
line.long 0x00 "PACR_20,Primary Audio CODEC Register 20"
|
|
group.long 0x254++3
|
|
line.long 0x00 "PACR_21,Primary Audio CODEC Register 21"
|
|
group.long 0x258++3
|
|
line.long 0x00 "PACR_22,Primary Audio CODEC Register 22"
|
|
group.long 0x25C++3
|
|
line.long 0x00 "PACR_23,Primary Audio CODEC Register 23"
|
|
group.long 0x260++3
|
|
line.long 0x00 "PACR_24,Primary Audio CODEC Register 24"
|
|
group.long 0x264++3
|
|
line.long 0x00 "PACR_25,Primary Audio CODEC Register 25"
|
|
group.long 0x268++3
|
|
line.long 0x00 "PACR_26,Primary Audio CODEC Register 26"
|
|
group.long 0x26C++3
|
|
line.long 0x00 "PACR_27,Primary Audio CODEC Register 27"
|
|
group.long 0x270++3
|
|
line.long 0x00 "PACR_28,Primary Audio CODEC Register 28"
|
|
group.long 0x274++3
|
|
line.long 0x00 "PACR_29,Primary Audio CODEC Register 29"
|
|
group.long 0x278++3
|
|
line.long 0x00 "PACR_30,Primary Audio CODEC Register 30"
|
|
group.long 0x27C++3
|
|
line.long 0x00 "PACR_31,Primary Audio CODEC Register 31"
|
|
group.long 0x280++3
|
|
line.long 0x00 "PACR_32,Primary Audio CODEC Register 32"
|
|
group.long 0x284++3
|
|
line.long 0x00 "PACR_33,Primary Audio CODEC Register 33"
|
|
group.long 0x288++3
|
|
line.long 0x00 "PACR_34,Primary Audio CODEC Register 34"
|
|
group.long 0x28C++3
|
|
line.long 0x00 "PACR_35,Primary Audio CODEC Register 35"
|
|
group.long 0x290++3
|
|
line.long 0x00 "PACR_36,Primary Audio CODEC Register 36"
|
|
group.long 0x294++3
|
|
line.long 0x00 "PACR_37,Primary Audio CODEC Register 37"
|
|
group.long 0x298++3
|
|
line.long 0x00 "PACR_38,Primary Audio CODEC Register 38"
|
|
group.long 0x29C++3
|
|
line.long 0x00 "PACR_39,Primary Audio CODEC Register 39"
|
|
group.long 0x2A0++3
|
|
line.long 0x00 "PACR_40,Primary Audio CODEC Register 40"
|
|
group.long 0x2A4++3
|
|
line.long 0x00 "PACR_41,Primary Audio CODEC Register 41"
|
|
group.long 0x2A8++3
|
|
line.long 0x00 "PACR_42,Primary Audio CODEC Register 42"
|
|
group.long 0x2AC++3
|
|
line.long 0x00 "PACR_43,Primary Audio CODEC Register 43"
|
|
group.long 0x2B0++3
|
|
line.long 0x00 "PACR_44,Primary Audio CODEC Register 44"
|
|
group.long 0x2B4++3
|
|
line.long 0x00 "PACR_45,Primary Audio CODEC Register 45"
|
|
group.long 0x2B8++3
|
|
line.long 0x00 "PACR_46,Primary Audio CODEC Register 46"
|
|
group.long 0x2BC++3
|
|
line.long 0x00 "PACR_47,Primary Audio CODEC Register 47"
|
|
group.long 0x2C0++3
|
|
line.long 0x00 "PACR_48,Primary Audio CODEC Register 48"
|
|
group.long 0x2C4++3
|
|
line.long 0x00 "PACR_49,Primary Audio CODEC Register 49"
|
|
group.long 0x2C8++3
|
|
line.long 0x00 "PACR_50,Primary Audio CODEC Register 50"
|
|
group.long 0x2CC++3
|
|
line.long 0x00 "PACR_51,Primary Audio CODEC Register 51"
|
|
group.long 0x2D0++3
|
|
line.long 0x00 "PACR_52,Primary Audio CODEC Register 52"
|
|
group.long 0x2D4++3
|
|
line.long 0x00 "PACR_53,Primary Audio CODEC Register 53"
|
|
group.long 0x2D8++3
|
|
line.long 0x00 "PACR_54,Primary Audio CODEC Register 54"
|
|
group.long 0x2DC++3
|
|
line.long 0x00 "PACR_55,Primary Audio CODEC Register 55"
|
|
group.long 0x2E0++3
|
|
line.long 0x00 "PACR_56,Primary Audio CODEC Register 56"
|
|
group.long 0x2E4++3
|
|
line.long 0x00 "PACR_57,Primary Audio CODEC Register 57"
|
|
group.long 0x2E8++3
|
|
line.long 0x00 "PACR_58,Primary Audio CODEC Register 58"
|
|
group.long 0x2EC++3
|
|
line.long 0x00 "PACR_59,Primary Audio CODEC Register 59"
|
|
group.long 0x2F0++3
|
|
line.long 0x00 "PACR_60,Primary Audio CODEC Register 60"
|
|
group.long 0x2F4++3
|
|
line.long 0x00 "PACR_61,Primary Audio CODEC Register 61"
|
|
group.long 0x2F8++3
|
|
line.long 0x00 "PACR_62,Primary Audio CODEC Register 62"
|
|
group.long 0x2FC++3
|
|
line.long 0x00 "PACR_63,Primary Audio CODEC Register 63"
|
|
tree.end
|
|
tree "Secondary Audio CODEC ID 01 Registers"
|
|
group.long 0x300++3
|
|
line.long 0x00 "SACR_0,Secondary Audio CODEC ID 01 Register 0"
|
|
group.long 0x304++3
|
|
line.long 0x00 "SACR_1,Secondary Audio CODEC ID 01 Register 1"
|
|
group.long 0x308++3
|
|
line.long 0x00 "SACR_2,Secondary Audio CODEC ID 01 Register 2"
|
|
group.long 0x30C++3
|
|
line.long 0x00 "SACR_3,Secondary Audio CODEC ID 01 Register 3"
|
|
group.long 0x310++3
|
|
line.long 0x00 "SACR_4,Secondary Audio CODEC ID 01 Register 4"
|
|
group.long 0x314++3
|
|
line.long 0x00 "SACR_5,Secondary Audio CODEC ID 01 Register 5"
|
|
group.long 0x318++3
|
|
line.long 0x00 "SACR_6,Secondary Audio CODEC ID 01 Register 6"
|
|
group.long 0x31C++3
|
|
line.long 0x00 "SACR_7,Secondary Audio CODEC ID 01 Register 7"
|
|
group.long 0x320++3
|
|
line.long 0x00 "SACR_8,Secondary Audio CODEC ID 01 Register 8"
|
|
group.long 0x324++3
|
|
line.long 0x00 "SACR_9,Secondary Audio CODEC ID 01 Register 9"
|
|
group.long 0x328++3
|
|
line.long 0x00 "SACR_10,Secondary Audio CODEC ID 01 Register 10"
|
|
group.long 0x32C++3
|
|
line.long 0x00 "SACR_11,Secondary Audio CODEC ID 01 Register 11"
|
|
group.long 0x330++3
|
|
line.long 0x00 "SACR_12,Secondary Audio CODEC ID 01 Register 12"
|
|
group.long 0x334++3
|
|
line.long 0x00 "SACR_13,Secondary Audio CODEC ID 01 Register 13"
|
|
group.long 0x338++3
|
|
line.long 0x00 "SACR_14,Secondary Audio CODEC ID 01 Register 14"
|
|
group.long 0x33C++3
|
|
line.long 0x00 "SACR_15,Secondary Audio CODEC ID 01 Register 15"
|
|
group.long 0x340++3
|
|
line.long 0x00 "SACR_16,Secondary Audio CODEC ID 01 Register 16"
|
|
group.long 0x344++3
|
|
line.long 0x00 "SACR_17,Secondary Audio CODEC ID 01 Register 17"
|
|
group.long 0x348++3
|
|
line.long 0x00 "SACR_18,Secondary Audio CODEC ID 01 Register 18"
|
|
group.long 0x34C++3
|
|
line.long 0x00 "SACR_19,Secondary Audio CODEC ID 01 Register 19"
|
|
group.long 0x350++3
|
|
line.long 0x00 "SACR_20,Secondary Audio CODEC ID 01 Register 20"
|
|
group.long 0x354++3
|
|
line.long 0x00 "SACR_21,Secondary Audio CODEC ID 01 Register 21"
|
|
group.long 0x358++3
|
|
line.long 0x00 "SACR_22,Secondary Audio CODEC ID 01 Register 22"
|
|
group.long 0x35C++3
|
|
line.long 0x00 "SACR_23,Secondary Audio CODEC ID 01 Register 23"
|
|
group.long 0x360++3
|
|
line.long 0x00 "SACR_24,Secondary Audio CODEC ID 01 Register 24"
|
|
group.long 0x364++3
|
|
line.long 0x00 "SACR_25,Secondary Audio CODEC ID 01 Register 25"
|
|
group.long 0x368++3
|
|
line.long 0x00 "SACR_26,Secondary Audio CODEC ID 01 Register 26"
|
|
group.long 0x36C++3
|
|
line.long 0x00 "SACR_27,Secondary Audio CODEC ID 01 Register 27"
|
|
group.long 0x370++3
|
|
line.long 0x00 "SACR_28,Secondary Audio CODEC ID 01 Register 28"
|
|
group.long 0x374++3
|
|
line.long 0x00 "SACR_29,Secondary Audio CODEC ID 01 Register 29"
|
|
group.long 0x378++3
|
|
line.long 0x00 "SACR_30,Secondary Audio CODEC ID 01 Register 30"
|
|
group.long 0x37C++3
|
|
line.long 0x00 "SACR_31,Secondary Audio CODEC ID 01 Register 31"
|
|
group.long 0x380++3
|
|
line.long 0x00 "SACR_32,Secondary Audio CODEC ID 01 Register 32"
|
|
group.long 0x384++3
|
|
line.long 0x00 "SACR_33,Secondary Audio CODEC ID 01 Register 33"
|
|
group.long 0x388++3
|
|
line.long 0x00 "SACR_34,Secondary Audio CODEC ID 01 Register 34"
|
|
group.long 0x38C++3
|
|
line.long 0x00 "SACR_35,Secondary Audio CODEC ID 01 Register 35"
|
|
group.long 0x390++3
|
|
line.long 0x00 "SACR_36,Secondary Audio CODEC ID 01 Register 36"
|
|
group.long 0x394++3
|
|
line.long 0x00 "SACR_37,Secondary Audio CODEC ID 01 Register 37"
|
|
group.long 0x398++3
|
|
line.long 0x00 "SACR_38,Secondary Audio CODEC ID 01 Register 38"
|
|
group.long 0x39C++3
|
|
line.long 0x00 "SACR_39,Secondary Audio CODEC ID 01 Register 39"
|
|
group.long 0x3A0++3
|
|
line.long 0x00 "SACR_40,Secondary Audio CODEC ID 01 Register 40"
|
|
group.long 0x3A4++3
|
|
line.long 0x00 "SACR_41,Secondary Audio CODEC ID 01 Register 41"
|
|
group.long 0x3A8++3
|
|
line.long 0x00 "SACR_42,Secondary Audio CODEC ID 01 Register 42"
|
|
group.long 0x3AC++3
|
|
line.long 0x00 "SACR_43,Secondary Audio CODEC ID 01 Register 43"
|
|
group.long 0x3B0++3
|
|
line.long 0x00 "SACR_44,Secondary Audio CODEC ID 01 Register 44"
|
|
group.long 0x3B4++3
|
|
line.long 0x00 "SACR_45,Secondary Audio CODEC ID 01 Register 45"
|
|
group.long 0x3B8++3
|
|
line.long 0x00 "SACR_46,Secondary Audio CODEC ID 01 Register 46"
|
|
group.long 0x3BC++3
|
|
line.long 0x00 "SACR_47,Secondary Audio CODEC ID 01 Register 47"
|
|
group.long 0x3C0++3
|
|
line.long 0x00 "SACR_48,Secondary Audio CODEC ID 01 Register 48"
|
|
group.long 0x3C4++3
|
|
line.long 0x00 "SACR_49,Secondary Audio CODEC ID 01 Register 49"
|
|
group.long 0x3C8++3
|
|
line.long 0x00 "SACR_50,Secondary Audio CODEC ID 01 Register 50"
|
|
group.long 0x3CC++3
|
|
line.long 0x00 "SACR_51,Secondary Audio CODEC ID 01 Register 51"
|
|
group.long 0x3D0++3
|
|
line.long 0x00 "SACR_52,Secondary Audio CODEC ID 01 Register 52"
|
|
group.long 0x3D4++3
|
|
line.long 0x00 "SACR_53,Secondary Audio CODEC ID 01 Register 53"
|
|
group.long 0x3D8++3
|
|
line.long 0x00 "SACR_54,Secondary Audio CODEC ID 01 Register 54"
|
|
group.long 0x3DC++3
|
|
line.long 0x00 "SACR_55,Secondary Audio CODEC ID 01 Register 55"
|
|
group.long 0x3E0++3
|
|
line.long 0x00 "SACR_56,Secondary Audio CODEC ID 01 Register 56"
|
|
group.long 0x3E4++3
|
|
line.long 0x00 "SACR_57,Secondary Audio CODEC ID 01 Register 57"
|
|
group.long 0x3E8++3
|
|
line.long 0x00 "SACR_58,Secondary Audio CODEC ID 01 Register 58"
|
|
group.long 0x3EC++3
|
|
line.long 0x00 "SACR_59,Secondary Audio CODEC ID 01 Register 59"
|
|
group.long 0x3F0++3
|
|
line.long 0x00 "SACR_60,Secondary Audio CODEC ID 01 Register 60"
|
|
group.long 0x3F4++3
|
|
line.long 0x00 "SACR_61,Secondary Audio CODEC ID 01 Register 61"
|
|
group.long 0x3F8++3
|
|
line.long 0x00 "SACR_62,Secondary Audio CODEC ID 01 Register 62"
|
|
group.long 0x3FC++3
|
|
line.long 0x00 "SACR_63,Secondary Audio CODEC ID 01 Register 63"
|
|
tree.end
|
|
tree "Primary Modem CODEC Registers"
|
|
group.long 0x400++3
|
|
line.long 0x00 "PACR_0,Primary Modem CODEC Register 0"
|
|
group.long 0x404++3
|
|
line.long 0x00 "PACR_1,Primary Modem CODEC Register 1"
|
|
group.long 0x408++3
|
|
line.long 0x00 "PACR_2,Primary Modem CODEC Register 2"
|
|
group.long 0x40C++3
|
|
line.long 0x00 "PACR_3,Primary Modem CODEC Register 3"
|
|
group.long 0x410++3
|
|
line.long 0x00 "PACR_4,Primary Modem CODEC Register 4"
|
|
group.long 0x414++3
|
|
line.long 0x00 "PACR_5,Primary Modem CODEC Register 5"
|
|
group.long 0x418++3
|
|
line.long 0x00 "PACR_6,Primary Modem CODEC Register 6"
|
|
group.long 0x41C++3
|
|
line.long 0x00 "PACR_7,Primary Modem CODEC Register 7"
|
|
group.long 0x420++3
|
|
line.long 0x00 "PACR_8,Primary Modem CODEC Register 8"
|
|
group.long 0x424++3
|
|
line.long 0x00 "PACR_9,Primary Modem CODEC Register 9"
|
|
group.long 0x428++3
|
|
line.long 0x00 "PACR_10,Primary Modem CODEC Register 10"
|
|
group.long 0x42C++3
|
|
line.long 0x00 "PACR_11,Primary Modem CODEC Register 11"
|
|
group.long 0x430++3
|
|
line.long 0x00 "PACR_12,Primary Modem CODEC Register 12"
|
|
group.long 0x434++3
|
|
line.long 0x00 "PACR_13,Primary Modem CODEC Register 13"
|
|
group.long 0x438++3
|
|
line.long 0x00 "PACR_14,Primary Modem CODEC Register 14"
|
|
group.long 0x43C++3
|
|
line.long 0x00 "PACR_15,Primary Modem CODEC Register 15"
|
|
group.long 0x440++3
|
|
line.long 0x00 "PACR_16,Primary Modem CODEC Register 16"
|
|
group.long 0x444++3
|
|
line.long 0x00 "PACR_17,Primary Modem CODEC Register 17"
|
|
group.long 0x448++3
|
|
line.long 0x00 "PACR_18,Primary Modem CODEC Register 18"
|
|
group.long 0x44C++3
|
|
line.long 0x00 "PACR_19,Primary Modem CODEC Register 19"
|
|
group.long 0x450++3
|
|
line.long 0x00 "PACR_20,Primary Modem CODEC Register 20"
|
|
group.long 0x454++3
|
|
line.long 0x00 "PACR_21,Primary Modem CODEC Register 21"
|
|
group.long 0x458++3
|
|
line.long 0x00 "PACR_22,Primary Modem CODEC Register 22"
|
|
group.long 0x45C++3
|
|
line.long 0x00 "PACR_23,Primary Modem CODEC Register 23"
|
|
group.long 0x460++3
|
|
line.long 0x00 "PACR_24,Primary Modem CODEC Register 24"
|
|
group.long 0x464++3
|
|
line.long 0x00 "PACR_25,Primary Modem CODEC Register 25"
|
|
group.long 0x468++3
|
|
line.long 0x00 "PACR_26,Primary Modem CODEC Register 26"
|
|
group.long 0x46C++3
|
|
line.long 0x00 "PACR_27,Primary Modem CODEC Register 27"
|
|
group.long 0x470++3
|
|
line.long 0x00 "PACR_28,Primary Modem CODEC Register 28"
|
|
group.long 0x474++3
|
|
line.long 0x00 "PACR_29,Primary Modem CODEC Register 29"
|
|
group.long 0x478++3
|
|
line.long 0x00 "PACR_30,Primary Modem CODEC Register 30"
|
|
group.long 0x47C++3
|
|
line.long 0x00 "PACR_31,Primary Modem CODEC Register 31"
|
|
group.long 0x480++3
|
|
line.long 0x00 "PACR_32,Primary Modem CODEC Register 32"
|
|
group.long 0x484++3
|
|
line.long 0x00 "PACR_33,Primary Modem CODEC Register 33"
|
|
group.long 0x488++3
|
|
line.long 0x00 "PACR_34,Primary Modem CODEC Register 34"
|
|
group.long 0x48C++3
|
|
line.long 0x00 "PACR_35,Primary Modem CODEC Register 35"
|
|
group.long 0x490++3
|
|
line.long 0x00 "PACR_36,Primary Modem CODEC Register 36"
|
|
group.long 0x494++3
|
|
line.long 0x00 "PACR_37,Primary Modem CODEC Register 37"
|
|
group.long 0x498++3
|
|
line.long 0x00 "PACR_38,Primary Modem CODEC Register 38"
|
|
group.long 0x49C++3
|
|
line.long 0x00 "PACR_39,Primary Modem CODEC Register 39"
|
|
group.long 0x4A0++3
|
|
line.long 0x00 "PACR_40,Primary Modem CODEC Register 40"
|
|
group.long 0x4A4++3
|
|
line.long 0x00 "PACR_41,Primary Modem CODEC Register 41"
|
|
group.long 0x4A8++3
|
|
line.long 0x00 "PACR_42,Primary Modem CODEC Register 42"
|
|
group.long 0x4AC++3
|
|
line.long 0x00 "PACR_43,Primary Modem CODEC Register 43"
|
|
group.long 0x4B0++3
|
|
line.long 0x00 "PACR_44,Primary Modem CODEC Register 44"
|
|
group.long 0x4B4++3
|
|
line.long 0x00 "PACR_45,Primary Modem CODEC Register 45"
|
|
group.long 0x4B8++3
|
|
line.long 0x00 "PACR_46,Primary Modem CODEC Register 46"
|
|
group.long 0x4BC++3
|
|
line.long 0x00 "PACR_47,Primary Modem CODEC Register 47"
|
|
group.long 0x4C0++3
|
|
line.long 0x00 "PACR_48,Primary Modem CODEC Register 48"
|
|
group.long 0x4C4++3
|
|
line.long 0x00 "PACR_49,Primary Modem CODEC Register 49"
|
|
group.long 0x4C8++3
|
|
line.long 0x00 "PACR_50,Primary Modem CODEC Register 50"
|
|
group.long 0x4CC++3
|
|
line.long 0x00 "PACR_51,Primary Modem CODEC Register 51"
|
|
group.long 0x4D0++3
|
|
line.long 0x00 "PACR_52,Primary Modem CODEC Register 52"
|
|
group.long 0x4D4++3
|
|
line.long 0x00 "PACR_53,Primary Modem CODEC Register 53"
|
|
group.long 0x4D8++3
|
|
line.long 0x00 "PACR_54,Primary Modem CODEC Register 54"
|
|
group.long 0x4DC++3
|
|
line.long 0x00 "PACR_55,Primary Modem CODEC Register 55"
|
|
group.long 0x4E0++3
|
|
line.long 0x00 "PACR_56,Primary Modem CODEC Register 56"
|
|
group.long 0x4E4++3
|
|
line.long 0x00 "PACR_57,Primary Modem CODEC Register 57"
|
|
group.long 0x4E8++3
|
|
line.long 0x00 "PACR_58,Primary Modem CODEC Register 58"
|
|
group.long 0x4EC++3
|
|
line.long 0x00 "PACR_59,Primary Modem CODEC Register 59"
|
|
group.long 0x4F0++3
|
|
line.long 0x00 "PACR_60,Primary Modem CODEC Register 60"
|
|
group.long 0x4F4++3
|
|
line.long 0x00 "PACR_61,Primary Modem CODEC Register 61"
|
|
group.long 0x4F8++3
|
|
line.long 0x00 "PACR_62,Primary Modem CODEC Register 62"
|
|
group.long 0x4FC++3
|
|
line.long 0x00 "PACR_63,Primary Modem CODEC Register 63"
|
|
tree.end
|
|
tree "Secondary Modem COCEC ID 01 Registers"
|
|
group.long 0x500++3
|
|
line.long 0x00 "PACR_0,Secondary Modem CODEC ID 01 Register 0"
|
|
group.long 0x504++3
|
|
line.long 0x00 "PACR_1,Secondary Modem CODEC ID 01 Register 1"
|
|
group.long 0x508++3
|
|
line.long 0x00 "PACR_2,Secondary Modem CODEC ID 01 Register 2"
|
|
group.long 0x50C++3
|
|
line.long 0x00 "PACR_3,Secondary Modem CODEC ID 01 Register 3"
|
|
group.long 0x510++3
|
|
line.long 0x00 "PACR_4,Secondary Modem CODEC ID 01 Register 4"
|
|
group.long 0x514++3
|
|
line.long 0x00 "PACR_5,Secondary Modem CODEC ID 01 Register 5"
|
|
group.long 0x518++3
|
|
line.long 0x00 "PACR_6,Secondary Modem CODEC ID 01 Register 6"
|
|
group.long 0x51C++3
|
|
line.long 0x00 "PACR_7,Secondary Modem CODEC ID 01 Register 7"
|
|
group.long 0x520++3
|
|
line.long 0x00 "PACR_8,Secondary Modem CODEC ID 01 Register 8"
|
|
group.long 0x524++3
|
|
line.long 0x00 "PACR_9,Secondary Modem CODEC ID 01 Register 9"
|
|
group.long 0x528++3
|
|
line.long 0x00 "PACR_10,Secondary Modem CODEC ID 01 Register 10"
|
|
group.long 0x52C++3
|
|
line.long 0x00 "PACR_11,Secondary Modem CODEC ID 01 Register 11"
|
|
group.long 0x530++3
|
|
line.long 0x00 "PACR_12,Secondary Modem CODEC ID 01 Register 12"
|
|
group.long 0x534++3
|
|
line.long 0x00 "PACR_13,Secondary Modem CODEC ID 01 Register 13"
|
|
group.long 0x538++3
|
|
line.long 0x00 "PACR_14,Secondary Modem CODEC ID 01 Register 14"
|
|
group.long 0x53C++3
|
|
line.long 0x00 "PACR_15,Secondary Modem CODEC ID 01 Register 15"
|
|
group.long 0x540++3
|
|
line.long 0x00 "PACR_16,Secondary Modem CODEC ID 01 Register 16"
|
|
group.long 0x544++3
|
|
line.long 0x00 "PACR_17,Secondary Modem CODEC ID 01 Register 17"
|
|
group.long 0x548++3
|
|
line.long 0x00 "PACR_18,Secondary Modem CODEC ID 01 Register 18"
|
|
group.long 0x54C++3
|
|
line.long 0x00 "PACR_19,Secondary Modem CODEC ID 01 Register 19"
|
|
group.long 0x550++3
|
|
line.long 0x00 "PACR_20,Secondary Modem CODEC ID 01 Register 20"
|
|
group.long 0x554++3
|
|
line.long 0x00 "PACR_21,Secondary Modem CODEC ID 01 Register 21"
|
|
group.long 0x558++3
|
|
line.long 0x00 "PACR_22,Secondary Modem CODEC ID 01 Register 22"
|
|
group.long 0x55C++3
|
|
line.long 0x00 "PACR_23,Secondary Modem CODEC ID 01 Register 23"
|
|
group.long 0x560++3
|
|
line.long 0x00 "PACR_24,Secondary Modem CODEC ID 01 Register 24"
|
|
group.long 0x564++3
|
|
line.long 0x00 "PACR_25,Secondary Modem CODEC ID 01 Register 25"
|
|
group.long 0x568++3
|
|
line.long 0x00 "PACR_26,Secondary Modem CODEC ID 01 Register 26"
|
|
group.long 0x56C++3
|
|
line.long 0x00 "PACR_27,Secondary Modem CODEC ID 01 Register 27"
|
|
group.long 0x570++3
|
|
line.long 0x00 "PACR_28,Secondary Modem CODEC ID 01 Register 28"
|
|
group.long 0x574++3
|
|
line.long 0x00 "PACR_29,Secondary Modem CODEC ID 01 Register 29"
|
|
group.long 0x578++3
|
|
line.long 0x00 "PACR_30,Secondary Modem CODEC ID 01 Register 30"
|
|
group.long 0x57C++3
|
|
line.long 0x00 "PACR_31,Secondary Modem CODEC ID 01 Register 31"
|
|
group.long 0x580++3
|
|
line.long 0x00 "PACR_32,Secondary Modem CODEC ID 01 Register 32"
|
|
group.long 0x584++3
|
|
line.long 0x00 "PACR_33,Secondary Modem CODEC ID 01 Register 33"
|
|
group.long 0x588++3
|
|
line.long 0x00 "PACR_34,Secondary Modem CODEC ID 01 Register 34"
|
|
group.long 0x58C++3
|
|
line.long 0x00 "PACR_35,Secondary Modem CODEC ID 01 Register 35"
|
|
group.long 0x590++3
|
|
line.long 0x00 "PACR_36,Secondary Modem CODEC ID 01 Register 36"
|
|
group.long 0x594++3
|
|
line.long 0x00 "PACR_37,Secondary Modem CODEC ID 01 Register 37"
|
|
group.long 0x598++3
|
|
line.long 0x00 "PACR_38,Secondary Modem CODEC ID 01 Register 38"
|
|
group.long 0x59C++3
|
|
line.long 0x00 "PACR_39,Secondary Modem CODEC ID 01 Register 39"
|
|
group.long 0x5A0++3
|
|
line.long 0x00 "PACR_40,Secondary Modem CODEC ID 01 Register 40"
|
|
group.long 0x5A4++3
|
|
line.long 0x00 "PACR_41,Secondary Modem CODEC ID 01 Register 41"
|
|
group.long 0x5A8++3
|
|
line.long 0x00 "PACR_42,Secondary Modem CODEC ID 01 Register 42"
|
|
group.long 0x5AC++3
|
|
line.long 0x00 "PACR_43,Secondary Modem CODEC ID 01 Register 43"
|
|
group.long 0x5B0++3
|
|
line.long 0x00 "PACR_44,Secondary Modem CODEC ID 01 Register 44"
|
|
group.long 0x5B4++3
|
|
line.long 0x00 "PACR_45,Secondary Modem CODEC ID 01 Register 45"
|
|
group.long 0x5B8++3
|
|
line.long 0x00 "PACR_46,Secondary Modem CODEC ID 01 Register 46"
|
|
group.long 0x5BC++3
|
|
line.long 0x00 "PACR_47,Secondary Modem CODEC ID 01 Register 47"
|
|
group.long 0x5C0++3
|
|
line.long 0x00 "PACR_48,Secondary Modem CODEC ID 01 Register 48"
|
|
group.long 0x5C4++3
|
|
line.long 0x00 "PACR_49,Secondary Modem CODEC ID 01 Register 49"
|
|
group.long 0x5C8++3
|
|
line.long 0x00 "PACR_50,Secondary Modem CODEC ID 01 Register 50"
|
|
group.long 0x5CC++3
|
|
line.long 0x00 "PACR_51,Secondary Modem CODEC ID 01 Register 51"
|
|
group.long 0x5D0++3
|
|
line.long 0x00 "PACR_52,Secondary Modem CODEC ID 01 Register 52"
|
|
group.long 0x5D4++3
|
|
line.long 0x00 "PACR_53,Secondary Modem CODEC ID 01 Register 53"
|
|
group.long 0x5D8++3
|
|
line.long 0x00 "PACR_54,Secondary Modem CODEC ID 01 Register 54"
|
|
group.long 0x5DC++3
|
|
line.long 0x00 "PACR_55,Secondary Modem CODEC ID 01 Register 55"
|
|
group.long 0x5E0++3
|
|
line.long 0x00 "PACR_56,Secondary Modem CODEC ID 01 Register 56"
|
|
group.long 0x5E4++3
|
|
line.long 0x00 "PACR_57,Secondary Modem CODEC ID 01 Register 57"
|
|
group.long 0x5E8++3
|
|
line.long 0x00 "PACR_58,Secondary Modem CODEC ID 01 Register 58"
|
|
group.long 0x5EC++3
|
|
line.long 0x00 "PACR_59,Secondary Modem CODEC ID 01 Register 59"
|
|
group.long 0x5F0++3
|
|
line.long 0x00 "PACR_60,Secondary Modem CODEC ID 01 Register 60"
|
|
group.long 0x5F4++3
|
|
line.long 0x00 "PACR_61,Secondary Modem CODEC ID 01 Register 61"
|
|
group.long 0x5F8++3
|
|
line.long 0x00 "PACR_62,Secondary Modem CODEC ID 01 Register 62"
|
|
group.long 0x5FC++3
|
|
line.long 0x00 "PACR_63,Secondary Modem CODEC ID 01 Register 63"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "UARTs"
|
|
tree "UART1"
|
|
base ad:0x40100000
|
|
width 0xB
|
|
if ((d.l(ad:0x40100000+0xC)&0x80)==0x80)
|
|
group.long 0x00++3
|
|
line.long 0x00 "FFDLL,Divisor Latch Register Low Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,Low-byte compare vlaue to generate baud rate"
|
|
group.long 0x04++3
|
|
line.long 0x00 "FFDLH,Divisor Latch Register High Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLH ,High-byte compare vlaue to generate baud rate"
|
|
else
|
|
hgroup.long 0x00++3
|
|
hide.long 0x00 "FFRBR/THR,Receive Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++3
|
|
line.long 0x00 "FFIER,Interrupt Enable Register"
|
|
bitfld.long 0x00 7. " DMAE ,DMA Requests Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " UUE ,UART Unit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " NRZE ,NRZ Coding Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RTOIE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RLSE ,Receiver Line Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIE ,Transmit Data Request Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RAVIE ,Receiver Data Available Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x08++3
|
|
line.long 0x00 "FFIIR,Interrupt ID Register"
|
|
bitfld.long 0x00 6.--7. " FIFOES ,FIFO Mode Enable Status" "Non-FIFO,Reserved,Reserved,FIFO"
|
|
bitfld.long 0x00 5. " EOC ,DMA End of Descriptor Chain" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ABL ,Auto-baud Lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " TOD ,Time Out Detected" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " IID ,Interrupt Source Encoded" "Modem Status,Transmit FIFO,Received data,Receive error"
|
|
bitfld.long 0x00 0. " nIP ,Interrupt Pending" "Pending,Not pending"
|
|
wgroup.long 0x08++3
|
|
line.long 0x00 "FFFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " ITL ,Interrupt Trigger Level" ">=1 byte ,>=8 bytes,>=16 bytes,>=32 bytes"
|
|
bitfld.long 0x00 5. " BUS ,32-bit Peripheral Bus" "8-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRAIL ,Trailing Bytes" "Rem by Monahans,Rem by DMAC"
|
|
bitfld.long 0x00 3. " TIL ,Transmitter Interrupt Level " "FIFO half empty,FIFO empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RESETTF ,Reset Transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 1. " RESETRF ,Reset Receive FIFO" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TRFIOE ,Transmit and Receive FIFO Enable" "Disabled,Enabled"
|
|
if ((d.l(ad:0x40100000+0xC)&0x8)==0x8)
|
|
group.long 0x0C++3
|
|
line.long 0x00 "FFLCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "THR,DLL/DHL"
|
|
bitfld.long 0x00 6. " SB ,Set Break" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STKYP ,Sticky Parity" "No effect,Opposite of EPS"
|
|
bitfld.long 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity Enable" "No parity,Parity"
|
|
bitfld.long 0x00 2. " STB ,Stop Bits" "1 stop bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "7-bit,7-bit,7-bit,8-bit"
|
|
else
|
|
group.long 0x0C++3
|
|
line.long 0x00 "FFLCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "THR,DLL/DHL"
|
|
bitfld.long 0x00 6. " SB ,Set Break" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STKYP ,Sticky Parity" "No effect,Opposite of EPS"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity Enable" "No parity,Parity"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STB ,Stop Bits" "1 stop bit,Reserved"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "7-bit,7-bit,7-bit,8-bit"
|
|
endif
|
|
if ((d.l(ad:0x40100000+0x10)&0x10)==0x10)
|
|
group.long 0x10++3
|
|
line.long 0x00 "FFMCR,Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Auto-flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OUT2 ,OUT2 Signal Control" "MSR[DCD]=0,MSR[DCD]=1"
|
|
bitfld.long 0x00 2. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,Request to Send" "Non-auto-flow,Auto-flow"
|
|
bitfld.long 0x00 0. " DTR ,Data Terminal Ready" "1,0"
|
|
else
|
|
group.long 0x10++3
|
|
line.long 0x00 "FFMCR,Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Auto-flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OUT2 ,OUT2 Signal Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RTS ,Request to Send" "Non-auto-flow,Auto-flow"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTR ,Data Terminal Ready" "1,0"
|
|
endif
|
|
rgroup.long 0x14++3
|
|
line.long 0x00 "FFLSR,Line Status Register"
|
|
bitfld.long 0x00 7. " FIFOE ,FIFO Error Status" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TDRQ ,Transmit Data Request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.long 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
rgroup.long 0x18++3
|
|
line.long 0x00 "FFMSR,Modem Status Register"
|
|
bitfld.long 0x00 7. " DCD ,Data Carrier Detect" "1,0"
|
|
bitfld.long 0x00 6. " RI ,Ring Indicator" "1,0"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSR ,Data Set Ready" "1,0"
|
|
bitfld.long 0x00 4. " CTS ,Clear to Send" "1,0"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DDCD ,Delta Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " TERI ,Trailing Edge Ring Indicator" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DDSR ,Delta Data Set Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " DCTS ,Delta Clear to Send" "Not cleared,Cleared"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "FFSCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCRATCHPAD ,Scratchpad (no effect on UART)"
|
|
group.long 0x20++3
|
|
line.long 0x00 "FFISR,Serial Infrared Select Register"
|
|
bitfld.long 0x00 4. " RXPL ,Receive Data Polarity" "Positive,Negative"
|
|
bitfld.long 0x00 3. " TXPL ,Transmit Dta Polarity" "Positive,Negative"
|
|
textline " "
|
|
bitfld.long 0x00 2. " XMODE ,Transmit Pulse Width Select" "3/16 time wide,1.6us"
|
|
bitfld.long 0x00 1. " RCVIER ,Receiver SIR Enable" "UART,IrDA"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XMITIR ,Transmitter SIR Enable" "UART,IrDA"
|
|
group.long 0x24++3
|
|
line.long 0x00 "FFFOR,FIFO Occupancy Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " BYTECOUNT ,Number of bytes remaining in the receive FIFO"
|
|
group.long 0x28++3
|
|
line.long 0x00 "FFABR,Autobaud Control Register"
|
|
bitfld.long 0x00 3. " ABT ,Table used to calculate baud rates" "Formula,Table"
|
|
bitfld.long 0x00 2. " ABUP ,UART Programs DLL/DLH" "Monahans,UART"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ABLIE ,Auto-baud-lock Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ABE ,Auto-baud Enable" "Disabled,Enabled"
|
|
rgroup.long 0x2C++3
|
|
line.long 0x00 "FFACR,Autobaud Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNTVALUE ,Number of 14.7456 MHz clock cycles within a start-bit pulse"
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x40200000
|
|
width 0xB
|
|
if ((d.l(ad:0x40200000+0xC)&0x80)==0x80)
|
|
group.long 0x00++3
|
|
line.long 0x00 "BTDLL,Divisor Latch Register Low Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,Low-byte compare vlaue to generate baud rate"
|
|
group.long 0x04++3
|
|
line.long 0x00 "BTDLH,Divisor Latch Register High Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLH ,High-byte compare vlaue to generate baud rate"
|
|
else
|
|
hgroup.long 0x00++3
|
|
hide.long 0x00 "BTRBR/THR,Receive Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++3
|
|
line.long 0x00 "BTIER,Interrupt Enable Register"
|
|
bitfld.long 0x00 7. " DMAE ,DMA Requests Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " UUE ,UART Unit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " NRZE ,NRZ Coding Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RTOIE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RLSE ,Receiver Line Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIE ,Transmit Data Request Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RAVIE ,Receiver Data Available Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x08++3
|
|
line.long 0x00 "BTIIR,Interrupt ID Register"
|
|
bitfld.long 0x00 6.--7. " FIFOES ,FIFO Mode Enable Status" "Non-FIFO,Reserved,Reserved,FIFO"
|
|
bitfld.long 0x00 5. " EOC ,DMA End of Descriptor Chain" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ABL ,Auto-baud Lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " TOD ,Time Out Detected" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " IID ,Interrupt Source Encoded" "Modem Status,Transmit FIFO,Received data,Receive error"
|
|
bitfld.long 0x00 0. " nIP ,Interrupt Pending" "Pending,Not pending"
|
|
wgroup.long 0x08++3
|
|
line.long 0x00 "BTFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " ITL ,Interrupt Trigger Level" ">=1 byte ,>=8 bytes,>=16 bytes,>=32 bytes"
|
|
bitfld.long 0x00 5. " BUS ,32-bit Peripheral Bus" "8-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRAIL ,Trailing Bytes" "Rem by Monahans,Rem by DMAC"
|
|
bitfld.long 0x00 3. " TIL ,Transmitter Interrupt Level " "FIFO half empty,FIFO empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RESETTF ,Reset Transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 1. " RESETRF ,Reset Receive FIFO" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TRFIOE ,Transmit and Receive FIFO Enable" "Disabled,Enabled"
|
|
if ((d.l(ad:0x40200000+0xC)&0x8)==0x8)
|
|
group.long 0x0C++3
|
|
line.long 0x00 "BTLCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "THR,DLL/DHL"
|
|
bitfld.long 0x00 6. " SB ,Set Break" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STKYP ,Sticky Parity" "No effect,Opposite of EPS"
|
|
bitfld.long 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity Enable" "No parity,Parity"
|
|
bitfld.long 0x00 2. " STB ,Stop Bits" "1 stop bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "7-bit,7-bit,7-bit,8-bit"
|
|
else
|
|
group.long 0x0C++3
|
|
line.long 0x00 "BTLCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "THR,DLL/DHL"
|
|
bitfld.long 0x00 6. " SB ,Set Break" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STKYP ,Sticky Parity" "No effect,Opposite of EPS"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity Enable" "No parity,Parity"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STB ,Stop Bits" "1 stop bit,Reserved"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "7-bit,7-bit,7-bit,8-bit"
|
|
endif
|
|
if ((d.l(ad:0x40200000+0x10)&0x10)==0x10)
|
|
group.long 0x10++3
|
|
line.long 0x00 "BTMCR,Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Auto-flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OUT2 ,OUT2 Signal Control" "MSR[DCD]=0,MSR[DCD]=1"
|
|
bitfld.long 0x00 2. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,Request to Send" "Non-auto-flow,Auto-flow"
|
|
bitfld.long 0x00 0. " DTR ,Data Terminal Ready" "1,0"
|
|
else
|
|
group.long 0x10++3
|
|
line.long 0x00 "BTMCR,Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Auto-flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OUT2 ,OUT2 Signal Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RTS ,Request to Send" "Non-auto-flow,Auto-flow"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTR ,Data Terminal Ready" "1,0"
|
|
endif
|
|
rgroup.long 0x14++3
|
|
line.long 0x00 "BTLSR,Line Status Register"
|
|
bitfld.long 0x00 7. " FIFOE ,FIFO Error Status" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TDRQ ,Transmit Data Request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.long 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
rgroup.long 0x18++3
|
|
line.long 0x00 "BTMSR,Modem Status Register"
|
|
bitfld.long 0x00 7. " DCD ,Data Carrier Detect" "1,0"
|
|
bitfld.long 0x00 6. " RI ,Ring Indicator" "1,0"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSR ,Data Set Ready" "1,0"
|
|
bitfld.long 0x00 4. " CTS ,Clear to Send" "1,0"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DDCD ,Delta Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " TERI ,Trailing Edge Ring Indicator" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DDSR ,Delta Data Set Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " DCTS ,Delta Clear to Send" "Not cleared,Cleared"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "BTSCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCRATCHPAD ,Scratchpad (no effect on UART)"
|
|
group.long 0x20++3
|
|
line.long 0x00 "BTISR,Serial Infrared Select Register"
|
|
bitfld.long 0x00 4. " RXPL ,Receive Data Polarity" "Positive,Negative"
|
|
bitfld.long 0x00 3. " TXPL ,Transmit Dta Polarity" "Positive,Negative"
|
|
textline " "
|
|
bitfld.long 0x00 2. " XMODE ,Transmit Pulse Width Select" "3/16 time wide,1.6us"
|
|
bitfld.long 0x00 1. " RCVIER ,Receiver SIR Enable" "UART,IrDA"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XMITIR ,Transmitter SIR Enable" "UART,IrDA"
|
|
group.long 0x24++3
|
|
line.long 0x00 "BTFOR,FIFO Occupancy Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " BYTECOUNT ,Number of bytes remaining in the receive FIFO"
|
|
group.long 0x28++3
|
|
line.long 0x00 "BTABR,Autobaud Control Register"
|
|
bitfld.long 0x00 3. " ABT ,Table used to calculate baud rates" "Formula,Table"
|
|
bitfld.long 0x00 2. " ABUP ,UART Programs DLL/DLH" "Monahans,UART"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ABLIE ,Auto-baud-lock Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ABE ,Auto-baud Enable" "Disabled,Enabled"
|
|
rgroup.long 0x2C++3
|
|
line.long 0x00 "BTACR,Autobaud Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNTVALUE ,Number of 14.7456 MHz clock cycles within a start-bit pulse"
|
|
tree.end
|
|
tree "UART3"
|
|
base ad:0x40700000
|
|
width 0xB
|
|
if ((d.l(ad:0x40700000+0xC)&0x80)==0x80)
|
|
group.long 0x00++3
|
|
line.long 0x00 "STDLL,Divisor Latch Register Low Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,Low-byte compare vlaue to generate baud rate"
|
|
group.long 0x04++3
|
|
line.long 0x00 "STDLH,Divisor Latch Register High Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLH ,High-byte compare vlaue to generate baud rate"
|
|
else
|
|
hgroup.long 0x00++3
|
|
hide.long 0x00 "STRBR/THR,Receive Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++3
|
|
line.long 0x00 "STIER,Interrupt Enable Register"
|
|
bitfld.long 0x00 7. " DMAE ,DMA Requests Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " UUE ,UART Unit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " NRZE ,NRZ Coding Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RTOIE ,Receiver Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RLSE ,Receiver Line Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIE ,Transmit Data Request Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RAVIE ,Receiver Data Available Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x08++3
|
|
line.long 0x00 "STIIR,Interrupt ID Register"
|
|
bitfld.long 0x00 6.--7. " FIFOES ,FIFO Mode Enable Status" "Non-FIFO,Reserved,Reserved,FIFO"
|
|
bitfld.long 0x00 5. " EOC ,DMA End of Descriptor Chain" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ABL ,Auto-baud Lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " TOD ,Time Out Detected" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " IID ,Interrupt Source Encoded" "Modem Status,Transmit FIFO,Received data,Receive error"
|
|
bitfld.long 0x00 0. " nIP ,Interrupt Pending" "Pending,Not pending"
|
|
wgroup.long 0x08++3
|
|
line.long 0x00 "STFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " ITL ,Interrupt Trigger Level" ">=1 byte ,>=8 bytes,>=16 bytes,>=32 bytes"
|
|
bitfld.long 0x00 5. " BUS ,32-bit Peripheral Bus" "8-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRAIL ,Trailing Bytes" "Rem by Monahans,Rem by DMAC"
|
|
bitfld.long 0x00 3. " TIL ,Transmitter Interrupt Level " "FIFO half empty,FIFO empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RESETTF ,Reset Transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 1. " RESETRF ,Reset Receive FIFO" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TRFIOE ,Transmit and Receive FIFO Enable" "Disabled,Enabled"
|
|
if ((d.l(ad:0x40700000+0xC)&0x8)==0x8)
|
|
group.long 0x0C++3
|
|
line.long 0x00 "STLCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "THR,DLL/DHL"
|
|
bitfld.long 0x00 6. " SB ,Set Break" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STKYP ,Sticky Parity" "No effect,Opposite of EPS"
|
|
bitfld.long 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity Enable" "No parity,Parity"
|
|
bitfld.long 0x00 2. " STB ,Stop Bits" "1 stop bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "7-bit,7-bit,7-bit,8-bit"
|
|
else
|
|
group.long 0x0C++3
|
|
line.long 0x00 "STLCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "THR,DLL/DHL"
|
|
bitfld.long 0x00 6. " SB ,Set Break" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STKYP ,Sticky Parity" "No effect,Opposite of EPS"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity Enable" "No parity,Parity"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STB ,Stop Bits" "1 stop bit,Reserved"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "7-bit,7-bit,7-bit,8-bit"
|
|
endif
|
|
if ((d.l(ad:0x40700000+0x10)&0x10)==0x10)
|
|
group.long 0x10++3
|
|
line.long 0x00 "STMCR,Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Auto-flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OUT2 ,OUT2 Signal Control" "MSR[DCD]=0,MSR[DCD]=1"
|
|
bitfld.long 0x00 2. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,Request to Send" "Non-auto-flow,Auto-flow"
|
|
bitfld.long 0x00 0. " DTR ,Data Terminal Ready" "1,0"
|
|
else
|
|
group.long 0x10++3
|
|
line.long 0x00 "STMCR,Modem Control Register"
|
|
bitfld.long 0x00 5. " AFE ,Auto-flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OUT2 ,OUT2 Signal Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RTS ,Request to Send" "Non-auto-flow,Auto-flow"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTR ,Data Terminal Ready" "1,0"
|
|
endif
|
|
rgroup.long 0x14++3
|
|
line.long 0x00 "STLSR,Line Status Register"
|
|
bitfld.long 0x00 7. " FIFOE ,FIFO Error Status" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TDRQ ,Transmit Data Request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.long 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
rgroup.long 0x18++3
|
|
line.long 0x00 "STMSR,Modem Status Register"
|
|
bitfld.long 0x00 7. " DCD ,Data Carrier Detect" "1,0"
|
|
bitfld.long 0x00 6. " RI ,Ring Indicator" "1,0"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSR ,Data Set Ready" "1,0"
|
|
bitfld.long 0x00 4. " CTS ,Clear to Send" "1,0"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DDCD ,Delta Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " TERI ,Trailing Edge Ring Indicator" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DDSR ,Delta Data Set Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " DCTS ,Delta Clear to Send" "Not cleared,Cleared"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "STSCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCRATCHPAD ,Scratchpad (no effect on UART)"
|
|
group.long 0x20++3
|
|
line.long 0x00 "STISR,Serial Infrared Select Register"
|
|
bitfld.long 0x00 4. " RXPL ,Receive Data Polarity" "Positive,Negative"
|
|
bitfld.long 0x00 3. " TXPL ,Transmit Dta Polarity" "Positive,Negative"
|
|
textline " "
|
|
bitfld.long 0x00 2. " XMODE ,Transmit Pulse Width Select" "3/16 time wide,1.6us"
|
|
bitfld.long 0x00 1. " RCVIER ,Receiver SIR Enable" "UART,IrDA"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XMITIR ,Transmitter SIR Enable" "UART,IrDA"
|
|
group.long 0x24++3
|
|
line.long 0x00 "STFOR,FIFO Occupancy Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " BYTECOUNT ,Number of bytes remaining in the receive FIFO"
|
|
group.long 0x28++3
|
|
line.long 0x00 "STABR,Autobaud Control Register"
|
|
bitfld.long 0x00 3. " ABT ,Table used to calculate baud rates" "Formula,Table"
|
|
bitfld.long 0x00 2. " ABUP ,UART Programs DLL/DLH" "Monahans,UART"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ABLIE ,Auto-baud-lock Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ABE ,Auto-baud Enable" "Disabled,Enabled"
|
|
rgroup.long 0x2C++3
|
|
line.long 0x00 "STACR,Autobaud Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNTVALUE ,Number of 14.7456 MHz clock cycles within a start-bit pulse"
|
|
tree.end
|
|
tree.end
|
|
tree "Consumer Infrared"
|
|
base ad:0x41D00000
|
|
width 0x9
|
|
group.long 0x00++3
|
|
line.long 0x00 "CIRPW,CIR Pulse Width Comparator Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " PW ,Pulse Width Comparator"
|
|
group.long 0x04++3
|
|
line.long 0x00 "CIRMP,CIR Modulation Period Comparator Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " MP ,Modulation Period Comparator"
|
|
group.long 0x08++3
|
|
line.long 0x00 "CIRN0,CIR N0 Symbol Length Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " N0S ,N0 Symbol"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "CIRN1,CIR N1 Symbol Length Register"
|
|
bitfld.long 0x00 7. " N1_Unmod ,N1 Symbol Unmodulated" "Modulated,Steady-state"
|
|
hexmask.long.byte 0x00 0.--6. 1. " N1S ,N1 Symbol"
|
|
group.long 0x10++3
|
|
line.long 0x00 "CIRS0,CIR S0 Symbol Length Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " S0S ,S0 Symbol"
|
|
group.long 0x14++3
|
|
line.long 0x00 "CIRS1,CIR S1 Symbol Length Register"
|
|
bitfld.long 0x00 7. " S1_Unmod ,S1 Symbol Unmodulated" "Modulated,Steady-state"
|
|
hexmask.long.byte 0x00 0.--6. 1. " S1S ,S1 Symbol"
|
|
group.long 0x18++3
|
|
line.long 0x00 "CIRBUFF,CIR Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " In_Symbols ,In Symbols"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "CIRNS,CIR Number of Symbols Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SYMCNT ,Symbol Count"
|
|
group.long 0x20++3
|
|
line.long 0x00 "CIRCR,CIR Control Register"
|
|
bitfld.long 0x00 5. " SW_Reset ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 4. " Manchester ,Manchester Coding Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLK_Enable ,Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CIR_Enable ,CIR Enabled" "Disabled,Enabled"
|
|
group.long 0x24++3
|
|
line.long 0x00 "CIRIR,CIR Interrupt Register"
|
|
eventfld.long 0x00 9. " EOT ,End-of-Transmission Interrupt" "Not ended,Ended"
|
|
bitfld.long 0x00 8. " EB ,Empty Buffer Interrupt" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EOT_Mask ,CIR Interrupt Assert when EOT is set" "Asserted,Not asserted"
|
|
bitfld.long 0x00 0. " EB_Mask ,CIR Interrupt Assert when EB is set" "Asserted,Not asserted"
|
|
width 0xb
|
|
tree.end
|
|
tree "Pulse-Width Modulator"
|
|
base ad:0x40B00000
|
|
width 0x9
|
|
group.long (0x0+0x0)++3
|
|
line.long 0x00 "PWMCR0,PWM 0 Control Register"
|
|
bitfld.long 0x00 6. " SD ,Pulse Width Modulator Shutdown Mode" "Graceful,Abrupt"
|
|
bitfld.long 0x00 0.--5. " PRESCALE ,Scaled counter clock frequency (PSCLK_PWM/(PRESCALE+1))" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
if (((d.l(ad:(0x40B00000+0x0+4)))&0x400)==0x400)
|
|
group.long (0x0+0x4)++3
|
|
line.long 0x00 "PWMDCR0,PWM 0 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle " "Determined by DCYCLE,Continuously asserted"
|
|
else
|
|
group.long (0x0+0x4)++3
|
|
line.long 0x00 "PWMDCR0,PWM 0 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle " "Determined by DCYCLE,Continuously asserted"
|
|
bitfld.long 0x00 9. " DCYCLE9 ,Duty Cycle of PWM_OUT9" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DCYCLE8 ,Duty Cycle of PWM_OUT8" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 7. " DCYCLE7 ,Duty Cycle of PWM_OUT7" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DCYCLE6 ,Duty Cycle of PWM_OUT6" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 5. " DCYCLE5 ,Duty Cycle of PWM_OUT5" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DCYCLE4 ,Duty Cycle of PWM_OUT4" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 3. " DCYCLE3 ,Duty Cycle of PWM_OUT3" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DCYCLE2 ,Duty Cycle of PWM_OUT2" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 1. " DCYCLE1 ,Duty Cycle of PWM_OUT1" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DCYCLE0 ,Duty Cycle of PWM_OUT0" "Continuously de-asserted,High"
|
|
endif
|
|
group.long (0x0+0x8)++3
|
|
line.long 0x00 "PWMPCR0,PWM 0 Period Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " PV ,Period Value"
|
|
group.long (0x10+0x0)++3
|
|
line.long 0x00 "PWMCR2,PWM 2 Control Register"
|
|
bitfld.long 0x00 6. " SD ,Pulse Width Modulator Shutdown Mode" "Graceful,Abrupt"
|
|
bitfld.long 0x00 0.--5. " PRESCALE ,Scaled counter clock frequency (PSCLK_PWM/(PRESCALE+1))" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
if (((d.l(ad:(0x40B00000+0x10+4)))&0x400)==0x400)
|
|
group.long (0x10+0x4)++3
|
|
line.long 0x00 "PWMDCR2,PWM 2 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle " "Determined by DCYCLE,Continuously asserted"
|
|
else
|
|
group.long (0x10+0x4)++3
|
|
line.long 0x00 "PWMDCR2,PWM 2 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle " "Determined by DCYCLE,Continuously asserted"
|
|
bitfld.long 0x00 9. " DCYCLE9 ,Duty Cycle of PWM_OUT9" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DCYCLE8 ,Duty Cycle of PWM_OUT8" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 7. " DCYCLE7 ,Duty Cycle of PWM_OUT7" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DCYCLE6 ,Duty Cycle of PWM_OUT6" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 5. " DCYCLE5 ,Duty Cycle of PWM_OUT5" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DCYCLE4 ,Duty Cycle of PWM_OUT4" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 3. " DCYCLE3 ,Duty Cycle of PWM_OUT3" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DCYCLE2 ,Duty Cycle of PWM_OUT2" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 1. " DCYCLE1 ,Duty Cycle of PWM_OUT1" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DCYCLE0 ,Duty Cycle of PWM_OUT0" "Continuously de-asserted,High"
|
|
endif
|
|
group.long (0x10+0x8)++3
|
|
line.long 0x00 "PWMPCR2,PWM 2 Period Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " PV ,Period Value"
|
|
base ad:0x40C00000
|
|
group.long (0x0+0x0)++3
|
|
line.long 0x00 "PWMCR1,PWM 1 Control Register"
|
|
bitfld.long 0x00 6. " SD ,Pulse Width Modulator Shutdown Mode" "Graceful,Abrupt"
|
|
bitfld.long 0x00 0.--5. " PRESCALE ,Scaled counter clock frequency (PSCLK_PWM/(PRESCALE+1))" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
if (((d.l(ad:(0x40C00000+0x0+4)))&0x400)==0x400)
|
|
group.long (0x0+0x4)++3
|
|
line.long 0x00 "PWMDCR1,PWM 1 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle " "Determined by DCYCLE,Continuously asserted"
|
|
else
|
|
group.long (0x0+0x4)++3
|
|
line.long 0x00 "PWMDCR1,PWM 1 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle " "Determined by DCYCLE,Continuously asserted"
|
|
bitfld.long 0x00 9. " DCYCLE9 ,Duty Cycle of PWM_OUT9" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DCYCLE8 ,Duty Cycle of PWM_OUT8" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 7. " DCYCLE7 ,Duty Cycle of PWM_OUT7" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DCYCLE6 ,Duty Cycle of PWM_OUT6" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 5. " DCYCLE5 ,Duty Cycle of PWM_OUT5" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DCYCLE4 ,Duty Cycle of PWM_OUT4" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 3. " DCYCLE3 ,Duty Cycle of PWM_OUT3" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DCYCLE2 ,Duty Cycle of PWM_OUT2" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 1. " DCYCLE1 ,Duty Cycle of PWM_OUT1" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DCYCLE0 ,Duty Cycle of PWM_OUT0" "Continuously de-asserted,High"
|
|
endif
|
|
group.long (0x0+0x8)++3
|
|
line.long 0x00 "PWMPCR1,PWM 1 Period Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " PV ,Period Value"
|
|
group.long (0x10+0x0)++3
|
|
line.long 0x00 "PWMCR3,PWM 3 Control Register"
|
|
bitfld.long 0x00 6. " SD ,Pulse Width Modulator Shutdown Mode" "Graceful,Abrupt"
|
|
bitfld.long 0x00 0.--5. " PRESCALE ,Scaled counter clock frequency (PSCLK_PWM/(PRESCALE+1))" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
if (((d.l(ad:(0x40C00000+0x10+4)))&0x400)==0x400)
|
|
group.long (0x10+0x4)++3
|
|
line.long 0x00 "PWMDCR3,PWM 3 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle " "Determined by DCYCLE,Continuously asserted"
|
|
else
|
|
group.long (0x10+0x4)++3
|
|
line.long 0x00 "PWMDCR3,PWM 3 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle " "Determined by DCYCLE,Continuously asserted"
|
|
bitfld.long 0x00 9. " DCYCLE9 ,Duty Cycle of PWM_OUT9" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DCYCLE8 ,Duty Cycle of PWM_OUT8" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 7. " DCYCLE7 ,Duty Cycle of PWM_OUT7" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DCYCLE6 ,Duty Cycle of PWM_OUT6" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 5. " DCYCLE5 ,Duty Cycle of PWM_OUT5" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DCYCLE4 ,Duty Cycle of PWM_OUT4" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 3. " DCYCLE3 ,Duty Cycle of PWM_OUT3" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DCYCLE2 ,Duty Cycle of PWM_OUT2" "Continuously de-asserted,High"
|
|
bitfld.long 0x00 1. " DCYCLE1 ,Duty Cycle of PWM_OUT1" "Continuously de-asserted,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DCYCLE0 ,Duty Cycle of PWM_OUT0" "Continuously de-asserted,High"
|
|
endif
|
|
group.long (0x10+0x8)++3
|
|
line.long 0x00 "PWMPCR3,PWM 3 Period Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " PV ,Period Value"
|
|
tree.end
|
|
tree.open "Universal Subscriber ID"
|
|
tree "USIM1"
|
|
base ad:0x41600000
|
|
width 0x7
|
|
hgroup.long 0x00++3
|
|
hide.long 0x00 "RBR,USIM Receive Buffer Register"
|
|
in
|
|
wgroup.long 0x04++3
|
|
line.long 0x00 "THR,USIM Transmit Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TB ,Data byte to be transmitted"
|
|
group.long 0x08++3
|
|
line.long 0x00 "IER,USIM Interrupt Enable Register"
|
|
bitfld.long 0x00 15. " DMA_TX ,DMA Transmitter Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " DMA_RX ,DMA Receiver Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMA_TIME ,Enable Dma Receiver Requests In Events of Time-out Situation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SmartCard_DET ,SmartCard Detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TDR ,Transmitter Data Refill Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RDR ,Receiver Data Ready Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BWT ,Block Waiting Time Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CWT ,Character Waiting Time Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMEO ,Receiver Time-Out Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FRAMERR ,Framing Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " T0ERR ,T=0 Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PERR ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OVRN ,Receiver Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "IIR,USIM Interrupt Identification Register"
|
|
eventfld.long 0x00 10. " SmartCard_DET ,SmartCard Detection" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " TDR ,Transmitter Data Refill Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RDR ,Receiver Data Ready Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " BWT ,Block Waiting Time Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 5. " CWT ,Character Waiting Time Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TIMEO ,Receiver Time-Out Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " FRAMERR ,Framing Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " T0ERR ,T=0 Error Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PERR ,Parity Error Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " OVRN ,Receiver Data Overrun Interrupt" "No interrupt,Interrupt"
|
|
wgroup.long 0x10++3
|
|
line.long 0x00 "FCR,USIM FIFO Control Register"
|
|
bitfld.long 0x00 8. " TX_TL ,Transmitter Interrupt Trigger Level" "0 byte,8 bytes"
|
|
bitfld.long 0x00 6.--7. " RX_TL ,Receiver Interrupt Trigger Level" "1 byte,4 bytes,8 bytes,12 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEM ,Parity Error Mask" "No masked,Masked"
|
|
bitfld.long 0x00 2. " TX_HOLD ,Transmit Hold" "Resumed,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RESETTF ,Reset TXFIFO" "No effect,Reset"
|
|
bitfld.long 0x00 0. " RESETRF ,Reset RXFIFO" "No effect,Reset"
|
|
rgroup.long 0x14++3
|
|
line.long 0x00 "FSR,USIM FIFO Status Register"
|
|
bitfld.long 0x00 10.--14. " PERR_NUM ,Parity Error Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. " TX_LENGTH ,TXFIFO Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " RX_LENGTH ,RXFIFO Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x18++3
|
|
line.long 0x00 "ECR,USIM Error Control Register"
|
|
eventfld.long 0x00 7. " T0_REPEAT ,Repeat Character Transmission" "Repeated,In process"
|
|
eventfld.long 0x00 6. " T0_CLR ,Clear T=0 Error" "Cleared,In process"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " PE_TL ,Parity Error Trigger Level" "Single,Two,Three,Four"
|
|
bitfld.long 0x00 0.--1. " T0ERR_TL ,T=0 Error Trigger Level" "Single,Two,Three,Four"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "LCR,USIM Line Control Register"
|
|
bitfld.long 0x00 4. " TX_T1 ,Transmitter Protocol" "T=0,T=1"
|
|
bitfld.long 0x00 3. " RX_T1 ,Receiver Protocol" "T=0,T=1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.long 0x00 1. " ORDER ,Transmit/Receive Bit Order" "LSB first,MSB first"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INVERSE ,Bit Inversion" "Direct,Inverse"
|
|
group.long 0x20++3
|
|
line.long 0x00 "USCCR,USIM SmartCard Control Register"
|
|
bitfld.long 0x00 4. " TXD_FORCE ,Force TXD" "Transmission,Forced to Vlow"
|
|
bitfld.long 0x00 1.--2. " VCC ,SmartCard Voltage" "0V,3V,1.8V,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RST_SmartCard_N ,SmartCard Reset" "Reset,Normal"
|
|
rgroup.long 0x24++3
|
|
line.long 0x00 "LSR,USIM Line Status Register"
|
|
bitfld.long 0x00 15. " RXD ,Reflects Sampled Data from U_IO Pin" "0,1"
|
|
bitfld.long 0x00 14. " RX_WORKING ,Receiver Working" "Idle,In process"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TX_WORKING ,Transmitter Working" "Idle,In process"
|
|
bitfld.long 0x00 12. " RX_EMPTY_N ,RXFIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TDR ,Transmitter Data Refill" ">=FCR[TX_TL],<FCR[TX_TL]"
|
|
bitfld.long 0x00 6. " BWT ,Block Waiting Time" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CWT ,Character Waiting Time" "No time-out,Time-out"
|
|
bitfld.long 0x00 4. " TIMEO ,Receiver Time-Out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FRAMERR ,Framing Error" "No error,Error"
|
|
bitfld.long 0x00 2. " T0ERR ,T=0 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PERR ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 0. " OVRN ,Receiver Data Overrun Error" "No error,Error"
|
|
group.long 0x28++3
|
|
line.long 0x00 "EGTR,USIM Extra Guard Time Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EGTM ,Extra Guard Time Moments"
|
|
group.long 0x2C++3
|
|
line.long 0x00 "BGTR,USIM Block Guard Time Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BGT ,Block Guard Time"
|
|
group.long 0x30++3
|
|
line.long 0x00 "TOR,USIM Time-Out Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TO ,Time Out"
|
|
group.long 0x34++3
|
|
line.long 0x00 "CLKR,USIM Clock Register"
|
|
bitfld.long 0x00 15. " STOP_CLK_USIM ,Stop USIM Controller's Clock" "Started,Stopped"
|
|
bitfld.long 0x00 14. " STOP_LEVEL ,Stop Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STOP_UCLK ,Stop Clock" "Started,Stopped"
|
|
bitfld.long 0x00 12. " RQST ,Clock Change Request" "Not requested,Requested"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIVISOR ,Clock Divisor"
|
|
group.long 0x38++3
|
|
line.long 0x00 "DLR,USIM Divisor Latch Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIVISOR ,Baud Divisor"
|
|
group.long 0x3C++3
|
|
line.long 0x00 "FLR,USIM Factor Latch Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FACTOR ,Baud Factor"
|
|
group.long 0x40++3
|
|
line.long 0x00 "CWTR,USIM Character Waiting Time Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CWT ,Character Waiting Time"
|
|
group.long 0x44++3
|
|
line.long 0x00 "BWTR,USIM Block Waiting Time Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BWT ,Block Waiting Time"
|
|
width 0xb
|
|
tree.end
|
|
tree "USIM2"
|
|
base ad:0x42100000
|
|
width 0x7
|
|
hgroup.long 0x00++3
|
|
hide.long 0x00 "RBR,USIM Receive Buffer Register"
|
|
in
|
|
wgroup.long 0x04++3
|
|
line.long 0x00 "THR,USIM Transmit Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TB ,Data byte to be transmitted"
|
|
group.long 0x08++3
|
|
line.long 0x00 "IER,USIM Interrupt Enable Register"
|
|
bitfld.long 0x00 15. " DMA_TX ,DMA Transmitter Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " DMA_RX ,DMA Receiver Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMA_TIME ,Enable Dma Receiver Requests In Events of Time-out Situation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SmartCard_DET ,SmartCard Detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TDR ,Transmitter Data Refill Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RDR ,Receiver Data Ready Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BWT ,Block Waiting Time Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CWT ,Character Waiting Time Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMEO ,Receiver Time-Out Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FRAMERR ,Framing Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " T0ERR ,T=0 Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PERR ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OVRN ,Receiver Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x0C++3
|
|
line.long 0x00 "IIR,USIM Interrupt Identification Register"
|
|
eventfld.long 0x00 10. " SmartCard_DET ,SmartCard Detection" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " TDR ,Transmitter Data Refill Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RDR ,Receiver Data Ready Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " BWT ,Block Waiting Time Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 5. " CWT ,Character Waiting Time Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TIMEO ,Receiver Time-Out Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " FRAMERR ,Framing Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " T0ERR ,T=0 Error Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PERR ,Parity Error Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " OVRN ,Receiver Data Overrun Interrupt" "No interrupt,Interrupt"
|
|
wgroup.long 0x10++3
|
|
line.long 0x00 "FCR,USIM FIFO Control Register"
|
|
bitfld.long 0x00 8. " TX_TL ,Transmitter Interrupt Trigger Level" "0 byte,8 bytes"
|
|
bitfld.long 0x00 6.--7. " RX_TL ,Receiver Interrupt Trigger Level" "1 byte,4 bytes,8 bytes,12 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEM ,Parity Error Mask" "No masked,Masked"
|
|
bitfld.long 0x00 2. " TX_HOLD ,Transmit Hold" "Resumed,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RESETTF ,Reset TXFIFO" "No effect,Reset"
|
|
bitfld.long 0x00 0. " RESETRF ,Reset RXFIFO" "No effect,Reset"
|
|
rgroup.long 0x14++3
|
|
line.long 0x00 "FSR,USIM FIFO Status Register"
|
|
bitfld.long 0x00 10.--14. " PERR_NUM ,Parity Error Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. " TX_LENGTH ,TXFIFO Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " RX_LENGTH ,RXFIFO Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x18++3
|
|
line.long 0x00 "ECR,USIM Error Control Register"
|
|
eventfld.long 0x00 7. " T0_REPEAT ,Repeat Character Transmission" "Repeated,In process"
|
|
eventfld.long 0x00 6. " T0_CLR ,Clear T=0 Error" "Cleared,In process"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " PE_TL ,Parity Error Trigger Level" "Single,Two,Three,Four"
|
|
bitfld.long 0x00 0.--1. " T0ERR_TL ,T=0 Error Trigger Level" "Single,Two,Three,Four"
|
|
group.long 0x1C++3
|
|
line.long 0x00 "LCR,USIM Line Control Register"
|
|
bitfld.long 0x00 4. " TX_T1 ,Transmitter Protocol" "T=0,T=1"
|
|
bitfld.long 0x00 3. " RX_T1 ,Receiver Protocol" "T=0,T=1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.long 0x00 1. " ORDER ,Transmit/Receive Bit Order" "LSB first,MSB first"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INVERSE ,Bit Inversion" "Direct,Inverse"
|
|
group.long 0x20++3
|
|
line.long 0x00 "USCCR,USIM SmartCard Control Register"
|
|
bitfld.long 0x00 4. " TXD_FORCE ,Force TXD" "Transmission,Forced to Vlow"
|
|
bitfld.long 0x00 1.--2. " VCC ,SmartCard Voltage" "0V,3V,1.8V,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RST_SmartCard_N ,SmartCard Reset" "Reset,Normal"
|
|
rgroup.long 0x24++3
|
|
line.long 0x00 "LSR,USIM Line Status Register"
|
|
bitfld.long 0x00 15. " RXD ,Reflects Sampled Data from U_IO Pin" "0,1"
|
|
bitfld.long 0x00 14. " RX_WORKING ,Receiver Working" "Idle,In process"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TX_WORKING ,Transmitter Working" "Idle,In process"
|
|
bitfld.long 0x00 12. " RX_EMPTY_N ,RXFIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TDR ,Transmitter Data Refill" ">=FCR[TX_TL],<FCR[TX_TL]"
|
|
bitfld.long 0x00 6. " BWT ,Block Waiting Time" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CWT ,Character Waiting Time" "No time-out,Time-out"
|
|
bitfld.long 0x00 4. " TIMEO ,Receiver Time-Out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FRAMERR ,Framing Error" "No error,Error"
|
|
bitfld.long 0x00 2. " T0ERR ,T=0 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PERR ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 0. " OVRN ,Receiver Data Overrun Error" "No error,Error"
|
|
group.long 0x28++3
|
|
line.long 0x00 "EGTR,USIM Extra Guard Time Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EGTM ,Extra Guard Time Moments"
|
|
group.long 0x2C++3
|
|
line.long 0x00 "BGTR,USIM Block Guard Time Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BGT ,Block Guard Time"
|
|
group.long 0x30++3
|
|
line.long 0x00 "TOR,USIM Time-Out Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TO ,Time Out"
|
|
group.long 0x34++3
|
|
line.long 0x00 "CLKR,USIM Clock Register"
|
|
bitfld.long 0x00 15. " STOP_CLK_USIM ,Stop USIM Controller's Clock" "Started,Stopped"
|
|
bitfld.long 0x00 14. " STOP_LEVEL ,Stop Level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STOP_UCLK ,Stop Clock" "Started,Stopped"
|
|
bitfld.long 0x00 12. " RQST ,Clock Change Request" "Not requested,Requested"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIVISOR ,Clock Divisor"
|
|
group.long 0x38++3
|
|
line.long 0x00 "DLR,USIM Divisor Latch Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIVISOR ,Baud Divisor"
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|
group.long 0x3C++3
|
|
line.long 0x00 "FLR,USIM Factor Latch Register"
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|
hexmask.long.byte 0x00 0.--7. 1. " FACTOR ,Baud Factor"
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|
group.long 0x40++3
|
|
line.long 0x00 "CWTR,USIM Character Waiting Time Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CWT ,Character Waiting Time"
|
|
group.long 0x44++3
|
|
line.long 0x00 "BWTR,USIM Block Waiting Time Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BWT ,Block Waiting Time"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Standard I2C"
|
|
base ad:0x40301680
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|
width 0x6
|
|
rgroup.long 0x00++3
|
|
line.long 0x00 "IBMR,Bus Monitor Register"
|
|
bitfld.long 0x00 1. " SCL ,Value of the SCL pin" "0,1"
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|
bitfld.long 0x00 0. " SDA ,Value of the SDA pin" "0,1"
|
|
group.long 0x08++3
|
|
line.long 0x00 "IDBR,Data Buffer Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DataBuffer ,Buffer for I2C bus send/receive data"
|
|
group.long 0x10++3
|
|
line.long 0x00 "ICR,Control Register"
|
|
bitfld.long 0x00 15. " FM ,Fast Mode" "100 kbps,400 kbps"
|
|
bitfld.long 0x00 14. " UR ,Unit Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SADIE ,Slave Address Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ALDIE ,Arbitration Loss Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SSDIE ,Slave Stop Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DRFIE ,DBR Receive Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ITEIE ,IDBR Transmit Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GCD ,General Call Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " IUE ,I2C Unit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SCLE ,SCL Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MA ,Master Abort" "Stopped if ICR[STOP] set,Stopped w/o data transmit"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TB ,Transfer Byte" "Not transfered,Transfered"
|
|
bitfld.long 0x00 2. " ACKNAK ,Positive/negative acknowledge bit" "Positive,Negative"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STOP ,Stop" "Not stopped,Stopped"
|
|
bitfld.long 0x00 0. " START ,Start" "Not started,Started"
|
|
group.long 0x18++3
|
|
line.long 0x00 "ISR,Status Register"
|
|
eventfld.long 0x00 10. " BED ,Bus Error Detected" "No error,Error"
|
|
eventfld.long 0x00 9. " SAD ,Slave Address Detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " GCAD ,General Call Address Detected " "Not detected,Detected"
|
|
eventfld.long 0x00 7. " IRF ,IDBR Receive Full" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 6. " ITE ,IDBR Transmit Empty" "Not empty,Empty"
|
|
eventfld.long 0x00 5. " ALD ,Arbitration Loss Detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SSD ,Slave Stop Detected" "Not detected,Detected"
|
|
bitfld.long 0x00 3. " IBB ,I2C Bus Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UB ,Unit Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " ACKNAK ,ACK/NACK Status" "ACK,NACK"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RWM ,Read/Write Mode" "Master-Tx/Slave-Rx,Master-Rx/Slave-Tx"
|
|
group.long 0x20++3
|
|
line.long 0x00 "ISAR,Slave Address Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SlaveAddress ,Slave Address"
|
|
width 0xb
|
|
tree.end
|
|
textline ""
|