9520 lines
587 KiB
Plaintext
9520 lines
587 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: PXA27 On-Chip Peripherals
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; @Props: Released
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; @Author: MAL
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; @Changelog: 2006-07-13 MAL
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; @Manufacturer: INTEL - Intel Corporation
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; @Doc: 280000003.pdf Intel PXA27x Processor Family 2006-01
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; @Core: Xscale
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; @Chiplist: BULVERDE, PXA270, PXA271, PXA272, PXA273
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perpxa27.per 6547 2015-11-26 09:19:35Z askoncej $
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config 16. 8.
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width 8.
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; --------------------------------------------------------------------------------
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; 80200, 80219, 80321, IXP2400, IXP2800, PXA210, PXA250, PXA800F
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tree "CP15"
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; State: ok
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; --------------------------------------------------------------------------------
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; --------------------------------------------------------------------------------
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; *** Intel 80200 ***
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; --------------------------------------------------------------------------------
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if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80200,80200"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,C-0,D-0,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel 80219 ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xfffffff0)==0x69052e20||(d.l(c15:0x0)&0xfffffff0)==0x69052e30
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 12.--15. "CoreGen ,Core Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80219 (400MHz),80219 (600MHz)"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,res,res,res,res,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel 80321 or IOP321 (Verde) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80321 (400MHz),80321 (600MHz)"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,B-0,B-1,res,res,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel 80331 or IOP331 (Dobson) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054090
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80331,80331"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-1,res,res,res,B-0,res,C-0,C-1,res,res,D-0,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel 80332 or IOP332 ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054010
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80332,80332"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-1/A-2,res,res,res,B-0,res,C-0,C-1,res,res,D-0,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel PXA210 (Sabinal), PXA250 (Cotulla) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA250,PXA210"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,B-1,B-2,C-0,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel PXA27x (Bulverde) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054110
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA27x,PXA27x"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,B-1,C-0,res,res,C-5,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel IXP2400 (Sausolito), IXP2800 (Castine) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 12.--15. "CoreGen ,Core Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
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textline " "
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bitfld.long 0x0 4.--7. "ProdNum ,Product Number" "res,res,res,res,res,res,res,res,res,IXP2400,IXP2800,res,res,res,res,res"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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; --------------------------------------------------------------------------------
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; *** Intel PXA800F (Manitoba) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA800F,PXA800F"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,res,res,res,res,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel IXP4xx, IXC1100 ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x690541f0
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "IXP4xx/IXC1100,IXP4xx/IXC1100"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,res,res,res,res,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** Intel IXP455, IXP46x ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054200
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "IXP455/IXP46x,IXP455/IXP46x"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,res,res,res,res,res,res,res,res,?..."
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; --------------------------------------------------------------------------------
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; *** other Intel XScale V5TE ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe000)==0x69052000
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..."
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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hexmask.long 0x0 4.--9. 1. "ProdNum ,Product Number"
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hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision"
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; --------------------------------------------------------------------------------
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; *** other Intel XScale V5TE ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe000)==0x69054000
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..."
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textline " "
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bitfld.long 0x0 12.--12. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
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textline " "
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hexmask.long 0x0 4.--7. 1. "ProdNum ,Product Number"
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hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision"
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; --------------------------------------------------------------------------------
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; *** any else ***
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; --------------------------------------------------------------------------------
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else
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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; 0x41 = ARM, 0x44 = Digital, 0x69 = Intel
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hexmask.long 0x0 24.--31. 1. "Implementor ,Implementation Trademark"
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hexmask.long 0x0 20.--23. 1. " Variant ,Implementation defined variant number"
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textline " "
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hexmask.long 0x0 16.--19. 1. "Architecture ,Architecture Version Code"
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hexmask.long 0x0 13.--15. 1. " Primary part number ,Core Generation"
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textline " "
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hexmask.long 0x0 0.--3. 1. "Revision ,Product Revision"
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endif
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; --------------------------------------------------------------------------------
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group c15:0x100--0x100
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line.long 0x0 "CTYPE,Cache Type Register (read only)"
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bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--20. "DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--8. "ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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group c15:0x1--0x1
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 13. "V ,Exception Vector Relocation" "0x00000000,0xffff0000"
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bitfld.long 0x0 12. " I ,Instruction Cache" "disable,enable"
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bitfld.long 0x0 11. " Z ,Branch Target Buffer" "disable,enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "off,on"
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bitfld.long 0x0 8. " S ,System Protection" "off,on"
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textline " "
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bitfld.long 0x0 7. "B ,Endianism" "little,big"
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bitfld.long 0x0 2. " C ,Data Cache" "disable,enable"
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bitfld.long 0x0 1. " A ,Alignment Fault" "disable,enable"
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bitfld.long 0x0 0. " M ,Memory Management Unit" "disable,enable"
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group c15:0x101--0x101
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line.long 0x0 "AuxCR,Auxiliary Control Register"
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bitfld.long 0x0 4.--5. "MD ,Mini Data Cache Attributes" "write back - read allocate,write back - read/write allocate,write through - read allocate,unpredictable"
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bitfld.long 0x0 1. " P ,Page Table Memory Attribute" "0,1"
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bitfld.long 0x0 0. " K ,Write Buffer Coalescing Disable" "enable,disable"
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group c15:0x2--0x2
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line.long 0x0 "TTB,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 "TTBA ,Translation Table Base Address"
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group c15:0x3--0x3
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line.long 0x0 "DAC,Domain Access Control Register"
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bitfld.long 0x0 30.--31. "D15 ,Domain Access 15" "no access,client,reserved,manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "no access,client,reserved,manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "no access,client,reserved,manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 22.--23. "D11 ,Domain Access 11" "no access,client,reserved,manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "no access,client,reserved,manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "no access,client,reserved,manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 14.--15. "D7 ,Domain Access 7" "no access,client,reserved,manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "no access,client,reserved,manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "no access,client,reserved,manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 6.--7. "D3 ,Domain Access 3" "no access,client,reserved,manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "no access,client,reserved,manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "no access,client,reserved,manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "no access,client,reserved,manager"
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group c15:0x5--0x5
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line.long 0x0 "FSR,Fault Status Register"
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bitfld.long 0x0 10. "X ,Status Field Extension" "0,1"
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bitfld.long 0x0 9. " D ,Debug event" "no,yes"
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bitfld.long 0x0 4.--7. " Domain ,Domain for Data Abort" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " Status ,Status X=0/X=1" "reserved/IMMU Exception,alignment/reserved,reserved,alignment/reserved,reserved/lock abort,transl_sect/reserved,reserved/external,transl_page,reserved/cache parity,domain_sect/reserved,reserved,domain_page,trans_lev_1/reserved,permission_sect/reserved,trans_lev_2/reserved,permission_page"
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group c15:0x6--0x6
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line.long 0x0 "FAR,Fault Address Registerr"
|
|
group c15:0x29--0x29
|
|
line.long 0x0 "DCLR, Data Cache Lock Register"
|
|
bitfld.long 0x0 0. "L ,Data Cache Lock Register" "no locking,fill with lock"
|
|
group c15:0xd--0xd
|
|
line.long 0x0 "PID,Process Identifier"
|
|
hexmask.long 0x0 25.--31. 0x2000000 "PID ,Process Identifier"
|
|
group c15:0x8e--0x8e
|
|
line.long 0x0 "IBCR0,Inctruction Breakpoint Register 0"
|
|
hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA"
|
|
bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable"
|
|
group c15:0x9e--0x9e
|
|
line.long 0x0 "IBCR1,Inctruction Breakpoint Register 1"
|
|
hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA"
|
|
bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable"
|
|
group c15:0x0e--0x0e
|
|
line.long 0x0 "DBR0,Data Breakpoint Register 0"
|
|
group c15:0x3e--0x3e
|
|
line.long 0x0 "DBR1,Data Breakpoint Register 1"
|
|
group c15:0x4e--0x4e
|
|
line.long 0x0 "DBCON,Data Breakpoint Configuration Register"
|
|
bitfld.long 0x0 8. "M ,DBR1 Mode" "Data Breakpoint Address,Data Address Mask"
|
|
bitfld.long 0x0 2.--3. " E1 ,DBR1 Breakpoint Enable" "disable,enable store,enable load/store,enable load"
|
|
bitfld.long 0x0 0.--1. " E0 ,DBR0 Enable" "disable,enable store,enable load/store,enable load"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80200 ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80219 ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xfffffff0)==0x69052e20||(d.l(c15:0x0)&0xffffe3f0)==0x69052e30
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 7. " CP7 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 6. " CP6 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80321 (IOP321) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 7. " CP7 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 6. " CP6 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel PXA210, PXA250 (Sabinal, Cotulla) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel PXA27x (Bulverde) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054110
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 1. "CP1 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel (Manitoba) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel IXP2400, IXP2800 (Sausolito, Castine) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffff41a0)==0x69052120
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; *** includes XScale IXP425, because no product ID is available now ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69054000
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69052000
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** any else ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; 80200, PXA210, PXA250
|
|
; not impl.: 80321, IXP425, IXP2400, IXP2800, Bulverde, Manitoba
|
|
tree "CP14"
|
|
; State: preliminary
|
|
; --------------------------------------------------------------------------------
|
|
group c14:0x00--0x03 "Performance Monitoring"
|
|
line.long 4.*0x00 "PMNC, Performance Monitor control Register"
|
|
bitfld.long 4.*0x00 20.--27. "EvtCnt1 ,Source of Events that PMN1 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..."
|
|
bitfld.long 4.*0x00 12.--19. " EvtCnt0 ,Source of Events that PMN0 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..."
|
|
textline " "
|
|
bitfld.long 4.*0x00 10. "CCNT-OV ,Clock Counter Overflow Flag" "no,yes"
|
|
bitfld.long 4.*0x00 9. " PMN1-OV ,Performace Counter 1 Overflow Flag" "no,yes"
|
|
bitfld.long 4.*0x00 8. " PMN0-OV ,Performace Counter 0 Overflow Flag" "no,yes"
|
|
textline " "
|
|
bitfld.long 4.*0x00 6. "CCNT-IE ,Clock Counter Interrupt" "disable,enable"
|
|
bitfld.long 4.*0x00 5. " PMN1-IE ,Performace Counter 1 Interrupt" "disable,enable"
|
|
bitfld.long 4.*0x00 4. " PMN0-IE ,Performace Counter 0 Interrupt" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4.*0x00 3. "D ,Clock Count Divider" "1,64"
|
|
bitfld.long 4.*0x00 2. " C ,Clock Counter Reset" "no action,reset to 0"
|
|
bitfld.long 4.*0x00 1. " P ,Performace Counter Reset (both)" "no action,reset to 0"
|
|
bitfld.long 4.*0x00 0. " E ,Enable all 3 Counters" "disable,enable"
|
|
line.long 4.*0x01 "CCNT, 32-bit clock counter"
|
|
line.long 4.*0x02 "PMN0, 32-bit event counter"
|
|
line.long 4.*0x03 "PMN1, 32-bit event counter"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80200 ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 4.*0x00 0.--3. "CCLKCFG ,Core Clock Configuration" "res,3,4,5,6,7,8,9,res,?..."
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,IDLE,res,SLEEP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80321 or IOP321 (Verde) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel PXA210, PXA250 (Sabinal, Cotulla) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 4.*0x00 1.--1. "FCS ,Frequency Change Sequence" "do not enter,enter"
|
|
bitfld.long 4.*0x00 0.--0. " TURBO ,Turbo Mode" "exit,enter"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "Run/Turbo,Idle,res,Sleep/Deep Sleep"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel (Bulverde) ***
|
|
; --------------------------------------------------------------------------------
|
|
; wrong Product ID in developer's manual revision 0.1 (ID of PXA250!!!)
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel IXP2400, IXP2800 (Sausolito, Castine) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel (Manitoba) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69052000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; *** includes XScale IXP425 ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69054000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** any other XScale ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4.*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
endif
|
|
group c14:0x08--0x0d "Software Debug"
|
|
line.long 4.*0x02 "DCSR,Debug Control and Status Register"
|
|
bitfld.long 4.*0x02 31. "GE ,Global Enable" "disable,enable"
|
|
bitfld.long 4.*0x02 30. " H ,Halt Mode" "Monitor Mode,Halt Mode"
|
|
textline " "
|
|
bitfld.long 4.*0x02 23. "TF ,Trap FIQ" "disable,enable"
|
|
bitfld.long 4.*0x02 22. " TI ,Trap IRQ" "disable,enable"
|
|
bitfld.long 4.*0x02 20. " TD ,Trap Data Abort" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4.*0x02 19. "TA ,Trap Prefetch Abort" "disable,enable"
|
|
bitfld.long 4.*0x02 18. " TS ,Trap Software Interrupt" "disable,enable"
|
|
bitfld.long 4.*0x02 17. " TU ,Trap Undefined Instruction" "disable,enable"
|
|
bitfld.long 4.*0x02 16. " TR ,Trap Reset" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4.*0x02 5. "SA ,Sticky Abort" "no,yes"
|
|
bitfld.long 4.*0x02 2.--4. " MOE ,Method of Entry" "Reset,Inst Bkpt, Data Bkpt, BKPT Inst, Ext Debug Event, Vector Trap, Trace Buffer full, reserved"
|
|
bitfld.long 4.*0x02 1. " M ,Trace Buffer Mode" "wrap around,fill-once"
|
|
bitfld.long 4.*0x02 0. " E ,Trace Buffer Enable" "no,yes"
|
|
line.long 4.*0x04 "CHKPT0,Checkpoint 0 Register"
|
|
line.long 4.*0x05 "CHKPT1,Checkpoint 1 Register"
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; Wireless MMX registers
|
|
; --------------------------------------------------------------------------------
|
|
tree "Wireless MMX"
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(c1:0x0)&0xffff0f00)==0x69050000
|
|
group c1:0x0--0x0
|
|
line.long 0x0 "wCID,Coprocessor ID, Revision, Status"
|
|
bitfld.long 0x0 24.--24. "Vendor ,Vendor ID" "Intel,Intel"
|
|
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
|
|
textline " "
|
|
bitfld.long 0x0 12.--15. "CPTyp ,Coprocessor Type" "res,Wireless MMX,Wireless MMX2,res,res,res,res,res,res,?..."
|
|
bitfld.long 0x0 04.--07. " Major ,Major Revision Number" "0,1,2,3,4,5,6,7,8,910,11,12,13,14,15,%d..."
|
|
bitfld.long 0x0 00.--03. " Minor ,Minor Revision Number" "0,1,2,3,4,5,6,7,8,910,11,12,13,14,15,%d..."
|
|
; --------------------------------------------------------------------------------
|
|
; *** any else ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group c1:0x0--0x0
|
|
line.long 0x0 "wCID,Coprocessor ID, Revision, Status"
|
|
hexmask.long 0x0 24.--31. 1. "Vendor ,Vendor ID"
|
|
hexmask.long 0x0 16.--23. 1. " Arch ,Architecture Version"
|
|
textline " "
|
|
hexmask.long 0x0 08.--15. 1. "CPTyp ,Coprocessor Type"
|
|
bitfld.long 0x0 04.--07. " Major ,Major Revision Number" "0,1,2,3,4,5,6,7,8,910,11,12,13,14,15,%d..."
|
|
bitfld.long 0x0 00.--03. " Minor ,Minor Revision Number" "0,1,2,3,4,5,6,7,8,910,11,12,13,14,15,%d..."
|
|
endif
|
|
; --------------------------------------------------------------------------------
|
|
group c1:0x1--0x1
|
|
line.long 0x0 "wCON,Coprocessor Control Register"
|
|
bitfld.long 0x0 01.--01. "MUP ,One of main registers wRn has been updated" "no,yes"
|
|
bitfld.long 0x0 00.--00. " CUP ,One of control registers wCx has been updated" "no,yes"
|
|
group c1:0x2--0x2
|
|
line.long 0x0 "wCSSF,Saturation SIMD Flags"
|
|
bitfld.long 0x0 7. "B7 ,Saturation flag for Byte 7 or Half Word 3 or Word 1 or Double Word 0" "no,yes"
|
|
bitfld.long 0x0 6. " B6 ,Saturation flag for Byte 6" "no,yes"
|
|
bitfld.long 0x0 5. " B5 ,Saturation flag for Byte 5 or Half Word 2" "no,yes"
|
|
bitfld.long 0x0 4. " B4 ,Saturation flag for Byte 4" "no,yes"
|
|
bitfld.long 0x0 3. " B3 ,Saturation flag for Byte 3 or Half Word 1 or Word 0" "no,yes"
|
|
bitfld.long 0x0 2. " B2 ,Saturation flag for Byte 2" "no,yes"
|
|
bitfld.long 0x0 1. " B1 ,Saturation flag for Byte 1 or Half Word 0" "no,yes"
|
|
bitfld.long 0x0 0. " B0 ,Saturation flag for Byte 0" "no,yes"
|
|
group c1:0x3--0x3
|
|
line.long 0x0 "wCASF,Arithmetic SIMD Flags"
|
|
bitfld.long 0x0 31. "SIMD8/16/32/64 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 30. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 29. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 28. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 27. "SIMD8 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 26. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 25. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 24. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 23. "SIMD8/16 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 22. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 21. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 20. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 19. "SIMD8 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 18. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 17. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 16. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 15. "SIMD8/16/32 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 14. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 13. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 12. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 11. "SIMD8 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 10. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 9. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 8. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 7. "SIMD8/16 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 6. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 5. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 4. " ,Result in this byte field oVerflowed" "-,V"
|
|
textline " "
|
|
bitfld.long 0x0 3. "SIMD8 ,Result in this byte field was Negative" "-,N"
|
|
bitfld.long 0x0 2. " ,Result in this byte field was Zero" "-,Z"
|
|
bitfld.long 0x0 1. " ,Result in this byte field has a Carry out" "-,C"
|
|
bitfld.long 0x0 0. " ,Result in this byte field oVerflowed" "-,V"
|
|
group c1:0x4--0x4
|
|
line.long 0x0 "wCGR0 ,General Purpose register 0"
|
|
group c1:0x5--0x5
|
|
line.long 0x0 "wCGR1 ,General Purpose register 1"
|
|
group c1:0x6--0x6
|
|
line.long 0x0 "wCGR2 ,General Purpose register 2"
|
|
group c1:0x7--0x7
|
|
line.long 0x0 "wCGR3 ,General Purpose register 3"
|
|
group c0:0x00--0x1f
|
|
line.quad 4.*0x00 "wR0 ,SIMD Data Register 0"
|
|
line.quad 4.*0x02 "wR1 ,SIMD Data Register 1"
|
|
line.quad 4.*0x04 "wR2 ,SIMD Data Register 2"
|
|
line.quad 4.*0x06 "wR3 ,SIMD Data Register 3"
|
|
line.quad 4.*0x08 "wR4 ,SIMD Data Register 4"
|
|
line.quad 4.*0x0a "wR5 ,SIMD Data Register 5"
|
|
line.quad 4.*0x0c "wR6 ,SIMD Data Register 6"
|
|
line.quad 4.*0x0e "wR7 ,SIMD Data Register 7"
|
|
line.quad 4.*0x10 "wR8 ,SIMD Data Register 8"
|
|
line.quad 4.*0x12 "wR9 ,SIMD Data Register 9"
|
|
line.quad 4.*0x14 "wR10 ,SIMD Data Register 10"
|
|
line.quad 4.*0x16 "wR11 ,SIMD Data Register 11"
|
|
line.quad 4.*0x18 "wR12 ,SIMD Data Register 12"
|
|
line.quad 4.*0x1a "wR13 ,SIMD Data Register 13"
|
|
line.quad 4.*0x1c "wR14 ,SIMD Data Register 14"
|
|
line.quad 4.*0x1e "wR15 ,SIMD Data Register 15"
|
|
tree.end
|
|
tree.open "Clocks and Power Manager"
|
|
base asd:0x40F00000
|
|
; --------------------------------------------------------------------------------
|
|
; PXA210, PXA250,PXA255,PXA26x,PXA27x
|
|
; State: ok
|
|
; --------------------------------------------------------------------------------
|
|
tree "Power Manager and Reset Control"
|
|
; --------------------------------------------------------------------------------
|
|
width 8.
|
|
group 0x00++0x03
|
|
line.long 0x00 "PMCR,Power Manager Control Register"
|
|
bitfld.long 0x00 5. " INTRS ,Interrupt Status" "noInt,int"
|
|
bitfld.long 0x00 4. " IAS ,Interrupt/Abort Select" "abort,int"
|
|
bitfld.long 0x00 3. " VIDAS ,Imprecise-Data-Abort Status for nVDD_FAULT" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " VIDAE ,Imprecise-Data-Abort Enable for nVDD_FAULT" "dis,ena"
|
|
bitfld.long 0x00 1. " BIDAS ,Imprecise-Data Abort Status for nBATT_FAULT" "no,yes"
|
|
bitfld.long 0x00 0. " BIDAE ,Imprecise-Data Abort Enable for nBATT_FAULT" "dis,ena"
|
|
group 0x04++0x03
|
|
line.long 0x00 "PSSR,Power Manager Sleep Status Register"
|
|
eventfld.long 0x00 6. " OTGPH ,OTG Peripheral Control Hold" "no,yes"
|
|
eventfld.long 0x00 5. " RDH ,Read Disable Hold" "no,yes"
|
|
eventfld.long 0x00 4. " PH ,Peripheral Control Hold" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STS ,Standby Mode Status" "no,yes"
|
|
eventfld.long 0x00 2. " VFS ,VDD Fault Status" "no,yes"
|
|
eventfld.long 0x00 1. " BFS ,Battery Fault Status" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 0. " SSS ,Software Sleep Status" "no,yes"
|
|
group 0x08++0x03
|
|
line.long 0x00 "PSPR,Power Manager Sratch Pad Register"
|
|
bitfld.long 0x00 31. " SP31 ,Scratch Pad Register bit 31" "0,1"
|
|
bitfld.long 0x00 30. " SP30 ,Scratch Pad Register bit 30" "0,1"
|
|
bitfld.long 0x00 29. " SP29 ,Scratch Pad Register bit 29" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SP28 ,Scratch Pad Register bit 28" "0,1"
|
|
bitfld.long 0x00 27. " SP27 ,Scratch Pad Register bit 27" "0,1"
|
|
bitfld.long 0x00 26. " SP26 ,Scratch Pad Register bit 26" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SP25 ,Scratch Pad Register bit 25" "0,1"
|
|
bitfld.long 0x00 24. " SP24 ,Scratch Pad Register bit 24" "0,1"
|
|
bitfld.long 0x00 23. " SP23 ,Scratch Pad Register bit 23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SP22 ,Scratch Pad Register bit 22" "0,1"
|
|
bitfld.long 0x00 21. " SP21 ,Scratch Pad Register bit 21" "0,1"
|
|
bitfld.long 0x00 20. " SP20 ,Scratch Pad Register bit 20" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SP19 ,Scratch Pad Register bit 19" "0,1"
|
|
bitfld.long 0x00 18. " SP18 ,Scratch Pad Register bit 18" "0,1"
|
|
bitfld.long 0x00 17. " SP17 ,Scratch Pad Register bit 17" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SP16 ,Scratch Pad Register bit 16" "0,1"
|
|
bitfld.long 0x00 15. " SP15 ,Scratch Pad Register bit 15" "0,1"
|
|
bitfld.long 0x00 14. " SP14 ,Scratch Pad Register bit 14" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SP13 ,Scratch Pad Register bit 13" "0,1"
|
|
bitfld.long 0x00 12. " SP12 ,Scratch Pad Register bit 12" "0,1"
|
|
bitfld.long 0x00 11. " SP11 ,Scratch Pad Register bit 11" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SP10 ,Scratch Pad Register bit 10" "0,1"
|
|
bitfld.long 0x00 9. " SP9 ,Scratch Pad Register bit 9" "0,1"
|
|
bitfld.long 0x00 8. " SP8 ,Scratch Pad Register bit 8" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SP7 ,Scratch Pad Register bit 7" "0,1"
|
|
bitfld.long 0x00 6. " SP6 ,Scratch Pad Register bit 6" "0,1"
|
|
bitfld.long 0x00 5. " SP5 ,Scratch Pad Register bit 5" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SP4 ,Scratch Pad Register bit 4" "0,1"
|
|
bitfld.long 0x00 3. " SP3 ,Scratch Pad Register bit 3" "0,1"
|
|
bitfld.long 0x00 2. " SP2 ,Scratch Pad Register bit 2" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SP1 ,Scratch Pad Register bit 1" "0,1"
|
|
bitfld.long 0x00 0. " SP0 ,Scratch Pad Register bit 0" "0,1"
|
|
group 0x0c++0x03
|
|
line.long 0x00 "PWER,Power Manager Wake-Up Enable Register"
|
|
bitfld.long 0x00 31. " WERTC ,Wake-up Enable for RTC Standby/Sleep/Deep-Sleep Mode" "dis,ena"
|
|
bitfld.long 0x00 30. " WEP1 ,Wake-up Enable for PI Power Domain Standby or Sleep Mode" "dis,ena"
|
|
bitfld.long 0x00 28. " WEUSBH2 ,Wake-up Enable for USB Host Port 2 Standby or Sleep Mode" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 27. " WEUSBH1 ,Wake-up Enable for USB Host Port 1 Standby or Sleep Mode" "dis,ena"
|
|
bitfld.long 0x00 26. " WEUSBC ,Wake-up Enable for USB Client Port Standby or Sleep Mode" "dis,ena"
|
|
bitfld.long 0x00 25. " WBB ,Wake-up Enable for a Rising Edge from MSL (GPIO<83>) for Standby or Sleep Mode" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 24. " WE35 ,Wake-up Enable for Standby or Sleep Mode" "dis,ena"
|
|
bitfld.long 0x00 23. " WEUSIM ,Wake-up Enable for Rising or Falling Edge from UDET (GPIO<116>) for Standby or Sleep Mode" "dis,ena"
|
|
bitfld.long 0x00 19.--20. " WEMUX3 ,Wake-up Enable for GPIO<31> or GPIO<113> for Standby and Sleep Modes" "dis,GPIO31,GPIO113,res"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " WEMUX2 ,Wake-up Enable for GPIO<36>/ GPIO<38>/ GPIO<40>/ GPIO<53> for Standby and Sleep Modes" "dis,res,GPIO<38>,GPIO<53>,GPIO<40>,GPIO<36>,res,res"
|
|
bitfld.long 0x00 15. " WE15 ,Wake-Up due to GP15 edge detect" "dis,ena"
|
|
bitfld.long 0x00 14. " WE14 ,Wake-Up due to GP14 edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 13. " WE13 ,Wake-Up due to GP13 edge detect" "dis,ena"
|
|
bitfld.long 0x00 12. " WE12 ,Wake-Up due to GP12 edge detect" "dis,ena"
|
|
bitfld.long 0x00 11. " WE11 ,Wake-Up due to GP11 edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WE10 ,Wake-Up due to GP10 edge detect" "dis,ena"
|
|
bitfld.long 0x00 9. " WE9 ,Wake-Up due to GP9 edge detect" "dis,ena"
|
|
bitfld.long 0x00 4. " WE4 ,Wake-Up due to GP4 edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WE3 ,Wake-Up due to GP3 edge detect" "dis,ena"
|
|
bitfld.long 0x00 1. " WE1 ,Wake-Up due to GP1 edge detect" "dis,ena"
|
|
bitfld.long 0x00 0. " WE0 ,Wake-Up due to GP0 edge detect" "dis,ena"
|
|
group 0x10++0x03
|
|
line.long 0x00 "PRER,Power Manager GPIO Rising-Edge Detect Enable Register"
|
|
bitfld.long 0x00 24. " RE35 ,Standby or Sleep-mode Rising-Edge Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 15. " RE15 ,Wake-Up due to GP15 rising-edge detect" "dis,ena"
|
|
bitfld.long 0x00 14. " RE14 ,Wake-Up due to GP14 rising-edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RE13 ,Wake-Up due to GP13 rising-edge detect" "dis,ena"
|
|
bitfld.long 0x00 12. " RE12 ,Wake-Up due to GP12 rising-edge detect" "dis,ena"
|
|
bitfld.long 0x00 11. " RE11 ,Wake-Up due to GP11 rising-edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RE10 ,Wake-Up due to GP10 rising-edge detect" "dis,ena"
|
|
bitfld.long 0x00 9. " RE9 ,Wake-Up due to GP9 rising-edge detect" "dis,ena"
|
|
bitfld.long 0x00 4. " RE4 ,Wake-Up due to GP4 rising-edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RE3 ,Wake-Up due to GP3 rising-edge detect" "dis,ena"
|
|
bitfld.long 0x00 1. " RE1 ,Wake-Up due to GP1 rising-edge detect" "dis,ena"
|
|
bitfld.long 0x00 0. " RE0 ,Wake-Up due to GP0 rising-edge detect" "dis,ena"
|
|
group 0x14++0x03
|
|
line.long 0x00 "PFER,Power Manager GPIO Falling-Edge Detect Enable Register"
|
|
bitfld.long 0x00 24. " RE35 ,Standby or Sleep Mode Falling-Edge Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 15. " FE15 ,Wake-Up due to GP15 falling-edge detect" "dis,ena"
|
|
bitfld.long 0x00 14. " FE14 ,Wake-Up due to GP14 falling-edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FE13 ,Wake-Up due to GP13 falling-edge detect" "dis,ena"
|
|
bitfld.long 0x00 12. " FE12 ,Wake-Up due to GP12 falling-edge detect" "dis,ena"
|
|
bitfld.long 0x00 11. " FE11 ,Wake-Up due to GP11 falling-edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FE10 ,Wake-Up due to GP10 falling-edge detect" "dis,ena"
|
|
bitfld.long 0x00 9. " FE9 ,Wake-Up due to GP9 falling-edge detect" "dis,ena"
|
|
bitfld.long 0x00 4. " FE4 ,Wake-Up due to GP4 falling-edge detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE3 ,Wake-Up due to GP3 falling-edge detect" "dis,ena"
|
|
bitfld.long 0x00 1. " FE1 ,Wake-Up due to GP1 falling-edge detect" "dis,ena"
|
|
bitfld.long 0x00 0. " FE0 ,Wake-Up due to GP0 falling-edge detect" "dis,ena"
|
|
group 0x18++0x03
|
|
line.long 0x00 "PEDR,Power Manager GPIO Edge Detect Status Register"
|
|
bitfld.long 0x00 31. " EDRTC ,Standby/Sleep or Deep-Sleep Wake-Up from RTC" "no,yes"
|
|
bitfld.long 0x00 30. " EDP1 ,Standby or Sleep Wake-Up from PI Power Domain" "no,yes"
|
|
bitfld.long 0x00 28. " EDUSBH2 ,Standby or Sleep Wake-Up from USB Host Port 2" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDUSBH1 ,Standby or Sleep Wake-Up from USB Host Port 1" "no,yes"
|
|
bitfld.long 0x00 26. " EDUSBC ,Standby or Sleep Wake-Up from USB Client" "no,yes"
|
|
bitfld.long 0x00 25. " EDBB ,Standby or Sleep Wake-Up from MSL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ED35 ,GPIO<35> Standby or Sleep Edge Detect Status" "no,yes"
|
|
bitfld.long 0x00 20. " EDMUX3 ,Standby or Sleep Edge on GPIO<n> Detect Status where n is value programmed in PWER[WEMUX3]" "no,yes"
|
|
bitfld.long 0x00 17. " EDMUX2 ,Standby or Sleep Edge on GPIO<n> Detect Status where n is value programmed in PWER[WEMUX2]" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ED15 ,Wake-Up due to GP15 edge detected" "no,yes"
|
|
bitfld.long 0x00 14. " ED14 ,Wake-Up due to GP14 edge detected" "no,yes"
|
|
bitfld.long 0x00 13. " ED13 ,Wake-Up due to GP13 edge detected" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ED12 ,Wake-Up due to GP12 edge detected" "no,yes"
|
|
bitfld.long 0x00 11. " ED11 ,Wake-Up due to GP11 edge detected" "no,yes"
|
|
bitfld.long 0x00 10. " ED10 ,Wake-Up due to GP10 edge detected" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ED9 ,Wake-Up due to GP9 edge detected" "no,yes"
|
|
bitfld.long 0x00 4. " ED4 ,Wake-Up due to GP4 edge detected" "no,yes"
|
|
bitfld.long 0x00 3. " ED3 ,Wake-Up due to GP3 edge detected" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ED1 ,Wake-Up due to GP1 edge detected" "no,yes"
|
|
bitfld.long 0x00 0. " ED0 ,Wake-Up due to GP0 edge detected" "no,yes"
|
|
group 0x1c++0x03
|
|
line.long 0x00 "PCFR,Power Manager General Configuration Register"
|
|
bitfld.long 0x00 15. " RO ,RDH Override" "dis,ena"
|
|
bitfld.long 0x00 14. " PO ,PH Override" "no,yes"
|
|
bitfld.long 0x00 12. " GPROD ,GPIO nRESET_OUT Disable" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 11. " L1_EN ,Sleep Mode Sleep/Deep-Sleep Linear Regulator Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " FVC ,Frequency/Voltage Change" "no,yes"
|
|
bitfld.long 0x00 7. " DC_EN ,Sleep/Deep-Sleep DC-DC Converter Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PI2C_EN ,Power Manager I2C Enable" "dis,ena"
|
|
bitfld.long 0x00 4. " GPR_EN ,nRESET_GPIO Pin Enable" "dis,ena"
|
|
bitfld.long 0x00 2. " FS ,Float Static Chip Selects (nCS<5:1>) During Sleep Mode" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP ,Float PC Card Pins During Sleep or Deep-Sleep Mode" "no,yes"
|
|
bitfld.long 0x00 0. " OPDE ,13-MHz Processor Oscillator Power-Down Enable" "dis,ena"
|
|
group 0x20++0x0f
|
|
line.long 0x00 "PGSR0,Power Manager GPIO Sleep State Register for GP[31-0]"
|
|
bitfld.long 0x00 31. " SS31 ,GP31 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 30. " SS30 ,GP30 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 29. " SS29 ,GP29 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SS28 ,GP28 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 27. " SS27 ,GP27 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 26. " SS26 ,GP26 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SS25 ,GP25 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 24. " SS24 ,GP24 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 23. " SS23 ,GP23 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SS22 ,GP22 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 21. " SS21 ,GP21 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 20. " SS20 ,GP20 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SS19 ,GP19 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 18. " SS18 ,GP18 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 17. " SS17 ,GP17 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SS16 ,GP16 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 15. " SS15 ,GP15 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 14. " SS14 ,GP14 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SS13 ,GP13 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 12. " SS12 ,GP12 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 11. " SS11 ,GP11 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SS10 ,GP10 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 9. " SS9 ,GP9 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 8. " SS8 ,GP8 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SS7 ,GP7 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 6. " SS6 ,GP6 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 5. " SS5 ,GP5 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SS4 ,GP4 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 3. " SS3 ,GP3 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 2. " SS2 ,GP2 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SS1 ,GP1 in Sleep Mode" "0,1"
|
|
bitfld.long 0x00 0. " SS0 ,GP0 in Sleep Mode" "0,1"
|
|
line.long 0x04 "PGSR1,Power Manager GPIO Sleep State Register for GP[63-32]"
|
|
bitfld.long 0x04 31. " SS63 ,GP63 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 30. " SS62 ,GP62 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 29. " SS61 ,GP61 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SS60 ,GP60 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 27. " SS59 ,GP59 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 26. " SS58 ,GP58 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SS57 ,GP57 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 24. " SS56 ,GP56 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 23. " SS55 ,GP55 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SS54 ,GP54 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 21. " SS53 ,GP53 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 20. " SS52 ,GP52 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SS51 ,GP51 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 18. " SS50 ,GP50 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 17. " SS49 ,GP49 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SS48 ,GP48 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 15. " SS47 ,GP47 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 14. " SS46 ,GP46 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SS45 ,GP45 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 12. " SS44 ,GP44 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 11. " SS43 ,GP43 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SS42 ,GP42 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 9. " SS41 ,GP41 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 8. " SS40 ,GP40 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SS39 ,GP39 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 6. " SS38 ,GP38 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 5. " SS37 ,GP37 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SS36 ,GP36 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 3. " SS35 ,GP35 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 2. " SS34 ,GP34 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SS33 ,GP33 in Sleep Mode" "0,1"
|
|
bitfld.long 0x04 0. " SS32 ,GP41 in Sleep Mode" "0,1"
|
|
line.long 0x08 "PGSR2,Power Manager GPIO Sleep State Register for GP[95-64]"
|
|
bitfld.long 0x08 31. " SS95 ,GP95 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 30. " SS94 ,GP94 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 29. " SS93 ,GP93 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SS92 ,GP92 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 27. " SS91 ,GP91 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 26. " SS90 ,GP90 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SS89 ,GP89 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 24. " SS88 ,GP88 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 23. " SS87 ,GP87 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SS86 ,GP86 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 21. " SS85 ,GP85 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 20. " SS84 ,GP84 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SS83 ,GP83 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 18. " SS82 ,GP82 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 17. " SS81 ,GP81 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SS80 ,GP80 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 15. " SS79 ,GP79 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 14. " SS78 ,GP78 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SS77 ,GP77 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 12. " SS76 ,GP76 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 11. " SS75 ,GP75 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SS74 ,GP74 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 9. " SS73 ,GP73 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 8. " SS72 ,GP72 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SS71 ,GP71 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 6. " SS70 ,GP70 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 5. " SS69 ,GP69 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SS68 ,GP68 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 3. " SS67 ,GP67 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 2. " SS66 ,GP66 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SS65 ,GP65 in Sleep Mode" "0,1"
|
|
bitfld.long 0x08 0. " SS64 ,GP64 in Sleep Mode" "0,1"
|
|
line.long 0x0c "PGSR3,Power Manager GPIO Sleep State Register for GP[96-120]"
|
|
bitfld.long 0x0c 24. " SS120 ,GP120 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 23. " SS119 ,GP119 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 22. " SS118 ,GP118 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 21. " SS117 ,GP117 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 20. " SS116 ,GP116 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 19. " SS115 ,GP115 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 18. " SS114 ,GP114 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 17. " SS113 ,GP113 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 16. " SS112 ,GP112 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 15. " SS111 ,GP111 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 14. " SS110 ,GP110 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 13. " SS109 ,GP109 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 12. " SS108 ,GP108 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 11. " SS107 ,GP107 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 10. " SS106 ,GP106 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " SS105 ,GP105 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 8. " SS104 ,GP104 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 7. " SS103 ,GP103 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 6. " SS102 ,GP102 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 5. " SS101 ,GP101 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 4. " SS100 ,GP100 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 3. " SS99 ,GP99 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 2. " SS98 ,GP98 in Sleep Mode" "0,1"
|
|
bitfld.long 0x0c 1. " SS97 ,GP97 in Sleep Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " SS96 ,GP96 in Sleep Mode" "0,1"
|
|
group 0x30++0x03
|
|
line.long 0x00 "RCSR,Reset Controller Status Register"
|
|
eventfld.long 0x00 3. " GPR ,GPIO Reset" "No reset,Reset"
|
|
eventfld.long 0x00 2. " SMR ,Sleep-Exit Reset" "No reset,Reset"
|
|
eventfld.long 0x00 1. " WDR ,Watchdog Reset" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 0. " HWR ,Hardware/Power-On Reset" "No reset,Reset"
|
|
group 0x34++0x03
|
|
line.long 0x00 "PSLR,Power Manager Sleep Configuration Register"
|
|
bitfld.long 0x00 28.--31. " SYS_DEL ,External High-Voltage Power Domains Ramp Delay(2 pow n)" "SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,SYS_DEL,12,12,12"
|
|
bitfld.long 0x00 24.--27. " PWR_DEL ,External Low-Voltage Power Domains Ramp Delay(2 pow n)" "PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,PWR_DEL,12,12,12"
|
|
bitfld.long 0x00 23. " PSSD ,Sleep-Mode Shorten Wake-up Delay Disable" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IVF ,Ignore nVDD_FAULT in Sleep Mode and Deep-Sleep Mode" "no,yes"
|
|
bitfld.long 0x00 20. " SL_ROD ,Sleep-Mode/Deep-Sleep Mode nRESET_OUT Disable" "ena,dis"
|
|
bitfld.long 0x00 11. " SL_R3 ,Sleep Mode Unit Retention-Internal SRAM Bank 3" "pwrOff,retain"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SL_R2 ,Sleep Mode Unit Retention-Internal SRAM Bank 2" "pwrOff,retain"
|
|
bitfld.long 0x00 9. " SL_R1 ,Sleep Mode Unit Retention-Internal SRAM Bank 1" "pwrOff,retain"
|
|
bitfld.long 0x00 8. " SL_R0 ,Sleep Mode Unit Retention-Internal SRAM Bank 0" "pwrOff,retain"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " SL_PI ,Sleep or Deep-sleep Mode Unit Retention-PI Power Domain" "pwrOff,retain,active/-,res"
|
|
group 0x38++0x03
|
|
line.long 0x00 "PSTR,Power Manager Standby Configuration Register"
|
|
bitfld.long 0x00 11. " ST_R3 ,Standby-Mode Retain State-Internal SRAM Bank 3" "pwrOff,retain"
|
|
bitfld.long 0x00 10. " ST_R2 ,Standby-Mode Retain State-Internal SRAM Bank 2" "pwrOff,retain"
|
|
bitfld.long 0x00 9. " ST_R1 ,Standby-Mode Retain State-Internal SRAM Bank 1" "pwrOff,retain"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ST_R0 ,Standby-Mode Retain State-Internal SRAM Bank 0" "pwrOff,retain"
|
|
bitfld.long 0x00 2.--3. " ST_PI ,Standby-Mode Retain State-PI Power Domain" "pwrOff,retain,active,res"
|
|
group 0x40++0x03
|
|
line.long 0x00 "PVCR,Power Manager Voltage Change Control Register"
|
|
hexmask.long.byte 0x00 20.--24. 1. " RP ,Read Pointer-A programmed value of N indicates that the voltage-change sequencer is pointing to register PCMD[N]"
|
|
bitfld.long 0x00 14. " VCSA ,Voltage-Change Sequencer Active" "no,yes"
|
|
hexmask.long.byte 0x00 7.--11. 1. " CD ,Command Delay"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " SA ,Slave Address"
|
|
group 0x4c++0x03
|
|
line.long 0x00 "PUCR,Power Manager USIM Card Control/Status Register"
|
|
bitfld.long 0x00 5. " UDETS ,USIM Detect Status" "no,yes"
|
|
bitfld.long 0x00 3. " USIM115 ,Allow UVS or UEN Functionality for GPIO<115>" "GPIO,UEN"
|
|
bitfld.long 0x00 2. " USIM114 ,Allow UVS or UEN Functionality for GPIO<114>" "GPIO,UEN"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN_UDET ,Enable USIM Card Detect" "dis,ena"
|
|
group 0x50++0x03
|
|
line.long 0x00 "PKWR,Power Manager Keyboard Wake-Up Enable Register"
|
|
bitfld.long 0x00 19. " WE102 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 18. " WE101 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 17. " WE100 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 16. " WE99 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 15. " WE98 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " WE97 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 13. " WE96 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " WE95 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 11. " WE94 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WE93 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " WE91 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " WE90 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WE39 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 6. " WE38 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 5. " WE37 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WE36 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 3. " WE34 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 2. " WE17 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WE16 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
bitfld.long 0x00 0. " WE13 ,Standby or Sleep-Mode Wake-Up Enable" "dis,ena"
|
|
group 0x54++0x03
|
|
line.long 0x00 "PKSR,Power Manager Keyboard Level-Detect Status Register"
|
|
eventfld.long 0x00 19. " ED102 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 18. " ED101 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 17. " ED100 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
textline " "
|
|
eventfld.long 0x00 16. " ED99 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 15. " ED98 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 14. " ED97 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
textline " "
|
|
eventfld.long 0x00 13. " ED96 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 12. " ED95 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 11. " ED94 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
textline " "
|
|
eventfld.long 0x00 10. " ED93 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 9. " ED91 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 8. " ED90 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
textline " "
|
|
eventfld.long 0x00 7. " ED39 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 6. " ED38 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 5. " ED37 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
textline " "
|
|
eventfld.long 0x00 4. " ED36 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 3. " ED34 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 2. " ED17 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
textline " "
|
|
eventfld.long 0x00 1. " ED16 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
eventfld.long 0x00 0. " ED13 ,Standby or Sleep Mode Level Detect Status" "noDtct,detect"
|
|
group 0x80--0xff
|
|
line.long 0x0 "PCMD0,Power Manager I2C Command Register File"
|
|
bitfld.long 0x0 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x0 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x0 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x0 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x4 "PCMD1,Power Manager I2C Command Register File"
|
|
bitfld.long 0x4 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x4 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x4 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x4 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x8 "PCMD2,Power Manager I2C Command Register File"
|
|
bitfld.long 0x8 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x8 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x8 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x8 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x8 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0xC "PCMD3,Power Manager I2C Command Register File"
|
|
bitfld.long 0xC 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0xC 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0xC 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0xC 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0xC 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x10 "PCMD4,Power Manager I2C Command Register File"
|
|
bitfld.long 0x10 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x10 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x10 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x10 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x10 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x14 "PCMD5,Power Manager I2C Command Register File"
|
|
bitfld.long 0x14 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x14 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x14 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x14 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x14 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x18 "PCMD6,Power Manager I2C Command Register File"
|
|
bitfld.long 0x18 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x18 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x18 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x18 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x18 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x1C "PCMD7,Power Manager I2C Command Register File"
|
|
bitfld.long 0x1C 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x1C 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x1C 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x1C 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x20 "PCMD8,Power Manager I2C Command Register File"
|
|
bitfld.long 0x20 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x20 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x20 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x20 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x20 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x24 "PCMD9,Power Manager I2C Command Register File"
|
|
bitfld.long 0x24 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x24 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x24 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x24 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x24 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x28 "PCMD10,Power Manager I2C Command Register File"
|
|
bitfld.long 0x28 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x28 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x28 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x28 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x28 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x2C "PCMD11,Power Manager I2C Command Register File"
|
|
bitfld.long 0x2C 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x2C 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x2C 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x2C 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x30 "PCMD12,Power Manager I2C Command Register File"
|
|
bitfld.long 0x30 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x30 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x30 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x30 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x30 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x34 "PCMD13,Power Manager I2C Command Register File"
|
|
bitfld.long 0x34 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x34 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x34 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x34 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x34 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x38 "PCMD14,Power Manager I2C Command Register File"
|
|
bitfld.long 0x38 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x38 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x38 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x38 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x38 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x3C "PCMD15,Power Manager I2C Command Register File"
|
|
bitfld.long 0x3C 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x3C 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x3C 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x3C 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x40 "PCMD16,Power Manager I2C Command Register File"
|
|
bitfld.long 0x40 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x40 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x40 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x40 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x40 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x44 "PCMD17,Power Manager I2C Command Register File"
|
|
bitfld.long 0x44 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x44 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x44 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x44 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x44 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x48 "PCMD18,Power Manager I2C Command Register File"
|
|
bitfld.long 0x48 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x48 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x48 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x48 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x48 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x4C "PCMD19,Power Manager I2C Command Register File"
|
|
bitfld.long 0x4C 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x4C 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x4C 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4C 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x50 "PCMD20,Power Manager I2C Command Register File"
|
|
bitfld.long 0x50 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x50 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x50 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x50 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x50 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x54 "PCMD21,Power Manager I2C Command Register File"
|
|
bitfld.long 0x54 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x54 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x54 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x54 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x54 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x58 "PCMD22,Power Manager I2C Command Register File"
|
|
bitfld.long 0x58 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x58 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x58 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x58 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x58 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x5C "PCMD23,Power Manager I2C Command Register File"
|
|
bitfld.long 0x5C 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x5C 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x5C 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x5C 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x60 "PCMD24,Power Manager I2C Command Register File"
|
|
bitfld.long 0x60 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x60 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x60 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x60 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x60 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x64 "PCMD25,Power Manager I2C Command Register File"
|
|
bitfld.long 0x64 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x64 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x64 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x64 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x64 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x68 "PCMD26,Power Manager I2C Command Register File"
|
|
bitfld.long 0x68 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x68 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x68 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x68 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x68 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x6C "PCMD27,Power Manager I2C Command Register File"
|
|
bitfld.long 0x6C 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x6C 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x6C 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x6C 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x70 "PCMD28,Power Manager I2C Command Register File"
|
|
bitfld.long 0x70 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x70 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x70 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x70 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x70 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x74 "PCMD29,Power Manager I2C Command Register File"
|
|
bitfld.long 0x74 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x74 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x74 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x74 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x74 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x78 "PCMD30,Power Manager I2C Command Register File"
|
|
bitfld.long 0x78 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x78 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x78 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x78 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x78 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
line.long 0x7C "PCMD31,Power Manager I2C Command Register File"
|
|
bitfld.long 0x7C 12. " MBC ,Multi-Byte Command" "no,yes"
|
|
bitfld.long 0x7C 11. " DCE ,Delay Command Execution" "no,yes"
|
|
bitfld.long 0x7C 10. " LC ,Last Command" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x7C 8.--9. " SQC ,Sequence Configuration" "continue,pause,res,res"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " CD ,Command Data-Power Manager I2C Command Data to be Sent to External Regulator"
|
|
tree.end
|
|
base asd:0x41300000
|
|
; --------------------------------------------------------------------------------
|
|
; PXA210, PXA250,PXA255,PXA26x,PXA27x
|
|
; State: ok
|
|
; --------------------------------------------------------------------------------
|
|
tree "Clock Manager"
|
|
; --------------------------------------------------------------------------------
|
|
width 6.
|
|
group 0x00++0x03
|
|
line.long 0x00 "CCCR,Core Clock Configuration Register"
|
|
bitfld.long 0x00 31. " CPDIS ,Core PLL Output Disable" "ena,dis"
|
|
bitfld.long 0x00 30. " PPDIS ,Peripheral PLL Output Disable" "ena,dis"
|
|
bitfld.long 0x00 27. " LCD_26 ,LCD Clock Frequency in Deep-Idle or 13M Mode" "13MHz,26MHz"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PLL_EARLY_EN ,Early PLL Enable" "dis,ena"
|
|
bitfld.long 0x00 25. " A ,Alternate Setting for Memory Controller Clock" "0,1"
|
|
bitfld.long 0x00 7.--10. " 2N ,Turbo-Mode-to-Run-Mode Ratio N" "1,1,1,N,N,N,N,N,N,N,N,N,N,N,N,res"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " L ,Run-Mode-to-Oscillator Ratio" "2,2,2,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,res"
|
|
group 0x04++0x03
|
|
line.long 0x00 "CKEN,Clock Enable Register"
|
|
bitfld.long 0x00 31. " CKEN31 ,AC97 Controller Configuration" "dis,ena"
|
|
bitfld.long 0x00 24. " CKEN24 ,Quick Capture Interface Clock" "dis,ena"
|
|
bitfld.long 0x00 23. " CKEN23 ,SSP1 Unit Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CKEN22 ,Memory Controller" "dis,ena"
|
|
bitfld.long 0x00 21. " CKEN21 ,Memory Stick Host Controller" "dis,ena"
|
|
bitfld.long 0x00 20. " CKEN20 ,Internal Memory Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CKEN19 ,Keypad Interface Clock" "dis,ena"
|
|
bitfld.long 0x00 18. " CKEN18 ,USIM Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 17. " CKEN17 ,MSL Interface Unit Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CKEN16 ,LCD Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 15. " CKEN15 ,Power Manager I2C Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 14. " CKEN14 ,I2C Unit Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CKEN13 ,FICP Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 12. " CKEN12 ,MMC Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 11. " CKEN11 ,USB Client Unit Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CKEN10 ,USB Host Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 9. " CKEN9 ,OS Timer Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 8. " CKEN8 ,I2S Unit Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CKEN7 ,BTUART Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 6. " CKEN6 ,FFUART Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 5. " CKEN5 ,STUART Unit Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CKEN4 ,SSP3 Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 3. " CKEN3 ,SSP2 Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 2. " CKEN2 ,AC97 Unit Clock" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CKEN1 ,PWM Unit Clock" "dis,ena"
|
|
bitfld.long 0x00 0. " CKEN0 ,PWM Unit Clock" "dis,ena"
|
|
group 0x08++0x03
|
|
line.long 0x00 "OSCC,Oscillator Configuration Register"
|
|
bitfld.long 0x00 5.--6. " OSD ,Processor (13-MHz) Oscillator Stabilization Delay" "5ms,3ms,375us,1us"
|
|
bitfld.long 0x00 4. " CRI ,Clock Request Input (External Processor Oscillator) Status" "PXTAL_IN/OUT,external"
|
|
bitfld.long 0x00 3. " PIO_EN ,13-MHz Processor Oscillator Output Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TOUT_EN ,Timekeeping (32.768 kHz) Oscillator Output Enable" "dis,ena"
|
|
bitfld.long 0x00 1. " OON ,Timekeeping (32.768 kHz) Oscillator On" "dis,ena"
|
|
bitfld.long 0x00 0. " OOK ,Timekeeping (32.768 kHz) Oscillator OK" "no,yes"
|
|
rgroup 0x0c++0x03
|
|
line.long 0x00 "CCSR,Core Clock Status Register"
|
|
bitfld.long 0x00 31. " CPDIS_S ,Core PLL Output Disable (CPDIS) Status" "0,1"
|
|
bitfld.long 0x00 30. " PPDIS_S ,Peripheral PLL Output Disable (PPDIS) Status" "0,1"
|
|
bitfld.long 0x00 29. " CPLCK ,Core PLL Lock" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPLCK ,Peripheral PLL Lock" "no,yes"
|
|
bitfld.long 0x00 7.--9. " 2N_S ,Turbo-Mode-to-Run-Mode Ratio (N) Status" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--4. " L_S ,Run-Mode to 13-MHz Processor Oscillator Ratio (L) Status" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f,10,11,12,13,14,15,16,17,18,19,1a,1b,1c,1d,1e,1f"
|
|
tree.end
|
|
tree.end
|
|
width 8.
|
|
tree "DMA Controller"
|
|
width 9.
|
|
base ASD:0x40000000
|
|
group 0x00--0x7f
|
|
line.long 0x0 "DCSR0,DMA Control/Status Register for Channel 0"
|
|
bitfld.long 0x0 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x0 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x0 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x0 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x0 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x0 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x0 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x0 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x0 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x0 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x0 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x0 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x0 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x0 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x0 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x4 "DCSR1,DMA Control/Status Register for Channel 1"
|
|
bitfld.long 0x4 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x4 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x4 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x4 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x4 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x4 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x4 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x4 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x4 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x4 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x4 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x4 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x4 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x4 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x4 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x4 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x8 "DCSR2,DMA Control/Status Register for Channel 2"
|
|
bitfld.long 0x8 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x8 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x8 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x8 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x8 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x8 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x8 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x8 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x8 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x8 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x8 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x8 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x8 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x8 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x8 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x8 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x8 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x8 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0xC "DCSR3,DMA Control/Status Register for Channel 3"
|
|
bitfld.long 0xC 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0xC 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0xC 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0xC 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xC 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0xC 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0xC 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0xC 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0xC 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0xC 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0xC 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0xC 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0xC 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0xC 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0xC 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0xC 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0xC 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0xC 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x10 "DCSR4,DMA Control/Status Register for Channel 4"
|
|
bitfld.long 0x10 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x10 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x10 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x10 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x10 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x10 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x10 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x10 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x10 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x10 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x10 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x10 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x10 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x10 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x10 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x10 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x14 "DCSR5,DMA Control/Status Register for Channel 5"
|
|
bitfld.long 0x14 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x14 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x14 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x14 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x14 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x14 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x14 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x14 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x14 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x14 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x14 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x14 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x14 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x14 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x14 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x14 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x14 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x14 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x18 "DCSR6,DMA Control/Status Register for Channel 6"
|
|
bitfld.long 0x18 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x18 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x18 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x18 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x18 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x18 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x18 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x18 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x18 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x18 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x18 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x18 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x18 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x18 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x18 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x18 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x18 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x18 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x1C "DCSR7,DMA Control/Status Register for Channel 7"
|
|
bitfld.long 0x1C 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x1C 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x1C 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1C 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x1C 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x1C 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x1C 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x1C 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x1C 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x1C 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x1C 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x1C 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x1C 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x1C 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x1C 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x20 "DCSR8,DMA Control/Status Register for Channel 8"
|
|
bitfld.long 0x20 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x20 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x20 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x20 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x20 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x20 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x20 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x20 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x20 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x20 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x20 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x20 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x20 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x20 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x20 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x20 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x20 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x20 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x24 "DCSR9,DMA Control/Status Register for Channel 9"
|
|
bitfld.long 0x24 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x24 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x24 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x24 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x24 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x24 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x24 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x24 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x24 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x24 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x24 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x24 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x24 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x24 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x24 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x24 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x24 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x24 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x28 "DCSR10,DMA Control/Status Register for Channel 10"
|
|
bitfld.long 0x28 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x28 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x28 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x28 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x28 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x28 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x28 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x28 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x28 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x28 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x28 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x28 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x28 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x28 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x28 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x28 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x28 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x28 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x2C "DCSR11,DMA Control/Status Register for Channel 11"
|
|
bitfld.long 0x2C 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x2C 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x2C 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x2C 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x2C 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x2C 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x2C 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x2C 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x2C 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x2C 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x2C 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x2C 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x2C 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x2C 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x2C 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x2C 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x2C 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x30 "DCSR12,DMA Control/Status Register for Channel 12"
|
|
bitfld.long 0x30 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x30 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x30 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x30 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x30 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x30 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x30 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x30 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x30 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x30 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x30 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x30 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x30 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x30 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x30 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x30 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x30 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x30 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x34 "DCSR13,DMA Control/Status Register for Channel 13"
|
|
bitfld.long 0x34 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x34 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x34 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x34 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x34 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x34 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x34 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x34 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x34 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x34 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x34 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x34 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x34 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x34 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x34 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x34 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x34 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x34 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x38 "DCSR14,DMA Control/Status Register for Channel 14"
|
|
bitfld.long 0x38 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x38 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x38 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x38 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x38 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x38 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x38 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x38 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x38 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x38 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x38 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x38 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x38 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x38 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x38 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x38 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x38 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x38 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x3C "DCSR15,DMA Control/Status Register for Channel 15"
|
|
bitfld.long 0x3C 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x3C 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x3C 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x3C 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x3C 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x3C 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x3C 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x3C 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x3C 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x3C 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x3C 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x3C 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x3C 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x3C 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x3C 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x3C 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x3C 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x40 "DCSR16,DMA Control/Status Register for Channel 16"
|
|
bitfld.long 0x40 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x40 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x40 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x40 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x40 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x40 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x40 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x40 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x40 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x40 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x40 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x40 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x40 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x40 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x40 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x40 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x40 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x40 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x44 "DCSR17,DMA Control/Status Register for Channel 17"
|
|
bitfld.long 0x44 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x44 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x44 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x44 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x44 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x44 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x44 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x44 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x44 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x44 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x44 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x44 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x44 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x44 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x44 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x44 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x44 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x44 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x48 "DCSR18,DMA Control/Status Register for Channel 18"
|
|
bitfld.long 0x48 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x48 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x48 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x48 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x48 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x48 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x48 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x48 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x48 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x48 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x48 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x48 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x48 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x48 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x48 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x48 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x48 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x48 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x4C "DCSR19,DMA Control/Status Register for Channel 19"
|
|
bitfld.long 0x4C 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x4C 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x4C 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x4C 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x4C 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x4C 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4C 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x4C 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x4C 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x4C 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x4C 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x4C 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4C 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x4C 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x4C 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x4C 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x4C 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x4C 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x50 "DCSR20,DMA Control/Status Register for Channel 20"
|
|
bitfld.long 0x50 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x50 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x50 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x50 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x50 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x50 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x50 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x50 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x50 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x50 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x50 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x50 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x50 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x50 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x50 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x50 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x50 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x50 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x54 "DCSR21,DMA Control/Status Register for Channel 21"
|
|
bitfld.long 0x54 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x54 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x54 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x54 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x54 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x54 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x54 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x54 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x54 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x54 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x54 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x54 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x54 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x54 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x54 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x54 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x54 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x54 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x58 "DCSR22,DMA Control/Status Register for Channel 22"
|
|
bitfld.long 0x58 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x58 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x58 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x58 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x58 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x58 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x58 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x58 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x58 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x58 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x58 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x58 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x58 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x58 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x58 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x58 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x58 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x58 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x5C "DCSR23,DMA Control/Status Register for Channel 23"
|
|
bitfld.long 0x5C 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x5C 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x5C 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x5C 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x5C 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x5C 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x5C 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x5C 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x5C 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x5C 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x5C 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x5C 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x5C 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x5C 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x5C 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x5C 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x5C 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x5C 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x60 "DCSR24,DMA Control/Status Register for Channel 24"
|
|
bitfld.long 0x60 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x60 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x60 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x60 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x60 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x60 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x60 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x60 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x60 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x60 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x60 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x60 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x60 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x60 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x60 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x60 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x60 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x60 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x64 "DCSR25,DMA Control/Status Register for Channel 25"
|
|
bitfld.long 0x64 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x64 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x64 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x64 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x64 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x64 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x64 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x64 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x64 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x64 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x64 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x64 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x64 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x64 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x64 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x64 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x64 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x64 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x68 "DCSR26,DMA Control/Status Register for Channel 26"
|
|
bitfld.long 0x68 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x68 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x68 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x68 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x68 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x68 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x68 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x68 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x68 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x68 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x68 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x68 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x68 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x68 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x68 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x68 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x68 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x68 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x6C "DCSR27,DMA Control/Status Register for Channel 27"
|
|
bitfld.long 0x6C 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x6C 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x6C 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x6C 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x6C 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x6C 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x6C 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x6C 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x6C 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x6C 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x6C 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x6C 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x6C 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x6C 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x6C 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x6C 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x6C 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x6C 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x70 "DCSR28,DMA Control/Status Register for Channel 28"
|
|
bitfld.long 0x70 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x70 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x70 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x70 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x70 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x70 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x70 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x70 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x70 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x70 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x70 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x70 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x70 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x70 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x70 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x70 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x70 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x70 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x74 "DCSR29,DMA Control/Status Register for Channel 29"
|
|
bitfld.long 0x74 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x74 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x74 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x74 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x74 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x74 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x74 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x74 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x74 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x74 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x74 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x74 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x74 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x74 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x74 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x74 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x74 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x74 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x78 "DCSR30,DMA Control/Status Register for Channel 30"
|
|
bitfld.long 0x78 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x78 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x78 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x78 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x78 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x78 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x78 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x78 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x78 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x78 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x78 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x78 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x78 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x78 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x78 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x78 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x78 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x78 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
line.long 0x7C "DCSR31,DMA Control/Status Register for Channel 31"
|
|
bitfld.long 0x7C 31. " RUN ,Run" "stop,start"
|
|
bitfld.long 0x7C 30. " NODESCFETCH ,No-Descriptor-Fetch" "DF,noDFT"
|
|
bitfld.long 0x7C 29. " STOPIRQEN ,Stop Interrupt Enabled" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x7C 28. " EORIRQEN ,End-of-Receive Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x7C 27. " EORJMPEN ,Jump to Next Descriptor on EOR" "no,yes"
|
|
bitfld.long 0x7C 26. " EORSTOPEN ,Stop Channel on EOR" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x7C 25. " SETCMPST ,Set Descriptor Compare Status" "-,set"
|
|
bitfld.long 0x7C 24. " CLRCMPST ,Clear Descriptor Compare Status" "-,clr"
|
|
bitfld.long 0x7C 23. " RASIrqEn ,Request After Channel Stopped Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x7C 22. " MaskRun ,Mask Run" "no,yes"
|
|
bitfld.long 0x7C 10. " CMPST ,Descriptor Compare Status" "unsuc,success"
|
|
bitfld.long 0x7C 9. " EORINTR ,End of Receive" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x7C 8. " REQPEND ,Request Pending" "no,yes"
|
|
bitfld.long 0x7C 4. " RASIntr ,Request After Channel Stopped" "no,yes"
|
|
bitfld.long 0x7C 3. " STOPINTR ,Stop Interrupt" "run,stop"
|
|
textline " "
|
|
bitfld.long 0x7C 2. " ENDINTR ,End Interrupt" "no,yes"
|
|
bitfld.long 0x7C 1. " STARTINTR ,Start Interrupt" "no,yes"
|
|
bitfld.long 0x7C 0. " BUSERRINTR ,Bus Error Interrupt" "no,yes"
|
|
group 0xa0++0x03
|
|
line.long 0x00 "DALGN,DMA Alignment Register"
|
|
bitfld.long 0x00 31. " DALGN31 ,Alignment Control for Channel 31" "default,userDef"
|
|
bitfld.long 0x00 30. " DALGN30 ,Alignment Control for Channel 30" "default,userDef"
|
|
bitfld.long 0x00 29. " DALGN29 ,Alignment Control for Channel 29" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 28. " DALGN28 ,Alignment Control for Channel 28" "default,userDef"
|
|
bitfld.long 0x00 27. " DALGN27 ,Alignment Control for Channel 27" "default,userDef"
|
|
bitfld.long 0x00 26. " DALGN26 ,Alignment Control for Channel 26" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DALGN25 ,Alignment Control for Channel 25" "default,userDef"
|
|
bitfld.long 0x00 24. " DALGN24 ,Alignment Control for Channel 24" "default,userDef"
|
|
bitfld.long 0x00 23. " DALGN23 ,Alignment Control for Channel 23" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DALGN22 ,Alignment Control for Channel 22" "default,userDef"
|
|
bitfld.long 0x00 21. " DALGN21 ,Alignment Control for Channel 21" "default,userDef"
|
|
bitfld.long 0x00 20. " DALGN20 ,Alignment Control for Channel 20" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DALGN19 ,Alignment Control for Channel 19" "default,userDef"
|
|
bitfld.long 0x00 18. " DALGN18 ,Alignment Control for Channel 18" "default,userDef"
|
|
bitfld.long 0x00 17. " DALGN17 ,Alignment Control for Channel 17" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DALGN16 ,Alignment Control for Channel 16" "default,userDef"
|
|
bitfld.long 0x00 15. " DALGN15 ,Alignment Control for Channel 15" "default,userDef"
|
|
bitfld.long 0x00 14. " DALGN14 ,Alignment Control for Channel 14" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DALGN13 ,Alignment Control for Channel 13" "default,userDef"
|
|
bitfld.long 0x00 12. " DALGN12 ,Alignment Control for Channel 12" "default,userDef"
|
|
bitfld.long 0x00 11. " DALGN11 ,Alignment Control for Channel 11" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DALGN10 ,Alignment Control for Channel 10" "default,userDef"
|
|
bitfld.long 0x00 9. " DALGN09 ,Alignment Control for Channel 9" "default,userDef"
|
|
bitfld.long 0x00 8. " DALGN08 ,Alignment Control for Channel 8" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DALGN07 ,Alignment Control for Channel 7" "default,userDef"
|
|
bitfld.long 0x00 6. " DALGN06 ,Alignment Control for Channel 6" "default,userDef"
|
|
bitfld.long 0x00 5. " DALGN05 ,Alignment Control for Channel 5" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DALGN04 ,Alignment Control for Channel 4" "default,userDef"
|
|
bitfld.long 0x00 3. " DALGN03 ,Alignment Control for Channel 3" "default,userDef"
|
|
bitfld.long 0x00 2. " DALGN02 ,Alignment Control for Channel 2" "default,userDef"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DALGN01 ,Alignment Control for Channel 1" "default,userDef"
|
|
bitfld.long 0x00 0. " DALGN00 ,Alignment Control for Channel 0" "default,userDef"
|
|
group 0xa4++0x03
|
|
line.long 0x00 "DPCSR,DMA Programmed I/O Control Status"
|
|
bitfld.long 0x00 31. " BrgSplit ,Activate Posted Writes and Split Reads" "deact,act"
|
|
bitfld.long 0x00 0. " BrgBusy ,Bridge Busy Status" "no,yes"
|
|
group 0xE0++0xEB
|
|
line.long 0x0 "DRQSR0,DMA DREQ0 Status Register"
|
|
bitfld.long 0x0 8. " CLR ,Clear Pending Requests" "-,yes"
|
|
hexmask.long.byte 0x0 0.--4. 1. " REQPEND ,Requests Pending"
|
|
line.long 0x4 "DRQSR1,DMA DREQ1 Status Register"
|
|
bitfld.long 0x4 8. " CLR ,Clear Pending Requests" "-,yes"
|
|
hexmask.long.byte 0x4 0.--4. 1. " REQPEND ,Requests Pending"
|
|
line.long 0x8 "DRQSR2,DMA DREQ2 Status Register"
|
|
bitfld.long 0x8 8. " CLR ,Clear Pending Requests" "-,yes"
|
|
hexmask.long.byte 0x8 0.--4. 1. " REQPEND ,Requests Pending"
|
|
rgroup 0xF0++0x03
|
|
line.long 0x00 "DINT, DMA Interrupt register"
|
|
bitfld.long 0x00 31. " CHLINTR31 ,Channel 31 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 30. " CHLINTR30 ,Channel 30 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 29. " CHLINTR29 ,Channel 29 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CHLINTR28 ,Channel 28 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 27. " CHLINTR27 ,Channel 27 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 26. " CHLINTR26 ,Channel 26 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CHLINTR25 ,Channel 25 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 24. " CHLINTR24 ,Channel 24 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 23. " CHLINTR23 ,Channel 23 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CHLINTR22 ,Channel 22 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 21. " CHLINTR21 ,Channel 21 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 20. " CHLINTR20 ,Channel 20 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CHLINTR19 ,Channel 19 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 18. " CHLINTR18 ,Channel 18 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 17. " CHLINTR17 ,Channel 17 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CHLINTR16 ,Channel 16 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 15. " CHLINTR15 ,Channel 15 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 14. " CHLINTR14 ,Channel 14 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CHLINTR13 ,Channel 13 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 12. " CHLINTR12 ,Channel 12 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 11. " CHLINTR11 ,Channel 11 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CHLINTR10 ,Channel 10 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 09. " CHLINTR09 ,Channel 09 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 08. " CHLINTR08 ,Channel 08 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 07. " CHLINTR07 ,Channel 07 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 06. " CHLINTR06 ,Channel 06 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 05. " CHLINTR05 ,Channel 05 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 04. " CHLINTR04 ,Channel 04 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 03. " CHLINTR03 ,Channel 03 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 02. " CHLINTR02 ,Channel 02 Interruptl" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 01. " CHLINTR01 ,Channel 01 Interruptl" "noInt,int"
|
|
bitfld.long 0x00 00. " CHLINTR00 ,Channel 00 Interruptl" "noInt,int"
|
|
group 0x100++0x03
|
|
line.long 0x00 "DRCMR0,Request to Channel Map register for DREQ<0> (companion chip request 0)"
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 0.--4. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x104++0x03
|
|
line.long 0x00 "DRCMR1 ,Request to Channel Map register for DREQ<1> (companion chip request 1) "
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 0.--4. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x108++0x03
|
|
line.long 0x00 "DRCMR2 ,Request to Channel Map register for I2S receive request "
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 0.--4. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x10C++0x03
|
|
line.long 0x00 "DRCMR3 ,Request to Channel Map register for I2S transmit request "
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 0.--4. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x110++0x03
|
|
line.long 0x00 "DRCMR4 ,Request to Channel Map register for BTUART receive request "
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 0.--4. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x114++0x03
|
|
line.long 0x00 "DRCMR5 ,Request to Channel Map register for BTUART transmit request. "
|
|
bitfld.long 0x00 7. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 0.--4. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x118++0x03
|
|
line.long 0x00 "DRCMR6 ,Request to Channel Map register for FFUART receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x11C++0x03
|
|
line.long 0x00 "DRCMR7 ,Request to Channel Map register for FFUART transmit request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x120++0x03
|
|
line.long 0x00 "DRCMR8 ,Request to Channel Map register for AC97 microphone request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x124++0x03
|
|
line.long 0x00 "DRCMR9 ,Request to Channel Map register for AC97 modem receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x128++0x03
|
|
line.long 0x00 "DRCMR10 ,Request to Channel Map register for AC97 modem transmite request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x12C++0x03
|
|
line.long 0x00 "DRCMR11 ,Request to Channel Map register for AC97 audio receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x130++0x03
|
|
line.long 0x00 "DRCMR12 ,Request to Channel Map register for AC97 audio transmit request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x134++0x03
|
|
line.long 0x00 "DRCMR13 ,Request to Channel Map register for SSP1 receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x138++0x03
|
|
line.long 0x00 "DRCMR14 ,Request to Channel Map register for SSP1 transmit request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x13C++0x03
|
|
line.long 0x00 "DRCMR15 ,Request to Channel Map register for SSP2 receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x140++0x03
|
|
line.long 0x00 "DRCMR16 ,Request to Channel Map register for SSP2 transmit request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x144++0x03
|
|
line.long 0x00 "DRCMR17 ,Request to Channel Map register for ICP receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x148++0x03
|
|
line.long 0x00 "DRCMR18 ,Request to Channel Map register for ICP transmit request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x14C++0x03
|
|
line.long 0x00 "DRCMR19 ,Request to Channel Map register for STUART receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x150++0x03
|
|
line.long 0x00 "DRCMR20 ,Request to Channel Map register for STUART transmit request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x154++0x03
|
|
line.long 0x00 "DRCMR21 ,Request to Channel Map register for MMC/SDIO receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x158++0x03
|
|
line.long 0x00 "DRCMR22 ,Request to Channel Map register for MMC/SDIO transmit request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x160++0x03
|
|
line.long 0x00 "DRCMR24 ,Request to Channel Map register for USB endpoint 0 request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x164++0x03
|
|
line.long 0x00 "DRCMR25 ,Request to Channel Map register for USB endpoint A request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x168++0x03
|
|
line.long 0x00 "DRCMR26 ,Request to Channel Map register for USB endpoint B request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x16C++0x03
|
|
line.long 0x00 "DRCMR27 ,Request to Channel Map register for USB endpoint C request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x170++0x03
|
|
line.long 0x00 "DRCMR28 ,Request to Channel Map register for USB endpoint D request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x174++0x03
|
|
line.long 0x00 "DRCMR29 ,Request to Channel Map register for USB endpoint E request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x178++0x03
|
|
line.long 0x00 "DRCMR30 ,Request to Channel Map register for USB endpoint F request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x17C++0x03
|
|
line.long 0x00 "DRCMR31 ,Request to Channel Map register for USB endpoint G request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x180++0x03
|
|
line.long 0x00 "DRCMR32 ,Request to Channel Map register for USB endpoint H request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x184++0x03
|
|
line.long 0x00 "DRCMR33 ,Request to Channel Map register for USB endpoint I request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x188++0x03
|
|
line.long 0x00 "DRCMR34 ,Request to Channel Map register for USB endpoint J request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x18C++0x03
|
|
line.long 0x00 "DRCMR35 ,Request to Channel Map register for USB endpoint K request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x190++0x03
|
|
line.long 0x00 "DRCMR36 ,Request to Channel Map register for USB endpoint L request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x194++0x03
|
|
line.long 0x00 "DRCMR37 ,Request to Channel Map register for USB endpoint M request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x198++0x03
|
|
line.long 0x00 "DRCMR38 ,Request to Channel Map register for USB endpoint N request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x19C++0x03
|
|
line.long 0x00 "DRCMR39 ,Request to Channel Map register for USB endpoint P request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1A0++0x03
|
|
line.long 0x00 "DRCMR40 ,Request to Channel Map register for USB endpoint Q request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1A4++0x03
|
|
line.long 0x00 "DRCMR41 ,Request to Channel Map register for USB endpoint R request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1A8++0x03
|
|
line.long 0x00 "DRCMR42 ,Request to Channel Map register for USB endpoint S request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1AC++0x03
|
|
line.long 0x00 "DRCMR43 ,Request to Channel Map register for USB endpoint T request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1B0++0x03
|
|
line.long 0x00 "DRCMR44 ,Request to Channel Map register for USB endpoint U request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1B4++0x03
|
|
line.long 0x00 "DRCMR45 ,Request to Channel Map register for USB endpoint V request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1B8++0x03
|
|
line.long 0x00 "DRCMR46 ,Request to Channel Map register for USB endpoint W request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1BC++0x03
|
|
line.long 0x00 "DRCMR47 ,Request to Channel Map register for USB endpoint X request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1C0++0x03
|
|
line.long 0x00 "DRCMR48 ,Request to Channel Map register for MSL receive request 1 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1C4++0x03
|
|
line.long 0x00 "DRCMR49 ,Request to Channel Map register for MSL transmit request 1 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1C8++0x03
|
|
line.long 0x00 "DRCMR50 ,Request to Channel Map register for MSL receive request 2 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1CC++0x03
|
|
line.long 0x00 "DRCMR51 ,Request to Channel Map register for MSL transmit request 2 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1D0++0x03
|
|
line.long 0x00 "DRCMR52 ,Request to Channel Map register for MSL receive request 3 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1D4++0x03
|
|
line.long 0x00 "DRCMR53 ,Request to Channel Map register for MSL transmit request 3 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1D8++0x03
|
|
line.long 0x00 "DRCMR54 ,Request to Channel Map register for MSL receive request 4 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1DC++0x03
|
|
line.long 0x00 "DRCMR55 ,Request to Channel Map register for MSL transmit request 4 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1E0++0x03
|
|
line.long 0x00 "DRCMR56 ,Request to Channel Map register for MSL receive request 5 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1E4++0x03
|
|
line.long 0x00 "DRCMR57 ,Request to Channel Map register for MSL transmit request 5 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1E8++0x03
|
|
line.long 0x00 "DRCMR58 ,Request to Channel Map register for MSL receive request 6 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1EC++0x03
|
|
line.long 0x00 "DRCMR59 ,Request to Channel Map register for MSL transmit request 6 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1F0++0x03
|
|
line.long 0x00 "DRCMR60 ,Request to Channel Map register for MSL receive request 7 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1F4++0x03
|
|
line.long 0x00 "DRCMR61 ,Request to Channel Map register for MSL transmit request 7 "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1F8++0x03
|
|
line.long 0x00 "DRCMR62 ,Request to Channel Map register for USIM receive request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1FC++0x03
|
|
line.long 0x00 "DRCMR63 ,Request to Channel Map register for USIM transmit request "
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x200--0x3ff
|
|
line.long 0x0 "DDADR0,DMA Descriptor Address register for Channel 0"
|
|
hexmask.long 0x0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x4 "DSADR0,DMA Source Address register for Channel 0"
|
|
hexmask.long 0x4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x8 "DTADR0,DMA Target Address register for Channel 0"
|
|
hexmask.long 0x8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0xC "DCMD0,DMA Command Address register for Channel 0"
|
|
bitfld.long 0xC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0xC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0xC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0xC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0xC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0xC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0xC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0xC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0xC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0xC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x10 "DDADR1,DMA Descriptor Address register for Channel 1"
|
|
hexmask.long 0x10 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x10 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x10 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x14 "DSADR1,DMA Source Address register for Channel 1"
|
|
hexmask.long 0x14 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x14 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x18 "DTADR1,DMA Target Address register for Channel 1"
|
|
hexmask.long 0x18 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x18 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x1C "DCMD1,DMA Command Address register for Channel 1"
|
|
bitfld.long 0x1C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x1C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x1C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x1C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x1C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x1C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x1C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x1C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x20 "DDADR2,DMA Descriptor Address register for Channel 2"
|
|
hexmask.long 0x20 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x20 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x20 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x24 "DSADR2,DMA Source Address register for Channel 2"
|
|
hexmask.long 0x24 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x24 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x28 "DTADR2,DMA Target Address register for Channel 2"
|
|
hexmask.long 0x28 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x28 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x2C "DCMD2,DMA Command Address register for Channel 2"
|
|
bitfld.long 0x2C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x2C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x2C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x2C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x2C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x2C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x2C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x2C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x2C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x2C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x2C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x2C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x2C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x30 "DDADR3,DMA Descriptor Address register for Channel 3"
|
|
hexmask.long 0x30 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x30 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x30 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x34 "DSADR3,DMA Source Address register for Channel 3"
|
|
hexmask.long 0x34 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x34 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x38 "DTADR3,DMA Target Address register for Channel 3"
|
|
hexmask.long 0x38 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x38 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x3C "DCMD3,DMA Command Address register for Channel 3"
|
|
bitfld.long 0x3C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x3C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x3C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x3C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x3C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x3C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x3C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x3C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x3C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x3C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x3C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x3C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x3C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x40 "DDADR4,DMA Descriptor Address register for Channel 4"
|
|
hexmask.long 0x40 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x40 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x40 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x44 "DSADR4,DMA Source Address register for Channel 4"
|
|
hexmask.long 0x44 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x44 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x48 "DTADR4,DMA Target Address register for Channel 4"
|
|
hexmask.long 0x48 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x48 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x4C "DCMD4,DMA Command Address register for Channel 4"
|
|
bitfld.long 0x4C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x4C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x4C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x4C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x4C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x4C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x4C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x4C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x4C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x4C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x4C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x4C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x50 "DDADR5,DMA Descriptor Address register for Channel 5"
|
|
hexmask.long 0x50 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x50 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x50 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x54 "DSADR5,DMA Source Address register for Channel 5"
|
|
hexmask.long 0x54 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x54 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x58 "DTADR5,DMA Target Address register for Channel 5"
|
|
hexmask.long 0x58 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x58 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x5C "DCMD5,DMA Command Address register for Channel 5"
|
|
bitfld.long 0x5C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x5C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x5C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x5C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x5C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x5C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x5C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x5C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x5C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x5C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x5C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x5C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x5C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x60 "DDADR6,DMA Descriptor Address register for Channel 6"
|
|
hexmask.long 0x60 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x60 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x60 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x64 "DSADR6,DMA Source Address register for Channel 6"
|
|
hexmask.long 0x64 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x64 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x68 "DTADR6,DMA Target Address register for Channel 6"
|
|
hexmask.long 0x68 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x68 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x6C "DCMD6,DMA Command Address register for Channel 6"
|
|
bitfld.long 0x6C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x6C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x6C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x6C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x6C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x6C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x6C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x6C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x6C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x6C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x6C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x6C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x6C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x70 "DDADR7,DMA Descriptor Address register for Channel 7"
|
|
hexmask.long 0x70 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x70 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x70 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x74 "DSADR7,DMA Source Address register for Channel 7"
|
|
hexmask.long 0x74 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x74 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x78 "DTADR7,DMA Target Address register for Channel 7"
|
|
hexmask.long 0x78 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x78 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x7C "DCMD7,DMA Command Address register for Channel 7"
|
|
bitfld.long 0x7C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x7C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x7C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x7C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x7C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x7C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x7C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x7C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x7C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x7C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x7C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x7C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x7C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x80 "DDADR8,DMA Descriptor Address register for Channel 8"
|
|
hexmask.long 0x80 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x80 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x80 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x84 "DSADR8,DMA Source Address register for Channel 8"
|
|
hexmask.long 0x84 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x84 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x88 "DTADR8,DMA Target Address register for Channel 8"
|
|
hexmask.long 0x88 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x88 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x8C "DCMD8,DMA Command Address register for Channel 8"
|
|
bitfld.long 0x8C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x8C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x8C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x8C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x8C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x8C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x8C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x8C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x8C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x8C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x8C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x8C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x8C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x90 "DDADR9,DMA Descriptor Address register for Channel 9"
|
|
hexmask.long 0x90 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x90 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x90 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x94 "DSADR9,DMA Source Address register for Channel 9"
|
|
hexmask.long 0x94 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x94 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x98 "DTADR9,DMA Target Address register for Channel 9"
|
|
hexmask.long 0x98 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x98 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x9C "DCMD9,DMA Command Address register for Channel 9"
|
|
bitfld.long 0x9C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x9C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x9C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x9C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x9C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x9C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x9C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x9C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x9C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x9C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x9C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x9C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x9C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0xA0 "DDADR10,DMA Descriptor Address register for Channel 10"
|
|
hexmask.long 0xA0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0xA0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0xA0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0xA4 "DSADR10,DMA Source Address register for Channel 10"
|
|
hexmask.long 0xA4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xA4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0xA8 "DTADR10,DMA Target Address register for Channel 10"
|
|
hexmask.long 0xA8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xA8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0xAC "DCMD10,DMA Command Address register for Channel 10"
|
|
bitfld.long 0xAC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0xAC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0xAC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0xAC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0xAC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0xAC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0xAC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xAC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xAC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0xAC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0xAC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0xAC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0xAC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0xB0 "DDADR11,DMA Descriptor Address register for Channel 11"
|
|
hexmask.long 0xB0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0xB0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0xB0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0xB4 "DSADR11,DMA Source Address register for Channel 11"
|
|
hexmask.long 0xB4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xB4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0xB8 "DTADR11,DMA Target Address register for Channel 11"
|
|
hexmask.long 0xB8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xB8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0xBC "DCMD11,DMA Command Address register for Channel 11"
|
|
bitfld.long 0xBC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0xBC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0xBC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0xBC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0xBC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0xBC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0xBC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xBC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xBC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0xBC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0xBC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0xBC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0xBC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0xC0 "DDADR12,DMA Descriptor Address register for Channel 12"
|
|
hexmask.long 0xC0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0xC0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0xC0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0xC4 "DSADR12,DMA Source Address register for Channel 12"
|
|
hexmask.long 0xC4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xC4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0xC8 "DTADR12,DMA Target Address register for Channel 12"
|
|
hexmask.long 0xC8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xC8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0xCC "DCMD12,DMA Command Address register for Channel 12"
|
|
bitfld.long 0xCC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0xCC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0xCC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0xCC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0xCC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0xCC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0xCC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xCC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xCC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0xCC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0xCC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0xCC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0xCC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0xD0 "DDADR13,DMA Descriptor Address register for Channel 13"
|
|
hexmask.long 0xD0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0xD0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0xD0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0xD4 "DSADR13,DMA Source Address register for Channel 13"
|
|
hexmask.long 0xD4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xD4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0xD8 "DTADR13,DMA Target Address register for Channel 13"
|
|
hexmask.long 0xD8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xD8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0xDC "DCMD13,DMA Command Address register for Channel 13"
|
|
bitfld.long 0xDC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0xDC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0xDC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0xDC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0xDC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0xDC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0xDC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xDC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xDC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0xDC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0xDC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0xDC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0xDC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0xE0 "DDADR14,DMA Descriptor Address register for Channel 14"
|
|
hexmask.long 0xE0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0xE0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0xE0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0xE4 "DSADR14,DMA Source Address register for Channel 14"
|
|
hexmask.long 0xE4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xE4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0xE8 "DTADR14,DMA Target Address register for Channel 14"
|
|
hexmask.long 0xE8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xE8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0xEC "DCMD14,DMA Command Address register for Channel 14"
|
|
bitfld.long 0xEC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0xEC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0xEC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0xEC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0xEC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0xEC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0xEC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xEC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xEC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0xEC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0xEC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0xEC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0xEC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0xF0 "DDADR15,DMA Descriptor Address register for Channel 15"
|
|
hexmask.long 0xF0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0xF0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0xF0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0xF4 "DSADR15,DMA Source Address register for Channel 15"
|
|
hexmask.long 0xF4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xF4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0xF8 "DTADR15,DMA Target Address register for Channel 15"
|
|
hexmask.long 0xF8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0xF8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0xFC "DCMD15,DMA Command Address register for Channel 15"
|
|
bitfld.long 0xFC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0xFC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0xFC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0xFC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0xFC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0xFC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0xFC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xFC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0xFC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0xFC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0xFC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0xFC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0xFC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x100 "DDADR16,DMA Descriptor Address register for Channel 16"
|
|
hexmask.long 0x100 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x100 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x100 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x104 "DSADR16,DMA Source Address register for Channel 16"
|
|
hexmask.long 0x104 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x104 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x108 "DTADR16,DMA Target Address register for Channel 16"
|
|
hexmask.long 0x108 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x108 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x10C "DCMD16,DMA Command Address register for Channel 16"
|
|
bitfld.long 0x10C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x10C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x10C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x10C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x10C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x10C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x10C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x10C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x10C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x10C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x10C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x10C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x110 "DDADR17,DMA Descriptor Address register for Channel 17"
|
|
hexmask.long 0x110 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x110 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x110 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x114 "DSADR17,DMA Source Address register for Channel 17"
|
|
hexmask.long 0x114 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x114 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x118 "DTADR17,DMA Target Address register for Channel 17"
|
|
hexmask.long 0x118 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x118 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x11C "DCMD17,DMA Command Address register for Channel 17"
|
|
bitfld.long 0x11C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x11C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x11C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x11C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x11C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x11C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x11C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x11C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x11C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x11C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x11C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x11C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x11C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x120 "DDADR18,DMA Descriptor Address register for Channel 18"
|
|
hexmask.long 0x120 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x120 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x120 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x124 "DSADR18,DMA Source Address register for Channel 18"
|
|
hexmask.long 0x124 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x124 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x128 "DTADR18,DMA Target Address register for Channel 18"
|
|
hexmask.long 0x128 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x128 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x12C "DCMD18,DMA Command Address register for Channel 18"
|
|
bitfld.long 0x12C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x12C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x12C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x12C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x12C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x12C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x12C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x12C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x12C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x12C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x12C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x12C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x12C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x130 "DDADR19,DMA Descriptor Address register for Channel 19"
|
|
hexmask.long 0x130 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x130 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x130 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x134 "DSADR19,DMA Source Address register for Channel 19"
|
|
hexmask.long 0x134 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x134 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x138 "DTADR19,DMA Target Address register for Channel 19"
|
|
hexmask.long 0x138 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x138 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x13C "DCMD19,DMA Command Address register for Channel 19"
|
|
bitfld.long 0x13C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x13C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x13C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x13C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x13C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x13C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x13C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x13C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x13C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x13C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x13C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x13C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x13C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x140 "DDADR20,DMA Descriptor Address register for Channel 20"
|
|
hexmask.long 0x140 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x140 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x140 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x144 "DSADR20,DMA Source Address register for Channel 20"
|
|
hexmask.long 0x144 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x144 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x148 "DTADR20,DMA Target Address register for Channel 20"
|
|
hexmask.long 0x148 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x148 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x14C "DCMD20,DMA Command Address register for Channel 20"
|
|
bitfld.long 0x14C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x14C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x14C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x14C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x14C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x14C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x14C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x14C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x14C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x14C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x14C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x14C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x14C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x150 "DDADR21,DMA Descriptor Address register for Channel 21"
|
|
hexmask.long 0x150 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x150 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x150 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x154 "DSADR21,DMA Source Address register for Channel 21"
|
|
hexmask.long 0x154 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x154 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x158 "DTADR21,DMA Target Address register for Channel 21"
|
|
hexmask.long 0x158 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x158 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x15C "DCMD21,DMA Command Address register for Channel 21"
|
|
bitfld.long 0x15C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x15C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x15C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x15C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x15C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x15C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x15C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x15C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x15C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x15C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x15C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x15C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x15C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x160 "DDADR22,DMA Descriptor Address register for Channel 22"
|
|
hexmask.long 0x160 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x160 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x160 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x164 "DSADR22,DMA Source Address register for Channel 22"
|
|
hexmask.long 0x164 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x164 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x168 "DTADR22,DMA Target Address register for Channel 22"
|
|
hexmask.long 0x168 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x168 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x16C "DCMD22,DMA Command Address register for Channel 22"
|
|
bitfld.long 0x16C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x16C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x16C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x16C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x16C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x16C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x16C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x16C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x16C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x16C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x16C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x16C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x16C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x170 "DDADR23,DMA Descriptor Address register for Channel 23"
|
|
hexmask.long 0x170 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x170 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x170 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x174 "DSADR23,DMA Source Address register for Channel 23"
|
|
hexmask.long 0x174 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x174 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x178 "DTADR23,DMA Target Address register for Channel 23"
|
|
hexmask.long 0x178 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x178 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x17C "DCMD23,DMA Command Address register for Channel 23"
|
|
bitfld.long 0x17C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x17C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x17C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x17C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x17C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x17C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x17C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x17C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x17C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x17C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x17C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x17C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x17C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x180 "DDADR24,DMA Descriptor Address register for Channel 24"
|
|
hexmask.long 0x180 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x180 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x180 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x184 "DSADR24,DMA Source Address register for Channel 24"
|
|
hexmask.long 0x184 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x184 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x188 "DTADR24,DMA Target Address register for Channel 24"
|
|
hexmask.long 0x188 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x188 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x18C "DCMD24,DMA Command Address register for Channel 24"
|
|
bitfld.long 0x18C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x18C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x18C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x18C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x18C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x18C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x18C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x18C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x18C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x18C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x18C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x18C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x18C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x190 "DDADR25,DMA Descriptor Address register for Channel 25"
|
|
hexmask.long 0x190 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x190 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x190 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x194 "DSADR25,DMA Source Address register for Channel 25"
|
|
hexmask.long 0x194 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x194 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x198 "DTADR25,DMA Target Address register for Channel 25"
|
|
hexmask.long 0x198 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x198 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x19C "DCMD25,DMA Command Address register for Channel 25"
|
|
bitfld.long 0x19C 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x19C 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x19C 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x19C 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x19C 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x19C 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x19C 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x19C 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x19C 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x19C 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x19C 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x19C 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x19C 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x1A0 "DDADR26,DMA Descriptor Address register for Channel 26"
|
|
hexmask.long 0x1A0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x1A0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x1A0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x1A4 "DSADR26,DMA Source Address register for Channel 26"
|
|
hexmask.long 0x1A4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1A4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x1A8 "DTADR26,DMA Target Address register for Channel 26"
|
|
hexmask.long 0x1A8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1A8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x1AC "DCMD26,DMA Command Address register for Channel 26"
|
|
bitfld.long 0x1AC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x1AC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x1AC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x1AC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x1AC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x1AC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1AC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1AC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1AC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x1AC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x1AC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x1AC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x1AC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x1B0 "DDADR27,DMA Descriptor Address register for Channel 27"
|
|
hexmask.long 0x1B0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x1B0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x1B0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x1B4 "DSADR27,DMA Source Address register for Channel 27"
|
|
hexmask.long 0x1B4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1B4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x1B8 "DTADR27,DMA Target Address register for Channel 27"
|
|
hexmask.long 0x1B8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1B8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x1BC "DCMD27,DMA Command Address register for Channel 27"
|
|
bitfld.long 0x1BC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x1BC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x1BC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x1BC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x1BC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x1BC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1BC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1BC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1BC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x1BC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x1BC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x1BC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x1BC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x1C0 "DDADR28,DMA Descriptor Address register for Channel 28"
|
|
hexmask.long 0x1C0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x1C0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x1C0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x1C4 "DSADR28,DMA Source Address register for Channel 28"
|
|
hexmask.long 0x1C4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1C4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x1C8 "DTADR28,DMA Target Address register for Channel 28"
|
|
hexmask.long 0x1C8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1C8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x1CC "DCMD28,DMA Command Address register for Channel 28"
|
|
bitfld.long 0x1CC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x1CC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x1CC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x1CC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x1CC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x1CC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1CC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1CC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1CC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x1CC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x1CC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x1CC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x1CC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x1D0 "DDADR29,DMA Descriptor Address register for Channel 29"
|
|
hexmask.long 0x1D0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x1D0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x1D0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x1D4 "DSADR29,DMA Source Address register for Channel 29"
|
|
hexmask.long 0x1D4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1D4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x1D8 "DTADR29,DMA Target Address register for Channel 29"
|
|
hexmask.long 0x1D8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1D8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x1DC "DCMD29,DMA Command Address register for Channel 29"
|
|
bitfld.long 0x1DC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x1DC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x1DC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x1DC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x1DC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x1DC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1DC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1DC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1DC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x1DC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x1DC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x1DC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x1DC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x1E0 "DDADR30,DMA Descriptor Address register for Channel 30"
|
|
hexmask.long 0x1E0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x1E0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x1E0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x1E4 "DSADR30,DMA Source Address register for Channel 30"
|
|
hexmask.long 0x1E4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1E4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x1E8 "DTADR30,DMA Target Address register for Channel 30"
|
|
hexmask.long 0x1E8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1E8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x1EC "DCMD30,DMA Command Address register for Channel 30"
|
|
bitfld.long 0x1EC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x1EC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x1EC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x1EC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x1EC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x1EC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1EC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1EC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1EC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x1EC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x1EC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x1EC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x1EC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
line.long 0x1F0 "DDADR31,DMA Descriptor Address register for Channel 31"
|
|
hexmask.long 0x1F0 04.--31. 0x10 " DA ,Descriptor Address"
|
|
bitfld.long 0x1F0 01. " BREN ,Enable Descriptor Branching" "dis,ena"
|
|
bitfld.long 0x1F0 00. " STOP ,Stop Channel" "run,stop"
|
|
line.long 0x1F4 "DSADR31,DMA Source Address register for Channel 31"
|
|
hexmask.long 0x1F4 2.--31. 0x4 " SRCADDR ,Source address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1F4 0.--1. " SA/res , SRCADDR or reserved" "00,01,10,11"
|
|
line.long 0x1F8 "DTADR31,DMA Target Address register for Channel 31"
|
|
hexmask.long 0x1F8 02.--31. 0x4 " TRGADDR ,Target address of the on-chip peripheral or address of a memory location"
|
|
bitfld.long 0x1F8 0.--1. " TA/res ,TRGADDR or reserved" "00,01,10,11"
|
|
line.long 0x1FC "DCMD31,DMA Command Address register for Channel 31"
|
|
bitfld.long 0x1FC 31. " INCSRCADDR ,Source Address Increment" "no,yes"
|
|
bitfld.long 0x1FC 30. " INCTRGADDR ,Target Address Increment" "no,yes"
|
|
bitfld.long 0x1FC 29. " FLOWSRC ,Source Flow Control" "noWait,wait"
|
|
textline " "
|
|
bitfld.long 0x1FC 28. " FLOWTRG ,Target Flow Control" "noWait,wait"
|
|
bitfld.long 0x1FC 25. " CMPEN ,Descriptor Compare Enable" "dis,ena"
|
|
bitfld.long 0x1FC 23. " ADDRMODE ,ADDRMODE or reserved" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1FC 22. " STARTIRQEN ,STARTIRQEN or reserved-Start Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1FC 21. " EndIrqEn ,End Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x1FC 20. " FLYBYS ,Fly-By Source" "flowThr,flyBy"
|
|
textline " "
|
|
bitfld.long 0x1FC 19. " FLYBYT ,Fly-By Target" "flowThr,flyBy"
|
|
bitfld.long 0x1FC 16.--17. " SIZE ,Maximum Burst Size of Each Data Transfer" "res,8-byte,16-byte,32-byte"
|
|
bitfld.long 0x1FC 14.--15. " WIDTH ,WIDTH or reserved-Width of On-Chip Peripheral" "res,1-byte,2-byte,4-byte"
|
|
textline " "
|
|
hexmask.long.word 0x1FC 0.--12. 1. " LEN ,Length of Transfer in Bytes"
|
|
group 0x1100++0x03
|
|
line.long 0x00 "DRCMR64,Request to Channel Map register for Memory Stick receive request"
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1104++0x03
|
|
line.long 0x00 "DRCMR65,Request to Channel Map register for Memory Stick transmit request"
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1108++0x03
|
|
line.long 0x00 "DRCMR66,Request to Channel Map register for SSP3 receive request"
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x110C++0x03
|
|
line.long 0x00 "DRCMR67,Request to Channel Map register for SSP3 transmit request"
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1110++0x03
|
|
line.long 0x00 "DRCMR68,Request to Channel Map register for Quick Capture Interface Receive Request 0"
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1114++0x03
|
|
line.long 0x00 "DRCMR69,Request to Channel Map register for Quick Capture Interface Receive Request 1"
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1118++0x03
|
|
line.long 0x00 "DRCMR70,Request to Channel Map register for Quick Capture Interface Receive Request 2"
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x1128++0x03
|
|
line.long 0x00 "DRCMR74,Request to Channel Map register for DREQ<2> (companion chip request 2)"
|
|
bitfld.long 0x00 07. " MAPVLD ,Map Valid Channel-Defines whether the request is mapped to a valid channel" "unmap,mapped"
|
|
hexmask.long.byte 0x00 00.--04. 1. " CHLNUM ,Channel Number-Indicates the valid channel number if DRCMRx[MAPVLD] is set"
|
|
group 0x8000020++0x03
|
|
line.long 0x00 "FLYCNFG,Fly-by DMA DVAL<1:0> polarities"
|
|
bitfld.long 0x00 6. " FBPOL1 ,Fly-By DMA DVAL<1> Polarity" "actLow,actHi"
|
|
bitfld.long 0x00 0. " FBPOL0 ,Fly-By DMA DVAL<0> Polarity" "actLow,actHi"
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; PXA27x
|
|
; State: preliminary
|
|
; --------------------------------------------------------------------------------
|
|
tree "Memory Controller"
|
|
; --------------------------------------------------------------------------------
|
|
width 10.
|
|
base asd:0x48000000
|
|
group 0x00++0x03
|
|
line.long 0x00 "MDCNFG,SDRAM Configuration Register 0"
|
|
bitfld.long 0x00 31. " MDENX ,SDRAM 1 GB Memory Map Enable" "256MB,1GB"
|
|
bitfld.long 0x00 30. " DCACX2 ,Extra Column Addressing-Used with MDCNFG[DCAC2]" "0,1"
|
|
bitfld.long 0x00 28. " DSA1110_2 ,SA-1110 Addressing Mode Compatibility" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SETALWAYS ,Set Reserved Bit" "-,set"
|
|
bitfld.long 0x00 26. " DADDR2 ,Alternate Addressing Mode" "nrml,AAM"
|
|
bitfld.long 0x00 24.--25. " DTC2 ,AC timing parameters for SDRAM partition pair 2/3(tRP/CL/tRCD/tRASMIN/tRC in clocks)" "2/2/1/3/4,2/2/2/5/8,3/3/3/7/10,3/3/3/7/11"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DNB2 ,Number of Banks in Partition Pair 2/3" "2,4"
|
|
bitfld.long 0x00 21.--22. " DRAC2 ,SDRAM Row Address Bit Count for Partition Pair 2/3" "11-bit,12-bit,13-bit,res"
|
|
bitfld.long 0x00 19.--20. " DCAC2 ,SDRAM Column Address Bits for Partition Pair 2/3-Use in conjunction with DCACX2 (DCACX2 concatenated with DCAC2)" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DWID2 ,SDRAM Data Bus Width for Partition Pair 2/3" "32bit,16bit"
|
|
bitfld.long 0x00 17. " DE3 ,SDRAM Enable for Partition 3" "dis,ena"
|
|
bitfld.long 0x00 16. " DE2 ,SDRAM Enable for Partition 2" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STACK1 ,Stack 1" "0,1"
|
|
bitfld.long 0x00 14. " DCACX0 ,Extra Column Addressing" "0,1"
|
|
bitfld.long 0x00 13. " STACK0 ,Stack 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DSA1110_0 ,SA-1110 Addressing Mode Compatibility" "no,yes"
|
|
bitfld.long 0x00 11. " SETALWAYS ,Set Reserved Bit" "-,set"
|
|
bitfld.long 0x00 10. " DADDR0 ,Alternate Addressing Mode" "nrml,AAM"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DTC0 ,AC timing parameters for SDRAM partition pair 0/1(tRP/CL/tRCD/tRASMIN/tRC in clocks)" "2/2/1/3/4,2/2/2/5/8,3/3/3/7/10,3/3/3/7/11"
|
|
bitfld.long 0x00 7. " DNB0 ,Number of Banks in Partition Pair 0/1" "2,4"
|
|
bitfld.long 0x00 5.--6. " DRAC0 ,SDRAM Row Address Bit Count for Partition Pair 0/1" "11bit,12bit,13bit,res"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " DCAC0 ,SDRAM Column Address Bits for Partition Pair 0/1-Use in conjunction with DCACX0 (DCACX0 concatenated with DCAC0)" "00,01,10,11"
|
|
bitfld.long 0x00 2. " DWID0 ,SDRAM Data Bus Width for Partition Pair 0/1" "32bit,16bit"
|
|
bitfld.long 0x00 1. " DE1 ,SDRAM Enable for Partition 1" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DE0 ,SDRAM Enable for Partition 0" "dis,ena"
|
|
group 0x04++0x03
|
|
line.long 0x00 "MDREFR,SDRAM Refresh Control Register"
|
|
bitfld.long 0x00 31. " ALTREFA ,Exiting Alternate Bus Master Mode Refresh Control" "rfrsh,noRfrsh"
|
|
bitfld.long 0x00 30. " ALTREFB ,Entering Alternate Bus Master Mode Refresh Control" "rfrsh,noRfrsh"
|
|
bitfld.long 0x00 29. " K0DB4 ,Synchronous Static Memory Clock Pin 0 (SDCLK<0> and SDCLK<3>)" "K0DB2,CLK_MEM/4"
|
|
textline " "
|
|
bitfld.long 0x00 25. " K2FREE ,SDRAM Free-Running Control SDCLK2" "no,yes"
|
|
bitfld.long 0x00 24. " K1FREE ,SDRAM Free-Running Control SDCLK1" "no,yes"
|
|
bitfld.long 0x00 23. " K0FREE ,SDRAM Free-Running Control SDCLK0" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SLFRSH ,SDRAM Self-Refresh Control/Status" "dis,ena"
|
|
bitfld.long 0x00 20. " APD ,SDRAM/Synchronous Static Memory Auto Power-Down Enable" "dis,ena"
|
|
bitfld.long 0x00 19. " K2DB2 ,SDRAM Clock Pin 2 (SDCLK2) Divide by 2 Control/Status" "MEMCLK,MEMCLK/2"
|
|
textline " "
|
|
bitfld.long 0x00 18. " K2RUN ,SDRAM Clock Pin 2 (SDCLK2) Run Control/Status" "dis,ena"
|
|
bitfld.long 0x00 17. " K1DB2 ,SDRAM Clock Pin 1 (SDCLK1) Divide by 2 Control/Status" "MEMCLK,MEMCLK/2"
|
|
bitfld.long 0x00 16. " K1RUN ,SDRAM Clock Pin 1 (SDCLK1) Run Control/Status" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E1PIN ,Clock Enable Pin 1 (SDCKE1) Level Control/Status" "dis,ena"
|
|
bitfld.long 0x00 14. " K0DB2 ,SDRAM Clock Pin 0 (SDCLK0) Divide by 2 Control/Status" "MEMCLK,MEMCLK/2"
|
|
bitfld.long 0x00 13. " K0RUN ,SDRAM Clock Pin 0 (SDCLK0) Run Control/Status" "dis,ena"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " DRI ,SDRAM refresh interval, all partitions"
|
|
group 0x08++0x0b
|
|
line.long 0x00 "MSC0,Static Memory Control Register 0"
|
|
bitfld.long 0x00 31. " RBUFF1 ,Return Buffer vs. Streaming behavior" "slower,faster"
|
|
bitfld.long 0x00 28.--30. " RRR1 ,ROM/SRAM recovery time" "1,3,5,7,9,11,13,15"
|
|
bitfld.long 0x00 24.--27. " RDN1 ,ROM delay next access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " RDF1 ,ROM delay first access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
bitfld.long 0x00 19. " RBW1 ,ROM bus width" "32 bit,16 bit"
|
|
bitfld.long 0x00 16.--18. " RT1 ,ROM type" "NonburstROM/Flash,SRAM,BrstOf4ROM/Flash,BrstOf8ROM/Flash,VLIO,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RBUFF0 ,Return Buffer vs. Streaming behavior" "slower,faster"
|
|
bitfld.long 0x00 12.--14. " RRR0 ,ROM/SRAM recovery time" "1,3,5,7,9,11,13,15"
|
|
bitfld.long 0x00 8.--11. " RDN0 ,ROM delay next access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " RDF0 ,ROM delay first access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
bitfld.long 0x00 3. " RBW0 ,ROM bus width" "32 bit,16 bit"
|
|
bitfld.long 0x00 0.--2. " RT0 ,ROM type" "NonburstROM/Flash,SRAM,BrstOf4ROM/Flash,BrstOf8ROM/Flash,VLIO,res,res,res"
|
|
line.long 0x04 "MSC1,Static Memory Control Register 1"
|
|
bitfld.long 0x04 31. " RBUFF3 ,Return Buffer vs. Streaming behavior" "slower,faster"
|
|
bitfld.long 0x04 28.--30. " RRR3 ,ROM/SRAM recovery time" "1,3,5,7,9,11,13,15"
|
|
bitfld.long 0x04 24.--27. " RDN3 ,ROM delay next access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
textline " "
|
|
bitfld.long 0x04 20.--23. " RDF3 ,ROM delay first access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
bitfld.long 0x04 19. " RBW3 ,ROM bus width" "32 bit,16 bit"
|
|
bitfld.long 0x04 16.--18. " RT3 ,ROM type" "NonburstROM/Flash,SRAM,BrstOf4ROM/Flash,BrstOf8ROM/Flash,VLIO,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x04 15. " RBUFF2 ,Return Buffer vs. Streaming behavior" "slower,faster"
|
|
bitfld.long 0x04 12.--14. " RRR2 ,ROM/SRAM recovery time" "1,3,5,7,9,11,13,15"
|
|
bitfld.long 0x04 8.--11. " RDN2 ,ROM delay next access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " RDF2 ,ROM delay first access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
bitfld.long 0x04 3. " RBW2 ,ROM bus width" "32 bit,16 bit"
|
|
bitfld.long 0x04 0.--2. " RT2 ,ROM type" "NonburstROM/Flash,SRAM,BrstOf4ROM/Flash,BrstOf8ROM/Flash,VLIO,res,res,res"
|
|
line.long 0x08 "MSC2,Static Memory Control Register 2"
|
|
bitfld.long 0x08 31. " RBUFF5 ,Return Buffer vs. Streaming behavior" "slower,faster"
|
|
bitfld.long 0x08 28.--30. " RRR5 ,ROM/SRAM recovery time" "1,3,5,7,9,11,13,15"
|
|
bitfld.long 0x08 24.--27. " RDN5 ,ROM delay next access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
textline " "
|
|
bitfld.long 0x08 20.--23. " RDF5 ,ROM delay first access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
bitfld.long 0x08 19. " RBW5 ,ROM bus width" "32 bit,16 bit"
|
|
bitfld.long 0x08 16.--18. " RT5 ,ROM type" "NonburstROM/Flash,SRAM,BrstOf4ROM/Flash,BrstOf8ROM/Flash,VLIO,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x08 15. " RBUFF4 ,Return Buffer vs. Streaming behavior" "slower,faster"
|
|
bitfld.long 0x08 12.--14. " RRR4 ,ROM/SRAM recovery time" "1,3,5,7,9,11,13,15"
|
|
bitfld.long 0x08 8.--11. " RDN4 ,ROM delay next access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " RDF4 ,ROM delay first access" "0,1,2,3,4,5,6,7,8,9,10,11,15,20,26,30"
|
|
bitfld.long 0x08 3. " RBW4 ,ROM bus width" "32 bit,16 bit"
|
|
bitfld.long 0x08 0.--2. " RT4 ,ROM type" "NonburstROM/Flash,SRAM,BrstOf4ROM/Flash,BrstOf8ROM/Flash,VLIO,res,res,res"
|
|
group 0x14++0x03
|
|
line.long 0x00 "MECR,Expansion Memory (PCMCIA/Compact Flash) Bus Configuration Register"
|
|
bitfld.long 0x00 1. " CIT ,Card-Is-There" "no,yes"
|
|
bitfld.long 0x00 0. " NOS ,Number-of-Sockets" "1,2"
|
|
group 0x1c++0x03
|
|
line.long 0x00 "SXCNFG,Sychronous Static Memory Control Register"
|
|
bitfld.long 0x00 31. " SXCLEXT2 ,Synchronous Flash Memory CAS Latency Extension for SXCL2" "0,1"
|
|
bitfld.long 0x00 28.--29. " SXTP2 ,SX Memory Type for Partition Pair 2/3" "res,res,brstOf8,BrstOf16"
|
|
bitfld.long 0x00 18.--20. " SXCL2 ,CAS Latency for SX Memory Partition Pair 2/3" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SXEN3 ,SX Memory Partition 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 16. " SXEN2 ,SX Memory Partition 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 15. " SXCLEXT0 ,Synchronous Flash Memory CAS Latency Extension for SXCL0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SXTP0 ,SX Memory Type for Partition Pair 0/1" "res,res,brstOf8,brstOf16"
|
|
bitfld.long 0x00 2.--4. " SXCL0 ,CAS Latency for SX Memory Partition Pair 0/1-Use in conjunction with SXCNFG[SXCLEXT0]" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x00 1. " SXEN1 ,SX Memory Partition 1 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SXEN0 ,SX Memory Partition 0 Enable" "dis,ena"
|
|
group 0x20++0x03
|
|
line.long 0x00 "FLYCNFG,DMA Fly-By Configuration Register"
|
|
bitfld.long 0x00 16. " FBPOL1 ,Fly-By DMA DVAL<1> Polarity" "Low,High"
|
|
bitfld.long 0x00 0. " FBPOL0 ,Fly-By DMA DVAL<0> Polarity" "Low,High"
|
|
group 0x28++0x03
|
|
line.long 0x00 "MCMEM0,PC Card Interface Common Memory Space Socket 0 Timing Configuration register"
|
|
hexmask.long.byte 0x00 14.--19. 1. " HOLD ,MCMEM0 Address Hold"
|
|
hexmask.long.byte 0x00 7.--11. 1. " ASST ,MCMEM0 Command Assert"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SET ,MCMEM0 Address Setup"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "MCMEM1,PC Card Interface Common Memory Space Socket 1 Timing Configuration register"
|
|
hexmask.long.byte 0x00 14.--19. 1. " HOLD ,MCMEM1 Address Hold"
|
|
hexmask.long.byte 0x00 7.--11. 1. " ASST ,MCMEM1 Command Assert"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SET ,MCMEM1 Address Setup"
|
|
group 0x30++0x03
|
|
line.long 0x00 "MCATT0,PC Card Interface Attribute Space Socket 0 Timing Configuration register"
|
|
hexmask.long.byte 0x00 14.--19. 1. " HOLD ,MCATT0 Address Hold"
|
|
hexmask.long.byte 0x00 7.--11. 1. " ASST ,MCATT0 Command Assert"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SET ,MCATT0 Address Setup"
|
|
group 0x34++0x03
|
|
line.long 0x00 "MCATT1,PC Card Interface Attribute Space Socket 1 Timing Configuration register"
|
|
hexmask.long.byte 0x00 14.--19. 1. " HOLD ,MCATT1 Address Hold"
|
|
hexmask.long.byte 0x00 7.--11. 1. " ASST ,MCATT1 Command Assert"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SET ,MCATT1 Address Setup"
|
|
group 0x38++0x07
|
|
line.long 0x00 "MCIO0,Card Interface I/O Space Socket 0 Timing Configuration"
|
|
hexmask.long.byte 0x00 14.--19. 1 " HOLD ,MCIO0 Address Hold"
|
|
hexmask.long.byte 0x00 7.--11. 1 " ASST ,MCIO0 Command Assertion"
|
|
hexmask.long.byte 0x00 0.--6. 1 " SET ,MCIO0 Address Setup"
|
|
line.long 0x04 "MCIO1,Card Interface I/O Space Socket 1 Timing Configuration"
|
|
hexmask.long.byte 0x04 14.--19. 1 " HOLD ,MCIO0 Address Hold"
|
|
hexmask.long.byte 0x04 7.--11. 1 " ASST ,MCIO0 Command Assertion"
|
|
hexmask.long.byte 0x04 0.--6. 1 " SET ,MCIO0 Address Setup"
|
|
group 0x40++0x03
|
|
line.long 0x00 "MDMRS,MRS value to be written to SDRAM"
|
|
hexmask.long.byte 0x00 23.--30. 1 " MDMRS2 ,MRS value to be written to SDRAM for partition pair 2/3"
|
|
hexmask.long.byte 0x00 20.--22. 1 " MDCL2 , SDRAM partition pair 2 CAS Latency"
|
|
bitfld.long 0x00 19. " MDADD2 ,SDRAM partition pair 2 Burst Type" "sequential,sequential"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " MDBL2 ,SDRAM partition pair 2 Burst Length" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--14. 1 " MDMRS0 ,MRS value to be written to SDRAM for partition pair 0"
|
|
hexmask.long.byte 0x00 4.--6. 1 " MDCL0 , SDRAM partition pair 0 CAS Latency"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MDADD0 ,SDRAM partition pair 0 Burst Type" "sequential,sequential"
|
|
bitfld.long 0x00 0.--2. " MDBL0 ,SDRAM partition pair 0 Burst Length" "0,1,2,3,4,5,6,7"
|
|
rgroup 0x44++0x03
|
|
line.long 0x00 "BOOT_DEF,Boot Time Default Configuration register"
|
|
bitfld.long 0x00 3. " PKG_TYPE ,Package Type" "res,32-bit"
|
|
bitfld.long 0x00 0. " BOOT_SEL ,Boot Select" "low,high"
|
|
group 0x48++0x03
|
|
line.long 0x00 "ARB_CNTL,Arbiter Control register"
|
|
bitfld.long 0x00 31. " DMA_SLV_park ,Bus is parked with DMA slave when idle" "no,yes"
|
|
bitfld.long 0x00 30. " CI_park ,Bus is parked with quick capture interface when idle" "no,yes"
|
|
bitfld.long 0x00 29. " EX_MEM_park ,Bus is parked with external memory controller when idle" "no,ye"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_MEM_park ,Bus is parked with internal memory controller when idle" "no,yes"
|
|
bitfld.long 0x00 27. " USB_park ,Bus is parked with USB host controller when idle" "no,yes"
|
|
bitfld.long 0x00 26. " LCD_park ,Bus is parked with LCD controller when idle" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMA_park ,Bus is parked with DMA controller when idle" "no,yes"
|
|
bitfld.long 0x00 24. " Core_park ,Bus is parked with core when idle" "no,yes"
|
|
bitfld.long 0x00 23. " LOCK_FLAG ,Only locking masters gain access to the bus" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 08.--11. " LCD_Wt ,LCD Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 04.--07. " DMA_Wt ,DMA Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 00.--03. " Core_Wt ,Core Priority Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "BSCNTR0,System Memory Buffer Strength Control register 0"
|
|
bitfld.long 0x00 28.--31. " CKE1BS ,SDCKE Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 24.--27. " CLK2BS ,SDCLK<2> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 20.--23. " CLK1BS ,SDCLK<1> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CLK0BS ,SDCLK<0> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 12.--15. " RASBS ,SDRAS Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 08.--11. " CASBS ,SDCAS Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 04.--07. " MDHBS ,MD<31:16> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 00.--03. " MDLBS ,MD<15:0> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
group 0x50++0x03
|
|
line.long 0x00 "BSCNTR1,System Memory Buffer Strength Control register 1"
|
|
bitfld.long 0x00 28.--31. " DQM32BS ,DQM<3:2> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 24.--27. " DQM10BS ,DQM<1:0> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 20.--23. " SDCS32BS ,SDCS<3:2> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " SDCS10BS ,SDCS<1:0> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 12.--15. " WEBS ,nWE Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 08.--11. " OEBS ,nOE Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 04.--07. " SDCAS_DELAY ,SDCAS Return Signal Timing Delay" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 00.--03. " RDnWRBS ,RDnWR Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
group 0x54++0x03
|
|
line.long 0x00 "LCDBSCNTR,LCD Buffer Strength Control register"
|
|
bitfld.long 0x00 00.--03. " LCDBS ,LCD Buffer Strength" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
group 0x58++0x03
|
|
line.long 0x00 "MDMRSLP,Special Low Power SDRAM Mode Register Set Configuration register"
|
|
bitfld.long 0x00 31. " MDLPEN2 ,Low-Power Enable for Partition Pair 2/3" "dis,ena"
|
|
hexmask.long.word 0x00 16.--30. 1. " MDMRSLP2 ,Low-Power MRS Value for Partition Pair 2/3"
|
|
bitfld.long 0x00 15. " MDLPEN0 ,Low-Power Enable for Partition Pair 0/1" "dis,ena"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--14. 1. " MDMRSLP0 ,Low-Power MRS Value for Partition Pair 0/1"
|
|
group 0x5C++0x03
|
|
line.long 0x00 "BSCNTR2,System Memory Buffer Strength Control register 2"
|
|
bitfld.long 0x00 28.--31. " CS5BS ,nCS<5> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 24.--27. " CS4BS ,nCS<4> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 20.--23. " CS3BS ,nCS<3> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CS2BS ,nCS<2> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 12.--15. " CS1BS ,nCS<1> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 08.--11. " CS0BS ,nCS<0> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 04.--07. " CLK3BS ,SDCLK<3> Buffer Strength Control Bits" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 00.--03. " MA25BS ,MA<25> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
group 0x60++0x03
|
|
line.long 0x00 "BSCNTR3,System Memory Buffer Strength Control register 3"
|
|
bitfld.long 0x00 28.--31. " MA24BS ,MA<24> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 24.--27. " MA23BS ,MA<23> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 20.--23. " MA22BS ,MA<22> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MA21BS ,MA<21> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 12.--15. " MA2010BS ,MA<20:10> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 08.--11. " MA92BS ,MA<9:2> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 04.--07. " MA1BS ,MA<1> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
bitfld.long 0x00 00.--03. " MA0BS ,MA<0> Buffer Strength Control Register" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
group 0x64++0x03
|
|
line.long 0x00 "SA1110,SA-1110 Compatibility Mode for Static Memory register"
|
|
bitfld.long 0x00 12.--13. " SXSTACK ,Stacked Flash Option" "none,nCS<0>,nCS<1>,both"
|
|
bitfld.long 0x00 8. " SXENX ,Large Memory Support" "6x64Mbyte,2x64Mbyte"
|
|
bitfld.long 0x00 5. " SA1110_5 ,SA-1110 Compatibility Mode for Static Memory Partition 5" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SA1110_4 ,SA-1110 Compatibility Mode for Static Memory Partition 4" "ena,dis"
|
|
bitfld.long 0x00 3. " SA1110_3 ,SA-1110 Compatibility Mode for Static Memory Partition 3" "ena,dis"
|
|
bitfld.long 0x00 2. " SA1110_2 ,SA-1110 Compatibility Mode for Static Memory Partition 2" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SA1110_1 ,SA-1110 Compatibility Mode for Static Memory Partition 1" "ena,dis"
|
|
bitfld.long 0x00 0. " SA1110_0 ,SA-1110 Compatibility Mode for Static Memory Partition 0" "ena,dis"
|
|
tree.end
|
|
tree "LCD Controller"
|
|
width 11.
|
|
base ASD:0x44000000
|
|
group 0x000++0x03
|
|
line.long 0x00 "LCCR0, LCD Controller Control register 0"
|
|
bitfld.long 0x00 26. " LDDALT ,LDD Alternate Mapping Control Bit" "'0'&(5R)&(5G)&(5B),(5R)&(6G)&(5B)"
|
|
bitfld.long 0x00 25. " OUC ,Overlay Underlay Control Bit" "underlay,overlay"
|
|
bitfld.long 0x00 24. " CMDIM ,LCD Command Interrupt Mask" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RDSTM ,LCD Read Status Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 22. " LCDT ,LCD Panel Type" "noInFrmBuf,interFrmBuf"
|
|
bitfld.long 0x00 21. " OUM ,Output FIFO Underrun Mask" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 20. " BSM0 ,Branch Status Mask" "noMsk,mask"
|
|
hexmask.long.byte 0x00 12.--19. 1. " PDD ,Palette DMA Request Delay"
|
|
bitfld.long 0x00 11. " QDM ,LCD Quick Disable Mask" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DIS ,LCD Disable" "no,yes"
|
|
bitfld.long 0x00 09. " DPD ,Double-Pixel Data (DPD) Pin Mode" "4-pix,8-pix"
|
|
bitfld.long 0x00 07. " PAS ,Passive/Active Display Select" "passive,active"
|
|
textline " "
|
|
bitfld.long 0x00 06. " EOFM0 ,End of Frame Mask for Channel 0 and for Channel 1 (Dual Scan)" "noMsk,mask"
|
|
bitfld.long 0x00 05. " IUM ,Input FIFO Underrun Mask" "noMsk,mask"
|
|
bitfld.long 0x00 04. " SOFM0 ,Start of Frame Mask for Channel 0 and for Channel 1 (Dual Scan)" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 03. " LDM ,LCD Disable Done Mask" "noMsk,mask"
|
|
bitfld.long 0x00 02. " SDS ,Single-Scan/dual-scan Display Select" "single,dual"
|
|
bitfld.long 0x00 01. " CMS ,Color/Monochrome Select" "color,mono"
|
|
textline " "
|
|
bitfld.long 0x00 00. " ENB ,LCD Controller Enable" "dis,ena"
|
|
group 0x004++0x03
|
|
line.long 0x00 "LCCR1, LCD Controller Control register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BLW ,Beginning-of-Line Pixel Clock Wait Count"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ELW ,End-of-Line Pixel Clock Wait Count"
|
|
hexmask.long.byte 0x00 10.--15. 1. " HSW ,Horizontal Sync Pulse Width"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--09. 1. " PPL ,Pixels per Line for the Base Frame"
|
|
group 0x008++0x03
|
|
line.long 0x00 "LCCR2, LCD Controller Control register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BFW ,Beginning-of-Frame Line Clock Wait Count"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EFW ,End-of-Frame Line Clock Wait Count"
|
|
hexmask.long.byte 0x00 10.--15. 1. " VSW ,Vertical Sync Pulse Width"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--09. 1. " LPP ,Lines per Panel for the Base Frame"
|
|
group 0x00C++0x03
|
|
line.long 0x00 "LCCR3, LCD Controller Control register 3"
|
|
bitfld.long 0x00 30.--31. " PDFOR ,Pixel Data Format" "fmt1,fmt2,fmt3,fmt4"
|
|
bitfld.long 0x00 27. " DPC ,Double Pixel Clock Mode" "frqSpcfPCD,2xfrqSpcfPCD"
|
|
bitfld.long 0x00 24.--26. 29. " BPP ,Bits per Pixel-Used in conjunction with BPP3" "res,2,4,8,16,18,18,19,19,24,25,res,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x00 23. " OEP ,Output Enable Polarity" "actHi,actLow"
|
|
bitfld.long 0x00 22. " PCP ,Pixel Clock Polarity" "risEdg,fallEdg"
|
|
bitfld.long 0x00 21. " HSP ,Horizontal Sync Polarity" "actHi,actLow"
|
|
textline " "
|
|
bitfld.long 0x00 20. " VSP ,Vertical Sync Polarity" "actHi,actLow"
|
|
bitfld.long 0x00 16.--19. " API ,AC Bias Pin Transitions per Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 08.--15. 1. " ACB ,AC Bias Pin Frequency"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " PCD ,Pixel Clock Divisor"
|
|
group 0x010++0x03
|
|
line.long 0x00 "LCCR4, LCD Controller Control register 4"
|
|
bitfld.long 0x00 31. " PCDDIV ,PCD Divisor Selection" "LCLK/2*(PCD+1),LCLK/(PCD+1)"
|
|
bitfld.long 0x00 25. " 13M_PCD_EN ,13M mode Pixel Clock Divisor Enable" "dis,ena"
|
|
hexmask.long.byte 0x00 17.--24. 1. " 13M_PCD_VAL ,13M mode Pixel Clock Divisor Value"
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " PAL_FOR ,Palette Data Format" "16w/oTrnsp,25wTrnspFor16PPDF,25wTrnspFor18PPDF,wTrnspFor24PPDF"
|
|
bitfld.long 0x00 06.--08. " K3 ,Multiplication Constant for Green for Half Transparency" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,1"
|
|
bitfld.long 0x00 03.--05. " K2 ,Multiplication Constant for Blue for Half Transparency" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,1"
|
|
textline " "
|
|
bitfld.long 0x00 00.--02. " K1 ,Multiplication Constant for Red for Half Transparency" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,1"
|
|
group 0x014++0x03
|
|
line.long 0x00 "LCCR5, LCD Controller Control register 5"
|
|
bitfld.long 0x00 29. " IUM6 ,Input FIFO Underrun Mask for Command Data" "noMsk,mask"
|
|
bitfld.long 0x00 28. " IUM5 ,Input FIFO Underrun Mask for Cursor" "noMsk,mask"
|
|
bitfld.long 0x00 27. " IUM4 ,Input FIFO Underrun Mask Overlay 2" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 26. " IUM3 ,Input FIFO Underrun Mask for Overlay 2" "noMsk,mask"
|
|
bitfld.long 0x00 25. " IUM2 ,Input FIFO Underrun Mask for Overlay 2" "noMsk,mask"
|
|
bitfld.long 0x00 24. " IUM1 ,Input FIFO Underrun Mask for Overlay 1 (When Enabled)" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BSM6 ,Branch Mask for Command Register (DMA Channel 6)" "noMsk,mask"
|
|
bitfld.long 0x00 20. " BSM5 ,Branch Mask for Cursor (DMA Channel 5)" "noMsk,mask"
|
|
bitfld.long 0x00 19. " BSM4 ,Branch Mask for Overlay 2 (DMA Channel 4)" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 18. " BSM3 ,Branch Mask for Overlay 2 (DMA Channel 3)" "noMsk,mask"
|
|
bitfld.long 0x00 17. " BSM2 ,Branch Mask for Overlay 2 (DMA Channel 2)" "noMsk,mask"
|
|
bitfld.long 0x00 16. " BSM1 ,Branch Mask for Overlay 1 (DMA Channel 1)" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EOFM6 ,End Of Frame Mask for Command Data (DMA Channel 6)" "noMsk,mask"
|
|
bitfld.long 0x00 12. " EOFM5 ,End of Frame Mask for Cursor (DMA Channel 5)" "noMsk,mask"
|
|
bitfld.long 0x00 11. " EOFM4 ,End Of Frame Mask for Overlay 2 (DMA Channel 4)" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EOFM3 ,End Of Frame Mask for Overlay 2 (DMA Channel 3)" "noMsk,mask"
|
|
bitfld.long 0x00 09. " EOFM2 ,End Of Frame Mask for Overlay 2 (DMA Channel 2)" "noMsk,mask"
|
|
bitfld.long 0x00 08. " EOFM1 ,End Of Frame Mask for Overlay 1 (DMA Channel 1)" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 05. " SOFM6 ,Start Of Frame Mask for Command Data (DMA Channel 6)" "noMsk,mask"
|
|
bitfld.long 0x00 04. " SOFM5 ,Start Of Frame Mask for Cursor (DMA Channel 5)" "noMsk,mask"
|
|
bitfld.long 0x00 03. " SOFM4 ,Start Of Frame Mask for Overlay 2 (DMA Channel 4)" "noMsk,mask"
|
|
textline " "
|
|
bitfld.long 0x00 02. " SOFM3 ,Start Of Frame Mask for Overlay 2 (DMA Channel 3)" "noMsk,mask"
|
|
bitfld.long 0x00 01. " SOFM2 ,Start Of Frame Mask for Overlay 2 (DMA Channel 2)" "noMsk,mask"
|
|
bitfld.long 0x00 00. " SOFM1 ,Start Of Frame Mask for Overlay 1 (DMA Channel 1)" "noMsk,mask"
|
|
group 0x020++0x03
|
|
line.long 0x00 "FBR0, DMA Channel 0 Frame Branch register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " BRA ,Branch after Finishing the Current Frame" "no,yes"
|
|
group 0x024++0x03
|
|
line.long 0x00 "FBR1, DMA Channel 1 Frame Branch register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " BRA ,Branch after Finishing the Current Frame" "no,yes"
|
|
group 0x028++0x03
|
|
line.long 0x00 "FBR2, DMA Channel 2 Frame Branch register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " BRA ,Branch after Finishing the Current Frame" "no,yes"
|
|
group 0x02C++0x03
|
|
line.long 0x00 "FBR3, DMA Channel 3 Frame Branch register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " BRA ,Branch after Finishing the Current Frame" "no,yes"
|
|
group 0x030++0x03
|
|
line.long 0x00 "FBR4, DMA Channel 4 Frame Branch register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " BRA ,Branch after Finishing the Current Frame" "no,yes"
|
|
group 0x034++0x03
|
|
line.long 0x00 "LCSR1, LCD Controller Status register 1"
|
|
bitfld.long 0x00 29. " IU6 ,Input FIFO Underrun for Channel 6" "no,yes"
|
|
bitfld.long 0x00 28. " IU5 ,Input FIFO Underrun for Channel 5" "no,yes"
|
|
bitfld.long 0x00 27. " IU4 ,Input FIFO Underrun for Channel 4" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 26. " IU3 ,Input FIFO Underrun for Channel 3" "no,yes"
|
|
bitfld.long 0x00 25. " IU2 ,Input FIFO Underrun for Channel 2" "no,yes"
|
|
bitfld.long 0x00 21. " BS6 ,Branch Status for Channel 6 (Command Register)" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " BS5 ,Branch Status for Channel 5 (Hardware Cursor)" "no,yes"
|
|
bitfld.long 0x00 19. " BS4 ,Branch Status for Channel 4 (Overlay 2)" "no,yes"
|
|
bitfld.long 0x00 18. " BS3 ,Branch Status for Channel 3 (Overlay 2)" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BS2 ,Branch Status for Channel 2 (Overlay 2)" "no,yes"
|
|
bitfld.long 0x00 16. " BS1 ,Branch Status for Channel 1 (Overlay 1)" "no,yes"
|
|
bitfld.long 0x00 13. " EOF6 ,End of Frame Status for Command Register" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EOF5 ,End of Frame Status for Hardware Cursor" "no,yes"
|
|
bitfld.long 0x00 11. " EOF4 ,End of Frame Status for Overlay 2 (Channel 4)" "no,yes"
|
|
bitfld.long 0x00 10. " EOF3 ,End of Frame Status for Overlay 2 (Channel 3)" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 09. " EOF2 ,End of Frame Status for Overlay 2 (Channel 2)" "no,yes"
|
|
bitfld.long 0x00 08. " EOF1 ,End of Frame Status for Channel 1" "no,yes"
|
|
bitfld.long 0x00 05. " SOF6 ,Start of Frame Status for Command Register" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 04. " SOF5 ,Start of Frame Status for Hardware Cursor" "no,yes"
|
|
bitfld.long 0x00 03. " SOF4 ,Start of Frame Status for Overlay 2 (Channel 4)" "no,yes"
|
|
bitfld.long 0x00 02. " SOF3 ,Start of Frame Status for Overlay 2 (Channel 3)" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 01. " SOF2 ,Start of Frame Status for Overlay 2 (Channel 2)" "no,yes"
|
|
bitfld.long 0x00 00. " SOF1 ,Start of Frame Status for Overlay 1 (Channel 1)" "no,yes"
|
|
group 0x038++0x03
|
|
line.long 0x00 "LCSR0, LCD Controller Status register 0"
|
|
bitfld.long 0x00 28.--31. " BER_CH ,Bus Error Channel Number" "0,1,2,3,4,5,6,7,%d..."
|
|
bitfld.long 0x00 12. " CMD_INT ,Command Interrupt Status" "clr,set"
|
|
bitfld.long 0x00 11. " RD_ST ,Read Status" "clr,set"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SINT ,Subsequent Interrupt Status" "no,yes"
|
|
bitfld.long 0x00 09. " BS0 ,Branch Status for Base" "no,yes"
|
|
bitfld.long 0x00 08. " EOF0 ,End of Frame Status for Base (Channel 0)" "noSet,set"
|
|
textline " "
|
|
bitfld.long 0x00 07. " QD ,LCD Quick Disable Status" "ena,dis"
|
|
bitfld.long 0x00 06. " OU ,Output FIFO Underrun" "no,yes"
|
|
bitfld.long 0x00 05. " IU1 ,Input FIFO Underrun for Channel 1" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 04. " IU0 ,Input FIFO Underrun for Channel 0" "no,yes"
|
|
bitfld.long 0x00 03. " ABC ,AC Bias Count Status" "!=0,=0"
|
|
bitfld.long 0x00 02. " BER ,Bus Error Status" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 01. " SOF0 ,Start of Frame Status for Base (Channel 0)" "no,yes"
|
|
bitfld.long 0x00 00. " LDD ,LCD Disable Done Flag" "ena,dis"
|
|
rgroup 0x03C++0x03
|
|
line.long 0x00 "LIIDR, LCD Controller Interrupt ID register"
|
|
group 0x040++0x03
|
|
line.long 0x00 "TRGBR, TMED RGB Seed register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TBS ,TMED Blue Seed Value"
|
|
hexmask.long.byte 0x00 08.--15. 1. " TGS ,TMED Green Seed Value"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TRS ,TMED Red Seed Value"
|
|
group 0x044++0x03
|
|
line.long 0x00 "TCR, TMED Control register"
|
|
bitfld.long 0x00 14. " TED ,TMED Energy Distribution Select" "scheme1,scheme2"
|
|
bitfld.long 0x00 12.--13. " TSCS ,TMED Shades per Color Select" "33R/65B/33G,65R/G/B,129R/G/B,256R/G/B"
|
|
bitfld.long 0x00 08.--11. " THBS ,TMED Horizontal Beat Suppression" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 04.--07. " TVBS ,TMED Vertical Beat Suppression" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 03. " TM1EN ,TMED Method 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " TM2EN ,TMED Method 2 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 01. " TM1S ,TMED Method 1 Select" "scheme1,scheme2"
|
|
bitfld.long 0x00 00. " TM2S ,TMED Method 2 Select" "scheme1,scheme2"
|
|
group 0x050++0x03
|
|
line.long 0x00 "OVL1C1, Overlay 1 Control register 1"
|
|
bitfld.long 0x00 31. " O1EN ,Enable bit for Overlay 1" "dis,ena"
|
|
bitfld.long 0x00 20.--23. " BPP1 ,Bits per Pixel for Overlay 1" "24bw/oTrnsp,res,4bpp,8bpp,16bpp,18bppUnpck,18bppPack,19bppUnpck,19bppPack,24bpp,25bpp,res,res,res,res,res"
|
|
hexmask.long.word 0x00 10.--19. 1. " LPO1 ,Number of Lines for Overlay 1"
|
|
textline " "
|
|
hexmask.long 0x00 00.--09. 1. " PPL1 ,Pixels per Line for Overlay 1 Frame"
|
|
group 0x060++0x03
|
|
line.long 0x00 "OVL1C2, Overlay 1 Control register 2"
|
|
hexmask.long.word 0x00 10.--19. 1. " O1YPOS ,Vertical Position of the Upper Left-Most Pixel of Overlay 1 Window"
|
|
hexmask.long.word 0x00 00.--09. 1. " O1XPOS ,Horizontal Position of the Upper Left-Most Pixel of Overlay 1 Window"
|
|
group 0x070++0x03
|
|
line.long 0x00 "OVL2C1, Overlay 2 Control Register 1"
|
|
bitfld.long 0x00 31. " O2EN ,Overlay 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 20.--23. " BPP2 ,Bits per Pixel for Overlay 2" "res,res,4bpp,8bpp,16bpp,18bppUnpck,18bppPack,19bppUnpck,19bppPack,24bpp,25bpp,res,res,res,res,res"
|
|
hexmask.long.word 0x00 10.--19. 1. " LPO2 ,Number of Lines for Overlay 2 Frame"
|
|
textline " "
|
|
hexmask.long.word 0x00 00.--09. 1. " PPL2 ,Pixel per Line for Overlay 2 Frame"
|
|
group 0x080++0x03
|
|
line.long 0x00 "OVL2C2, Overlay 2 Control register 2"
|
|
bitfld.long 0x00 20.--22. " FOR ,Format-specifies the format of the pixel data for Overlay 2" "RGB,YCbCr 4:4:4 Packed,YCbCr 4:4:4 Planar,YCbCr 4:2:2 Planar,YCbCr 4:2:0 Planar,res,res,res"
|
|
hexmask.long.word 0x00 10.--19. 1. " O2YPOS ,Vertical Position of Upper Left Most Pixel of Overlay 2"
|
|
hexmask.long.word 0x00 00.--09. 1. " O2XPOS ,Horizontal Position of Upper Left Most Pixel of Overlay 2"
|
|
group 0x090++0x03
|
|
line.long 0x00 "CCR, Cursor Control register"
|
|
bitfld.long 0x00 31. " CEN ,Cursor Enable" "dis,ena"
|
|
hexmask.long.word 0x00 15.--24. 1. " CYPOS ,Vertical Position of the Cursor"
|
|
hexmask.long.word 0x00 05.--14. 1. " CXPOS ,Horizontal Position of the Cursor"
|
|
textline " "
|
|
bitfld.long 0x00 00.--02. " CURMS ,Cursor Mode Select" "32x32x2bpp/2clrTrnsp,32x32x2bpp/3clrTrnsp,32x32x2bpp/4clr,64x64x2bpp/2clrTrnsp,64x64x2bpp/3clrTrnsp,64x64x2bpp/4clr,128x128x1bpp/2clr,128x128x1bpp/1clrTrnsp"
|
|
group 0x100++0x03
|
|
line.long 0x00 "CMDCR, Command Control register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " SYNC_CNT ,Synchronous Count"
|
|
group 0x104++0x03
|
|
line.long 0x00 "PRSR, Panel Read Status register"
|
|
bitfld.long 0x00 10. " CON_NT ,Continue to Next Command" "wait,cntn"
|
|
bitfld.long 0x00 9. " ST_OK ,Status OK" "notOk,OK"
|
|
bitfld.long 0x00 8. " A0 ,Read Data Source" "staReg,frmBufRAM"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--7. 1. " DATA ,Panel Data"
|
|
group 0x110++0x03
|
|
line.long 0x00 "FBR5, DMA Channel 5 Frame Branch register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " BRA ,Branch after Finishing the Current Frame" "no,yes"
|
|
group 0x114++0x03
|
|
line.long 0x00 "FBR6, DMA Channel 6 Frame Branch register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Branch Address"
|
|
bitfld.long 0x00 1. " BINT ,Branch Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " BRA ,Branch after Finishing the Current Frame" "no,yes"
|
|
group 0x200++0x03
|
|
line.long 0x00 "FDADR0, DMA Channel 0 Frame Descriptor Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DA ,Descriptor Address"
|
|
group 0x204++0x03
|
|
line.long 0x00 "FSADR0, DMA Channel 0 Frame Source Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Source Address:Address of the palette or pixel frame data in memory"
|
|
group 0x208++0x03
|
|
line.long 0x00 "FIDR0, DMA Channel 0 Frame ID register"
|
|
hexmask.long 0x00 3.--31. 1. " FRMID ,Frame ID"
|
|
rgroup 0x20C++0x03
|
|
line.long 0x00 "LDCMD0, LCD DMA Channel 0 Command register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "frmBufDat,plttBufDat"
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "noSet,set"
|
|
bitfld.long 0x00 21. " EOFINT ,End of the Frame Interrupt Mask" "noSet,set"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length-The Length of transfer in bytes"
|
|
group 0x210++0x03
|
|
line.long 0x00 "FDADR1, DMA Channel 1 Frame Descriptor Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DA ,Descriptor Address"
|
|
group 0x214++0x03
|
|
line.long 0x00 "FSADR1, DMA Channel 1 Frame Source Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Source Address:Address of the palette or pixel frame data in memory"
|
|
group 0x218++0x03
|
|
line.long 0x00 "FIDR1, DMA Channel 1 Frame ID register"
|
|
hexmask.long 0x00 3.--31. 1. " FRMID ,Frame ID"
|
|
rgroup 0x21C++0x03
|
|
line.long 0x00 "LDCMD1, LCD DMA Channel 1 Command register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "frmBufDat,plttBufDat"
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "noSet,set"
|
|
bitfld.long 0x00 21. " EOFINT ,End of the Frame Interrupt Mask" "noSet,set"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length-The Length of transfer in bytes"
|
|
group 0x220++0x03
|
|
line.long 0x00 "FDADR2, DMA Channel 2 Frame Descriptor Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DA ,Descriptor Address"
|
|
group 0x224++0x03
|
|
line.long 0x00 "FSADR2, DMA Channel 2 Frame Source Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Source Address:Address of the palette or pixel frame data in memory"
|
|
group 0x228++0x03
|
|
line.long 0x00 "FIDR2, DMA Channel 2 Frame ID register"
|
|
hexmask.long 0x00 3.--31. 1. " FRMID ,Frame ID"
|
|
rgroup 0x22C++0x03
|
|
line.long 0x00 "LDCMD2, LCD DMA Channel 2 Command register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "frmBufDat,plttBufDat"
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "noSet,set"
|
|
bitfld.long 0x00 21. " EOFINT ,End of the Frame Interrupt Mask" "noSet,set"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 2.--20. 1. " LENGTH ,Length-The Length of transfer in bytes"
|
|
group 0x230++0x03
|
|
line.long 0x00 "FDADR3, DMA Channel 3 Frame Descriptor Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DA ,Descriptor Address"
|
|
group 0x234++0x03
|
|
line.long 0x00 "FSADR3, DMA Channel 3 Frame Source Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Source Address:Address of the palette or pixel frame data in memory"
|
|
group 0x238++0x03
|
|
line.long 0x00 "FIDR3, DMA Channel 3 Frame ID register"
|
|
hexmask.long 0x00 3.--31. 1. " FRMID ,Frame ID"
|
|
rgroup 0x23C++0x03
|
|
line.long 0x00 "LDCMD3, LCD DMA Channel 3 Command register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "frmBufDat,plttBufDat"
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "noSet,set"
|
|
bitfld.long 0x00 21. " EOFINT ,End of the Frame Interrupt Mask" "noSet,set"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 02.--20. 1. " LENGTH ,Length-The Length of transfer in bytes"
|
|
group 0x240++0x03
|
|
line.long 0x00 "FDADR4, DMA Channel 4 Frame Descriptor Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DA ,Descriptor Address"
|
|
group 0x244++0x03
|
|
line.long 0x00 "FSADR4, DMA Channel 4 Frame Source Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Source Address:Address of the palette or pixel frame data in memory"
|
|
group 0x248++0x03
|
|
line.long 0x00 "FIDR4, DMA Channel 4 Frame ID register"
|
|
hexmask.long 0x00 3.--31. 1. " FRMID ,Frame ID"
|
|
rgroup 0x24C++0x03
|
|
line.long 0x00 "LDCMD4, LCD DMA Channel 4 Command register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "frmBufDat,plttBufDat"
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "noSet,set"
|
|
bitfld.long 0x00 21. " EOFINT ,End of the Frame Interrupt Mask" "noSet,set"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 02.--20. 1. " LENGTH ,Length-The Length of transfer in bytes"
|
|
group 0x250++0x03
|
|
line.long 0x00 "FDADR5, DMA Channel 5 Frame Descriptor Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " DA ,Descriptor Address"
|
|
group 0x254++0x03
|
|
line.long 0x00 "FSADR5, DMA Channel 5 Frame Source Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Source Address:Address of the palette or pixel frame data in memory"
|
|
group 0x258++0x03
|
|
line.long 0x00 "FIDR5, DMA Channel 5 Frame ID register"
|
|
hexmask.long 0x00 3.--31. 1. " FRMID ,Frame ID"
|
|
rgroup 0x25C++0x03
|
|
line.long 0x00 "LDCMD5, LCD DMA Channel 5 Command register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "frmBufDat,plttBufDat"
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "noSet,set"
|
|
bitfld.long 0x00 21. " EOFINT ,End of the Frame Interrupt Mask" "noSet,set"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 02.--20. 1. " LENGTH ,Length-The Length of transfer in bytes"
|
|
group 0x260++0x03
|
|
line.long 0x00 "FDADR6, DMA Channel 6 Frame Descriptor Address register"
|
|
hexmask.long 0x00 4.--31. 1. " DA ,Descriptor Address"
|
|
group 0x264++0x03
|
|
line.long 0x00 "FSADR6, DMA Channel 6 Frame Source Address register"
|
|
hexmask.long 0x00 4.--31. 0x10 " SRCADDR ,Frame Source Address:Address of the palette or pixel frame data in memory"
|
|
group 0x268++0x03
|
|
line.long 0x00 "FIDR6, DMA Channel 6 Frame ID register"
|
|
hexmask.long 0x00 3.--31. 1. " FRMID ,Frame ID"
|
|
rgroup 0x26C++0x03
|
|
line.long 0x00 "LDCMD6, LCD DMA Channel 6 Command register"
|
|
bitfld.long 0x00 26. " PAL ,Palette Buffer" "frmBufDat,plttBufDat"
|
|
bitfld.long 0x00 22. " SOFINT ,Start of Frame Interrupt" "noSet,set"
|
|
bitfld.long 0x00 21. " EOFINT ,End of the Frame Interrupt Mask" "noSet,set"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 02.--20. 1. " LENGTH ,Length-The Length of transfer in bytes"
|
|
group 0x4000054++0x03
|
|
line.long 0x00 "LCDBSCNTR, LCD Buffer Strength Control register"
|
|
bitfld.long 0x00 00.--03. " LCDBS ,LCD Buffer Strength" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "SSP Serial Ports"
|
|
width 9.
|
|
base ASD:0x41000000
|
|
if ((data.long(asd:0x41000000)&0x100000))==0x100000
|
|
group 0x00++0x03 "SSP 1"
|
|
line.long 0x00 "SSCR0_1, SSP 1 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "nrml,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS,AClk"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "NCS,NWClk"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "0,1"
|
|
hexmask.long.word 0x00 08.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 07. " SSE ,Synchronous Serial Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 06. " ECS ,External Clock Select" "onChipClk,SSPEXTCLK/GPIO"
|
|
bitfld.long 0x00 04.--05. " FRF ,Frame Format" "Motorola,TI,Microwire,PSP"
|
|
bitfld.long 0x00 00.--03. " DSS ,Data Size Select(EDSS=1/EDSS=0)" "17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
else
|
|
group 0x00++0x03 "SSP 1"
|
|
line.long 0x00 "SSCR0_1, SSP 1 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "nrml,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS,AClk"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "NCS,NWClk"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "0,1"
|
|
hexmask.long.word 0x00 08.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 07. " SSE ,Synchronous Serial Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 06. " ECS ,External Clock Select" "onChipClk,SSPEXTCLK/GPIO"
|
|
bitfld.long 0x00 04.--05. " FRF ,Frame Format" "Motorola,TI,Microwire,PSP"
|
|
bitfld.long 0x00 00.--03. " DSS ,Data Size Select(EDSS=1/EDSS=0)" "res,res,res,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
endif
|
|
group 0x04++0x03
|
|
line.long 0x00 "SSCR1_1, SSP 1 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Tristate Enable on Last Phase" "halfClk,fullClk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Tristate Enable" "notHiImp,hiImpd"
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "cntRun,runInTrans"
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "dis,ena"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSPSCLKx Direction" "master,slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame Direction" "master,slave"
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "trans/rec,RECw/oTRANS"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "processor,DMA"
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "dis,ena"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STRF ,Select FIFO for EFWR (test mode bit only)" "transFIFO,recFIFO"
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/Read (test mode bit)" "dis,ena"
|
|
bitfld.long 0x00 10.--13. " RFT ,Receive FIFO Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 06.--09. " TFT ,Transmit FIFO Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 05. " MWDS ,Microwire Transmit Data Size" "8,16"
|
|
bitfld.long 0x00 04. " SPH ,Motorola SPI SSPSCLKx Phase" "1cycStart/0.5cycEnd,0.5cycStart/1cycEnd"
|
|
textline " "
|
|
bitfld.long 0x00 03. " SPO ,Motorola SPI SSPSCLKx Polarity" "heldLow,heldHi"
|
|
bitfld.long 0x00 02. " LBM ,Loop-Back Mode (test-mode bit only)" "no,yes"
|
|
bitfld.long 0x00 01. " TIE ,Transmit FIFO Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " RIE ,Receive FIFO Interrupt Enable" "dis,ena"
|
|
group 0x08++0x03
|
|
line.long 0x00 "SSSR_1, SSP 1 Status Register"
|
|
eventfld.long 0x00 23. " BCE ,Bit Count Error" "noErr,error"
|
|
bitfld.long 0x00 22. " CSS ,Clock Synchronization Status" "rdy,bsySynch"
|
|
eventfld.long 0x00 21. " TUR ,Transmit FIFO Underrun" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 20. " EOC ,End Of Chain" "no,yes"
|
|
eventfld.long 0x00 19. " TINT ,Time-Out Interrupt" "noInt,int"
|
|
eventfld.long 0x00 18. " PINT ,Peripheral Trailing Byte Interrupt" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " RFL ,RX FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 08.--11. " TFL ,TX FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
eventfld.long 0x00 07. " ROR ,RX FIFO Overrun" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 06. " RFS ,Receive FIFO Service" "no,yes"
|
|
bitfld.long 0x00 05. " TFS ,Transmit FIFO Service" "no,yes"
|
|
bitfld.long 0x00 04. " BSY ,Busy" "idle,busy"
|
|
textline " "
|
|
bitfld.long 0x00 03. " RNE ,RX FIFO Not Empty" "empt,noEmpt"
|
|
bitfld.long 0x00 02. " TNF ,TX FIFO Not Full" "full,noFull"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "SSITR_1, SSP 1 Interrupt Test Register"
|
|
bitfld.long 0x00 07. " TROR ,Test RX FIFO Overrun" "no,yes"
|
|
bitfld.long 0x00 06. " TRFS ,Test RX FIFO Service Request" "no,yes"
|
|
bitfld.long 0x00 05. " TTFS ,Test TX FIFO Service Request" "no,yes"
|
|
group 0X10++0x03
|
|
line.long 0x00 "SSDR_1, SSP 1 Data Register"
|
|
group 0x28++0x03
|
|
line.long 0x00 "SSTO_1, SSP 1 Time-Out Register"
|
|
hexmask.long.tbyte 0x00 00.--23. 1. " TIMEOUT ,Time-Out Value"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "SSPSP_1, SSP 1 Programmable Serial Protocol Register"
|
|
bitfld.long 0x00 25. " FSRT ,Frame Sync Relative Timing" "afterT4,preLSB"
|
|
bitfld.long 0x00 23.--24. " DMYSTOP ,Dummy Stop" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--21. 1. " SFRMWDTH ,Serial Frame Width"
|
|
textline " "
|
|
hexmask.long.byte 0x00 09.--15. 1. " SFRMDLY ,Serial Frame Delay"
|
|
bitfld.long 0x00 07.--08. " DMYSTRT ,Dummy Start" "0,1,2,3"
|
|
bitfld.long 0x00 04.--06. " STRTDLY ,Start Delay" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 03. " ETDS ,End-of-Transfer Data State" "low,lastVal"
|
|
bitfld.long 0x00 02. " SFRMP ,Serial Frame Polarity" "actLow,actHi"
|
|
bitfld.long 0x00 00.--01. " SCMODE ,Serial Bit-Rate Clock Mode(Data Driven/Data Sampled/Idle State)" "Falling/Rising/Low,Rising/Falling/Low,Rising/Falling/High,Falling/Rising/High"
|
|
group 0x30++0x03
|
|
line.long 0x00 "SSTSA_1, SSP1 TX Timeslot Active Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TTSA ,TX Time Slot Active"
|
|
group 0x34++0x03
|
|
line.long 0x00 "SSRSA_1, SSP1 RX Timeslot Active Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " RTSA ,RX Time Slot Active"
|
|
rgroup 0x38++0x03
|
|
line.long 0x00 "SSTSS_1, SSP1 Timeslot Status Register"
|
|
bitfld.long 0x00 31. " NMBSY ,Network Mode Busy" "no,yes"
|
|
bitfld.long 0x00 00.--02. " TSS ,Time Slot Status" "000,001,010,011,100,101,110,111"
|
|
group 0x3C++0x03
|
|
line.long 0x00 "SSACD_1, SSP1 Audio Clock Divider Register"
|
|
bitfld.long 0x00 04.--06. " ACPS ,Audio Clock PLL Select" "5.622 MHz,11.345 MHz,12.235 MHz,14.857 MHz,32.842 MHz,48.000 MHz,Reserved,Reserved"
|
|
bitfld.long 0x00 03. " SCDB ,SSPSYSCLK Divider Bypass" "4,1"
|
|
bitfld.long 0x00 00.--02. " ACDS ,Audio Clock Divider Select" "1,2,4,8,16,32,res,res"
|
|
width 9.
|
|
base ASD:0x41700000
|
|
if ((data.long(asd:0x41700000)&0x100000))==0x100000
|
|
group 0x00++0x03 "SSP 2"
|
|
line.long 0x00 "SSCR0_2, SSP 2 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "nrml,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS,AClk"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "NCS,NWClk"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "0,1"
|
|
hexmask.long.word 0x00 08.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 07. " SSE ,Synchronous Serial Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 06. " ECS ,External Clock Select" "onChipClk,SSPEXTCLK/GPIO"
|
|
bitfld.long 0x00 04.--05. " FRF ,Frame Format" "Motorola,TI,Microwire,PSP"
|
|
bitfld.long 0x00 00.--03. " DSS ,Data Size Select(EDSS=1/EDSS=0)" "17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
else
|
|
group 0x00++0x03 "SSP 2"
|
|
line.long 0x00 "SSCR0_2, SSP 2 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "nrml,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS,AClk"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "NCS,NWClk"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "0,1"
|
|
hexmask.long.word 0x00 08.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 07. " SSE ,Synchronous Serial Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 06. " ECS ,External Clock Select" "onChipClk,SSPEXTCLK/GPIO"
|
|
bitfld.long 0x00 04.--05. " FRF ,Frame Format" "Motorola,TI,Microwire,PSP"
|
|
bitfld.long 0x00 00.--03. " DSS ,Data Size Select(EDSS=1/EDSS=0)" "res,res,res,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
endif
|
|
group 0x04++0x03
|
|
line.long 0x00 "SSCR1_2, SSP 2 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Tristate Enable on Last Phase" "halfClk,fullClk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Tristate Enable" "notHiImp,hiImpd"
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "cntRun,runInTrans"
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "dis,ena"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSPSCLKx Direction" "master,slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame Direction" "master,slave"
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "trans/rec,RECw/oTRANS"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "processor,DMA"
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "dis,ena"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STRF ,Select FIFO for EFWR (test mode bit only)" "transFIFO,recFIFO"
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/Read (test mode bit)" "dis,ena"
|
|
bitfld.long 0x00 10.--13. " RFT ,Receive FIFO Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 06.--09. " TFT ,Transmit FIFO Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 05. " MWDS ,Microwire Transmit Data Size" "8,16"
|
|
bitfld.long 0x00 04. " SPH ,Motorola SPI SSPSCLKx Phase" "1cycStart/0.5cycEnd,0.5cycStart/1cycEnd"
|
|
textline " "
|
|
bitfld.long 0x00 03. " SPO ,Motorola SPI SSPSCLKx Polarity" "heldLow,heldHi"
|
|
bitfld.long 0x00 02. " LBM ,Loop-Back Mode (test-mode bit only)" "no,yes"
|
|
bitfld.long 0x00 01. " TIE ,Transmit FIFO Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " RIE ,Receive FIFO Interrupt Enable" "dis,ena"
|
|
group 0x08++0x03
|
|
line.long 0x00 "SSSR_2, SSP 2 Status Register"
|
|
eventfld.long 0x00 23. " BCE ,Bit Count Error" "noErr,error"
|
|
bitfld.long 0x00 22. " CSS ,Clock Synchronization Status" "rdy,bsySynch"
|
|
eventfld.long 0x00 21. " TUR ,Transmit FIFO Underrun" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 20. " EOC ,End Of Chain" "no,yes"
|
|
eventfld.long 0x00 19. " TINT ,Time-Out Interrupt" "noInt,int"
|
|
eventfld.long 0x00 18. " PINT ,Peripheral Trailing Byte Interrupt" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " RFL ,RX FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 08.--11. " TFL ,TX FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
eventfld.long 0x00 07. " ROR ,RX FIFO Overrun" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 06. " RFS ,Receive FIFO Service" "no,yes"
|
|
bitfld.long 0x00 05. " TFS ,Transmit FIFO Service" "no,yes"
|
|
bitfld.long 0x00 04. " BSY ,Busy" "idle,busy"
|
|
textline " "
|
|
bitfld.long 0x00 03. " RNE ,RX FIFO Not Empty" "empt,noEmpt"
|
|
bitfld.long 0x00 02. " TNF ,TX FIFO Not Full" "full,noFull"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "SSITR_2, SSP 2 Interrupt Test Register"
|
|
bitfld.long 0x00 07. " TROR ,Test RX FIFO Overrun" "no,yes"
|
|
bitfld.long 0x00 06. " TRFS ,Test RX FIFO Service Request" "no,yes"
|
|
bitfld.long 0x00 05. " TTFS ,Test TX FIFO Service Request" "no,yes"
|
|
group 0X10++0x03
|
|
line.long 0x00 "SSDR_2, SSP 2 Data Register"
|
|
group 0x28++0x03
|
|
line.long 0x00 "SSTO_2, SSP 2 Time-Out Register"
|
|
hexmask.long.tbyte 0x00 00.--23. 1. " TIMEOUT ,Time-Out Value"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "SSPSP_2, SSP 2 Programmable Serial Protocol Register"
|
|
bitfld.long 0x00 25. " FSRT ,Frame Sync Relative Timing" "afterT4,preLSB"
|
|
bitfld.long 0x00 23.--24. " DMYSTOP ,Dummy Stop" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--21. 1. " SFRMWDTH ,Serial Frame Width"
|
|
textline " "
|
|
hexmask.long.byte 0x00 09.--15. 1. " SFRMDLY ,Serial Frame Delay"
|
|
bitfld.long 0x00 07.--08. " DMYSTRT ,Dummy Start" "0,1,2,3"
|
|
bitfld.long 0x00 04.--06. " STRTDLY ,Start Delay" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 03. " ETDS ,End-of-Transfer Data State" "low,lastVal"
|
|
bitfld.long 0x00 02. " SFRMP ,Serial Frame Polarity" "actLow,actHi"
|
|
bitfld.long 0x00 00.--01. " SCMODE ,Serial Bit-Rate Clock Mode(Data Driven/Data Sampled/Idle State)" "Falling/Rising/Low,Rising/Falling/Low,Rising/Falling/High,Falling/Rising/High"
|
|
group 0x30++0x03
|
|
line.long 0x00 "SSTSA_2, SSP2 TX Timeslot Active Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TTSA ,TX Time Slot Active"
|
|
group 0x34++0x03
|
|
line.long 0x00 "SSRSA_2, SSP2 RX Timeslot Active Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " RTSA ,RX Time Slot Active"
|
|
rgroup 0x38++0x03
|
|
line.long 0x00 "SSTSS_2, SSP2 Timeslot Status Register"
|
|
bitfld.long 0x00 31. " NMBSY ,Network Mode Busy" "no,yes"
|
|
bitfld.long 0x00 00.--02. " TSS ,Time Slot Status" "000,001,010,011,100,101,110,111"
|
|
group 0x3C++0x03
|
|
line.long 0x00 "SSACD_2, SSP2 Audio Clock Divider Register"
|
|
bitfld.long 0x00 04.--06. " ACPS ,Audio Clock PLL Select" "5.622 MHz,11.345 MHz,12.235 MHz,14.857 MHz,32.842 MHz,48.000 MHz,Reserved,Reserved"
|
|
bitfld.long 0x00 03. " SCDB ,SSPSYSCLK Divider Bypass" "4,1"
|
|
bitfld.long 0x00 00.--02. " ACDS ,Audio Clock Divider Select" "1,2,4,8,16,32,res,res"
|
|
width 9.
|
|
base ASD:0x41900000
|
|
if ((data.long(asd:0x41900000)&0x100000))==0x100000
|
|
group 0x00++0x03 "SSP 3"
|
|
line.long 0x00 "SSCR0_3, SSP 3 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "nrml,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS,AClk"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "NCS,NWClk"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "0,1"
|
|
hexmask.long.word 0x00 08.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 07. " SSE ,Synchronous Serial Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 06. " ECS ,External Clock Select" "onChipClk,SSPEXTCLK/GPIO"
|
|
bitfld.long 0x00 04.--05. " FRF ,Frame Format" "Motorola,TI,Microwire,PSP"
|
|
bitfld.long 0x00 00.--03. " DSS ,Data Size Select(EDSS=1/EDSS=0)" "17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
else
|
|
group 0x00++0x03 "SSP 3"
|
|
line.long 0x00 "SSCR0_3, SSP 3 Control Register 0"
|
|
bitfld.long 0x00 31. " MOD ,Mode" "nrml,Network"
|
|
bitfld.long 0x00 30. " ACS ,Audio Clock Select" "NCS/ECS,AClk"
|
|
bitfld.long 0x00 24.--26. " FRDC ,Frame Rate Divider Control" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TIM ,Transmit FIFO Underrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 22. " RIM ,Receive FIFO Overrun Interrupt Mask" "noMsk,mask"
|
|
bitfld.long 0x00 21. " NCS ,Network Clock Select" "NCS,NWClk"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EDSS ,Extended Data Size Select" "0,1"
|
|
hexmask.long.word 0x00 08.--19. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 07. " SSE ,Synchronous Serial Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 06. " ECS ,External Clock Select" "onChipClk,SSPEXTCLK/GPIO"
|
|
bitfld.long 0x00 04.--05. " FRF ,Frame Format" "Motorola,TI,Microwire,PSP"
|
|
bitfld.long 0x00 00.--03. " DSS ,Data Size Select(EDSS=1/EDSS=0)" "res,res,res,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
endif
|
|
group 0x04++0x03
|
|
line.long 0x00 "SSCR1_3, SSP 3 Control Register 1"
|
|
bitfld.long 0x00 31. " TTELP ,TXD Tristate Enable on Last Phase" "halfClk,fullClk"
|
|
bitfld.long 0x00 30. " TTE ,TXD Tristate Enable" "notHiImp,hiImpd"
|
|
bitfld.long 0x00 29. " EBCEI ,Enable Bit Count Error Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SCFR ,Slave Clock Free Running" "cntRun,runInTrans"
|
|
bitfld.long 0x00 27. " ECRA ,Enable Clock Request A" "dis,ena"
|
|
bitfld.long 0x00 26. " ECRB ,Enable Clock Request B" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SCLKDIR ,SSPSCLKx Direction" "master,slave"
|
|
bitfld.long 0x00 24. " SFRMDIR ,SSP Frame Direction" "master,slave"
|
|
bitfld.long 0x00 23. " RWOT ,Receive Without Transmit" "trans/rec,RECw/oTRANS"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TRAIL ,Trailing Byte" "processor,DMA"
|
|
bitfld.long 0x00 21. " TSRE ,Transmit Service Request Enable" "dis,ena"
|
|
bitfld.long 0x00 20. " RSRE ,Receive Service Request Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TINTE ,Receiver Time-Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 18. " PINTE ,Peripheral Trailing Byte Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 16. " IFS ,Invert Frame Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STRF ,Select FIFO for EFWR (test mode bit only)" "transFIFO,recFIFO"
|
|
bitfld.long 0x00 14. " EFWR ,Enable FIFO Write/Read (test mode bit)" "dis,ena"
|
|
bitfld.long 0x00 10.--13. " RFT ,Receive FIFO Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 06.--09. " TFT ,Transmit FIFO Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 05. " MWDS ,Microwire Transmit Data Size" "8,16"
|
|
bitfld.long 0x00 04. " SPH ,Motorola SPI SSPSCLKx Phase" "1cycStart/0.5cycEnd,0.5cycStart/1cycEnd"
|
|
textline " "
|
|
bitfld.long 0x00 03. " SPO ,Motorola SPI SSPSCLKx Polarity" "heldLow,heldHi"
|
|
bitfld.long 0x00 02. " LBM ,Loop-Back Mode (test-mode bit only)" "no,yes"
|
|
bitfld.long 0x00 01. " TIE ,Transmit FIFO Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " RIE ,Receive FIFO Interrupt Enable" "dis,ena"
|
|
group 0x08++0x03
|
|
line.long 0x00 "SSSR_3, SSP 3 Status Register"
|
|
eventfld.long 0x00 23. " BCE ,Bit Count Error" "noErr,error"
|
|
bitfld.long 0x00 22. " CSS ,Clock Synchronization Status" "rdy,bsySynch"
|
|
eventfld.long 0x00 21. " TUR ,Transmit FIFO Underrun" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 20. " EOC ,End Of Chain" "no,yes"
|
|
eventfld.long 0x00 19. " TINT ,Time-Out Interrupt" "noInt,int"
|
|
eventfld.long 0x00 18. " PINT ,Peripheral Trailing Byte Interrupt" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " RFL ,RX FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 08.--11. " TFL ,TX FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
eventfld.long 0x00 07. " ROR ,RX FIFO Overrun" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 06. " RFS ,Receive FIFO Service" "no,yes"
|
|
bitfld.long 0x00 05. " TFS ,Transmit FIFO Service" "no,yes"
|
|
bitfld.long 0x00 04. " BSY ,Busy" "idle,busy"
|
|
textline " "
|
|
bitfld.long 0x00 03. " RNE ,RX FIFO Not Empty" "empt,noEmpt"
|
|
bitfld.long 0x00 02. " TNF ,TX FIFO Not Full" "full,noFull"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "SSITR_3, SSP 3 Interrupt Test Register"
|
|
bitfld.long 0x00 07. " TROR ,Test RX FIFO Overrun" "no,yes"
|
|
bitfld.long 0x00 06. " TRFS ,Test RX FIFO Service Request" "no,yes"
|
|
bitfld.long 0x00 05. " TTFS ,Test TX FIFO Service Request" "no,yes"
|
|
group 0X10++0x03
|
|
line.long 0x00 "SSDR_3, SSP 3 Data Register"
|
|
group 0x28++0x03
|
|
line.long 0x00 "SSTO_3, SSP 3 Time-Out Register"
|
|
hexmask.long.tbyte 0x00 00.--23. 1. " TIMEOUT ,Time-Out Value"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "SSPSP_3, SSP 3 Programmable Serial Protocol Register"
|
|
bitfld.long 0x00 25. " FSRT ,Frame Sync Relative Timing" "afterT4,preLSB"
|
|
bitfld.long 0x00 23.--24. " DMYSTOP ,Dummy Stop" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--21. 1. " SFRMWDTH ,Serial Frame Width"
|
|
textline " "
|
|
hexmask.long.byte 0x00 09.--15. 1. " SFRMDLY ,Serial Frame Delay"
|
|
bitfld.long 0x00 07.--08. " DMYSTRT ,Dummy Start" "0,1,2,3"
|
|
bitfld.long 0x00 04.--06. " STRTDLY ,Start Delay" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 03. " ETDS ,End-of-Transfer Data State" "low,lastVal"
|
|
bitfld.long 0x00 02. " SFRMP ,Serial Frame Polarity" "actLow,actHi"
|
|
bitfld.long 0x00 00.--01. " SCMODE ,Serial Bit-Rate Clock Mode(Data Driven/Data Sampled/Idle State)" "Falling/Rising/Low,Rising/Falling/Low,Rising/Falling/High,Falling/Rising/High"
|
|
group 0x30++0x03
|
|
line.long 0x00 "SSTSA_3, SSP3 TX Timeslot Active Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TTSA ,TX Time Slot Active"
|
|
group 0x34++0x03
|
|
line.long 0x00 "SSRSA_3, SSP3 RX Timeslot Active Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " RTSA ,RX Time Slot Active"
|
|
rgroup 0x38++0x03
|
|
line.long 0x00 "SSTSS_3, SSP3 Timeslot Status Register"
|
|
bitfld.long 0x00 31. " NMBSY ,Network Mode Busy" "no,yes"
|
|
bitfld.long 0x00 00.--02. " TSS ,Time Slot Status" "000,001,010,011,100,101,110,111"
|
|
group 0x3C++0x03
|
|
line.long 0x00 "SSACD_3, SSP3 Audio Clock Divider Register"
|
|
bitfld.long 0x00 04.--06. " ACPS ,Audio Clock PLL Select" "5.622 MHz,11.345 MHz,12.235 MHz,14.857 MHz,32.842 MHz,48.000 MHz,Reserved,Reserved"
|
|
bitfld.long 0x00 03. " SCDB ,SSPSYSCLK Divider Bypass" "4,1"
|
|
bitfld.long 0x00 00.--02. " ACDS ,Audio Clock Divider Select" "1,2,4,8,16,32,res,res"
|
|
tree.end
|
|
tree "I2C Bus Interface Unit"
|
|
width 7.
|
|
base ASD:0x40301680
|
|
rgroup 0x00++0x03 "Standard I2C Register"
|
|
line.long 0x00 "IBMR, I2C Bus Monitor register"
|
|
bitfld.long 0x00 01. " SCL ,IBMR[SCL] continuously reflects the value of the SCL pin" "0,1"
|
|
bitfld.long 0x00 00. " SDA ,IBMR[SDA] continuously reflects the value of the SDA pin" "0,1"
|
|
group 0x08++0x03
|
|
line.long 0x00 "IDBR, I2C Data Buffer Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DB ,Data Buffer-Buffer for I2C bus send/receive data"
|
|
group 0x10++0x03
|
|
line.long 0x00 "ICR, I2C Control register"
|
|
bitfld.long 0x00 15. " FM ,Fast Mode" "100kbps,400kbps"
|
|
bitfld.long 0x00 14. " UR ,Unit Reset" "noRst,rst"
|
|
bitfld.long 0x00 13. " SADIE ,Slave Address Detected Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ALDIE ,Arbitration Loss Detected Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 11. " SSDIE ,Slave STOP Detected Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " BEIE ,Bus Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 09. " DRFIE ,DBR Receive Full Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 08. " ITEIE ,IDBR Transmit Empty Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 07. " GCD ,General Call Disable" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 06. " IUE ,I2C Unit Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " SCLEA ,SCL Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " MA ,Master Abort" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TB ,Transfer Byte" "no,yes"
|
|
bitfld.long 0x00 02. " ACKNAK ,Positive/Negative Acknowledge" "ACK,NAK"
|
|
bitfld.long 0x00 01. " STOP ,Stop" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 00. " START ,Start" "no,yes"
|
|
hgroup 0x18++0x03
|
|
hide.long 0x00 "ISR, I2C Status Register"
|
|
in
|
|
group 0x20++0x03
|
|
line.long 0x00 "ISAR, I2C Slave Address Register"
|
|
hexmask.long.byte 0x00 00.--06. 1. " SA ,Slave Address"
|
|
base asd:0x40F00180
|
|
rgroup 0x00++0x03 "Power I2C Register"
|
|
line.long 0x00 "PIBMR, Power Manager I2C Bus Monitor Register"
|
|
bitfld.long 0x00 01. " SCL ,IBMR[SCL] continuously reflects the value of the SCL pin" "0,1"
|
|
bitfld.long 0x00 00. " SDA ,IBMR[SDA] continuously reflects the value of the SDA pin" "0,1"
|
|
group 0x08++0x03
|
|
line.long 0x00 "PIDBR, Power Manager I2C Data Buffer Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DB ,Data Buffer-Buffer for I2C bus send/receive data"
|
|
group 0x10++0x03
|
|
line.long 0x00 "PICR, Power Manager I2C Control Register"
|
|
bitfld.long 0x00 15. " FM ,Fast Mode" "40kbps,160kbps"
|
|
bitfld.long 0x00 14. " UR ,Unit Reset" "noRst,rst"
|
|
bitfld.long 0x00 13. " SADIE ,Slave Address Detected Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ALDIE ,Arbitration Loss Detected Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 11. " SSDIE ,Slave STOP Detected Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " BEIE ,Bus Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 09. " DRFIE ,DBR Receive Full Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 08. " ITEIE ,IDBR Transmit Empty Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 07. " GCD ,General Call Disable" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 06. " IUE ,I2C Unit Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " SCLEA ,SCL Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " MA ,Master Abort" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TB ,Transfer Byte" "no,yes"
|
|
bitfld.long 0x00 02. " ACKNAK ,Positive/Negative Acknowledge" "ACK,NAK"
|
|
bitfld.long 0x00 01. " STOP ,Stop" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 00. " START ,Start" "no,yes"
|
|
hgroup 0x18++0x03
|
|
hide.long 0x00 "PISR, Power Manager I2C Status register"
|
|
in
|
|
group 0x20++0x03
|
|
line.long 0x00 "PISAR, Power Manager I2C Slave Address register"
|
|
hexmask.long.byte 0x00 00.--06. 1. " SA ,Slave Address"
|
|
width 10.
|
|
tree.end
|
|
tree.open "UARTs"
|
|
; --------------------------------------------------------------------------------
|
|
; PXA27x
|
|
; State: preliminary
|
|
;
|
|
; UART
|
|
;
|
|
; 0x40100000 Base Address
|
|
; FF UART Abbreviation
|
|
; "Full..UART" UART Full Name
|
|
; --------------------------------------------------------------------------------
|
|
tree "Full Function UART"
|
|
; --------------------------------------------------------------------------------
|
|
width 7.
|
|
base ASD:0x40100000
|
|
if (d.l(asd:0x40100000+0x0c)&0x80)==0x80
|
|
; DLAB == 1
|
|
group 0x00++0x03
|
|
line.long 0x00 "FFDLL, Divisor Latch Register-low byte"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DLL ,Low-byte compare value to generate baud rate"
|
|
group 0x04++0x03
|
|
line.long 0x00 "FFDLH, Divisor Latch Register-high byte"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DLH , High-byte compare value to generate baud rate"
|
|
else
|
|
hgroup 0x00++0x03
|
|
hide.long 0x00 "FFRBR, Receive Buffer Register"
|
|
in
|
|
wgroup 0x00++0x03
|
|
line.long 0x00 "FFTHR, Transmit Holding Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Byte3 ,Byte 3 (valid in 32-bit peripheral bus mode only)"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Byte2 ,Byte 2 (valid in 32-bit peripheral bus mode only)"
|
|
hexmask.long.byte 0x00 08.--15. 1. " Byte1 ,Byte 1 (valid in 32-bit peripheral bus mode only)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " Byte0 ,Byte 0"
|
|
group 0x04++0x03
|
|
line.long 0x00 "FFIER, Interrupt Enable Register"
|
|
bitfld.long 0x00 07. " DMAE ,DMA Requests Enable" "dis,ena"
|
|
bitfld.long 0x00 06. " UUE ,UART Unit Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " NRZE ,NRZ coding Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 04. " RTOIE ,Receiver Time-Out Interrupt Enable (Source IIR[TOD])" "dis,ena"
|
|
bitfld.long 0x00 03. " MIE ,Modem Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
bitfld.long 0x00 02. " RLSE ,Receiver Line Status Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 01. " TIE ,Transmit Data request Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
bitfld.long 0x00 00. " RAVIE ,Receiver Data Available Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
endif
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "FFIIR, Interrupt ID Register"
|
|
bitfld.long 0x00 06.--07. " FIFOES[1:0] ,FIFO Mode Enable Status" "nonFIFO,res,res,FIFO"
|
|
bitfld.long 0x00 05. " EOC ,DMA End of Descriptor Chain" "no,yes"
|
|
bitfld.long 0x00 04. " ABL ,Auto-Baud Lock" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TOD ,Time-Out Detected" "no,yes"
|
|
bitfld.long 0x00 01.--02. " IID[1:0] ,Interrupt Source Encoded" "modem,transFIFO,recDat,recErr"
|
|
bitfld.long 0x00 00. " nIP ,Interrupt Pending" "pending,noPend"
|
|
wgroup 0x08++0x03
|
|
line.long 0x00 "FFFCR, FIFO Control Register"
|
|
bitfld.long 0x00 06.--07. " ITL ,Interrupt Trigger-Level (Threshold)" ">=1byte,>=8byte,>=16byte,>=32byte"
|
|
bitfld.long 0x00 05. " BUS ,32-Bit Peripheral Bus" "8-bit,32-bit"
|
|
bitfld.long 0x00 04. " TRAIL ,Trailing Bytes" "processor,DMAcontrol"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TIL ,Transmitter Interrupt Level" "halfEmpt,empty"
|
|
bitfld.long 0x00 02. " RESETTF ,Reset Transmit FIFO" "-,rst"
|
|
bitfld.long 0x00 01. " RESETRF ,Reset Receive FIFO" "-,rst"
|
|
textline " "
|
|
bitfld.long 0x00 00. " TRFIFOE ,Transmit and Receive FIFO Enable" "dis,ena"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "FFLCR, Line Control Register"
|
|
bitfld.long 0x00 07. " DLAB ,Divisor Latch Access" "THR-RBR-IER,DLH-DLL"
|
|
bitfld.long 0x00 06. " SB ,Set Break" "-,TXD=0"
|
|
bitfld.long 0x00 05. " STKYP ,Sticky Parity" "-,/EPS"
|
|
textline " "
|
|
bitfld.long 0x00 04. " EPS ,Even Parity Select" "odd,even"
|
|
bitfld.long 0x00 03. " PEN ,Parity Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " STB ,Stop Bits" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 00.--01. " WLS[1:0] ,Word Length Select" "5,6,7,8"
|
|
if (d.l(asd:0x40100000+0x10)&0x10)==0x10
|
|
group 0x10++0x03
|
|
line.long 0x00 "FFMCR, Modem Control Register"
|
|
bitfld.long 0x00 05. " AFE ,Auto-Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " LOOP ,Loopback Mode" "nrml,LB-UART"
|
|
bitfld.long 0x00 03. " OUT2 ,OUT2 Signal Control" "MSR[DCD]=0,MSR[DCD]=1"
|
|
textline " "
|
|
bitfld.long 0x00 02. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
bitfld.long 0x00 01. " RTS ,Request to Send" "dis,ena"
|
|
bitfld.long 0x00 00. " DTR ,Data Terminal Ready" "nDTR=1,nDTR=0"
|
|
else
|
|
group 0x10++0x03
|
|
line.long 0x00 "FFMCR, Modem Control Register"
|
|
bitfld.long 0x00 05. " AFE ,Auto-Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " LOOP ,Loopback Mode" "nrml,LB-UART"
|
|
bitfld.long 0x00 03. " OUT2 ,OUT2 Signal Control" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 02. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
bitfld.long 0x00 01. " RTS ,Request to Send" "dis,ena"
|
|
bitfld.long 0x00 00. " DTR ,Data Terminal Ready" "nDTR=1,nDTR=0"
|
|
endif
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "FFLSR, Line Status Register"
|
|
bitfld.long 0x00 07. " FIFOE ,FIFO Error Status" "noErr,error"
|
|
bitfld.long 0x00 06. " TEMT ,Transmitter Empty" "no,yes"
|
|
bitfld.long 0x00 05. " TDRQ ,Transmit Data Request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 04. " BI ,Break Interrupt" "no,yes"
|
|
bitfld.long 0x00 03. " FE ,Framing Error" "noErr,error"
|
|
bitfld.long 0x00 02. " PE ,Parity Error" "noErr,error"
|
|
textline " "
|
|
bitfld.long 0x00 01. " OE ,Overrun Error" "noErr,error"
|
|
bitfld.long 0x00 00. " DR ,Data Ready" "no,yes"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "FFMSR, Modem Status Register"
|
|
bitfld.long 0x00 07. " DCD ,Data Carrier Detect" "nDCD=1,nDCD=0"
|
|
bitfld.long 0x00 06. " RI ,Ring Indicator" "nRI=1,nRI=0"
|
|
bitfld.long 0x00 05. " DSR ,Data Set Ready" "nDSR=1,nDSR=0"
|
|
textline " "
|
|
bitfld.long 0x00 04. " CTS ,Clear To Send" "nCTS=1,nCTS=0"
|
|
bitfld.long 0x00 03. " DDCD ,Delta Data Carrier Detect" "no,yes"
|
|
bitfld.long 0x00 02. " TERI ,Trailing Edge Ring Indicator" "noChng,changed"
|
|
textline " "
|
|
bitfld.long 0x00 01. " DDSR ,Delta Data Set Ready" "noChng,changed"
|
|
bitfld.long 0x00 00. " DCTS ,Delta Clear To Send" "noChng,changed"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "FFSCR, Scratch Pad Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " Scratchpad ,No effect on UART functions"
|
|
group 0x20++0x03
|
|
line.long 0x00 "FFISR, Infrared Select Register"
|
|
bitfld.long 0x00 04. " RXPL ,Receive Data Polarity" "posPulAs0,negPulAs0"
|
|
bitfld.long 0x00 03. " TXPL ,Transmit Data Polarity" "posPulAs0,negPulAs0"
|
|
bitfld.long 0x00 02. " XMODE ,Transmit Pulse Width Select" "3/16bit,1.6us"
|
|
textline " "
|
|
bitfld.long 0x00 01. " RCVEIR ,Receiver SIR Enable" "UART,SIR"
|
|
bitfld.long 0x00 00. " XMITIR ,Transmitter SIR Enable" "UART,SIR"
|
|
group 0x24++0x03
|
|
line.long 0x00 "FFFOR, Receive FIFO Occupancy Register"
|
|
hexmask.long.byte 0x00 00.--05. 1. " BC ,Byte Count-Number of bytes (0-63) remaining in the receive FIFO"
|
|
group 0x28++0x03
|
|
line.long 0x00 "FFABR, Auto-baud Control Register"
|
|
bitfld.long 0x00 03. " ABT ,Auto-Baud Rate Calculation" "formula,table"
|
|
bitfld.long 0x00 02. " ABUP ,Auto-Baud Programmer" "processor,UART"
|
|
bitfld.long 0x00 01. " ABLIE ,Auto-Baud Lock Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " ABE ,Auto-Baud Enable" "dis,ena"
|
|
rgroup 0x2C++0x03
|
|
line.long 0x00 "FFACR, Auto-baud Count Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " Count ,Value Number of 14.857-MHz clock cycles within a start-bit pulse"
|
|
tree.end
|
|
width 10.
|
|
; --------------------------------------------------------------------------------
|
|
; PXA27x
|
|
; State: preliminary
|
|
;
|
|
; UART
|
|
;
|
|
; 0x40200000 Base Address
|
|
; BT UART Abbreviation
|
|
; "Bluetooth.." UART Full Name
|
|
; --------------------------------------------------------------------------------
|
|
tree "Bluetooth UART "
|
|
; --------------------------------------------------------------------------------
|
|
width 7.
|
|
base ASD:0x40200000
|
|
if (d.l(asd:0x40200000+0x0c)&0x80)==0x80
|
|
; DLAB == 1
|
|
group 0x00++0x03
|
|
line.long 0x00 "BTDLL, Divisor Latch Register-low byte"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DLL ,Low-byte compare value to generate baud rate"
|
|
group 0x04++0x03
|
|
line.long 0x00 "BTDLH, Divisor Latch Register-high byte"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DLH , High-byte compare value to generate baud rate"
|
|
else
|
|
hgroup 0x00++0x03
|
|
hide.long 0x00 "BTRBR, Receive Buffer Register"
|
|
in
|
|
wgroup 0x00++0x03
|
|
line.long 0x00 "BTTHR, Transmit Holding Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Byte3 ,Byte 3 (valid in 32-bit peripheral bus mode only)"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Byte2 ,Byte 2 (valid in 32-bit peripheral bus mode only)"
|
|
hexmask.long.byte 0x00 08.--15. 1. " Byte1 ,Byte 1 (valid in 32-bit peripheral bus mode only)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " Byte0 ,Byte 0"
|
|
group 0x04++0x03
|
|
line.long 0x00 "BTIER, Interrupt Enable Register"
|
|
bitfld.long 0x00 07. " DMAE ,DMA Requests Enable" "dis,ena"
|
|
bitfld.long 0x00 06. " UUE ,UART Unit Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " NRZE ,NRZ coding Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 04. " RTOIE ,Receiver Time-Out Interrupt Enable (Source IIR[TOD])" "dis,ena"
|
|
bitfld.long 0x00 03. " MIE ,Modem Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
bitfld.long 0x00 02. " RLSE ,Receiver Line Status Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 01. " TIE ,Transmit Data request Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
bitfld.long 0x00 00. " RAVIE ,Receiver Data Available Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
endif
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "BTIIR, Interrupt ID Register"
|
|
bitfld.long 0x00 06.--07. " FIFOES[1:0] ,FIFO Mode Enable Status" "nonFIFO,res,res,FIFO"
|
|
bitfld.long 0x00 05. " EOC ,DMA End of Descriptor Chain" "no,yes"
|
|
bitfld.long 0x00 04. " ABL ,Auto-Baud Lock" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TOD ,Time-Out Detected" "no,yes"
|
|
bitfld.long 0x00 01.--02. " IID[1:0] ,Interrupt Source Encoded" "modem,transFIFO,recDat,recErr"
|
|
bitfld.long 0x00 00. " nIP ,Interrupt Pending" "pending,noPend"
|
|
wgroup 0x08++0x03
|
|
line.long 0x00 "BTFCR, FIFO Control Register"
|
|
bitfld.long 0x00 06.--07. " ITL ,Interrupt Trigger-Level (Threshold)" ">=1byte,>=8byte,>=16byte,>=32byte"
|
|
bitfld.long 0x00 05. " BUS ,32-Bit Peripheral Bus" "8-bit,32-bit"
|
|
bitfld.long 0x00 04. " TRAIL ,Trailing Bytes" "processor,DMAcontrol"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TIL ,Transmitter Interrupt Level" "halfEmpt,empty"
|
|
bitfld.long 0x00 02. " RESETTF ,Reset Transmit FIFO" "-,rst"
|
|
bitfld.long 0x00 01. " RESETRF ,Reset Receive FIFO" "-,rst"
|
|
textline " "
|
|
bitfld.long 0x00 00. " TRFIFOE ,Transmit and Receive FIFO Enable" "dis,ena"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "BTLCR, Line Control Register"
|
|
bitfld.long 0x00 07. " DLAB ,Divisor Latch Access" "THR-RBR-IER,DLH-DLL"
|
|
bitfld.long 0x00 06. " SB ,Set Break" "-,TXD=0"
|
|
bitfld.long 0x00 05. " STKYP ,Sticky Parity" "-,/EPS"
|
|
textline " "
|
|
bitfld.long 0x00 04. " EPS ,Even Parity Select" "odd,even"
|
|
bitfld.long 0x00 03. " PEN ,Parity Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " STB ,Stop Bits" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 00.--01. " WLS[1:0] ,Word Length Select" "5,6,7,8"
|
|
if (d.l(asd:0x40200000+0x10)&0x10)==0x10
|
|
group 0x10++0x03
|
|
line.long 0x00 "BTMCR, Modem Control Register"
|
|
bitfld.long 0x00 05. " AFE ,Auto-Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " LOOP ,Loopback Mode" "nrml,LB-UART"
|
|
bitfld.long 0x00 03. " OUT2 ,OUT2 Signal Control" "MSR[DCD]=0,MSR[DCD]=1"
|
|
textline " "
|
|
bitfld.long 0x00 02. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
bitfld.long 0x00 01. " RTS ,Request to Send" "dis,ena"
|
|
bitfld.long 0x00 00. " DTR ,Data Terminal Ready" "nDTR=1,nDTR=0"
|
|
else
|
|
group 0x10++0x03
|
|
line.long 0x00 "BTMCR, Modem Control Register"
|
|
bitfld.long 0x00 05. " AFE ,Auto-Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " LOOP ,Loopback Mode" "nrml,LB-UART"
|
|
bitfld.long 0x00 03. " OUT2 ,OUT2 Signal Control" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 02. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
bitfld.long 0x00 01. " RTS ,Request to Send" "dis,ena"
|
|
bitfld.long 0x00 00. " DTR ,Data Terminal Ready" "nDTR=1,nDTR=0"
|
|
endif
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "BTLSR, Line Status Register"
|
|
bitfld.long 0x00 07. " FIFOE ,FIFO Error Status" "noErr,error"
|
|
bitfld.long 0x00 06. " TEMT ,Transmitter Empty" "no,yes"
|
|
bitfld.long 0x00 05. " TDRQ ,Transmit Data Request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 04. " BI ,Break Interrupt" "no,yes"
|
|
bitfld.long 0x00 03. " FE ,Framing Error" "noErr,error"
|
|
bitfld.long 0x00 02. " PE ,Parity Error" "noErr,error"
|
|
textline " "
|
|
bitfld.long 0x00 01. " OE ,Overrun Error" "noErr,error"
|
|
bitfld.long 0x00 00. " DR ,Data Ready" "no,yes"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "BTMSR, Modem Status Register"
|
|
bitfld.long 0x00 07. " DCD ,Data Carrier Detect" "nDCD=1,nDCD=0"
|
|
bitfld.long 0x00 06. " RI ,Ring Indicator" "nRI=1,nRI=0"
|
|
bitfld.long 0x00 05. " DSR ,Data Set Ready" "nDSR=1,nDSR=0"
|
|
textline " "
|
|
bitfld.long 0x00 04. " CTS ,Clear To Send" "nCTS=1,nCTS=0"
|
|
bitfld.long 0x00 03. " DDCD ,Delta Data Carrier Detect" "no,yes"
|
|
bitfld.long 0x00 02. " TERI ,Trailing Edge Ring Indicator" "noChng,changed"
|
|
textline " "
|
|
bitfld.long 0x00 01. " DDSR ,Delta Data Set Ready" "noChng,changed"
|
|
bitfld.long 0x00 00. " DCTS ,Delta Clear To Send" "noChng,changed"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "BTSCR, Scratch Pad Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " Scratchpad ,No effect on UART functions"
|
|
group 0x20++0x03
|
|
line.long 0x00 "BTISR, Infrared Select Register"
|
|
bitfld.long 0x00 04. " RXPL ,Receive Data Polarity" "posPulAs0,negPulAs0"
|
|
bitfld.long 0x00 03. " TXPL ,Transmit Data Polarity" "posPulAs0,negPulAs0"
|
|
bitfld.long 0x00 02. " XMODE ,Transmit Pulse Width Select" "3/16bit,1.6us"
|
|
textline " "
|
|
bitfld.long 0x00 01. " RCVEIR ,Receiver SIR Enable" "UART,SIR"
|
|
bitfld.long 0x00 00. " XMITIR ,Transmitter SIR Enable" "UART,SIR"
|
|
group 0x24++0x03
|
|
line.long 0x00 "BTFOR, Receive FIFO Occupancy Register"
|
|
hexmask.long.byte 0x00 00.--05. 1. " BC ,Byte Count-Number of bytes (0-63) remaining in the receive FIFO"
|
|
group 0x28++0x03
|
|
line.long 0x00 "BTABR, Auto-baud Control Register"
|
|
bitfld.long 0x00 03. " ABT ,Auto-Baud Rate Calculation" "formula,table"
|
|
bitfld.long 0x00 02. " ABUP ,Auto-Baud Programmer" "processor,UART"
|
|
bitfld.long 0x00 01. " ABLIE ,Auto-Baud Lock Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " ABE ,Auto-Baud Enable" "dis,ena"
|
|
rgroup 0x2C++0x03
|
|
line.long 0x00 "BTACR, Auto-baud Count Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " Count ,Value Number of 14.857-MHz clock cycles within a start-bit pulse"
|
|
tree.end
|
|
width 10.
|
|
; --------------------------------------------------------------------------------
|
|
; PXA27x
|
|
; State: preliminary
|
|
;
|
|
; UART
|
|
;
|
|
; 0x40700000 Base Address
|
|
; ST UART Abbreviation
|
|
; "Standard.." UART Full Name
|
|
; --------------------------------------------------------------------------------
|
|
tree "Standard UART "
|
|
; --------------------------------------------------------------------------------
|
|
width 7.
|
|
base ASD:0x40700000
|
|
if (d.l(asd:0x40700000+0x0c)&0x80)==0x80
|
|
; DLAB == 1
|
|
group 0x00++0x03
|
|
line.long 0x00 "STDLL, Divisor Latch Register-low byte"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DLL ,Low-byte compare value to generate baud rate"
|
|
group 0x04++0x03
|
|
line.long 0x00 "STDLH, Divisor Latch Register-high byte"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DLH , High-byte compare value to generate baud rate"
|
|
else
|
|
hgroup 0x00++0x03
|
|
hide.long 0x00 "STRBR, Receive Buffer Register"
|
|
in
|
|
wgroup 0x00++0x03
|
|
line.long 0x00 "STTHR, Transmit Holding Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Byte3 ,Byte 3 (valid in 32-bit peripheral bus mode only)"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Byte2 ,Byte 2 (valid in 32-bit peripheral bus mode only)"
|
|
hexmask.long.byte 0x00 08.--15. 1. " Byte1 ,Byte 1 (valid in 32-bit peripheral bus mode only)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " Byte0 ,Byte 0"
|
|
group 0x04++0x03
|
|
line.long 0x00 "STIER, Interrupt Enable Register"
|
|
bitfld.long 0x00 07. " DMAE ,DMA Requests Enable" "dis,ena"
|
|
bitfld.long 0x00 06. " UUE ,UART Unit Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " NRZE ,NRZ coding Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 04. " RTOIE ,Receiver Time-Out Interrupt Enable (Source IIR[TOD])" "dis,ena"
|
|
bitfld.long 0x00 03. " MIE ,Modem Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
bitfld.long 0x00 02. " RLSE ,Receiver Line Status Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 01. " TIE ,Transmit Data request Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
bitfld.long 0x00 00. " RAVIE ,Receiver Data Available Interrupt Enable (Source IIR[IID])" "dis,ena"
|
|
endif
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "STIIR, Interrupt ID Register"
|
|
bitfld.long 0x00 06.--07. " FIFOES[1:0] ,FIFO Mode Enable Status" "nonFIFO,res,res,FIFO"
|
|
bitfld.long 0x00 05. " EOC ,DMA End of Descriptor Chain" "no,yes"
|
|
bitfld.long 0x00 04. " ABL ,Auto-Baud Lock" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TOD ,Time-Out Detected" "no,yes"
|
|
bitfld.long 0x00 01.--02. " IID[1:0] ,Interrupt Source Encoded" "modem,transFIFO,recDat,recErr"
|
|
bitfld.long 0x00 00. " nIP ,Interrupt Pending" "pending,noPend"
|
|
wgroup 0x08++0x03
|
|
line.long 0x00 "STFCR, FIFO Control Register"
|
|
bitfld.long 0x00 06.--07. " ITL ,Interrupt Trigger-Level (Threshold)" ">=1byte,>=8byte,>=16byte,>=32byte"
|
|
bitfld.long 0x00 05. " BUS ,32-Bit Peripheral Bus" "8-bit,32-bit"
|
|
bitfld.long 0x00 04. " TRAIL ,Trailing Bytes" "processor,DMAcontrol"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TIL ,Transmitter Interrupt Level" "halfEmpt,empty"
|
|
bitfld.long 0x00 02. " RESETTF ,Reset Transmit FIFO" "-,rst"
|
|
bitfld.long 0x00 01. " RESETRF ,Reset Receive FIFO" "-,rst"
|
|
textline " "
|
|
bitfld.long 0x00 00. " TRFIFOE ,Transmit and Receive FIFO Enable" "dis,ena"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "STLCR, Line Control Register"
|
|
bitfld.long 0x00 07. " DLAB ,Divisor Latch Access" "THR-RBR-IER,DLH-DLL"
|
|
bitfld.long 0x00 06. " SB ,Set Break" "-,TXD=0"
|
|
bitfld.long 0x00 05. " STKYP ,Sticky Parity" "-,/EPS"
|
|
textline " "
|
|
bitfld.long 0x00 04. " EPS ,Even Parity Select" "odd,even"
|
|
bitfld.long 0x00 03. " PEN ,Parity Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " STB ,Stop Bits" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 00.--01. " WLS[1:0] ,Word Length Select" "5,6,7,8"
|
|
if (d.l(asd:0x40700000+0x10)&0x10)==0x10
|
|
group 0x10++0x03
|
|
line.long 0x00 "STMCR, Modem Control Register"
|
|
bitfld.long 0x00 05. " AFE ,Auto-Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " LOOP ,Loopback Mode" "nrml,LB-UART"
|
|
bitfld.long 0x00 03. " OUT2 ,OUT2 Signal Control" "MSR[DCD]=0,MSR[DCD]=1"
|
|
textline " "
|
|
bitfld.long 0x00 02. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
bitfld.long 0x00 01. " RTS ,Request to Send" "dis,ena"
|
|
bitfld.long 0x00 00. " DTR ,Data Terminal Ready" "nDTR=1,nDTR=0"
|
|
else
|
|
group 0x10++0x03
|
|
line.long 0x00 "STMCR, Modem Control Register"
|
|
bitfld.long 0x00 05. " AFE ,Auto-Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " LOOP ,Loopback Mode" "nrml,LB-UART"
|
|
bitfld.long 0x00 03. " OUT2 ,OUT2 Signal Control" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 02. " OUT1 ,Test Bit" "MSR[RI]=0,MSR[RI]=1"
|
|
bitfld.long 0x00 01. " RTS ,Request to Send" "dis,ena"
|
|
bitfld.long 0x00 00. " DTR ,Data Terminal Ready" "nDTR=1,nDTR=0"
|
|
endif
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "STLSR, Line Status Register"
|
|
bitfld.long 0x00 07. " FIFOE ,FIFO Error Status" "noErr,error"
|
|
bitfld.long 0x00 06. " TEMT ,Transmitter Empty" "no,yes"
|
|
bitfld.long 0x00 05. " TDRQ ,Transmit Data Request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 04. " BI ,Break Interrupt" "no,yes"
|
|
bitfld.long 0x00 03. " FE ,Framing Error" "noErr,error"
|
|
bitfld.long 0x00 02. " PE ,Parity Error" "noErr,error"
|
|
textline " "
|
|
bitfld.long 0x00 01. " OE ,Overrun Error" "noErr,error"
|
|
bitfld.long 0x00 00. " DR ,Data Ready" "no,yes"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "STMSR, Modem Status Register"
|
|
bitfld.long 0x00 07. " DCD ,Data Carrier Detect" "nDCD=1,nDCD=0"
|
|
bitfld.long 0x00 06. " RI ,Ring Indicator" "nRI=1,nRI=0"
|
|
bitfld.long 0x00 05. " DSR ,Data Set Ready" "nDSR=1,nDSR=0"
|
|
textline " "
|
|
bitfld.long 0x00 04. " CTS ,Clear To Send" "nCTS=1,nCTS=0"
|
|
bitfld.long 0x00 03. " DDCD ,Delta Data Carrier Detect" "no,yes"
|
|
bitfld.long 0x00 02. " TERI ,Trailing Edge Ring Indicator" "noChng,changed"
|
|
textline " "
|
|
bitfld.long 0x00 01. " DDSR ,Delta Data Set Ready" "noChng,changed"
|
|
bitfld.long 0x00 00. " DCTS ,Delta Clear To Send" "noChng,changed"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "STSCR, Scratch Pad Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " Scratchpad ,No effect on UART functions"
|
|
group 0x20++0x03
|
|
line.long 0x00 "STISR, Infrared Select Register"
|
|
bitfld.long 0x00 04. " RXPL ,Receive Data Polarity" "posPulAs0,negPulAs0"
|
|
bitfld.long 0x00 03. " TXPL ,Transmit Data Polarity" "posPulAs0,negPulAs0"
|
|
bitfld.long 0x00 02. " XMODE ,Transmit Pulse Width Select" "3/16bit,1.6us"
|
|
textline " "
|
|
bitfld.long 0x00 01. " RCVEIR ,Receiver SIR Enable" "UART,SIR"
|
|
bitfld.long 0x00 00. " XMITIR ,Transmitter SIR Enable" "UART,SIR"
|
|
group 0x24++0x03
|
|
line.long 0x00 "STFOR, Receive FIFO Occupancy Register"
|
|
hexmask.long.byte 0x00 00.--05. 1. " BC ,Byte Count-Number of bytes (0-63) remaining in the receive FIFO"
|
|
group 0x28++0x03
|
|
line.long 0x00 "STABR, Auto-baud Control Register"
|
|
bitfld.long 0x00 03. " ABT ,Auto-Baud Rate Calculation" "formula,table"
|
|
bitfld.long 0x00 02. " ABUP ,Auto-Baud Programmer" "processor,UART"
|
|
bitfld.long 0x00 01. " ABLIE ,Auto-Baud Lock Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " ABE ,Auto-Baud Enable" "dis,ena"
|
|
rgroup 0x2C++0x03
|
|
line.long 0x00 "STACR, Auto-baud Count Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " Count ,Value Number of 14.857-MHz clock cycles within a start-bit pulse"
|
|
tree.end
|
|
width 10.
|
|
tree.end
|
|
tree "Fast Infrared Communications Port"
|
|
width 7.
|
|
base ASD:0x40800000
|
|
group 0x00++0x03
|
|
line.long 0x00 "ICCR0,FICP Control Register 0"
|
|
bitfld.long 0x00 07. " AME ,Address Match Enable" "dis,ena"
|
|
bitfld.long 0x00 06. " TIE ,Transmit FIFO Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " RIE ,Receive FIFO Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 04. " RXE ,Receive Enable" "dis,ena"
|
|
bitfld.long 0x00 03. " TXE ,Transmit Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " TUS ,Transmit FIFO Underrun Select" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 01. " LBM ,Loopback Mode" "nrml,LBmode"
|
|
bitfld.long 0x00 00. " ITR ,IrDA Transmission" "dis,ena"
|
|
group 0x04++0x03
|
|
line.long 0x00 "ICCR1,FICP Control Register 1"
|
|
hexmask.long.byte 0x00 00.--07. 1. " AMV ,Address Match Value"
|
|
group 0x08++0x03
|
|
line.long 0x00 "ICCR2,FICP Control Register 2"
|
|
bitfld.long 0x00 05. " BUS ,32-Bit Peripheral Bus" "8-bit,32-bit"
|
|
bitfld.long 0x00 04. " TRAIL ,Trailing Bytes" "processor,DMA"
|
|
bitfld.long 0x00 03. " RXP ,Receive Pin Polarity Select" "invert,noInv"
|
|
textline " "
|
|
bitfld.long 0x00 02. " TXP ,Transmit Pin Polarity Select" "invert,noInv"
|
|
bitfld.long 0x00 00.--01. " TRIG ,Receive FIFO Trigger Threshold" ">=8byte,>=16byte,>=32byte,res"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "ICDR,FICP Data Register"
|
|
group 0x14++0x03
|
|
line.long 0x00 "ICSR0,FICP Status Register 0"
|
|
bitfld.long 0x00 06. " EOC ,DMA End-of-Descriptor Chain" "no,yes"
|
|
bitfld.long 0x00 05. " FRE ,Framing Error" "no,yes"
|
|
bitfld.long 0x00 04. " RFS ,Receive FIFO Service Request (read-only)" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TFS ,Transmit FIFO Service Request (read-only)" "no,yes"
|
|
bitfld.long 0x00 02. " RAB ,Receiver Abort" "no,yes"
|
|
bitfld.long 0x00 01. " TUR ,Transmit FIFO Underrun" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 00. " EIF ,End/Error in FIFO (read-only)" "no,yes"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "ICSR1,FICP Status Register 1"
|
|
bitfld.long 0x00 06. " ROR ,Receive FIFO Overrun (read-only)" "no,yes"
|
|
bitfld.long 0x00 05. " CRE ,CRC Error (read-only)" "no,yes"
|
|
bitfld.long 0x00 04. " EOF ,End of Frame (read-only)" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TNF ,Transmit FIFO Not Full (read-only)" "full,noFull"
|
|
bitfld.long 0x00 02. " RNE ,Receive FIFO Not Empty (read-only)" "empty,noEmpt"
|
|
bitfld.long 0x00 01. " TBY ,Transmitter Busy Flag (read-only)" "idle,busy"
|
|
textline " "
|
|
bitfld.long 0x00 00. " RSY ,Receiver Synchronized Flag (read-only)" "no,yes"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "ICFOR,FICP FIFO Occupancy Status Register"
|
|
hexmask.long.byte 0x00 00.--06. 1. " BC ,Byte Count-Number of bytes (0-64) remaining in the receiver FIFO"
|
|
width 10.
|
|
tree.end
|
|
tree "USB Client Controller"
|
|
base ASD:0x40600000
|
|
width 10.
|
|
group 0x0000++0x03
|
|
line.long 0x00 "UDCCR,UDC Control Register"
|
|
bitfld.long 0x00 31. " OEN ,On-The-Go Enable" "dis,ena"
|
|
bitfld.long 0x00 30. " AALTHNP ,A-Device Alternate Host Negotiation Protocol Port Support" "no,yes"
|
|
bitfld.long 0x00 29. " AHNP ,A-Device Host Negotiation Protocol Support" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BHNP ,B-Device Host Negotiation Protocol Enable" "dis,ena"
|
|
bitfld.long 0x00 16. " DWRE ,Device Remote Wake-Up Feature" "dis,ena"
|
|
bitfld.long 0x00 11.--12. " ACN ,Active UDC Configuration Number" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 08.--10. " AIN ,Active UDC Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 05.--07. " AAISN ,Active UDC Alternate Interface Setting Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 04. " SMAC ,Switch Endpoint Memory to Active Configuration" "noChng,change"
|
|
textline " "
|
|
eventfld.long 0x00 03. " EMCE ,Endpoint Memory Configuration Error" "noErr,error"
|
|
bitfld.long 0x00 02. " UDR ,UDC Resume" "no,yes"
|
|
bitfld.long 0x00 01. " UDA ,UDC Active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 00. " UDE ,UDC Enable" "dis,ena"
|
|
group 0x0004++0x03
|
|
line.long 0x00 "UDCICR0,UDC Interrupt Control Register 0"
|
|
bitfld.long 0x00 30.--31. " IEP ,Interrupt Enables-Endpoint P" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 28.--29. " IEN ,Interrupt Enables-Endpoint N" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 26.--27. " IEM ,Interrupt Enables-Endpoint M" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " IEL ,Interrupt Enables-Endpoint L" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 22.--23. " IEK ,Interrupt Enables-Endpoint K" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 20.--21. " IEJ ,Interrupt Enables-Endpoint J" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IEI ,Interrupt Enables-Endpoint I" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 16.--17. " IEH ,Interrupt Enables-Endpoint H" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 14.--15. " IEG ,Interrupt Enables-Endpoint G" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IEF ,Interrupt Enables-Endpoint F" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 10.--11. " IEE ,Interrupt Enables-Endpoint E" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 08.--09. " IED ,Interrupt Enables-Endpoint D" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
textline " "
|
|
bitfld.long 0x00 06.--07. " IEC ,Interrupt Enables-Endpoint C" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 04.--05. " IEB ,Interrupt Enables-Endpoint B" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 02.--03. " IEA ,Interrupt Enables-Endpoint A" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
textline " "
|
|
bitfld.long 0x00 00.--01. " IE0 ,Interrupt Enables-Endpoint 0" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
group 0x0008++0x03
|
|
line.long 0x00 "UDCCIR1, UDC Interrupt Control register 1"
|
|
bitfld.long 0x00 31. " IECC ,Interrupt Enable-Configuration Change" "dis,ena"
|
|
bitfld.long 0x00 30. " IESOF ,Interrupt Enable-Start of Frame" "dis,ena"
|
|
bitfld.long 0x00 29. " IERU ,Interrupt Enable-Resume" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IESU ,Interrupt Enable-Suspend" "dis,ena"
|
|
bitfld.long 0x00 27. " IERS ,Interrupt Enable-Reset" "dis,ena"
|
|
bitfld.long 0x00 14.--15. " IEX ,Interrupt Enables-Endpoint X" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IEW ,Interrupt Enables-Endpoint W" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 10.--11. " IEV ,Interrupt Enables-Endpoint V" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 08.--09. " IEU ,Interrupt Enables-Endpoint U" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
textline " "
|
|
bitfld.long 0x00 06.--07. " IET ,Interrupt Enables-Endpoint T" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 04.--05. " IES ,Interrupt Enables-Endpoint S" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
bitfld.long 0x00 02.--03. " IER ,Interrupt Enables-Endpoint R" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
textline " "
|
|
bitfld.long 0x00 00.--01. " IEQ ,Interrupt Enables-Endpoint Q" "allDis,pckCmplInt,FIFOErrInt,bothEna"
|
|
group 0x000C++0x03
|
|
line.long 0x00 "UDCISR0, UDC Interrupt Status register 0"
|
|
bitfld.long 0x00 30.--31. " IRP ,Interrupt Requests-Endpoint P" "00,01,10,11"
|
|
bitfld.long 0x00 28.--29. " IRN ,Interrupt Requests-Endpoint N" "00,01,10,11"
|
|
bitfld.long 0x00 26.--27. " IRM ,Interrupt Requests-Endpoint M" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " IRL ,Interrupt Requests-Endpoint L" "00,01,10,11"
|
|
bitfld.long 0x00 22.--23. " IRK ,Interrupt Requests-Endpoint K" "00,01,10,11"
|
|
bitfld.long 0x00 20.--21. " IRJ ,Interrupt Requests-Endpoint J" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IRI ,Interrupt Requests-Endpoint I" "00,01,10,11"
|
|
bitfld.long 0x00 16.--17. " IRH ,Interrupt Requests-Endpoint H" "00,01,10,11"
|
|
bitfld.long 0x00 14.--15. " IRG ,Interrupt Requests-Endpoint G" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IMF ,Interrupt Requests-Endpoint F" "00,01,10,11"
|
|
bitfld.long 0x00 10.--11. " IRE ,Interrupt Requests-Endpoint E" "00,01,10,11"
|
|
bitfld.long 0x00 08.--09. " IRD ,Interrupt Requests-Endpoint D" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 06.--07. " IRC ,Interrupt Requests-Endpoint C" "00,01,10,11"
|
|
bitfld.long 0x00 04.--05. " IRB ,Interrupt Requests-Endpoint B" "00,01,10,11"
|
|
bitfld.long 0x00 02.--03. " IRA ,Interrupt Requests-Endpoint A" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 00.--01. " IR0 ,Interrupt Requests-Endpoint 0" "00,01,10,11"
|
|
group 0x0010++0x03
|
|
line.long 0x00 "UDCSIR1, UDC Interrupt Status register 1"
|
|
bitfld.long 0x00 31. " IRCC ,Interrupt Requests-Configuration Change" "0,1"
|
|
bitfld.long 0x00 30. " IRSOF ,Interrupt Requests-Start of Frame" "0,1"
|
|
bitfld.long 0x00 29. " IRRU ,Interrupt Requests-Resume" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRSU ,Interrupt Requests-Suspend" "0,1"
|
|
bitfld.long 0x00 27. " IRRS ,Interrupt Requests-Reset" "0,1"
|
|
bitfld.long 0x00 14.--15. " IRX ,Interrupt Requests-Endpoint X" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IRW ,Interrupt Requests-Endpoint W" "00,01,10,11"
|
|
bitfld.long 0x00 10.--11. " IRV ,Interrupt Requests-Endpoint V" "00,01,10,11"
|
|
bitfld.long 0x00 08.--09. " IRU ,Interrupt Requests-Endpoint U" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 06.--07. " IRT ,Interrupt Requests-Endpoint T" "00,01,10,11"
|
|
bitfld.long 0x00 04.--05. " IRS ,Interrupt Requests-Endpoint S" "00,01,10,11"
|
|
bitfld.long 0x00 02.--03. " IRR ,Interrupt Requests-Endpoint R" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 00.--01. " IRQ ,Interrupt Requests-Endpoint Q" "00,01,10,11"
|
|
rgroup 0x0014++0x03
|
|
line.long 0x00 "UDCFNR, UDC Frame Number register"
|
|
hexmask.long.word 0x00 00.--10. 1. " FN ,Frame number associated with last received SOF"
|
|
group 0x0018++0x03
|
|
line.long 0x00 "UDCOTGICR, UDC OTG Interrupt Control register"
|
|
bitfld.long 0x00 24. " IESF ,OTG SET_FEATURE Command Received" "dis,ena"
|
|
bitfld.long 0x00 17. " IEXR ,External Transceiver Interrupt Rising-Edge Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 16. " IEXF ,External Transceiver Interrupt Falling-Edge Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 09. " IEVV40R ,OTG Vbus Valid 4.0-V Rising-Edge Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 08. " IEVV40F ,OTG Vbus Valid 4.0-V Falling-Edge Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 07. " IEVV44R ,OTG Vbus Valid 4.4-V Rising-Edge Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 06. " IEVV44F ,OTG Vbus Valid 4.4-V Falling-Edge Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " IESVR ,OTG Session Valid Rising-Edge Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " IESVF ,OTG Session Valid Falling-Edge Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 03. " IESDR ,OTG A-Device SRP Detect Rising-Edge Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " IESDF ,OTG A-Device SRP Detect Falling-Edge Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " IEIDR ,OTG ID Change Rising-Edge Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " IEIDF ,OTG ID Change Falling-Edge Interrupt Enable" "dis,ena"
|
|
group 0x001C++0x03
|
|
line.long 0x00 "UDCOTGISR, UDC OTG Interrupt Status register"
|
|
eventfld.long 0x00 24. " IRSF ,OTG SET_FEATURE Command Received" "no,yes"
|
|
eventfld.long 0x00 17. " IRXR ,External Transceiver Interrupt Rising-Edge Interrupt Request" "no,yes"
|
|
eventfld.long 0x00 16. " IRXF ,External Transceiver Interrupt Falling-Edge Interrupt Request" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 09. " IRVV40R ,OTG Vbus Valid 4.0-V Rising-Edge Interrupt Request" "no,yes"
|
|
eventfld.long 0x00 08. " IRVV40F ,OTG Vbus Valid 4.0-V Falling-Edge Interrupt Request" "no,yes"
|
|
eventfld.long 0x00 07. " IRVV44R ,OTG Vbus Valid 4.4-V Rising-Edge Interrupt Request" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 06. " IRVV44F ,OTG Vbus Valid 4.4-V Falling-Edge Interrupt Request" "no,yes"
|
|
eventfld.long 0x00 05. " IRSVR ,OTG Session Valid Rising-Edge Interrupt Request" "no,yes"
|
|
eventfld.long 0x00 04. " IRSVF ,OTG Session Valid Falling-Edge Interrupt Request" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 03. " IRSDR ,OTG A-Device SRP Detect Rising-Edge Interrupt Request" "no,yes"
|
|
eventfld.long 0x00 02. " IRSDF ,OTG A-Device SRP Detect Falling-Edge Interrupt Request" "no,yes"
|
|
eventfld.long 0x00 01. " IRIDR ,OTG ID Change Rising-Edge Interrupt Request" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 00. " IRIDF ,OTG ID Change Falling-Edge Interrupt Request" "no,yes"
|
|
group 0x0020++0x03
|
|
line.long 0x00 "UP2OCR,USB Port 2 Output Control Register"
|
|
bitfld.long 0x00 24.--26. " SEOS ,Single-Ended Output Select" "off,-,devCtrlSgl,HstCtrlSgl,devCtrl+extOTG,hstCtrl+extOTG,devCtrl+extPump,hstCtrl+extPump"
|
|
bitfld.long 0x00 17. " HXOE ,Host Port 2 Transceiver Output Enable" "dis,ena"
|
|
bitfld.long 0x00 16. " HXS ,Host Port 2 Transceiver Output Select" "dev,host"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IDON ,OTG ID Read Enable" "dis,ena"
|
|
bitfld.long 0x00 09. " EXSUS ,External Transceiver Suspend Enable" "dis,ena"
|
|
bitfld.long 0x00 08. " EXSP ,External Transceiver Speed Control" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 07. " DMSTATE ,Host Port 2 Transceiver D -Pull Up Bypass Enable" "dis,ena"
|
|
bitfld.long 0x00 06. " VPMBlockEnbN ,Host Port 3 VPM Block Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " DPSTATE ,Host Port 2 Transceiver D+ Pull Up Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 04. " DPPUE ,Host Port 2 Transceiver D+ Pull Up Enable" "dis,ena"
|
|
bitfld.long 0x00 03. " DMPDE ,Host Port 2 Transceiver D- Pull Down Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " DPPDE ,Host Port 2 Transceiver D+ Pull Down Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 01. " CPVPE ,Charge Pump Vbus Pulse Enable" "dis,ena"
|
|
bitfld.long 0x00 00. " CPVEN ,Charge Pump Vbus Enable" "dis,ena"
|
|
group 0x0024++0x03
|
|
line.long 0x00 "UP3OCR, USB Port 3 Output Control register"
|
|
bitfld.long 0x00 00.--01. " CFG ,Host Port 3 Configuration" "host,-,device,ForceSE0"
|
|
group 0x0100++0x03
|
|
line.long 0x00 "UDCCSR0, UDC Control/Status register-Endpoint 0"
|
|
bitfld.long 0x00 09. " ACM ,ACK Control Mode" "ACK,NAK"
|
|
bitfld.long 0x00 08. " AREN ,ACK Response Enable" "NAK,ACK"
|
|
eventfld.long 0x00 07. " SA ,Setup Active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 06. " RNE ,Receive FIFO Not Empty" "empty,noEmpt"
|
|
bitfld.long 0x00 05. " FST ,Force Stall" "no,yes"
|
|
eventfld.long 0x00 04. " SST ,Sent Stall" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " DME ,DMA Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " FTF ,Flush Transmit FIFO" "no,yes"
|
|
bitfld.long 0x00 01. " IPR ,IN Packet Ready" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 00. " OPC ,OUT Packet Complete" "no,yes"
|
|
group 0x0104--0x15f "UDC Control/Status Registers-Endpoint A-X"
|
|
line.long 0x0 "UDCCSRA,UDC Control/Status Register A"
|
|
bitfld.long 0x0 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x0 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x0 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x0 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x0 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x0 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x0 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x0 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x0 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x4 "UDCCSRB,UDC Control/Status Register B"
|
|
bitfld.long 0x4 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x4 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x4 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x4 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x4 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x4 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x4 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x8 "UDCCSRC,UDC Control/Status Register C"
|
|
bitfld.long 0x8 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x8 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x8 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x8 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x8 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x8 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x8 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x8 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x8 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x8 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0xC "UDCCSRD,UDC Control/Status Register D"
|
|
bitfld.long 0xC 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0xC 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0xC 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0xC 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0xC 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0xC 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0xC 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0xC 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0xC 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0xC 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x10 "UDCCSRE,UDC Control/Status Register E"
|
|
bitfld.long 0x10 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x10 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x10 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x10 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x10 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x10 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x10 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x10 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x10 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x10 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x14 "UDCCSRF,UDC Control/Status Register F"
|
|
bitfld.long 0x14 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x14 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x14 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x14 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x14 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x14 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x14 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x14 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x14 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x14 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x18 "UDCCSRG,UDC Control/Status Register G"
|
|
bitfld.long 0x18 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x18 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x18 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x18 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x18 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x18 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x18 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x18 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x18 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x18 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x1C "UDCCSRH,UDC Control/Status Register H"
|
|
bitfld.long 0x1C 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x1C 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x1C 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1C 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x1C 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x1C 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x1C 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x1C 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x1C 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x1C 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x20 "UDCCSRI,UDC Control/Status Register I"
|
|
bitfld.long 0x20 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x20 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x20 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x20 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x20 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x20 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x20 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x20 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x20 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x20 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x24 "UDCCSRJ,UDC Control/Status Register J"
|
|
bitfld.long 0x24 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x24 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x24 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x24 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x24 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x24 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x24 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x24 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x24 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x24 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x28 "UDCCSRK,UDC Control/Status Register K"
|
|
bitfld.long 0x28 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x28 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x28 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x28 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x28 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x28 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x28 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x28 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x28 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x28 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x2C "UDCCSRL,UDC Control/Status Register L"
|
|
bitfld.long 0x2C 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x2C 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x2C 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x2C 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x2C 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x2C 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x2C 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x2C 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x2C 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x2C 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x30 "UDCCSRM,UDC Control/Status Register M"
|
|
bitfld.long 0x30 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x30 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x30 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x30 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x30 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x30 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x30 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x30 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x30 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x30 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x34 "UDCCSRN,UDC Control/Status Register N"
|
|
bitfld.long 0x34 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x34 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x34 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x34 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x34 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x34 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x34 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x34 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x34 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x34 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x38 "UDCCSRP,UDC Control/Status Register P"
|
|
bitfld.long 0x38 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x38 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x38 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x38 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x38 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x38 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x38 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x38 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x38 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x38 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x3C "UDCCSRQ,UDC Control/Status Register Q"
|
|
bitfld.long 0x3C 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x3C 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x3C 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x3C 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x3C 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x3C 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x3C 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x3C 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x3C 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x3C 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x40 "UDCCSRR,UDC Control/Status Register R"
|
|
bitfld.long 0x40 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x40 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x40 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x40 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x40 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x40 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x40 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x40 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x40 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x40 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x44 "UDCCSRS,UDC Control/Status Register S"
|
|
bitfld.long 0x44 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x44 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x44 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x44 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x44 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x44 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x44 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x44 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x44 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x44 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x48 "UDCCSRT,UDC Control/Status Register T"
|
|
bitfld.long 0x48 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x48 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x48 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x48 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x48 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x48 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x48 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x48 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x48 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x48 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x4C "UDCCSRU,UDC Control/Status Register U"
|
|
bitfld.long 0x4C 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x4C 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x4C 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4C 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x4C 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x4C 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4C 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x4C 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x4C 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x4C 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x50 "UDCCSRV,UDC Control/Status Register V"
|
|
bitfld.long 0x50 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x50 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x50 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x50 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x50 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x50 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x50 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x50 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x50 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x50 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x54 "UDCCSRW,UDC Control/Status Register W"
|
|
bitfld.long 0x54 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x54 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x54 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x54 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x54 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x54 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x54 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x54 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x54 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x54 00. " FS ,FIFO needs service" "no,yes"
|
|
line.long 0x58 "UDCCSRX,UDC Control/Status Register X"
|
|
bitfld.long 0x58 09. " DPE ,Data Packet Error (isochronous endpoints only)" "no,yes"
|
|
bitfld.long 0x58 08. " FEF ,Flush Endpoint FIFO" "no,yes"
|
|
bitfld.long 0x58 07. " SP ,Short Packet Control/Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x58 06. " BNE/BNF ,Buffer Not Empty/Buffer Not Full" "-,no "
|
|
bitfld.long 0x58 05. " FST ,Force STALL" "no,yes"
|
|
eventfld.long 0x58 04. " SST ,Sent STALL" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x58 03. " DME ,DMA Enable" "dis,ena"
|
|
eventfld.long 0x58 02. " TRN ,Tx/Rx NAK" "-,NAK"
|
|
eventfld.long 0x58 01. " PC ,Packet Complete" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x58 00. " FS ,FIFO needs service" "no,yes"
|
|
rgroup 0x0200--0x25f "UDC Byte Count Registers-Endpoint 0-X"
|
|
line.long 0x0 "UDCBCR0,UDC Byte Count Register-Endpoint 0"
|
|
hexmask.long.word 0x0 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x4 "UDCBCRA,UDC Byte Count Register-Endpoint A"
|
|
hexmask.long.word 0x4 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x8 "UDCBCRB,UDC Byte Count Register-Endpoint B"
|
|
hexmask.long.word 0x8 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0xC "UDCBCRC,UDC Byte Count Register-Endpoint C"
|
|
hexmask.long.word 0xC 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x10 "UDCBCRD,UDC Byte Count Register-Endpoint D"
|
|
hexmask.long.word 0x10 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x14 "UDCBCRE,UDC Byte Count Register-Endpoint E"
|
|
hexmask.long.word 0x14 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x18 "UDCBCRF,UDC Byte Count Register-Endpoint F"
|
|
hexmask.long.word 0x18 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x1C "UDCBCRG,UDC Byte Count Register-Endpoint G"
|
|
hexmask.long.word 0x1C 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x20 "UDCBCRH,UDC Byte Count Register-Endpoint H"
|
|
hexmask.long.word 0x20 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x24 "UDCBCRI,UDC Byte Count Register-Endpoint I"
|
|
hexmask.long.word 0x24 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x28 "UDCBCRJ,UDC Byte Count Register-Endpoint J"
|
|
hexmask.long.word 0x28 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x2C "UDCBCRK,UDC Byte Count Register-Endpoint K"
|
|
hexmask.long.word 0x2C 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x30 "UDCBCRL,UDC Byte Count Register-Endpoint L"
|
|
hexmask.long.word 0x30 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x34 "UDCBCRM,UDC Byte Count Register-Endpoint M"
|
|
hexmask.long.word 0x34 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x38 "UDCBCRN,UDC Byte Count Register-Endpoint N"
|
|
hexmask.long.word 0x38 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x3C "UDCBCRP,UDC Byte Count Register-Endpoint P"
|
|
hexmask.long.word 0x3C 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x40 "UDCBCRQ,UDC Byte Count Register-Endpoint Q"
|
|
hexmask.long.word 0x40 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x44 "UDCBCRR,UDC Byte Count Register-Endpoint R"
|
|
hexmask.long.word 0x44 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x48 "UDCBCRS,UDC Byte Count Register-Endpoint S"
|
|
hexmask.long.word 0x48 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x4C "UDCBCRT,UDC Byte Count Register-Endpoint T"
|
|
hexmask.long.word 0x4C 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x50 "UDCBCRU,UDC Byte Count Register-Endpoint U"
|
|
hexmask.long.word 0x50 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x54 "UDCBCRV,UDC Byte Count Register-Endpoint V"
|
|
hexmask.long.word 0x54 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x58 "UDCBCRW,UDC Byte Count Register-Endpoint W"
|
|
hexmask.long.word 0x58 00.--09. 1. " BC ,Byte Count"
|
|
line.long 0x5C "UDCBCRX,UDC Byte Count Register-Endpoint X"
|
|
hexmask.long.word 0x5C 00.--09. 1. " BC ,Byte Count"
|
|
group 0x0300--0x35f "UDC Data Registers-Endpoint 0-X"
|
|
line.long 0x0 "UDCDR0,UDC Data Register-Endpoint 0"
|
|
line.long 0x4 "UDCDRA,UDC Data Register-Endpoint A"
|
|
line.long 0x8 "UDCDRB,UDC Data Register-Endpoint B"
|
|
line.long 0xC "UDCDRC,UDC Data Register-Endpoint C"
|
|
line.long 0x10 "UDCDRD,UDC Data Register-Endpoint D"
|
|
line.long 0x14 "UDCDRE,UDC Data Register-Endpoint E"
|
|
line.long 0x18 "UDCDRF,UDC Data Register-Endpoint F"
|
|
line.long 0x1C "UDCDRG,UDC Data Register-Endpoint G"
|
|
line.long 0x20 "UDCDRH,UDC Data Register-Endpoint H"
|
|
line.long 0x24 "UDCDRI,UDC Data Register-Endpoint I"
|
|
line.long 0x28 "UDCDRJ,UDC Data Register-Endpoint J"
|
|
line.long 0x2C "UDCDRK,UDC Data Register-Endpoint K"
|
|
line.long 0x30 "UDCDRL,UDC Data Register-Endpoint L"
|
|
line.long 0x34 "UDCDRM,UDC Data Register-Endpoint M"
|
|
line.long 0x38 "UDCDRN,UDC Data Register-Endpoint N"
|
|
line.long 0x3C "UDCDRP,UDC Data Register-Endpoint P"
|
|
line.long 0x40 "UDCDRQ,UDC Data Register-Endpoint Q"
|
|
line.long 0x44 "UDCDRR,UDC Data Register-Endpoint R"
|
|
line.long 0x48 "UDCDRS,UDC Data Register-Endpoint S"
|
|
line.long 0x4C "UDCDRT,UDC Data Register-Endpoint T"
|
|
line.long 0x50 "UDCDRU,UDC Data Register-Endpoint U"
|
|
line.long 0x54 "UDCDRV,UDC Data Register-Endpoint V"
|
|
line.long 0x58 "UDCDRW,UDC Data Register-Endpoint W"
|
|
line.long 0x5C "UDCDRX,UDC Data Register-Endpoint X"
|
|
if (d.l(asd:0x0:0x40600000)&0x1)==0x1
|
|
rgroup 0x0404--0x45f "UDC Configuration Registers-Endpoint A-X"
|
|
line.long 0x0 "UDCCRA,UDC Configuration Register -Endpoint A"
|
|
bitfld.long 0x0 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x0 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x0 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x0 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x0 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x0 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x4 "UDCCRB,UDC Configuration Register -Endpoint B"
|
|
bitfld.long 0x4 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x4 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x4 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x4 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x4 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x4 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x4 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x8 "UDCCRC,UDC Configuration Register -Endpoint C"
|
|
bitfld.long 0x8 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x8 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x8 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x8 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x8 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x8 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x8 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x8 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0xC "UDCCRD,UDC Configuration Register -Endpoint D"
|
|
bitfld.long 0xC 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0xC 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0xC 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0xC 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0xC 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0xC 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0xC 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0xC 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x10 "UDCCRE,UDC Configuration Register -Endpoint E"
|
|
bitfld.long 0x10 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x10 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x10 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x10 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x10 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x10 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x10 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x14 "UDCCRF,UDC Configuration Register -Endpoint F"
|
|
bitfld.long 0x14 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x14 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x14 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x14 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x14 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x14 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x14 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x18 "UDCCRG,UDC Configuration Register -Endpoint G"
|
|
bitfld.long 0x18 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x18 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x18 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x18 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x18 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x18 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x18 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x18 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x1C "UDCCRH,UDC Configuration Register -Endpoint H"
|
|
bitfld.long 0x1C 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x1C 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x1C 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x1C 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x1C 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x1C 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x1C 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x20 "UDCCRI,UDC Configuration Register -Endpoint I"
|
|
bitfld.long 0x20 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x20 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x20 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x20 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x20 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x20 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x20 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x20 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x24 "UDCCRJ,UDC Configuration Register -Endpoint J"
|
|
bitfld.long 0x24 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x24 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x24 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x24 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x24 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x24 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x24 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x28 "UDCCRK,UDC Configuration Register -Endpoint K"
|
|
bitfld.long 0x28 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x28 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x28 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x28 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x28 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x28 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x28 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x2C "UDCCRL,UDC Configuration Register -Endpoint L"
|
|
bitfld.long 0x2C 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x2C 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x2C 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x2C 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x2C 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x2C 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x2C 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x2C 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x30 "UDCCRM,UDC Configuration Register -Endpoint M"
|
|
bitfld.long 0x30 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x30 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x30 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x30 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x30 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x30 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x30 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x30 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x30 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x34 "UDCCRN,UDC Configuration Register -Endpoint N"
|
|
bitfld.long 0x34 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x34 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x34 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x34 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x34 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x34 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x34 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x34 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x34 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x38 "UDCCRP,UDC Configuration Register -Endpoint P"
|
|
bitfld.long 0x38 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x38 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x38 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x38 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x38 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x38 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x38 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x38 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x38 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x3C "UDCCRQ,UDC Configuration Register -Endpoint Q"
|
|
bitfld.long 0x3C 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x3C 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x3C 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x3C 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x3C 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x3C 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x3C 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x3C 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x3C 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x40 "UDCCRR,UDC Configuration Register -Endpoint R"
|
|
bitfld.long 0x40 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x40 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x40 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x40 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x40 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x40 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x40 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x40 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x40 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x44 "UDCCRS,UDC Configuration Register -Endpoint S"
|
|
bitfld.long 0x44 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x44 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x44 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x44 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x44 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x44 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x44 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x44 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x44 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x48 "UDCCRT,UDC Configuration Register -Endpoint T"
|
|
bitfld.long 0x48 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x48 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x48 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x48 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x48 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x48 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x48 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x48 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x48 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x4C "UDCCRU,UDC Configuration Register -Endpoint U"
|
|
bitfld.long 0x4C 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x4C 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4C 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4C 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x4C 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x4C 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x4C 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x4C 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x4C 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x50 "UDCCRV,UDC Configuration Register -Endpoint V"
|
|
bitfld.long 0x50 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x50 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x50 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x50 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x50 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x50 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x50 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x50 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x50 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x54 "UDCCRW,UDC Configuration Register -Endpoint W"
|
|
bitfld.long 0x54 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x54 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x54 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x54 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x54 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x54 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x54 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x54 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x54 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x58 "UDCCRX,UDC Configuration Register -Endpoint X"
|
|
bitfld.long 0x58 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x58 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x58 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x58 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x58 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x58 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x58 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x58 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x58 00. " EE ,Endpoint Enable" "dis,ena"
|
|
else
|
|
group 0x0404--0x45f "UDC Configuration Registers-Endpoint A-X"
|
|
line.long 0x0 "UDCCRA,UDC Configuration Register -Endpoint A"
|
|
bitfld.long 0x0 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x0 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x0 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x0 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x0 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x0 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x4 "UDCCRB,UDC Configuration Register -Endpoint B"
|
|
bitfld.long 0x4 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x4 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x4 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x4 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x4 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x4 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x4 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x8 "UDCCRC,UDC Configuration Register -Endpoint C"
|
|
bitfld.long 0x8 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x8 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x8 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x8 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x8 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x8 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x8 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x8 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0xC "UDCCRD,UDC Configuration Register -Endpoint D"
|
|
bitfld.long 0xC 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0xC 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0xC 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0xC 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0xC 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0xC 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0xC 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0xC 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x10 "UDCCRE,UDC Configuration Register -Endpoint E"
|
|
bitfld.long 0x10 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x10 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x10 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x10 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x10 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x10 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x10 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x14 "UDCCRF,UDC Configuration Register -Endpoint F"
|
|
bitfld.long 0x14 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x14 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x14 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x14 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x14 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x14 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x14 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x18 "UDCCRG,UDC Configuration Register -Endpoint G"
|
|
bitfld.long 0x18 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x18 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x18 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x18 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x18 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x18 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x18 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x18 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x1C "UDCCRH,UDC Configuration Register -Endpoint H"
|
|
bitfld.long 0x1C 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x1C 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x1C 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x1C 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x1C 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x1C 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x1C 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x20 "UDCCRI,UDC Configuration Register -Endpoint I"
|
|
bitfld.long 0x20 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x20 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x20 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x20 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x20 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x20 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x20 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x20 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x24 "UDCCRJ,UDC Configuration Register -Endpoint J"
|
|
bitfld.long 0x24 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x24 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x24 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x24 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x24 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x24 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x24 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x28 "UDCCRK,UDC Configuration Register -Endpoint K"
|
|
bitfld.long 0x28 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x28 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x28 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x28 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x28 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x28 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x28 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x2C "UDCCRL,UDC Configuration Register -Endpoint L"
|
|
bitfld.long 0x2C 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x2C 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x2C 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x2C 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x2C 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x2C 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x2C 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x2C 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x30 "UDCCRM,UDC Configuration Register -Endpoint M"
|
|
bitfld.long 0x30 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x30 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x30 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x30 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x30 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x30 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x30 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x30 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x30 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x34 "UDCCRN,UDC Configuration Register -Endpoint N"
|
|
bitfld.long 0x34 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x34 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x34 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x34 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x34 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x34 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x34 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x34 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x34 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x38 "UDCCRP,UDC Configuration Register -Endpoint P"
|
|
bitfld.long 0x38 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x38 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x38 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x38 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x38 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x38 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x38 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x38 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x38 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x3C "UDCCRQ,UDC Configuration Register -Endpoint Q"
|
|
bitfld.long 0x3C 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x3C 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x3C 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x3C 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x3C 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x3C 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x3C 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x3C 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x3C 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x40 "UDCCRR,UDC Configuration Register -Endpoint R"
|
|
bitfld.long 0x40 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x40 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x40 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x40 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x40 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x40 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x40 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x40 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x40 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x44 "UDCCRS,UDC Configuration Register -Endpoint S"
|
|
bitfld.long 0x44 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x44 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x44 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x44 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x44 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x44 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x44 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x44 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x44 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x48 "UDCCRT,UDC Configuration Register -Endpoint T"
|
|
bitfld.long 0x48 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x48 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x48 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x48 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x48 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x48 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x48 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x48 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x48 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x4C "UDCCRU,UDC Configuration Register -Endpoint U"
|
|
bitfld.long 0x4C 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x4C 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4C 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4C 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x4C 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x4C 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x4C 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x4C 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x4C 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x50 "UDCCRV,UDC Configuration Register -Endpoint V"
|
|
bitfld.long 0x50 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x50 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x50 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x50 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x50 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x50 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x50 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x50 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x50 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x54 "UDCCRW,UDC Configuration Register -Endpoint W"
|
|
bitfld.long 0x54 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x54 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x54 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x54 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x54 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x54 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x54 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x54 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x54 00. " EE ,Endpoint Enable" "dis,ena"
|
|
line.long 0x58 "UDCCRX,UDC Configuration Register -Endpoint X"
|
|
bitfld.long 0x58 25.--26. " CN ,Configuration Number" "0,1,2,3"
|
|
bitfld.long 0x58 22.--24. " IN ,Interface Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x58 19.--21. " AISN ,Alternate Interface Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x58 15.--18. " EN ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x58 13.--14. " ET ,USB Endpoint Type" "-,isoch,bulk,int"
|
|
bitfld.long 0x58 12. " ED ,USB Endpoint Direction" "out,in"
|
|
textline " "
|
|
hexmask.long.word 0x58 02.--11. 1. " MPS ,Maximum Packet Size"
|
|
bitfld.long 0x58 01. " DE ,Double-Buffering Enable" "dis,ena"
|
|
bitfld.long 0x58 00. " EE ,Endpoint Enable" "dis,ena"
|
|
endif
|
|
tree.end
|
|
tree "AC97 Controller"
|
|
width 8.
|
|
base ASD:0x40500000
|
|
group 0x000++0x03
|
|
line.long 0x00 "POCR,PCM Out Control Register"
|
|
bitfld.long 0x00 03. " FEIE ,FIFO Error Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " FSRIE ,FIFO Service Request Interrupt Enable" "dis,ena"
|
|
group 0x004++0x03
|
|
line.long 0x00 "PCMICR, PCM In Control register"
|
|
bitfld.long 0x00 03. " FEIE ,FIFO Error Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " FSRIE ,FIFO Service Request Interrupt Enable" "dis,ena"
|
|
group 0x008++0x03
|
|
line.long 0x00 "MCCR,Microphone In Control Register"
|
|
bitfld.long 0x00 03. " FEIE ,FIFO Error Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " FSR ,FIFO Service Request Interrupt Enable" "dis,ena"
|
|
group 0x00C++0x03
|
|
line.long 0x00 "GCR,Global Control Register"
|
|
bitfld.long 0x00 24. " nDMAEN ,DMA Enable" "DMAreq,noDMAreq"
|
|
bitfld.long 0x00 19. " CDONE_IE ,Command Done Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 18. " SDONE_IE ,Status Done Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 09. " SRDY_IE ,Secondary Ready Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 08. " PRDY_IE ,Primary Ready Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 05. " SRES_IE ,Secondary Resume Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 04. " PRES_IE ,Primary Resume Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 03. " ACOFF ,AC-Link Shut Off" "no,yes"
|
|
bitfld.long 0x00 02. " WRST ,AC97 Warm Reset" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 01. " nCRST ,AC97 Cold Reset" "no,yes"
|
|
bitfld.long 0x00 00. " GPI_IE ,Codec GPI Interrupt Enable" "dis,ena"
|
|
group 0x010++0x03
|
|
line.long 0x00 "POSR,PCM Out Status Register"
|
|
bitfld.long 0x00 04. " FIFOE ,FIFO Error" "no,yes"
|
|
bitfld.long 0x00 02. " FSR ,FIFO Service Request" "no,yes"
|
|
group 0x014++0x03
|
|
line.long 0x00 "PCMISR,PCM In Status Register"
|
|
bitfld.long 0x00 04. " FIFOE ,FIFO Error" "no,yes"
|
|
bitfld.long 0x00 03. " EOC ,DMA End of Chain Interrupt" "no,yes"
|
|
bitfld.long 0x00 02. " FSR ,FIFO Service Request" "no,yes"
|
|
group 0x018++0x03
|
|
line.long 0x00 "MCSR,Microphone In Status Register"
|
|
bitfld.long 0x00 04. " FIFOE ,FIFO Error" "no,yes"
|
|
bitfld.long 0x00 03. " EOC ,DMA End of Chain Interrupt" "no,yes"
|
|
bitfld.long 0x00 02. " FSR ,FIFO Service Request" "no,yes"
|
|
group 0x01C++0x03
|
|
line.long 0x00 "GSR, Global Status register"
|
|
bitfld.long 0x00 19. " CDONE ,Command Done" "no,yes"
|
|
bitfld.long 0x00 18. " SDONE ,Status Done" "no,yes"
|
|
bitfld.long 0x00 15. " RCS ,Read Completion Status" "nrml,timeout"
|
|
textline " "
|
|
bitfld.long 0x00 14. " B3S12 ,Bit 3 of Slot 12" "0,1"
|
|
bitfld.long 0x00 13. " B2S12 ,Bit 2 of Slot 12" "0,1"
|
|
bitfld.long 0x00 12. " B1S12 ,Bit 1 of Slot 12" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SRESINT ,Secondary Resume Interrupt" "no,yes"
|
|
bitfld.long 0x00 10. " PRESINT ,Primary Resume Interrupt" "no,yes"
|
|
bitfld.long 0x00 09. " SCRDY ,Secondary Codec Ready" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 08. " PCRDY ,Primary Codec Ready" "no,yes"
|
|
bitfld.long 0x00 07. " MCINT ,Mic-In Interrupt" "no,yes"
|
|
bitfld.long 0x00 06. " POINT ,PCM-Out Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 05. " PIINT ,PCM-In Interrupt" "no,yes"
|
|
bitfld.long 0x00 03. " ACOFFD ,AC-link Shut Off Done" "no,yes"
|
|
bitfld.long 0x00 02. " MOINT ,Modem-Out Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 01. " MIINT ,Modem-In Interrupt" "no,yes"
|
|
bitfld.long 0x00 00. " GSCI ,Codec GPI Status Change Interrupt" "no,yes"
|
|
group 0x020++0x03
|
|
line.long 0x00 "CAR,Codec Access Register"
|
|
bitfld.long 0x00 00. " CAIP ,Codec Access In Progress" "no,yes"
|
|
group 0x040++0x03
|
|
line.long 0x00 "PCDR,PCM Data Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PCMR ,PCM Right Channel Data"
|
|
hexmask.long.word 0x00 00.--15. 1. " PCML ,PCM Left Channel Data"
|
|
rgroup 0x060++0x03
|
|
line.long 0x00 "MCDR,Microphone In Data Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " MCDAT ,Mic-In Data"
|
|
group 0x100++0x03
|
|
line.long 0x00 "MOCR,Modem Out Control Register"
|
|
bitfld.long 0x00 03. " FEIE ,FIFO Error Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " FSRIE ,FIFO Service Request Interrupt Enable" "dis,ena"
|
|
group 0x108++0x03
|
|
line.long 0x00 "MICR,Modem In Control Register"
|
|
bitfld.long 0x00 03. " FEIE ,FIFO Error Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " FSRIE ,FIFO Service Request Interrupt Enable" "dis,ena"
|
|
group 0x110++0x03
|
|
line.long 0x00 "MOSR,Modem Out Status Register"
|
|
bitfld.long 0x00 04. " FIFOE ,FIFO Error" "no,yes"
|
|
bitfld.long 0x00 02. " FSR ,FIFO Service Request" "no,yes"
|
|
group 0x118++0x03
|
|
line.long 0x00 "MISR,Modem In Status Register"
|
|
bitfld.long 0x00 04. " FIFOE ,FIFO Error" "no,yes"
|
|
bitfld.long 0x00 03. " EOC ,DMA End-of-Chain Interrupt" "no,yes"
|
|
bitfld.long 0x00 02. " FSR ,FIFO Service Request" "no,yes"
|
|
group 0x140++0x03
|
|
line.long 0x00 "MODR,Modem Data Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " MODAT ,Modem Data"
|
|
group 0x200++0xff "Primary Audio Codec Registers"
|
|
line.long 0x00 "CA=0x00,7-bit codex address"
|
|
line.long 0x04 "CA=0x02,7-bit codex address"
|
|
line.long 0x08 "CA=0x04,7-bit codex address"
|
|
line.long 0x0C "CA=0x06,7-bit codex address"
|
|
line.long 0x10 "CA=0x08,7-bit codex address"
|
|
line.long 0x14 "CA=0x0A,7-bit codex address"
|
|
line.long 0x18 "CA=0x0C,7-bit codex address"
|
|
line.long 0x1C "CA=0x0E,7-bit codex address"
|
|
line.long 0x20 "CA=0x10,7-bit codex address"
|
|
line.long 0x24 "CA=0x12,7-bit codex address"
|
|
line.long 0x28 "CA=0x14,7-bit codex address"
|
|
line.long 0x2C "CA=0x16,7-bit codex address"
|
|
line.long 0x30 "CA=0x18,7-bit codex address"
|
|
line.long 0x34 "CA=0x1A,7-bit codex address"
|
|
line.long 0x38 "CA=0x1C,7-bit codex address"
|
|
line.long 0x3C "CA=0x1E,7-bit codex address"
|
|
line.long 0x40 "CA=0x20,7-bit codex address"
|
|
line.long 0x44 "CA=0x22,7-bit codex address"
|
|
line.long 0x48 "CA=0x24,7-bit codex address"
|
|
line.long 0x4C "CA=0x26,7-bit codex address"
|
|
line.long 0x50 "CA=0x28,7-bit codex address"
|
|
line.long 0x54 "CA=0x2A,7-bit codex address"
|
|
line.long 0x58 "CA=0x2C,7-bit codex address"
|
|
line.long 0x5C "CA=0x2E,7-bit codex address"
|
|
line.long 0x60 "CA=0x30,7-bit codex address"
|
|
line.long 0x64 "CA=0x32,7-bit codex address"
|
|
line.long 0x68 "CA=0x34,7-bit codex address"
|
|
line.long 0x6C "CA=0x36,7-bit codex address"
|
|
line.long 0x70 "CA=0x38,7-bit codex address"
|
|
line.long 0x74 "CA=0x3A,7-bit codex address"
|
|
line.long 0x78 "CA=0x3C,7-bit codex address"
|
|
line.long 0x7C "CA=0x3E,7-bit codex address"
|
|
line.long 0x80 "CA=0x40,7-bit codex address"
|
|
line.long 0x84 "CA=0x42,7-bit codex address"
|
|
line.long 0x88 "CA=0x44,7-bit codex address"
|
|
line.long 0x8C "CA=0x46,7-bit codex address"
|
|
line.long 0x90 "CA=0x48,7-bit codex address"
|
|
line.long 0x94 "CA=0x4A,7-bit codex address"
|
|
line.long 0x98 "CA=0x4C,7-bit codex address"
|
|
line.long 0x9C "CA=0x4E,7-bit codex address"
|
|
line.long 0xA0 "CA=0x50,7-bit codex address"
|
|
line.long 0xA4 "CA=0x52,7-bit codex address"
|
|
line.long 0xA8 "CA=0x54,7-bit codex address"
|
|
line.long 0xAC "CA=0x56,7-bit codex address"
|
|
line.long 0xB0 "CA=0x58,7-bit codex address"
|
|
line.long 0xB4 "CA=0x5A,7-bit codex address"
|
|
line.long 0xB8 "CA=0x5C,7-bit codex address"
|
|
line.long 0xBC "CA=0x5E,7-bit codex address"
|
|
line.long 0xC0 "CA=0x60,7-bit codex address"
|
|
line.long 0xC4 "CA=0x62,7-bit codex address"
|
|
line.long 0xC8 "CA=0x64,7-bit codex address"
|
|
line.long 0xCC "CA=0x66,7-bit codex address"
|
|
line.long 0xD0 "CA=0x68,7-bit codex address"
|
|
line.long 0xD4 "CA=0x6A,7-bit codex address"
|
|
line.long 0xD8 "CA=0x6C,7-bit codex address"
|
|
line.long 0xDC "CA=0x6E,7-bit codex address"
|
|
line.long 0xE0 "CA=0x70,7-bit codex address"
|
|
line.long 0xE4 "CA=0x72,7-bit codex address"
|
|
line.long 0xE8 "CA=0x74,7-bit codex address"
|
|
line.long 0xEC "CA=0x76,7-bit codex address"
|
|
line.long 0xF0 "CA=0x78,7-bit codex address"
|
|
line.long 0xF4 "CA=0x7A,7-bit codex address"
|
|
line.long 0xF8 "CA=0x7C,7-bit codex address"
|
|
line.long 0xFC "CA=0x7E,7-bit codex address"
|
|
group 0x300++0xff "Secondary Audio Codec registers"
|
|
line.long 0x00 "CA=0x00,7-bit codex address"
|
|
line.long 0x04 "CA=0x02,7-bit codex address"
|
|
line.long 0x08 "CA=0x04,7-bit codex address"
|
|
line.long 0x0C "CA=0x06,7-bit codex address"
|
|
line.long 0x10 "CA=0x08,7-bit codex address"
|
|
line.long 0x14 "CA=0x0A,7-bit codex address"
|
|
line.long 0x18 "CA=0x0C,7-bit codex address"
|
|
line.long 0x1C "CA=0x0E,7-bit codex address"
|
|
line.long 0x20 "CA=0x10,7-bit codex address"
|
|
line.long 0x24 "CA=0x12,7-bit codex address"
|
|
line.long 0x28 "CA=0x14,7-bit codex address"
|
|
line.long 0x2C "CA=0x16,7-bit codex address"
|
|
line.long 0x30 "CA=0x18,7-bit codex address"
|
|
line.long 0x34 "CA=0x1A,7-bit codex address"
|
|
line.long 0x38 "CA=0x1C,7-bit codex address"
|
|
line.long 0x3C "CA=0x1E,7-bit codex address"
|
|
line.long 0x40 "CA=0x20,7-bit codex address"
|
|
line.long 0x44 "CA=0x22,7-bit codex address"
|
|
line.long 0x48 "CA=0x24,7-bit codex address"
|
|
line.long 0x4C "CA=0x26,7-bit codex address"
|
|
line.long 0x50 "CA=0x28,7-bit codex address"
|
|
line.long 0x54 "CA=0x2A,7-bit codex address"
|
|
line.long 0x58 "CA=0x2C,7-bit codex address"
|
|
line.long 0x5C "CA=0x2E,7-bit codex address"
|
|
line.long 0x60 "CA=0x30,7-bit codex address"
|
|
line.long 0x64 "CA=0x32,7-bit codex address"
|
|
line.long 0x68 "CA=0x34,7-bit codex address"
|
|
line.long 0x6C "CA=0x36,7-bit codex address"
|
|
line.long 0x70 "CA=0x38,7-bit codex address"
|
|
line.long 0x74 "CA=0x3A,7-bit codex address"
|
|
line.long 0x78 "CA=0x3C,7-bit codex address"
|
|
line.long 0x7C "CA=0x3E,7-bit codex address"
|
|
line.long 0x80 "CA=0x40,7-bit codex address"
|
|
line.long 0x84 "CA=0x42,7-bit codex address"
|
|
line.long 0x88 "CA=0x44,7-bit codex address"
|
|
line.long 0x8C "CA=0x46,7-bit codex address"
|
|
line.long 0x90 "CA=0x48,7-bit codex address"
|
|
line.long 0x94 "CA=0x4A,7-bit codex address"
|
|
line.long 0x98 "CA=0x4C,7-bit codex address"
|
|
line.long 0x9C "CA=0x4E,7-bit codex address"
|
|
line.long 0xA0 "CA=0x50,7-bit codex address"
|
|
line.long 0xA4 "CA=0x52,7-bit codex address"
|
|
line.long 0xA8 "CA=0x54,7-bit codex address"
|
|
line.long 0xAC "CA=0x56,7-bit codex address"
|
|
line.long 0xB0 "CA=0x58,7-bit codex address"
|
|
line.long 0xB4 "CA=0x5A,7-bit codex address"
|
|
line.long 0xB8 "CA=0x5C,7-bit codex address"
|
|
line.long 0xBC "CA=0x5E,7-bit codex address"
|
|
line.long 0xC0 "CA=0x60,7-bit codex address"
|
|
line.long 0xC4 "CA=0x62,7-bit codex address"
|
|
line.long 0xC8 "CA=0x64,7-bit codex address"
|
|
line.long 0xCC "CA=0x66,7-bit codex address"
|
|
line.long 0xD0 "CA=0x68,7-bit codex address"
|
|
line.long 0xD4 "CA=0x6A,7-bit codex address"
|
|
line.long 0xD8 "CA=0x6C,7-bit codex address"
|
|
line.long 0xDC "CA=0x6E,7-bit codex address"
|
|
line.long 0xE0 "CA=0x70,7-bit codex address"
|
|
line.long 0xE4 "CA=0x72,7-bit codex address"
|
|
line.long 0xE8 "CA=0x74,7-bit codex address"
|
|
line.long 0xEC "CA=0x76,7-bit codex address"
|
|
line.long 0xF0 "CA=0x78,7-bit codex address"
|
|
line.long 0xF4 "CA=0x7A,7-bit codex address"
|
|
line.long 0xF8 "CA=0x7C,7-bit codex address"
|
|
line.long 0xFC "CA=0x7E,7-bit codex address"
|
|
group 0x400++0xff "Primary Modem Codec registers"
|
|
line.long 0x00 "CA=0x00,7-bit codex address"
|
|
line.long 0x04 "CA=0x02,7-bit codex address"
|
|
line.long 0x08 "CA=0x04,7-bit codex address"
|
|
line.long 0x0C "CA=0x06,7-bit codex address"
|
|
line.long 0x10 "CA=0x08,7-bit codex address"
|
|
line.long 0x14 "CA=0x0A,7-bit codex address"
|
|
line.long 0x18 "CA=0x0C,7-bit codex address"
|
|
line.long 0x1C "CA=0x0E,7-bit codex address"
|
|
line.long 0x20 "CA=0x10,7-bit codex address"
|
|
line.long 0x24 "CA=0x12,7-bit codex address"
|
|
line.long 0x28 "CA=0x14,7-bit codex address"
|
|
line.long 0x2C "CA=0x16,7-bit codex address"
|
|
line.long 0x30 "CA=0x18,7-bit codex address"
|
|
line.long 0x34 "CA=0x1A,7-bit codex address"
|
|
line.long 0x38 "CA=0x1C,7-bit codex address"
|
|
line.long 0x3C "CA=0x1E,7-bit codex address"
|
|
line.long 0x40 "CA=0x20,7-bit codex address"
|
|
line.long 0x44 "CA=0x22,7-bit codex address"
|
|
line.long 0x48 "CA=0x24,7-bit codex address"
|
|
line.long 0x4C "CA=0x26,7-bit codex address"
|
|
line.long 0x50 "CA=0x28,7-bit codex address"
|
|
line.long 0x54 "CA=0x2A,7-bit codex address"
|
|
line.long 0x58 "CA=0x2C,7-bit codex address"
|
|
line.long 0x5C "CA=0x2E,7-bit codex address"
|
|
line.long 0x60 "CA=0x30,7-bit codex address"
|
|
line.long 0x64 "CA=0x32,7-bit codex address"
|
|
line.long 0x68 "CA=0x34,7-bit codex address"
|
|
line.long 0x6C "CA=0x36,7-bit codex address"
|
|
line.long 0x70 "CA=0x38,7-bit codex address"
|
|
line.long 0x74 "CA=0x3A,7-bit codex address"
|
|
line.long 0x78 "CA=0x3C,7-bit codex address"
|
|
line.long 0x7C "CA=0x3E,7-bit codex address"
|
|
line.long 0x80 "CA=0x40,7-bit codex address"
|
|
line.long 0x84 "CA=0x42,7-bit codex address"
|
|
line.long 0x88 "CA=0x44,7-bit codex address"
|
|
line.long 0x8C "CA=0x46,7-bit codex address"
|
|
line.long 0x90 "CA=0x48,7-bit codex address"
|
|
line.long 0x94 "CA=0x4A,7-bit codex address"
|
|
line.long 0x98 "CA=0x4C,7-bit codex address"
|
|
line.long 0x9C "CA=0x4E,7-bit codex address"
|
|
line.long 0xA0 "CA=0x50,7-bit codex address"
|
|
line.long 0xA4 "CA=0x52,7-bit codex address"
|
|
line.long 0xA8 "CA=0x54,7-bit codex address"
|
|
line.long 0xAC "CA=0x56,7-bit codex address"
|
|
line.long 0xB0 "CA=0x58,7-bit codex address"
|
|
line.long 0xB4 "CA=0x5A,7-bit codex address"
|
|
line.long 0xB8 "CA=0x5C,7-bit codex address"
|
|
line.long 0xBC "CA=0x5E,7-bit codex address"
|
|
line.long 0xC0 "CA=0x60,7-bit codex address"
|
|
line.long 0xC4 "CA=0x62,7-bit codex address"
|
|
line.long 0xC8 "CA=0x64,7-bit codex address"
|
|
line.long 0xCC "CA=0x66,7-bit codex address"
|
|
line.long 0xD0 "CA=0x68,7-bit codex address"
|
|
line.long 0xD4 "CA=0x6A,7-bit codex address"
|
|
line.long 0xD8 "CA=0x6C,7-bit codex address"
|
|
line.long 0xDC "CA=0x6E,7-bit codex address"
|
|
line.long 0xE0 "CA=0x70,7-bit codex address"
|
|
line.long 0xE4 "CA=0x72,7-bit codex address"
|
|
line.long 0xE8 "CA=0x74,7-bit codex address"
|
|
line.long 0xEC "CA=0x76,7-bit codex address"
|
|
line.long 0xF0 "CA=0x78,7-bit codex address"
|
|
line.long 0xF4 "CA=0x7A,7-bit codex address"
|
|
line.long 0xF8 "CA=0x7C,7-bit codex address"
|
|
line.long 0xFC "CA=0x7E,7-bit codex address"
|
|
group 0x500++0xff "Secondary Modem Codec registers"
|
|
line.long 0x00 "CA=0x00,7-bit codex address"
|
|
line.long 0x04 "CA=0x02,7-bit codex address"
|
|
line.long 0x08 "CA=0x04,7-bit codex address"
|
|
line.long 0x0C "CA=0x06,7-bit codex address"
|
|
line.long 0x10 "CA=0x08,7-bit codex address"
|
|
line.long 0x14 "CA=0x0A,7-bit codex address"
|
|
line.long 0x18 "CA=0x0C,7-bit codex address"
|
|
line.long 0x1C "CA=0x0E,7-bit codex address"
|
|
line.long 0x20 "CA=0x10,7-bit codex address"
|
|
line.long 0x24 "CA=0x12,7-bit codex address"
|
|
line.long 0x28 "CA=0x14,7-bit codex address"
|
|
line.long 0x2C "CA=0x16,7-bit codex address"
|
|
line.long 0x30 "CA=0x18,7-bit codex address"
|
|
line.long 0x34 "CA=0x1A,7-bit codex address"
|
|
line.long 0x38 "CA=0x1C,7-bit codex address"
|
|
line.long 0x3C "CA=0x1E,7-bit codex address"
|
|
line.long 0x40 "CA=0x20,7-bit codex address"
|
|
line.long 0x44 "CA=0x22,7-bit codex address"
|
|
line.long 0x48 "CA=0x24,7-bit codex address"
|
|
line.long 0x4C "CA=0x26,7-bit codex address"
|
|
line.long 0x50 "CA=0x28,7-bit codex address"
|
|
line.long 0x54 "CA=0x2A,7-bit codex address"
|
|
line.long 0x58 "CA=0x2C,7-bit codex address"
|
|
line.long 0x5C "CA=0x2E,7-bit codex address"
|
|
line.long 0x60 "CA=0x30,7-bit codex address"
|
|
line.long 0x64 "CA=0x32,7-bit codex address"
|
|
line.long 0x68 "CA=0x34,7-bit codex address"
|
|
line.long 0x6C "CA=0x36,7-bit codex address"
|
|
line.long 0x70 "CA=0x38,7-bit codex address"
|
|
line.long 0x74 "CA=0x3A,7-bit codex address"
|
|
line.long 0x78 "CA=0x3C,7-bit codex address"
|
|
line.long 0x7C "CA=0x3E,7-bit codex address"
|
|
line.long 0x80 "CA=0x40,7-bit codex address"
|
|
line.long 0x84 "CA=0x42,7-bit codex address"
|
|
line.long 0x88 "CA=0x44,7-bit codex address"
|
|
line.long 0x8C "CA=0x46,7-bit codex address"
|
|
line.long 0x90 "CA=0x48,7-bit codex address"
|
|
line.long 0x94 "CA=0x4A,7-bit codex address"
|
|
line.long 0x98 "CA=0x4C,7-bit codex address"
|
|
line.long 0x9C "CA=0x4E,7-bit codex address"
|
|
line.long 0xA0 "CA=0x50,7-bit codex address"
|
|
line.long 0xA4 "CA=0x52,7-bit codex address"
|
|
line.long 0xA8 "CA=0x54,7-bit codex address"
|
|
line.long 0xAC "CA=0x56,7-bit codex address"
|
|
line.long 0xB0 "CA=0x58,7-bit codex address"
|
|
line.long 0xB4 "CA=0x5A,7-bit codex address"
|
|
line.long 0xB8 "CA=0x5C,7-bit codex address"
|
|
line.long 0xBC "CA=0x5E,7-bit codex address"
|
|
line.long 0xC0 "CA=0x60,7-bit codex address"
|
|
line.long 0xC4 "CA=0x62,7-bit codex address"
|
|
line.long 0xC8 "CA=0x64,7-bit codex address"
|
|
line.long 0xCC "CA=0x66,7-bit codex address"
|
|
line.long 0xD0 "CA=0x68,7-bit codex address"
|
|
line.long 0xD4 "CA=0x6A,7-bit codex address"
|
|
line.long 0xD8 "CA=0x6C,7-bit codex address"
|
|
line.long 0xDC "CA=0x6E,7-bit codex address"
|
|
line.long 0xE0 "CA=0x70,7-bit codex address"
|
|
line.long 0xE4 "CA=0x72,7-bit codex address"
|
|
line.long 0xE8 "CA=0x74,7-bit codex address"
|
|
line.long 0xEC "CA=0x76,7-bit codex address"
|
|
line.long 0xF0 "CA=0x78,7-bit codex address"
|
|
line.long 0xF4 "CA=0x7A,7-bit codex address"
|
|
line.long 0xF8 "CA=0x7C,7-bit codex address"
|
|
line.long 0xFC "CA=0x7E,7-bit codex address"
|
|
width 10.
|
|
tree.end
|
|
tree "Inter-IC Sound (I2S) Controller"
|
|
width 7.
|
|
base ASD:0x40400000
|
|
group 0x00++0x03
|
|
line.long 0x00 "SACR0,Serial Audio Global Control Register"
|
|
bitfld.long 0x00 12.--15. " RFTH ,Receive FIFO Interrupt or DMA Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 08.--11. " TFTH ,Transmit FIFO Interrupt or DMA Trigger Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 05. " STRF ,Select Transmit or Receive FIFO for EFWR-Based Special-purpose" "trans,rec"
|
|
textline " "
|
|
bitfld.long 0x00 04. " EFWR ,Special-Purpose FIFO Write/Read Function" "dis,ena"
|
|
bitfld.long 0x00 03. " RST ,FIFO Reset" "no,rst"
|
|
bitfld.long 0x00 02. " BCKD ,Input/Output Direction of I2S_BITCLK" "in,out"
|
|
textline " "
|
|
bitfld.long 0x00 00. " ENB ,Enable I2S Function" "dis,ena"
|
|
group 0x04++0x03
|
|
line.long 0x00 "SACR1,Serial Audio I2S/MSB-Justified Control Register"
|
|
bitfld.long 0x00 05. " ENLBF ,Enable I2S/MSB Interface Loopback Function" "dis,ena"
|
|
bitfld.long 0x00 04. " DRPL ,Disable Replaying Function of I2S or MSB-Justified Interface" "ena,dis"
|
|
bitfld.long 0x00 03. " DREC ,Disable Recording Function of I2S or MSB-Justified Interface" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 00. " AMSL ,Specify Alternate Mode (I2S or MSB-Justified) Operation" "nrml,MSB-just"
|
|
rgroup 0x0C++0x03
|
|
line.long 0x00 "SASR0,Serial Audio I2S/MSB-Justified Interface and FIFO Status Register"
|
|
bitfld.long 0x00 12.--15. " RFL ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 08.--11. " TFL ,Transmit FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 07. " I2SOFF ,I2S Controller Off" " no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 06. " ROR ,Receive FIFO Overrun" "no,yes"
|
|
bitfld.long 0x00 05. " TUR ,Transmit FIFO Underrun" "no,yes"
|
|
bitfld.long 0x00 04. " RFS ,Receive FIFO Service Request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TFS ,Transmit FIFO Service Request" "no,yes"
|
|
bitfld.long 0x00 02. " BSY ,I2S Busy" "no,yes"
|
|
bitfld.long 0x00 01. " RNE ,Receive FIFO Not Empty" "empty,noEmpt"
|
|
textline " "
|
|
bitfld.long 0x00 00. " TNF ,Transmit FIFO Not Full" "full,noFull"
|
|
group 0x14++0x03
|
|
line.long 0x00 "SAIMR,Serial Audio Interrupt Mask Register"
|
|
bitfld.long 0x00 06. " ROR ,Enable Receive FIFO Overrun Condition Interrupt" "dis,ena"
|
|
bitfld.long 0x00 05. " TUR ,Enable FIFO Underrun Condition Interrupt" "dis,ena"
|
|
bitfld.long 0x00 04. " RFS ,Enable Receive FIFO Service Request Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 03. " TFS ,Enable Transmit FIFO Service Request Interrupt" "dis,ena"
|
|
wgroup 0x18++0x03
|
|
line.long 0x00 "SAICR,Serial Audio Interrupt Clear Register"
|
|
bitfld.long 0x00 06. " ROR ,Clear receive FIFO overrun interrupt and ROR status bit in SASR0 by setting this bit" "no,yes"
|
|
bitfld.long 0x00 05. " TUR ,Clear transmit FIFO underrun interrupt and TUR status bit in SASR0 by setting this bit" "no,yes"
|
|
group 0x60++0x03
|
|
line.long 0x00 "SADIV,Audio Clock Divider Register"
|
|
hexmask.long.byte 0x00 00.--06. 1. " SADIV ,Audio Clock Divider"
|
|
group 0x80++0x03
|
|
line.long 0x00 "SADR,Serial Audio Data Register (TX and RX FIFO access register)"
|
|
hexmask.long.word 0x00 16.--31. 1. " DTH ,Right Data Sample"
|
|
hexmask.long.word 0x00 00.--15. 1. " DTL ,Left Data Sample"
|
|
width 10.
|
|
tree.end
|
|
tree "MultiMediaCard/SD/SDIO Controller"
|
|
width 14.
|
|
base ASD:0x41100000
|
|
group 0x00++0x03
|
|
line.long 0x00 "MMC_STRPCL,MMC Clock Start/Stop Register"
|
|
bitfld.long 0x00 01. " STRT_CLK ,Start the MMCLK" "no,yes"
|
|
bitfld.long 0x00 00. " STOP_CLK ,Stop the MMCLK" "no,yes"
|
|
rgroup 0x04++0x03
|
|
line.long 0x00 "MMC_STAT,MMC Status Register"
|
|
bitfld.long 0x00 16. " SSA ,SDIO_SUSPEND_ACK" "no,yes"
|
|
bitfld.long 0x00 15. " SDIO_INT ,SDIO interrupt occurred" "no,yes"
|
|
bitfld.long 0x00 14. " RD_STALLED ,Read data transfer has been stalled in response to RD_WAIT" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 13. " END_CMD_RES ,Command and response sequence has completed" "no,yes"
|
|
bitfld.long 0x00 12. " PRG_DONE ,Card has finished programming and is not busy" "no,yes"
|
|
bitfld.long 0x00 11. " DTD ,DATA_TRAN_DONE-Data transmission to card has completed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI_WR_ERR ,Write data rejected by card due to a write error" "no,yes"
|
|
bitfld.long 0x00 09. " FLASH_ERR ,Flash programming error occurred" "no,yes"
|
|
bitfld.long 0x00 08. " CLK_EN ,MMC/SD/SDIO Clock, MMCLK, is on" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 05. " RES_CRC_ERR ,CRC error occurred on the response" "no,yes"
|
|
bitfld.long 0x00 04. " DAT_ERR_TOKEN ,SPI data error token has been received" "no,yes"
|
|
bitfld.long 0x00 03. " CRC_RD_ERR ,CRC error occurred on received data" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 02. " CRC_WR_ERR ,Write data rejected by card due to a CRC error" "no,yes"
|
|
bitfld.long 0x00 01. " TIME_OUT_RES ,Card response timed out" "no,yes"
|
|
bitfld.long 0x00 00. " TIME_OUT_READ ,Card read data timed out" "no,yes"
|
|
group 0x08++0x03
|
|
line.long 0x00 "MMC_CLKRT,MMC Clock Rate Register"
|
|
bitfld.long 0x00 00.--02. " CLK_RATE ,Clock Frequency" "19.5 MHz,9.75 MHz,4.88 MHz,2.44 MHz,1.22 MHz,609 kHz,304 kHz,reserved"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "MMC_SPI, MMC SPI Mode Register"
|
|
bitfld.long 0x00 03. " SCA ,SPI_CS_ADDRESS-Relative Address of the Card to Activate SPI CS" "MMCCS0,MMCCS1"
|
|
bitfld.long 0x00 02. " SPI_CS_EN ,SPI Chip Select Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " SPI_CRC_EN ,CRC Generation Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " SPI_MODE ,SPI Mode Enable" "dis,ena"
|
|
group 0x10++0x03
|
|
line.long 0x00 "MMC_CMDAT,MMC Command/Data Register"
|
|
bitfld.long 0x00 13. " SDIO_RESUME ,SDIO CMD52-resume a suspended data transfer" "no,yes"
|
|
bitfld.long 0x00 12. " SDIO_SUSPEND ,SDIO CMD52-suspend current data transfer" "no,yes"
|
|
bitfld.long 0x00 11. " SDIO_INT_EN ,Enables controller to check for an SDIO interrupt from the card" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STOP_TRAN ,Stop data transmission" "no,yes"
|
|
bitfld.long 0x00 08. " SD_4DAT ,Enable 1 bit data transfers" "dis,ena"
|
|
bitfld.long 0x00 07. " DMA_EN ,DMA access to FIFOs" "prgIO,DMA"
|
|
textline " "
|
|
bitfld.long 0x00 06. " INIT ,Precede command sequence with 80 clocks, for initialization" "no,yes"
|
|
bitfld.long 0x00 05. " BUSY ,Specifies whether a busy signal is possible after the current command sequence" "no,yes"
|
|
bitfld.long 0x00 04. " STRM_BLK ,Data transfer of the current command sequence is in stream mode" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " WR_RD ,Data transfer of the current command sequence is a write operation" "no,yes"
|
|
bitfld.long 0x00 02. " DATA_EN ,Current command includes a data transfer" "no,yes"
|
|
bitfld.long 0x00 00.--01. " RES_TYPE ,These bits specify the response format for the current command" "00,01,10,11"
|
|
group 0x14++0x03
|
|
line.long 0x00 "MMC_RESTO,MMC Response Time-Out Register"
|
|
hexmask.long.byte 0x00 00.--06. 1. " RES_TO ,Number of MMCLKs before a Response Time-Out"
|
|
group 0x18++0x03
|
|
line.long 0x00 "MMC_RDTO,MMC Read Time-Out Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " READ_TO ,Length of Time before a Data Read Time-Out"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "MMC_BLKLEN,MMC Block Length Register"
|
|
hexmask.long.word 0x00 00.--11. 1. " BLK_LEN ,Number of Bytes in a Block of Data"
|
|
group 0x20++0x03
|
|
line.long 0x00 "MMC_NUMBLK,MMC Number of Blocks Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " NUM_BLK ,Number of Blocks for a Multiple Block Data Transfer"
|
|
group 0x24++0x03
|
|
line.long 0x00 "MMC_PRTBUF,MMC Buffer Partly Full Register"
|
|
bitfld.long 0x00 00. " PRT_BUF ,Buffer Partially Full" "no,yes"
|
|
group 0x28++0x03
|
|
line.long 0x00 "MMC_I_MASK,MMC Interrupt Mask Register"
|
|
bitfld.long 0x00 12. " SSA ,SDIO_SUSPEND_ACK" "ena,msk"
|
|
bitfld.long 0x00 11. " SI ,SDIO_INT" "ena,msk"
|
|
bitfld.long 0x00 10. " RS ,RD_STALLED" "ena,msk"
|
|
textline " "
|
|
bitfld.long 0x00 09. " RE ,RES_ERR" "ena,msk"
|
|
bitfld.long 0x00 08. " DE ,DAT_ERR" "ena,msk"
|
|
bitfld.long 0x00 07. " TINT ," "ena,msk"
|
|
textline " "
|
|
bitfld.long 0x00 06. " TWR ,TXFIFO_WR_REQ" "ena,msk"
|
|
bitfld.long 0x00 05. " RRR ,RXFIFO_RD_REQ" "ena,msk"
|
|
bitfld.long 0x00 04. " CIO ,CLK_IS_OFF" "ena,msk"
|
|
textline " "
|
|
bitfld.long 0x00 03. " SC ,STOP_CMD" "ena,msk"
|
|
bitfld.long 0x00 02. " ECR ,END_CMD_RES" "ena,msk"
|
|
bitfld.long 0x00 01. " PD ,PRG_DONE" "ena,msk"
|
|
textline " "
|
|
bitfld.long 0x00 00. " DTD ,DATA_TRAN_DONE" "ena,msk"
|
|
rgroup 0x2C++0x03
|
|
line.long 0x00 "MMC_I_REG,MMC Interrupt Request Register"
|
|
bitfld.long 0x00 12. " SSA ,SDIO_SUSPEND_ACK" "no,yes"
|
|
bitfld.long 0x00 11. " SI ,SDIO_INT" "no,yes"
|
|
bitfld.long 0x00 10. " RS ,RD_STALLED" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 09. " RE ,RES_ERR" "no,yes"
|
|
bitfld.long 0x00 08. " DE ,DAT_ERR" "no,yes"
|
|
bitfld.long 0x00 07. " TINT ,TINT" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 06. " TWR ,TXFIFO_WR_REQ" "no,yes"
|
|
bitfld.long 0x00 05. " RRR ,RXFIFO_RD_REQ" "no,yes"
|
|
bitfld.long 0x00 04. " CIO ,CLK_IS_OFF" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " SC ,STOP_CMD" "no,yes"
|
|
bitfld.long 0x00 02. " ECR ,END_CMD_RES" "no,yes"
|
|
bitfld.long 0x00 01. " PD ,PRG_DONE" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 00. " DTD ,DATA_TRAN_DONE" "no,yes"
|
|
group 0x30++0x03
|
|
line.long 0x00 "MMC_CMD,MMC Command Register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CMD_INDX ,Command Index"
|
|
group 0x34++0x03
|
|
line.long 0x00 "MMC_ARGH,MMC Argument High Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " ARG_H ,Upper 16 Bits of Command Argument"
|
|
group 0x38++0x03
|
|
line.long 0x00 "MMC_ARGL,MMC Argument Low Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " ARG_L ,Lower 16 Bits of Command Argument"
|
|
rgroup 0x3C++0x03
|
|
line.long 0x00 "MMC_RES,MMC Response FIFO Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " Data ,Two Bytes of Response Data"
|
|
rgroup 0x40++0x03
|
|
line.long 0x00 "MMC_RXFIFO,MMC Receive FIFO Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " Data ,1/2/3/4 Bytes of Received Data"
|
|
wgroup 0x44++0x03
|
|
line.long 0x00 "MMC_TXFIFO,MMC Transmit FIFO Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data ,1/2/3/4Bytes of Transmitted Data"
|
|
group 0x48++0x03
|
|
line.long 0x00 "MMC_RDWAIT,MMC RD_WAIT Register"
|
|
bitfld.long 0x00 01. " RD_WAIT_START ,Restart the read data transfer" "no,yes"
|
|
bitfld.long 0x00 00. " RD_WAIT_EN ,RD_WAIT is enabled(SDIO mode only)" "dis,ena"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "MMC_BLKS_REM,MMC Blocks Remaining Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BLKS_REM ,Number of Data Blocks Not Transferred"
|
|
tree.end
|
|
tree "Mobile Scalable Link (MSL) Interface"
|
|
width 9.
|
|
base ASD:0x41400000
|
|
group 0x004++0x1b "MSL Channel Receive/Transmit FIFO Registers"
|
|
line.long 0x00 "BBFIFO1,MSL Channel 1 Receive/Transmit FIFO Register"
|
|
line.long 0x04 "BBFIFO2,MSL Channel 2 Receive/Transmit FIFO Register"
|
|
line.long 0x08 "BBFIFO3,MSL Channel 3 Receive/Transmit FIFO Register"
|
|
line.long 0x0c "BBFIFO4,MSL Channel 4 Receive/Transmit FIFO Register"
|
|
line.long 0x10 "BBFIFO5,MSL Channel 5 Receive/Transmit FIFO Register"
|
|
line.long 0x14 "BBFIFO6,MSL Channel 6 Receive/Transmit FIFO Register"
|
|
line.long 0x18 "BBFIFO7,MSL Channel 7 Receive/Transmit FIFO Register"
|
|
group 0x044++0x1b "MSL Channel Configuration Registers"
|
|
line.long 0x00 "BBCFG1,MSL Channel 1 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " EOCservice ,Early EOC Service Select" "none,int,res,res"
|
|
bitfld.long 0x00 21.--23. " RxService ,Receive FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x00 19.--20. " RxTL ,RxThresh Level-Receive FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RxWE ,RxWAIT enable-Direct Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x00 16. " RxEnable ,Receive FIFO Channel Enable" "dis,ena"
|
|
bitfld.long 0x00 08.--10. " TxBlock ,Transmit Block Size" "4byte,8byte,16byte,32byte,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x00 05.--07. " TxService ,Transmit FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x00 03.--04. " TXTL ,TxThresh Level-Transmit FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
bitfld.long 0x00 02. " TxWAITenable ,Direct Flow Control Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " TxEnable ,Transmit FIFO Channel Enable" "dis,ena"
|
|
line.long 0x04 "BBCFG2,MSL Channel 2 Configuration Register"
|
|
bitfld.long 0x04 24.--25. " EOCservice ,Early EOC Service Select" "none,int,res,res"
|
|
bitfld.long 0x04 21.--23. " RxService ,Receive FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x04 19.--20. " RxTL ,RxThresh Level-Receive FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
textline " "
|
|
bitfld.long 0x04 18. " RxWE ,RxWAIT enable-Direct Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x04 16. " RxEnable ,Receive FIFO Channel Enable" "dis,ena"
|
|
bitfld.long 0x04 08.--10. " TxBlock ,Transmit Block Size" "4byte,8byte,16byte,32byte,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x04 05.--07. " TxService ,Transmit FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x04 03.--04. " TXTL ,TxThresh Level-Transmit FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
bitfld.long 0x04 02. " TxWAITenable ,Direct Flow Control Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 00. " TxEnable ,Transmit FIFO Channel Enable" "dis,ena"
|
|
line.long 0x08 "BBCFG3,MSL Channel 3 Configuration Register"
|
|
bitfld.long 0x08 24.--25. " EOCservice ,Early EOC Service Select" "none,int,res,res"
|
|
bitfld.long 0x08 21.--23. " RxService ,Receive FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x08 19.--20. " RxTL ,RxThresh Level-Receive FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
textline " "
|
|
bitfld.long 0x08 18. " RxWE ,RxWAIT enable-Direct Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x08 16. " RxEnable ,Receive FIFO Channel Enable" "dis,ena"
|
|
bitfld.long 0x08 08.--10. " TxBlock ,Transmit Block Size" "4byte,8byte,16byte,32byte,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x08 05.--07. " TxService ,Transmit FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x08 03.--04. " TXTL ,TxThresh Level-Transmit FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
bitfld.long 0x08 02. " TxWAITenable ,Direct Flow Control Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 00. " TxEnable ,Transmit FIFO Channel Enable" "dis,ena"
|
|
line.long 0x0c "BBCFG4,MSL Channel 4 Configuration Register"
|
|
bitfld.long 0x0c 24.--25. " EOCservice ,Early EOC Service Select" "none,int,res,res"
|
|
bitfld.long 0x0c 21.--23. " RxService ,Receive FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x0c 19.--20. " RxTL ,RxThresh Level-Receive FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
textline " "
|
|
bitfld.long 0x0c 18. " RxWE ,RxWAIT enable-Direct Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x0c 16. " RxEnable ,Receive FIFO Channel Enable" "dis,ena"
|
|
bitfld.long 0x0c 08.--10. " TxBlock ,Transmit Block Size" "4byte,8byte,16byte,32byte,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x0c 05.--07. " TxService ,Transmit FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x0c 03.--04. " TXTL ,TxThresh Level-Transmit FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
bitfld.long 0x0c 02. " TxWAITenable ,Direct Flow Control Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x0c 00. " TxEnable ,Transmit FIFO Channel Enable" "dis,ena"
|
|
line.long 0x10 "BBCFG5,MSL Channel 5 Configuration Register"
|
|
bitfld.long 0x10 24.--25. " EOCservice ,Early EOC Service Select" "none,int,res,res"
|
|
bitfld.long 0x10 21.--23. " RxService ,Receive FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x10 19.--20. " RxTL ,RxThresh Level-Receive FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
textline " "
|
|
bitfld.long 0x10 18. " RxWE ,RxWAIT enable-Direct Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x10 16. " RxEnable ,Receive FIFO Channel Enable" "dis,ena"
|
|
bitfld.long 0x10 08.--10. " TxBlock ,Transmit Block Size" "4byte,8byte,16byte,32byte,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x10 05.--07. " TxService ,Transmit FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x10 03.--04. " TXTL ,TxThresh Level-Transmit FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
bitfld.long 0x10 02. " TxWAITenable ,Direct Flow Control Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x10 00. " TxEnable ,Transmit FIFO Channel Enable" "dis,ena"
|
|
line.long 0x14 "BBCFG6,MSL Channel 6 Configuration Register"
|
|
bitfld.long 0x14 24.--25. " EOCservice ,Early EOC Service Select" "none,int,res,res"
|
|
bitfld.long 0x14 21.--23. " RxService ,Receive FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x14 19.--20. " RxTL ,RxThresh Level-Receive FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
textline " "
|
|
bitfld.long 0x14 18. " RxWE ,RxWAIT enable-Direct Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x14 16. " RxEnable ,Receive FIFO Channel Enable" "dis,ena"
|
|
bitfld.long 0x14 08.--10. " TxBlock ,Transmit Block Size" "4byte,8byte,16byte,32byte,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x14 05.--07. " TxService ,Transmit FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x14 03.--04. " TXTL ,TxThresh Level-Transmit FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
bitfld.long 0x14 02. " TxWAITenable ,Direct Flow Control Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x14 00. " TxEnable ,Transmit FIFO Channel Enable" "dis,ena"
|
|
line.long 0x18 "BBCFG7,MSL Channel 7 Configuration Register"
|
|
bitfld.long 0x18 24.--25. " EOCservice ,Early EOC Service Select" "none,int,res,res"
|
|
bitfld.long 0x18 21.--23. " RxService ,Receive FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x18 19.--20. " RxTL ,RxThresh Level-Receive FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
textline " "
|
|
bitfld.long 0x18 18. " RxWE ,RxWAIT enable-Direct Flow Control Enable" "dis,ena"
|
|
bitfld.long 0x18 16. " RxEnable ,Receive FIFO Channel Enable" "dis,ena"
|
|
bitfld.long 0x18 08.--10. " TxBlock ,Transmit Block Size" "4byte,8byte,16byte,32byte,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x18 05.--07. " TxService ,Transmit FIFO Service Select" "none,DMA,int,res,res,res,res,res"
|
|
bitfld.long 0x18 03.--04. " TXTL ,TxThresh Level-Transmit FIFO Service Trigger Threshold" "4byte,8byte,16byte,32byte"
|
|
bitfld.long 0x18 02. " TxWAITenable ,Direct Flow Control Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x18 00. " TxEnable ,Transmit FIFO Channel Enable" "dis,ena"
|
|
rgroup 0x084++0x1b "MSL Channel Status Registers"
|
|
line.long 0x00 "BBSTAT1,MSL Channel 1 Status Register"
|
|
bitfld.long 0x00 31. " RxEOM_3 ,Fourth Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x00 30. " RxEOM_2 ,Third Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x00 29. " RxEOM_1 ,Second Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 28. " RxEOM_0 ,Next Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x00 25. " RxEOM_FIFO ,Receive FIFO Contains an EOM" "no,yes"
|
|
bitfld.long 0x00 24. " RxWait ,Receive Channel in Wait State" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RxEmpty ,Receive FIFO Empty" "no,yes"
|
|
bitfld.long 0x00 22. " RxFull ,Receive FIFO Full" "no,yes"
|
|
hexmask.long.byte 0x00 16.--21. 1. " RxFullness ,Fullness of Receive FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 08. " TxWait ,Transmit Channel in Wait State" "no,yes"
|
|
bitfld.long 0x00 07. " TxEmpty ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x00 06. " TxFull ,Transmit FIFO Full" "no,yes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--05. 1. " TxFullness ,Fullness of Transmit FIFO"
|
|
line.long 0x04 "BBSTAT2,MSL Channel 2 Status Register"
|
|
bitfld.long 0x04 31. " RxEOM_3 ,Fourth Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x04 30. " RxEOM_2 ,Third Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x04 29. " RxEOM_1 ,Second Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RxEOM_0 ,Next Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x04 25. " RxEOM_FIFO ,Receive FIFO Contains an EOM" "no,yes"
|
|
bitfld.long 0x04 24. " RxWait ,Receive Channel in Wait State" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x04 23. " RxEmpty ,Receive FIFO Empty" "no,yes"
|
|
bitfld.long 0x04 22. " RxFull ,Receive FIFO Full" "no,yes"
|
|
hexmask.long.byte 0x04 16.--21. 1. " RxFullness ,Fullness of Receive FIFO"
|
|
textline " "
|
|
bitfld.long 0x04 08. " TxWait ,Transmit Channel in Wait State" "no,yes"
|
|
bitfld.long 0x04 07. " TxEmpty ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x04 06. " TxFull ,Transmit FIFO Full" "no,yes"
|
|
textline " "
|
|
hexmask.long.byte 0x04 00.--05. 1. " TxFullness ,Fullness of Transmit FIFO"
|
|
line.long 0x08 "BBSTAT3,MSL Channel 3 Status Register"
|
|
bitfld.long 0x08 31. " RxEOM_3 ,Fourth Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x08 30. " RxEOM_2 ,Third Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x08 29. " RxEOM_1 ,Second Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x08 28. " RxEOM_0 ,Next Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x08 25. " RxEOM_FIFO ,Receive FIFO Contains an EOM" "no,yes"
|
|
bitfld.long 0x08 24. " RxWait ,Receive Channel in Wait State" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x08 23. " RxEmpty ,Receive FIFO Empty" "no,yes"
|
|
bitfld.long 0x08 22. " RxFull ,Receive FIFO Full" "no,yes"
|
|
hexmask.long.byte 0x08 16.--21. 1. " RxFullness ,Fullness of Receive FIFO"
|
|
textline " "
|
|
bitfld.long 0x08 08. " TxWait ,Transmit Channel in Wait State" "no,yes"
|
|
bitfld.long 0x08 07. " TxEmpty ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x08 06. " TxFull ,Transmit FIFO Full" "no,yes"
|
|
textline " "
|
|
hexmask.long.byte 0x08 00.--05. 1. " TxFullness ,Fullness of Transmit FIFO"
|
|
line.long 0x0c "BBSTAT4,MSL Channel 4 Status Register"
|
|
bitfld.long 0x0c 31. " RxEOM_3 ,Fourth Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x0c 30. " RxEOM_2 ,Third Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x0c 29. " RxEOM_1 ,Second Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " RxEOM_0 ,Next Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x0c 25. " RxEOM_FIFO ,Receive FIFO Contains an EOM" "no,yes"
|
|
bitfld.long 0x0c 24. " RxWait ,Receive Channel in Wait State" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x0c 23. " RxEmpty ,Receive FIFO Empty" "no,yes"
|
|
bitfld.long 0x0c 22. " RxFull ,Receive FIFO Full" "no,yes"
|
|
hexmask.long.byte 0x0c 16.--21. 1. " RxFullness ,Fullness of Receive FIFO"
|
|
textline " "
|
|
bitfld.long 0x0c 08. " TxWait ,Transmit Channel in Wait State" "no,yes"
|
|
bitfld.long 0x0c 07. " TxEmpty ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x0c 06. " TxFull ,Transmit FIFO Full" "no,yes"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 00.--05. 1. " TxFullness ,Fullness of Transmit FIFO"
|
|
line.long 0x10 "BBSTAT5,MSL Channel 5 Status Register"
|
|
bitfld.long 0x10 31. " RxEOM_3 ,Fourth Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x10 30. " RxEOM_2 ,Third Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x10 29. " RxEOM_1 ,Second Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x10 28. " RxEOM_0 ,Next Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x10 25. " RxEOM_FIFO ,Receive FIFO Contains an EOM" "no,yes"
|
|
bitfld.long 0x10 24. " RxWait ,Receive Channel in Wait State" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x10 23. " RxEmpty ,Receive FIFO Empty" "no,yes"
|
|
bitfld.long 0x10 22. " RxFull ,Receive FIFO Full" "no,yes"
|
|
hexmask.long.byte 0x10 16.--21. 1. " RxFullness ,Fullness of Receive FIFO"
|
|
textline " "
|
|
bitfld.long 0x10 08. " TxWait ,Transmit Channel in Wait State" "no,yes"
|
|
bitfld.long 0x10 07. " TxEmpty ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x10 06. " TxFull ,Transmit FIFO Full" "no,yes"
|
|
textline " "
|
|
hexmask.long.byte 0x10 00.--05. 1. " TxFullness ,Fullness of Transmit FIFO"
|
|
line.long 0x14 "BBSTAT6,MSL Channel 6 Status Register"
|
|
bitfld.long 0x14 31. " RxEOM_3 ,Fourth Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x14 30. " RxEOM_2 ,Third Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x14 29. " RxEOM_1 ,Second Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x14 28. " RxEOM_0 ,Next Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x14 25. " RxEOM_FIFO ,Receive FIFO Contains an EOM" "no,yes"
|
|
bitfld.long 0x14 24. " RxWait ,Receive Channel in Wait State" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x14 23. " RxEmpty ,Receive FIFO Empty" "no,yes"
|
|
bitfld.long 0x14 22. " RxFull ,Receive FIFO Full" "no,yes"
|
|
hexmask.long.byte 0x14 16.--21. 1. " RxFullness ,Fullness of Receive FIFO"
|
|
textline " "
|
|
bitfld.long 0x14 08. " TxWait ,Transmit Channel in Wait State" "no,yes"
|
|
bitfld.long 0x14 07. " TxEmpty ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x14 06. " TxFull ,Transmit FIFO Full" "no,yes"
|
|
textline " "
|
|
hexmask.long.byte 0x14 00.--05. 1. " TxFullness ,Fullness of Transmit FIFO"
|
|
line.long 0x18 "BBSTAT7,MSL Channel 7 Status Register"
|
|
bitfld.long 0x18 31. " RxEOM_3 ,Fourth Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x18 30. " RxEOM_2 ,Third Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x18 29. " RxEOM_1 ,Second Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x18 28. " RxEOM_0 ,Next Byte to be Read from FIFO is Last Byte in a Message" "no,yes"
|
|
bitfld.long 0x18 25. " RxEOM_FIFO ,Receive FIFO Contains an EOM" "no,yes"
|
|
bitfld.long 0x18 24. " RxWait ,Receive Channel in Wait State" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x18 23. " RxEmpty ,Receive FIFO Empty" "no,yes"
|
|
bitfld.long 0x18 22. " RxFull ,Receive FIFO Full" "no,yes"
|
|
hexmask.long.byte 0x18 16.--21. 1. " RxFullness ,Fullness of Receive FIFO"
|
|
textline " "
|
|
bitfld.long 0x18 08. " TxWait ,Transmit Channel in Wait State" "no,yes"
|
|
bitfld.long 0x18 07. " TxEmpty ,Transmit FIFO Empty" "no,yes"
|
|
bitfld.long 0x18 06. " TxFull ,Transmit FIFO Full" "no,yes"
|
|
textline " "
|
|
hexmask.long.byte 0x18 00.--05. 1. " TxFullness ,Fullness of Transmit FIFO"
|
|
wgroup 0x0C4++0x1b "MSL Channel EOM Registers"
|
|
line.long 0x00 "BBEOM1,MSL Channel 1 EOM Register"
|
|
line.long 0x04 "BBEOM2,MSL Channel 2 EOM Register"
|
|
line.long 0x08 "BBEOM3,MSL Channel 3 EOM Register"
|
|
line.long 0x0c "BBEOM4,MSL Channel 4 EOM Register"
|
|
line.long 0x10 "BBEOM5,MSL Channel 5 EOM Register"
|
|
line.long 0x14 "BBEOM6,MSL Channel 6 EOM Register"
|
|
line.long 0x18 "BBEOM7,MSL Channel 7 EOM Register"
|
|
group 0x108++0x03
|
|
line.long 0x00 "BBIID,MSL Interrupt ID Register"
|
|
eventfld.long 0x00 23. " TX_INT7 ,Transmit FIFO Interrupt for Channel 7" "noInt,Int"
|
|
eventfld.long 0x00 22. " TX_INT6 ,Transmit FIFO Interrupt for Channel 6" "noInt,Int"
|
|
eventfld.long 0x00 21. " TX_INT5 ,Transmit FIFO Interrupt for Channel 5" "noInt,Int"
|
|
textline " "
|
|
eventfld.long 0x00 20. " TX_INT4 ,Transmit FIFO Interrupt for Channel 4" "noInt,Int"
|
|
eventfld.long 0x00 19. " TX_INT3 ,Transmit FIFO Interrupt for Channel 3" "noInt,Int"
|
|
eventfld.long 0x00 18. " TX_INT2 ,Transmit FIFO Interrupt for Channel 2" "noInt,Int"
|
|
textline " "
|
|
eventfld.long 0x00 17. " TX_INT1 ,Transmit FIFO Interrupt for Channel 1" "noInt,Int"
|
|
eventfld.long 0x00 15. " EOC_INT7 ,EOC Interrupt for Channel 7" "noInt,Int"
|
|
eventfld.long 0x00 14. " EOC_INT6 ,EOC Interrupt for Channel 6" "noInt,Int"
|
|
textline " "
|
|
eventfld.long 0x00 13. " EOC_INT5 ,EOC Interrupt for Channel 5" "noInt,Int"
|
|
eventfld.long 0x00 12. " EOC_INT4 ,EOC Interrupt for Channel 4" "noInt,Int"
|
|
eventfld.long 0x00 11. " EOC_INT3 ,EOC Interrupt for Channel 3" "noInt,Int"
|
|
textline " "
|
|
eventfld.long 0x00 10. " EOC_INT2 ,EOC Interrupt for Channel 2" "noInt,Int"
|
|
eventfld.long 0x00 9. " EOC_INT1 ,EOC Interrupt for Channel 1" "noInt,Int"
|
|
eventfld.long 0x00 7. " RX_INT7 ,Receive FIFO Interrupt for Channel 7" "noInt,Int"
|
|
textline " "
|
|
eventfld.long 0x00 6. " RX_INT6 ,Receive FIFO Interrupt for Channel 6" "noInt,Int"
|
|
eventfld.long 0x00 5. " RX_INT5 ,Receive FIFO Interrupt for Channel 5" "noInt,Int"
|
|
eventfld.long 0x00 4. " RX_INT4 ,Receive FIFO Interrupt for Channel 4" "noInt,Int"
|
|
textline " "
|
|
eventfld.long 0x00 3. " RX_INT3 ,Receive FIFO Interrupt for Channel 3" "noInt,Int"
|
|
eventfld.long 0x00 2. " RX_INT2 ,Receive FIFO Interrupt for Channel 2" "noInt,Int"
|
|
eventfld.long 0x00 1. " RX_INT1 ,Receive FIFO Interrupt for Channel 1" "noInt,Int"
|
|
group 0x110++0x03
|
|
line.long 0x00 "BBFREQ,MSL Transmit Frequency Select Register"
|
|
hexmask.long.byte 0x00 4.--11. 1. " DIV ,BB_INT_CLK Clock Divider"
|
|
group 0x114++0x03
|
|
line.long 0x00 "BBWAIT,MSL Wait Count Register"
|
|
hexmask.long.word 0x00 00.--09. 1. " Count ,Number of Transmit Clock Cycles Waited before Retrying a Waiting Channel"
|
|
group 0x118++0x03
|
|
line.long 0x00 "BBCST,MSL Clock Stop Time Register"
|
|
bitfld.long 0x00 00.--03. " Count ,Count" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
wgroup 0x140++0x03
|
|
line.long 0x00 "BBWAKE,MSL Wake-Up Register"
|
|
group 0x144++0x03
|
|
line.long 0x00 "BBITFC,MSL Interface Width Register"
|
|
bitfld.long 0x00 16.--17. " RX_ITFC ,Receive (Inbound) Link Interface Width" "1bit,2bit,4bit,res"
|
|
bitfld.long 0x00 00.--01. " TX_ITFC ,Transmit (Outbound) Link Interface Width" "1bit,2bit,4bit,res"
|
|
width 10.
|
|
tree.end
|
|
tree "Memory Stick Host Controller"
|
|
width 10.
|
|
base ASD:0x41800000
|
|
group 0x00++0x03
|
|
line.long 0x00 "MSCMR,MSHC Command Register"
|
|
bitfld.long 0x00 12.--15. " PID ,Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 00.--09. 1. " DATASIZE ,Data Size"
|
|
group 0x04++0x03
|
|
line.long 0x00 "MSCRSR, MSHC Control and Status register"
|
|
bitfld.long 0x00 15. " RST ,Reset" "no,yes"
|
|
bitfld.long 0x00 14. " PWS ,Power Save" "no,yes"
|
|
bitfld.long 0x00 13. " SIEN ,Serial I/F" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " NOCRC ,Controls CRC Generation and Checking" "no,yes"
|
|
hexmask.long.byte 0x00 05.--09. 1. " RXAVAIL ,Receive Available Data Count"
|
|
hexmask.long.byte 0x00 00.--04. 1. " TXAVAIL ,Transmit Available Data Count"
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "MSINT,MSHC Interrupt and Status Register"
|
|
bitfld.long 0x00 15. " INT ,Interrupt Present" "no,yes"
|
|
bitfld.long 0x00 14. " RXDAV ,Receive Data Available Interrupt" "no,yes"
|
|
bitfld.long 0x00 13. " TXDAV ,Transmit Space Available Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 03. " RDY ,RDY" "0,1"
|
|
bitfld.long 0x00 02. " SIF ,SIF" "0,1"
|
|
bitfld.long 0x00 01. " CRC ,CRC" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 00. " TOE ,TOE" "0,1"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "MSINTEN,MSHC Interrupt Enable Register"
|
|
bitfld.long 0x00 15. " INTEN ,Interrupts Enabled" "dis,ena"
|
|
bitfld.long 0x00 14. " RXDAVEN ,Receive Data Available Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " TXDAVEN ,Transmit Space Available Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 03. " RDYEN ,End of Packet Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " SIFEN ,Stick Interface Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " CRCEN ,CRC Error Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " TOEEN ,Time-Out Error Interrupt Enable" "dis,ena"
|
|
group 0x10++0x03
|
|
line.long 0x00 "MSCR2,MSHC Control Register 2"
|
|
bitfld.long 0x00 15. " ACD ,ACD" "0,1"
|
|
bitfld.long 0x00 13. " TXDMAEN ,Transmit FIFO DMA Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " RXDMAEN ,Receive FIFO DMA Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00.--02. " BSYCNT ,Busy Count" "0,1,2,3,4,5,6,7"
|
|
group 0x14++0x03
|
|
line.long 0x00 "MSACD,MSHC ACD Command Register"
|
|
bitfld.long 0x00 12.--15. " APID ,APID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 00.--09. 1. " ADATASIZE ,Data Size"
|
|
hgroup 0x18++0x03
|
|
hide.long 0x00 "MSRXFIFO,MSHC Receive FIFO Register"
|
|
in
|
|
group 0x1C++0x03
|
|
line.long 0x00 "MSTXFIFO,MSHC Transmit FIFO Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TX ,Data Data to be Transmitted to Memory Stick"
|
|
width 10.
|
|
tree.end
|
|
tree "Keypad Interface"
|
|
width 10.
|
|
base ASD:0x41500000
|
|
group 0x00++0x03
|
|
line.long 0x00 "KPC,Keypad Interface Control Register"
|
|
bitfld.long 0x00 30. " AS ,Automatic Scan" "-,scan"
|
|
bitfld.long 0x00 29. " ASACT ,Automatic Scan on Activity" "no,yes"
|
|
bitfld.long 0x00 26.--28. " MKRN ,Matrix Keypad Row Number" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 23.--25. " MKCN ,Matrix Keypad Column Number" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 22. " MI ,Matrix Keypad Interrupt" "0,1"
|
|
bitfld.long 0x00 21. " IMKP ,Ignore Multiple keypress (Matrix-Keypad Interface Only)" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MS7 ,Manual Matrix Scan Line 7" "-,asst"
|
|
bitfld.long 0x00 19. " MS6 ,Manual Matrix Scan Line 6" "-,asst"
|
|
bitfld.long 0x00 18. " MS5 ,Manual Matrix Scan Line 5" "-,asst"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MS4 ,Manual Matrix Scan Line 4" "-,asst"
|
|
bitfld.long 0x00 16. " MS3 ,Manual Matrix Scan Line 3" "-,asst"
|
|
bitfld.long 0x00 15. " MS2 ,Manual Matrix Scan Line 2" "-,asst"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MS1 ,Manual Matrix Scan Line 1" "-,asst"
|
|
bitfld.long 0x00 13. " MS0 ,Manual Matrix Scan Line 0" "-,asst"
|
|
bitfld.long 0x00 12. " ME ,Matrix Keypad Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MIE ,Matrix Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 09. " DK_DEB_SEL ,Direct Keypad Debounce Select" "matrix,direct"
|
|
bitfld.long 0x00 06.--08. " DKN ,Direct Key Number" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 05. " DI ,Direct Keypad Interrupt" "0,1"
|
|
bitfld.long 0x00 04. " RE_ZERO_DEB ,Rotary Encoder Zero Debounce" "DKDI,0"
|
|
bitfld.long 0x00 03. " REE1 ,Rotary Encoder 1 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 02. " REE0 ,Rotary Encoder 0 Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " DE ,Direct Keypad Enable" "dis,ena"
|
|
bitfld.long 0x00 00. " DIE ,Direct Keypad interrupt Enable" "dis,ena"
|
|
rgroup 0x08++0x03
|
|
line.long 0x00 "KPDK,Keypad Interface Direct Key Register"
|
|
bitfld.long 0x00 30. " DKP ,Direct Key Pressed Since Last Read" "no,yes"
|
|
bitfld.long 0x00 07. " DK7 ,Direct Key 7 Input" "0,1"
|
|
bitfld.long 0x00 06. " DK6 ,Direct Key 6 Input" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 05. " DK5 ,Direct Key 5 Input" "0,1"
|
|
bitfld.long 0x00 04. " DK4 ,Direct Key 4 Input" "0,1"
|
|
bitfld.long 0x00 03. " RB1-DK3 ,Rotary Encoder B/Direct Key 3 Input" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 02. " RA1-DK2 ,Rotary Encoder A/Direct Key 2 Input" "0,1"
|
|
bitfld.long 0x00 01. " RB0-DK1 ,Rotary Encoder B/Direct Key 1 Input" "0,1"
|
|
bitfld.long 0x00 00. " RA0-DK0 ,Rotary Encoder A/Direct Key 0 Input" "0,1"
|
|
group 0x10++0x03
|
|
line.long 0x00 "KPREC,Keypad Interface Rotary Encoder Count Register"
|
|
bitfld.long 0x00 31. " OF1 ,Overflow for Rotary Encoder 1" "clr,set"
|
|
bitfld.long 0x00 30. " UF1 ,Underflow for Rotary Encoder 1" "clr,set"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RE ,Count1 Count Value for Rotary Encoder 1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " OF0 ,Overflow for Rotary Encoder 0" "clr,set"
|
|
bitfld.long 0x00 14. " UF0 ,Underflow for Rotary Encoder 0" "clr,set"
|
|
hexmask.long.byte 0x00 00.--07. 1. " RE ,Count0 Count Value for Rotary Encoder 0"
|
|
rgroup 0x18++0x03
|
|
line.long 0x00 "KPMK,Keypad Interface Matrix Key Register"
|
|
bitfld.long 0x00 31. " MKP ,Matrix Key Pressed Since Last Read" "clr,set"
|
|
bitfld.long 0x00 07. " MR7 ,Matrix Row 7" "0,1"
|
|
bitfld.long 0x00 06. " MR6 ,Matrix Row 6" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 05. " MR5 ,Matrix Row 5" "0,1"
|
|
bitfld.long 0x00 04. " MR4 ,Matrix Row 4" "0,1"
|
|
bitfld.long 0x00 03. " MR3 ,Matrix Row 3" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 02. " MR2 ,Matrix Row 2" "0,1"
|
|
bitfld.long 0x00 01. " MR1 ,Matrix Row 1" "0,1"
|
|
bitfld.long 0x00 00. " MR0 ,Matrix Row 0" "0,1"
|
|
rgroup 0x20++0x03
|
|
line.long 0x00 "KPAS, Keypad Interface Automatic Scan register"
|
|
bitfld.long 0x00 31. " SO ,Scan On" "no,yes"
|
|
hexmask.long.byte 0x00 26.--30. 1. " MUKP ,Multiple Keys Pressed"
|
|
bitfld.long 0x00 04.--07. " RP ,Row Pressed" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
textline " "
|
|
bitfld.long 0x00 00.--03. " CP ,Column Pressed" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
|
|
rgroup 0x28++0x03
|
|
line.long 0x00 "KPASMKP0,Keypad Interface Automatic Scan Multiple Keypress Register 0"
|
|
bitfld.long 0x00 31. " SO ,Scan On" "no,yes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MKC1 ,Matrix Keypad Column 1 Reading"
|
|
hexmask.long.byte 0x00 00.--07. 1. " MKC0 ,Matrix Keypad Column 0 Reading"
|
|
rgroup 0x30++0x03
|
|
line.long 0x00 "KPASMKP1,Keypad Interface Automatic Scan Multiple Keypress Register 1"
|
|
bitfld.long 0x00 31. " SO ,Scan On" "no,yes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MKC3 ,Matrix Keypad Column 3 Reading"
|
|
hexmask.long.byte 0x00 00.--07. 1. " MKC2 ,Matrix Keypad Column 2 Reading"
|
|
rgroup 0x38++0x03
|
|
line.long 0x00 "KPASMKP2,Keypad Interface Automatic Scan Multiple Keypress Register 2"
|
|
bitfld.long 0x00 31. " SO ,Scan On" "no,yes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MKC5 ,Matrix Keypad Column 5 Reading"
|
|
hexmask.long.byte 0x00 00.--07. 1. " MKC4 ,Matrix Keypad Column 4 Reading"
|
|
rgroup 0x40++0x03
|
|
line.long 0x00 "KPASMKP3,Keypad Interface Automatic Scan Multiple Keypress Register 3"
|
|
bitfld.long 0x00 31. " SO ,Scan On" "no,yes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MKC7 ,Matrix Keypad Column 7 Reading"
|
|
hexmask.long.byte 0x00 00.--07. 1. " MKC6 ,Matrix Keypad Column 6 Reading"
|
|
group 0x48++0x03
|
|
line.long 0x00 "KPKDI, Keypad Interface Key Debounce Interval register"
|
|
hexmask.long.byte 0x00 08.--15. 1. " DKDI ,Direct-Key Debounce Interval(ms)"
|
|
hexmask.long.byte 0x00 00.--07. 1. " MKDI ,Matrix-Key Debounce Interval(ms)"
|
|
width 10.
|
|
tree.end
|
|
tree "Universal Subscriber ID Interface"
|
|
width 7.
|
|
base ASD:0x41600000
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "RBR,USIM Receive Buffer Register"
|
|
bitfld.long 0x00 08. " PERR ,Parity Error" "no,yes"
|
|
hexmask.long.byte 0x00 00.--07. 1. " RB[7:0] ,Data Byte Received"
|
|
wgroup 0x04++0x03
|
|
line.long 0x00 "THR,USIM Transmit Holding Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TB[7:0] ,Data Byte Transmitted"
|
|
group 0x08++0x03
|
|
line.long 0x00 "IER,USIM Interrupt Enable Register"
|
|
bitfld.long 0x00 15. " DMA_TX ,DMA Transmitter Request Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " DMA_RX ,DMA Receiver Request Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " DMA_TIME ,Enable DMA Receiver Requests in Event of Time-Out" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CARD_DET ,Smart card Detection" "dis,ena"
|
|
bitfld.long 0x00 09. " TDR ,Transmitter Data Refill Interrupt" "dis,ena"
|
|
bitfld.long 0x00 08. " RDR ,Receiver Data Ready Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 06. " BWT ,Block Waiting Time Interrupt" "dis,ena"
|
|
bitfld.long 0x00 05. " CWT ,Character Waiting Time Interrupt" "dis,ena"
|
|
bitfld.long 0x00 04. " TIMEO ,Receiver Time-Out Interrupt" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 03. " FRAMERR ,Framing Error Interrupt" "dis,ena"
|
|
bitfld.long 0x00 02. " TDR ,Transmitter Data Refill Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 01. " RDR ,Receiver Data Ready Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 00. " OVRN ,Receiver Data Overrun Interrupt Enable" "dis,ena"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "IIR,USIM Interrupt Identification Register"
|
|
bitfld.long 0x00 10. " CARD_DET ,Smart card Detection(READ/WRITE)" "noInt/noChg,int/clr"
|
|
bitfld.long 0x00 09. " TDR ,Transmitter Data Refill Interrupt" "noInt,int"
|
|
bitfld.long 0x00 08. " RDR ,Receiver Data Ready Interrupt" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 06. " BWT ,Block Waiting Time Interrupt(READ/WRITE)" "noInt/noChg,int/clr"
|
|
bitfld.long 0x00 05. " CWT ,Character Waiting Time Interrupt(READ/WRITE)" "noInt/noChg,int/clr"
|
|
bitfld.long 0x00 04. " TIMEO ,Receiver Time-Out Interrupt" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 03. " FRAMERR ,Framing Error Interrupt(READ/WRITE)" "noInt/noChg,int/clr"
|
|
bitfld.long 0x00 02. " T0ERR ,T = 0 Error Interrupt" "noInt,int"
|
|
bitfld.long 0x00 01. " PERR ,Parity Error Interrupt(READ/WRITE)" "noInt/noChg,int/clr"
|
|
textline " "
|
|
bitfld.long 0x00 00. " OVRN ,Receiver Data Overrun Interrupt(READ/WRITE)" "noInt/noChg,int/clr"
|
|
wgroup 0x10++0x03
|
|
line.long 0x00 "FCR,USIM FIFO Control Register"
|
|
bitfld.long 0x00 08. " TX_TL ,Transmitter Interrupt Trigger Level (threshold)" "0 byte,8bytes"
|
|
bitfld.long 0x00 06.--07. " RX_TL ,Receiver Interrupt Trigger Level (threshold)" "1byte,4byte,8byte,12byte"
|
|
bitfld.long 0x00 03. " PEM ,Parity Error Mask" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 02. " TX_HOLD ,Transmit Hold" "no,yes"
|
|
bitfld.long 0x00 01. " RESETTF ,Reset Transmit FIFO" "-,rst"
|
|
bitfld.long 0x00 00. " RESETRF ,Reset Receive FIFO" "-,rst"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "FSR,USIM FIFO Status Register"
|
|
hexmask.long.byte 0x00 10.--14. 1. " PERR_NUM ,Parity Error Number"
|
|
hexmask.long.byte 0x00 05.--09. 1. " TX_LENGTH ,Transmit FIFO Length"
|
|
hexmask.long.byte 0x00 00.--04. 1. " RX_LENGTH ,Receive FIFO Length"
|
|
group 0x18++0x03
|
|
line.long 0x00 "ECR,USIM Error Control Register"
|
|
bitfld.long 0x00 07. " T0_REPEAT ,Repeat Character Transmission(READ/WRITE)" "rpt/-,inProc/rpt"
|
|
bitfld.long 0x00 06. " T0_CLR ,Clear T = 0 Error(READ/WRITE)" "clred/-,clring/clr"
|
|
bitfld.long 0x00 03.--04. " PE_TL ,Parity Error Trigger Level" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 00.--01. " T0ERR_TL ,T = 0 Error Trigger Level (threshold)" "1,2,3,4"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "LCR,USIM Line Control Register"
|
|
bitfld.long 0x00 04. " TX_T1 ,Transmitter Protocol" "T=0,T=1"
|
|
bitfld.long 0x00 03. " RX_T1 ,Receiver Protocol" "T=0,T=1"
|
|
bitfld.long 0x00 02. " EPS ,Even Parity Select (EPS)" "odd,even"
|
|
textline " "
|
|
bitfld.long 0x00 01. " ORDER ,Transmit/Receive Bit Order" "nrml,inv"
|
|
bitfld.long 0x00 00. " INVERSE ,Bit Inversion" "no,yes"
|
|
group 0x20++0x03
|
|
line.long 0x00 "USCCR,USIM Card Control Register"
|
|
bitfld.long 0x00 04. " TXD_FORCE ,Force TXD" "no,yes"
|
|
bitfld.long 0x00 01.--02. " VCC ,Card Voltage" "0V,3V,1.8V,res"
|
|
bitfld.long 0x00 00. " RST_CARD_N ,Card Reset" "rst,nrml"
|
|
rgroup 0x24++0x03
|
|
line.long 0x00 "LSR,USIM Line Status Register"
|
|
bitfld.long 0x00 15. " RXD ,Reflects Sampled Data from I/O Pad" "0,1"
|
|
bitfld.long 0x00 14. " RX_WORKING ,Receiver Working" "idle,proc"
|
|
bitfld.long 0x00 13. " TX_WORKING ,Transmitter Working" "idle,proc"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RX_EMPTY_N ,Receiver FIFO Not Empty" "empty,noEmpt"
|
|
bitfld.long 0x00 11. " TDR ,Transmitter Data Refill" "no,yes"
|
|
bitfld.long 0x00 06. " BWT ,Block Waiting Time" "<TO,>TO"
|
|
textline " "
|
|
bitfld.long 0x00 05. " CWT ,Character Waiting Time" "<TO,>TO"
|
|
bitfld.long 0x00 04. " TIMEO ,Receiver Time-Out" "<TO,>TO"
|
|
bitfld.long 0x00 03. " FRAMERR ,Framing Error" "noErr,error"
|
|
textline " "
|
|
bitfld.long 0x00 02. " T0ERR ,T = 0 Error" "noErr,error"
|
|
bitfld.long 0x00 01. " PERR ,Parity Error" "noErr,error"
|
|
bitfld.long 0x00 00. " OVRN ,Receiver Data Overrun Error" "noErr,error"
|
|
group 0x28++0x03
|
|
line.long 0x00 "EGTR,USIM Extra Guard Time Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " EGTM ,Extra Guard-Time Moments"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "BGTR,USIM Block Guard Time Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " BGT ,Block Guard Time"
|
|
group 0x30++0x03
|
|
line.long 0x00 "TOR,USIM Time-Out Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TO ,Time-Out"
|
|
group 0x34++0x03
|
|
line.long 0x00 "CLKR,USIM Clock Register"
|
|
bitfld.long 0x00 15. " SCU ,STOP_CLK_UCLK-Stop USIM Interface Clock" "start,stop"
|
|
bitfld.long 0x00 14. " STOP_LEVEL ,Stop Level" "low,high"
|
|
bitfld.long 0x00 13. " STOP_UCLK ,Stop Clock" "start,stop"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RQST ,Clock Change Request" "no,yes"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DIVISOR ,Clock Divisor"
|
|
group 0x38++0x03
|
|
line.long 0x00 "DLR,USIM Divisor Latch Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " DIVISOR ,Baud Divisor"
|
|
group 0x3C++0x03
|
|
line.long 0x00 "FLR,USIM Factor Latch Register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " FACTOR ,Baud Factor"
|
|
group 0x40++0x03
|
|
line.long 0x00 "CWTR,USIM Character Waiting Time Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " CWT ,Character Waiting Time"
|
|
group 0x44++0x03
|
|
line.long 0x00 "BWTR,USIM Block Waiting Time Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " BWT ,Block Waiting Time"
|
|
width 10.
|
|
tree.end
|
|
tree "USB Host Controller"
|
|
width 10.
|
|
base ASD:0x4C000000
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "UHCREV,UHC HCI Spec Revision Register"
|
|
group 0x04++0x03
|
|
line.long 0x00 "UHCHCON,UHC Host Control Register"
|
|
bitfld.long 0x00 10. " RWE ,Remote Wakeu pEnable" "dis,ena"
|
|
bitfld.long 0x00 09. " RWC ,Remote Wakeup Connected" "no,yes"
|
|
bitfld.long 0x00 08. " IR ,Interrupt Routing" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 06.--07. " HCFS ,Host Controller Functional State" "reset,resume,operation,suspend"
|
|
bitfld.long 0x00 05. " BLE ,Bulk List Enable" "dis,ena"
|
|
bitfld.long 0x00 04. " CLE ,Control List Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 03. " IE ,Isochronous Enable" "dis,ena"
|
|
bitfld.long 0x00 02. " PLE ,PeriodicList Enable" "dis,ena"
|
|
bitfld.long 0x00 00.--01. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1"
|
|
group 0x08++0x03
|
|
line.long 0x00 "UHCCOMS,UHC Command Status Register"
|
|
bitfld.long 0x00 16.--17. " SOC ,Scheduling Overrun Count" "00,01,10,11"
|
|
bitfld.long 0x00 03. " OCR ,Ownership Change Request" "no,yes"
|
|
bitfld.long 0x00 02. " BLF ,Bulk List Filled" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 01. " CLF ,Control List Filled" "no,yes"
|
|
bitfld.long 0x00 00. " HCR ,Host Controller Reset" "no,yes"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "UHCINTS,UHC Interrupt Status Register"
|
|
eventfld.long 0x00 30. " OC ,Ownership Change" "0,1"
|
|
eventfld.long 0x00 06. " RHSC ,Root Hub Status Change" "no,yes"
|
|
eventfld.long 0x00 05. " FNO ,Frame Number Overflow" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 04. " UE ,Unrecoverable Error" "no,ye"
|
|
eventfld.long 0x00 03. " RD ,Resume Detected" "no,yes"
|
|
eventfld.long 0x00 02. " SF ,Start of Frame" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 01. " WDH ,Writeback Done Head" "no,yes"
|
|
eventfld.long 0x00 00. " SO ,Scheduling Overrun" "no,yes"
|
|
group 0x10++0x03
|
|
line.long 0x00 "UHCINTE,UHC Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " MIE ,Master Interrupt Enable" "-,ena"
|
|
bitfld.long 0x00 30. " OC ,Ownership Change" "-,ena"
|
|
bitfld.long 0x00 06. " RHSC ,Root Hub Status Change" "-,ena"
|
|
textline " "
|
|
bitfld.long 0x00 05. " FNO ,Frame Number Overflow" "-,ena"
|
|
bitfld.long 0x00 04. " UE ,Unrecoverable Error" "-,ena"
|
|
bitfld.long 0x00 03. " RD ,Resume Detect" "-,ena"
|
|
textline " "
|
|
bitfld.long 0x00 02. " SF ,Start of Frame" "-,ena"
|
|
bitfld.long 0x00 01. " WDH ,Writeback HcDoneHead" "-,ena"
|
|
bitfld.long 0x00 00. " SO ,Scheduling Overrun" "-,ena"
|
|
group 0x14++0x03
|
|
line.long 0x00 "UHCINTD,UHC Interrupt Disable Register"
|
|
bitfld.long 0x00 31. " MIE ,Master Interrupt Enable" "-,dis"
|
|
bitfld.long 0x00 30. " OC ,Ownership Change" "-,dis"
|
|
bitfld.long 0x00 06. " RHSC ,Root Hub Status Change" "-,dis"
|
|
textline " "
|
|
bitfld.long 0x00 05. " FNO ,Frame Number Overflow" "-,dis"
|
|
bitfld.long 0x00 04. " UE ,Unrecoverable Error" "-,dis"
|
|
bitfld.long 0x00 03. " RD ,Resume Detect" "-,dis"
|
|
textline " "
|
|
bitfld.long 0x00 02. " SF ,Start of Frame" "-,dis"
|
|
bitfld.long 0x00 01. " WDH ,Writeback HcDoneHead" "-,dis"
|
|
bitfld.long 0x00 00. " SO ,Scheduling Overrun" "-,dis"
|
|
group 0x18++0x03
|
|
line.long 0x00 "UHCHCCA,UHC Host Controller Communication Area Register"
|
|
hexmask.long 0x00 08.--31. 0x100 " HCCA ,Host Controller Communication Area"
|
|
rgroup 0x1C++0x03
|
|
line.long 0x00 "UHCPCED,UHC Period Current Endpoint Descriptor Register"
|
|
hexmask.long 0x00 04.--31. 0x10 " PCED ,PeriodCurrent Endpoint Descriptor"
|
|
group 0x20++0x03
|
|
line.long 0x00 "UHCCHED,UHC Control Head Endpoint Descriptor Register"
|
|
hexmask.long 0x00 04.--31. 0x10 " CHED ,ControlHead Endpoint Descriptor"
|
|
group 0x24++0x03
|
|
line.long 0x00 "UHCCCED,UHC Control Current Endpoint Descriptor Register"
|
|
hexmask.long 0x00 04.--31. 0x10 " CCED ,ControlCurrent Enpoint Descriptor"
|
|
group 0x28++0x03
|
|
line.long 0x00 "UHCBHED,UHC Bulk Head Endpoint Descriptor Register"
|
|
hexmask.long 0x00 04.--31. 0x10 " BHED ,BulkHead Endpoint Descriptor"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "UHCBCED,UHC Bulk Current Endpoint Descriptor Register"
|
|
hexmask.long 0x00 04.--31. 0x10 " BCED ,Bulk Current Endpoint Descriptor"
|
|
rgroup 0x30++0x03
|
|
line.long 0x00 "UHCDHEAD,UHC Done Head Register"
|
|
hexmask.long 0x00 04.--31. 0x10 " DHED ,Done Head"
|
|
group 0x34++0x03
|
|
line.long 0x00 "UHCFMI,UHC Frame Interval Register"
|
|
bitfld.long 0x00 31. " FIT ,Frame Interval Toggle" "0,1"
|
|
hexmask.long.word 0x00 16.--30. 1. " FSMPS ,FS Largest Data Packet"
|
|
hexmask.long.word 0x00 00.--13. 1. " FI ,Frame Interval"
|
|
rgroup 0x38++0x03
|
|
line.long 0x00 "UHCFMR,UHC Frame Remaining Register"
|
|
bitfld.long 0x00 31. " FRT ,Frame Remaining Toggle" "0,1"
|
|
hexmask.long.word 0x00 00.--13. 1. " FR ,Frame Remaining"
|
|
rgroup 0x3C++0x03
|
|
line.long 0x00 "UHCFMN,UHC Frame Number Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " FN ,Frame Number"
|
|
group 0x40++0x03
|
|
line.long 0x00 "UHCPERS,UHC Periodic Start Register"
|
|
hexmask.long.word 0x00 00.--13. 1. " PS ,Periodic Start"
|
|
group 0x44++0x03
|
|
line.long 0x00 "UHCLST,UHC Low-Speed Threshold Register"
|
|
hexmask.long.word 0x00 00.--11. 1. " LST ,LS Threshold"
|
|
group 0x48++0x03
|
|
line.long 0x00 "UHCRHDA,UHC Root Hub Descriptor A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,Power On To Power Good Time"
|
|
bitfld.long 0x00 12. " NOCP ,No Over Current Protection" "support,noSupport"
|
|
bitfld.long 0x00 11. " OCPM ,Over Current Protection Mode" "global,per-port"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DT ,DeviceType" "0,1"
|
|
bitfld.long 0x00 09. " NPS ,No Power Switching" "pwrSwtch,noPwrSwtch"
|
|
bitfld.long 0x00 08. " PSM ,Power Switching Mode" "sameTime,individual"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " NDP ,Number Downstream Ports"
|
|
group 0x4C++0x03
|
|
line.long 0x00 "UHCRHDB,UHC Root Hub Descriptor B Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PPCM ,Port Power Control Mask"
|
|
hexmask.long.word 0x00 00.--15. 1. " DR ,Device Removable"
|
|
group 0x50++0x03
|
|
line.long 0x00 "UHCRHS, UHC Root Hub Status register"
|
|
bitfld.long 0x00 31. " CRWE ,Clear Remote Wakeup Enable" "-,ena"
|
|
eventfld.long 0x00 17. " OCIC ,OverCurrentIndicatorChange" "no,yes"
|
|
bitfld.long 0x00 16. " LPSC ,(read) Local Power Status Change / (write) Set Global Power: wake-up" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DRWE ,(read) DeviceRemoteWakeupEnable / (write) SetRemoteWakeupEnable" "0,1"
|
|
bitfld.long 0x00 01. " OCI ,Over Current Indicator" "0,1"
|
|
bitfld.long 0x00 00. " LPS ,(read) Local Power Status/ (write) Clear Global Power" "0,1"
|
|
group 0x54++0x03
|
|
line.long 0x00 "UHCRHPS1,UHC Root Hub Port 1 Status Register"
|
|
bitfld.long 0x00 20. " PRSC ,Port Reset Status Change" "no,yes"
|
|
bitfld.long 0x00 19. " POCIC ,Port Over Current Indicator Change" "no,yes"
|
|
bitfld.long 0x00 18. " PSSC ,Port Suspend Status Change" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PESC ,Port Enable Status Change" "no,yes"
|
|
bitfld.long 0x00 16. " CSC ,Connect Status Change" "no,yes"
|
|
eventfld.long 0x00 09. " LSDA ,(read) Low Speed Device Attached / (write) Clear Port Power" "fullSpd,lowSpd"
|
|
textline " "
|
|
bitfld.long 0x00 08. " PPS ,(read) Port Power Status / (write) Set Port Power" "off,on"
|
|
bitfld.long 0x00 04. " PRS ,(read) Port Reset Status / (write) Set Port Reset" "noAct,active"
|
|
bitfld.long 0x00 03. " POCI ,(read) Port Over Current Indicator / (write) Clear Suspend Status" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 02. " PSS ,(read) Port Suspend Status / (write) Set Port Suspend" "no,yes"
|
|
bitfld.long 0x00 01. " PES ,(read) Port Enable Status / (write) Set Port Enable" "dis,ena"
|
|
bitfld.long 0x00 00. " CCS ,(read) Current Connect Status / (write) Clear Port Enable" "no,yes"
|
|
group 0x58++0x03
|
|
line.long 0x00 "UHCRHPS2,UHC Root Hub Port 2 Status Register"
|
|
bitfld.long 0x00 20. " PRSC ,Port Reset Status Change" "no,yes"
|
|
bitfld.long 0x00 19. " POCIC ,Port Over Current Indicator Change" "no,yes"
|
|
bitfld.long 0x00 18. " PSSC ,Port Suspend Status Change" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PESC ,Port Enable Status Change" "no,yes"
|
|
bitfld.long 0x00 16. " CSC ,Connect Status Change" "no,yes"
|
|
eventfld.long 0x00 09. " LSDA ,(read) Low Speed Device Attached / (write) Clear Port Power" "fullSpd,lowSpd"
|
|
textline " "
|
|
bitfld.long 0x00 08. " PPS ,(read) Port Power Status / (write) Set Port Power" "off,on"
|
|
bitfld.long 0x00 04. " PRS ,(read) Port Reset Status / (write) Set Port Reset" "noAct,active"
|
|
bitfld.long 0x00 03. " POCI ,(read) Port Over Current Indicator / (write) Clear Suspend Status" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 02. " PSS ,(read) Port Suspend Status / (write) Set Port Suspend" "no,yes"
|
|
bitfld.long 0x00 01. " PES ,(read) Port Enable Status / (write) Set Port Enable" "dis,ena"
|
|
bitfld.long 0x00 00. " CCS ,(read) Current Connect Status / (write) Clear Port Enable" "no,yes"
|
|
group 0x5C++0x03
|
|
line.long 0x00 "UHCRHPS3,UHC Root Hub Port 3 Status Register"
|
|
bitfld.long 0x00 20. " PRSC ,Port Reset Status Change" "no,yes"
|
|
bitfld.long 0x00 19. " POCIC ,Port Over Current Indicator Change" "no,yes"
|
|
bitfld.long 0x00 18. " PSSC ,Port Suspend Status Change" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PESC ,Port Enable Status Change" "no,yes"
|
|
bitfld.long 0x00 16. " CSC ,Connect Status Change" "no,yes"
|
|
eventfld.long 0x00 09. " LSDA ,(read) Low Speed Device Attached / (write) Clear Port Power" "fullSpd,lowSpd"
|
|
textline " "
|
|
bitfld.long 0x00 08. " PPS ,(read) Port Power Status / (write) Set Port Power" "off,on"
|
|
bitfld.long 0x00 04. " PRS ,(read) Port Reset Status / (write) Set Port Reset" "noAct,active"
|
|
bitfld.long 0x00 03. " POCI ,(read) Port Over Current Indicator / (write) Clear Suspend Status" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 02. " PSS ,(read) Port Suspend Status / (write) Set Port Suspend" "no,yes"
|
|
bitfld.long 0x00 01. " PES ,(read) Port Enable Status / (write) Set Port Enable" "dis,ena"
|
|
bitfld.long 0x00 00. " CCS ,(read) Current Connect Status / (write) Clear Port Enable" "no,yes"
|
|
group 0x60++0x03
|
|
line.long 0x00 "UHCSTAT,UHC Status Register"
|
|
eventfld.long 0x00 16. " UPS3 ,USB Power Sense Port 3" "-,overCurr"
|
|
eventfld.long 0x00 15. " SBMAI ,System Bus Master Abort Interrupt" "-,int"
|
|
eventfld.long 0x00 14. " SBTAI ,System Bus Target Abort Interrupt" "-,int"
|
|
textline " "
|
|
eventfld.long 0x00 13. " UPRI ,USB Port Resume Interrupt" "no,yes"
|
|
eventfld.long 0x00 12. " UPS2 ,USB Power Sense Port 2" "-,overCurr"
|
|
eventfld.long 0x00 11. " UPS1 ,USB Power Sense Port 1" "-,overCurr"
|
|
textline " "
|
|
eventfld.long 0x00 10. " HTA ,HCI Transfer Abort" "no,yes"
|
|
eventfld.long 0x00 08. " HBA ,HCI Buffer Active" "no,yes"
|
|
eventfld.long 0x00 07. " RWUE ,HCI Remote Wake-Up Event" "no,yes"
|
|
group 0x64++0x03
|
|
line.long 0x00 "UHCHR, UHC Reset register"
|
|
bitfld.long 0x00 11. " SSEP3 ,Sleep Standby Enable for Port 3" "enaPwr,disPwr"
|
|
bitfld.long 0x00 10. " SSEP2 ,Sleep Standby Enable for Port 2" "enaPwr,disPwr"
|
|
bitfld.long 0x00 09. " SSEP1 ,Sleep Standby Enable for Port 1" "enaPwr,disPwr"
|
|
textline " "
|
|
bitfld.long 0x00 07. " PCPL ,Power Control Polarity Low" "actHi,actLow"
|
|
bitfld.long 0x00 06. " PSPL ,Power Sense Polarity Low" "actHi,actLow"
|
|
bitfld.long 0x00 05. " SSE ,Sleep Standby Enable" "enaPwr,disPwr"
|
|
textline " "
|
|
bitfld.long 0x00 04. " UIT ,USB Interrupt Test" "dis,ena"
|
|
bitfld.long 0x00 03. " SSDC ,Simulation Scale Down Clock" "nrml,1msClk->1us"
|
|
bitfld.long 0x00 02. " CGR ,Clock Generation Reset" "active,inAct"
|
|
textline " "
|
|
bitfld.long 0x00 01. " FHR ,Force Host Controller Reset" "rnml,rst"
|
|
bitfld.long 0x00 00. " FSBIR ,Force System Bus Interface Reset" "-,rst"
|
|
group 0x68++0x03
|
|
line.long 0x00 "UHCHIE,UHC Interrupt Enable Register"
|
|
bitfld.long 0x00 14. " UPS3IE ,USB Power Sense Port 3 Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " UPRIE ,USB Port Resume Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " UPS2IE ,USB Power Sense Port 2 Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " UPS1IE ,USB Power Sense Port 1 Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " TAIE ,HCI Interface Transfer Abort Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 08. " HBAIE ,HCI Buffer Active Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 07. " RWIE ,HCI Remote Wake-Up Interrupt Enable" "dis,ena"
|
|
group 0x6C++0x03
|
|
line.long 0x00 "UHCHIT,UHC Interrupt Test Register"
|
|
bitfld.long 0x00 16. " UPS3T ,USB Power Sense Port3 Interrupt Test" "-,int"
|
|
bitfld.long 0x00 15. " SMAT ,System Bus Master Abort Interrupt Test" "-,int"
|
|
bitfld.long 0x00 14. " STAT ,System Bus Target Abort Interrupt Test" "-,int"
|
|
textline " "
|
|
bitfld.long 0x00 13. " UPRT ,USB Port Resume Interrupt Test" "-,int"
|
|
bitfld.long 0x00 12. " UPS2T ,USB Power Sense Port2 Interrupt Test" "-,int"
|
|
bitfld.long 0x00 11. " UPS1T ,USB Power Sense Port1 Interrupt Test" "-,int"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TAT ,HCI Interface Transfer Abort Interrupt Test" "-,int"
|
|
bitfld.long 0x00 09. " IRQT ,Normal OHC Interrupt Test" "-,int"
|
|
bitfld.long 0x00 08. " BAT ,HCI Buffer Active Interrupt Test" "-,int"
|
|
textline " "
|
|
bitfld.long 0x00 07. " RWUT ,HCI Remote Wake-Up Interrupt Test" "-,int"
|
|
tree.end
|
|
tree "Real-Time Clock (RTC)"
|
|
width 9.
|
|
base ASD:0x40900000
|
|
group 0x00++0x03
|
|
line.long 0x00 "RCNR,RTC Counter Register"
|
|
group 0x04++0x03
|
|
line.long 0x00 "RTAR,RTC Alarm Register"
|
|
group 0x08++0x03
|
|
line.long 0x00 "RTSR,RTC Status Register"
|
|
bitfld.long 0x00 15. " PICE ,Periodic Interrupt Count Enable for RTCPICR Count Register" "dis,ena"
|
|
bitfld.long 0x00 14. " PIALE ,Periodic Interrupt Alarm Enable" "dis,ena"
|
|
eventfld.long 0x00 13. " PIAL ,Periodic Interrupt Alarm Status" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWCE ,Stopwatch Count Enable for SWCR Count Register" "dis,ena"
|
|
bitfld.long 0x00 11. " SWALE2 ,Stopwatch Alarm Enable for Stopwatch Alarm 2" "dis,ena"
|
|
eventfld.long 0x00 10. " SWAL2 ,Stopwatch Alarm 2 Status" "noDet,Det"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SWALE1 ,Stopwatch Alarm Enable for Stopwatch Alarm 1" "dis,ena"
|
|
eventfld.long 0x00 8. " SWAL1 ,Stopwatch Alarm 1 Status" "noDet,Det"
|
|
bitfld.long 0x00 7. " RDALE2 ,Wristwatch Alarm Enable for Wristwatch Alarm 2" "dis,ena"
|
|
textline " "
|
|
eventfld.long 0x00 6. " RDAL2 ,Wristwatch Alarm 2 Status" "noDet,Det"
|
|
bitfld.long 0x00 5. " RDALE1 ,Wristwatch Alarm Enable for Wristwatch Alarm 1" "dis,ena"
|
|
eventfld.long 0x00 4. " RDAL1 ,Wristwatch Alarm 1 Status" "noDet,Det"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HZE ,HZ interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 2. " ALE ,RTC Alarm interrupt Enable" "dis,ena"
|
|
eventfld.long 0x00 1. " HZ ,HZ Rising Edge Detected" "noDet,Det"
|
|
textline " "
|
|
eventfld.long 0x00 0. " LA ,RTC Alarm Detected" "noDet,Det"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "RTTR,RTC Timer Trim Register"
|
|
bitfld.long 0x00 31. " LCK ,Lock for RTTR" "no,yes"
|
|
hexmask.long.word 0x00 16.--25. 1. " DEL ,Trim Delete Count"
|
|
hexmask.long.word 0x00 00.--15. 1. " CK_DIV ,Clock Divider Count"
|
|
group 0x10++0x03
|
|
line.long 0x00 "RDCR,RTC Day Counter Register"
|
|
bitfld.long 0x00 20.--22. " WOM ,Week of Month" "-,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 17.--19. " DOW ,Day of Week" "-,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--16. " HOURS ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 06.--11. " MINUTES ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 00.--05. " SECONDS ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
group 0x14++0x03
|
|
line.long 0x00 "RYCR,RTC Year Counter Register"
|
|
hexmask.long.word 0x00 09.--20. 1. " YEAR ,Current Year"
|
|
bitfld.long 0x00 05.--08. " MONTH ,Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,-,-,-"
|
|
bitfld.long 0x00 00.--04. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group 0x18++0x03
|
|
line.long 0x00 "RDAR1,RTC Wristwatch Day Alarm Register 1"
|
|
bitfld.long 0x00 20.--22. " WOM ,Week of Month" "-,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 17.--19. " DOW ,Day of Week" "-,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--16. " HOURS ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 06.--11. " MINUTES ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 00.--05. " SECONDS ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "RYAR1,RTC Wristwatch Year Alarm Register 1"
|
|
hexmask.long.word 0x00 09.--20. 1. " YEAR ,Current Year"
|
|
bitfld.long 0x00 05.--08. " MONTH ,Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,-,-,-"
|
|
bitfld.long 0x00 00.--04. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group 0x20++0x03
|
|
line.long 0x00 "RDAR2,RTC Wristwatch Day Alarm Register 2"
|
|
bitfld.long 0x00 20.--22. " WOM ,Week of Month" "-,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 17.--19. " DOW ,Day of Week" "-,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--16. " HOURS ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 06.--11. " MINUTES ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 00.--05. " SECONDS ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
group 0x24++0x03
|
|
line.long 0x00 "RYAR2,RTC Wristwatch Year Alarm Register 2"
|
|
hexmask.long.word 0x00 09.--20. 1. " YEAR ,Match Value for Year Count"
|
|
bitfld.long 0x00 05.--08. " MONTH ,Match Value for Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,-,-,-"
|
|
bitfld.long 0x00 00.--04. " DOM ,Match Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group 0x28++0x03
|
|
line.long 0x00 "SWCR,RTC Stopwatch Counter Register"
|
|
bitfld.long 0x00 19.--23. " HOURS ,Match Value for Stopwatch Time in Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 13.--18. " MINUTES ,Match Value for Stopwatch Time in Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 07.--12. " SECONDS ,Match Value for Stopwatch Time in Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--06. 1. " HUNDRETHS ,Match Value for Stopwatch Time in Hundredths of a Second"
|
|
group 0x2C++0x03
|
|
line.long 0x00 "SWAR1,RTC Stopwatch Alarm Register 1"
|
|
bitfld.long 0x00 19.--23. " HOURS ,Match Value for Stopwatch Time in Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 13.--18. " MINUTES ,Match Value for Stopwatch Time in Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 07.--12. " SECONDS ,Match Value for Stopwatch Time in Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--06. 1. " HUNDRETHS ,Match Value for Stopwatch Time in Hundredths of a Second"
|
|
group 0x30++0x03
|
|
line.long 0x00 "SWAR2,RTC Stopwatch Alarm Register 2"
|
|
bitfld.long 0x00 19.--23. " HOURS ,Match Value for Stopwatch Time in Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 13.--18. " MINUTES ,Match Value for Stopwatch Time in Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.long 0x00 07.--12. " SECONDS ,Match Value for Stopwatch Time in Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--06. 1. " HUNDRETHS ,Match Value for Stopwatch Time in Hundredths of a Second"
|
|
group 0x34++0x03
|
|
line.long 0x00 "RTCPICR,RTC Periodic Interrupt Counter Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " MILLISECONDS ,Periodic Interrupt Time (in milliseconds)"
|
|
group 0x38++0x03
|
|
line.long 0x00 "PIAR,RTC Periodic Interrupt Alarm Register"
|
|
hexmask.long.word 0x00 00.--15. 1. " MILLISECONDS ,Match value for the periodic interrupt time in milliseconds"
|
|
width 10.
|
|
tree.end
|
|
tree "Operating System Timers"
|
|
width 8.
|
|
base ASD:0x40A00000
|
|
group 0x00++0x0f "OS Timer Match 0-3 Registers"
|
|
line.long 0x00 "OSMR0,OS Timer Match 0 Register"
|
|
line.long 0x04 "OSMR1,OS Timer Match 1 Register"
|
|
line.long 0x08 "OSMR2,OS Timer Match 2 Register"
|
|
line.long 0x0c "OSMR3,OS Timer Match 3 Register"
|
|
group 0x10++0x03
|
|
line.long 0x00 "OSCR0,OS Timer Counter 0 Register"
|
|
group 0x14++0x03
|
|
line.long 0x00 "OSSR,OS Timer Status Register (used for all counters)"
|
|
bitfld.long 0x00 11. " M11 ,Match Status Channel 11" "no,yes"
|
|
bitfld.long 0x00 10. " M10 ,Match Status Channel 10" "no,yes"
|
|
bitfld.long 0x00 09. " M09 ,Match Status Channel 09" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 08. " M08 ,Match Status Channel 08" "no,yes"
|
|
bitfld.long 0x00 07. " M07 ,Match Status Channel 07" "no,yes"
|
|
bitfld.long 0x00 06. " M06 ,Match Status Channel 06" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 05. " M05 ,Match Status Channel 05" "no,yes"
|
|
bitfld.long 0x00 04. " M04 ,Match Status Channel 04" "no,yes"
|
|
bitfld.long 0x00 03. " M03 ,Match Status Channel 03" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 02. " M02 ,Match Status Channel 02" "no,yes"
|
|
bitfld.long 0x00 01. " M01 ,Match Status Channel 01" "no,yes"
|
|
bitfld.long 0x00 00. " M00 ,Match Status Channel 00" "no,yes"
|
|
group 0x18++0x03
|
|
line.long 0x00 "OWER,OS Timer Watchdog Enable Register"
|
|
bitfld.long 0x00 00. " WME ,Watchdog Match Enable" "dis,ena"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "OIER,OS Timer Interrupt Enable Register (used for all counters)"
|
|
bitfld.long 0x00 11. " E11 ,Interrupt Enable Channel 11" "no,yes"
|
|
bitfld.long 0x00 10. " E10 ,Interrupt Enable Channel 10" "no,yes"
|
|
bitfld.long 0x00 09. " E09 ,Interrupt Enable Channel 09" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 08. " E08 ,Interrupt Enable Channel 08" "no,yes"
|
|
bitfld.long 0x00 07. " E07 ,Interrupt Enable Channel 07" "no,yes"
|
|
bitfld.long 0x00 06. " E06 ,Interrupt Enable Channel 06" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 05. " E05 ,Interrupt Enable Channel 05" "no,yes"
|
|
bitfld.long 0x00 04. " E04 ,Interrupt Enable Channel 04" "no,yes"
|
|
bitfld.long 0x00 03. " E03 ,Interrupt Enable Channel 03" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 02. " E02 ,Interrupt Enable Channel 02" "no,yes"
|
|
bitfld.long 0x00 01. " E01 ,Interrupt Enable Channel 01" "no,yes"
|
|
bitfld.long 0x00 00. " E00 ,Interrupt Enable Channel 00" "no,yes"
|
|
rgroup 0x20++0x03
|
|
line.long 0x00 "OSNR,OS Timer Snapshot Register"
|
|
group 0x40++0x1f
|
|
line.long 0x00 "OSCR4,OS Timer Counter 4 Register"
|
|
line.long 0x04 "OSCR5,OS Timer Counter 5 Register"
|
|
line.long 0x08 "OSCR6,OS Timer Counter 6 Register"
|
|
line.long 0x0c "OSCR7,OS Timer Counter 7 Register"
|
|
line.long 0x10 "OSCR8,OS Timer Counter 8 Register"
|
|
line.long 0x14 "OSCR9,OS Timer Counter 9 Register"
|
|
line.long 0x18 "OSCR10,OS Timer Counter 10 Register"
|
|
line.long 0x1c "OSCR11,OS Timer Counter 11 Register"
|
|
group 0x80++0x1f
|
|
line.long 0x00 "OSMR4,OS Timer Match 4 Register"
|
|
line.long 0x04 "OSMR5,OS Timer Match 5 Register"
|
|
line.long 0x08 "OSMR6,OS Timer Match 6 Register"
|
|
line.long 0x0c "OSMR7,OS Timer Match 7 Register"
|
|
line.long 0x10 "OSMR8,OS Timer Match 8 Register"
|
|
line.long 0x14 "OSMR9,OS Timer Match 9 Register"
|
|
line.long 0x18 "OSMR10,OS Timer Match 10 Register"
|
|
line.long 0x1c "OSMR11,OS Timer Match 11 Register"
|
|
group 0xc0--0xcf
|
|
line.long 0x00 "OMCR4,OS Match Control Register 4"
|
|
bitfld.long 0x00 07. " C ,Channel 4-7 Match Against" "0,1"
|
|
bitfld.long 0x00 06. " P ,Periodic Timer" "stop,cntn"
|
|
bitfld.long 0x00 04.--05. " S ,External Synchronization Control" "noExtSynch,EXT_SYNC0risEdg,EXT_SYNC1risEdg,res"
|
|
textline " "
|
|
bitfld.long 0x00 03. " R ,Reset OSCRx on Match" "no,yes"
|
|
bitfld.long 0x00 00.--02. " CRES ,Counter Resolution" "dis,1sec/32768,1ms,1sec,1ms,extClk,res,res"
|
|
line.long 0x04 "OMCR5,OS Match Control Register 5"
|
|
bitfld.long 0x04 07. " C ,Channel 4-7 Match Against" "0,1"
|
|
bitfld.long 0x04 06. " P ,Periodic Timer" "stop,cntn"
|
|
bitfld.long 0x04 04.--05. " S ,External Synchronization Control" "noExtSynch,EXT_SYNC0risEdg,EXT_SYNC1risEdg,res"
|
|
textline " "
|
|
bitfld.long 0x04 03. " R ,Reset OSCRx on Match" "no,yes"
|
|
bitfld.long 0x04 00.--02. " CRES ,Counter Resolution" "dis,1sec/32768,1ms,1sec,1ms,extClk,res,res"
|
|
line.long 0x08 "OMCR6,OS Match Control Register 6"
|
|
bitfld.long 0x08 07. " C ,Channel 4-7 Match Against" "0,1"
|
|
bitfld.long 0x08 06. " P ,Periodic Timer" "stop,cntn"
|
|
bitfld.long 0x08 04.--05. " S ,External Synchronization Control" "noExtSynch,EXT_SYNC0risEdg,EXT_SYNC1risEdg,res"
|
|
textline " "
|
|
bitfld.long 0x08 03. " R ,Reset OSCRx on Match" "no,yes"
|
|
bitfld.long 0x08 00.--02. " CRES ,Counter Resolution" "dis,1sec/32768,1ms,1sec,1ms,extClk,res,res"
|
|
line.long 0x0c "OMCR7,OS Match Control Register 7"
|
|
bitfld.long 0x0c 07. " C ,Channel 4-7 Match Against" "0,1"
|
|
bitfld.long 0x0c 06. " P ,Periodic Timer" "stop,cntn"
|
|
bitfld.long 0x0c 04.--05. " S ,External Synchronization Control" "noExtSynch,EXT_SYNC0risEdg,EXT_SYNC1risEdg,res"
|
|
textline " "
|
|
bitfld.long 0x0c 03. " R ,Reset OSCRx on Match" "no,yes"
|
|
bitfld.long 0x0c 00.--02. " CRES ,Counter Resolution" "dis,1sec/32768,1ms,1sec,1ms,extClk,res,res"
|
|
group 0xD0++0x03
|
|
line.long 0x00 "OMCR8,OS Match Control 8 Register"
|
|
bitfld.long 0x00 07. " C ,Channel 8 and 10 Match Against" "0,1"
|
|
bitfld.long 0x00 06. " P ,Periodic Timer" "stop,cntn"
|
|
bitfld.long 0x00 04.--05. " S ,External Synchronization Control" "noExtSynch,EXT_SYNC0risEdg,EXT_SYNC1risEdg,res"
|
|
textline " "
|
|
bitfld.long 0x00 03. " R ,Reset OSCRx on Match" "no,yes"
|
|
bitfld.long 0x00 00.--02. 8. " CRES ,Counter Resolution" "dis,1sec/32768,1ms,1sec,1ms,extClk,SSP1,SSP2,SSP3,UDC Fram,?..."
|
|
group 0xD4++0x03
|
|
line.long 0x00 "OMCR9,OS Match Control 9 register"
|
|
bitfld.long 0x00 09. " N ,Snapshot Mode" "dis,OSCR9"
|
|
bitfld.long 0x00 07. " C ,Channel 9 and 11 Match Against" "OSCR8,OSCRx"
|
|
bitfld.long 0x00 06. " P ,Periodic Timer" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 04.--05. " S ,External Synchronization Control" "noExtSynch,EXT_SYNC0risEdg,EXT_SYNC1risEdg,res"
|
|
bitfld.long 0x00 03. " R ,Reset OSCRx on Match" "noRst,rst"
|
|
bitfld.long 0x00 00.--02. 8. " CRES ,Counter Resolution" "dis,1sec/32768,1ms,1sec,1ms,extClk,SSP1,SSP2,SSP3,UDC Fram,?..."
|
|
group 0xD8++0x03
|
|
line.long 0x00 "OMCR10,OS Match Control 10 Register"
|
|
bitfld.long 0x00 07. " C ,Channel 8 and 10 Match Against" "0,1"
|
|
bitfld.long 0x00 06. " P ,Periodic Timer" "stop,cntn"
|
|
bitfld.long 0x00 04.--05. " S ,External Synchronization Control" "noExtSynch,EXT_SYNC0risEdg,EXT_SYNC1risEdg,res"
|
|
textline " "
|
|
bitfld.long 0x00 03. " R ,Reset OSCRx on Match" "no,yes"
|
|
bitfld.long 0x00 00.--02. 8. " CRES ,Counter Resolution" "dis,1sec/32768,1ms,1sec,1ms,extClk,SSP1,SSP2,SSP3,UDC Fram,?..."
|
|
group 0xDC++0x03
|
|
line.long 0x00 "OMCR11,OS Match Control 11 Register"
|
|
bitfld.long 0x00 09. " N ,Snapshot Mode" "dis,OSCR10"
|
|
bitfld.long 0x00 07. " C ,Channel 9 and 11 Match Against" "OSCR8,OSCRx"
|
|
bitfld.long 0x00 06. " P ,Periodic Timer" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 04.--05. " S ,External Synchronization Control" "noExtSynch,EXT_SYNC0risEdg,EXT_SYNC1risEdg,res"
|
|
bitfld.long 0x00 03. " R ,Reset OSCRx on Match" "noRst,rst"
|
|
bitfld.long 0x00 00.--02. 8. " CRES ,Counter Resolution" "dis,1sec/32768,1ms,1sec,1ms,extClk,SSP1,SSP2,SSP3,UDC Fram,?..."
|
|
width 10.
|
|
tree.end
|
|
tree "Pulse Width Modulator Controller"
|
|
width 9.
|
|
base ASD:0x40B00000
|
|
group 0x00++0x03 "PWM0"
|
|
line.long 0x00 "PWMCR0,PWM 0 Control Register"
|
|
bitfld.long 0x00 06. " SD ,Pulse Width Modulator Shutdown Mode" "graceful,abrupt"
|
|
hexmask.long.byte 0x00 00.--05. 1. " PRESCALE ,The scaled counter clock frequency is PSCLK_PWM<x> / (PRESCALEx +1)"
|
|
group 0x04++0x03
|
|
line.long 0x00 "PWMDCR0,PWM 0 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle" "0,1"
|
|
hexmask.long.byte 0x00 00.--09. 1. " DCYCLE ,Duty Cycle of PWM_OUT<x>"
|
|
group 0x08++0x03
|
|
line.long 0x00 "PWMPCR0,PWM 0 Period Register"
|
|
hexmask.long.word 0x00 00.--09. 1. " PV ,Period Value"
|
|
group 0x10++0x03 "PWM2"
|
|
line.long 0x00 "PWMCR2,PWM 2 Control Register"
|
|
bitfld.long 0x00 06. " SD ,Pulse Width Modulator Shutdown Mode" "graceful,abrupt"
|
|
hexmask.long.byte 0x00 00.--05. 1. " PRESCALE ,The scaled counter clock frequency is PSCLK_PWM<x> / (PRESCALEx +1)"
|
|
group 0x14++0x03
|
|
line.long 0x00 "PWMDCR2,PWM 2 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle" "0,1"
|
|
hexmask.long.word 0x00 00.--09. 1. " DCYCLE ,Duty Cycle of PWM_OUT<x>"
|
|
group 0x18++0x03
|
|
line.long 0x00 "PWMPCR2,PWM 2 Period Register"
|
|
hexmask.long.word 0x00 00.--09. 1. " PV ,Period Value"
|
|
base ASD:0x40C00000
|
|
group 0x00++0x03 "PWM1"
|
|
line.long 0x00 "PWMCR1,PWM 1 Control Register"
|
|
bitfld.long 0x00 06. " SD ,Pulse Width Modulator Shutdown Mode" "graceful,abrupt"
|
|
hexmask.long.byte 0x00 00.--05. 1. " PRESCALE ,The scaled counter clock frequency is PSCLK_PWM<x> / (PRESCALEx +1)"
|
|
group 0x04++0x03
|
|
line.long 0x00 "PWMDCR1,PWM 1 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle" "0,1"
|
|
hexmask.long.word 0x00 00.--09. 1. " DCYCLE ,Duty Cycle of PWM_OUT<x>"
|
|
group 0x08++0x03
|
|
line.long 0x00 "PWMPCR1,PWM 1 Period Register"
|
|
hexmask.long.word 0x00 00.--09. 1. " PV ,Period Value"
|
|
group 0x10++0x03 "PWM3"
|
|
line.long 0x00 "PWMCR3,PWM 3 Control Register"
|
|
bitfld.long 0x00 06. " SD ,Pulse Width Modulator Shutdown Mode" "graceful,abrupt"
|
|
hexmask.long.byte 0x00 00.--05. 1. " PRESCALE ,The scaled counter clock frequency is PSCLK_PWM<x> / (PRESCALEx +1)"
|
|
group 0x14++0x03
|
|
line.long 0x00 "PWMDCR3,PWM 3 Duty Cycle Register"
|
|
bitfld.long 0x00 10. " FD ,Full Duty Cycle" "0,1"
|
|
hexmask.long.word 0x00 00.--09. 1. " DCYCLE ,Duty Cycle of PWM_OUT<x>"
|
|
group 0x18++0x03
|
|
line.long 0x00 "PWMPCR3,PWM 3 Period Register"
|
|
hexmask.long.word 0x00 00.--09. 1. " PV ,Period Value"
|
|
width 10.
|
|
tree.end
|
|
tree "Interrupt Controller"
|
|
width 7.
|
|
base ASD:0x40D00000
|
|
rgroup 0x00++0x03
|
|
line.long 0x00 "ICIP, Interrupt Controller IRQ Pending register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real-Time Clock Alarm" "noPend,pending"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "noPend,pending"
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "noPend,pending"
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "noPend,pending"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller " "noPend,pending"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1 " "noPend,pending"
|
|
bitfld.long 0x00 23. " MMC ,Multi Media Card" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FFUART ,FFUART" "noPend,pending"
|
|
bitfld.long 0x00 21. " BTUART ,BTUART" "noPend,pending"
|
|
bitfld.long 0x00 20. " STUART ,STUART" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICP ,Infrared Communications Port" "noPend,pending"
|
|
bitfld.long 0x00 18. " I2C ,I2C" "noPend,pending"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "noPend,pending"
|
|
bitfld.long 0x00 15. " USIM ,USIM " "noPend,pending"
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I2S ,I2S" "noPend,pending"
|
|
bitfld.long 0x00 12. " PMU ,Power Management Unit" "noPend,pending"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "noPend,pending"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "noPend,pending"
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "noPend,pending"
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "noPend,pending"
|
|
bitfld.long 0x00 5. " MEM_STK ,Memory Stick" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "noPend,pending"
|
|
bitfld.long 0x00 3. " USB1 ,USB Host 1" "noPend,pending"
|
|
bitfld.long 0x00 2. " USB2 ,USB Host 2" "noPend,pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSL ,MSL" "noPend,pending"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "noPend,pending"
|
|
group 0x04++0x03
|
|
line.long 0x00 "ICMR, Interrupt Controller Mask Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real-Time Clock Alarm" "masked,noMsk"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "masked,noMsk"
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "masked,noMsk"
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "masked,noMsk"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0 " "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "masked,noMsk"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "masked,noMsk"
|
|
bitfld.long 0x00 23. " MMC ,Multi Media Card" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FFUART ,FFUART" "masked,noMsk"
|
|
bitfld.long 0x00 21. " BTUART ,BTUART" "masked,noMsk"
|
|
bitfld.long 0x00 20. " STUART ,STUART" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICP ,Infrared Communications Port" "masked,noMsk"
|
|
bitfld.long 0x00 18. " I2C ,I2C" "masked,noMsk"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "masked,noMsk"
|
|
bitfld.long 0x00 15. " USIM ,USIM" "masked,noMsk"
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I2S ,I2S" "masked,noMsk"
|
|
bitfld.long 0x00 12. " PMU ,Power Management Unit" "masked,noMsk"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "masked,noMsk"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "masked,noMsk"
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "masked,noMsk"
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "masked,noMsk"
|
|
bitfld.long 0x00 5. " MEM_STK ,Memory Stick" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "masked,noMsk"
|
|
bitfld.long 0x00 3. " USB1 ,USB Host 1" "masked,noMsk"
|
|
bitfld.long 0x00 2. " USB2 ,USB Host 2" "masked,noMsk"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSL ,MSL" "masked,noMsk"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "masked,noMsk"
|
|
group 0x08++0x03
|
|
line.long 0x00 "ICLR,Interrupt Controller Level Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real-Time Clock Alarm" "IRQ,FIQ"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "IRQ,FIQ"
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "IRQ,FIQ"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "IRQ,FIQ"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "IRQ,FIQ"
|
|
bitfld.long 0x00 23. " MMC ,Multi Media Card" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FFUART ,FFUART" "IRQ,FIQ"
|
|
bitfld.long 0x00 21. " BTUART ,BTUART" "IRQ,FIQ"
|
|
bitfld.long 0x00 20. " STUART ,STUART" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICP ,Infrared Communications Port" "IRQ,FIQ"
|
|
bitfld.long 0x00 18. " I2C ,I2C" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "IRQ,FIQ"
|
|
bitfld.long 0x00 15. " USIM ,USIM" "IRQ,FIQ"
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I2S ,I2S" "IRQ,FIQ"
|
|
bitfld.long 0x00 12. " PMU ,Power Management Unit" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "IRQ,FIQ"
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11 " "IRQ,FIQ"
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " MEM_STK ,Memory Stick" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "IRQ,FIQ"
|
|
bitfld.long 0x00 3. " USB1 ,USB Host 1" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " USB2 ,USB Host 2" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSL ,MSL" "IRQ,FIQ"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "IRQ,FIQ"
|
|
rgroup 0x0C++0x03
|
|
line.long 0x00 "ICFP,Interrupt Controller FIQ Pending Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real-Time Clock Alarm" "noInt,int"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "noInt,int"
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "noInt,int"
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "noInt,int"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "noInt,int"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "noInt,int"
|
|
bitfld.long 0x00 23. " MMC ,MultiMediaCard" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FFUART ,FFUART" "noInt,int"
|
|
bitfld.long 0x00 21. " BTUART ,BTUART" "noInt,int"
|
|
bitfld.long 0x00 20. " STUART ,STUART" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICP ,Infrared Communications Port" "noInt,int"
|
|
bitfld.long 0x00 18. " I2C ,I2C" "noInt,int"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "noInt,int"
|
|
bitfld.long 0x00 15. " USIM ,USIM" "noInt,int"
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I2S ,I2S" "noInt,int"
|
|
bitfld.long 0x00 12. " PMU ,Power Management Unit" "noInt,int"
|
|
bitfld.long 0x00 11. " USBC ,USB Client" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "noInt,int"
|
|
bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "noInt,int"
|
|
bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "noInt,int"
|
|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "noInt,int"
|
|
bitfld.long 0x00 5. " MEM_STK ,Memory Stick" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 4. " KEYPAD ,Keypad" "noInt,int"
|
|
bitfld.long 0x00 3. " USB1 ,USB Host 1" "noInt,int"
|
|
bitfld.long 0x00 2. " USB2 ,USB Host 2" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSL ,MSL" "noInt,int"
|
|
bitfld.long 0x00 0. " SSP3 ,SSP 3" "noInt,int"
|
|
rgroup 0x10++0x03
|
|
line.long 0x00 "ICPR, Interrupt Controller Pending Register"
|
|
bitfld.long 0x00 31. " RTC_AL ,Real-Time Clock Alarm" "noInt,int"
|
|
bitfld.long 0x00 30. " RTC_HZ ,One Hz Clock" "noInt,int"
|
|
bitfld.long 0x00 29. " OST_3 ,OS Timer 3" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OST_2 ,OS Timer 2" "noInt,int"
|
|
bitfld.long 0x00 27. " OST_1 ,OS Timer 1" "noInt,int"
|
|
bitfld.long 0x00 26. " OST_0 ,OS Timer 0" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMAC ,DMA Controller" "noInt,int"
|
|
bitfld.long 0x00 24. " SSP1 ,SSP 1" "noInt,int"
|
|
bitfld.long 0x00 23. " MMC ,Multi Media Card" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FFUART ,FFUART" "noInt,int"
|
|
bitfld.long 0x00 21. " BTUART ,BTUART" "noInt,int"
|
|
bitfld.long 0x00 20. " STUART ,STUART" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICP ,Infrared Communications Port" "noInt,int"
|
|
bitfld.long 0x00 18. " I2C ,I2C" "noInt,int"
|
|
bitfld.long 0x00 17. " LCD ,LCD" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSP2 ,SSP 2" "noInt,int"
|
|
bitfld.long 0x00 15. " USIM ,USIM" "noInt,int"
|
|
bitfld.long 0x00 14. " AC97 ,AC97" "noInt,int"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I2S ,I2S" "noInt,int"
|
|
bitfld.long 0x00 12. " PMU ,Power Management Unit" "noInt,int"
|
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bitfld.long 0x00 11. " USBC ,USB Client" "noInt,int"
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textline " "
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bitfld.long 0x00 10. " GPIO_x ,GPIO_x" "noInt,int"
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bitfld.long 0x00 9. " GPIO_1 ,GPIO_1" "noInt,int"
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bitfld.long 0x00 8. " GPIO_0 ,GPIO_0" "noInt,int"
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textline " "
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|
bitfld.long 0x00 7. " OST_4_11 ,OS Timer 4-11" "noInt,int"
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|
bitfld.long 0x00 6. " PWR_I2C ,Power I2C" "noInt,int"
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|
bitfld.long 0x00 5. " MEM_STK ,Memory Stick" "noInt,int"
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textline " "
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bitfld.long 0x00 4. " KEYPAD ,Keypad" "noInt,int"
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bitfld.long 0x00 3. " USB1 ,USB Host 1" "noInt,int"
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bitfld.long 0x00 2. " USB2 ,USB Host 2" "noInt,int"
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textline " "
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|
bitfld.long 0x00 1. " MSL ,MSL" "noInt,int"
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bitfld.long 0x00 0. " SSP3 ,SSP 3" "noInt,int"
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group 0x14++0x03
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|
line.long 0x00 "ICCR,Interrupt Controller Control Register"
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|
bitfld.long 0x00 00. " DIM ,Disable Idle Mask" "no,yes"
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rgroup 0x18++0x03
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line.long 0x00 "ICHP,Interrupt Controller Highest Priority Register"
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bitfld.long 0x00 31. " VAL_IRQ ,Valid IRQ" "no,yes"
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hexmask.long.byte 0x00 16.--20. 1. " IRQ ,IRQ Highest Priority Field"
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bitfld.long 0x00 15. " VAL_FIQ ,Valid FIQ" "no,yes"
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textline " "
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hexmask.long.byte 0x00 00.--04. 1. " FIQ ,FIQ Highest Priority Field"
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|
group 0x1C++0x7f
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line.long 0x00 "IPR0,Interrupt Priority Register for Prioritie 0"
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bitfld.long 0x00 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x00 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x04 "IPR1,Interrupt Priority Register for Prioritie 1"
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|
bitfld.long 0x04 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x04 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x08 "IPR2,Interrupt Priority Register for Prioritie 2"
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|
bitfld.long 0x08 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x08 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x0c "IPR3,Interrupt Priority Register for Prioritie 3"
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bitfld.long 0x0C 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x0C 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x10 "IPR4,Interrupt Priority Register for Prioritie 4"
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bitfld.long 0x10 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x10 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x14 "IPR5,Interrupt Priority Register for Prioritie 5"
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|
bitfld.long 0x14 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x14 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x18 "IPR6,Interrupt Priority Register for Prioritie 6"
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|
bitfld.long 0x18 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x18 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x1c "IPR7,Interrupt Priority Register for Prioritie 7"
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|
bitfld.long 0x1c 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x1c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x20 "IPR8,Interrupt Priority Register for Prioritie 8"
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|
bitfld.long 0x20 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x20 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x24 "IPR9,Interrupt Priority Register for Prioritie 9"
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|
bitfld.long 0x24 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x24 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x28 "IPR10,Interrupt Priority Register for Prioritie 10"
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|
bitfld.long 0x28 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x28 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x2c "IPR11,Interrupt Priority Register for Prioritie 11"
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|
bitfld.long 0x2c 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x2c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x30 "IPR12,Interrupt Priority Register for Prioritie 12"
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|
bitfld.long 0x30 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x30 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x34 "IPR13,Interrupt Priority Register for Prioritie 13"
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|
bitfld.long 0x34 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x34 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x38 "IPR14,Interrupt Priority Register for Prioritie 14"
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|
bitfld.long 0x38 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x38 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x3c "IPR15,Interrupt Priority Register for Prioritie 15"
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|
bitfld.long 0x3c 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x3c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x40 "IPR16,Interrupt Priority Register for Prioritie 16"
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bitfld.long 0x40 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x40 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x44 "IPR17,Interrupt Priority Register for Prioritie 17"
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bitfld.long 0x44 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x44 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x48 "IPR18,Interrupt Priority Register for Prioritie 18"
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bitfld.long 0x48 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x48 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x4c "IPR19,Interrupt Priority Register for Prioritie 19"
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bitfld.long 0x4c 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x4c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x50 "IPR20,Interrupt Priority Register for Prioritie 20"
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bitfld.long 0x50 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x50 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x54 "IPR21,Interrupt Priority Register for Prioritie 21"
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bitfld.long 0x54 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x54 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x58 "IPR22,Interrupt Priority Register for Prioritie 22"
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bitfld.long 0x58 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x58 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x5c "IPR23,Interrupt Priority Register for Prioritie 23"
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bitfld.long 0x5c 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x5c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x60 "IPR24,Interrupt Priority Register for Prioritie 24"
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bitfld.long 0x60 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x60 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x64 "IPR25,Interrupt Priority Register for Prioritie 25"
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bitfld.long 0x64 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x64 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x68 "IPR26,Interrupt Priority Register for Prioritie 26"
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bitfld.long 0x68 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x68 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x6c "IPR27,Interrupt Priority Register for Prioritie 27"
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bitfld.long 0x6c 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x6c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x70 "IPR28,Interrupt Priority Register for Prioritie 28"
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bitfld.long 0x70 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x70 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x74 "IPR29,Interrupt Priority Register for Prioritie 29"
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|
bitfld.long 0x74 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x74 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x78 "IPR30,Interrupt Priority Register for Prioritie 30"
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|
bitfld.long 0x78 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x78 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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line.long 0x7c "IPR31,Interrupt Priority Register for Prioritie 31"
|
|
bitfld.long 0x7c 31. " VAL ,Valid Bit" "no,yes"
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bitfld.long 0x7c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
rgroup 0x9C++0x03
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|
line.long 0x00 "ICIP2,Interrupt Controller IRQ Pending Register 2"
|
|
bitfld.long 0x00 01. " CIF ,Quick Capture Interface" "no,yes"
|
|
bitfld.long 0x00 0. " TPM ,Trusted Platform Module" "no,yes"
|
|
group 0xA0++0x03
|
|
line.long 0x00 "ICMR2,Interrupt Controller Mask Register 2"
|
|
bitfld.long 0x00 1. " CIF ,Quick Capture Interface" "msked,noMsk"
|
|
bitfld.long 0x00 0. " TPM ,Trusted Platform Module" "msked,noMsk"
|
|
group 0xA4++0x03
|
|
line.long 0x00 "ICLR2,Interrupt Controller Level Register 2"
|
|
bitfld.long 0x00 1. " CIF ,Quick Capture Interface" "IRQ,FIQ"
|
|
bitfld.long 0x00 0. " TPM ,Trusted Platform Module" "IRQ,FIQ"
|
|
rgroup 0xA8++0x03
|
|
line.long 0x00 "ICFP2,Interrupt Controller FIQ Pending Register 2"
|
|
bitfld.long 0x00 1. " CIF ,Quick Capture Interface" "noInt,Int"
|
|
bitfld.long 0x00 0. " TPM ,Trusted Platform Module" "noInt,Int"
|
|
rgroup 0xAC++0x03
|
|
line.long 0x00 "ICPR2,Interrupt Controller Pending Register 2"
|
|
bitfld.long 0x00 1. " CIF ,Quick Capture Interface" "noOcr,Ocr"
|
|
bitfld.long 0x00 0. " TPM ,Trusted Platform Module" "noOcr,Ocr"
|
|
group 0xB0++0x1f
|
|
line.long 0x00 "IPR32,Interrupt Priority Register for Prioritie 32"
|
|
bitfld.long 0x00 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x00 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
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|
line.long 0x04 "IPR33,Interrupt Priority Register for Prioritie 33"
|
|
bitfld.long 0x04 31. " VAL ,Valid Bit" "no,yes"
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|
bitfld.long 0x04 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
line.long 0x08 "IPR34,Interrupt Priority Register for Prioritie 34"
|
|
bitfld.long 0x08 31. " VAL ,Valid Bit" "no,yes"
|
|
bitfld.long 0x08 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
line.long 0x0c "IPR35,Interrupt Priority Register for Prioritie 35"
|
|
bitfld.long 0x0c 31. " VAL ,Valid Bit" "no,yes"
|
|
bitfld.long 0x0c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
line.long 0x10 "IPR36,Interrupt Priority Register for Prioritie 36"
|
|
bitfld.long 0x10 31. " VAL ,Valid Bit" "no,yes"
|
|
bitfld.long 0x10 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
line.long 0x14 "IPR37,Interrupt Priority Register for Prioritie 37"
|
|
bitfld.long 0x14 31. " VAL ,Valid Bit" "no,yes"
|
|
bitfld.long 0x14 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
line.long 0x18 "IPR38,Interrupt Priority Register for Prioritie 38"
|
|
bitfld.long 0x18 31. " VAL ,Valid Bit" "no,yes"
|
|
bitfld.long 0x18 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
line.long 0x1c "IPR39,Interrupt Priority Register for Prioritie 39"
|
|
bitfld.long 0x1c 31. " VAL ,Valid Bit" "no,yes"
|
|
bitfld.long 0x1c 00.--05. " PID ,Peripheral ID for this Priority IPR[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
tree.end
|
|
tree "General-Purpose I/O Controller"
|
|
width 9.
|
|
base ASD:0x40E00000
|
|
rgroup 0x000++0x0b
|
|
line.long 0x00 "GPLR0,GPIO Pin-Level Register GPIO<31:0> "
|
|
bitfld.long 0x00 31. " PL31 ,GP31 Pin State" "L,H"
|
|
bitfld.long 0x00 30. " PL30 ,GP30 Pin State" "L,H"
|
|
bitfld.long 0x00 29. " PL29 ,GP29 Pin State" "L,H"
|
|
bitfld.long 0x00 28. " PL28 ,GP28 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PL27 ,GP27 Pin State" "L,H"
|
|
bitfld.long 0x00 26. " PL26 ,GP26 Pin State" "L,H"
|
|
bitfld.long 0x00 25. " PL25 ,GP25 Pin State" "L,H"
|
|
bitfld.long 0x00 24. " PL24 ,GP24 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PL23 ,GP23 Pin State" "L,H"
|
|
bitfld.long 0x00 22. " PL22 ,GP22 Pin State" "L,H"
|
|
bitfld.long 0x00 21. " PL21 ,GP21 Pin State" "L,H"
|
|
bitfld.long 0x00 20. " PL20 ,GP20 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PL19 ,GP19 Pin State" "L,H"
|
|
bitfld.long 0x00 18. " PL18 ,GP18 Pin State" "L,H"
|
|
bitfld.long 0x00 17. " PL17 ,GP17 Pin State" "L,H"
|
|
bitfld.long 0x00 16. " PL16 ,GP16 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PL15 ,GP15 Pin State" "L,H"
|
|
bitfld.long 0x00 14. " PL14 ,GP14 Pin State" "L,H"
|
|
bitfld.long 0x00 13. " PL13 ,GP13 Pin State" "L,H"
|
|
bitfld.long 0x00 12. " PL12 ,GP12 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PL11 ,GP11 Pin State" "L,H"
|
|
bitfld.long 0x00 10. " PL10 ,GP10 Pin State" "L,H"
|
|
bitfld.long 0x00 9. " PL9 ,GP9 Pin State" "L,H"
|
|
bitfld.long 0x00 4. " PL4 ,GP4 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PL3 ,GP3 Pin State" "L,H"
|
|
bitfld.long 0x00 1. " PL1 ,GP1 Pin State" "L,H"
|
|
bitfld.long 0x00 0. " PL0 ,GP0 Pin State" "L,H"
|
|
line.long 0x04 "GPLR1,GPIO Pin-Level Register GPIO<63:32>"
|
|
bitfld.long 0x04 31. " PL63 ,GP63 Pin State" "L,H"
|
|
bitfld.long 0x04 30. " PL62 ,GP62 Pin State" "L,H"
|
|
bitfld.long 0x04 29. " PL61 ,GP61 Pin State" "L,H"
|
|
bitfld.long 0x04 28. " PL60 ,GP60 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PL59 ,GP59 Pin State" "L,H"
|
|
bitfld.long 0x04 26. " PL58 ,GP58 Pin State" "L,H"
|
|
bitfld.long 0x04 25. " PL57 ,GP57 Pin State" "L,H"
|
|
bitfld.long 0x04 24. " PL56 ,GP56 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PL55 ,GP55 Pin State" "L,H"
|
|
bitfld.long 0x04 22. " PL54 ,GP54 Pin State" "L,H"
|
|
bitfld.long 0x04 21. " PL53 ,GP53 Pin State" "L,H"
|
|
bitfld.long 0x04 20. " PL52 ,GP52 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PL51 ,GP51 Pin State" "L,H"
|
|
bitfld.long 0x04 18. " PL50 ,GP50 Pin State" "L,H"
|
|
bitfld.long 0x04 17. " PL49 ,GP49 Pin State" "L,H"
|
|
bitfld.long 0x04 16. " PL48 ,GP48 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PL47 ,GP47 Pin State" "L,H"
|
|
bitfld.long 0x04 14. " PL46 ,GP46 Pin State" "L,H"
|
|
bitfld.long 0x04 13. " PL45 ,GP45 Pin State" "L,H"
|
|
bitfld.long 0x04 12. " PL44 ,GP44 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PL43 ,GP43 Pin State" "L,H"
|
|
bitfld.long 0x04 10. " PL42 ,GP42 Pin State" "L,H"
|
|
bitfld.long 0x04 9. " PL41 ,GP41 Pin State" "L,H"
|
|
bitfld.long 0x04 8. " PL40 ,GP40 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PL39 ,GP39 Pin State" "L,H"
|
|
bitfld.long 0x04 6. " PL38 ,GP38 Pin State" "L,H"
|
|
bitfld.long 0x04 5. " PL37 ,GP37 Pin State" "L,H"
|
|
bitfld.long 0x04 4. " PL36 ,GP36 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PL35 ,GP35 Pin State" "L,H"
|
|
bitfld.long 0x04 2. " PL34 ,GP34 Pin State" "L,H"
|
|
bitfld.long 0x04 1. " PL33 ,GP33 Pin State" "L,H"
|
|
bitfld.long 0x04 0. " PL32 ,GP32 Pin State" "L,H"
|
|
line.long 0x08 "GPLR2,GPIO Pin-Level Register GPIO<95:64>"
|
|
bitfld.long 0x08 31. " PL95 ,GP95 Pin State" "L,H"
|
|
bitfld.long 0x08 30. " PL94 ,GP94 Pin State" "L,H"
|
|
bitfld.long 0x08 29. " PL93 ,GP93 Pin State" "L,H"
|
|
bitfld.long 0x08 28. " PL92 ,GP92 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x08 27. " PL91 ,GP91 Pin State" "L,H"
|
|
bitfld.long 0x08 26. " PL90 ,GP90 Pin State" "L,H"
|
|
bitfld.long 0x08 25. " PL89 ,GP89 Pin State" "L,H"
|
|
bitfld.long 0x08 24. " PL88 ,GP88 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x08 23. " PL87 ,GP87 Pin State" "L,H"
|
|
bitfld.long 0x08 22. " PL86 ,GP86 Pin State" "L,H"
|
|
bitfld.long 0x08 21. " PL85 ,GP85 Pin State" "L,H"
|
|
bitfld.long 0x08 20. " PL84 ,GP84 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x08 19. " PL83 ,GP83 Pin State" "L,H"
|
|
bitfld.long 0x08 18. " PL82 ,GP82 Pin State" "L,H"
|
|
bitfld.long 0x08 17. " PL81 ,GP81 Pin State" "L,H"
|
|
bitfld.long 0x08 16. " PL80 ,GP80 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x08 15. " PL79 ,GP79 Pin State" "L,H"
|
|
bitfld.long 0x08 14. " PL78 ,GP78 Pin State" "L,H"
|
|
bitfld.long 0x08 13. " PL77 ,GP77 Pin State" "L,H"
|
|
bitfld.long 0x08 12. " PL76 ,GP76 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x08 11. " PL75 ,GP75 Pin State" "L,H"
|
|
bitfld.long 0x08 10. " PL74 ,GP74 Pin State" "L,H"
|
|
bitfld.long 0x08 9. " PL73 ,GP73 Pin State" "L,H"
|
|
bitfld.long 0x08 8. " PL72 ,GP72 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x08 7. " PL71 ,GP71 Pin State" "L,H"
|
|
bitfld.long 0x08 6. " PL70 ,GP70 Pin State" "L,H"
|
|
bitfld.long 0x08 5. " PL69 ,GP69 Pin State" "L,H"
|
|
bitfld.long 0x08 4. " PL68 ,GP68 Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PL67 ,GP67 Pin State" "L,H"
|
|
bitfld.long 0x08 2. " PL66 ,GP66 Pin State" "L,H"
|
|
bitfld.long 0x08 1. " PL65 ,GP65 Pin State" "L,H"
|
|
bitfld.long 0x08 0. " PL64 ,GP64 Pin State" "L,H"
|
|
group 0x00C++0x0b
|
|
line.long 0x00 "GPDR0,GPIO Pin Direction register GPIO<31:0>"
|
|
bitfld.long 0x00 31. " PD31 ,GP31 Pin Direction" "I,O"
|
|
bitfld.long 0x00 30. " PD30 ,GP30 Pin Direction" "I,O"
|
|
bitfld.long 0x00 29. " PD29 ,GP29 Pin Direction" "I,O"
|
|
bitfld.long 0x00 28. " PD28 ,GP28 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PD27 ,GP27 Pin Direction" "I,O"
|
|
bitfld.long 0x00 26. " PD26 ,GP26 Pin Direction" "I,O"
|
|
bitfld.long 0x00 25. " PD25 ,GP25 Pin Direction" "I,O"
|
|
bitfld.long 0x00 24. " PD24 ,GP24 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PD23 ,GP23 Pin Direction" "I,O"
|
|
bitfld.long 0x00 22. " PD22 ,GP22 Pin Direction" "I,O"
|
|
bitfld.long 0x00 21. " PD21 ,GP21 Pin Direction" "I,O"
|
|
bitfld.long 0x00 20. " PD20 ,GP20 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PD19 ,GP19 Pin Direction" "I,O"
|
|
bitfld.long 0x00 18. " PD18 ,GP18 Pin Direction" "I,O"
|
|
bitfld.long 0x00 17. " PD17 ,GP17 Pin Direction" "I,O"
|
|
bitfld.long 0x00 16. " PD16 ,GP16 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PD15 ,GP15 Pin Direction" "I,O"
|
|
bitfld.long 0x00 14. " PD14 ,GP14 Pin Direction" "I,O"
|
|
bitfld.long 0x00 13. " PD13 ,GP13 Pin Direction" "I,O"
|
|
bitfld.long 0x00 12. " PD12 ,GP12 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PD11 ,GP11 Pin Direction" "I,O"
|
|
bitfld.long 0x00 10. " PD10 ,GP10 Pin Direction" "I,O"
|
|
bitfld.long 0x00 9. " PD9 ,GP9 Pin Direction" "I,O"
|
|
bitfld.long 0x00 4. " PD4 ,GP4 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PD3 ,GP3 Pin Direction" "I,O"
|
|
bitfld.long 0x00 1. " PD1 ,GP1 Pin Direction" "I,O"
|
|
bitfld.long 0x00 0. " PD0 ,GP0 Pin Direction" "I,O"
|
|
line.long 0x04 "GPDR1,GPIO Pin Direction Register GPIO<63:32>"
|
|
bitfld.long 0x04 31. " PD63 ,GP63 Pin Direction" "I,O"
|
|
bitfld.long 0x04 30. " PD62 ,GP62 Pin Direction" "I,O"
|
|
bitfld.long 0x04 29. " PD61 ,GP61 Pin Direction" "I,O"
|
|
bitfld.long 0x04 28. " PD60 ,GP60 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PD59 ,GP59 Pin Direction" "I,O"
|
|
bitfld.long 0x04 26. " PD58 ,GP58 Pin Direction" "I,O"
|
|
bitfld.long 0x04 25. " PD57 ,GP57 Pin Direction" "I,O"
|
|
bitfld.long 0x04 24. " PD56 ,GP56 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PD55 ,GP55 Pin Direction" "I,O"
|
|
bitfld.long 0x04 22. " PD54 ,GP54 Pin Direction" "I,O"
|
|
bitfld.long 0x04 21. " PD53 ,GP53 Pin Direction" "I,O"
|
|
bitfld.long 0x04 20. " PD52 ,GP52 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PD51 ,GP51 Pin Direction" "I,O"
|
|
bitfld.long 0x04 18. " PD50 ,GP50 Pin Direction" "I,O"
|
|
bitfld.long 0x04 17. " PD49 ,GP49 Pin Direction" "I,O"
|
|
bitfld.long 0x04 16. " PD48 ,GP48 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PD47 ,GP47 Pin Direction" "I,O"
|
|
bitfld.long 0x04 14. " PD46 ,GP46 Pin Direction" "I,O"
|
|
bitfld.long 0x04 13. " PD45 ,GP45 Pin Direction" "I,O"
|
|
bitfld.long 0x04 12. " PD44 ,GP44 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PD43 ,GP43 Pin Direction" "I,O"
|
|
bitfld.long 0x04 10. " PD42 ,GP42 Pin Direction" "I,O"
|
|
bitfld.long 0x04 9. " PD41 ,GP41 Pin Direction" "I,O"
|
|
bitfld.long 0x04 8. " PD40 ,GP40 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PD39 ,GP39 Pin Direction" "I,O"
|
|
bitfld.long 0x04 6. " PD38 ,GP38 Pin Direction" "I,O"
|
|
bitfld.long 0x04 5. " PD37 ,GP37 Pin Direction" "I,O"
|
|
bitfld.long 0x04 4. " PD36 ,GP36 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PD35 ,GP35 Pin Direction" "I,O"
|
|
bitfld.long 0x04 2. " PD34 ,GP34 Pin Direction" "I,O"
|
|
bitfld.long 0x04 1. " PD33 ,GP33 Pin Direction" "I,O"
|
|
bitfld.long 0x04 0. " PD32 ,GP32 Pin Direction" "I,O"
|
|
line.long 0x08 "GPDR2,GPIO Pin Direction Register GPIO<95:64>"
|
|
bitfld.long 0x08 31. " PD95 ,GP95 Pin Direction" "I,O"
|
|
bitfld.long 0x08 30. " PD94 ,GP94 Pin Direction" "I,O"
|
|
bitfld.long 0x08 29. " PD93 ,GP93 Pin Direction" "I,O"
|
|
bitfld.long 0x08 28. " PD92 ,GP92 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x08 27. " PD91 ,GP91 Pin Direction" "I,O"
|
|
bitfld.long 0x08 26. " PD90 ,GP90 Pin Direction" "I,O"
|
|
bitfld.long 0x08 25. " PD89 ,GP89 Pin Direction" "I,O"
|
|
bitfld.long 0x08 24. " PD88 ,GP88 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x08 23. " PD87 ,GP87 Pin Direction" "I,O"
|
|
bitfld.long 0x08 22. " PD86 ,GP86 Pin Direction" "I,O"
|
|
bitfld.long 0x08 21. " PD85 ,GP85 Pin Direction" "I,O"
|
|
bitfld.long 0x08 20. " PD84 ,GP84 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x08 19. " PD83 ,GP83 Pin Direction" "I,O"
|
|
bitfld.long 0x08 18. " PD82 ,GP82 Pin Direction" "I,O"
|
|
bitfld.long 0x08 17. " PD81 ,GP81 Pin Direction" "I,O"
|
|
bitfld.long 0x08 16. " PD80 ,GP80 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x08 15. " PD79 ,GP79 Pin Direction" "I,O"
|
|
bitfld.long 0x08 14. " PD78 ,GP78 Pin Direction" "I,O"
|
|
bitfld.long 0x08 13. " PD77 ,GP77 Pin Direction" "I,O"
|
|
bitfld.long 0x08 12. " PD76 ,GP76 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x08 11. " PD75 ,GP75 Pin Direction" "I,O"
|
|
bitfld.long 0x08 10. " PD74 ,GP74 Pin Direction" "I,O"
|
|
bitfld.long 0x08 9. " PD73 ,GP73 Pin Direction" "I,O"
|
|
bitfld.long 0x08 8. " PD72 ,GP72 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x08 7. " PD71 ,GP71 Pin Direction" "I,O"
|
|
bitfld.long 0x08 6. " PD70 ,GP70 Pin Direction" "I,O"
|
|
bitfld.long 0x08 5. " PD69 ,GP69 Pin Direction" "I,O"
|
|
bitfld.long 0x08 4. " PD68 ,GP68 Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PD67 ,GP67 Pin Direction" "I,O"
|
|
bitfld.long 0x08 2. " PD66 ,GP66 Pin Direction" "I,O"
|
|
bitfld.long 0x08 1. " PD65 ,GP65 Pin Direction" "I,O"
|
|
bitfld.long 0x08 0. " PD64 ,GP64 Pin Direction" "I,O"
|
|
wgroup 0x018--0x23
|
|
line.long 0x00 "GPSR0,GPIO Pin Output Set Register GPIO<31:0> "
|
|
bitfld.long 0x00 31. " PS31 ,GP31 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 30. " PS30 ,GP30 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 29. " PS29 ,GP29 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 28. " PS28 ,GP28 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PS27 ,GP27 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 26. " PS26 ,GP26 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 25. " PS25 ,GP25 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 24. " PS24 ,GP24 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PS23 ,GP23 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 22. " PS22 ,GP22 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 21. " PS21 ,GP21 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 20. " PS20 ,GP20 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PS19 ,GP19 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 18. " PS18 ,GP18 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 17. " PS17 ,GP17 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 16. " PS16 ,GP16 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PS15 ,GP15 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 14. " PS14 ,GP14 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 13. " PS13 ,GP13 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 12. " PS12 ,GP12 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PS11 ,GP11 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 10. " PS10 ,GP10 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 9. " PS9 ,GP9 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 4. " PS4 ,GP4 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PS3 ,GP3 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 1. " PS1 ,GP1 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 0. " PS0 ,GP0 Output Pin Set" "-,H"
|
|
line.long 0x04 "GPSR1,GPIO Pin Output Set Register GPIO<63:32>"
|
|
bitfld.long 0x04 31. " PS63 ,GP63 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 30. " PS62 ,GP62 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 29. " PS61 ,GP61 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 28. " PS60 ,GP60 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PS59 ,GP59 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 26. " PS58 ,GP58 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 25. " PS57 ,GP57 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 24. " PS56 ,GP56 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PS55 ,GP55 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 22. " PS54 ,GP54 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 21. " PS53 ,GP53 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 20. " PS52 ,GP52 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PS51 ,GP51 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 18. " PS50 ,GP50 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 17. " PS49 ,GP49 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 16. " PS48 ,GP48 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PS47 ,GP47 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 14. " PS46 ,GP46 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 13. " PS45 ,GP45 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 12. " PS44 ,GP44 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PS43 ,GP43 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 10. " PS42 ,GP42 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 9. " PS41 ,GP41 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 8. " PS40 ,GP40 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PS39 ,GP39 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 6. " PS38 ,GP38 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 5. " PS37 ,GP37 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 4. " PS36 ,GP36 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PS35 ,GP35 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 2. " PS34 ,GP34 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 1. " PS33 ,GP33 Output Pin Set" "-,H"
|
|
bitfld.long 0x04 0. " PS32 ,GP32 Output Pin Set" "-,H"
|
|
line.long 0x08 "GPSR2,GPIO Pin Output Set register GPIO<95:64>"
|
|
bitfld.long 0x08 31. " PS95 ,GP95 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 30. " PS94 ,GP94 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 29. " PS93 ,GP93 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 28. " PS92 ,GP92 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x08 27. " PS91 ,GP91 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 26. " PS90 ,GP90 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 25. " PS89 ,GP89 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 24. " PS88 ,GP88 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x08 23. " PS87 ,GP87 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 22. " PS86 ,GP86 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 21. " PS85 ,GP85 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 20. " PS84 ,GP84 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x08 19. " PS83 ,GP83 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 18. " PS82 ,GP82 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 17. " PS81 ,GP81 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 16. " PS80 ,GP80 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x08 15. " PS79 ,GP79 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 14. " PS78 ,GP78 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 13. " PS77 ,GP77 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 12. " PS76 ,GP76 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x08 11. " PS75 ,GP75 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 10. " PS74 ,GP74 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 9. " PS73 ,GP73 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 8. " PS72 ,GP72 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x08 7. " PS71 ,GP71 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 6. " PS70 ,GP70 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 5. " PS69 ,GP69 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 4. " PS68 ,GP68 Output Pin Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PS67 ,GP67 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 2. " PS66 ,GP66 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 1. " PS65 ,GP65 Output Pin Set" "-,H"
|
|
bitfld.long 0x08 0. " PS64 ,GP64 Output Pin Set" "-,H"
|
|
wgroup 0x024--0x2f
|
|
line.long 0x00 "GPCR0,GPIO Pin Output Clear Register GPIO<31:0>"
|
|
bitfld.long 0x00 31. " PC31 ,GP31 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 30. " PC30 ,GP30 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 29. " PC29 ,GP29 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 28. " PC28 ,GP28 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PC27 ,GP27 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 26. " PC26 ,GP26 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 25. " PC25 ,GP25 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 24. " PC24 ,GP24 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PC23 ,GP23 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 22. " PC22 ,GP22 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 21. " PC21 ,GP21 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 20. " PC20 ,GP20 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PC19 ,GP19 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 18. " PC18 ,GP18 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 17. " PC17 ,GP17 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 16. " PC16 ,GP16 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PC15 ,GP15 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 14. " PC14 ,GP14 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 13. " PC13 ,GP13 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 12. " PC12 ,GP12 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PC11 ,GP11 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 10. " PC10 ,GP10 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 9. " PC9 ,GP9 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 4. " PC4 ,GP4 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PC3 ,GP3 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 1. " PC1 ,GP1 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 0. " PC0 ,GP0 Output Pin Clear" "-,L"
|
|
line.long 0x04 "GPCR1,GPIO Pin Output Clear Register GPIO<63:32>"
|
|
bitfld.long 0x04 31. " PC63 ,GP63 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 30. " PC62 ,GP62 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 29. " PC61 ,GP61 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 28. " PC60 ,GP60 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PC59 ,GP59 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 26. " PC58 ,GP58 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 25. " PC57 ,GP57 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 24. " PC56 ,GP56 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PC55 ,GP55 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 22. " PC54 ,GP54 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 21. " PC53 ,GP53 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 20. " PC52 ,GP52 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PC51 ,GP51 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 18. " PC50 ,GP50 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 17. " PC49 ,GP49 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 16. " PC48 ,GP48 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PC47 ,GP47 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 14. " PC46 ,GP46 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 13. " PC45 ,GP45 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 12. " PC44 ,GP44 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PC43 ,GP43 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 10. " PC42 ,GP42 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 9. " PC41 ,GP41 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 8. " PC40 ,GP40 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PC39 ,GP39 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 6. " PC38 ,GP38 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 5. " PC37 ,GP37 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 4. " PC36 ,GP36 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PC35 ,GP35 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 2. " PC34 ,GP34 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 1. " PC33 ,GP33 Output Pin Clear" "-,L"
|
|
bitfld.long 0x04 0. " PC32 ,GP32 Output Pin Clear" "-,L"
|
|
line.long 0x08 "GPCR2,GPIO pin Output Clear Register GPIO <95:64>"
|
|
bitfld.long 0x08 31. " PC95 ,GP95 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 30. " PC94 ,GP94 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 29. " PC93 ,GP93 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 28. " PC92 ,GP92 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x08 27. " PC91 ,GP91 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 26. " PC90 ,GP90 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 25. " PC89 ,GP89 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 24. " PC88 ,GP88 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x08 23. " PC87 ,GP87 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 22. " PC86 ,GP86 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 21. " PC85 ,GP85 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 20. " PC84 ,GP84 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x08 19. " PC83 ,GP83 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 18. " PC82 ,GP82 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 17. " PC81 ,GP81 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 16. " PC80 ,GP80 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x08 15. " PC79 ,GP79 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 14. " PC78 ,GP78 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 13. " PC77 ,GP77 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 12. " PC76 ,GP76 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x08 11. " PC75 ,GP75 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 10. " PC74 ,GP74 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 9. " PC73 ,GP73 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 8. " PC72 ,GP72 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x08 7. " PC71 ,GP71 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 6. " PC70 ,GP70 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 5. " PC69 ,GP69 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 4. " PC68 ,GP68 Output Pin Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PC67 ,GP67 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 2. " PC66 ,GP66 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 1. " PC65 ,GP65 Output Pin Clear" "-,L"
|
|
bitfld.long 0x08 0. " PC64 ,GP64 Output Pin Clear" "-,L"
|
|
group 0x030++0x0b
|
|
line.long 0x00 "GRER0,GPIO Rising-Edge Detect Enable Register GPIO<31:0>"
|
|
bitfld.long 0x00 31. " RE31 ,GP31 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 30. " RE30 ,GP30 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 29. " RE29 ,GP29 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 28. " RE28 ,GP28 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RE27 ,GP27 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 26. " RE26 ,GP26 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 25. " RE25 ,GP25 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 24. " RE24 ,GP24 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RE23 ,GP23 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 22. " RE22 ,GP22 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 21. " RE21 ,GP21 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 20. " RE20 ,GP20 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RE19 ,GP19 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 18. " RE18 ,GP18 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 17. " RE17 ,GP17 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 16. " RE16 ,GP16 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RE15 ,GP15 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 14. " RE14 ,GP14 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 13. " RE13 ,GP13 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 12. " RE12 ,GP12 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RE11 ,GP11 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 10. " RE10 ,GP10 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 9. " RE9 ,GP9 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 4. " RE4 ,GP4 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RE3 ,GP3 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 1. " RE1 ,GP1 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 0. " RE0 ,GP0 Rising Edge Detect" "dis,ena"
|
|
line.long 0x04 "GRER1,GPIO Rising-Edge Detect Register GPIO<63:32>"
|
|
bitfld.long 0x04 31. " RE63 ,GP63 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 30. " RE62 ,GP62 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 29. " RE61 ,GP61 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 28. " RE60 ,GP60 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RE59 ,GP59 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 26. " RE58 ,GP58 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 25. " RE57 ,GP57 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 24. " RE56 ,GP56 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 23. " RE55 ,GP55 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 22. " RE54 ,GP54 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 21. " RE53 ,GP53 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 20. " RE52 ,GP52 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RE51 ,GP51 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 18. " RE50 ,GP50 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 17. " RE49 ,GP49 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 16. " RE48 ,GP48 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 15. " RE47 ,GP47 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 14. " RE46 ,GP46 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 13. " RE45 ,GP45 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 12. " RE44 ,GP44 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 11. " RE43 ,GP43 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 10. " RE42 ,GP42 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 9. " RE41 ,GP41 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 8. " RE40 ,GP40 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RE39 ,GP39 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 6. " RE38 ,GP38 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 5. " RE37 ,GP37 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 4. " RE36 ,GP36 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RE35 ,GP35 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 2. " RE34 ,GP34 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 1. " RE33 ,GP33 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 0. " RE32 ,GP32 Rising Edge Detect" "dis,ena"
|
|
line.long 0x08 "GRER2,GPIO Rising-Edge Detect Enable Register GPIO<95:64>"
|
|
bitfld.long 0x08 31. " PC95 ,GP95 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 30. " PC94 ,GP94 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 29. " PC93 ,GP93 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 28. " PC92 ,GP92 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 27. " PC91 ,GP91 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 26. " PC90 ,GP90 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 25. " PC89 ,GP89 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 24. " PC88 ,GP88 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 23. " PC87 ,GP87 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 22. " PC86 ,GP86 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 21. " PC85 ,GP85 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 20. " PC84 ,GP84 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 19. " PC83 ,GP83 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 18. " PC82 ,GP82 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 17. " PC81 ,GP81 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 16. " PC80 ,GP80 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 15. " PC79 ,GP79 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 14. " PC78 ,GP78 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 13. " PC77 ,GP77 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 12. " PC76 ,GP76 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 11. " PC75 ,GP75 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 10. " PC74 ,GP74 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 9. " PC73 ,GP73 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 8. " PC72 ,GP72 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 7. " PC71 ,GP71 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 6. " PC70 ,GP70 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 5. " PC69 ,GP69 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 4. " PC68 ,GP68 Rising Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PC67 ,GP67 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 2. " PC66 ,GP66 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 1. " PC65 ,GP65 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 0. " PC64 ,GP64 Rising Edge Detect" "dis,ena"
|
|
group 0x03C++0x0b
|
|
line.long 0x00 "GFER0,GPIO Falling-Edge Detect Enable Register GPIO<31:0>"
|
|
bitfld.long 0x00 31. " FE31 ,GP31 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 30. " FE30 ,GP30 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 29. " FE29 ,GP29 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 28. " FE28 ,GP28 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FE27 ,GP27 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 26. " FE26 ,GP26 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 25. " FE25 ,GP25 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 24. " FE24 ,GP24 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FE23 ,GP23 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 22. " FE22 ,GP22 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 21. " FE21 ,GP21 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 20. " FE20 ,GP20 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FE19 ,GP19 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 18. " FE18 ,GP18 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 17. " FE17 ,GP17 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 16. " FE16 ,GP16 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FE15 ,GP15 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 14. " FE14 ,GP14 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 13. " FE13 ,GP13 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 12. " FE12 ,GP12 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FE11 ,GP11 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 10. " FE10 ,GP10 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 9. " FE9 ,GP9 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 4. " FE4 ,GP4 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE3 ,GP3 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 1. " FE1 ,GP1 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 0. " FE0 ,GP0 Falling Edge Detect" "dis,ena"
|
|
line.long 0x04 "GFER1,GPIO Falling-Edge Detect Register GPIO<63:32>"
|
|
bitfld.long 0x04 31. " FE63 ,GP63 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 30. " FE62 ,GP62 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 29. " FE61 ,GP61 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 28. " FE60 ,GP60 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 27. " FE59 ,GP59 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 26. " FE58 ,GP58 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 25. " FE57 ,GP57 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 24. " FE56 ,GP56 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 23. " FE55 ,GP55 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 22. " FE54 ,GP54 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 21. " FE53 ,GP53 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 20. " FE52 ,GP52 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FE51 ,GP51 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 18. " FE50 ,GP50 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 17. " FE49 ,GP49 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 16. " FE48 ,GP48 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FE47 ,GP47 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 14. " FE46 ,GP46 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 13. " FE45 ,GP45 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 12. " FE44 ,GP44 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 11. " FE43 ,GP43 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 10. " FE42 ,GP42 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 9. " FE41 ,GP41 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 8. " FE40 ,GP40 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FE39 ,GP39 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 6. " FE38 ,GP38 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 5. " FE37 ,GP37 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 4. " FE36 ,GP36 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FE35 ,GP35 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 2. " FE34 ,GP34 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 1. " FE33 ,GP33 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x04 0. " FE32 ,GP32 Falling Edge Detect" "dis,ena"
|
|
line.long 0x08 "GFER2,GPIO Falling-Edge Detect Enable Register GPIO<95:64>"
|
|
bitfld.long 0x08 31. " PC95 ,GP95 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 30. " PC94 ,GP94 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 29. " PC93 ,GP93 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 28. " PC92 ,GP92 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 27. " PC91 ,GP91 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 26. " PC90 ,GP90 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 25. " PC89 ,GP89 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 24. " PC88 ,GP88 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 23. " PC87 ,GP87 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 22. " PC86 ,GP86 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 21. " PC85 ,GP85 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 20. " PC84 ,GP84 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 19. " PC83 ,GP83 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 18. " PC82 ,GP82 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 17. " PC81 ,GP81 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 16. " PC80 ,GP80 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 15. " PC79 ,GP79 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 14. " PC78 ,GP78 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 13. " PC77 ,GP77 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 12. " PC76 ,GP76 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 11. " PC75 ,GP75 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 10. " PC74 ,GP74 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 9. " PC73 ,GP73 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 8. " PC72 ,GP72 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 7. " PC71 ,GP71 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 6. " PC70 ,GP70 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 5. " PC69 ,GP69 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 4. " PC68 ,GP68 Falling Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PC67 ,GP67 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 2. " PC66 ,GP66 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 1. " PC65 ,GP65 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x08 0. " PC64 ,GP64 Falling Edge Detect" "dis,ena"
|
|
group 0x048++0x0b
|
|
line.long 0x00 "GEDR0,GPIO Edge Detect Status Register GPIO<31:0>"
|
|
eventfld.long 0x00 31. " ED31 ,GP31 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 30. " ED30 ,GP30 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 29. " ED29 ,GP29 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 28. " ED28 ,GP28 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 27. " ED27 ,GP27 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 26. " ED26 ,GP26 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 25. " ED25 ,GP25 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 24. " ED24 ,GP24 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 23. " ED23 ,GP23 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 22. " ED22 ,GP22 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 21. " ED21 ,GP21 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 20. " ED20 ,GP20 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 19. " ED19 ,GP19 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 18. " ED18 ,GP18 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 17. " ED17 ,GP17 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 16. " ED16 ,GP16 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 15. " ED15 ,GP15 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 14. " ED14 ,GP14 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 13. " ED13 ,GP13 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 12. " ED12 ,GP12 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 11. " ED11 ,GP11 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 10. " ED10 ,GP10 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 9. " ED9 ,GP9 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 4. " ED4 ,GP4 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ED3 ,GP3 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 1. " ED1 ,GP1 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 0. " ED0 ,GP0 Edge Detect occured" "no,yes"
|
|
line.long 0x04 "GEDR1,GPIO Edge Detect Status Register GPIO<63:32>"
|
|
eventfld.long 0x04 31. " ED63 ,GP63 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 30. " ED62 ,GP62 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 29. " ED61 ,GP61 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 28. " ED60 ,GP60 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x04 27. " ED59 ,GP59 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 26. " ED58 ,GP58 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 25. " ED57 ,GP57 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 24. " ED56 ,GP56 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x04 23. " ED55 ,GP55 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 22. " ED54 ,GP54 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 21. " ED53 ,GP53 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 20. " ED52 ,GP52 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x04 19. " ED51 ,GP51 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 18. " ED50 ,GP50 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 17. " ED49 ,GP49 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 16. " ED48 ,GP48 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x04 15. " ED47 ,GP47 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 14. " ED46 ,GP46 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 13. " ED45 ,GP45 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 12. " ED44 ,GP44 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x04 11. " ED43 ,GP43 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 10. " ED42 ,GP42 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 9. " ED41 ,GP41 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 8. " ED40 ,GP40 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x04 7. " ED39 ,GP39 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 6. " ED38 ,GP38 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 5. " ED37 ,GP37 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 4. " ED36 ,GP36 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x04 3. " ED35 ,GP35 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 2. " ED34 ,GP34 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 1. " ED33 ,GP33 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x04 0. " ED32 ,GP32 Edge Detect occured" "no,yes"
|
|
line.long 0x08 "GEDR2,GPIO Edge Detect Status Register GPIO<95:64>"
|
|
eventfld.long 0x08 31. " PC95 ,GP95 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 30. " PC94 ,GP94 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 29. " PC93 ,GP93 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 28. " PC92 ,GP92 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x08 27. " PC91 ,GP91 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 26. " PC90 ,GP90 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 25. " PC89 ,GP89 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 24. " PC88 ,GP88 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x08 23. " PC87 ,GP87 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 22. " PC86 ,GP86 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 21. " PC85 ,GP85 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 20. " PC84 ,GP84 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x08 19. " PC83 ,GP83 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 18. " PC82 ,GP82 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 17. " PC81 ,GP81 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 16. " PC80 ,GP80 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x08 15. " PC79 ,GP79 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 14. " PC78 ,GP78 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 13. " PC77 ,GP77 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 12. " PC76 ,GP76 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x08 11. " PC75 ,GP75 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 10. " PC74 ,GP74 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 9. " PC73 ,GP73 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 8. " PC72 ,GP72 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x08 7. " PC71 ,GP71 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 6. " PC70 ,GP70 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 5. " PC69 ,GP69 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 4. " PC68 ,GP68 Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x08 3. " PC67 ,GP67 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 2. " PC66 ,GP66 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 1. " PC65 ,GP65 Edge Detect occured" "no,yes"
|
|
eventfld.long 0x08 0. " PC64 ,GP64 Edge Detect occured" "no,yes"
|
|
group 0x054++0x1F
|
|
line.long 0x00 "GAFR0_L,GPIO Alternate Function Register GPIO<15:0>"
|
|
bitfld.long 0x00 30.--31. " AF15 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x00 28.--29. " AF14 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x00 26.--27. " AF13 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x00 24.--25. " AF12 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " AF11 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x00 20.--21. " AF10 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x00 18.--19. " AF9 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x00 8.--9. " AF4 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " AF3 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x00 2.--3. " AF1 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x00 0.--1. " AF0 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
line.long 0x04 "GAFR0_U,GPIO Alternate Function Register GPIO<31:16>"
|
|
bitfld.long 0x04 30.--31. " AF31 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 28.--29. " AF30 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 26.--27. " AF29 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 24.--25. " AF28 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " AF27 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 20.--21. " AF26 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 18.--19. " AF25 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 16.--17. " AF24 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " AF23 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 12.--13. " AF22 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 10.--11. " AF21 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 8.--9. " AF20 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " AF19 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 4.--5. " AF18 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 2.--3. " AF17 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x04 0.--1. " AF16 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
line.long 0x08 "GAFR1_L,GPIO Alternate Function Register GPIO<47:32>"
|
|
bitfld.long 0x08 30.--31. " AF47 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 28.--29. " AF46 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 26.--27. " AF45 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 24.--25. " AF44 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " AF43 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 20.--21. " AF42 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 18.--19. " AF41 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 16.--17. " AF40 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " AF39 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 12.--13. " AF38 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 10.--11. " AF37 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 8.--9. " AF36 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " AF35 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 4.--5. " AF34 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 2.--3. " AF33 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x08 0.--1. " AF32 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
line.long 0x0c "GAFR1_U,GPIO Alternate Function Register GPIO<63:48>"
|
|
bitfld.long 0x0c 30.--31. " AF63 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 28.--29. " AF62 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 26.--27. " AF61 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 24.--25. " AF60 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x0c 22.--23. " AF59 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 20.--21. " AF58 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 18.--19. " AF57 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 16.--17. " AF56 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " AF55 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 12.--13. " AF54 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 10.--11. " AF53 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 8.--9. " AF52 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x0c 6.--7. " AF51 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 4.--5. " AF50 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 2.--3. " AF49 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x0c 0.--1. " AF48 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
line.long 0x10 "GAFR2_L,GPIO Alternate Function Register GPIO<79:64>"
|
|
bitfld.long 0x10 30.--31. " AF79 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 28.--29. " AF78 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 26.--27. " AF77 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 24.--25. " AF76 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " AF75 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 20.--21. " AF74 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 18.--19. " AF73 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 16.--17. " AF72 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " AF71 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 12.--13. " AF70 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 10.--11. " AF69 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 8.--9. " AF68 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " AF67 , GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 4.--5. " AF66 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 2.--3. " AF65 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x10 0.--1. " AF64 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
line.long 0x14 "GAFR2_U,GPIO Alternate Function Register GPIO <95:80>"
|
|
bitfld.long 0x14 30.--31. " AF95 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 28.--29. " AF94 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 26.--27. " AF93 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 24.--25. " AF92 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x14 22.--23. " AF91 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 20.--21. " AF90 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 18.--19. " AF89 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 16.--17. " AF88 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " AF87 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 12.--13. " AF86 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 10.--11. " AF85 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 8.--9. " AF84 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " AF83 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 4.--5. " AF82 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 2.--3. " AF81 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x14 0.--1. " AF80 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
line.long 0x18 "GAFR3_L,GPIO Alternate Function Register GPIO<111:96>"
|
|
bitfld.long 0x18 30.--31. " AF111 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 28.--29. " AF110 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 26.--27. " AF109 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 24.--25. " AF108 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x18 22.--23. " AF107 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 20.--21. " AF106 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 18.--19. " AF105 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 16.--17. " AF104 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " AF103 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 12.--13. " AF102 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 10.--11. " AF101 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 8.--9. " AF100 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " AF99 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 4.--5. " AF98 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 2.--3. " AF97 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x18 0.--1. " AF96 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
line.long 0x1c "GAFR3_U, GPIO Alternate Function register GPIO<120:112>"
|
|
bitfld.long 0x1c 16.--17. " AF120 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x1c 14.--15. " AF119 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x1c 12.--13. " AF118 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x1c 10.--11. " AF117 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x1c 8.--9. " AF116 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x1c 6.--7. " AF115 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x1c 4.--5. " AF114 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
bitfld.long 0x1c 2.--3. " AF113 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
textline " "
|
|
bitfld.long 0x1c 0.--1. " AF112 ,GPIO Alternate Function Select" "I/O,f1,f2,f3"
|
|
group 0x100++0x03
|
|
line.long 0x00 "GPLR3,GPIO Pin-Level Register GPIO<120:96>"
|
|
bitfld.long 0x00 24. " PL120 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 23. " PL119 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 22. " PL118 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 21. " PL117 ,GPIO Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PL116 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 19. " PL115 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 18. " PL114 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 17. " PL113 ,GPIO Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PL112 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 15. " PL111 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 14. " PL110 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 13. " PL109 ,GPIO Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PL108 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 11. " PL107 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 10. " PL106 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 9. " PL105 ,GPIO Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PL104 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 7. " PL103 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 6. " PL102 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 5. " PL101 ,GPIO Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PL100 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 3. " PL99 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 2. " PL98 ,GPIO Pin State" "L,H"
|
|
bitfld.long 0x00 1. " PL97 ,GPIO Pin State" "L,H"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PL96 ,GPIO Pin State" "L,H"
|
|
group 0x10C++0x03
|
|
line.long 0x00 "GPDR3,GPIO Pin Direction register GPIO<120:96>"
|
|
bitfld.long 0x00 24. " PD120 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 23. " PD119 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 22. " PD118 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 21. " PD117 ,GPIO Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PD116 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 19. " PD115 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 18. " PD114 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 17. " PD113 ,GPIO Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PD112 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 15. " PD111 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 14. " PD110 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 13. " PD109 ,GPIO Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PD108 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 11. " PD107 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 10. " PD106 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 9. " PD105 ,GPIO Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PD104 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 7. " PD103 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 6. " PD102 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 5. " PD101 ,GPIO Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PD100 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 3. " PD99 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 2. " PD98 ,GPIO Pin Direction" "I,O"
|
|
bitfld.long 0x00 1. " PD97 ,GPIO Pin Direction" "I,O"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PD96 ,GPIO Pin Direction" "I,O"
|
|
wgroup 0x118++0x03
|
|
line.long 0x00 "GPSR3,GPIO Pin Output Set Register GPIO<120:96>"
|
|
bitfld.long 0x00 24. " PD120 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 23. " PD119 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 22. " PD118 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 21. " PD117 ,GPIO Pin Output Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PD116 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 19. " PD115 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 18. " PD114 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 17. " PD113 ,GPIO Pin Output Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PD112 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 15. " PD111 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 14. " PD110 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 13. " PD109 ,GPIO Pin Output Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PD108 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 11. " PD107 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 10. " PD106 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 9. " PD105 ,GPIO Pin Output Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PD104 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 7. " PD103 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 6. " PD102 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 5. " PD101 ,GPIO Pin Output Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PD100 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 3. " PD99 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 2. " PD98 ,GPIO Pin Output Set" "-,H"
|
|
bitfld.long 0x00 1. " PD97 ,GPIO Pin Output Set" "-,H"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PD96 ,GPIO Pin Output Set" "-,H"
|
|
wgroup 0x124++0x03
|
|
line.long 0x00 "GPCR3,GPIO Pin Output Clear Register GPIO<120:96>"
|
|
bitfld.long 0x00 24. " PD120 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 23. " PD119 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 22. " PD118 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 21. " PD117 ,GPIO Pin Output Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PD116 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 19. " PD115 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 18. " PD114 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 17. " PD113 ,GPIO Pin Output Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PD112 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 15. " PD111 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 14. " PD110 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 13. " PD109 ,GPIO Pin Output Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PD108 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 11. " PD107 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 10. " PD106 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 9. " PD105 ,GPIO Pin Output Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PD104 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 7. " PD103 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 6. " PD102 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 5. " PD101 ,GPIO Pin Output Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PD100 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 3. " PD99 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 2. " PD98 ,GPIO Pin Output Clear" "-,L"
|
|
bitfld.long 0x00 1. " PD97 ,GPIO Pin Output Clear" "-,L"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PD96 ,GPIO Pin Output Clear" "-,L"
|
|
group 0x130++0x03
|
|
line.long 0x00 "GRER3,GPIO Rising-Edge Detect Enable Register GPIO<120:96>"
|
|
bitfld.long 0x00 24. " PD120 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 23. " PD119 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 22. " PD118 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 21. " PD117 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PD116 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 19. " PD115 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 18. " PD114 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 17. " PD113 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PD112 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 15. " PD111 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 14. " PD110 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 13. " PD109 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PD108 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 11. " PD107 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 10. " PD106 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 9. " PD105 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PD104 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 7. " PD103 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 6. " PD102 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 5. " PD101 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PD100 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 3. " PD99 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 2. " PD98 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 1. " PD97 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PD96 ,GPIO Rising-Edge Detect" "dis,ena"
|
|
group 0x13C++0x03
|
|
line.long 0x00 "GFER3,GPIO Falling-Edge Detect Enable Register GPIO<120:96>"
|
|
bitfld.long 0x00 24. " PD120 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 23. " PD119 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 22. " PD118 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 21. " PD117 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PD116 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 19. " PD115 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 18. " PD114 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 17. " PD113 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PD112 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 15. " PD111 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 14. " PD110 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 13. " PD109 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PD108 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 11. " PD107 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 10. " PD106 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 9. " PD105 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PD104 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 7. " PD103 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 6. " PD102 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 5. " PD101 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PD100 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 3. " PD99 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 2. " PD98 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 1. " PD97 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PD96 ,GPIO Falling-Edge Detect" "dis,ena"
|
|
group 0x148++0x03
|
|
line.long 0x00 "GEDR3,GPIO Edge Detect Status Register GPIO<120:96>"
|
|
eventfld.long 0x00 24. " PD120 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 23. " PD119 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 22. " PD118 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 21. " PD117 ,GPIO Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 20. " PD116 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 19. " PD115 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 18. " PD114 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 17. " PD113 ,GPIO Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 16. " PD112 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 15. " PD111 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 14. " PD110 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 13. " PD109 ,GPIO Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 12. " PD108 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 11. " PD107 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 10. " PD106 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 9. " PD105 ,GPIO Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 8. " PD104 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 7. " PD103 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 6. " PD102 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 5. " PD101 ,GPIO Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 4. " PD100 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 3. " PD99 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 2. " PD98 ,GPIO Edge Detect occured" "no,yes"
|
|
eventfld.long 0x00 1. " PD97 ,GPIO Edge Detect occured" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 0. " PD96 ,GPIO Edge Detect occured" "no,yes"
|
|
width 10.
|
|
tree.end
|
|
tree "Quick Capture Interface"
|
|
width 7.
|
|
base ASD:0x50000000
|
|
group 0x00++0x03
|
|
line.long 0x00 "CICR0,Quick Capture Interface Control Register 0"
|
|
bitfld.long 0x00 31. " DMA_EN ,DMA Request Enable" "dis,ena"
|
|
bitfld.long 0x00 30. " PAR_EN ,Parity Enable" "dis,ena"
|
|
bitfld.long 0x00 29. " SL_CAP_EN ,Quick Capture Enable for Slave Mode" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ENB ,Quick Capture Interface Enable (and Quick Disable)" "dis,ena"
|
|
bitfld.long 0x00 27. " DIS ,Quick Capture Interface Disable" "ena,dis"
|
|
bitfld.long 0x00 24.--26. " SIM ,Sensor interface Mode" "mstrPara,slvPara,mstrSeri,embdPara,embdSeri,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x00 09. " TOM ,Time-Out Mask" "ena,msk"
|
|
bitfld.long 0x00 08. " RDAVM ,Receive-Data-Available Mask" "ena,dis"
|
|
bitfld.long 0x00 07. " FEM ,FIFO-Empty Mask" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 06. " EOLM ,End-of-Line Mask" "ena,dis"
|
|
bitfld.long 0x00 05. " PERRM ,Parity-Error Mask" "ena,dis"
|
|
bitfld.long 0x00 04. " QDM ,Quick-Disable Mask" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 03. " CDM ,Disable-Done Mask" "ena,dis"
|
|
bitfld.long 0x00 02. " SOFM ,Start-of-Frame Mask" "ena,dis"
|
|
bitfld.long 0x00 01. " EOFM ,End-of-Frame Mask" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 00. " FOM ,FIFO Overrun Mask" "ena,dis"
|
|
group 0x04++0x03
|
|
line.long 0x00 "CICR1,Quick Capture Interface Control Register 1"
|
|
bitfld.long 0x00 31. " TBIT ,Transparency Bit" "0,1"
|
|
bitfld.long 0x00 29.--30. " RGBT_CONV ,RGBT Conversion" "none,RGB8:8:8->RGBT8:8:8,RGB5:5:5->RGBT5:5:5,res"
|
|
textline " "
|
|
hexmask.long.word 0x00 15.--25. 1. " PPL ,Pixels per Line for the Frame"
|
|
bitfld.long 0x00 12.--14. " RGB_CONV ,RGB Bits per Pixel Conversion" "noFrRGB8:8:8,RGB8:8:8->RGB6:6:6,RGB8:8:8->RGB5:6:5,RGB8:8:8->RGB5:5:5,RGB8:8:8->RGB4:4:4,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RGB_F ,RGB Format" "unpck,pack"
|
|
bitfld.long 0x00 10. " YCBCR_F ,YCbCr Format" "packed,planarized"
|
|
textline " "
|
|
bitfld.long 0x00 07.--09. " RGB_BPP ,RGB Bits per Pixel" "12bpp(4:4:4),15bpp(5:5:5),16bpp(5:6:5),18bpp(6:6:6),24bpp(8:8:8),res,res,res"
|
|
bitfld.long 0x00 05.--06. " RAW_BPP ,Raw Bits per Pixel" "8bpp,9bpp,10bpp,res"
|
|
textline " "
|
|
bitfld.long 0x00 03.--04. " COLOR_SP ,Color Space" "Raw,RGB,YCbCr,res"
|
|
bitfld.long 0x00 00.--02. " DW ,Data Width" "4bit,5bit,8bit,9bit,10bit,res,res,res"
|
|
group 0x08++0x03
|
|
line.long 0x00 "CICR2,Quick Capture Interface Control Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BLW ,Beginning-of-Line Pixel Clock Wait Count"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ELW ,End-of-Line Pixel Clock Wait Count"
|
|
hexmask.long.byte 0x00 10.--15. 1. " HSW ,Horizontal Sync Pulse Width"
|
|
textline " "
|
|
hexmask.long.byte 0x00 03.--08. 1. " BFPW ,Beginning-of-Frame Pixel Clock Wait Count"
|
|
bitfld.long 0x00 00.--02. " FSW ,Frame Stabilization Wait Count" "0,1,2,3,4,5,6,7"
|
|
group 0x0C++0x03
|
|
line.long 0x00 "CICR3,Quick Capture Interface Control Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BFW ,Beginning-of-Frame Line Clock Wait Count"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EFW ,End-of-Frame Line Clock Wait Count"
|
|
hexmask.long.byte 0x00 11.--15. 1. " VSW ,Vertical Sync Pulse Width"
|
|
textline " "
|
|
hexmask.long.word 0x00 00.--10. 1. " LPF ,Lines per Frame"
|
|
group 0x10++0x03
|
|
line.long 0x00 "CICR4,Quick Capture Interface Control Register 4"
|
|
bitfld.long 0x00 24.--26. " MCLK_DLY ,MCLK Data Capture Delay" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23. " PCLK_EN ,Pixel Clock Enable" "dis,ena"
|
|
bitfld.long 0x00 22. " PCP ,Pixel Clock Polarity" "risEdg,fallEdg"
|
|
textline " "
|
|
bitfld.long 0x00 21. " HSP ,Horizontal Sync Polarity" "actHi,actLow"
|
|
bitfld.long 0x00 20. " VSP ,Vertical Sync Polarity" "actHi,actLow"
|
|
bitfld.long 0x00 19. " MCLK_EN ,MCLK Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 08.--10. " FR_RATE ,Frame Capture Rate" "all,1/2,1/3,1/4,1/5,1/6,1/7,1/8"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DIV ,Clock Divisor"
|
|
group 0x14++0x03
|
|
line.long 0x00 "CISR,Quick Capture Interface Status Register"
|
|
eventfld.long 0x00 15. " FTO ,FIFO Time-Out" "no,yes"
|
|
eventfld.long 0x00 14. " RDAV_2 ,Channel 2 Receive Data Available" "no,yes"
|
|
eventfld.long 0x00 13. " RDAV_1 ,Channel 1 Receive Data Available" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 12. " RDAV_0 ,Channel 0 Receive Data Available" "no,yes"
|
|
eventfld.long 0x00 11. " FEMPTY_2 ,Channel 2 FIFO Empty" "no,yes"
|
|
eventfld.long 0x00 10. " FEMPTY_1 ,Channel 1 FIFO Empty" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 09. " FEMPTY_0 ,Channel 0 FIFO Empty" "no,yes"
|
|
eventfld.long 0x00 08. " EOL ,End of Line" "no,yes"
|
|
eventfld.long 0x00 07. " PAR_ERR ,Parity Error" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 06. " CQD ,Quick Capture Interface Quick Disable" "no,yes"
|
|
eventfld.long 0x00 05. " CDD ,Quick Capture Interface Disable Done" "no,yes"
|
|
eventfld.long 0x00 04. " SOF ,Start of Frame" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 03. " EOF ,End of Frame" "no,yes"
|
|
eventfld.long 0x00 02. " IFO_2 ,FIFO Overrun for Channel 2" "no,yes"
|
|
eventfld.long 0x00 01. " IFO_1 ,FIFO Overrun for Channel 1" "no,yes"
|
|
textline " "
|
|
eventfld.long 0x00 00. " IFO_0 ,FIFO Overrun for Channel 0" "no,yes"
|
|
group 0x18++0x03
|
|
line.long 0x00 "CIFR,Quick Capture Interface FIFO Control Register"
|
|
hexmask.long.byte 0x00 23.--29. 1. " FLVL2 ,FIFO 2 Level"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLVL1 ,FIFO 1 Level"
|
|
hexmask.long.byte 0x00 08.--15. 1. " FLVL0 ,FIFO 0 Level"
|
|
textline " "
|
|
bitfld.long 0x00 04.--05. " THL_0 ,Threshold Level for Channel 0 FIFO" ">=32byte,>=64byte,>=96byte,res"
|
|
bitfld.long 0x00 03. " RESETF ,Reset input FIFOs" "-,rst"
|
|
bitfld.long 0x00 02. " FEN2 ,FIFO Enable for channel 2" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 01. " FEN1 ,FIFO Enable for Channel 1" "dis,ena"
|
|
bitfld.long 0x00 00. " FEN0 ,FIFO Enable for Channel 0" "dis,ena"
|
|
group 0x1C++0x03
|
|
line.long 0x00 "CITOR,Quick Capture Interface Time-Out Register"
|
|
rgroup 0x28++0x03
|
|
line.long 0x00 "CIBR0,Quick Capture Interface Receive Buffer Register 0 (channel 0)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Byte3 ,Byte 3 of the captured data in channel 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Byte2 ,Byte 2 of the captured data in channel 0"
|
|
hexmask.long.byte 0x00 08.--15. 1. " Byte1 ,Byte 1 of the captured data in channel 0"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " Byte0 ,Byte 0 of the captured data in channel 0"
|
|
rgroup 0x30++0x03
|
|
line.long 0x00 "CIBR1,Quick Capture Interface Receive Buffer Register 1 (channel 1)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Byte3 ,Byte 3 of the captured data in channel 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Byte2 ,Byte 2 of the captured data in channel 1"
|
|
hexmask.long.byte 0x00 08.--15. 1. " Byte1 ,Byte 1 of the captured data in channel 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " Byte0 ,Byte 0 of the captured data in channel 1"
|
|
rgroup 0x38++0x03
|
|
line.long 0x00 "CIBR2,Quick Capture Interface Receive Buffer Register 2 (channel 2)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Byte3 ,Byte 3 of the captured data in channel 2"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Byte2 ,Byte 2 of the captured data in channel 2"
|
|
hexmask.long.byte 0x00 08.--15. 1. " Byte1 ,Byte 1 of the captured data in channel 2"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " Byte0 ,Byte 0 of the captured data in channel 2"
|
|
tree.end
|