8798 lines
541 KiB
Plaintext
8798 lines
541 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: PIC32CMLE On-Chip Peripherals
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; @Props: Released
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; @Author: NEJ
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; @Changelog: 2022-05-13 NEJ
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; @Manufacturer: MICROCHIP - Microchip Technology Inc.
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; @Doc: SVD generated (SVD2PER 1.8.0) based on: PIC32CM2532LE00048.svd,
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; PIC32CM2532LE00064.svd, PIC32CM2532LE00100.svd,
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; PIC32CM5164LE00048.svd, PIC32CM5164LE00064.svd,
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; PIC32CM5164LE00100.svd
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; @Core: Cortex-M23
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; @Chip: PIC32CM2532LE00, PIC32CM5164LE00
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perpic32cmle.per 14749 2022-05-13 08:51:16Z kwisniewski $
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tree.close "Core Registers (Cortex-M23)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 29. " EXTEXCLALL ,LDREX and STREX instructions use the Global Exclusive Monitor" "Only on Shared regions,Always"
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newline
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group.long 0x10++0x03
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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newline
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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group.long 0x14++0x07
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line.long 0x00 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x04 "SYST_CVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " CURRENT ,Current counter value"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPUID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,Revision 1,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/o Main extension,Reserved,Reserved,ARMv8-M w/ Main extension"
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newline
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x13
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line.long 0x00 "ICSR,Interrupt Control and State Register"
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setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET ,On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
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setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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newline
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bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
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rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
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rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
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newline
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
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rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
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rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
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bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
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newline
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bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
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newline
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bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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newline
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration and Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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newline
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bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
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bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
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bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
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newline
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bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
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group.long 0xD1C++0x0B
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x00 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x04 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
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hexmask.long.byte 0x04 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
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hexmask.long.byte 0x04 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
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bitfld.long 0x08 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
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bitfld.long 0x08 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
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newline
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bitfld.long 0x08 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
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bitfld.long 0x08 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
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bitfld.long 0x08 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
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newline
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bitfld.long 0x08 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
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bitfld.long 0x08 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
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bitfld.long 0x08 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
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newline
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bitfld.long 0x08 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
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bitfld.long 0x08 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
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bitfld.long 0x08 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
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newline
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bitfld.long 0x08 8. " MONITORACT ,Monitor exception status" "Not active,Active"
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bitfld.long 0x08 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
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bitfld.long 0x08 5. " NMIACT ,NMI exception status" "Not active,Active"
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newline
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bitfld.long 0x08 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
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bitfld.long 0x08 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
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bitfld.long 0x08 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
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newline
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bitfld.long 0x08 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
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bitfld.long 0x08 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
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tree "Memory System"
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width 10.
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rgroup.long 0xD78++0x0B
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line.long 0x00 "CLIDR,Cache Level ID Register"
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bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
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bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
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bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
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textline " "
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bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
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line.long 0x04 "CTR,Cache Type Register"
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bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,?..."
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bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,?..."
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textline " "
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bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x08 "CCSIDR,Cache Size ID Register"
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bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
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bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
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bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
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textline " "
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bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
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hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
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hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
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textline " "
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bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
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group.long 0xD84++0x03
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line.long 0x00 "CSSELR,Cache Size Selection Register"
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bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
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bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
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wgroup.long 0xF50++0x03
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line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
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wgroup.long 0xF58++0x23
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line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
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line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
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line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
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hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
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bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
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line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
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line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
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line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
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hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
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bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
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line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
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line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
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hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
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bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
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line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
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tree.end
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width 11.
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tree "CoreSight Identification Registers"
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rgroup.long 0xFE0++0x0F
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line.long 0x00 "DPIDR0,Peripheral ID0"
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hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
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line.long 0x04 "DPIDR1,Peripheral ID1"
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hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
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hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
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line.long 0x08 "DPIDR2,Peripheral ID2"
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hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
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bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
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hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
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line.long 0x0c "DPIDR3,Peripheral ID3"
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hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
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hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
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rgroup.long 0xFD0++0x03
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line.long 0x00 "PID4,Peripheral Identification Register 4"
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hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
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hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
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rgroup.long 0xFF0++0x0F
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line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
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hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
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line.long 0x04 "DCIDR1,Component ID1"
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hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
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hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
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line.long 0x08 "DCIDR2,Component ID2"
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hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
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line.long 0x0C "DCIDR3,Component ID3"
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hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
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tree.end
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width 0x0B
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Memory Protection Unit (MPU)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 15.
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rgroup.long 0xD90++0x03
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line.long 0x00 "MPU_TYPE,MPU Type Register"
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bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,,,,4,,,,8,,,,,,,,16,?..."
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bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
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group.long 0xD94++0x03
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line.long 0x00 "MPU_CTRL,MPU Control Register"
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bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
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bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
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bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
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group.long 0xD98++0x03
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line.long 0x00 "MPU_RNR,MPU Region Number Register"
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hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
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tree.close "MPU regions"
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
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group.long 0xD9C++0x03 "Region 0"
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
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bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
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bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
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newline
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bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
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hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
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bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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newline
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
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group.long 0xD9C++0x03 "Region 1"
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
newline
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
newline
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
|
|
endif
|
|
tree.end
|
|
newline
|
|
group.long 0xDC0++0x07
|
|
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Memory attribute encoding for MPU regions with an AttrIndex of 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Memory attribute encoding for MPU regions with an AttrIndex of 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Memory attribute encoding for MPU regions with an AttrIndex of 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Memory attribute encoding for MPU regions with an AttrIndex of 0"
|
|
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ATTR7 ,Memory attribute encoding for MPU regions with an AttrIndex of 7"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ATTR6 ,Memory attribute encoding for MPU regions with an AttrIndex of 6"
|
|
hexmask.long.byte 0x04 8.--15. 1. " ATTR5 ,Memory attribute encoding for MPU regions with an AttrIndex of 5"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ATTR4 ,Memory attribute encoding for MPU regions with an AttrIndex of 4"
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Security Attribution Unit (SAU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
group.long 0xDD0++0x03
|
|
line.long 0x00 "SAU_CTRL,SAU Control Register"
|
|
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
|
|
rgroup.long 0xDD4++0x03
|
|
line.long 0x00 "SAU_TYPE,SAU Type Register"
|
|
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,,,,4,,,,8,?..."
|
|
group.long 0xDD8++0x03
|
|
line.long 0x00 "SAU_RNR,SAU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
|
|
tree.close "SAU regions"
|
|
if ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x0
|
|
group.long 0xDDC++0x03 "Region 0"
|
|
saveout 0xDD8 %l 0x0
|
|
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x1
|
|
group.long 0xDDC++0x03 "Region 1"
|
|
saveout 0xDD8 %l 0x1
|
|
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x2
|
|
group.long 0xDDC++0x03 "Region 2"
|
|
saveout 0xDD8 %l 0x2
|
|
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x3
|
|
group.long 0xDDC++0x03 "Region 3"
|
|
saveout 0xDD8 %l 0x3
|
|
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x4
|
|
group.long 0xDDC++0x03 "Region 4"
|
|
saveout 0xDD8 %l 0x4
|
|
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x5
|
|
group.long 0xDDC++0x03 "Region 5"
|
|
saveout 0xDD8 %l 0x5
|
|
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x6
|
|
group.long 0xDDC++0x03 "Region 6"
|
|
saveout 0xDD8 %l 0x6
|
|
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x7
|
|
group.long 0xDDC++0x03 "Region 7"
|
|
saveout 0xDD8 %l 0x7
|
|
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
endif
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
hgroup.long 0xDDC++0x03 "Region 8 (not accessible)"
|
|
saveout 0xDD8 %l 0x8
|
|
hide.long 0x00 "SAU_RBAR8,SAU Region Base Address Register 8"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x8
|
|
hide.long 0x00 "SAU_RLAR8,SAU Region Limit Address Register 8"
|
|
hgroup.long 0xDDC++0x03 "Region 9 (not accessible)"
|
|
saveout 0xDD8 %l 0x9
|
|
hide.long 0x00 "SAU_RBAR9,SAU Region Base Address Register 9"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x9
|
|
hide.long 0x00 "SAU_RLAR9,SAU Region Limit Address Register 9"
|
|
hgroup.long 0xDDC++0x03 "Region 10 (not accessible)"
|
|
saveout 0xDD8 %l 0xA
|
|
hide.long 0x00 "SAU_RBAR10,SAU Region Base Address Register 10"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xA
|
|
hide.long 0x00 "SAU_RLAR10,SAU Region Limit Address Register 10"
|
|
hgroup.long 0xDDC++0x03 "Region 11 (not accessible)"
|
|
saveout 0xDD8 %l 0xB
|
|
hide.long 0x00 "SAU_RBAR11,SAU Region Base Address Register 11"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xB
|
|
hide.long 0x00 "SAU_RLAR11,SAU Region Limit Address Register 11"
|
|
hgroup.long 0xDDC++0x03 "Region 12 (not accessible)"
|
|
saveout 0xDD8 %l 0xC
|
|
hide.long 0x00 "SAU_RBAR12,SAU Region Base Address Register 12"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xC
|
|
hide.long 0x00 "SAU_RLAR12,SAU Region Limit Address Register 12"
|
|
hgroup.long 0xDDC++0x03 "Region 13 (not accessible)"
|
|
saveout 0xDD8 %l 0xD
|
|
hide.long 0x00 "SAU_RBAR13,SAU Region Base Address Register 13"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xD
|
|
hide.long 0x00 "SAU_RLAR13,SAU Region Limit Address Register 13"
|
|
hgroup.long 0xDDC++0x03 "Region 14 (not accessible)"
|
|
saveout 0xDD8 %l 0xE
|
|
hide.long 0x00 "SAU_RBAR14,SAU Region Base Address Register 14"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xE
|
|
hide.long 0x00 "SAU_RLAR14,SAU Region Limit Address Register 14"
|
|
hgroup.long 0xDDC++0x03 "Region 15 (not accessible)"
|
|
saveout 0xDD8 %l 0xF
|
|
hide.long 0x00 "SAU_RBAR15,SAU Region Base Address Register 15"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0xF
|
|
hide.long 0x00 "SAU_RLAR15,SAU Region Limit Address Register 15"
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-239,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 24.
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x104++0x03
|
|
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x10C++0x03
|
|
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x110++0x03
|
|
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x114++0x03
|
|
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x118++0x03
|
|
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x11C++0x03
|
|
hide.long 0x00 "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 24.
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x204++0x03
|
|
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x208++0x03
|
|
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x20C++0x03
|
|
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x210++0x03
|
|
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x214++0x03
|
|
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x218++0x03
|
|
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x21C++0x03
|
|
hide.long 0x00 "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 11.
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE0,Active Bit Register 0"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
rgroup.long 0x304++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x304++0x03
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
rgroup.long 0x308++0x03
|
|
line.long 0x00 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x308++0x03
|
|
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
rgroup.long 0x30C++0x03
|
|
line.long 0x00 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x30C++0x03
|
|
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
rgroup.long 0x310++0x03
|
|
line.long 0x00 "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x310++0x03
|
|
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
rgroup.long 0x314++0x03
|
|
line.long 0x00 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x314++0x03
|
|
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
rgroup.long 0x318++0x03
|
|
line.long 0x00 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x318++0x03
|
|
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
rgroup.long 0x31C++0x03
|
|
line.long 0x00 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x31C++0x03
|
|
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Target Non-Secure Registers"
|
|
width 13.
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
|
|
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x384++0x03
|
|
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
|
|
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x384++0x03
|
|
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x388++0x03
|
|
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
|
|
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x388++0x03
|
|
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x38C++0x03
|
|
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
|
|
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x38C++0x03
|
|
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x390++0x03
|
|
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
|
|
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x390++0x03
|
|
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x394++0x03
|
|
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
|
|
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x394++0x03
|
|
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x398++0x03
|
|
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
|
|
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x398++0x03
|
|
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x39C++0x03
|
|
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
|
|
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
|
|
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
|
|
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
|
|
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
|
|
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
|
|
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x39C++0x03
|
|
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x420++0x1F
|
|
line.long 0x0 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x4 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x8 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0xC "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x10 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x14 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x18 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x1C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
else
|
|
hgroup.long 0x420++0x1F
|
|
hide.long 0x0 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR10,Interrupt Priority Register"
|
|
hide.long 0xC "IPR11,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR15,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x440++0x1F
|
|
line.long 0x0 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x4 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x8 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0xC "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x10 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x14 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x18 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x1C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
else
|
|
hgroup.long 0x440++0x1F
|
|
hide.long 0x0 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR18,Interrupt Priority Register"
|
|
hide.long 0xC "IPR19,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR23,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x460++0x1F
|
|
line.long 0x0 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x4 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x8 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0xC "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x10 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x14 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x18 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x1C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
else
|
|
hgroup.long 0x460++0x1F
|
|
hide.long 0x0 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR26,Interrupt Priority Register"
|
|
hide.long 0xC "IPR27,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR31,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x480++0x1F
|
|
line.long 0x0 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x4 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x8 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0xC "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x10 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x14 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x18 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x1C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
else
|
|
hgroup.long 0x480++0x1F
|
|
hide.long 0x0 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR34,Interrupt Priority Register"
|
|
hide.long 0xC "IPR35,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR39,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x4A0++0x1F
|
|
line.long 0x0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0x4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0x8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0x10 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0x14 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0x18 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0x1C "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
else
|
|
hgroup.long 0x4A0++0x1F
|
|
hide.long 0x0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xC "IPR43,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR44,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR45,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR46,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR47,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x4C0++0x1F
|
|
line.long 0x0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0x4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0x8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0x10 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0x14 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0x18 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0x1C "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
else
|
|
hgroup.long 0x4C0++0x1F
|
|
hide.long 0x0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xC "IPR51,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR52,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR53,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR54,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR55,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x4E0++0x0F
|
|
line.long 0x0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0x4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0x8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x4E0++0x0F
|
|
hide.long 0x0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
width 13.
|
|
group.long 0xE04++0x07
|
|
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
|
|
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
|
|
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
|
|
textline " "
|
|
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
|
|
bitfld.long 0x04 17. " CDSKEY ,CDS write-enable key" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
|
|
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
|
|
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
|
|
rgroup.long 0xFB8++0x03
|
|
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
|
|
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
|
|
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
|
|
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 12.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
rbitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
newline
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
newline
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
newline
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
newline
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
tree "CoreSight Identification Registers"
|
|
width 12.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "FP_PIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "FP_PIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "FP_PIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "FP_PIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "FP_CIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "FP_CIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0C "FP_CIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 16.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
bitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
bitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
textline " "
|
|
bitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,Base instruction overhead counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store overhead counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
endif
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
endif
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
endif
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
endif
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)==0x1)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0x4)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0xC)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0xF)
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DWT_COMP4,DWT Comparator Register 4"
|
|
endif
|
|
group.long (0x60+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION4,DWT Function Register 4"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)==0x1)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0x4)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0xC)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0xF)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DWT_COMP5,DWT Comparator Register 5"
|
|
endif
|
|
group.long (0x70+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION5,DWT Function Register 5"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)==0x1)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0x4)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0xC)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0xF)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DWT_COMP6,DWT Comparator Register 6"
|
|
endif
|
|
group.long (0x80+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION6,DWT Function Register 6"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)==0x1)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0x4)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0xC)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0xF)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "DWT_COMP7,DWT Comparator Register 7"
|
|
endif
|
|
group.long (0x90+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION7,DWT Function Register 7"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)==0x1)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0x4)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0xC)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0xF)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DWT_COMP8,DWT Comparator Register 8"
|
|
endif
|
|
group.long (0xA0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION8,DWT Function Register 8"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)==0x1)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0x4)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0xC)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0xF)
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DWT_COMP9,DWT Comparator Register 9"
|
|
endif
|
|
group.long (0xB0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION9,DWT Function Register 9"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)==0x1)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0x4)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0xC)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0xF)
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DWT_COMP10,DWT Comparator Register 10"
|
|
endif
|
|
group.long (0xC0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION10,DWT Function Register 10"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)==0x1)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0x4)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0xC)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0xF)
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DWT_COMP11,DWT Comparator Register 11"
|
|
endif
|
|
group.long (0xD0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION11,DWT Function Register 11"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)==0x1)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0x4)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0xC)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0xF)
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DWT_COMP12,DWT Comparator Register 12"
|
|
endif
|
|
group.long (0xE0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION12,DWT Function Register 12"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)==0x1)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0x4)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0xC)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0xF)
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "DWT_COMP13,DWT Comparator Register 13"
|
|
endif
|
|
group.long (0xF0+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION13,DWT Function Register 13"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)==0x1)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0x4)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0xC)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0xF)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DWT_COMP14,DWT Comparator Register 14"
|
|
endif
|
|
group.long (0x100+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION14,DWT Function Register 14"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)==0x1)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0x4)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0xC)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0xF)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DWT_COMP15,DWT Comparator Register 15"
|
|
endif
|
|
group.long (0x110+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION15,DWT Function Register 15"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..."
|
|
tree "CoreSight Identification Registers"
|
|
width 13.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "DWT_CIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "DWT_CIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0c "DWT_CIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
autoindent.on center tree
|
|
tree "AC (Analog Comparators)"
|
|
base ad:0x40003400
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "CTRLB,Control B"
|
|
bitfld.byte 0x00 3. "START3,Comparator 3 Start Comparison" "0,1"
|
|
bitfld.byte 0x00 2. "START2,Comparator 2 Start Comparison" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "START1,Comparator 1 Start Comparison" "0,1"
|
|
bitfld.byte 0x00 0. "START0,Comparator 0 Start Comparison" "0,1"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "EVCTRL,Event Control"
|
|
bitfld.word 0x00 15. "INVEI3,Comparator 3 Input Event Invert Enable" "0,1"
|
|
bitfld.word 0x00 14. "INVEI2,Comparator 2 Input Event Invert Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 13. "INVEI1,Comparator 1 Input Event Invert Enable" "0,1"
|
|
bitfld.word 0x00 12. "INVEI0,Comparator 0 Input Event Invert Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 11. "COMPEI3,Comparator 3 Event Input Enable" "0,1"
|
|
bitfld.word 0x00 10. "COMPEI2,Comparator 2 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "COMPEI1,Comparator 1 Event Input Enable" "0,1"
|
|
bitfld.word 0x00 8. "COMPEI0,Comparator 0 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "WINEO1,Window 1 Event Output Enable" "0,1"
|
|
bitfld.word 0x00 4. "WINEO0,Window 0 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 3. "COMPEO3,Comparator 3 Event Output Enable" "0,1"
|
|
bitfld.word 0x00 2. "COMPEO2,Comparator 2 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "COMPEO1,Comparator 1 Event Output Enable" "0,1"
|
|
bitfld.word 0x00 0. "COMPEO0,Comparator 0 Event Output Enable" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 5. "WIN1,Window 1 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 4. "WIN0,Window 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "COMP3,Comparator 3 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 2. "COMP2,Comparator 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "COMP1,Comparator 1 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "COMP0,Comparator 0 Interrupt Enable" "0,1"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 5. "WIN1,Window 1 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 4. "WIN0,Window 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "COMP3,Comparator 3 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 2. "COMP2,Comparator 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "COMP1,Comparator 1 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "COMP0,Comparator 0 Interrupt Enable" "0,1"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 5. "WIN1,Window 1" "0,1"
|
|
bitfld.byte 0x00 4. "WIN0,Window 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "COMP3,Comparator 3" "0,1"
|
|
bitfld.byte 0x00 2. "COMP2,Comparator 2" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "COMP1,Comparator 1" "0,1"
|
|
bitfld.byte 0x00 0. "COMP0,Comparator 0" "0,1"
|
|
rgroup.byte 0x07++0x00
|
|
line.byte 0x00 "STATUSA,Status A"
|
|
bitfld.byte 0x00 6.--7. "WSTATE1,Window 1 Current State" "0: Signal is above window,1: Signal is inside window,2: Signal is below window,?..."
|
|
bitfld.byte 0x00 4.--5. "WSTATE0,Window 0 Current State" "0: Signal is above window,1: Signal is inside window,2: Signal is below window,?..."
|
|
newline
|
|
bitfld.byte 0x00 3. "STATE3,Comparator 3 Current State" "0,1"
|
|
bitfld.byte 0x00 2. "STATE2,Comparator 2 Current State" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "STATE1,Comparator 1 Current State" "0,1"
|
|
bitfld.byte 0x00 0. "STATE0,Comparator 0 Current State" "0,1"
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "STATUSB,Status B"
|
|
bitfld.byte 0x00 3. "READY3,Comparator 3 Ready" "0,1"
|
|
bitfld.byte 0x00 2. "READY2,Comparator 2 Ready" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "READY1,Comparator 1 Ready" "0,1"
|
|
bitfld.byte 0x00 0. "READY0,Comparator 0 Ready" "0,1"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x00 0. "DBGRUN,Debug Run" "0,1"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "WINCTRL,Window Control"
|
|
bitfld.byte 0x00 5.--6. "WINTSEL1,Window 1 Interrupt Selection" "0: Interrupt on signal above window,1: Interrupt on signal inside window,2: Interrupt on signal below window,3: Interrupt on signal outside window"
|
|
bitfld.byte 0x00 4. "WEN1,Window 1 Mode Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1.--2. "WINTSEL0,Window 0 Interrupt Selection" "0: Interrupt on signal above window,1: Interrupt on signal inside window,2: Interrupt on signal below window,3: Interrupt on signal outside window"
|
|
bitfld.byte 0x00 0. "WEN0,Window 0 Mode Enable" "0,1"
|
|
repeat 4. (increment 0 1) (increment 0 0x1)
|
|
group.byte ($2+0x0C)++0x00
|
|
line.byte 0x00 "SCALER[$1],Scaler n $1"
|
|
bitfld.byte 0x00 0.--5. "VALUE,Scaler Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x10)++0x03
|
|
line.long 0x00 "COMPCTRL[$1],Comparator Control n $1"
|
|
bitfld.long 0x00 28.--29. "OUT,Output" "0: The output of COMPn is not routed to the..,1: The asynchronous output of COMPn is routed to..,2: The synchronous output (including filtering)..,?..."
|
|
bitfld.long 0x00 24.--26. "FLEN,Filter Length" "0: No filtering,1: 3-bit majority function (2 of 3),2: 5-bit majority function (3 of 5),?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. "HYST,Hysteresis Level" "0: HYST50,1: HYST70,2: HYST90,3: HYST110"
|
|
bitfld.long 0x00 19. "HYSTEN,Hysteresis Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "SPEED,Speed Selection" "0: Low speed,1: Medium low speed,2: Medium high speed,3: High speed"
|
|
bitfld.long 0x00 15. "SWAP,Swap Inputs and Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MUXPOS,Positive Input Mux Selection" "0: I/O pin 0 for COMPCTRL0/1,1: I/O pin 1 for COMPCTRL0/1,2: I/O pin 2 for COMPCTRL0/1,3: I/O pin 3 for COMPCTRL0/1,4: AVDD Scaler,?..."
|
|
bitfld.long 0x00 8.--10. "MUXNEG,Negative Input Mux Selection" "0: I/O pin 0 for COMPCTRL0/1,1: I/O pin 1 for COMPCTRL0/1,2: I/O pin 2 for COMPCTRL0/1,3: I/O pin 3 for COMPCTRL0/1,4: Ground,5: AVDD Scaler,6: Internal Bandgap Voltage,7: DAC Voltage Output 0 for COMPCTRL0/2"
|
|
newline
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x00 3.--4. "INTSEL,Interrupt Selection" "0: Interrupt on comparator output toggle,1: Interrupt on comparator output rising,2: Interrupt on comparator output falling,3: Interrupt on end of comparison (single-shot.."
|
|
newline
|
|
bitfld.long 0x00 2. "SINGLE,Single-Shot Mode" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
repeat.end
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x00 6. "COMPCTRL3,COMPCTRL 3 Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 5. "COMPCTRL2,COMPCTRL 2 Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "COMPCTRL1,COMPCTRL 1 Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 3. "COMPCTRL0,COMPCTRL 0 Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WINCTRL,WINCTRL Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
tree.end
|
|
tree "ADC (Analog Digital Converter)"
|
|
base ad:0x42003800
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.byte 0x00 6. "RUNSTDBY,Run During Standby" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "CTRLB,Control B"
|
|
bitfld.byte 0x00 0.--2. "PRESCALER,Prescaler Configuration" "0: Peripheral clock divided by 2,1: Peripheral clock divided by 4,2: Peripheral clock divided by 8,3: Peripheral clock divided by 16,4: Peripheral clock divided by 32,5: Peripheral clock divided by 64,6: Peripheral clock divided by 128,7: Peripheral clock divided by 256"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "REFCTRL,Reference Control"
|
|
bitfld.byte 0x00 7. "REFCOMP,Reference Buffer Offset Compensation Enable" "0,1"
|
|
bitfld.byte 0x00 0.--3. "REFSEL,Reference Selection" "0: Internal Voltage Reference,1: 1/1.6 AVDD,2: 1/2 AVDD,3: External Voltage Reference A (shared with DAC),4: External Voltage Reference B,5: INTVCC2,?..."
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "EVCTRL,Event Control"
|
|
bitfld.byte 0x00 5. "WINMONEO,Window Monitor Event Out" "0,1"
|
|
bitfld.byte 0x00 4. "RESRDYEO,Result Ready Event Out" "0,1"
|
|
bitfld.byte 0x00 3. "STARTINV,Start Event Invert Enable" "0,1"
|
|
bitfld.byte 0x00 2. "FLUSHINV,Flush Event Invert Enable" "0,1"
|
|
bitfld.byte 0x00 1. "STARTEI,Start Conversion Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "FLUSHEI,Flush Event Input Enable" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 2. "WINMON,Window Monitor Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 1. "OVERRUN,Overrun Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 0. "RESRDY,Result Ready Interrupt Disable" "0,1"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 2. "WINMON,Window Monitor Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "OVERRUN,Overrun Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "RESRDY,Result Ready Interrupt Enable" "0,1"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 2. "WINMON,Window Monitor Interrupt Flag" "0,1"
|
|
bitfld.byte 0x00 1. "OVERRUN,Overrun Interrupt Flag" "0,1"
|
|
bitfld.byte 0x00 0. "RESRDY,Result Ready Interrupt Flag" "0,1"
|
|
rgroup.byte 0x07++0x00
|
|
line.byte 0x00 "SEQSTATUS,Sequence Status"
|
|
bitfld.byte 0x00 7. "SEQBUSY,Sequence Busy" "0,1"
|
|
bitfld.byte 0x00 0.--4. "SEQSTATE,Sequence State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "INPUTCTRL,Input Control"
|
|
bitfld.word 0x00 8.--12. "MUXNEG,Negative Mux Input Selection" "0: ADC AIN0 Pin,1: ADC AIN1 Pin,2: ADC AIN2 Pin,3: ADC AIN3 Pin,4: ADC AIN4 Pin,5: ADC AIN5 Pin,6: ADC AIN6 Pin,7: ADC AIN7 Pin,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,24: Internal Ground,?..."
|
|
bitfld.word 0x00 0.--4. "MUXPOS,Positive Mux Input Selection" "0: ADC AIN0 Pin,1: ADC AIN1 Pin,2: ADC AIN2 Pin,3: ADC AIN3 Pin,4: ADC AIN4 Pin,5: ADC AIN5 Pin,6: ADC AIN6 Pin,7: ADC AIN7 Pin,8: ADC AIN8 Pin,9: ADC AIN9 Pin,10: ADC AIN10 Pin,11: ADC AIN11 Pin,12: ADC AIN12 Pin,13: ADC AIN13 Pin,14: ADC AIN14 Pin,15: ADC AIN15 Pin,16: ADC AIN16 Pin,17: ADC AIN17 Pin,18: ADC AIN18 Pin,19: ADC AIN19 Pin,20: ADC AIN20 Pin,21: ADC AIN21 Pin,22: ADC AIN22 Pin,23: ADC AIN23 Pin,?,25: Internal Bandgap Voltage,26: 1/4 Scaled VDDCORE Supply,27: 1/4 Scaled AVDD Supply,28: DAC0 Output,29: 1/4 Scaled VDD Supply,30: OPAMP0 or OPAMP1 output,31: OPAMP2 output"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "CTRLC,Control C"
|
|
bitfld.word 0x00 8.--10. "WINMODE,Window Monitor Mode" "0: No window mode (default),1: RESULT > WINLT,2: RESULT < WINUT,3: WINLT < RESULT < WINUT,4: !(WINLT < RESULT < WINUT),?..."
|
|
bitfld.word 0x00 4.--5. "RESSEL,Conversion Result Resolution" "0: 12-bit result,1: Accumulation or Oversampling and Decimation..,2: 10-bit result,3: 8-bit result"
|
|
bitfld.word 0x00 3. "CORREN,Digital Correction Logic Enable" "0,1"
|
|
bitfld.word 0x00 2. "FREERUN,Free Running Mode" "0,1"
|
|
bitfld.word 0x00 1. "LEFTADJ,Left-Adjusted Result" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "DIFFMODE,Differential Mode" "0,1"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "AVGCTRL,Average Control"
|
|
bitfld.byte 0x00 4.--6. "ADJRES,Adjusting Result / Division Coefficient" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--3. "SAMPLENUM,Number of Samples to be Collected" "0: 1 sample,1: 2 samples,2: 4 samples,3: 8 samples,4: 16 samples,5: 32 samples,6: 64 samples,7: 128 samples,8: 256 samples,9: 512 samples,10: 1024 samples,?..."
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "SAMPCTRL,Sample Time Control"
|
|
bitfld.byte 0x00 7. "OFFCOMP,Comparator Offset Compensation Enable" "0,1"
|
|
bitfld.byte 0x00 0.--5. "SAMPLEN,Sampling Time Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "WINLT,Window Monitor Lower Threshold"
|
|
hexmask.word 0x00 0.--15. 1. "WINLT,Window Lower Threshold"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "WINUT,Window Monitor Upper Threshold"
|
|
hexmask.word 0x00 0.--15. 1. "WINUT,Window Upper Threshold"
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "GAINCORR,Gain Correction"
|
|
hexmask.word 0x00 0.--11. 1. "GAINCORR,Gain Correction Value"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "OFFSETCORR,Offset Correction"
|
|
hexmask.word 0x00 0.--11. 1. "OFFSETCORR,Offset Correction Value"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "SWTRIG,Software Trigger"
|
|
bitfld.byte 0x00 1. "START,Start ADC Conversion" "0,1"
|
|
bitfld.byte 0x00 0. "FLUSH,ADC Flush" "0,1"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x00 0. "DBGRUN,Debug Run" "0,1"
|
|
rgroup.word 0x20++0x01
|
|
line.word 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.word 0x00 10. "SWTRIG,SWTRG Synchronization Busy" "0,1"
|
|
bitfld.word 0x00 9. "OFFSETCORR,OFFSETCTRL Synchronization Busy" "0,1"
|
|
bitfld.word 0x00 8. "GAINCORR,GAINCORR Synchronization Busy" "0,1"
|
|
bitfld.word 0x00 7. "WINUT,WINUT Synchronization Busy" "0,1"
|
|
bitfld.word 0x00 6. "WINLT,WINLT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "SAMPCTRL,SAMPCTRL Synchronization Busy" "0,1"
|
|
bitfld.word 0x00 4. "AVGCTRL,AVGCTRL Synchronization Busy" "0,1"
|
|
bitfld.word 0x00 3. "CTRLC,CTRLC Synchronization Busy" "0,1"
|
|
bitfld.word 0x00 2. "INPUTCTRL,INPUTCTRL Synchronization Busy" "0,1"
|
|
bitfld.word 0x00 1. "ENABLE,ENABLE Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "SWRST,SWRST Synchronization Busy" "0,1"
|
|
rgroup.word 0x24++0x01
|
|
line.word 0x00 "RESULT,Result"
|
|
hexmask.word 0x00 0.--15. 1. "RESULT,Result Value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SEQCTRL,Sequence Control"
|
|
hexmask.long 0x00 0.--31. 1. "SEQEN,Enable Positive Input in the Sequence"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "CALIB,Calibration"
|
|
bitfld.word 0x00 8.--10. "BIASREFBUF,Bias Reference Buffer Scaling" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 0.--2. "BIASCOMP,Bias Comparator Scaling" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "CCL (Configurable Custom Logic)"
|
|
base ad:0x42004800
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRL,Control"
|
|
bitfld.byte 0x00 6. "RUNSTDBY,Run in Standby" "0: Generic clock is not required in standby..,1: Generic clock is required in standby sleep mode"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0: The peripheral is disabled,1: The peripheral is enabled"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0: The peripheral is not reset,1: The peripheral is reset"
|
|
repeat 2. (increment 0 1) (increment 0 0x1)
|
|
group.byte ($2+0x04)++0x00
|
|
line.byte 0x00 "SEQCTRL[$1],SEQ Control x $1"
|
|
bitfld.byte 0x00 0.--3. "SEQSEL,Sequential Selection" "0: Sequential logic is disabled,1: D flip flop,2: JK flip flop,3: D latch,4: RS latch,?..."
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "LUTCTRL[$1],LUT Control x $1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "TRUTH,Truth Value"
|
|
bitfld.long 0x00 22. "LUTEO,LUT Event Output Enable" "0: LUT event output is disabled,1: LUT event output is enabled"
|
|
bitfld.long 0x00 21. "LUTEI,LUT Event Input Enable" "0: LUT incoming event is disabled,1: LUT incoming event is enabled"
|
|
newline
|
|
bitfld.long 0x00 20. "INVEI,Inverted Event Input Enable" "0: Incoming event is not inverted,1: Incoming event is inverted"
|
|
bitfld.long 0x00 16.--19. "INSEL2,Input Selection 2" "0: Masked input,1: Feedback input source,2: Linked LUT input source,3: Event input source,4: I/O pin input source,5: AC input source,6: TC input source,7: Alternate TC input source,8: TCC input source,9: SERCOM input source,?,11: Asynchronous event input source,?..."
|
|
bitfld.long 0x00 12.--15. "INSEL1,Input Selection 1" "0: Masked input,1: Feedback input source,2: Linked LUT input source,3: Event input source,4: I/O pin input source,5: AC input source,6: TC input source,7: Alternate TC input source,8: TCC input source,9: SERCOM input source,?,11: Asynchronous event input source,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "INSEL0,Input Selection 0" "0: Masked input,1: Feedback input source,2: Linked LUT input source,3: Event input source,4: I/O pin input source,5: AC input source,6: TC input source,7: Alternate TC input source,8: TCC input source,9: SERCOM input source,?,11: Asynchronous event input source,?..."
|
|
bitfld.long 0x00 7. "EDGESEL,Edge Selection" "0: Edge detector is disabled,1: Edge detector is enabled"
|
|
bitfld.long 0x00 4.--5. "FILTSEL,Filter Selection" "0: Filter disabled,1: Synchronizer enabled,2: Filter enabled,?..."
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,LUT Enable" "0: LUT block is disabled,1: LUT block is enabled"
|
|
repeat.end
|
|
tree.end
|
|
tree "COREDEBUG (Debug Control Block)"
|
|
base ad:0xE000EDF0
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 26. "S_RESTART_ST,Restart sticky status" "0,1"
|
|
bitfld.long 0x00 25. "S_RESET_ST,Reset sticky status" "0,1"
|
|
bitfld.long 0x00 24. "S_RETIRE_ST,Retire sticky status" "0,1"
|
|
bitfld.long 0x00 20. "S_SDE,Secure debug enabled" "0,1"
|
|
bitfld.long 0x00 19. "S_LOCKUP,Lockup status" "0,1"
|
|
bitfld.long 0x00 18. "S_SLEEP,Sleeping status" "0,1"
|
|
bitfld.long 0x00 17. "S_HALT,Halted status" "0,1"
|
|
bitfld.long 0x00 16. "S_REGRDY,Register ready status" "0,1"
|
|
bitfld.long 0x00 5. "S_SNAPSTALL,Snap stall control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "C_MASKINTS,Mask PendSV SysTick and external configurable interrupts" "0,1"
|
|
bitfld.long 0x00 2. "C_STEP,Enable single step" "0,1"
|
|
bitfld.long 0x00 1. "C_HALT,Halt processor" "0,1"
|
|
bitfld.long 0x00 0. "C_DEBUGEN,Enable Halting debug" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Select Register"
|
|
bitfld.long 0x00 16. "REGWnR,Register write/not-read access" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "REGSEL,Register selector"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. "TRCENA,Global DWT and ITM features enable" "0,1"
|
|
bitfld.long 0x00 20. "SDME,Secure DebugMonitor enable" "0,1"
|
|
bitfld.long 0x00 19. "MON_REQ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. "MON_STEP,Enable DebugMonitor stepping" "0,1"
|
|
bitfld.long 0x00 17. "MON_PEND,DebugMonitor pending state" "0,1"
|
|
bitfld.long 0x00 16. "MON_EN,DebugMonitor enable" "0,1"
|
|
bitfld.long 0x00 11. "VC_SFERR,SecureFault exception Halting debug vector catch enable" "0,1"
|
|
bitfld.long 0x00 10. "VC_HARDERR,HardFault exception Halting debug vector catch enable" "0,1"
|
|
bitfld.long 0x00 9. "VC_INTERR,Excception entry and return faults Halting debug vector catch enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "VC_BUSERR,BusFault exception Halting debug vector catch enable" "0,1"
|
|
bitfld.long 0x00 7. "VC_STATERR,UsageFault exception state information error Halting debug vector catch enable" "0,1"
|
|
bitfld.long 0x00 6. "VC_CHKERR,UsageFault exception checking error Halting debug vector catch enable" "0,1"
|
|
bitfld.long 0x00 5. "VC_NOCPERR,UsageFault exception coprocessor access Halting debug vector catch enable" "0,1"
|
|
bitfld.long 0x00 4. "VC_MMERR,MemManage exception Halting debug vector catch enable" "0,1"
|
|
bitfld.long 0x00 0. "VC_CORERESET,Core reset Halting debug vector catch enable" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DSCSR,Debug Security Control and Status Register"
|
|
bitfld.long 0x00 17. "CDSKEY,CDS field write-enable key" "0,1"
|
|
bitfld.long 0x00 16. "CDS,Current domain Secure" "0,1"
|
|
bitfld.long 0x00 1. "SBRSEL,Secure Banked register select" "0,1"
|
|
bitfld.long 0x00 0. "SBRSELEN,Secure Banked register select enable" "0,1"
|
|
tree.end
|
|
tree "DAC (Digital-to-Analog Converter)"
|
|
base ad:0x42003C00
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable DAC Controller" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "CTRLB,Control B"
|
|
bitfld.byte 0x00 1.--2. "REFSEL,Reference Selection for DAC0/1" "0: Unbuffered External Voltage Reference (not..,1: Analog Voltage Supply,2: Buffered External Voltage Reference (buffered..,3: Internal Voltage Reference"
|
|
bitfld.byte 0x00 0. "DIFF,Differential mode enable" "0,1"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "EVCTRL,Event Control"
|
|
bitfld.byte 0x00 5. "INVEI1,Enable Invertion of DAC 1 input event" "0,1"
|
|
bitfld.byte 0x00 4. "INVEI0,Enable Invertion of DAC 0 input event" "0,1"
|
|
bitfld.byte 0x00 3. "EMPTYEO1,Data Buffer Empty Event Output DAC 1" "0,1"
|
|
bitfld.byte 0x00 2. "EMPTYEO0,Data Buffer Empty Event Output DAC 0" "0,1"
|
|
bitfld.byte 0x00 1. "STARTEI1,Start Conversion Event Input DAC 1" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "STARTEI0,Start Conversion Event Input DAC 0" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 3. "EMPTY1,Data Buffer 1 Empty Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 2. "EMPTY0,Data Buffer 0 Empty Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "UNDERRUN1,Underrun Interrupt Enable for DAC 1" "0,1"
|
|
bitfld.byte 0x00 0. "UNDERRUN0,Underrun Interrupt Enable for DAC 0" "0,1"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 3. "EMPTY1,Data Buffer 1 Empty Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 2. "EMPTY0,Data Buffer 0 Empty Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "UNDERRUN1,Underrun Interrupt Enable for DAC 1" "0,1"
|
|
bitfld.byte 0x00 0. "UNDERRUN0,Underrun Interrupt Enable for DAC 0" "0,1"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 3. "EMPTY1,Data Buffer 1 Empty" "0,1"
|
|
bitfld.byte 0x00 2. "EMPTY0,Data Buffer 0 Empty" "0,1"
|
|
bitfld.byte 0x00 1. "UNDERRUN1,DAC 1 Underrun" "0,1"
|
|
bitfld.byte 0x00 0. "UNDERRUN0,DAC 0 Underrun" "0,1"
|
|
rgroup.byte 0x07++0x00
|
|
line.byte 0x00 "STATUS,Status"
|
|
bitfld.byte 0x00 3. "EOC1,DAC 1 End of Conversion" "0,1"
|
|
bitfld.byte 0x00 2. "EOC0,DAC 0 End of Conversion" "0,1"
|
|
bitfld.byte 0x00 1. "READY1,DAC 1 Startup Ready" "0,1"
|
|
bitfld.byte 0x00 0. "READY0,DAC 0 Startup Ready" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x00 5. "DATABUF1,Data Buffer DAC 1" "0,1"
|
|
bitfld.long 0x00 4. "DATABUF0,Data Buffer DAC 0" "0,1"
|
|
bitfld.long 0x00 3. "DATA1,Data DAC 1" "0,1"
|
|
bitfld.long 0x00 2. "DATA0,Data DAC 0" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,DAC Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
repeat 2. (increment 0 1) (increment 0 0x2)
|
|
group.word ($2+0x0C)++0x01
|
|
line.word 0x00 "DACCTRL[$1],DAC n Control $1"
|
|
bitfld.word 0x00 8.--11. "REFRESH,Refresh period" "0: Do not Refresh,?,2: Refresh every 60US,3: Refresh every 90US,4: Refresh every 120US,5: Refresh every 150US,6: Refresh every 180US,7: Refresh every 210US,8: Refresh every 240US,9: Refresh every 270US,10: Refresh every 300US,11: Refresh every 330US,12: Refresh every 360US,13: Refresh every 390US,14: Refresh every 420US,15: Refresh every 450US"
|
|
bitfld.word 0x00 7. "DITHER,Dithering Mode" "0,1"
|
|
bitfld.word 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.word 0x00 2.--3. "CCTRL,Current Control" "0: GCLK_DAC <= 1.2MHz (100kSPS),1: 1.2MHz < GCLK_DAC <= 6MHz (500kSPS),2: 6MHz < GCLK_DAC <= 12MHz (1MSPS),?..."
|
|
bitfld.word 0x00 1. "ENABLE,Enable DAC0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "LEFTADJ,Left Adjusted Data" "0,1"
|
|
repeat.end
|
|
repeat 2. (increment 0 1) (increment 0 0x2)
|
|
wgroup.word ($2+0x10)++0x01
|
|
line.word 0x00 "DATA[$1],DAC n Data $1"
|
|
hexmask.word 0x00 0.--15. 1. "DATA,DAC0 Data"
|
|
repeat.end
|
|
repeat 2. (increment 0 1) (increment 0 0x2)
|
|
wgroup.word ($2+0x14)++0x01
|
|
line.word 0x00 "DATABUF[$1],DAC n Data Buffer $1"
|
|
hexmask.word 0x00 0.--15. 1. "DATABUF,DAC0 Data Buffer"
|
|
repeat.end
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x00 0. "DBGRUN,Debug Run" "0,1"
|
|
tree.end
|
|
tree "DIB (Debug Identification Block)"
|
|
base ad:0xE000EFB0
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "DLAR,SCS Software Lock Access Register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,Lock access control"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "DLSR,SCS Software Lock Status Register"
|
|
bitfld.long 0x00 2. "nTT,Not thirty-two bit" "0,1"
|
|
bitfld.long 0x00 1. "SLK,Software Lock status" "0,1"
|
|
bitfld.long 0x00 0. "SLI,Software Lock implemented" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 6.--7. "SNID," "0: Security Extension not implemented,?,2: Secure non-invasive debug prohibited,3: Secure non-invasive debug allowed"
|
|
bitfld.long 0x00 4.--5. "SID," "0: Security Extension not implemented,?,2: Secure invasive debug prohibited,3: Secure invasive debug allowed"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "DDEVARCH,SCS Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. "ARCHITECT,Architect"
|
|
bitfld.long 0x00 20. "PRESENT,DEVARCH Present" "0,1"
|
|
bitfld.long 0x00 16.--19. "REVISION,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "ARCHVER,Architecture Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. "ARCHPART,Architecture Part"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DDEVTYPE,SCS Device Type Register"
|
|
bitfld.long 0x00 4.--7. "SUB,Sub-type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "MAJOR,Major type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "DPIDR4,SCS Peripheral Identification Register 4"
|
|
bitfld.long 0x00 4.--7. "SIZE,4KB count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "DES_2,JEP106 continuation code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat 3. (strings "5" "6" "7" )(list 0x0 0x4 0x8 )
|
|
rgroup.long ($2+0x24)++0x03
|
|
line.long 0x00 "DPIDR$1,SCS Peripheral Identification Register $1"
|
|
repeat.end
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "DPIDR0,SCS Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PART_0,Part number bits[7:0]"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "DPIDR1,SCS Peripheral Identification Register 1"
|
|
bitfld.long 0x00 4.--7. "DES_0,JEP106 identification code bits [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PART_1,Part number bits[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "DPIDR2,SCS Peripheral Identification Register 2"
|
|
bitfld.long 0x00 4.--7. "REVISION,Component revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "JEDEC,JEDEC assignee value is used" "0,1"
|
|
bitfld.long 0x00 0.--2. "DES_1,JEP106 identification code bits[6:4]" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "DPIDR3,SCS Peripheral Identification Register 3"
|
|
bitfld.long 0x00 4.--7. "REVAND,RevAnd" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "CMOD,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "DCIDR0,SCS Component Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_0,CoreSight component identification preamble"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "DCIDR1,SCS Component Identification Register 1"
|
|
bitfld.long 0x00 4.--7. "CLASS,CoreSight component class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PRMBL_1,CoreSight component identification preamble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "DCIDR2,SCS Component Identification Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_2,CoreSight component identification preamble"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "DCIDR3,SCS Component Identification Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_3,CoreSight component identification preamble"
|
|
tree.end
|
|
tree "DMAC (Direct Memory Access Controller)"
|
|
base ad:0x41006000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CTRL,Control"
|
|
bitfld.word 0x00 11. "LVLEN3,Priority Level 3 Enable" "0,1"
|
|
bitfld.word 0x00 10. "LVLEN2,Priority Level 2 Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "LVLEN1,Priority Level 1 Enable" "0,1"
|
|
bitfld.word 0x00 8. "LVLEN0,Priority Level 0 Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "CRCENABLE,CRC Enable" "0,1"
|
|
bitfld.word 0x00 1. "DMAENABLE,DMA Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CRCCTRL,CRC Control"
|
|
bitfld.word 0x00 8.--13. "CRCSRC,CRC Input Source" "0: No action,1: I/O interface,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: DMA Channel 0,33: DMA Channel 1,34: DMA Channel 2,35: DMA Channel 3,36: DMA Channel 4,37: DMA Channel 5,38: DMA Channel 6,39: DMA Channel 7,40: DMA Channel 8,41: DMA Channel 9,42: DMA Channel 10,43: DMA Channel 11,44: DMA Channel 12,45: DMA Channel 13,46: DMA Channel 14,47: DMA Channel 15,?..."
|
|
bitfld.word 0x00 2.--3. "CRCPOLY,CRC Polynomial Type" "0: CRC-16 (CRC-CCITT),1: CRC32 (IEEE 802.3),?..."
|
|
newline
|
|
bitfld.word 0x00 0.--1. "CRCBEATSIZE,CRC Beat Size" "0: 8-bit bus transfer,1: 16-bit bus transfer,2: 32-bit bus transfer,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CRCDATAIN,CRC Data Input"
|
|
hexmask.long 0x00 0.--31. 1. "CRCDATAIN,CRC Data Input"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CRCCHKSUM,CRC Checksum"
|
|
hexmask.long 0x00 0.--31. 1. "CRCCHKSUM,CRC Checksum"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "CRCSTATUS,CRC Status"
|
|
bitfld.byte 0x00 1. "CRCZERO,CRC Zero" "0,1"
|
|
bitfld.byte 0x00 0. "CRCBUSY,CRC Module Busy" "0,1"
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x00 0. "DBGRUN,Debug Run" "0,1"
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "QOSCTRL,QOS Control"
|
|
bitfld.byte 0x00 4.--5. "DQOS,Data Transfer Quality of Service" "0: Background (no sensitive operation),1: Sensitive Bandwidth,2: Sensitive Latency,3: Critical Latency"
|
|
bitfld.byte 0x00 2.--3. "FQOS,Fetch Quality of Service" "0: Background (no sensitive operation),1: Sensitive Bandwidth,2: Sensitive Latency,3: Critical Latency"
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "WRBQOS,Write-Back Quality of Service" "0: Background (no sensitive operation),1: Sensitive Bandwidth,2: Sensitive Latency,3: Critical Latency"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SWTRIGCTRL,Software Trigger Control"
|
|
bitfld.long 0x00 15. "SWTRIG15,Channel 15 Software Trigger" "0,1"
|
|
bitfld.long 0x00 14. "SWTRIG14,Channel 14 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "SWTRIG13,Channel 13 Software Trigger" "0,1"
|
|
bitfld.long 0x00 12. "SWTRIG12,Channel 12 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SWTRIG11,Channel 11 Software Trigger" "0,1"
|
|
bitfld.long 0x00 10. "SWTRIG10,Channel 10 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SWTRIG9,Channel 9 Software Trigger" "0,1"
|
|
bitfld.long 0x00 8. "SWTRIG8,Channel 8 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SWTRIG7,Channel 7 Software Trigger" "0,1"
|
|
bitfld.long 0x00 6. "SWTRIG6,Channel 6 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "SWTRIG5,Channel 5 Software Trigger" "0,1"
|
|
bitfld.long 0x00 4. "SWTRIG4,Channel 4 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SWTRIG3,Channel 3 Software Trigger" "0,1"
|
|
bitfld.long 0x00 2. "SWTRIG2,Channel 2 Software Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SWTRIG1,Channel 1 Software Trigger" "0,1"
|
|
bitfld.long 0x00 0. "SWTRIG0,Channel 0 Software Trigger" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PRICTRL0,Priority Control"
|
|
bitfld.long 0x00 31. "RRLVLEN3,Level 3 Round-Robin Scheduling Enable" "0: Static arbitration scheme for channels with..,1: Round-robin arbitration scheme for channels.."
|
|
bitfld.long 0x00 24.--27. "LVLPRI3,Level 3 Channel Priority Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 23. "RRLVLEN2,Level 2 Round-Robin Scheduling Enable" "0: Static arbitration scheme for channels with..,1: Round-robin arbitration scheme for channels.."
|
|
bitfld.long 0x00 16.--19. "LVLPRI2,Level 2 Channel Priority Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 15. "RRLVLEN1,Level 1 Round-Robin Scheduling Enable" "0: Static arbitration scheme for channels with..,1: Round-robin arbitration scheme for channels.."
|
|
bitfld.long 0x00 8.--11. "LVLPRI1,Level 1 Channel Priority Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 7. "RRLVLEN0,Level 0 Round-Robin Scheduling Enable" "0: Static arbitration scheme for channels with..,1: Round-robin arbitration scheme for channels.."
|
|
bitfld.long 0x00 0.--3. "LVLPRI0,Level 0 Channel Priority Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "INTPEND,Interrupt Pending"
|
|
bitfld.word 0x00 15. "PEND,Pending" "0,1"
|
|
bitfld.word 0x00 14. "BUSY,Busy" "0,1"
|
|
newline
|
|
bitfld.word 0x00 13. "FERR,Fetch Error" "0,1"
|
|
bitfld.word 0x00 10. "SUSP,Channel Suspend" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "TCMPL,Transfer Complete" "0,1"
|
|
bitfld.word 0x00 8. "TERR,Transfer Error" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0.--3. "ID,Channel ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "INTSTATUS,Interrupt Status"
|
|
bitfld.long 0x00 15. "CHINT15,Channel 15 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 14. "CHINT14,Channel 14 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CHINT13,Channel 13 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 12. "CHINT12,Channel 12 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CHINT11,Channel 11 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 10. "CHINT10,Channel 10 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CHINT9,Channel 9 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 8. "CHINT8,Channel 8 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CHINT7,Channel 7 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 6. "CHINT6,Channel 6 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CHINT5,Channel 5 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 4. "CHINT4,Channel 4 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CHINT3,Channel 3 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 2. "CHINT2,Channel 2 Pending Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CHINT1,Channel 1 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHINT0,Channel 0 Pending Interrupt" "0,1"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "BUSYCH,Busy Channels"
|
|
bitfld.long 0x00 15. "BUSYCH15,Busy Channel 15" "0,1"
|
|
bitfld.long 0x00 14. "BUSYCH14,Busy Channel 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSYCH13,Busy Channel 13" "0,1"
|
|
bitfld.long 0x00 12. "BUSYCH12,Busy Channel 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUSYCH11,Busy Channel 11" "0,1"
|
|
bitfld.long 0x00 10. "BUSYCH10,Busy Channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUSYCH9,Busy Channel 9" "0,1"
|
|
bitfld.long 0x00 8. "BUSYCH8,Busy Channel 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BUSYCH7,Busy Channel 7" "0,1"
|
|
bitfld.long 0x00 6. "BUSYCH6,Busy Channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "BUSYCH5,Busy Channel 5" "0,1"
|
|
bitfld.long 0x00 4. "BUSYCH4,Busy Channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "BUSYCH3,Busy Channel 3" "0,1"
|
|
bitfld.long 0x00 2. "BUSYCH2,Busy Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "BUSYCH1,Busy Channel 1" "0,1"
|
|
bitfld.long 0x00 0. "BUSYCH0,Busy Channel 0" "0,1"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "PENDCH,Pending Channels"
|
|
bitfld.long 0x00 15. "PENDCH15,Pending Channel 15" "0,1"
|
|
bitfld.long 0x00 14. "PENDCH14,Pending Channel 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "PENDCH13,Pending Channel 13" "0,1"
|
|
bitfld.long 0x00 12. "PENDCH12,Pending Channel 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "PENDCH11,Pending Channel 11" "0,1"
|
|
bitfld.long 0x00 10. "PENDCH10,Pending Channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "PENDCH9,Pending Channel 9" "0,1"
|
|
bitfld.long 0x00 8. "PENDCH8,Pending Channel 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "PENDCH7,Pending Channel 7" "0,1"
|
|
bitfld.long 0x00 6. "PENDCH6,Pending Channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "PENDCH5,Pending Channel 5" "0,1"
|
|
bitfld.long 0x00 4. "PENDCH4,Pending Channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PENDCH3,Pending Channel 3" "0,1"
|
|
bitfld.long 0x00 2. "PENDCH2,Pending Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PENDCH1,Pending Channel 1" "0,1"
|
|
bitfld.long 0x00 0. "PENDCH0,Pending Channel 0" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "ACTIVE,Active Channel and Levels"
|
|
hexmask.long.word 0x00 16.--31. 1. "BTCNT,Active Channel Block Transfer Count"
|
|
bitfld.long 0x00 15. "ABUSY,Active Channel Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "ID,Active Channel ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. "LVLEX3,Level 3 Channel Trigger Request Executing" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "LVLEX2,Level 2 Channel Trigger Request Executing" "0,1"
|
|
bitfld.long 0x00 1. "LVLEX1,Level 1 Channel Trigger Request Executing" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "LVLEX0,Level 0 Channel Trigger Request Executing" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "BASEADDR,Descriptor Memory Section Base Address"
|
|
hexmask.long 0x00 0.--31. 1. "BASEADDR,Descriptor Memory Base Address"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "WRBADDR,Write-Back Memory Section Base Address"
|
|
hexmask.long 0x00 0.--31. 1. "WRBADDR,Write-Back Memory Base Address"
|
|
group.byte 0x3F++0x00
|
|
line.byte 0x00 "CHID,Channel ID"
|
|
bitfld.byte 0x00 0.--3. "ID,Channel ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "CHCTRLA,Channel Control A"
|
|
bitfld.byte 0x00 6. "RUNSTDBY,Channel run in standby" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,Channel Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "SWRST,Channel Software Reset" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CHCTRLB,Channel Control B"
|
|
bitfld.long 0x00 24.--25. "CMD,Software Command" "0: No action,1: Channel suspend operation,2: Channel resume operation,?..."
|
|
bitfld.long 0x00 22.--23. "TRIGACT,Trigger Action" "0: One trigger required for each block transfer,?,2: One trigger required for each beat transfer,3: One trigger required for each transaction"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "TRIGSRC,Trigger Source" "0: Only software/event triggers,1: RTC Timestamp Trigger,2: ID for DCC0 register,3: ID for DCC1 register,4: SERCOM0 RX Trigger,5: SERCOM0 TX Trigger,6: SERCOM1 RX Trigger,7: SERCOM1 TX Trigger,8: SERCOM2 RX Trigger,9: SERCOM2 TX Trigger,10: SERCOM3 RX Trigger,11: SERCOM3 TX Trigger,12: SERCOM4 RX Trigger,13: SERCOM4 TX Trigger,14: SERCOM5 RX Trigger,15: SERCOM5 TX Trigger,16: TC0 Overflow Trigger,17: TC0 Match/Compare 0 Trigger,18: TC0 Match/Compare 1 Trigger,19: TC1 Overflow Trigger,20: TC1 Match/Compare 0 Trigger,21: TC1 Match/Compare 1 Trigger,22: TC2 Overflow Trigger,23: TC2 Match/Compare 0 Trigger,24: TC2 Match/Compare 1 Trigger,25: TCC0 Overflow Trigger,26: TCC0 Match/Compare 0 Trigger,27: TCC0 Match/Compare 1 Trigger,28: TCC0 Match/Compare 2 Trigger,29: TCC0 Match/Compare 3 Trigger,30: TCC1 Overflow Trigger,31: TCC1 Match/Compare 0 Trigger,32: TCC1 Match/Compare 1 Trigger,33: TCC2 Overflow Trigger,34: TCC2 Match/Compare 0 Trigger,35: TCC2 Match/Compare 1 Trigger,36: TCC3 Overflow Trigger,37: TCC3 Match/Compare 0 Trigger,38: TCC3 Match/Compare 1 Trigger,39: TCC3 Match/Compare 2 Trigger,40: TCC3 Match/Compare 3 Trigger,41: ADC Result Ready Trigger,42: DAC Empty 0 Trigger,43: DAC Empty 1 Trigger,44: PTC End of Conversion Trigger,45: PTC Sequence Trigger,46: PTC Window Compare Trigger,47: I2S RX0 Trigger,48: I2S RX1 Trigger,49: I2S TX0 Trigger,50: I2S TX1 Trigger,?..."
|
|
bitfld.long 0x00 5.--6. "LVL,Channel Arbitration Level" "0: Channel Priority Level 0,1: Channel Priority Level 1,2: Channel Priority Level 2,3: Channel Priority Level 3"
|
|
newline
|
|
bitfld.long 0x00 4. "EVOE,Channel Event Output Enable" "0,1"
|
|
bitfld.long 0x00 3. "EVIE,Channel Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "EVACT,Event Input Action" "0: No action,1: Transfer and periodic transfer trigger,2: Conditional transfer trigger,3: Conditional block transfer,4: Channel suspend operation,5: Channel resume operation,6: Skip next block suspend action,?..."
|
|
group.byte 0x4C++0x00
|
|
line.byte 0x00 "CHINTENCLR,Channel Interrupt Enable Clear"
|
|
bitfld.byte 0x00 2. "SUSP,Channel Suspend Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "TCMPL,Channel Transfer Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "TERR,Channel Transfer Error Interrupt Enable" "0,1"
|
|
group.byte 0x4D++0x00
|
|
line.byte 0x00 "CHINTENSET,Channel Interrupt Enable Set"
|
|
bitfld.byte 0x00 2. "SUSP,Channel Suspend Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "TCMPL,Channel Transfer Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "TERR,Channel Transfer Error Interrupt Enable" "0,1"
|
|
group.byte 0x4E++0x00
|
|
line.byte 0x00 "CHINTFLAG,Channel Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 2. "SUSP,Channel Suspend" "0,1"
|
|
bitfld.byte 0x00 1. "TCMPL,Channel Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "TERR,Channel Transfer Error" "0,1"
|
|
rgroup.byte 0x4F++0x00
|
|
line.byte 0x00 "CHSTATUS,Channel Status"
|
|
bitfld.byte 0x00 2. "FERR,Channel Fetch Error" "0,1"
|
|
bitfld.byte 0x00 1. "BUSY,Channel Busy" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "PEND,Channel Pending" "0,1"
|
|
tree.end
|
|
tree "DSU (Device Service Unit)"
|
|
tree "DSU"
|
|
base ad:0x41002000
|
|
wgroup.byte 0x00++0x00
|
|
line.byte 0x00 "CTRL,Control"
|
|
bitfld.byte 0x00 3. "MBIST,Memory built-in self-test" "0,1"
|
|
bitfld.byte 0x00 2. "CRC,32-bit Cyclic Redundancy Code" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "STATUSA,Status A"
|
|
bitfld.byte 0x00 5. "BREXT,BootRom Phase Extension" "0,1"
|
|
bitfld.byte 0x00 4. "PERR,Protection Error" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "FAIL,Failure" "0,1"
|
|
bitfld.byte 0x00 2. "BERR,Bus Error" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "CRSTEXT,CPU Reset Phase Extension" "0,1"
|
|
bitfld.byte 0x00 0. "DONE,Done" "0,1"
|
|
rgroup.byte 0x02++0x00
|
|
line.byte 0x00 "STATUSB,Status B"
|
|
bitfld.byte 0x00 7. "BCCD1,Boot ROM Communication Channel 1 Dirty" "0,1"
|
|
bitfld.byte 0x00 6. "BCCD0,Boot ROM Communication Channel 0 Dirty" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 5. "DCCD1,Debug Communication Channel 1 Dirty" "0,1"
|
|
bitfld.byte 0x00 4. "DCCD0,Debug Communication Channel 0 Dirty" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "HPE,Hot-Plugging Enable" "0,1"
|
|
bitfld.byte 0x00 2. "DBGPRES,Debugger Present" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "DAL,Debugger Access Level" "0: UNKN_DESC,?,2: FULL_DEBUG,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ADDR,Address"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Address"
|
|
bitfld.long 0x00 0.--1. "AMOD,Access Mode" "0,1,2,3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "LENGTH,Length"
|
|
hexmask.long 0x00 2.--31. 1. "LENGTH,Length"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x10)++0x03
|
|
line.long 0x00 "DCC[$1],Debug Communication Channel n $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DID,Device Identification"
|
|
bitfld.long 0x00 28.--31. "PROCESSOR,Processor" "?,?,2: Cortex-M23,?..."
|
|
bitfld.long 0x00 23.--27. "FAMILY,Family" "?,1: PIC32CM Ultra-Low Power Entry Level Families,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--21. "SERIES,Series" "?,?,?,?,?,5: Low Power,6: Low Power and Security,7: Low Power and Security with..,?..."
|
|
bitfld.long 0x00 12.--15. "DIE,Die Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "REVISION,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DEVSEL,Device Select"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 3. "DCCDMALEVEL1,DMA Trigger Level 1" "0: Signals to the DMA that a data is available..,1: Signals to the DMA that a data is available.."
|
|
bitfld.long 0x00 2. "DCCDMALEVEL0,DMA Trigger Level 0" "0: Signals to the DMA that a data is available..,1: Signals to the DMA that a data is available.."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "LQOS,Latency Quality Of Service" "0,1,2,3"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BCC[$1],Boot ROM Communication Channel n $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
rgroup.long 0x1000++0x03
|
|
line.long 0x00 "ENTRY0,CoreSight ROM Table Entry 0"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. "ADDOFF,Address Offset"
|
|
bitfld.long 0x00 1. "FMT,Format" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EPRES,Entry Present" "0,1"
|
|
rgroup.long 0x1004++0x03
|
|
line.long 0x00 "ENTRY1,CoreSight ROM Table Entry 1"
|
|
rgroup.long 0x1008++0x03
|
|
line.long 0x00 "END,CoreSight ROM Table End"
|
|
hexmask.long 0x00 0.--31. 1. "END,End Marker"
|
|
rgroup.long 0x1FCC++0x03
|
|
line.long 0x00 "MEMTYPE,CoreSight ROM Table Memory Type"
|
|
bitfld.long 0x00 0. "SMEMP,System Memory Present" "0,1"
|
|
rgroup.long 0x1FD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification 4"
|
|
bitfld.long 0x00 4.--7. "FKBC,4KB count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "JEPCC,JEP-106 Continuation Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat 3. (strings "5" "6" "7" )(list 0x00 0x04 0x08 )
|
|
rgroup.long ($2+0x1FD4)++0x03
|
|
line.long 0x00 "PID$1,Peripheral Identification $1"
|
|
repeat.end
|
|
rgroup.long 0x1FE0++0x03
|
|
line.long 0x00 "PID0,Peripheral Identification 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PARTNBL,Part Number Low"
|
|
rgroup.long 0x1FE4++0x03
|
|
line.long 0x00 "PID1,Peripheral Identification 1"
|
|
bitfld.long 0x00 4.--7. "JEPIDCL,Low part of the JEP-106 Identity Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PARTNBH,Part Number High" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1FE8++0x03
|
|
line.long 0x00 "PID2,Peripheral Identification 2"
|
|
bitfld.long 0x00 4.--7. "REVISION,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "JEPU,JEP-106 Identity Code is used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "JEPIDCH,JEP-106 Identity Code High" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x1FEC++0x03
|
|
line.long 0x00 "PID3,Peripheral Identification 3"
|
|
bitfld.long 0x00 4.--7. "REVAND,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "CUSMOD,ARM CUSMOD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1FF0++0x03
|
|
line.long 0x00 "CID0,Component Identification 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PREAMBLEB0,Preamble Byte 0"
|
|
rgroup.long 0x1FF4++0x03
|
|
line.long 0x00 "CID1,Component Identification 1"
|
|
bitfld.long 0x00 4.--7. "CCLASS,Component Class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PREAMBLE,Preamble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1FF8++0x03
|
|
line.long 0x00 "CID2,Component Identification 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PREAMBLEB2,Preamble Byte 2"
|
|
rgroup.long 0x1FFC++0x03
|
|
line.long 0x00 "CID3,Component Identification 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PREAMBLEB3,Preamble Byte 3"
|
|
tree.end
|
|
tree "DSU_EXT"
|
|
base ad:0x41002100
|
|
wgroup.byte 0x00++0x00
|
|
line.byte 0x00 "CTRL,Control"
|
|
bitfld.byte 0x00 3. "MBIST,Memory built-in self-test" "0,1"
|
|
bitfld.byte 0x00 2. "CRC,32-bit Cyclic Redundancy Code" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "STATUSA,Status A"
|
|
bitfld.byte 0x00 5. "BREXT,BootRom Phase Extension" "0,1"
|
|
bitfld.byte 0x00 4. "PERR,Protection Error" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "FAIL,Failure" "0,1"
|
|
bitfld.byte 0x00 2. "BERR,Bus Error" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "CRSTEXT,CPU Reset Phase Extension" "0,1"
|
|
bitfld.byte 0x00 0. "DONE,Done" "0,1"
|
|
rgroup.byte 0x02++0x00
|
|
line.byte 0x00 "STATUSB,Status B"
|
|
bitfld.byte 0x00 7. "BCCD1,Boot ROM Communication Channel 1 Dirty" "0,1"
|
|
bitfld.byte 0x00 6. "BCCD0,Boot ROM Communication Channel 0 Dirty" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 5. "DCCD1,Debug Communication Channel 1 Dirty" "0,1"
|
|
bitfld.byte 0x00 4. "DCCD0,Debug Communication Channel 0 Dirty" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "HPE,Hot-Plugging Enable" "0,1"
|
|
bitfld.byte 0x00 2. "DBGPRES,Debugger Present" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0.--1. "DAL,Debugger Access Level" "0: UNKN_DESC,?,2: FULL_DEBUG,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ADDR,Address"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Address"
|
|
bitfld.long 0x00 0.--1. "AMOD,Access Mode" "0,1,2,3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "LENGTH,Length"
|
|
hexmask.long 0x00 2.--31. 1. "LENGTH,Length"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x10)++0x03
|
|
line.long 0x00 "DCC[$1],Debug Communication Channel n $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DID,Device Identification"
|
|
bitfld.long 0x00 28.--31. "PROCESSOR,Processor" "?,?,2: Cortex-M23,?..."
|
|
bitfld.long 0x00 23.--27. "FAMILY,Family" "?,1: PIC32CM Ultra-Low Power Entry Level Families,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--21. "SERIES,Series" "?,?,?,?,?,5: Low Power,6: Low Power and Security,7: Low Power and Security with..,?..."
|
|
bitfld.long 0x00 12.--15. "DIE,Die Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "REVISION,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DEVSEL,Device Select"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 3. "DCCDMALEVEL1,DMA Trigger Level 1" "0: Signals to the DMA that a data is available..,1: Signals to the DMA that a data is available.."
|
|
bitfld.long 0x00 2. "DCCDMALEVEL0,DMA Trigger Level 0" "0: Signals to the DMA that a data is available..,1: Signals to the DMA that a data is available.."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "LQOS,Latency Quality Of Service" "0,1,2,3"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "BCC[$1],Boot ROM Communication Channel n $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
rgroup.long 0x1000++0x03
|
|
line.long 0x00 "ENTRY0,CoreSight ROM Table Entry 0"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. "ADDOFF,Address Offset"
|
|
bitfld.long 0x00 1. "FMT,Format" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EPRES,Entry Present" "0,1"
|
|
rgroup.long 0x1004++0x03
|
|
line.long 0x00 "ENTRY1,CoreSight ROM Table Entry 1"
|
|
rgroup.long 0x1008++0x03
|
|
line.long 0x00 "END,CoreSight ROM Table End"
|
|
hexmask.long 0x00 0.--31. 1. "END,End Marker"
|
|
rgroup.long 0x1FCC++0x03
|
|
line.long 0x00 "MEMTYPE,CoreSight ROM Table Memory Type"
|
|
bitfld.long 0x00 0. "SMEMP,System Memory Present" "0,1"
|
|
rgroup.long 0x1FD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification 4"
|
|
bitfld.long 0x00 4.--7. "FKBC,4KB count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "JEPCC,JEP-106 Continuation Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat 3. (strings "5" "6" "7" )(list 0x00 0x04 0x08 )
|
|
rgroup.long ($2+0x1FD4)++0x03
|
|
line.long 0x00 "PID$1,Peripheral Identification $1"
|
|
repeat.end
|
|
rgroup.long 0x1FE0++0x03
|
|
line.long 0x00 "PID0,Peripheral Identification 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PARTNBL,Part Number Low"
|
|
rgroup.long 0x1FE4++0x03
|
|
line.long 0x00 "PID1,Peripheral Identification 1"
|
|
bitfld.long 0x00 4.--7. "JEPIDCL,Low part of the JEP-106 Identity Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PARTNBH,Part Number High" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1FE8++0x03
|
|
line.long 0x00 "PID2,Peripheral Identification 2"
|
|
bitfld.long 0x00 4.--7. "REVISION,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "JEPU,JEP-106 Identity Code is used" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "JEPIDCH,JEP-106 Identity Code High" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x1FEC++0x03
|
|
line.long 0x00 "PID3,Peripheral Identification 3"
|
|
bitfld.long 0x00 4.--7. "REVAND,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "CUSMOD,ARM CUSMOD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1FF0++0x03
|
|
line.long 0x00 "CID0,Component Identification 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PREAMBLEB0,Preamble Byte 0"
|
|
rgroup.long 0x1FF4++0x03
|
|
line.long 0x00 "CID1,Component Identification 1"
|
|
bitfld.long 0x00 4.--7. "CCLASS,Component Class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PREAMBLE,Preamble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1FF8++0x03
|
|
line.long 0x00 "CID2,Component Identification 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PREAMBLEB2,Preamble Byte 2"
|
|
rgroup.long 0x1FFC++0x03
|
|
line.long 0x00 "CID3,Component Identification 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PREAMBLEB3,Preamble Byte 3"
|
|
tree.end
|
|
tree.end
|
|
tree "DWT (Data Watchpoint and Trace)"
|
|
base ad:0xE0001000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,DWT Control Register"
|
|
bitfld.long 0x00 28.--31. "NUMCOMP,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. "NOTRCPKT,No trace packets" "0,1"
|
|
bitfld.long 0x00 26. "NOEXTTRIG,No external triggers" "0,1"
|
|
bitfld.long 0x00 25. "NOCYCCNT,No cycle count" "0,1"
|
|
bitfld.long 0x00 24. "NOPRFCNT,No profile counters" "0,1"
|
|
bitfld.long 0x00 23. "CYCDISS,Cycle counter disabled secure" "0,1"
|
|
bitfld.long 0x00 22. "CYCEVTENA,Cycle event enable" "0,1"
|
|
bitfld.long 0x00 21. "FOLDEVTENA,Fold event enable" "0,1"
|
|
bitfld.long 0x00 20. "LSUEVTENA,LSU event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "SLEEPEVTENA,Sleep event enable" "0,1"
|
|
bitfld.long 0x00 18. "EXCEVTENA,Exception event enable" "0,1"
|
|
bitfld.long 0x00 17. "CPIEVTENA,CPI event enable" "0,1"
|
|
bitfld.long 0x00 16. "EXCTRCENA,Exception trace enable" "0,1"
|
|
bitfld.long 0x00 12. "PCSAMPLENA,PC sample enable" "0,1"
|
|
bitfld.long 0x00 10.--11. "SYNCTAP,Synchronization tap" "0,1,2,3"
|
|
bitfld.long 0x00 9. "CYCTAP,Cycle count tap" "0,1"
|
|
bitfld.long 0x00 5.--8. "POSTINIT,POSTCNT initial" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. "POSTPRESET,POSTCNT preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "CYCCNTENA,CYCCNT enable" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "PCSR,DWT Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. "EIASAMPLE,Executed instruction address sample"
|
|
wgroup.long 0xFB0++0x03
|
|
line.long 0x00 "LAR,DWT Software Lock Access Register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,Lock access control"
|
|
rgroup.long 0xFB4++0x03
|
|
line.long 0x00 "LSR,DWT Software Lock Status Register"
|
|
bitfld.long 0x00 2. "nTT,Not thirty-two bit" "0,1"
|
|
bitfld.long 0x00 1. "SLK,Software Lock status" "0,1"
|
|
bitfld.long 0x00 0. "SLI,Software Lock implemented" "0,1"
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DEVARCH,DWT Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. "ARCHITECT,Architect"
|
|
bitfld.long 0x00 20. "PRESENT,DEVARCH Present" "0,1"
|
|
bitfld.long 0x00 16.--19. "REVISION,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "ARCHVER,Architecture Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. "ARCHPART,Architecture Part"
|
|
rgroup.long 0xFCC++0x03
|
|
line.long 0x00 "DEVTYPE,DWT Device Type Register"
|
|
bitfld.long 0x00 4.--7. "SUB,Sub-type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "MAJOR,Major type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PIDR4,DWT Peripheral Identification Register 4"
|
|
bitfld.long 0x00 4.--7. "SIZE,4KB count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "DES_2,JEP106 continuation code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat 3. (strings "5" "6" "7" )(list 0x00 0x04 0x08 )
|
|
rgroup.long ($2+0xFD4)++0x03
|
|
line.long 0x00 "PIDR$1,DWT Peripheral Identification Register $1"
|
|
repeat.end
|
|
rgroup.long 0xFE0++0x03
|
|
line.long 0x00 "PIDR0,DWT Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PART_0,Part number bits[7:0]"
|
|
rgroup.long 0xFE4++0x03
|
|
line.long 0x00 "PIDR1,DWT Peripheral Identification Register 1"
|
|
bitfld.long 0x00 4.--7. "DES_0,JEP106 identification code bits [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PART_1,Part number bits[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFE8++0x03
|
|
line.long 0x00 "PIDR2,DWT Peripheral Identification Register 2"
|
|
bitfld.long 0x00 4.--7. "REVISION,Component revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "JEDEC,JEDEC assignee value is used" "0,1"
|
|
bitfld.long 0x00 0.--2. "DES_1,JEP106 identification code bits[6:4]" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xFEC++0x03
|
|
line.long 0x00 "PIDR3,DWT Peripheral Identification Register 3"
|
|
bitfld.long 0x00 4.--7. "REVAND,RevAnd" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "CMOD,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFF0++0x03
|
|
line.long 0x00 "CIDR0,DWT Component Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_0,CoreSight component identification preamble"
|
|
rgroup.long 0xFF4++0x03
|
|
line.long 0x00 "CIDR1,DWT Component Identification Register 1"
|
|
bitfld.long 0x00 4.--7. "CLASS,CoreSight component class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PRMBL_1,CoreSight component identification preamble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFF8++0x03
|
|
line.long 0x00 "CIDR2,DWT Component Identification Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_2,CoreSight component identification preamble"
|
|
rgroup.long 0xFFC++0x03
|
|
line.long 0x00 "CIDR3,DWT Component Identification Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_3,CoreSight component identification preamble"
|
|
repeat 2. (increment 0 1)(increment 0 0x10)
|
|
tree "COMPARATOR[$1]"
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "COMP,DWT Comparator Register n"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Cycle/PC/data value or data address"
|
|
group.long ($2+0x28)++0x03
|
|
line.long 0x00 "FUNCTION,DWT Function Register x"
|
|
bitfld.long 0x00 27.--31. "ID,Identify capability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. "MATCHED,Comparator matched" "0,1"
|
|
bitfld.long 0x00 10.--11. "DATAVSIZE,Data value size" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "ACTION,Action on match" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "MATCH,Match type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "EIC (External Interrupt Controller)"
|
|
base ad:0x40002800
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 4. "CKSEL,Clock Selection" "0: Clocked by GCLK,1: Clocked by ULP32K"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "NMICTRL,Non-Maskable Interrupt Control"
|
|
bitfld.byte 0x00 4. "NMIASYNCH,Asynchronous Edge Detection Mode" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.byte 0x00 3. "NMIFILTEN,Non-Maskable Interrupt Filter Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. "NMISENSE,Non-Maskable Interrupt Sense Configuration" "0: No detection,1: Rising-edge detection,2: Falling-edge detection,3: Both-edges detection,4: High-level detection,5: Low-level detection,?..."
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "NMIFLAG,Non-Maskable Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 0. "NMI,Non-Maskable Interrupt" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x00 1. "ENABLE,Enable Synchronization Busy Status" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy Status" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "EVCTRL,Event Control"
|
|
bitfld.long 0x00 15. "EXTINTEO15,External Interrupt 15 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 14. "EXTINTEO14,External Interrupt 14 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "EXTINTEO13,External Interrupt 13 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 12. "EXTINTEO12,External Interrupt 12 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "EXTINTEO11,External Interrupt 11 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 10. "EXTINTEO10,External Interrupt 10 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "EXTINTEO9,External Interrupt 9 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 8. "EXTINTEO8,External Interrupt 8 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "EXTINTEO7,External Interrupt 7 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 6. "EXTINTEO6,External Interrupt 6 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "EXTINTEO5,External Interrupt 5 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 4. "EXTINTEO4,External Interrupt 4 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "EXTINTEO3,External Interrupt 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 2. "EXTINTEO2,External Interrupt 2 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EXTINTEO1,External Interrupt 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 0. "EXTINTEO0,External Interrupt 0 Event Output Enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x00 15. "EXTINT15,External Interrupt 15 Enable" "0,1"
|
|
bitfld.long 0x00 14. "EXTINT14,External Interrupt 14 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "EXTINT13,External Interrupt 13 Enable" "0,1"
|
|
bitfld.long 0x00 12. "EXTINT12,External Interrupt 12 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "EXTINT11,External Interrupt 11 Enable" "0,1"
|
|
bitfld.long 0x00 10. "EXTINT10,External Interrupt 10 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "EXTINT9,External Interrupt 9 Enable" "0,1"
|
|
bitfld.long 0x00 8. "EXTINT8,External Interrupt 8 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "EXTINT7,External Interrupt 7 Enable" "0,1"
|
|
bitfld.long 0x00 6. "EXTINT6,External Interrupt 6 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "EXTINT5,External Interrupt 5 Enable" "0,1"
|
|
bitfld.long 0x00 4. "EXTINT4,External Interrupt 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "EXTINT3,External Interrupt 3 Enable" "0,1"
|
|
bitfld.long 0x00 2. "EXTINT2,External Interrupt 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EXTINT1,External Interrupt 1 Enable" "0,1"
|
|
bitfld.long 0x00 0. "EXTINT0,External Interrupt 0 Enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x00 15. "EXTINT15,External Interrupt 15 Enable" "0,1"
|
|
bitfld.long 0x00 14. "EXTINT14,External Interrupt 14 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "EXTINT13,External Interrupt 13 Enable" "0,1"
|
|
bitfld.long 0x00 12. "EXTINT12,External Interrupt 12 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "EXTINT11,External Interrupt 11 Enable" "0,1"
|
|
bitfld.long 0x00 10. "EXTINT10,External Interrupt 10 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "EXTINT9,External Interrupt 9 Enable" "0,1"
|
|
bitfld.long 0x00 8. "EXTINT8,External Interrupt 8 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "EXTINT7,External Interrupt 7 Enable" "0,1"
|
|
bitfld.long 0x00 6. "EXTINT6,External Interrupt 6 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "EXTINT5,External Interrupt 5 Enable" "0,1"
|
|
bitfld.long 0x00 4. "EXTINT4,External Interrupt 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "EXTINT3,External Interrupt 3 Enable" "0,1"
|
|
bitfld.long 0x00 2. "EXTINT2,External Interrupt 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EXTINT1,External Interrupt 1 Enable" "0,1"
|
|
bitfld.long 0x00 0. "EXTINT0,External Interrupt 0 Enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0x00 15. "EXTINT15,External Interrupt 15" "0,1"
|
|
bitfld.long 0x00 14. "EXTINT14,External Interrupt 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "EXTINT13,External Interrupt 13" "0,1"
|
|
bitfld.long 0x00 12. "EXTINT12,External Interrupt 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "EXTINT11,External Interrupt 11" "0,1"
|
|
bitfld.long 0x00 10. "EXTINT10,External Interrupt 10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "EXTINT9,External Interrupt 9" "0,1"
|
|
bitfld.long 0x00 8. "EXTINT8,External Interrupt 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "EXTINT7,External Interrupt 7" "0,1"
|
|
bitfld.long 0x00 6. "EXTINT6,External Interrupt 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "EXTINT5,External Interrupt 5" "0,1"
|
|
bitfld.long 0x00 4. "EXTINT4,External Interrupt 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "EXTINT3,External Interrupt 3" "0,1"
|
|
bitfld.long 0x00 2. "EXTINT2,External Interrupt 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EXTINT1,External Interrupt 1" "0,1"
|
|
bitfld.long 0x00 0. "EXTINT0,External Interrupt 0" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ASYNCH,External Interrupt Asynchronous Mode"
|
|
bitfld.long 0x00 15. "ASYNCH15,Asynchronous Edge Detection Mode of EXTINT15" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.long 0x00 14. "ASYNCH14,Asynchronous Edge Detection Mode of EXTINT14" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
newline
|
|
bitfld.long 0x00 13. "ASYNCH13,Asynchronous Edge Detection Mode of EXTINT13" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.long 0x00 12. "ASYNCH12,Asynchronous Edge Detection Mode of EXTINT12" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
newline
|
|
bitfld.long 0x00 11. "ASYNCH11,Asynchronous Edge Detection Mode of EXTINT11" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.long 0x00 10. "ASYNCH10,Asynchronous Edge Detection Mode of EXTINT10" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
newline
|
|
bitfld.long 0x00 9. "ASYNCH9,Asynchronous Edge Detection Mode of EXTINT9" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.long 0x00 8. "ASYNCH8,Asynchronous Edge Detection Mode of EXTINT8" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
newline
|
|
bitfld.long 0x00 7. "ASYNCH7,Asynchronous Edge Detection Mode of EXTINT7" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.long 0x00 6. "ASYNCH6,Asynchronous Edge Detection Mode of EXTINT6" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
newline
|
|
bitfld.long 0x00 5. "ASYNCH5,Asynchronous Edge Detection Mode of EXTINT5" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.long 0x00 4. "ASYNCH4,Asynchronous Edge Detection Mode of EXTINT4" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
newline
|
|
bitfld.long 0x00 3. "ASYNCH3,Asynchronous Edge Detection Mode of EXTINT3" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.long 0x00 2. "ASYNCH2,Asynchronous Edge Detection Mode of EXTINT2" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
newline
|
|
bitfld.long 0x00 1. "ASYNCH1,Asynchronous Edge Detection Mode of EXTINT1" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
bitfld.long 0x00 0. "ASYNCH0,Asynchronous Edge Detection Mode of EXTINT0" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CONFIG0,External Interrupt Sense Configuration"
|
|
bitfld.long 0x00 31. "FILTEN7,Filter Enable 7" "0,1"
|
|
bitfld.long 0x00 28.--30. "SENSE7,Input Sense Configuration 7" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 27. "FILTEN6,Filter Enable 6" "0,1"
|
|
bitfld.long 0x00 24.--26. "SENSE6,Input Sense Configuration 6" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 23. "FILTEN5,Filter Enable 5" "0,1"
|
|
bitfld.long 0x00 20.--22. "SENSE5,Input Sense Configuration 5" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 19. "FILTEN4,Filter Enable 4" "0,1"
|
|
bitfld.long 0x00 16.--18. "SENSE4,Input Sense Configuration 4" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 15. "FILTEN3,Filter Enable 3" "0,1"
|
|
bitfld.long 0x00 12.--14. "SENSE3,Input Sense Configuration 3" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 11. "FILTEN2,Filter Enable 2" "0,1"
|
|
bitfld.long 0x00 8.--10. "SENSE2,Input Sense Configuration 2" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 7. "FILTEN1,Filter Enable 1" "0,1"
|
|
bitfld.long 0x00 4.--6. "SENSE1,Input Sense Configuration 1" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "FILTEN0,Filter Enable 0" "0,1"
|
|
bitfld.long 0x00 0.--2. "SENSE0,Input Sense Configuration 0" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CONFIG1,External Interrupt Sense Configuration"
|
|
bitfld.long 0x00 31. "FILTEN15,Filter Enable 15" "0,1"
|
|
bitfld.long 0x00 28.--30. "SENSE15,Input Sense Configuration 15" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 27. "FILTEN14,Filter Enable 14" "0,1"
|
|
bitfld.long 0x00 24.--26. "SENSE14,Input Sense Configuration 14" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 23. "FILTEN13,Filter Enable 13" "0,1"
|
|
bitfld.long 0x00 20.--22. "SENSE13,Input Sense Configuration 13" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 19. "FILTEN12,Filter Enable 12" "0,1"
|
|
bitfld.long 0x00 16.--18. "SENSE12,Input Sense Configuration 12" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 15. "FILTEN11,Filter Enable 11" "0,1"
|
|
bitfld.long 0x00 12.--14. "SENSE11,Input Sense Configuration 11" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 11. "FILTEN10,Filter Enable 10" "0,1"
|
|
bitfld.long 0x00 8.--10. "SENSE10,Input Sense Configuration 10" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 7. "FILTEN9,Filter Enable 9" "0,1"
|
|
bitfld.long 0x00 4.--6. "SENSE9,Input Sense Configuration 9" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "FILTEN8,Filter Enable 8" "0,1"
|
|
bitfld.long 0x00 0.--2. "SENSE8,Input Sense Configuration 8" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?..."
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DEBOUNCEN,Debouncer Enable"
|
|
bitfld.long 0x00 15. "DEBOUNCEN15,Debouncer Enable of EXTINT15" "0,1"
|
|
bitfld.long 0x00 14. "DEBOUNCEN14,Debouncer Enable of EXTINT14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "DEBOUNCEN13,Debouncer Enable of EXTINT13" "0,1"
|
|
bitfld.long 0x00 12. "DEBOUNCEN12,Debouncer Enable of EXTINT12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "DEBOUNCEN11,Debouncer Enable of EXTINT11" "0,1"
|
|
bitfld.long 0x00 10. "DEBOUNCEN10,Debouncer Enable of EXTINT10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "DEBOUNCEN9,Debouncer Enable of EXTINT9" "0,1"
|
|
bitfld.long 0x00 8. "DEBOUNCEN8,Debouncer Enable of EXTINT8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "DEBOUNCEN7,Debouncer Enable of EXTINT7" "0,1"
|
|
bitfld.long 0x00 6. "DEBOUNCEN6,Debouncer Enable of EXTINT6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "DEBOUNCEN5,Debouncer Enable of EXTINT5" "0,1"
|
|
bitfld.long 0x00 4. "DEBOUNCEN4,Debouncer Enable of EXTINT4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "DEBOUNCEN3,Debouncer Enable of EXTINT3" "0,1"
|
|
bitfld.long 0x00 2. "DEBOUNCEN2,Debouncer Enable of EXTINT2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DEBOUNCEN1,Debouncer Enable of EXTINT1" "0,1"
|
|
bitfld.long 0x00 0. "DEBOUNCEN0,Debouncer Enable of EXTINT0" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DPRESCALER,Debouncer Prescaler"
|
|
bitfld.long 0x00 16. "TICKON,Pin Sampler frequency selection" "0: Clocked by GCLK,1: Clocked by Low Frequency Clock"
|
|
bitfld.long 0x00 7. "STATES1,Debouncer number of states" "0: 3 low frequency samples,1: 7 low frequency samples"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "PRESCALER1,Debouncer Prescaler" "0: EIC clock divided by 2,1: EIC clock divided by 4,2: EIC clock divided by 8,3: EIC clock divided by 16,4: EIC clock divided by 32,5: EIC clock divided by 64,6: EIC clock divided by 128,7: EIC clock divided by 256"
|
|
bitfld.long 0x00 3. "STATES0,Debouncer number of states" "0: 3 low frequency samples,1: 7 low frequency samples"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "PRESCALER0,Debouncer Prescaler" "0: EIC clock divided by 2,1: EIC clock divided by 4,2: EIC clock divided by 8,3: EIC clock divided by 16,4: EIC clock divided by 32,5: EIC clock divided by 64,6: EIC clock divided by 128,7: EIC clock divided by 256"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "PINSTATE,Pin State"
|
|
bitfld.long 0x00 15. "PINSTATE15,Pin State of EXTINT15" "0,1"
|
|
bitfld.long 0x00 14. "PINSTATE14,Pin State of EXTINT14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "PINSTATE13,Pin State of EXTINT13" "0,1"
|
|
bitfld.long 0x00 12. "PINSTATE12,Pin State of EXTINT12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "PINSTATE11,Pin State of EXTINT11" "0,1"
|
|
bitfld.long 0x00 10. "PINSTATE10,Pin State of EXTINT10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "PINSTATE9,Pin State of EXTINT9" "0,1"
|
|
bitfld.long 0x00 8. "PINSTATE8,Pin State of EXTINT8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "PINSTATE7,Pin State of EXTINT7" "0,1"
|
|
bitfld.long 0x00 6. "PINSTATE6,Pin State of EXTINT6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "PINSTATE5,Pin State of EXTINT5" "0,1"
|
|
bitfld.long 0x00 4. "PINSTATE4,Pin State of EXTINT4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PINSTATE3,Pin State of EXTINT3" "0,1"
|
|
bitfld.long 0x00 2. "PINSTATE2,Pin State of EXTINT2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PINSTATE1,Pin State of EXTINT1" "0,1"
|
|
bitfld.long 0x00 0. "PINSTATE0,Pin State of EXTINT0" "0,1"
|
|
tree.end
|
|
tree "EVSYS (Event System Interface)"
|
|
base ad:0x42000000
|
|
wgroup.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "SWEVT,Software Event"
|
|
bitfld.long 0x00 11. "CHANNEL11,Channel 11 Software Selection" "0,1"
|
|
bitfld.long 0x00 10. "CHANNEL10,Channel 10 Software Selection" "0,1"
|
|
bitfld.long 0x00 9. "CHANNEL9,Channel 9 Software Selection" "0,1"
|
|
bitfld.long 0x00 8. "CHANNEL8,Channel 8 Software Selection" "0,1"
|
|
bitfld.long 0x00 7. "CHANNEL7,Channel 7 Software Selection" "0,1"
|
|
bitfld.long 0x00 6. "CHANNEL6,Channel 6 Software Selection" "0,1"
|
|
bitfld.long 0x00 5. "CHANNEL5,Channel 5 Software Selection" "0,1"
|
|
bitfld.long 0x00 4. "CHANNEL4,Channel 4 Software Selection" "0,1"
|
|
bitfld.long 0x00 3. "CHANNEL3,Channel 3 Software Selection" "0,1"
|
|
bitfld.long 0x00 2. "CHANNEL2,Channel 2 Software Selection" "0,1"
|
|
bitfld.long 0x00 1. "CHANNEL1,Channel 1 Software Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CHANNEL0,Channel 0 Software Selection" "0,1"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "PRICTRL,Priority Control"
|
|
bitfld.byte 0x00 7. "RREN,Round-Robin Scheduling Enable" "0,1"
|
|
bitfld.byte 0x00 0.--2. "PRI,Channel Priority Number" "0,1,2,3,4,5,6,7"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "INTPEND,Channel Pending Interrupt"
|
|
bitfld.word 0x00 15. "BUSY,Busy" "0,1"
|
|
bitfld.word 0x00 14. "READY,Ready" "0,1"
|
|
bitfld.word 0x00 9. "EVD,Channel Event Detected" "0,1"
|
|
bitfld.word 0x00 8. "OVR,Channel Overrun" "0,1"
|
|
bitfld.word 0x00 0.--2. "ID,Channel ID" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "INTSTATUS,Interrupt Status"
|
|
bitfld.long 0x00 7. "CHINT7,Channel 7 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 6. "CHINT6,Channel 6 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 5. "CHINT5,Channel 5 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 4. "CHINT4,Channel 4 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 3. "CHINT3,Channel 3 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 2. "CHINT2,Channel 2 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CHINT1,Channel 1 Pending Interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHINT0,Channel 0 Pending Interrupt" "0,1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "BUSYCH,Busy Channels"
|
|
bitfld.long 0x00 7. "BUSYCH7,Busy Channel 7" "0,1"
|
|
bitfld.long 0x00 6. "BUSYCH6,Busy Channel 6" "0,1"
|
|
bitfld.long 0x00 5. "BUSYCH5,Busy Channel 5" "0,1"
|
|
bitfld.long 0x00 4. "BUSYCH4,Busy Channel 4" "0,1"
|
|
bitfld.long 0x00 3. "BUSYCH3,Busy Channel 3" "0,1"
|
|
bitfld.long 0x00 2. "BUSYCH2,Busy Channel 2" "0,1"
|
|
bitfld.long 0x00 1. "BUSYCH1,Busy Channel 1" "0,1"
|
|
bitfld.long 0x00 0. "BUSYCH0,Busy Channel 0" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "READYUSR,Ready Users"
|
|
bitfld.long 0x00 7. "READYUSR7,Ready User for Channel 7" "0,1"
|
|
bitfld.long 0x00 6. "READYUSR6,Ready User for Channel 6" "0,1"
|
|
bitfld.long 0x00 5. "READYUSR5,Ready User for Channel 5" "0,1"
|
|
bitfld.long 0x00 4. "READYUSR4,Ready User for Channel 4" "0,1"
|
|
bitfld.long 0x00 3. "READYUSR3,Ready User for Channel 3" "0,1"
|
|
bitfld.long 0x00 2. "READYUSR2,Ready User for Channel 2" "0,1"
|
|
bitfld.long 0x00 1. "READYUSR1,Ready User for Channel 1" "0,1"
|
|
bitfld.long 0x00 0. "READYUSR0,Ready User for Channel 0" "0,1"
|
|
repeat 52. (increment 0 1) (increment 0 0x01)
|
|
group.byte ($2+0x120)++0x00
|
|
line.byte 0x00 "USER[$1],User Multiplexer n $1"
|
|
bitfld.byte 0x00 0.--3. "CHANNEL,Channel Event Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
repeat 12. (increment 0 1)(increment 0 0x8)
|
|
tree "CHANNEL[$1]"
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "CHANNEL,Channel n Control"
|
|
bitfld.long 0x00 15. "ONDEMAND,Generic Clock On Demand" "0,1"
|
|
bitfld.long 0x00 14. "RUNSTDBY,Run in standby" "0,1"
|
|
bitfld.long 0x00 10.--11. "EDGSEL,Edge Detection Selection" "0: No event output when using the resynchronized..,1: Event detection only on the rising edge of..,2: Event detection only on the falling edge of..,3: Event detection on rising and falling edges.."
|
|
bitfld.long 0x00 8.--9. "PATH,Path Selection" "0: Synchronous path,1: Resynchronized path,2: Asynchronous path,?..."
|
|
hexmask.long.byte 0x00 0.--6. 1. "EVGEN,Event Generator Selection"
|
|
group.byte ($2+0x24)++0x00
|
|
line.byte 0x00 "CHINTENCLR,Channel n Interrupt Enable Clear"
|
|
bitfld.byte 0x00 1. "EVD,Channel Event Detected Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 0. "OVR,Channel Overrun Interrupt Disable" "0,1"
|
|
group.byte ($2+0x25)++0x00
|
|
line.byte 0x00 "CHINTENSET,Channel n Interrupt Enable Set"
|
|
bitfld.byte 0x00 1. "EVD,Channel Event Detected Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "OVR,Channel Overrun Interrupt Enable" "0,1"
|
|
group.byte ($2+0x26)++0x00
|
|
line.byte 0x00 "CHINTFLAG,Channel n Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 1. "EVD,Channel Event Detected" "0,1"
|
|
bitfld.byte 0x00 0. "OVR,Channel Overrun" "0,1"
|
|
rgroup.byte ($2+0x27)++0x00
|
|
line.byte 0x00 "CHSTATUS,Channel n Status"
|
|
bitfld.byte 0x00 1. "BUSYCH,Busy Channel" "0,1"
|
|
bitfld.byte 0x00 0. "RDYUSR,Ready User" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "FPB (Flash Patch and Breakpoint)"
|
|
base ad:0xE0002000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. "REV,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "NUM_CODE_1,Number of implemented code comparators bits [6:4]" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "NUM_LIT,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "NUM_CODE,Number of implemented code comparators bits [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. "KEY,FP_CTRL write-enable key" "0,1"
|
|
bitfld.long 0x00 0. "ENABLE,Flash Patch global enable" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x00 29. "RMPSPT,Remap supported" "0,1"
|
|
hexmask.long.tbyte 0x00 5.--28. 1. "REMAP,Remap address"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "FP_COMP[$1],Flash Patch Comparator Register n $1"
|
|
bitfld.long 0x00 31. "FE,Flash Patch enable" "0,1"
|
|
hexmask.long 0x00 2.--28. 1. "FPADDR,Flash Patch address"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "0,1"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "FP_COMP_BREAKPOINT_MODE[$1],Flash Patch Comparator Register n $1"
|
|
hexmask.long 0x00 1.--31. 1. "BPADDR,Breakpoint address"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "0,1"
|
|
repeat.end
|
|
wgroup.long 0xFB0++0x03
|
|
line.long 0x00 "FP_LAR,FPB Software Lock Access Register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,Lock access control"
|
|
rgroup.long 0xFB4++0x03
|
|
line.long 0x00 "FP_LSR,FPB Software Lock Status Register"
|
|
bitfld.long 0x00 2. "nTT,Not thirty-two bit" "0,1"
|
|
bitfld.long 0x00 1. "SLK,Software Lock status" "0,1"
|
|
bitfld.long 0x00 0. "SLI,Software Lock implemented" "0,1"
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. "ARCHITECT,Architect"
|
|
bitfld.long 0x00 20. "PRESENT,DEVARCH Present" "0,1"
|
|
bitfld.long 0x00 16.--19. "REVISION,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "ARCHVER,Architecture Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. "ARCHPART,Architecture Part"
|
|
rgroup.long 0xFCC++0x03
|
|
line.long 0x00 "FP_DEVTYPE,FPB Device Type Register"
|
|
bitfld.long 0x00 4.--7. "SUB,Sub-type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "MAJOR,Major type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "FP_PIDR4,FP Peripheral Identification Register 4"
|
|
bitfld.long 0x00 4.--7. "SIZE,4KB count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "DES_2,JEP106 continuation code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat 3. (strings "5" "6" "7" )(list 0x00 0x04 0x08 )
|
|
rgroup.long ($2+0xFD4)++0x03
|
|
line.long 0x00 "FP_PIDR$1,FP Peripheral Identification Register $1"
|
|
repeat.end
|
|
rgroup.long 0xFE0++0x03
|
|
line.long 0x00 "FP_PIDR0,FP Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PART_0,Part number bits[7:0]"
|
|
rgroup.long 0xFE4++0x03
|
|
line.long 0x00 "FP_PIDR1,FP Peripheral Identification Register 1"
|
|
bitfld.long 0x00 4.--7. "DES_0,JEP106 identification code bits [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PART_1,Part number bits[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFE8++0x03
|
|
line.long 0x00 "FP_PIDR2,FP Peripheral Identification Register 2"
|
|
bitfld.long 0x00 4.--7. "REVISION,Component revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "JEDEC,JEDEC assignee value is used" "0,1"
|
|
bitfld.long 0x00 0.--2. "DES_1,JEP106 identification code bits[6:4]" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xFEC++0x03
|
|
line.long 0x00 "FP_PIDR3,FP Peripheral Identification Register 3"
|
|
bitfld.long 0x00 4.--7. "REVAND,RevAnd" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "CMOD,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFF0++0x03
|
|
line.long 0x00 "FP_CIDR0,FP Component Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_0,CoreSight component identification preamble"
|
|
rgroup.long 0xFF4++0x03
|
|
line.long 0x00 "FP_CIDR1,FP Component Identification Register 1"
|
|
bitfld.long 0x00 4.--7. "CLASS,CoreSight component class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PRMBL_1,CoreSight component identification preamble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFF8++0x03
|
|
line.long 0x00 "FP_CIDR2,FP Component Identification Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_2,CoreSight component identification preamble"
|
|
rgroup.long 0xFFC++0x03
|
|
line.long 0x00 "FP_CIDR3,FP Component Identification Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRMBL_3,CoreSight component identification preamble"
|
|
tree.end
|
|
tree "FREQM (Frequency Meter)"
|
|
base ad:0x40002C00
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A Register"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
wgroup.byte 0x01++0x00
|
|
line.byte 0x00 "CTRLB,Control B Register"
|
|
bitfld.byte 0x00 0. "START,Start Measurement" "0,1"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CFGA,Config A register"
|
|
bitfld.word 0x00 15. "DIVREF,Divide Reference Clock" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. "REFNUM,Number of Reference Clock Cycles"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear Register"
|
|
bitfld.byte 0x00 0. "DONE,Measurement Done Interrupt Enable" "0,1"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set Register"
|
|
bitfld.byte 0x00 0. "DONE,Measurement Done Interrupt Enable" "0,1"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Register"
|
|
bitfld.byte 0x00 0. "DONE,Measurement Done" "0,1"
|
|
group.byte 0x0B++0x00
|
|
line.byte 0x00 "STATUS,Status Register"
|
|
bitfld.byte 0x00 1. "OVF,Sticky Count Value Overflow" "0,1"
|
|
bitfld.byte 0x00 0. "BUSY,FREQM Status" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "VALUE,Count Value Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "VALUE,Measurement Value"
|
|
tree.end
|
|
tree "GCLK (Generic Clock Generator)"
|
|
base ad:0x40001C00
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x00 9. "GENCTRL7,Generic Clock Generator Control 7 Synchronization Busy bit" "0,1"
|
|
bitfld.long 0x00 8. "GENCTRL6,Generic Clock Generator Control 6 Synchronization Busy bit" "0,1"
|
|
bitfld.long 0x00 7. "GENCTRL5,Generic Clock Generator Control 5 Synchronization Busy bit" "0,1"
|
|
bitfld.long 0x00 6. "GENCTRL4,Generic Clock Generator Control 4 Synchronization Busy bit" "0,1"
|
|
bitfld.long 0x00 5. "GENCTRL3,Generic Clock Generator Control 3 Synchronization Busy bit" "0,1"
|
|
bitfld.long 0x00 4. "GENCTRL2,Generic Clock Generator Control 2 Synchronization Busy bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GENCTRL1,Generic Clock Generator Control 1 Synchronization Busy bit" "0,1"
|
|
bitfld.long 0x00 2. "GENCTRL0,Generic Clock Generator Control 0 Synchronization Busy bit" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy bit" "0,1"
|
|
repeat 8. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "GENCTRL[$1],Generic Clock Generator Control $1"
|
|
hexmask.long.word 0x00 16.--31. 1. "DIV,Division Factor"
|
|
bitfld.long 0x00 13. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x00 12. "DIVSEL,Divide Selection" "0: Division by GENCTRLn.DIV,1: Division by 2^(GENCTRLn.DIV+1)"
|
|
bitfld.long 0x00 11. "OE,Output Enable" "0,1"
|
|
bitfld.long 0x00 10. "OOV,Output Off Value" "0,1"
|
|
bitfld.long 0x00 9. "IDC,Improve Duty Cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "GENEN,Generic Clock Generator Enable" "0,1"
|
|
bitfld.long 0x00 0.--3. "SRC,Source Select" "0: XOSC oscillator output,1: Generator input pad (GCLK_IO),2: Generic clock generator 1 output,3: OSCULP32K oscillator output,4: XOSC32K oscillator output,5: OSC16M oscillator output,6: DFLLULP output,7: DFLL48M output,8: FDPLL96M output,?..."
|
|
repeat.end
|
|
repeat 35. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x80)++0x03
|
|
line.long 0x00 "PCHCTRL[$1],Peripheral Clock Control $1"
|
|
bitfld.long 0x00 7. "WRTLOCK,Write Lock" "0,1"
|
|
bitfld.long 0x00 6. "CHEN,Channel Enable" "0,1"
|
|
bitfld.long 0x00 0.--2. "GEN,Generic Clock Generator" "0: Generic clock generator 0,1: Generic clock generator 1,2: Generic clock generator 2,3: Generic clock generator 3,4: Generic clock generator 4,5: Generic clock generator 5,6: Generic clock generator 6,7: Generic clock generator 7"
|
|
repeat.end
|
|
tree.end
|
|
tree "I2S (Inter-Integrated Sound Bus Controller)"
|
|
base ad:0x42004C00
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 5. "RXEN,Rx Serializer Enable" "0,1"
|
|
bitfld.byte 0x00 4. "TXEN,Tx Serializer Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "CKEN1,Clock Unit 1 Enable" "0,1"
|
|
bitfld.byte 0x00 2. "CKEN0,Clock Unit 0 Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x04)++0x03
|
|
line.long 0x00 "CLKCTRL[$1],Clock Unit n Control $1"
|
|
bitfld.long 0x00 24.--29. "MCKOUTDIV,Master Clock Output Division Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. "MCKDIV,Master Clock Division Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 15. "MCKOUTINV,Master Clock Output Invert" "0,1"
|
|
bitfld.long 0x00 14. "MCKEN,Master Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "MCKSEL,Master Clock Select" "0: GCLK_I2S_n is used as Master Clock n source,1: MCKn input pin is used as Master Clock n source"
|
|
bitfld.long 0x00 12. "SCKOUTINV,Serial Clock Output Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SCKSEL,Serial Clock Select" "0: Divided Master Clock n is used as Serial..,1: SCKn input pin is used as Serial Clock n source"
|
|
bitfld.long 0x00 10. "FSOUTINV,Frame Sync Output Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "FSINV,Frame Sync Invert" "0,1"
|
|
bitfld.long 0x00 8. "FSSEL,Frame Sync Select" "0: Divided Serial Clock n is used as Frame Sync..,1: FSn input pin is used as Frame Sync n source"
|
|
newline
|
|
bitfld.long 0x00 7. "BITDELAY,Data Delay from Frame Sync" "0: Left Justified (0 Bit Delay),1: I2S (1 Bit Delay)"
|
|
bitfld.long 0x00 5.--6. "FSWIDTH,Frame Sync Width" "0: Frame Sync Pulse is 1 Slot wide (default for..,1: Frame Sync Pulse is half a Frame wide,2: Frame Sync Pulse is 1 Bit wide,3: Clock Unit n operates in Burst mode with a.."
|
|
newline
|
|
bitfld.long 0x00 2.--4. "NBSLOTS,Number of Slots in Frame" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. "SLOTSIZE,Slot Size" "0: 8-bit Slot for Clock Unit n,1: 16-bit Slot for Clock Unit n,2: 24-bit Slot for Clock Unit n,3: 32-bit Slot for Clock Unit n"
|
|
repeat.end
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.word 0x00 13. "TXUR1,Transmit Underrun 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 12. "TXUR0,Transmit Underrun 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "TXRDY1,Transmit Ready 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 8. "TXRDY0,Transmit Ready 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "RXOR1,Receive Overrun 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 4. "RXOR0,Receive Overrun 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "RXRDY1,Receive Ready 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 0. "RXRDY0,Receive Ready 0 Interrupt Enable" "0,1"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.word 0x00 13. "TXUR1,Transmit Underrun 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 12. "TXUR0,Transmit Underrun 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "TXRDY1,Transmit Ready 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 8. "TXRDY0,Transmit Ready 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "RXOR1,Receive Overrun 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 4. "RXOR0,Receive Overrun 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "RXRDY1,Receive Ready 1 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 0. "RXRDY0,Receive Ready 0 Interrupt Enable" "0,1"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.word 0x00 13. "TXUR1,Transmit Underrun 1" "0,1"
|
|
bitfld.word 0x00 12. "TXUR0,Transmit Underrun 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "TXRDY1,Transmit Ready 1" "0,1"
|
|
bitfld.word 0x00 8. "TXRDY0,Transmit Ready 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "RXOR1,Receive Overrun 1" "0,1"
|
|
bitfld.word 0x00 4. "RXOR0,Receive Overrun 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "RXRDY1,Receive Ready 1" "0,1"
|
|
bitfld.word 0x00 0. "RXRDY0,Receive Ready 0" "0,1"
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "SYNCBUSY,Synchronization Status"
|
|
bitfld.word 0x00 9. "RXDATA,Rx Data Synchronization Status" "0,1"
|
|
bitfld.word 0x00 8. "TXDATA,Tx Data Synchronization Status" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "RXEN,Rx Serializer Enable Synchronization Status" "0,1"
|
|
bitfld.word 0x00 4. "TXEN,Tx Serializer Enable Synchronization Status" "0,1"
|
|
newline
|
|
bitfld.word 0x00 3. "CKEN1,Clock Unit 1 Enable Synchronization Status" "0,1"
|
|
bitfld.word 0x00 2. "CKEN0,Clock Unit 0 Enable Synchronization Status" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "ENABLE,Enable Synchronization Status" "0,1"
|
|
bitfld.word 0x00 0. "SWRST,Software Reset Synchronization Status" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TXCTRL,Tx Serializer Control"
|
|
bitfld.long 0x00 25. "DMA,Single or Multiple DMA Channels" "0: Single DMA channel,1: One DMA channel per data channel"
|
|
bitfld.long 0x00 24. "MONO,Mono Mode" "0: Normal mode,1: Left channel data is duplicated to right.."
|
|
newline
|
|
bitfld.long 0x00 23. "SLOTDIS7,Slot 7 Disabled for this Serializer" "0,1"
|
|
bitfld.long 0x00 22. "SLOTDIS6,Slot 6 Disabled for this Serializer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SLOTDIS5,Slot 5 Disabled for this Serializer" "0,1"
|
|
bitfld.long 0x00 20. "SLOTDIS4,Slot 4 Disabled for this Serializer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "SLOTDIS3,Slot 3 Disabled for this Serializer" "0,1"
|
|
bitfld.long 0x00 18. "SLOTDIS2,Slot 2 Disabled for this Serializer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "SLOTDIS1,Slot 1 Disabled for this Serializer" "0,1"
|
|
bitfld.long 0x00 16. "SLOTDIS0,Slot 0 Disabled for this Serializer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "BITREV,Data Formatting Bit Reverse" "0: Transfer Data Most Significant Bit (MSB)..,1: Transfer Data Least Significant Bit (LSB) first"
|
|
bitfld.long 0x00 13.--14. "EXTEND,Data Formatting Bit Extension" "0: Extend with zeroes,1: Extend with ones,2: Extend with Most Significant Bit,3: Extend with Least Significant Bit"
|
|
newline
|
|
bitfld.long 0x00 12. "WORDADJ,Data Word Formatting Adjust" "0: Data is right adjusted in word,1: Data is left adjusted in word"
|
|
bitfld.long 0x00 8.--10. "DATASIZE,Data Word Size" "0: 32 bits,1: 24 bits,2: 20 bits,3: 18 bits,4: 16 bits,5: 16 bits compact stereo,6: 8 bits,7: 8 bits compact stereo"
|
|
newline
|
|
bitfld.long 0x00 7. "SLOTADJ,Data Slot Formatting Adjust" "0: Data is right adjusted in slot,1: Data is left adjusted in slot"
|
|
bitfld.long 0x00 4. "TXSAME,Transmit Data when Underrun" "0: Zero data transmitted in case of underrun,1: Last data transmitted in case of underrun"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "TXDEFAULT,Line Default Line when Slot Disabled" "0: Output Default Value is 0,1: Output Default Value is 1,?,3: Output Default Value is high impedance"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RXCTRL,Rx Serializer Control"
|
|
bitfld.long 0x00 26. "RXLOOP,Loop-back Test Mode" "0,1"
|
|
bitfld.long 0x00 25. "DMA,Single or Multiple DMA Channels" "0: Single DMA channel,1: One DMA channel per data channel"
|
|
newline
|
|
bitfld.long 0x00 24. "MONO,Mono Mode" "0: Normal mode,1: Left channel data is duplicated to right.."
|
|
bitfld.long 0x00 23. "SLOTDIS7,Slot 7 Disabled for this Serializer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "SLOTDIS6,Slot 6 Disabled for this Serializer" "0,1"
|
|
bitfld.long 0x00 21. "SLOTDIS5,Slot 5 Disabled for this Serializer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "SLOTDIS4,Slot 4 Disabled for this Serializer" "0,1"
|
|
bitfld.long 0x00 19. "SLOTDIS3,Slot 3 Disabled for this Serializer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "SLOTDIS2,Slot 2 Disabled for this Serializer" "0,1"
|
|
bitfld.long 0x00 17. "SLOTDIS1,Slot 1 Disabled for this Serializer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SLOTDIS0,Slot 0 Disabled for this Serializer" "0,1"
|
|
bitfld.long 0x00 15. "BITREV,Data Formatting Bit Reverse" "0: Transfer Data Most Significant Bit (MSB)..,1: Transfer Data Least Significant Bit (LSB) first"
|
|
newline
|
|
bitfld.long 0x00 13.--14. "EXTEND,Data Formatting Bit Extension" "0: Extend with zeroes,1: Extend with ones,2: Extend with Most Significant Bit,3: Extend with Least Significant Bit"
|
|
bitfld.long 0x00 12. "WORDADJ,Data Word Formatting Adjust" "0: Data is right adjusted in word,1: Data is left adjusted in word"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "DATASIZE,Data Word Size" "0: 32 bits,1: 24 bits,2: 20 bits,3: 18 bits,4: 16 bits,5: 16 bits compact stereo,6: 8 bits,7: 8 bits compact stereo"
|
|
bitfld.long 0x00 7. "SLOTADJ,Data Slot Formatting Adjust" "0: Data is right adjusted in slot,1: Data is left adjusted in slot"
|
|
newline
|
|
bitfld.long 0x00 5. "CLKSEL,Clock Unit Selection" "0: Use Clock Unit 0,1: Use Clock Unit 1"
|
|
bitfld.long 0x00 0.--1. "SERMODE,Serializer Mode" "0: Receive,?,2: Receive one PDM data on each serial clock edge,?..."
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "TXDATA,Tx Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Sample Data"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "RXDATA,Rx Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Sample Data"
|
|
tree.end
|
|
tree "ICB (Implementation Control Block)"
|
|
base ad:0xE000E000
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. "INTLINESNUM,Interrupt line set number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
tree.end
|
|
tree "MCLK (Main Clock)"
|
|
base ad:0x40000800
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control"
|
|
bitfld.byte 0x00 2. "CKSEL,Clock Select" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 0. "CKRDY,Clock Ready Interrupt Enable" "0,1"
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 0. "CKRDY,Clock Ready Interrupt Enable" "0,1"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 0. "CKRDY,Clock Ready" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "CPUDIV,CPU Clock Division"
|
|
hexmask.byte 0x00 0.--7. 1. "CPUDIV,CPU Clock Division Factor"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "AHBMASK,AHB Mask"
|
|
bitfld.long 0x00 13. "USB_,USB AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 12. "TRAM_,TRAM AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 7. "NVMCTRL_,NVMCTRL AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 6. "PAC_,PAC AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 5. "HMATRIXHS_,HMATRIXHS AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 4. "DSU_,DSU AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 3. "DMAC_,DMAC AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 2. "APBC_,APBC AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 1. "APBB_,APBB AHB Clock Mask" "0,1"
|
|
bitfld.long 0x00 0. "APBA_,APBA AHB Clock Mask" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "APBAMASK,APBA Mask"
|
|
bitfld.long 0x00 13. "AC_,AC APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 12. "PORT_,PORT APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 11. "FREQM_,FREQM APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 10. "EIC_,EIC APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 9. "RTC_,RTC APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 8. "WDT_,WDT APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 7. "GCLK_,GCLK APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 6. "SUPC_,SUPC APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 5. "OSC32KCTRL_,OSC32KCTRL APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 4. "OSCCTRL_,OSCCTRL APB Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSTC_,RSTC APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 2. "MCLK_,MCLK APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. "PM_,PM APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 0. "PAC_,PAC APB Clock Enable" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "APBBMASK,APBB Mask"
|
|
bitfld.long 0x00 5. "USB_,USB APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 4. "HMATRIXHS_,HMATRIXHS APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 2. "NVMCTRL_,NVMCTRL APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. "DSU_,DSU APB Clock Enable" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "APBCMASK,APBC Mask"
|
|
bitfld.long 0x00 20. "OPAMP_,OPAMP APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 19. "I2S_,I2S APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 18. "CCL_,CCL APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 17. "TRNG_,TRNG APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 16. "PTC_,PTC APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 15. "DAC_,DAC APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 14. "ADC_,ADC APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 13. "TCC3_,TCC3 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 12. "TCC2_,TCC2 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 11. "TCC1_,TCC1 APB Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "TCC0_,TCC0 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 9. "TC2_,TC2 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 8. "TC1_,TC1 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 7. "TC0_,TC0 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 6. "SERCOM5_,SERCOM5 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 5. "SERCOM4_,SERCOM4 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 4. "SERCOM3_,SERCOM3 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 3. "SERCOM2_,SERCOM2 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 2. "SERCOM1_,SERCOM1 APB Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. "SERCOM0_,SERCOM0 APB Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EVSYS_,EVSYS APB Clock Enable" "0,1"
|
|
tree.end
|
|
tree "MPU (Memory Protection Unit)"
|
|
base ad:0xE000ED90
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TYPE,MPU Type Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "DREGION,Number of MPU data regions"
|
|
bitfld.long 0x00 0. "SEPARATE,Separate instructions and data address regions" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. "PRIVDEFENA,Privileged default enable" "0,1"
|
|
bitfld.long 0x00 1. "HFNMIENA,HardFault NMI enable" "0,1"
|
|
bitfld.long 0x00 0. "ENABLE,MPU enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "REGION,Selected region number"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RBAR,MPU Region Base Address Register"
|
|
hexmask.long 0x00 5.--31. 1. "BASE,Base address"
|
|
bitfld.long 0x00 3.--4. "SH,Shareability" "0: Non-shareable,?,2: Outer shareable,3: Inner shareable"
|
|
bitfld.long 0x00 1.--2. "AP,Access permissions" "0: Read/write by privileged code only,1: Read/write by any privilege level,2: Read-only by privileged code only,3: Read-only by any privilege level"
|
|
bitfld.long 0x00 0. "XN,Execute Never" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RLAR,MPU Region Limit Address Register"
|
|
hexmask.long 0x00 5.--31. 1. "LIMIT,Limit address"
|
|
bitfld.long 0x00 1.--3. "AttrInd,Attribute Index" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "EN,Region enable" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MAIR0,MPU Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. "Attr3,Attribute of MPU region 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. "Attr2,Attribute of MPU region 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. "Attr1,Attribute of MPU region 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "Attr0,Attribute of MPU region 0"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MAIR1,MPU Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "Attr7,Attribute of MPU region 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. "Attr6,Attribute of MPU region 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. "Attr5,Attribute of MPU region 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. "Attr4,Attribute of MPU region 4"
|
|
tree.end
|
|
tree "NVIC (Nested Vectored Interrupt Controller)"
|
|
base ad:0xE000E100
|
|
repeat 3. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "ISER[$1],Interrupt Set Enable Register n $1"
|
|
hexmask.long 0x00 0.--31. 1. "SETENA,Set enable"
|
|
repeat.end
|
|
repeat 3. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x80)++0x03
|
|
line.long 0x00 "ICER[$1],Interrupt Clear Enable Register n $1"
|
|
hexmask.long 0x00 0.--31. 1. "CLRENA,Clear enable"
|
|
repeat.end
|
|
repeat 3. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "ISPR[$1],Interrupt Set Pending Register n $1"
|
|
hexmask.long 0x00 0.--31. 1. "SETPEND,Set pending"
|
|
repeat.end
|
|
repeat 3. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x180)++0x03
|
|
line.long 0x00 "ICPR[$1],Interrupt Clear Pending Register n $1"
|
|
hexmask.long 0x00 0.--31. 1. "CLRPEND,Clear pending"
|
|
repeat.end
|
|
repeat 3. (increment 0 1) (increment 0 0x04)
|
|
rgroup.long ($2+0x200)++0x03
|
|
line.long 0x00 "IABR[$1],Interrupt Active Bit Register n $1"
|
|
hexmask.long 0x00 0.--31. 1. "ACTIVE,Active state"
|
|
repeat.end
|
|
repeat 3. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x280)++0x03
|
|
line.long 0x00 "ITNS[$1],Interrupt Target Non-secure Register n $1"
|
|
hexmask.long 0x00 0.--31. 1. "ITNS,Interrupt Targets Non-secure"
|
|
repeat.end
|
|
repeat 18. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x300)++0x03
|
|
line.long 0x00 "IPR[$1],Interrupt Priority Register n $1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PRI_N3,Priority of interrupt number 4n+3"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PRI_N2,Priority of interrupt number 4n+2"
|
|
hexmask.long.byte 0x00 8.--15. 1. "PRI_N1,Priority of interrupt number 4n+1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRI_N0,Priority of interrupt number 4n+0"
|
|
repeat.end
|
|
tree.end
|
|
tree "NVMCTRL (Non-Volatile Memory Controller)"
|
|
base ad:0x41004000
|
|
wgroup.word 0x00++0x01
|
|
line.word 0x00 "CTRLA,Control A"
|
|
hexmask.word.byte 0x00 8.--15. 1. "CMDEX,Command Execution"
|
|
hexmask.word.byte 0x00 0.--6. 1. "CMD,Command"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRLB,Control B"
|
|
bitfld.long 0x00 18. "CACHEDIS,Cache Disable" "0,1"
|
|
bitfld.long 0x00 16.--17. "READMODE,NVMCTRL Read Mode" "0: The NVM Controller (cache system) does not..,1: Reduces power consumption of the cache system..,2: The cache system ensures that a cache hit or..,?..."
|
|
newline
|
|
bitfld.long 0x00 11. "FWUP,fast wake-up" "0,1"
|
|
bitfld.long 0x00 8.--9. "SLEEPPRM,Power Reduction Mode during Sleep" "0: NVM block enters low-power mode when entering..,1: NVM block enters low-power mode when entering..,?,3: Auto power reduction disabled"
|
|
newline
|
|
bitfld.long 0x00 1.--4. "RWS,NVM Read Wait States" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "CTRLC,Control C"
|
|
bitfld.byte 0x00 0. "MANW,Manual" "0,1"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "EVCTRL,Event Control"
|
|
bitfld.byte 0x00 1. "AUTOWINV,Auto Write Event Polarity Inverted" "0,1"
|
|
bitfld.byte 0x00 0. "AUTOWEI,Auto Write Event Enable" "0,1"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 4. "KEYE,Key Write Error Interrupt Clear" "0,1"
|
|
bitfld.byte 0x00 3. "NVME,NVM Error Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "LOCKE,Lock Error Status Interrupt Clear" "0,1"
|
|
bitfld.byte 0x00 1. "PROGE,Programming Error Status Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DONE,NVM Done Interrupt Clear" "0,1"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 4. "KEYE,Key Write Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 3. "NVME,NVM Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "LOCKE,Lock Error Status Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "PROGE,Programming Error Status Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DONE,NVM Done Interrupt Enable" "0,1"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 4. "KEYE,KEY Write Error" "0,1"
|
|
bitfld.byte 0x00 3. "NVME,NVM Error" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "LOCKE,Lock Error Status" "0,1"
|
|
bitfld.byte 0x00 1. "PROGE,Programming Error Status" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DONE,NVM Done" "0,1"
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "STATUS,Status"
|
|
bitfld.word 0x00 3.--4. "DALFUSE,Debug Access Level Fuse" "0: Access to very limited features,?,2: Access to all memory,?..."
|
|
bitfld.word 0x00 2. "READY,NVM Ready" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "LOAD,NVM Page Buffer Active Loading" "0,1"
|
|
bitfld.word 0x00 0. "PRM,Power Reduction Mode" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ADDR,Address"
|
|
bitfld.long 0x00 22.--23. "ARRAY,Array Select" "0: FLASH,1: DATA FLASH,2: NVM Configuration Rows,?..."
|
|
hexmask.long.word 0x00 0.--15. 1. "AOFFSET,NVM Address Offset In The Selected Array"
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "NSULCK,Non-Secure Unlock Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. "NSLKEY,Write Key"
|
|
bitfld.word 0x00 2. "DNS,Non-Secure Data Region" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "ANS,Non-Secure Application Region" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PARAM,NVM Parameter"
|
|
hexmask.long.word 0x00 20.--31. 1. "DFLASHP,DATAFLASH Pages"
|
|
bitfld.long 0x00 16.--18. "PSZ,Page Size" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes,4: 128 bytes,5: 256 bytes,6: 512 bytes,7: 1024 bytes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "FLASHP,FLASH Pages"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SECCTRL,Security Control"
|
|
hexmask.long.byte 0x00 24.--31. 1. "KEY,Write Key"
|
|
bitfld.long 0x00 8.--10. "TEROW,Tamper Rease Row" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "SILACC,Silent Access" "0,1"
|
|
bitfld.long 0x00 0. "TAMPEEN,Tamper Erase Enable" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "SCFGB,Secure Boot Configuration"
|
|
bitfld.long 0x00 1. "BCWEN,Boot Configuration Row Write Enable" "0,1"
|
|
bitfld.long 0x00 0. "BCREN,Boot Configuration Row Read Enable" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "SCFGAD,Secure Application and Data Configuration"
|
|
bitfld.long 0x00 0. "URWEN,User Row Write Enable" "0,1"
|
|
tree.end
|
|
tree "OPAMP (Operational Amplifier)"
|
|
base ad:0x42005000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 7. "LPMUX,Low-Power Mux" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
rgroup.byte 0x02++0x00
|
|
line.byte 0x00 "STATUS,Status"
|
|
bitfld.byte 0x00 2. "READY2,OPAMP 2 Ready" "0,1"
|
|
bitfld.byte 0x00 1. "READY1,OPAMP 1 Ready" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "READY0,OPAMP 0 Ready" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OPAMPCTRL0,OPAMP0 Control"
|
|
bitfld.long 0x00 20.--23. "MUXNEG,Negative Input Mux Selection" "0: OPAMP0 Negative Input,1: OPAMP0 Resistor ladder taps,2: DAC VOUT0 or OPAMP Reference Output Voltage..,3: OPAMP0 Output,?..."
|
|
bitfld.long 0x00 16.--19. "MUXPOS,Positive Input Mux Selection" "0: OPAMP0 Positive Input,1: OPAMP0 Resistor ladder taps,2: REFERENCE or DAC VOUT0 Output,3: Ground,?..."
|
|
newline
|
|
bitfld.long 0x00 13.--15. "POTMUX,Potentiometer Selection" "0: R1 = 14R R2 = 2R,1: R1 = 12R R2 = 4R,2: R1 = 8R R2 = 8R,3: R1 = 6R R2 = 10R,4: R1 = 4R R2 = 12R,5: R1 = 3R R2 = 13R,6: R1 = 2R R2 = 14R,7: R1 = 1R R2 = 15R"
|
|
bitfld.long 0x00 10.--12. "RES1MUX,Resistor 1 Mux" "0: OPAMP0 Positive Input,1: OPAMP0 Negative Input,2: DAC VOUT0 or OPAMP Reference Output Voltage..,3: Ground,4: RG_CONN,?..."
|
|
newline
|
|
bitfld.long 0x00 9. "RES1EN,Resistor 1 Enable" "0,1"
|
|
bitfld.long 0x00 8. "RES2OUT,Resistor ladder To Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RES2VCC,Resistor ladder To VCC" "0,1"
|
|
bitfld.long 0x00 3.--4. "BIAS,Bias Selection" "0: Minimum current consumption but the slowest..,1: Low current consumption slow speed,2: High current consumption fast speed,3: Maximum current consumption but the fastest.."
|
|
newline
|
|
bitfld.long 0x00 2. "ANAOUT,Analog Output" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Operational Amplifier Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OPAMPCTRL1,OPAMP1 Control"
|
|
bitfld.long 0x00 20.--23. "MUXNEG,Negative Input Mux Selection" "0: OPAMP0 Negative Input,1: OPAMP0 Resistor ladder taps,2: DAC VOUT0 or OPAMP Reference Output Voltage..,3: OPAMP0 Output,?..."
|
|
bitfld.long 0x00 16.--19. "MUXPOS,Positive Input Mux Selection" "0: OPAMP1 Positive Input,1: OPAMP1 Resistor ladder taps,2: REFERENCE or DAC VOUT0 Output,3: Ground,4: OPAMP0 output,?..."
|
|
newline
|
|
bitfld.long 0x00 13.--15. "POTMUX,Potentiometer Selection" "0: R1 = 14R R2 = 2R,1: R1 = 12R R2 = 4R,2: R1 = 8R R2 = 8R,3: R1 = 6R R2 = 10R,4: R1 = 4R R2 = 12R,5: R1 = 3R R2 = 13R,6: R1 = 2R R2 = 14R,7: R1 = 1R R2 = 15R"
|
|
bitfld.long 0x00 10.--12. "RES1MUX,Resistor 1 Mux" "0: OPAMP1 Positive Input,1: OPAMP1 Negative Input,2: OPAMP0 Output,3: Ground,4: RG_CONN,?..."
|
|
newline
|
|
bitfld.long 0x00 9. "RES1EN,Resistor 1 Enable" "0,1"
|
|
bitfld.long 0x00 8. "RES2OUT,Resistor ladder To Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RES2VCC,Resistor ladder To VCC" "0,1"
|
|
bitfld.long 0x00 3.--4. "BIAS,Bias Selection" "0: Minimum current consumption but the slowest..,1: Low current consumption slow speed,2: High current consumption fast speed,3: Maximum current consumption but the fastest.."
|
|
newline
|
|
bitfld.long 0x00 2. "ANAOUT,Analog Output" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Operational Amplifier Enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "OPAMPCTRL2,OPAMP2 Control"
|
|
bitfld.long 0x00 20.--23. "MUXNEG,Negative Input Mux Selection" "0: OPAMP0 Negative Input,1: OPAMP0 Resistor ladder taps,2: DAC VOUT0 or OPAMP Reference Output Voltage..,3: OPAMP0 Output,?..."
|
|
bitfld.long 0x00 16.--19. "MUXPOS,Positive Input Mux Selection" "0: OPAMP2 Positive Input,1: OPAMP2 Resistor ladder taps,2: REFERENCE or DAC VOUT0 Output,3: Ground,4: OPAMP1 Output,5: OPAMP0 Positive Input,6: OPAMP1 Positive Input,7: OPAMP0 Resistor Ladder Taps,8: RES3TAP Potentiometer,?..."
|
|
newline
|
|
bitfld.long 0x00 13.--15. "POTMUX,Potentiometer Selection" "0: R1 = 14R R2 = 2R,1: R1 = 12R R2 = 4R,2: R1 = 8R R2 = 8R,3: R1 = 6R R2 = 10R,4: R1 = 4R R2 = 12R,5: R1 = 3R R2 = 13R,6: R1 = 2R R2 = 14R,7: R1 = 1R R2 = 15R"
|
|
bitfld.long 0x00 10.--12. "RES1MUX,Resistor 1 Mux" "0: OPAMP2 Positive Input,1: OPAMP2 Negative Input,2: OPAMP1 Output,3: Ground,?..."
|
|
newline
|
|
bitfld.long 0x00 9. "RES1EN,Resistor 1 Enable" "0,1"
|
|
bitfld.long 0x00 8. "RES2OUT,Resistor ladder To Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RES2VCC,Resistor ladder To VCC" "0,1"
|
|
bitfld.long 0x00 3.--4. "BIAS,Bias Selection" "0: Minimum current consumption but the slowest..,1: Low current consumption slow speed,2: High current consumption fast speed,3: Maximum current consumption but the fastest.."
|
|
newline
|
|
bitfld.long 0x00 2. "ANAOUT,Analog Output" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Operational Amplifier Enable" "0,1"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "RESCTRL,Resister Control"
|
|
bitfld.byte 0x00 6.--7. "REFBUFLEVEL,Reference output voltage level select" "0: 1_1V,1: 1_25V,2: 1_6V,?..."
|
|
bitfld.byte 0x00 3.--5. "POTMUX,Potentiometer Selection" "0: Gain = 0.14,1: Gain = 0.33,2: Gain = 1,3: Gain = 1.67,4: Gain = 3,5: Gain = 4.33,6: Gain = 7,7: Gain = 15"
|
|
newline
|
|
bitfld.byte 0x00 2. "RES1MUX,Resistor 1 Mux" "0: DAC VOUT0 Output,1: OPAMP Reference Buffer Output"
|
|
bitfld.byte 0x00 1. "RES1EN,Resistor 1 Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "RES2OUT,Resistor ladder To Output" "0,1"
|
|
tree.end
|
|
tree "OSC32KCTRL (32k Oscillators Control)"
|
|
base ad:0x40001400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x00 2. "CLKFAIL,XOSC32K Clock Failure Detector Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "XOSC32KRDY,XOSC32K Ready Interrupt Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x00 2. "CLKFAIL,XOSC32K Clock Failure Detector Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "XOSC32KRDY,XOSC32K Ready Interrupt Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0x00 2. "CLKFAIL,XOSC32K Clock Failure Detector" "0,1"
|
|
bitfld.long 0x00 0. "XOSC32KRDY,XOSC32K Ready" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,Power and Clocks Status"
|
|
bitfld.long 0x00 4. "ULP32KSW,OSCULP32K Clock Switch" "0,1"
|
|
bitfld.long 0x00 3. "CLKSW,XOSC32K Clock switch" "0,1"
|
|
bitfld.long 0x00 2. "CLKFAIL,XOSC32K Clock Failure Detector" "0,1"
|
|
bitfld.long 0x00 0. "XOSC32KRDY,XOSC32K Ready" "0,1"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "RTCCTRL,RTC Clock Selection"
|
|
bitfld.byte 0x00 0.--2. "RTCSEL,RTC Clock Selection" "0: 1.024kHz from 32kHz internal ULP oscillator,1: 32.768kHz from 32kHz internal ULP oscillator,?,?,4: 1.024kHz from 32.768kHz external crystal..,5: 32.768kHz from 32.768kHz external crystal..,?..."
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "XOSC32K,32kHz External Crystal Oscillator (XOSC32K) Control"
|
|
bitfld.word 0x00 12. "WRTLOCK,Write Lock" "0,1"
|
|
bitfld.word 0x00 8.--10. "STARTUP,Oscillator Start-Up Time" "0: CYCLE2048,1: CYCLE4096,2: CYCLE16384,3: CYCLE32768,4: CYCLE65536,5: CYCLE131072,6: CYCLE262144,?..."
|
|
bitfld.word 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.word 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.word 0x00 4. "EN1K,1kHz Output Enable" "0,1"
|
|
bitfld.word 0x00 3. "EN32K,32kHz Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "XTALEN,Crystal Oscillator Enable" "0,1"
|
|
bitfld.word 0x00 1. "ENABLE,Oscillator Enable" "0,1"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "CFDCTRL,Clock Failure Detector Control"
|
|
bitfld.byte 0x00 2. "CFDPRESC,Clock Failure Detector Prescaler" "0,1"
|
|
bitfld.byte 0x00 1. "SWBACK,Clock Switch Back Enable" "0,1"
|
|
bitfld.byte 0x00 0. "CFDEN,Clock Failure Detector Enable" "0,1"
|
|
group.byte 0x17++0x00
|
|
line.byte 0x00 "EVCTRL,Event Control"
|
|
bitfld.byte 0x00 0. "CFDEO,Clock Failure Detector Event Output Enable" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "OSCULP32K,32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control"
|
|
bitfld.long 0x00 15. "WRTLOCK,Write Lock" "0,1"
|
|
bitfld.long 0x00 5. "ULP32KSW,OSCULP32K Clock Switch Enable" "0,1"
|
|
tree.end
|
|
tree "OSCCTRL (Oscillators Control)"
|
|
base ad:0x40001000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "EVCTRL,Event Control"
|
|
bitfld.byte 0x00 2. "TUNEINV,Tune Event Input Invert" "0,1"
|
|
bitfld.byte 0x00 1. "TUNEEI,Tune Event Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "CFDEO,Clock Failure Detector Event Output Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x00 28. "DFLLRCS,DFLL Reference Clock Stopped Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 27. "DFLLLCKC,DFLL Lock Coarse Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "DFLLLCKF,DFLL Lock Fine Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "DFLLOOB,DFLL Out Of Bounds Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "DFLLRDY,DFLL Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "DPLLLDRTO,DPLL Loop Divider Ratio Update Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DPLLLTO,DPLL Lock Timeout Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "DPLLLCKF,DPLL Lock Fall Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "DPLLLCKR,DPLL Lock Rise Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "DFLLULPNOLOCK,DFLLULP No Lock Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "DFLLULPLOCK,DFLLULP Lock Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "DFLLULPRDY,DFLLULP Ready interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSC16MRDY,OSC16M Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "XOSCFAIL,XOSC Clock Failure Detector Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "XOSCRDY,XOSC Ready Interrupt Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x00 28. "DFLLRCS,DFLL Reference Clock Stopped Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 27. "DFLLLCKC,DFLL Lock Coarse Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "DFLLLCKF,DFLL Lock Fine Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "DFLLOOB,DFLL Out Of Bounds Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "DFLLRDY,DFLL Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "DPLLLDRTO,DPLL Loop Divider Ratio Update Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DPLLLTO,DPLL Lock Timeout Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "DPLLLCKF,DPLL Lock Fall Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "DPLLLCKR,DPLL Lock Rise Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "DFLLULPNOLOCK,DFLLULP No Lock Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "DFLLULPLOCK,DFLLULP Lock Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "DFLLULPRDY,DFLLULP Ready interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSC16MRDY,OSC16M Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "XOSCFAIL,XOSC Clock Failure Detector Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "XOSCRDY,XOSC Ready Interrupt Enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0x00 28. "DFLLRCS,DFLL Reference Clock Stopped Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 27. "DFLLLCKC,DFLL Lock Coarse Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "DFLLLCKF,DFLL Lock Fine Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "DFLLOOB,DFLL Out Of Bounds Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "DFLLRDY,DFLL Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "DPLLLDRTO,DPLL Loop Divider Ratio Update Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DPLLLTO,DPLL Lock Timeout" "0,1"
|
|
bitfld.long 0x00 17. "DPLLLCKF,DPLL Lock Fall" "0,1"
|
|
bitfld.long 0x00 16. "DPLLLCKR,DPLL Lock Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "DFLLULPNOLOCK,DFLLULP No Lock" "0,1"
|
|
bitfld.long 0x00 9. "DFLLULPLOCK,DFLLULP Lock" "0,1"
|
|
bitfld.long 0x00 8. "DFLLULPRDY,DFLLULP Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSC16MRDY,OSC16M Ready" "0,1"
|
|
bitfld.long 0x00 1. "XOSCFAIL,XOSC Clock Failure Detector" "0,1"
|
|
bitfld.long 0x00 0. "XOSCRDY,XOSC Ready" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "STATUS,Status"
|
|
bitfld.long 0x00 28. "DFLLRCS,DFLL Reference Clock Stopped" "0,1"
|
|
bitfld.long 0x00 27. "DFLLLCKC,DFLL Lock Coarse" "0,1"
|
|
bitfld.long 0x00 26. "DFLLLCKF,DFLL Lock Fine" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "DFLLOOB,DFLL Out Of Bounds" "0,1"
|
|
bitfld.long 0x00 24. "DFLLRDY,DFLL Ready" "0,1"
|
|
bitfld.long 0x00 19. "DPLLLDRTO,DPLL Loop Divider Ratio Update Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DPLLLTO,DPLL Lock Timeout" "0,1"
|
|
bitfld.long 0x00 17. "DPLLLCKF,DPLL Lock Fall" "0,1"
|
|
bitfld.long 0x00 16. "DPLLLCKR,DPLL Lock Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "DFLLULPNOLOCK,DFLLULP No Lock" "0,1"
|
|
bitfld.long 0x00 9. "DFLLULPLOCK,DFLLULP Lock" "0,1"
|
|
bitfld.long 0x00 8. "DFLLULPRDY,DFLLULP Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSC16MRDY,OSC16M Ready" "0,1"
|
|
bitfld.long 0x00 2. "XOSCCKSW,XOSC Clock Switch" "0,1"
|
|
bitfld.long 0x00 1. "XOSCFAIL,XOSC Clock Failure Detector" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "XOSCRDY,XOSC Ready" "0,1"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "XOSCCTRL,External Multipurpose Crystal Oscillator (XOSC) Control"
|
|
bitfld.word 0x00 12.--15. "STARTUP,Start-Up Time" "0: 1 cycle,1: 2 cycles,2: 4 cycles,3: 8 cycles,4: 16 cycles,5: 32 cycles,6: 64 cycles,7: 128 cycles,8: 256 cycles,9: 512 cycles,10: 1024 cycles,11: 2048 cycles,12: 4096 cycles,13: 8192 cycles,14: 16384 cycles,15: 32768 cycles"
|
|
bitfld.word 0x00 11. "AMPGC,Automatic Amplitude Gain Control" "0,1"
|
|
bitfld.word 0x00 8.--10. "GAIN,Oscillator Gain" "0: 2MHz max,1: 4MHz max,2: 8MHz max,3: 16MHz max,4: 30MHz max,?..."
|
|
newline
|
|
bitfld.word 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.word 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.word 0x00 4. "SWBEN,Clock Switch Back Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 3. "CFDEN,Clock Failure Detector Enable" "0,1"
|
|
bitfld.word 0x00 2. "XTALEN,Crystal Oscillator Enable" "0,1"
|
|
bitfld.word 0x00 1. "ENABLE,Oscillator Enable" "0,1"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "CFDPRESC,Clock Failure Detector Prescaler"
|
|
bitfld.byte 0x00 0.--2. "CFDPRESC,Clock Failure Detector Prescaler" "0: OSC16M/1,1: OSC16M/2,2: OSC16M/4,3: OSC16M/8,4: OSC16M/16,5: OSC16M/32,6: OSC16M/64,7: OSC16M/128"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "OSC16MCTRL,16MHz Internal Oscillator (OSC16M) Control"
|
|
bitfld.byte 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.byte 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.byte 0x00 2.--3. "FSEL,Oscillator Frequency Selection" "0: 4MHZ,1: 8MHZ,2: 12MHZ,3: 16MHZ"
|
|
newline
|
|
bitfld.byte 0x00 1. "ENABLE,Oscillator Enable" "0,1"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "DFLLULPCTRL,DFLLULP Control"
|
|
bitfld.word 0x00 8.--10. "DIV,Division Factor" "0: Frequency Divided by 1,1: Frequency Divided by 2,2: Frequency Divided by 4,3: Frequency Divided by 8,4: Frequency Divided by 16,5: Frequency Divided by 32,?..."
|
|
bitfld.word 0x00 7. "ONDEMAND,On Demand" "0,1"
|
|
bitfld.word 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "DITHER,Tuner Dither Mode" "0,1"
|
|
bitfld.word 0x00 4. "SAFE,Tuner Safe Mode" "0,1"
|
|
bitfld.word 0x00 3. "BINSE,Binary Search Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "ENABLE,Enable" "0,1"
|
|
group.byte 0x1E++0x00
|
|
line.byte 0x00 "DFLLULPDITHER,DFLLULP Dither Control"
|
|
bitfld.byte 0x00 4.--6. "PER,Dither Period" "0: Dither Over 1 Reference Clock Period,1: Dither Over 2 Reference Clock Period,2: Dither Over 4 Reference Clock Period,3: Dither Over 8 Reference Clock Period,4: Dither Over 16 Reference Clock Period,5: Dither Over 32 Reference Clock Period,?..."
|
|
bitfld.byte 0x00 0.--2. "STEP,Dither Step" "0: Dither Step = 1,1: Dither Step = 2,2: Dither Step = 4,3: Dither Step = 8,?..."
|
|
group.byte 0x1F++0x00
|
|
line.byte 0x00 "DFLLULPRREQ,DFLLULP Read Request"
|
|
bitfld.byte 0x00 7. "RREQ,Read Request" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DFLLULPDLY,DFLLULP Delay Value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DELAY,Delay Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DFLLULPRATIO,DFLLULP Target Ratio"
|
|
hexmask.long.word 0x00 0.--10. 1. "RATIO,Target Tuner Ratio"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "DFLLULPSYNCBUSY,DFLLULP Synchronization Busy"
|
|
bitfld.long 0x00 3. "DELAY,Delay Register Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Enable Bit Synchronization Busy" "0,1"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "DFLLCTRL,DFLL48M Control"
|
|
bitfld.word 0x00 11. "WAITLOCK,Wait Lock" "0,1"
|
|
bitfld.word 0x00 10. "BPLCKC,Bypass Coarse Lock" "0,1"
|
|
bitfld.word 0x00 9. "QLDIS,Quick Lock Disable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 8. "CCDIS,Chill Cycle Disable" "0,1"
|
|
bitfld.word 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.word 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "USBCRM,USB Clock Recovery Mode" "0,1"
|
|
bitfld.word 0x00 4. "LLAW,Lose Lock After Wake" "0,1"
|
|
bitfld.word 0x00 3. "STABLE,Stable DFLL Frequency" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "MODE,Operating Mode Selection" "0,1"
|
|
bitfld.word 0x00 1. "ENABLE,DFLL Enable" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DFLLVAL,DFLL48M Value"
|
|
hexmask.long.word 0x00 16.--31. 1. "DIFF,Multiplication Ratio Difference"
|
|
bitfld.long 0x00 10.--15. "COARSE,Coarse Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 0.--9. 1. "FINE,Fine Value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DFLLMUL,DFLL48M Multiplier"
|
|
bitfld.long 0x00 26.--31. "CSTEP,Coarse Maximum Step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 16.--25. 1. "FSTEP,Fine Maximum Step"
|
|
hexmask.long.word 0x00 0.--15. 1. "MUL,DFLL Multiply Factor"
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "DFLLSYNC,DFLL48M Synchronization"
|
|
bitfld.byte 0x00 7. "READREQ,Read Request" "0,1"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "DPLLCTRLA,DPLL Control A"
|
|
bitfld.byte 0x00 7. "ONDEMAND,On Demand Clock Activation" "0,1"
|
|
bitfld.byte 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,DPLL Enable" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DPLLRATIO,DPLL Ratio Control"
|
|
bitfld.long 0x00 16.--19. "LDRFRAC,Loop Divider Ratio Fractional Part" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. "LDR,Loop Divider Ratio"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DPLLCTRLB,DPLL Control B"
|
|
hexmask.long.word 0x00 16.--26. 1. "DIV,Clock Divider"
|
|
bitfld.long 0x00 12. "LBYPASS,Lock Bypass" "0,1"
|
|
bitfld.long 0x00 8.--10. "LTIME,Lock Time" "0: No time-out,?,?,?,4: Time-out if no lock within 8 ms,5: Time-out if no lock within 9 ms,6: Time-out if no lock within 10 ms,7: Time-out if no lock within 11 ms"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "REFCLK,Reference Clock Selection" "0: XOSC32K Clock Reference,1: XOSC Clock Reference,2: GCLK Clock Reference,?..."
|
|
bitfld.long 0x00 3. "WUF,Wake Up Fast" "0,1"
|
|
bitfld.long 0x00 2. "LPEN,Low-Power Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "FILTER,Proportional Integral Filter Selection" "0: Default Filter Mode,1: Low Bandwidth Filter,2: High Bandwidth Filter,3: High Damping Filter"
|
|
group.byte 0x4C++0x00
|
|
line.byte 0x00 "DPLLPRESC,DPLL Prescaler"
|
|
bitfld.byte 0x00 0.--1. "PRESC,Output Clock Prescaler" "0: DPLL output is divided by 1,1: DPLL output is divided by 2,2: DPLL output is divided by 4,?..."
|
|
rgroup.byte 0x50++0x00
|
|
line.byte 0x00 "DPLLSYNCBUSY,DPLL Synchronization Busy"
|
|
bitfld.byte 0x00 3. "DPLLPRESC,DPLL Prescaler Synchronization Status" "0,1"
|
|
bitfld.byte 0x00 2. "DPLLRATIO,DPLL Loop Divider Ratio Synchronization Status" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,DPLL Enable Synchronization Status" "0,1"
|
|
rgroup.byte 0x54++0x00
|
|
line.byte 0x00 "DPLLSTATUS,DPLL Status"
|
|
bitfld.byte 0x00 1. "CLKRDY,DPLL Clock Ready" "0,1"
|
|
bitfld.byte 0x00 0. "LOCK,DPLL Lock" "0,1"
|
|
tree.end
|
|
tree "PAC (Peripheral Access Controller)"
|
|
base ad:0x40000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "WRCTRL,Write control"
|
|
hexmask.long.byte 0x00 16.--23. 1. "KEY,Peripheral access control key"
|
|
hexmask.long.word 0x00 0.--15. 1. "PERID,Peripheral identifier"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "EVCTRL,Event control"
|
|
bitfld.byte 0x00 0. "ERREO,Peripheral acess error event output" "0,1"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt enable clear"
|
|
bitfld.byte 0x00 0. "ERR,Peripheral access error interrupt disable" "0,1"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt enable set"
|
|
bitfld.byte 0x00 0. "ERR,Peripheral access error interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTFLAGAHB,Bridge interrupt flag status"
|
|
bitfld.long 0x00 7. "BROM_,BROM" "0,1"
|
|
bitfld.long 0x00 6. "HSRAMDSU_,HSRAMDSU" "0,1"
|
|
bitfld.long 0x00 5. "HSRAMDMAC_,HSRAMDMAC" "0,1"
|
|
bitfld.long 0x00 4. "HSRAMCPU_,HSRAMCPU" "0,1"
|
|
bitfld.long 0x00 3. "APBC_,APBC" "0,1"
|
|
bitfld.long 0x00 2. "APBB_,APBB" "0,1"
|
|
bitfld.long 0x00 1. "APBA_,APBA" "0,1"
|
|
bitfld.long 0x00 0. "FLASH_,FLASH" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "INTFLAGA,Peripheral interrupt flag status - Bridge A"
|
|
bitfld.long 0x00 13. "AC_,AC" "0,1"
|
|
bitfld.long 0x00 12. "PORT_,PORT" "0,1"
|
|
bitfld.long 0x00 11. "FREQM_,FREQM" "0,1"
|
|
bitfld.long 0x00 10. "EIC_,EIC" "0,1"
|
|
bitfld.long 0x00 9. "RTC_,RTC" "0,1"
|
|
bitfld.long 0x00 8. "WDT_,WDT" "0,1"
|
|
bitfld.long 0x00 7. "GCLK_,GCLK" "0,1"
|
|
bitfld.long 0x00 6. "SUPC_,SUPC" "0,1"
|
|
bitfld.long 0x00 5. "OSC32KCTRL_,OSC32KCTRL" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSCCTRL_,OSCCTRL" "0,1"
|
|
bitfld.long 0x00 3. "RSTC_,RSTC" "0,1"
|
|
bitfld.long 0x00 2. "MCLK_,MCLK" "0,1"
|
|
bitfld.long 0x00 1. "PM_,PM" "0,1"
|
|
bitfld.long 0x00 0. "PAC_,PAC" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "INTFLAGB,Peripheral interrupt flag status - Bridge B"
|
|
bitfld.long 0x00 5. "USB_,USB" "0,1"
|
|
bitfld.long 0x00 4. "HMATRIXHS_,HMATRIXHS" "0,1"
|
|
bitfld.long 0x00 3. "DMAC_,DMAC" "0,1"
|
|
bitfld.long 0x00 2. "NVMCTRL_,NVMCTRL" "0,1"
|
|
bitfld.long 0x00 1. "DSU_,DSU" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "INTFLAGC,Peripheral interrupt flag status - Bridge C"
|
|
bitfld.long 0x00 21. "TRAM_,TRAM" "0,1"
|
|
bitfld.long 0x00 20. "OPAMP_,OPAMP" "0,1"
|
|
bitfld.long 0x00 19. "I2S_,I2S" "0,1"
|
|
bitfld.long 0x00 18. "CCL_,CCL" "0,1"
|
|
bitfld.long 0x00 17. "TRNG_,TRNG" "0,1"
|
|
bitfld.long 0x00 16. "PTC_,PTC" "0,1"
|
|
bitfld.long 0x00 15. "DAC_,DAC" "0,1"
|
|
bitfld.long 0x00 14. "ADC_,ADC" "0,1"
|
|
bitfld.long 0x00 13. "TCC3_,TCC3" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "TCC2_,TCC2" "0,1"
|
|
bitfld.long 0x00 11. "TCC1_,TCC1" "0,1"
|
|
bitfld.long 0x00 10. "TCC0_,TCC0" "0,1"
|
|
bitfld.long 0x00 9. "TC2_,TC2" "0,1"
|
|
bitfld.long 0x00 8. "TC1_,TC1" "0,1"
|
|
bitfld.long 0x00 7. "TC0_,TC0" "0,1"
|
|
bitfld.long 0x00 6. "SERCOM5_,SERCOM5" "0,1"
|
|
bitfld.long 0x00 5. "SERCOM4_,SERCOM4" "0,1"
|
|
bitfld.long 0x00 4. "SERCOM3_,SERCOM3" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SERCOM2_,SERCOM2" "0,1"
|
|
bitfld.long 0x00 2. "SERCOM1_,SERCOM1" "0,1"
|
|
bitfld.long 0x00 1. "SERCOM0_,SERCOM0" "0,1"
|
|
bitfld.long 0x00 0. "EVSYS_,EVSYS" "0,1"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "STATUSA,Peripheral write protection status - Bridge A"
|
|
bitfld.long 0x00 13. "AC_,AC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 12. "PORT_,PORT APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 11. "FREQM_,FREQM APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 10. "EIC_,EIC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 9. "RTC_,RTC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 8. "WDT_,WDT APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 7. "GCLK_,GCLK APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 6. "SUPC_,SUPC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 5. "OSC32KCTRL_,OSC32KCTRL APB Protect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSCCTRL_,OSCCTRL APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 3. "RSTC_,RSTC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 2. "MCLK_,MCLK APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 1. "PM_,PM APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 0. "PAC_,PAC APB Protect Enable" "0,1"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "STATUSB,Peripheral write protection status - Bridge B"
|
|
bitfld.long 0x00 5. "USB_,USB APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 4. "HMATRIXHS_,HMATRIXHS APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 3. "DMAC_,DMAC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 2. "NVMCTRL_,NVMCTRL APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 1. "DSU_,DSU APB Protect Enable" "0,1"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "STATUSC,Peripheral write protection status - Bridge C"
|
|
bitfld.long 0x00 21. "TRAM_,TRAM APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 20. "OPAMP_,OPAMP APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 19. "I2S_,I2S APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 18. "CCL_,CCL APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 17. "TRNG_,TRNG APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 16. "PTC_,PTC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 15. "DAC_,DAC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 14. "ADC_,ADC APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 13. "TCC3_,TCC3 APB Protect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "TCC2_,TCC2 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 11. "TCC1_,TCC1 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 10. "TCC0_,TCC0 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 9. "TC2_,TC2 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 8. "TC1_,TC1 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 7. "TC0_,TC0 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 6. "SERCOM5_,SERCOM5 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 5. "SERCOM4_,SERCOM4 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 4. "SERCOM3_,SERCOM3 APB Protect Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SERCOM2_,SERCOM2 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 2. "SERCOM1_,SERCOM1 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 1. "SERCOM0_,SERCOM0 APB Protect Enable" "0,1"
|
|
bitfld.long 0x00 0. "EVSYS_,EVSYS APB Protect Enable" "0,1"
|
|
tree.end
|
|
tree "PM (Power Manager)"
|
|
base ad:0x40000400
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "SLEEPCFG,Sleep Configuration"
|
|
bitfld.byte 0x00 0.--2. "SLEEPMODE,Sleep Mode" "?,?,2: CPU AHBx and APBx clocks are OFF,?,4: ALL clocks are OFF unless requested by..,?,6: All power domains are powered OFF,?..."
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "PLCFG,Performance Level Configuration"
|
|
bitfld.byte 0x00 7. "PLDIS,Performance Level Disable" "0,1"
|
|
bitfld.byte 0x00 0.--1. "PLSEL,Performance Level Select" "0: Performance Level 0,?,2: Performance Level 2,?..."
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "PWCFG,Power Configuration"
|
|
bitfld.byte 0x00 0.--1. "RAMPSWC,RAM Power Switch Configuration" "0: 64KB Available,1: 48KB Available,2: 32KB Available,3: 16KB Available"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 0. "PLRDY,Performance Level Interrupt Enable" "0,1"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 0. "PLRDY,Performance Level Ready interrupt Enable" "0,1"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 0. "PLRDY,Performance Level Ready" "0,1"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "STDBYCFG,Standby Configuration"
|
|
bitfld.word 0x00 12. "BBIASTR,Back Bias for Trust RAM" "0,1"
|
|
bitfld.word 0x00 10. "BBIASHS,Back Bias for SRAM" "0,1"
|
|
bitfld.word 0x00 6.--7. "VREGSMOD,Voltage Regulator Standby mode" "0: Automatic mode,1: Performance oriented,2: Low Power oriented,?..."
|
|
newline
|
|
bitfld.word 0x00 4. "DPGPDSW,Dynamic Power Gating for PDSW" "0: Dynamic Power Gating disabled,1: Dynamic Power Gating enabled"
|
|
bitfld.word 0x00 0. "PDCFG,Power Domain Configuration" "0: PDSW power domain switching is handled by..,1: PDSW is forced ACTIVE"
|
|
tree.end
|
|
tree "PORT (Port Module)"
|
|
tree "PORT"
|
|
base ad:0x40003000
|
|
repeat 3. (increment 0 1)(increment 0 0x80)
|
|
tree "GROUP[$1]"
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "DIR,Data Direction"
|
|
hexmask.long 0x00 0.--31. 1. "DIR,Port Data Direction"
|
|
group.long ($2+0x04)++0x03
|
|
line.long 0x00 "DIRCLR,Data Direction Clear"
|
|
hexmask.long 0x00 0.--31. 1. "DIRCLR,Port Data Direction Clear"
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "DIRSET,Data Direction Set"
|
|
hexmask.long 0x00 0.--31. 1. "DIRSET,Port Data Direction Set"
|
|
group.long ($2+0x0C)++0x03
|
|
line.long 0x00 "DIRTGL,Data Direction Toggle"
|
|
hexmask.long 0x00 0.--31. 1. "DIRTGL,Port Data Direction Toggle"
|
|
group.long ($2+0x10)++0x03
|
|
line.long 0x00 "OUT,Data Output Value"
|
|
hexmask.long 0x00 0.--31. 1. "OUT,PORT Data Output Value"
|
|
group.long ($2+0x14)++0x03
|
|
line.long 0x00 "OUTCLR,Data Output Value Clear"
|
|
hexmask.long 0x00 0.--31. 1. "OUTCLR,PORT Data Output Value Clear"
|
|
group.long ($2+0x18)++0x03
|
|
line.long 0x00 "OUTSET,Data Output Value Set"
|
|
hexmask.long 0x00 0.--31. 1. "OUTSET,PORT Data Output Value Set"
|
|
group.long ($2+0x1C)++0x03
|
|
line.long 0x00 "OUTTGL,Data Output Value Toggle"
|
|
hexmask.long 0x00 0.--31. 1. "OUTTGL,PORT Data Output Value Toggle"
|
|
rgroup.long ($2+0x20)++0x03
|
|
line.long 0x00 "IN,Data Input Value"
|
|
hexmask.long 0x00 0.--31. 1. "IN,PORT Data Input Value"
|
|
group.long ($2+0x24)++0x03
|
|
line.long 0x00 "CTRL,Control"
|
|
hexmask.long 0x00 0.--31. 1. "SAMPLING,Input Sampling Mode"
|
|
wgroup.long ($2+0x28)++0x03
|
|
line.long 0x00 "WRCONFIG,Write Configuration"
|
|
bitfld.long 0x00 31. "HWSEL,Half-Word Select" "0,1"
|
|
bitfld.long 0x00 30. "WRPINCFG,Write PINCFG" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "WRPMUX,Write PMUX" "0,1"
|
|
bitfld.long 0x00 24.--27. "PMUX,Peripheral Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 22. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.long 0x00 18. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "INEN,Input Enable" "0,1"
|
|
bitfld.long 0x00 16. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "PINMASK,Pin Mask for Multiple Pin Configuration"
|
|
group.long ($2+0x2C)++0x03
|
|
line.long 0x00 "EVCTRL,Event Input Control"
|
|
bitfld.long 0x00 31. "PORTEI3,PORT Event Input Enable 3" "0,1"
|
|
bitfld.long 0x00 29.--30. "EVACT3,PORT Event Action 3" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 24.--28. "PID3,PORT Event Pin Identifier 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 23. "PORTEI2,PORT Event Input Enable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21.--22. "EVACT2,PORT Event Action 2" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. "PID2,PORT Event Pin Identifier 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "PORTEI1,PORT Event Input Enable 1" "0,1"
|
|
bitfld.long 0x00 13.--14. "EVACT1,PORT Event Action 1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "PID1,PORT Event Pin Identifier 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. "PORTEI0,PORT Event Input Enable 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5.--6. "EVACT0,PORT Event Action 0" "0: Event output to pin,1: Set output register of pin on event,2: Clear output register of pin on event,3: Toggle output register of pin on event"
|
|
bitfld.long 0x00 0.--4. "PID0,PORT Event Pin Identifier 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte ($2+0x30)++0x00
|
|
line.byte 0x00 "PMUX[0],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x31)++0x00
|
|
line.byte 0x00 "PMUX[1],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x32)++0x00
|
|
line.byte 0x00 "PMUX[2],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x33)++0x00
|
|
line.byte 0x00 "PMUX[3],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x34)++0x00
|
|
line.byte 0x00 "PMUX[4],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x35)++0x00
|
|
line.byte 0x00 "PMUX[5],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x36)++0x00
|
|
line.byte 0x00 "PMUX[6],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x37)++0x00
|
|
line.byte 0x00 "PMUX[7],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x38)++0x00
|
|
line.byte 0x00 "PMUX[8],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x39)++0x00
|
|
line.byte 0x00 "PMUX[9],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3A)++0x00
|
|
line.byte 0x00 "PMUX[10],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3B)++0x00
|
|
line.byte 0x00 "PMUX[11],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3C)++0x00
|
|
line.byte 0x00 "PMUX[12],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3D)++0x00
|
|
line.byte 0x00 "PMUX[13],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3E)++0x00
|
|
line.byte 0x00 "PMUX[14],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3F)++0x00
|
|
line.byte 0x00 "PMUX[15],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x40)++0x00
|
|
line.byte 0x00 "PINCFG[0],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x41)++0x00
|
|
line.byte 0x00 "PINCFG[1],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x42)++0x00
|
|
line.byte 0x00 "PINCFG[2],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x43)++0x00
|
|
line.byte 0x00 "PINCFG[3],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x44)++0x00
|
|
line.byte 0x00 "PINCFG[4],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x45)++0x00
|
|
line.byte 0x00 "PINCFG[5],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x46)++0x00
|
|
line.byte 0x00 "PINCFG[6],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x47)++0x00
|
|
line.byte 0x00 "PINCFG[7],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x48)++0x00
|
|
line.byte 0x00 "PINCFG[8],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x49)++0x00
|
|
line.byte 0x00 "PINCFG[9],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4A)++0x00
|
|
line.byte 0x00 "PINCFG[10],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4B)++0x00
|
|
line.byte 0x00 "PINCFG[11],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4C)++0x00
|
|
line.byte 0x00 "PINCFG[12],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4D)++0x00
|
|
line.byte 0x00 "PINCFG[13],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4E)++0x00
|
|
line.byte 0x00 "PINCFG[14],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4F)++0x00
|
|
line.byte 0x00 "PINCFG[15],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x50)++0x00
|
|
line.byte 0x00 "PINCFG[16],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x51)++0x00
|
|
line.byte 0x00 "PINCFG[17],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x52)++0x00
|
|
line.byte 0x00 "PINCFG[18],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x53)++0x00
|
|
line.byte 0x00 "PINCFG[19],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x54)++0x00
|
|
line.byte 0x00 "PINCFG[20],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x55)++0x00
|
|
line.byte 0x00 "PINCFG[21],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x56)++0x00
|
|
line.byte 0x00 "PINCFG[22],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x57)++0x00
|
|
line.byte 0x00 "PINCFG[23],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x58)++0x00
|
|
line.byte 0x00 "PINCFG[24],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x59)++0x00
|
|
line.byte 0x00 "PINCFG[25],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5A)++0x00
|
|
line.byte 0x00 "PINCFG[26],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5B)++0x00
|
|
line.byte 0x00 "PINCFG[27],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5C)++0x00
|
|
line.byte 0x00 "PINCFG[28],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5D)++0x00
|
|
line.byte 0x00 "PINCFG[29],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5E)++0x00
|
|
line.byte 0x00 "PINCFG[30],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5F)++0x00
|
|
line.byte 0x00 "PINCFG[31],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "PORT_IOBUS"
|
|
base ad:0x60000000
|
|
repeat 3. (increment 0 1)(increment 0 0x80)
|
|
tree "GROUP[$1]"
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "DIR,Data Direction"
|
|
hexmask.long 0x00 0.--31. 1. "DIR,Port Data Direction"
|
|
group.long ($2+0x04)++0x03
|
|
line.long 0x00 "DIRCLR,Data Direction Clear"
|
|
hexmask.long 0x00 0.--31. 1. "DIRCLR,Port Data Direction Clear"
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "DIRSET,Data Direction Set"
|
|
hexmask.long 0x00 0.--31. 1. "DIRSET,Port Data Direction Set"
|
|
group.long ($2+0x0C)++0x03
|
|
line.long 0x00 "DIRTGL,Data Direction Toggle"
|
|
hexmask.long 0x00 0.--31. 1. "DIRTGL,Port Data Direction Toggle"
|
|
group.long ($2+0x10)++0x03
|
|
line.long 0x00 "OUT,Data Output Value"
|
|
hexmask.long 0x00 0.--31. 1. "OUT,PORT Data Output Value"
|
|
group.long ($2+0x14)++0x03
|
|
line.long 0x00 "OUTCLR,Data Output Value Clear"
|
|
hexmask.long 0x00 0.--31. 1. "OUTCLR,PORT Data Output Value Clear"
|
|
group.long ($2+0x18)++0x03
|
|
line.long 0x00 "OUTSET,Data Output Value Set"
|
|
hexmask.long 0x00 0.--31. 1. "OUTSET,PORT Data Output Value Set"
|
|
group.long ($2+0x1C)++0x03
|
|
line.long 0x00 "OUTTGL,Data Output Value Toggle"
|
|
hexmask.long 0x00 0.--31. 1. "OUTTGL,PORT Data Output Value Toggle"
|
|
rgroup.long ($2+0x20)++0x03
|
|
line.long 0x00 "IN,Data Input Value"
|
|
hexmask.long 0x00 0.--31. 1. "IN,PORT Data Input Value"
|
|
group.long ($2+0x24)++0x03
|
|
line.long 0x00 "CTRL,Control"
|
|
hexmask.long 0x00 0.--31. 1. "SAMPLING,Input Sampling Mode"
|
|
wgroup.long ($2+0x28)++0x03
|
|
line.long 0x00 "WRCONFIG,Write Configuration"
|
|
bitfld.long 0x00 31. "HWSEL,Half-Word Select" "0,1"
|
|
bitfld.long 0x00 30. "WRPINCFG,Write PINCFG" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "WRPMUX,Write PMUX" "0,1"
|
|
bitfld.long 0x00 24.--27. "PMUX,Peripheral Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 22. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.long 0x00 18. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "INEN,Input Enable" "0,1"
|
|
bitfld.long 0x00 16. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "PINMASK,Pin Mask for Multiple Pin Configuration"
|
|
group.long ($2+0x2C)++0x03
|
|
line.long 0x00 "EVCTRL,Event Input Control"
|
|
bitfld.long 0x00 31. "PORTEI3,PORT Event Input Enable 3" "0,1"
|
|
bitfld.long 0x00 29.--30. "EVACT3,PORT Event Action 3" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 24.--28. "PID3,PORT Event Pin Identifier 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 23. "PORTEI2,PORT Event Input Enable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21.--22. "EVACT2,PORT Event Action 2" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. "PID2,PORT Event Pin Identifier 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "PORTEI1,PORT Event Input Enable 1" "0,1"
|
|
bitfld.long 0x00 13.--14. "EVACT1,PORT Event Action 1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "PID1,PORT Event Pin Identifier 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. "PORTEI0,PORT Event Input Enable 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5.--6. "EVACT0,PORT Event Action 0" "0: Event output to pin,1: Set output register of pin on event,2: Clear output register of pin on event,3: Toggle output register of pin on event"
|
|
bitfld.long 0x00 0.--4. "PID0,PORT Event Pin Identifier 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte ($2+0x30)++0x00
|
|
line.byte 0x00 "PMUX[0],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x31)++0x00
|
|
line.byte 0x00 "PMUX[1],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x32)++0x00
|
|
line.byte 0x00 "PMUX[2],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x33)++0x00
|
|
line.byte 0x00 "PMUX[3],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x34)++0x00
|
|
line.byte 0x00 "PMUX[4],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x35)++0x00
|
|
line.byte 0x00 "PMUX[5],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x36)++0x00
|
|
line.byte 0x00 "PMUX[6],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x37)++0x00
|
|
line.byte 0x00 "PMUX[7],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x38)++0x00
|
|
line.byte 0x00 "PMUX[8],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x39)++0x00
|
|
line.byte 0x00 "PMUX[9],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3A)++0x00
|
|
line.byte 0x00 "PMUX[10],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3B)++0x00
|
|
line.byte 0x00 "PMUX[11],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3C)++0x00
|
|
line.byte 0x00 "PMUX[12],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3D)++0x00
|
|
line.byte 0x00 "PMUX[13],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3E)++0x00
|
|
line.byte 0x00 "PMUX[14],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x3F)++0x00
|
|
line.byte 0x00 "PMUX[15],Peripheral Multiplexing"
|
|
bitfld.byte 0x00 4.--7. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
bitfld.byte 0x00 0.--3. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" "0: Peripheral function A selected,1: Peripheral function B selected,2: Peripheral function C selected,3: Peripheral function D selected,4: Peripheral function E selected,?,6: Peripheral function G selected,7: Peripheral function H selected,8: Peripheral function I selected,9: Peripheral function J selected,10: Peripheral function K selected,?..."
|
|
group.byte ($2+0x40)++0x00
|
|
line.byte 0x00 "PINCFG[0],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x41)++0x00
|
|
line.byte 0x00 "PINCFG[1],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x42)++0x00
|
|
line.byte 0x00 "PINCFG[2],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x43)++0x00
|
|
line.byte 0x00 "PINCFG[3],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x44)++0x00
|
|
line.byte 0x00 "PINCFG[4],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x45)++0x00
|
|
line.byte 0x00 "PINCFG[5],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x46)++0x00
|
|
line.byte 0x00 "PINCFG[6],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x47)++0x00
|
|
line.byte 0x00 "PINCFG[7],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x48)++0x00
|
|
line.byte 0x00 "PINCFG[8],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x49)++0x00
|
|
line.byte 0x00 "PINCFG[9],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4A)++0x00
|
|
line.byte 0x00 "PINCFG[10],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4B)++0x00
|
|
line.byte 0x00 "PINCFG[11],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4C)++0x00
|
|
line.byte 0x00 "PINCFG[12],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4D)++0x00
|
|
line.byte 0x00 "PINCFG[13],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4E)++0x00
|
|
line.byte 0x00 "PINCFG[14],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x4F)++0x00
|
|
line.byte 0x00 "PINCFG[15],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x50)++0x00
|
|
line.byte 0x00 "PINCFG[16],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x51)++0x00
|
|
line.byte 0x00 "PINCFG[17],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x52)++0x00
|
|
line.byte 0x00 "PINCFG[18],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x53)++0x00
|
|
line.byte 0x00 "PINCFG[19],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x54)++0x00
|
|
line.byte 0x00 "PINCFG[20],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x55)++0x00
|
|
line.byte 0x00 "PINCFG[21],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x56)++0x00
|
|
line.byte 0x00 "PINCFG[22],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x57)++0x00
|
|
line.byte 0x00 "PINCFG[23],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x58)++0x00
|
|
line.byte 0x00 "PINCFG[24],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x59)++0x00
|
|
line.byte 0x00 "PINCFG[25],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5A)++0x00
|
|
line.byte 0x00 "PINCFG[26],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5B)++0x00
|
|
line.byte 0x00 "PINCFG[27],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5C)++0x00
|
|
line.byte 0x00 "PINCFG[28],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5D)++0x00
|
|
line.byte 0x00 "PINCFG[29],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5E)++0x00
|
|
line.byte 0x00 "PINCFG[30],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
group.byte ($2+0x5F)++0x00
|
|
line.byte 0x00 "PINCFG[31],Pin Configuration"
|
|
bitfld.byte 0x00 6. "DRVSTR,Output Driver Strength Selection" "0,1"
|
|
bitfld.byte 0x00 2. "PULLEN,Pull Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "INEN,Input Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "RSTC (Reset Controller)"
|
|
base ad:0x40000C00
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "RCAUSE,Reset Cause"
|
|
bitfld.byte 0x00 6. "SYST,System Reset Request" "0,1"
|
|
bitfld.byte 0x00 5. "WDT,Watchdog Reset" "0,1"
|
|
bitfld.byte 0x00 4. "EXT,External Reset" "0,1"
|
|
bitfld.byte 0x00 3. "BOD12PLL,Brown Out VDDPLL Detector Reset" "0,1"
|
|
bitfld.byte 0x00 2. "BOD33,Brown Out VDD/AVDD Detector Reset" "0,1"
|
|
bitfld.byte 0x00 1. "BOD12,Brown Out VDDCORE Detector Reset" "0,1"
|
|
bitfld.byte 0x00 0. "POR,Power On Reset" "0,1"
|
|
tree.end
|
|
tree "RTC (Real-time Counter)"
|
|
base ad:0x40002400
|
|
tree "MODE0"
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CTRLA,MODE0 Control A"
|
|
bitfld.word 0x00 15. "COUNTSYNC,Count Read Synchronization Enable" "0,1"
|
|
bitfld.word 0x00 14. "GPTRST,GP Registers Reset On Tamper Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 8.--11. "PRESCALER,Prescaler" "0: CLK_RTC_CNT = GCLK_RTC/1,1: CLK_RTC_CNT = GCLK_RTC/1,2: CLK_RTC_CNT = GCLK_RTC/2,3: CLK_RTC_CNT = GCLK_RTC/4,4: CLK_RTC_CNT = GCLK_RTC/8,5: CLK_RTC_CNT = GCLK_RTC/16,6: CLK_RTC_CNT = GCLK_RTC/32,7: CLK_RTC_CNT = GCLK_RTC/64,8: CLK_RTC_CNT = GCLK_RTC/128,9: CLK_RTC_CNT = GCLK_RTC/256,10: CLK_RTC_CNT = GCLK_RTC/512,11: CLK_RTC_CNT = GCLK_RTC/1024,?..."
|
|
bitfld.word 0x00 7. "MATCHCLR,Clear on Match" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2.--3. "MODE,Operating Mode" "0: Mode 0,1: Mode 1,2: Mode 2,?..."
|
|
bitfld.word 0x00 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CTRLB,MODE0 Control B"
|
|
bitfld.word 0x00 15. "SEPTO,Separate Tamper Outputs" "0,1"
|
|
bitfld.word 0x00 12.--14. "ACTF,Active Layer Frequency" "0: CLK_RTC_OUT = CLK_RTC/2,1: CLK_RTC_OUT = CLK_RTC/4,2: CLK_RTC_OUT = CLK_RTC/8,3: CLK_RTC_OUT = CLK_RTC/16,4: CLK_RTC_OUT = CLK_RTC/32,5: CLK_RTC_OUT = CLK_RTC/64,6: CLK_RTC_OUT = CLK_RTC/128,7: CLK_RTC_OUT = CLK_RTC/256"
|
|
newline
|
|
bitfld.word 0x00 8.--10. "DEBF,Debounce Frequency" "0: CLK_RTC_DEB = CLK_RTC/2,1: CLK_RTC_DEB = CLK_RTC/4,2: CLK_RTC_DEB = CLK_RTC/8,3: CLK_RTC_DEB = CLK_RTC/16,4: CLK_RTC_DEB = CLK_RTC/32,5: CLK_RTC_DEB = CLK_RTC/64,6: CLK_RTC_DEB = CLK_RTC/128,7: CLK_RTC_DEB = CLK_RTC/256"
|
|
bitfld.word 0x00 7. "DMAEN,DMA Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 6. "RTCOUT,RTC Output Enable" "0,1"
|
|
bitfld.word 0x00 5. "DEBASYNC,Debouncer Asynchronous Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. "DEBMAJ,Debouncer Majority Enable" "0,1"
|
|
bitfld.word 0x00 0. "GP0EN,General Purpose 0 Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EVCTRL,MODE0 Event Control"
|
|
bitfld.long 0x00 24. "PERDEO,Periodic Interval Daily Event Output Enable" "0,1"
|
|
bitfld.long 0x00 16. "TAMPEVEI,Tamper Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "OVFEO,Overflow Event Output Enable" "0,1"
|
|
bitfld.long 0x00 14. "TAMPEREO,Tamper Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMPEO0,Compare 0 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 7. "PEREO7,Periodic Interval 7 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PEREO6,Periodic Interval 6 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 5. "PEREO5,Periodic Interval 5 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PEREO4,Periodic Interval 4 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 3. "PEREO3,Periodic Interval 3 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PEREO2,Periodic Interval 2 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 1. "PEREO1,Periodic Interval 1 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PEREO0,Periodic Interval 0 Event Output Enable" "0,1"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "INTENCLR,MODE0 Interrupt Enable Clear"
|
|
bitfld.word 0x00 15. "OVF,Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 14. "TAMPER,Tamper Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 8. "CMP0,Compare 0 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "INTENSET,MODE0 Interrupt Enable Set"
|
|
bitfld.word 0x00 15. "OVF,Overflow Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 14. "TAMPER,Tamper Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 8. "CMP0,Compare 0 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "INTFLAG,MODE0 Interrupt Flag Status and Clear"
|
|
bitfld.word 0x00 15. "OVF,Overflow" "0,1"
|
|
bitfld.word 0x00 14. "TAMPER,Tamper" "0,1"
|
|
newline
|
|
bitfld.word 0x00 8. "CMP0,Compare 0" "0,1"
|
|
bitfld.word 0x00 7. "PER7,Periodic Interval 7" "0,1"
|
|
newline
|
|
bitfld.word 0x00 6. "PER6,Periodic Interval 6" "0,1"
|
|
bitfld.word 0x00 5. "PER5,Periodic Interval 5" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. "PER4,Periodic Interval 4" "0,1"
|
|
bitfld.word 0x00 3. "PER3,Periodic Interval 3" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "PER2,Periodic Interval 2" "0,1"
|
|
bitfld.word 0x00 1. "PER1,Periodic Interval 1" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "PER0,Periodic Interval 0" "0,1"
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x00 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SYNCBUSY,MODE0 Synchronization Busy Status"
|
|
bitfld.long 0x00 17. "GP1,General Purpose 1 Register Busy" "0,1"
|
|
bitfld.long 0x00 16. "GP0,General Purpose 0 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "COUNTSYNC,Count Synchronization Enable Bit Busy" "0,1"
|
|
bitfld.long 0x00 5. "COMP0,COMP 0 Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "COUNT,COUNT Register Busy" "0,1"
|
|
bitfld.long 0x00 2. "FREQCORR,FREQCORR Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,Enable Bit Busy" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Busy" "0,1"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "FREQCORR,Frequency Correction"
|
|
bitfld.byte 0x00 7. "SIGN,Correction Sign" "0,1"
|
|
hexmask.byte 0x00 0.--6. 1. "VALUE,Correction Value"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "COUNT,MODE0 Counter Value"
|
|
hexmask.long 0x00 0.--31. 1. "COUNT,Counter Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "COMP0,MODE0 Compare Value"
|
|
hexmask.long 0x00 0.--31. 1. "COMP,Compare Value"
|
|
repeat 2. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x40)++0x03
|
|
line.long 0x00 "GP[$1],General Purpose $1"
|
|
hexmask.long 0x00 0.--31. 1. "GP,General Purpose"
|
|
repeat.end
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TAMPCTRL,Tamper Control"
|
|
bitfld.long 0x00 31. "DEBNC7,Debouncer Enable 7" "0,1"
|
|
bitfld.long 0x00 30. "DEBNC6,Debouncer Enable 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DEBNC5,Debouncer Enable 5" "0,1"
|
|
bitfld.long 0x00 28. "DEBNC4,Debouncer Enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "DEBNC3,Debouncer Enable 3" "0,1"
|
|
bitfld.long 0x00 26. "DEBNC2,Debouncer Enable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "DEBNC1,Debouncer Enable 1" "0,1"
|
|
bitfld.long 0x00 24. "DEBNC0,Debouncer Enable 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "TAMLVL7,Tamper Level Select 7" "0,1"
|
|
bitfld.long 0x00 22. "TAMLVL6,Tamper Level Select 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "TAMLVL5,Tamper Level Select 5" "0,1"
|
|
bitfld.long 0x00 20. "TAMLVL4,Tamper Level Select 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "TAMLVL3,Tamper Level Select 3" "0,1"
|
|
bitfld.long 0x00 18. "TAMLVL2,Tamper Level Select 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "TAMLVL1,Tamper Level Select 1" "0,1"
|
|
bitfld.long 0x00 16. "TAMLVL0,Tamper Level Select 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "IN7ACT,Tamper Input 7 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN7 to OUT"
|
|
bitfld.long 0x00 12.--13. "IN6ACT,Tamper Input 6 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN6 to OUT"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "IN5ACT,Tamper Input 5 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN5 to OUT"
|
|
bitfld.long 0x00 8.--9. "IN4ACT,Tamper Input 4 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN4 to OUT"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "IN3ACT,Tamper Input 3 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN3 to OUT"
|
|
bitfld.long 0x00 4.--5. "IN2ACT,Tamper Input 2 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN2 to OUT"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "IN1ACT,Tamper Input 1 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN1 to OUT"
|
|
bitfld.long 0x00 0.--1. "IN0ACT,Tamper Input 0 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN0 to OUT"
|
|
rgroup.long 0x64++0x03
|
|
line.long 0x00 "TIMESTAMP,MODE0 Timestamp"
|
|
hexmask.long 0x00 0.--31. 1. "COUNT,Count Timestamp Value"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TAMPID,Tamper ID"
|
|
bitfld.long 0x00 31. "TAMPEVT,Tamper Event Detected" "0,1"
|
|
bitfld.long 0x00 7. "TAMPID7,Tamper Input 7 Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TAMPID6,Tamper Input 6 Detected" "0,1"
|
|
bitfld.long 0x00 5. "TAMPID5,Tamper Input 5 Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TAMPID4,Tamper Input 4 Detected" "0,1"
|
|
bitfld.long 0x00 3. "TAMPID3,Tamper Input 3 Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TAMPID2,Tamper Input 2 Detected" "0,1"
|
|
bitfld.long 0x00 1. "TAMPID1,Tamper Input 1 Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TAMPID0,Tamper Input 0 Detected" "0,1"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TAMPCTRLB,Tamper Control B"
|
|
bitfld.long 0x00 7. "ALSI7,Active Layer Select Internal 7" "0,1"
|
|
bitfld.long 0x00 6. "ALSI6,Active Layer Select Internal 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ALSI5,Active Layer Select Internal 5" "0,1"
|
|
bitfld.long 0x00 4. "ALSI4,Active Layer Select Internal 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ALSI3,Active Layer Select Internal 3" "0,1"
|
|
bitfld.long 0x00 2. "ALSI2,Active Layer Select Internal 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ALSI1,Active Layer Select Internal 1" "0,1"
|
|
bitfld.long 0x00 0. "ALSI0,Active Layer Select Internal 0" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "SCB (System Control Block)"
|
|
base ad:0xE000ED00
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "CPUID,CPUID base register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "Implementer,Implementer code ARM=0x41"
|
|
bitfld.long 0x00 20.--23. "Variant,Variant number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "Architecture,Architecture version" "?,?,?,?,?,?,?,?,?,?,?,?,12: ARMv8-M Base Line,?,?,15: ARMv8-M Main Line"
|
|
hexmask.long.word 0x00 4.--15. 1. "PartNo,Part number"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "Revision,Revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ICSR,Interrupt Control and State Register"
|
|
bitfld.long 0x00 31. "PENDNMISET,Pend NMI set" "0: Write: no effect read: NMI exception is not..,1: Write: changes NMI exception state to pending.."
|
|
bitfld.long 0x00 30. "PENDNMICLR,Pend NMI clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "PENDSVSET,Pend PendSV set" "0: Write: no effect read: PendSV exception is..,1: Write: changes PendSV exception state to.."
|
|
bitfld.long 0x00 27. "PENDSVCLR,Pend PendSV clear" "0: No effect,1: Removes the pending state from the PendSV.."
|
|
newline
|
|
bitfld.long 0x00 26. "PENDSTSET,Pend SysTick set" "0: Write: no effect read: SysTick exception is..,1: Write: changes SysTick exception state to.."
|
|
bitfld.long 0x00 25. "PENDSTCLR,Pend SysTick clear" "0: No effect,1: Removes the pending state from the SysTick.."
|
|
newline
|
|
bitfld.long 0x00 23. "ISRPREEMPT,Interrupt preempt" "0,1"
|
|
bitfld.long 0x00 22. "ISRPENDING,Interrupt pending" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 12.--20. 1. "VECTPENDING,Vector pending"
|
|
bitfld.long 0x00 11. "RETTOBASE,Return to base" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "VECTACTIVE,Vector active"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x00 7.--31. 1. "TBLOFF,Vector table base offset"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "VECTKEY,Register Key (0x05FA)"
|
|
bitfld.long 0x00 15. "ENDIANNESS,Data Endianness" "0: Little-endian,1: Big-endian"
|
|
newline
|
|
bitfld.long 0x00 14. "PRIS,Prioritize Secure Exceptions" "0: Priority ranges of Secure and Non-secure..,1: Non-secure exceptions are de-prioritized"
|
|
bitfld.long 0x00 13. "BFHFNMINS,BusFault HardFault and NMI Non-secure enable" "0: BusFault HardFault and NMI are Secure,1: BusFault and NMI are Non-secure and.."
|
|
newline
|
|
bitfld.long 0x00 3. "SYSRESETREQS,System Reset Request Secure only" "0: SYSRESETREQ functionality is available to..,1: SYSRESETREQ functionality is only available.."
|
|
bitfld.long 0x00 2. "SYSRESETREQ,System Reset Request" "0: Do not request a system reset,1: Request a system reset"
|
|
newline
|
|
bitfld.long 0x00 1. "VECTCLRACTIVE,Debug: Clear Active State" "0: Do not clear active state,1: Clear active state"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SCR,System Control Register"
|
|
bitfld.long 0x00 4. "SEVONPEND,Send Event on Pending bit" "0: Only enabled interrupts or events can wakeup..,1: Enabled events and all interrupts including.."
|
|
bitfld.long 0x00 3. "SLEEPDEEPS,Sleep deep secure" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SLEEPDEEP,Sleep deep" "0: VALUE_0,1: Deep sleep"
|
|
bitfld.long 0x00 1. "SLEEPONEXIT,Sleep on exit" "0: O not sleep when returning to Thread mode,1: Enter sleep or deep sleep on return from an ISR"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CCR,Configuration and Control Register"
|
|
bitfld.long 0x00 18. "BP,Branch prediction enable" "0,1"
|
|
bitfld.long 0x00 17. "IC,Instruction cache enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "DC,Data cache enable" "0,1"
|
|
bitfld.long 0x00 10. "STKOFHFNMIGN,Stack overflow in HardFault and NMI ignore" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "BFHFNMIGN,BusFault in HardFault or NMI ignore" "0,1"
|
|
bitfld.long 0x00 4. "DIV_0_TRP,Divide by zero trap" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "UNALIGN_TRP,Unaligned trap" "0: Do not trap unaligned halfword and word..,1: Trap unaligned halfword and word accesses"
|
|
bitfld.long 0x00 1. "USERSETMPEND,User set main pending" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PRI_11,Priority of system handler 11 SVCall"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PRI_15,Priority of system handler 15 SysTick"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PRI_14,Priority of system handler 14 PendSV"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRI_12,Priority of system handler 12 DebugMonitor"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x00 21. "HARDFAULTPENDED,HardFault exception pended state" "0,1"
|
|
bitfld.long 0x00 15. "SVCALLPENDED,SVCall exception pended state" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SYSTICKACT,SysTick exception active state" "0,1"
|
|
bitfld.long 0x00 10. "PENDSVACT,PendSV exception active state" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SVCALLACT,SVCall exception active state" "0,1"
|
|
bitfld.long 0x00 5. "NMIACT,NMI exception active state" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "HARDFAULTACT,HardFault exception active state" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
bitfld.long 0x00 4. "EXTERNAL,External event" "0,1"
|
|
bitfld.long 0x00 3. "VCATCH,Vector Catch event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DWTTRAP,Watchpoint event" "0,1"
|
|
bitfld.long 0x00 1. "BKPT,Breakpoint event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "HALTED,Halt or step event" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "AFSR,Auxiliary Fault Status Register"
|
|
rgroup.long 0x78++0x03
|
|
line.long 0x00 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "0: Not disclosed in this mechanism,1: L1 cache is the highest inner level,2: L2 cache is the highest inner level,3: L3 cache is the highest inner level"
|
|
bitfld.long 0x00 27.--29. "LoUU,Level of Unification Uniprocessor" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "LoC,Level of Coherence" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 21.--23. "LoUIS,Level of Unification Inner Shareable" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "Ctype7,Cache type at level 7" "0: No cache,1: Instruction cache only,2: Data cache only,3: Separate instruction and data caches,4: Unified cache,?..."
|
|
bitfld.long 0x00 15.--17. "Ctype6,Cache type at level 6" "0: No cache,1: Instruction cache only,2: Data cache only,3: Separate instruction and data caches,4: Unified cache,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--14. "Ctype5,Cache type at level 5" "0: No cache,1: Instruction cache only,2: Data cache only,3: Separate instruction and data caches,4: Unified cache,?..."
|
|
bitfld.long 0x00 9.--11. "Ctype4,Cache type at level 4" "0: No cache,1: Instruction cache only,2: Data cache only,3: Separate instruction and data caches,4: Unified cache,?..."
|
|
newline
|
|
bitfld.long 0x00 6.--8. "Ctype3,Cache type at level 3" "0: No cache,1: Instruction cache only,2: Data cache only,3: Separate instruction and data caches,4: Unified cache,?..."
|
|
bitfld.long 0x00 3.--5. "Ctype2,Cache type at level 2" "0: No cache,1: Instruction cache only,2: Data cache only,3: Separate instruction and data caches,4: Unified cache,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "Ctype1,Cache type at level 1" "0: No cache,1: Instruction cache only,2: Data cache only,3: Separate instruction and data caches,4: Unified cache,?..."
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "CTR,Cache Type Register"
|
|
bitfld.long 0x00 29.--31. "Format,Cache Type Register format" "0: No cache type information provided,?,?,?,4: Cache type information is provided,?..."
|
|
bitfld.long 0x00 24.--27. "CWG,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "ERG,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "DminLine,Data cache minimum line length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "IminLine,Instruction cache minimum line length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "CCSIDR,Current Cache Size ID register"
|
|
bitfld.long 0x00 31. "WT,Write-Through" "0,1"
|
|
bitfld.long 0x00 30. "WB,Write-Back" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RA,Read-Allocate" "0,1"
|
|
bitfld.long 0x00 28. "WA,Write-Allocate" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 13.--27. 1. "NumSets,Number of sets - 1"
|
|
hexmask.long.word 0x00 3.--12. 1. "Associativity,Associativity - 1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "LineSize,log2(number of words per line) - 2" "0,1,2,3,4,5,6,7"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. "Level,Cache level - 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "InD,Instruction not Data" "0,1"
|
|
tree.end
|
|
tree "SERCOM (Serial Communication Interface)"
|
|
repeat 6. (list 0. 1. 2. 3. 4. 5.) (list ad:0x42000400 ad:0x42000800 ad:0x42000C00 ad:0x42001000 ad:0x42001400 ad:0x42001800)
|
|
tree "SERCOM$1"
|
|
base $2
|
|
tree "I2CM"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLA,I2CM Control A"
|
|
bitfld.long 0x00 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x00 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21 SCL cycle time-out"
|
|
newline
|
|
bitfld.long 0x00 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
bitfld.long 0x00 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?..."
|
|
newline
|
|
bitfld.long 0x00 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
bitfld.long 0x00 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x00 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.long 0x00 2.--4. "MODE,Operating Mode" "?,?,?,?,?,5: I2C master operation,?..."
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRLB,I2CM Control B"
|
|
bitfld.long 0x00 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs"
|
|
bitfld.long 0x00 18. "ACKACT,Acknowledge Action" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "CMD,Command" "0,1,2,3"
|
|
bitfld.long 0x00 9. "QCEN,Quick Command Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SMEN,Smart Mode Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRLC,I2CM Control C"
|
|
bitfld.long 0x00 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as..,?..."
|
|
bitfld.long 0x00 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?..."
|
|
newline
|
|
bitfld.long 0x00 27. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x00 24. "DATA32B,Data 32 Bit" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BAUD,I2CM Baud Rate"
|
|
hexmask.long.byte 0x00 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low"
|
|
hexmask.long.byte 0x00 16.--23. 1. "HSBAUD,High Speed Baud Rate Value"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "BAUDLOW,Baud Rate Value Low"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "INTENCLR,I2CM Interrupt Enable Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 1. "SB,Slave On Bus Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "MB,Master On Bus Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "INTENSET,I2CM Interrupt Enable Set"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "SB,Slave On Bus Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "MB,Master On Bus Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "INTFLAG,I2CM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x00 4. "RXFF,Rx FIFO Full Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "TXFE,Tx FIFO Empty Interrupt" "0,1"
|
|
bitfld.byte 0x00 1. "SB,Slave On Bus Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "MB,Master On Bus Interrupt" "0,1"
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "STATUS,I2CM Status"
|
|
bitfld.word 0x00 10. "LENERR,Length Error" "0,1"
|
|
bitfld.word 0x00 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.word 0x00 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1"
|
|
bitfld.word 0x00 7. "CLKHOLD,Clock Hold" "0,1"
|
|
newline
|
|
bitfld.word 0x00 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
bitfld.word 0x00 4.--5. "BUSSTATE,Bus State" "0: Wait for stop or idle,1: Wait for transaction initialization,2: I2C master is the current owner of the bus,3: Some other I2C master owns the bus"
|
|
newline
|
|
bitfld.word 0x00 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
bitfld.word 0x00 1. "ARBLOST,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYNCBUSY,I2CM Synchronization Busy"
|
|
bitfld.long 0x00 2. "SYSOP,System Operation Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ADDR,I2CM Address"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LEN,Length"
|
|
bitfld.long 0x00 15. "TENBITEN,Ten Bit Addressing Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "HS,High Speed Mode" "0,1"
|
|
bitfld.long 0x00 13. "LENEN,Length Enable" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "ADDR,Address Value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DATA,I2CM Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DBGCTRL,I2CM Debug Control"
|
|
bitfld.byte 0x00 0. "DBGSTOP,Debug Mode" "0,1"
|
|
rgroup.word 0x34++0x01
|
|
line.word 0x00 "FIFOSPACE,I2CM FIFO Space"
|
|
bitfld.word 0x00 8.--12. "RXSPACE,Rx FIFO Filled Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. "TXSPACE,Tx FIFO Empty Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "FIFOPTR,I2CM FIFO CPU Pointers"
|
|
bitfld.word 0x00 8.--11. "CPURDPTR,CPU FIFO Read Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 0.--3. "CPUWRPTR,CPU FIFO Write Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "I2CS"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLA,I2CS Control A"
|
|
bitfld.long 0x00 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1"
|
|
bitfld.long 0x00 27. "SCLSM,SCL Clock Stretch Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?..."
|
|
bitfld.long 0x00 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "SDAHOLD,SDA Hold Time" "0: Disabled,1: 50-100ns hold time,2: 300-600ns hold time,3: 400-800ns hold time"
|
|
bitfld.long 0x00 16. "PINOUT,Pin Usage" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x00 2.--4. "MODE,Operating Mode" "?,?,?,?,4: I2C slave operation,?..."
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRLB,I2CS Control B"
|
|
bitfld.long 0x00 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs"
|
|
bitfld.long 0x00 18. "ACKACT,Acknowledge Action" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "CMD,Command" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique..,2: The slave responds to the range of addresses..,?..."
|
|
newline
|
|
bitfld.long 0x00 10. "AACKEN,Automatic Address Acknowledge" "0,1"
|
|
bitfld.long 0x00 9. "GCMD,PMBus Group Command" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SMEN,Smart Mode Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRLC,I2CS Control C"
|
|
bitfld.long 0x00 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as..,?..."
|
|
bitfld.long 0x00 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?..."
|
|
newline
|
|
bitfld.long 0x00 27. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x00 24. "DATA32B,Data 32 Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "SDASETUP,SDA Setup Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "INTENCLR,I2CS Interrupt Enable Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 2. "DRDY,Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "AMATCH,Address Match Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 0. "PREC,Stop Received Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "INTENSET,I2CS Interrupt Enable Set"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 2. "DRDY,Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "AMATCH,Address Match Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "PREC,Stop Received Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "INTFLAG,I2CS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x00 4. "RXFF,Rx FIFO Full Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "TXFE,Tx FIFO Empty Interrupt" "0,1"
|
|
bitfld.byte 0x00 2. "DRDY,Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "AMATCH,Address Match Interrupt" "0,1"
|
|
bitfld.byte 0x00 0. "PREC,Stop Received Interrupt" "0,1"
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "STATUS,I2CS Status"
|
|
bitfld.word 0x00 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x00 10. "HS,High Speed" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1"
|
|
bitfld.word 0x00 7. "CLKHOLD,Clock Hold" "0,1"
|
|
newline
|
|
bitfld.word 0x00 6. "LOWTOUT,SCL Low Timeout" "0,1"
|
|
bitfld.word 0x00 4. "SR,Repeated Start" "0,1"
|
|
newline
|
|
bitfld.word 0x00 3. "DIR,Read/Write Direction" "0,1"
|
|
bitfld.word 0x00 2. "RXNACK,Received Not Acknowledge" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "COLL,Transmit Collision" "0,1"
|
|
bitfld.word 0x00 0. "BUSERR,Bus Error" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYNCBUSY,I2CS Synchronization Busy"
|
|
bitfld.long 0x00 4. "LENGTH,Length Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 2. "SYSOP,System Operation Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "LENGTH,I2CS Length"
|
|
bitfld.word 0x00 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ADDR,I2CS Address"
|
|
hexmask.long.word 0x00 17.--26. 1. "ADDRMASK,Address Mask"
|
|
bitfld.long 0x00 15. "TENBITEN,Ten Bit Addressing Enable" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 1.--10. 1. "ADDR,Address Value"
|
|
bitfld.long 0x00 0. "GENCEN,General Call Address Enable" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DATA,I2CS Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data Value"
|
|
rgroup.word 0x34++0x01
|
|
line.word 0x00 "FIFOSPACE,I2CS FIFO Space"
|
|
bitfld.word 0x00 8.--12. "RXSPACE,Rx FIFO Filled Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. "TXSPACE,Tx FIFO Empty Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "FIFOPTR,I2CS FIFO CPU Pointers"
|
|
bitfld.word 0x00 8.--11. "CPURDPTR,CPU FIFO Read Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 0.--3. "CPUWRPTR,CPU FIFO Write Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "SPIS"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLA,SPIS Control A"
|
|
bitfld.long 0x00 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x00 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x00 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge.."
|
|
bitfld.long 0x00 24.--27. "FORM,Frame Format" "0: SPI_FRAME,?,2: SPI_FRAME_WITH_ADDR,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x00 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?..."
|
|
newline
|
|
bitfld.long 0x00 8. "IBON,Immediate Buffer Overflow Notification" "0: STATUS.BUFOVF is set when it occurs in the..,1: STATUS.BUFOVF is set immediately upon buffer.."
|
|
bitfld.long 0x00 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--4. "MODE,Operating Mode" "?,?,2: SPI in slave operation,?..."
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRLB,SPIS Control B"
|
|
bitfld.long 0x00 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs"
|
|
bitfld.long 0x00 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique..,2: The slave responds to the range of addresses..,?..."
|
|
bitfld.long 0x00 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled"
|
|
bitfld.long 0x00 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?..."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRLC,SPIS Control C"
|
|
bitfld.long 0x00 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as..,?..."
|
|
bitfld.long 0x00 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?..."
|
|
newline
|
|
bitfld.long 0x00 27. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x00 24. "DATA32B,Data 32 Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "ICSPACE,Inter-Character Spacing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "BAUD,SPIS Baud Rate"
|
|
hexmask.byte 0x00 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "INTENCLR,SPIS Interrupt Enable Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "INTENSET,SPIS Interrupt Enable Set"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "INTFLAG,SPIS Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x00 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "STATUS,SPIS Status"
|
|
bitfld.word 0x00 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x00 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYNCBUSY,SPIS Synchronization Busy"
|
|
bitfld.long 0x00 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "LENGTH,SPIS Length"
|
|
bitfld.word 0x00 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ADDR,SPIS Address"
|
|
hexmask.long.byte 0x00 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADDR,Address Value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DATA,SPIS Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DBGCTRL,SPIS Debug Control"
|
|
bitfld.byte 0x00 0. "DBGSTOP,Debug Mode" "0,1"
|
|
rgroup.word 0x34++0x01
|
|
line.word 0x00 "FIFOSPACE,SPIS FIFO Space"
|
|
bitfld.word 0x00 8.--12. "RXSPACE,Rx FIFO Filled Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. "TXSPACE,Tx FIFO Empty Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "FIFOPTR,SPIS FIFO CPU Pointers"
|
|
bitfld.word 0x00 8.--11. "CPURDPTR,CPU FIFO Read Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 0.--3. "CPUWRPTR,CPU FIFO Write Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "SPIM"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLA,SPIM Control A"
|
|
bitfld.long 0x00 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x00 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle"
|
|
newline
|
|
bitfld.long 0x00 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge.."
|
|
bitfld.long 0x00 24.--27. "FORM,Frame Format" "0: SPI_FRAME,?,2: SPI_FRAME_WITH_ADDR,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD[0] is used as data input,1: SERCOM PAD[1] is used as data input,2: SERCOM PAD[2] is used as data input,3: SERCOM PAD[3] is used as data input"
|
|
bitfld.long 0x00 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?..."
|
|
newline
|
|
bitfld.long 0x00 8. "IBON,Immediate Buffer Overflow Notification" "0: STATUS.BUFOVF is set when it occurs in the..,1: STATUS.BUFOVF is set immediately upon buffer.."
|
|
bitfld.long 0x00 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--4. "MODE,Operating Mode" "?,?,?,3: SPI in master operation,?..."
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRLB,SPIM Control B"
|
|
bitfld.long 0x00 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs"
|
|
bitfld.long 0x00 17. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique..,2: The slave responds to the range of addresses..,?..."
|
|
bitfld.long 0x00 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled"
|
|
bitfld.long 0x00 6. "PLOADEN,Data Preload Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "CHSIZE,Character Size" "0: 8 bits,1: 9 bits,?..."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRLC,SPIM Control C"
|
|
bitfld.long 0x00 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as..,?..."
|
|
bitfld.long 0x00 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?..."
|
|
newline
|
|
bitfld.long 0x00 27. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x00 24. "DATA32B,Data 32 Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "ICSPACE,Inter-Character Spacing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "BAUD,SPIM Baud Rate"
|
|
hexmask.byte 0x00 0.--7. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "INTENCLR,SPIM Interrupt Enable Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 3. "SSL,Slave Select Low Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "INTENSET,SPIM Interrupt Enable Set"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 3. "SSL,Slave Select Low Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "INTFLAG,SPIM Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x00 3. "SSL,Slave Select Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "STATUS,SPIM Status"
|
|
bitfld.word 0x00 11. "LENERR,Transaction Length Error" "0,1"
|
|
bitfld.word 0x00 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYNCBUSY,SPIM Synchronization Busy"
|
|
bitfld.long 0x00 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "LENGTH,SPIM Length"
|
|
bitfld.word 0x00 8. "LENEN,Data Length Enable" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ADDR,SPIM Address"
|
|
hexmask.long.byte 0x00 16.--23. 1. "ADDRMASK,Address Mask"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADDR,Address Value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DATA,SPIM Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DBGCTRL,SPIM Debug Control"
|
|
bitfld.byte 0x00 0. "DBGSTOP,Debug Mode" "0,1"
|
|
rgroup.word 0x34++0x01
|
|
line.word 0x00 "FIFOSPACE,SPIM FIFO Space"
|
|
bitfld.word 0x00 8.--12. "RXSPACE,Rx FIFO Filled Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. "TXSPACE,Tx FIFO Empty Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "FIFOPTR,SPIM FIFO CPU Pointers"
|
|
bitfld.word 0x00 8.--11. "CPURDPTR,CPU FIFO Read Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 0.--3. "CPUWRPTR,CPU FIFO Write Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "USART_EXT"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLA,USART_EXT Control A"
|
|
bitfld.long 0x00 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x00 29. "CPOL,Clock Polarity" "0: TxD Change,1: TxD Change"
|
|
newline
|
|
bitfld.long 0x00 28. "CMODE,Communication Mode" "0: Asynchronous communication,1: Synchronous communication"
|
|
bitfld.long 0x00 24.--27. "FORM,Frame Format" "0: USART_FRAME_NO_PARITY,1: USART_FRAME_WITH_PARITY,2: LIN Master Break and Sync generation,?,4: Auto-baud (LIN Slave) - break detection and..,5: Auto-baud - break detection and auto-baud..,?,7: USART_FRAME_ISO_7816,?..."
|
|
newline
|
|
bitfld.long 0x00 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11 8x Over-sampling..,2: 16x Over-sampling = 11-12-13 8x Over-sampling..,3: 16x Over-sampling = 13-14-15 8x Over-sampling.."
|
|
bitfld.long 0x00 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD PAD[1] = XCK,?,2: PAD[0] = TxD PAD[2] = RTS PAD[3] = CTS,3: PAD[0] = TxD PAD[1] = XCK PAD[2] = TE"
|
|
bitfld.long 0x00 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?..."
|
|
newline
|
|
bitfld.long 0x00 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted"
|
|
bitfld.long 0x00 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted"
|
|
newline
|
|
bitfld.long 0x00 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x00 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,?..."
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRLB,USART_EXT Control B"
|
|
bitfld.long 0x00 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?..."
|
|
bitfld.long 0x00 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs"
|
|
newline
|
|
bitfld.long 0x00 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x00 16. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
bitfld.long 0x00 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded"
|
|
newline
|
|
bitfld.long 0x00 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
bitfld.long 0x00 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
bitfld.long 0x00 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRLC,USART_EXT Control C"
|
|
bitfld.long 0x00 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?..."
|
|
bitfld.long 0x00 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?..."
|
|
newline
|
|
bitfld.long 0x00 27. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x00 24.--25. "DATA32B,Data 32 Bit" "0: Reads and writes with CHSIZE,1: Reads with CHSIZE writes with 32-bit extension,2: Reads with 32-bit extension writes with CHSIZE,3: Reads and writes with 32-bit extension"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
bitfld.long 0x00 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.."
|
|
newline
|
|
bitfld.long 0x00 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
bitfld.long 0x00 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "BAUD,USART_EXT Baud Rate"
|
|
hexmask.word 0x00 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "BAUD_FRAC_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x00 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "BAUD_FRACFP_MODE,USART_EXT Baud Rate"
|
|
bitfld.word 0x00 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "BAUD_USARTFP_MODE,USART_EXT Baud Rate"
|
|
hexmask.word 0x00 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "RXPL,USART_EXT Receive Pulse Length"
|
|
hexmask.byte 0x00 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "INTENCLR,USART_EXT Interrupt Enable Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "INTENSET,USART_EXT Interrupt Enable Set"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "INTFLAG,USART_EXT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x00 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x00 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "STATUS,USART_EXT Status"
|
|
bitfld.word 0x00 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x00 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x00 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x00 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x00 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x00 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYNCBUSY,USART_EXT Synchronization Busy"
|
|
bitfld.long 0x00 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x00
|
|
line.byte 0x00 "RXERRCNT,USART_EXT Receive Error Count"
|
|
hexmask.byte 0x00 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "LENGTH,USART_EXT Length"
|
|
bitfld.word 0x00 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?..."
|
|
hexmask.word.byte 0x00 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DATA,USART_EXT Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DBGCTRL,USART_EXT Debug Control"
|
|
bitfld.byte 0x00 0. "DBGSTOP,Debug Mode" "0,1"
|
|
rgroup.word 0x34++0x01
|
|
line.word 0x00 "FIFOSPACE,USART_EXT FIFO Space"
|
|
bitfld.word 0x00 8.--12. "RXSPACE,Rx FIFO Filled Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. "TXSPACE,Tx FIFO Empty Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "FIFOPTR,USART_EXT FIFO CPU Pointers"
|
|
bitfld.word 0x00 8.--11. "CPURDPTR,CPU FIFO Read Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 0.--3. "CPUWRPTR,CPU FIFO Write Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "USART_INT"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLA,USART_INT Control A"
|
|
bitfld.long 0x00 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first"
|
|
bitfld.long 0x00 29. "CPOL,Clock Polarity" "0: TxD Change,1: TxD Change"
|
|
newline
|
|
bitfld.long 0x00 28. "CMODE,Communication Mode" "0: Asynchronous communication,1: Synchronous communication"
|
|
bitfld.long 0x00 24.--27. "FORM,Frame Format" "0: USART_FRAME_NO_PARITY,1: USART_FRAME_WITH_PARITY,2: LIN Master Break and Sync generation,?,4: Auto-baud (LIN Slave) - break detection and..,5: Auto-baud - break detection and auto-baud..,?,7: USART_FRAME_ISO_7816,?..."
|
|
newline
|
|
bitfld.long 0x00 22.--23. "SAMPA,Sample Adjustment" "0: 16x Over-sampling = 7-8-9 8x Over-sampling =..,1: 16x Over-sampling = 9-10-11 8x Over-sampling..,2: 16x Over-sampling = 11-12-13 8x Over-sampling..,3: 16x Over-sampling = 13-14-15 8x Over-sampling.."
|
|
bitfld.long 0x00 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD[0] is used for data reception,1: SERCOM PAD[1] is used for data reception,2: SERCOM PAD[2] is used for data reception,3: SERCOM PAD[3] is used for data reception"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD PAD[1] = XCK,?,2: PAD[0] = TxD PAD[2] = RTS PAD[3] = CTS,3: PAD[0] = TxD PAD[1] = XCK PAD[2] = TE"
|
|
bitfld.long 0x00 13.--15. "SAMPR,Sample" "0: 16x over-sampling using arithmetic baudrate..,1: 16x over-sampling using fractional baudrate..,2: 8x over-sampling using arithmetic baudrate..,3: 8x over-sampling using fractional baudrate..,4: 3x over-sampling using arithmetic baudrate..,?..."
|
|
newline
|
|
bitfld.long 0x00 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted"
|
|
bitfld.long 0x00 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted"
|
|
newline
|
|
bitfld.long 0x00 8. "IBON,Immediate Buffer Overflow Notification" "0,1"
|
|
bitfld.long 0x00 7. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,?..."
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRLB,USART_INT Control B"
|
|
bitfld.long 0x00 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break sync and identifier are automatically..,?..."
|
|
bitfld.long 0x00 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs"
|
|
newline
|
|
bitfld.long 0x00 17. "RXEN,Receiver Enable" "0,1"
|
|
bitfld.long 0x00 16. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "PMODE,Parity Mode" "0: Even Parity,1: Odd Parity"
|
|
bitfld.long 0x00 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded"
|
|
newline
|
|
bitfld.long 0x00 9. "SFDE,Start of Frame Detection Enable" "0,1"
|
|
bitfld.long 0x00 8. "COLDEN,Collision Detection Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SBMODE,Stop Bit Mode" "0: One Stop Bit,1: Two Stop Bits"
|
|
bitfld.long 0x00 0.--2. "CHSIZE,Character Size" "0: 8 Bits,1: 9 Bits,?,?,?,5: 5 Bits,6: 6 Bits,7: 7 Bits"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRLC,USART_INT Control C"
|
|
bitfld.long 0x00 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?..."
|
|
bitfld.long 0x00 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?..."
|
|
newline
|
|
bitfld.long 0x00 27. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x00 24.--25. "DATA32B,Data 32 Bit" "0: Reads and writes with CHSIZE,1: Reads with CHSIZE writes with 32-bit extension,2: Reads with 32-bit extension writes with CHSIZE,3: Reads and writes with 32-bit extension"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 17. "DSNACK,Disable Successive NACK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "INACK,Inhibit Not Acknowledge" "0,1"
|
|
bitfld.long 0x00 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.."
|
|
newline
|
|
bitfld.long 0x00 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times"
|
|
bitfld.long 0x00 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "BAUD,USART_INT Baud Rate"
|
|
hexmask.word 0x00 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "BAUD_FRAC_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x00 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "BAUD_FRACFP_MODE,USART_INT Baud Rate"
|
|
bitfld.word 0x00 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--12. 1. "BAUD,Baud Rate Value"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "BAUD_USARTFP_MODE,USART_INT Baud Rate"
|
|
hexmask.word 0x00 0.--15. 1. "BAUD,Baud Rate Value"
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "RXPL,USART_INT Receive Pulse Length"
|
|
hexmask.byte 0x00 0.--7. 1. "RXPL,Receive Pulse Length"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "INTENCLR,USART_INT Interrupt Enable Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 5. "RXBRK,Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 3. "RXS,Receive Start Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt Disable" "0,1"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "INTENSET,USART_INT Interrupt Enable Set"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 5. "RXBRK,Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 3. "RXS,Receive Start Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt Enable" "0,1"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "INTFLAG,USART_INT Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 7. "ERROR,Combined Error Interrupt" "0,1"
|
|
bitfld.byte 0x00 5. "RXBRK,Break Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1"
|
|
bitfld.byte 0x00 3. "RXS,Receive Start Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 2. "RXC,Receive Complete Interrupt" "0,1"
|
|
bitfld.byte 0x00 1. "TXC,Transmit Complete Interrupt" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DRE,Data Register Empty Interrupt" "0,1"
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "STATUS,USART_INT Status"
|
|
bitfld.word 0x00 7. "ITER,Maximum Number of Repetitions Reached" "0,1"
|
|
bitfld.word 0x00 6. "TXE,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "COLL,Collision Detected" "0,1"
|
|
bitfld.word 0x00 4. "ISF,Inconsistent Sync Field" "0,1"
|
|
newline
|
|
bitfld.word 0x00 3. "CTS,Clear To Send" "0,1"
|
|
bitfld.word 0x00 2. "BUFOVF,Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "FERR,Frame Error" "0,1"
|
|
bitfld.word 0x00 0. "PERR,Parity Error" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYNCBUSY,USART_INT Synchronization Busy"
|
|
bitfld.long 0x00 4. "LENGTH,LENGTH Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CTRLB,CTRLB Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
rgroup.byte 0x20++0x00
|
|
line.byte 0x00 "RXERRCNT,USART_INT Receive Error Count"
|
|
hexmask.byte 0x00 0.--7. 1. "RXERRCNT,Receive Error Count"
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "LENGTH,USART_INT Length"
|
|
bitfld.word 0x00 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?..."
|
|
hexmask.word.byte 0x00 0.--7. 1. "LEN,Data Length"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DATA,USART_INT Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data Value"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DBGCTRL,USART_INT Debug Control"
|
|
bitfld.byte 0x00 0. "DBGSTOP,Debug Mode" "0,1"
|
|
rgroup.word 0x34++0x01
|
|
line.word 0x00 "FIFOSPACE,USART_INT FIFO Space"
|
|
bitfld.word 0x00 8.--12. "RXSPACE,Rx FIFO Filled Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. "TXSPACE,Tx FIFO Empty Space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "FIFOPTR,USART_INT FIFO CPU Pointers"
|
|
bitfld.word 0x00 8.--11. "CPURDPTR,CPU FIFO Read Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 0.--3. "CPUWRPTR,CPU FIFO Write Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "SUPC (Supply Controller)"
|
|
base ad:0x40001800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x00 18. "VCOREPLLRDY,Voltage Regulator PLL Ready" "0,1"
|
|
bitfld.long 0x00 11. "ULPVREFRDY,ULPVREF Voltage Reference Ready" "0,1"
|
|
bitfld.long 0x00 10. "VCORERDY,VDDCORE Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "VREGRDY,Voltage Regulator Ready" "0,1"
|
|
bitfld.long 0x00 2. "B33SRDY,BOD33 Synchronization Ready" "0,1"
|
|
bitfld.long 0x00 1. "BOD33DET,BOD33 Detection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BOD33RDY,BOD33 Ready" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x00 18. "VCOREPLLRDY,Voltage Regulator PLL Ready" "0,1"
|
|
bitfld.long 0x00 11. "ULPVREFRDY,ULPVREF Voltage Reference Ready" "0,1"
|
|
bitfld.long 0x00 10. "VCORERDY,VDDCORE Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "VREGRDY,Voltage Regulator Ready" "0,1"
|
|
bitfld.long 0x00 2. "B33SRDY,BOD33 Synchronization Ready" "0,1"
|
|
bitfld.long 0x00 1. "BOD33DET,BOD33 Detection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BOD33RDY,BOD33 Ready" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0x00 18. "VCOREPLLRDY,Voltage Regulator PLL Ready" "0,1"
|
|
bitfld.long 0x00 11. "ULPVREFRDY,ULPVREF Voltage Reference Ready" "0,1"
|
|
bitfld.long 0x00 10. "VCORERDY,VDDCORE Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "VREGRDY,Voltage Regulator Ready" "0,1"
|
|
bitfld.long 0x00 2. "B33SRDY,BOD33 Synchronization Ready" "0,1"
|
|
bitfld.long 0x00 1. "BOD33DET,BOD33 Detection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BOD33RDY,BOD33 Ready" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,Power and Clocks Status"
|
|
bitfld.long 0x00 18. "VCOREPLLRDY,Voltage Regulator PLL Ready" "0,1"
|
|
bitfld.long 0x00 12. "ULPVREFRDY,Low Power Voltage Reference Ready" "0,1"
|
|
bitfld.long 0x00 10. "VCORERDY,VDDCORE Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "VREGRDY,Voltage Regulator Ready" "0,1"
|
|
bitfld.long 0x00 2. "B33SRDY,BOD33 Synchronization Ready" "0,1"
|
|
bitfld.long 0x00 1. "BOD33DET,BOD33 Detection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BOD33RDY,BOD33 Ready" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BOD33,BOD33 Control"
|
|
bitfld.long 0x00 16.--21. "LEVEL,Threshold Level for VDD/AVDD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 12.--15. "PSEL,Prescaler Select" "0: Divide clock by 2,1: Divide clock by 4,2: Divide clock by 8,3: Divide clock by 16,4: Divide clock by 32,5: Divide clock by 64,6: Divide clock by 128,7: Divide clock by 256,8: Divide clock by 512,9: Divide clock by 1024,10: Divide clock by 2048,11: Divide clock by 4096,12: Divide clock by 8192,13: Divide clock by 16384,14: Divide clock by 32768,15: Divide clock by 65536"
|
|
bitfld.long 0x00 11. "VREFSEL,BOD33 Voltage Reference Selection" "0: Selects VREF for the BOD33,1: Selects ULPVREF for the BOD33"
|
|
newline
|
|
bitfld.long 0x00 8. "ACTCFG,Configuration in Active mode" "0,1"
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x00 5. "STDBYCFG,Configuration in Standby mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3.--4. "ACTION,Action when Threshold Crossed" "0: No action,1: The BOD33 generates a reset,2: The BOD33 generates an interrupt,?..."
|
|
bitfld.long 0x00 2. "HYST,Hysteresis Enable" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "VREG,VREG Control"
|
|
hexmask.long.byte 0x00 24.--31. 1. "VSPER,Voltage Scaling Period"
|
|
bitfld.long 0x00 16.--19. "VSVSTEP,Voltage Scaling Voltage Step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 9. "VREFSEL,Voltage Regulator Voltage Reference Selection" "0: Selects VREF for the VREG,1: Selects ULPVREF for the VREG"
|
|
newline
|
|
bitfld.long 0x00 8. "LPEFF,Low Power efficiency" "0,1"
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x00 5. "STDBYPL0,Standby in PL0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "SEL,Voltage Regulator Selection in active mode" "0: LDO selection,1: Buck selection,?..."
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "VREF,VREF Control"
|
|
bitfld.long 0x00 16.--19. "SEL,Voltage Reference Selection for ADC/DAC" "?,?,?,?,?,?,6: 2.4V voltage reference typical value,7: 2.5V voltage reference typical value,?..."
|
|
bitfld.long 0x00 7. "ONDEMAND,On Demand Control" "0,1"
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "VREFOE,Voltage Reference Output Enable" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "VREGPLL,VREGPLL Control"
|
|
bitfld.long 0x00 8.--11. "STARTUP,Startup Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Vreg PLL Enable" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "EVCTRL,Event Control"
|
|
bitfld.long 0x00 1. "BOD33DETEO,BOD33 Detection Event Output Enable" "0,1"
|
|
tree.end
|
|
tree "SYSTICK (SysTick Timer)"
|
|
base ad:0xE000E010
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. "COUNTFLAG,Count flag" "0,1"
|
|
bitfld.long 0x00 2. "CLKSOURCE,Clock source" "0,1"
|
|
bitfld.long 0x00 1. "TICKINT,Tick interrupt" "0,1"
|
|
bitfld.long 0x00 0. "ENABLE,SysTick enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RVR,SysTick Reload Value Register"
|
|
bitfld.long 0x00 24. "RELOAD,Counter reload value" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CVR,SysTick Current Value Register"
|
|
bitfld.long 0x00 24. "CURRENT,Current counter value" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "CALIB,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. "NOREF,No reference" "0,1"
|
|
bitfld.long 0x00 30. "SKEW,Skew" "0,1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "TENMS,Ten milliseconds"
|
|
tree.end
|
|
tree "TC (Basic Timer Counter)"
|
|
repeat 3. (list 0. 1. 2.) (list ad:0x42001C00 ad:0x42002000 ad:0x42002400)
|
|
tree "TC$1"
|
|
base $2
|
|
tree "COUNT8"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLA,Control A"
|
|
bitfld.long 0x00 27.--28. "CAPTMODE1,Capture mode Channel 1" "0: Default capture,1: Minimum capture,2: Maximum capture,?..."
|
|
bitfld.long 0x00 24.--25. "CAPTMODE0,Capture Mode Channel 0" "0: Default capture,1: Minimum capture,2: Maximum capture,?..."
|
|
newline
|
|
bitfld.long 0x00 21. "COPEN1,Capture On Pin 1 Enable" "0,1"
|
|
bitfld.long 0x00 20. "COPEN0,Capture On Pin 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "CAPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x00 16. "CAPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ALOCK,Auto Lock" "0,1"
|
|
bitfld.long 0x00 8.--10. "PRESCALER,Prescaler" "0: Prescaler,1: Prescaler,2: Prescaler,3: Prescaler,4: Prescaler,5: Prescaler,6: Prescaler,7: Prescaler"
|
|
newline
|
|
bitfld.long 0x00 7. "ONDEMAND,Clock On Demand" "0,1"
|
|
bitfld.long 0x00 6. "RUNSTDBY,Run during Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PRESCSYNC,Prescaler and Counter Synchronization" "0: Reload or reset the counter on next generic..,1: Reload or reset the counter on next prescaler..,2: Reload or reset the counter on next generic..,?..."
|
|
bitfld.long 0x00 2.--3. "MODE,Timer Counter Mode" "0: Counter in 16-bit mode,1: Counter in 8-bit mode,2: Counter in 32-bit mode,?..."
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x00 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,?..."
|
|
bitfld.byte 0x00 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x00 0. "DIR,Counter Direction" "0,1"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x00 5.--7. "CMD,Command" "0: No action,1: Force a start restart or retrigger,2: Force a stop,3: Force update of double-buffered register,4: Force a read synchronization of COUNT,?..."
|
|
bitfld.byte 0x00 2. "ONESHOT,One-Shot on Counter" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "LUPD,Lock Update" "0,1"
|
|
bitfld.byte 0x00 0. "DIR,Counter Direction" "0,1"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "EVCTRL,Event Control"
|
|
bitfld.word 0x00 13. "MCEO1,MC Event Output Enable 1" "0,1"
|
|
bitfld.word 0x00 12. "MCEO0,MC Event Output Enable 0" "0,1"
|
|
newline
|
|
bitfld.word 0x00 8. "OVFEO,Event Output Enable" "0,1"
|
|
bitfld.word 0x00 5. "TCEI,TC Event Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. "TCINV,TC Event Input Polarity" "0,1"
|
|
bitfld.word 0x00 0.--2. "EVACT,Event Action" "0: Event action disabled,1: Start restart or retrigger TC on event,2: Count on event,3: Start TC on event,4: Time stamp capture,5: Period catured in CC0 pulse width in CC1,6: Period catured in CC1 pulse width in CC0,7: Pulse width capture"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 5. "MC1,MC Interrupt Disable 1" "0,1"
|
|
bitfld.byte 0x00 4. "MC0,MC Interrupt Disable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "ERR,ERR Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 0. "OVF,OVF Interrupt Disable" "0,1"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 5. "MC1,MC Interrupt Enable 1" "0,1"
|
|
bitfld.byte 0x00 4. "MC0,MC Interrupt Enable 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "ERR,ERR Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "OVF,OVF Interrupt Enable" "0,1"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 5. "MC1,MC Interrupt Flag 1" "0,1"
|
|
bitfld.byte 0x00 4. "MC0,MC Interrupt Flag 0" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 1. "ERR,ERR Interrupt Flag" "0,1"
|
|
bitfld.byte 0x00 0. "OVF,OVF Interrupt Flag" "0,1"
|
|
group.byte 0x0B++0x00
|
|
line.byte 0x00 "STATUS,Status"
|
|
bitfld.byte 0x00 5. "CCBUFV1,Compare channel buffer 1 valid" "0,1"
|
|
bitfld.byte 0x00 4. "CCBUFV0,Compare channel buffer 0 valid" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 3. "PERBUFV,Synchronization Busy Status" "0,1"
|
|
bitfld.byte 0x00 1. "SLAVE,Slave Status Flag" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "STOP,Stop Status Flag" "0,1"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "WAVE,Waveform Generation Control"
|
|
bitfld.byte 0x00 0.--1. "WAVEGEN,Waveform Generation Mode" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Match PWM"
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "DRVCTRL,Control C"
|
|
bitfld.byte 0x00 1. "INVEN1,Output Waveform Invert Enable 1" "0,1"
|
|
bitfld.byte 0x00 0. "INVEN0,Output Waveform Invert Enable 0" "0,1"
|
|
group.byte 0x0F++0x00
|
|
line.byte 0x00 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x00 0. "DBGRUN,Run During Debug" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Status"
|
|
bitfld.long 0x00 7. "CC1,Compare Channel 1" "0,1"
|
|
bitfld.long 0x00 6. "CC0,Compare Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "PER,Period" "0,1"
|
|
bitfld.long 0x00 4. "COUNT,Counter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "STATUS,STATUS" "0,1"
|
|
bitfld.long 0x00 2. "CTRLB,CTRLB" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,enable" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,swrst" "0,1"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "COUNT,COUNT8 Count"
|
|
hexmask.byte 0x00 0.--7. 1. "COUNT,Counter Value"
|
|
group.byte 0x1B++0x00
|
|
line.byte 0x00 "PER,COUNT8 Period"
|
|
hexmask.byte 0x00 0.--7. 1. "PER,Period Value"
|
|
repeat 2. (increment 0 1) (increment 0 0x1)
|
|
group.byte ($2+0x1C)++0x00
|
|
line.byte 0x00 "CC[$1],COUNT8 Compare and Capture $1"
|
|
hexmask.byte 0x00 0.--7. 1. "CC,Counter/Compare Value"
|
|
repeat.end
|
|
group.byte 0x2F++0x00
|
|
line.byte 0x00 "PERBUF,COUNT8 Period Buffer"
|
|
hexmask.byte 0x00 0.--7. 1. "PERBUF,Period Buffer Value"
|
|
repeat 2. (increment 0 1) (increment 0 0x1)
|
|
group.byte ($2+0x30)++0x00
|
|
line.byte 0x00 "CCBUF[$1],COUNT8 Compare and Capture Buffer $1"
|
|
hexmask.byte 0x00 0.--7. 1. "CCBUF,Counter/Compare Buffer Value"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TCC (Timer Counter for Control Applications)"
|
|
repeat 4. (list 0. 1. 2. 3.) (list ad:0x42002800 ad:0x42002C00 ad:0x42003000 ad:0x42003400)
|
|
tree "TCC$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLA,Control A"
|
|
bitfld.long 0x00 27. "CPTEN3,Capture Channel 3 Enable" "0,1"
|
|
bitfld.long 0x00 26. "CPTEN2,Capture Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "CPTEN1,Capture Channel 1 Enable" "0,1"
|
|
bitfld.long 0x00 24. "CPTEN0,Capture Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "DMAOS,DMA One-shot Trigger Mode" "0,1"
|
|
bitfld.long 0x00 16. "FCYCLE,Full Cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1"
|
|
bitfld.long 0x00 14. "ALOCK,Auto Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and..,?..."
|
|
bitfld.long 0x00 11. "RUNSTDBY,Run in Standby" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024"
|
|
bitfld.long 0x00 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames"
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "CTRLBCLR,Control B Clear"
|
|
bitfld.byte 0x00 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?..."
|
|
bitfld.byte 0x00 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled,1: Set index,2: Clear index,3: Hold index"
|
|
newline
|
|
bitfld.byte 0x00 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x00 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DIR,Counter Direction" "0,1"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "CTRLBSET,Control B Set"
|
|
bitfld.byte 0x00 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?..."
|
|
bitfld.byte 0x00 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled,1: Set index,2: Clear index,3: Hold index"
|
|
newline
|
|
bitfld.byte 0x00 2. "ONESHOT,One-Shot" "0,1"
|
|
bitfld.byte 0x00 1. "LUPD,Lock Update" "0,1"
|
|
newline
|
|
bitfld.byte 0x00 0. "DIR,Counter Direction" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x00 11. "CC3,Compare Channel 3 Busy" "0,1"
|
|
bitfld.long 0x00 10. "CC2,Compare Channel 2 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,Compare Channel 1 Busy" "0,1"
|
|
bitfld.long 0x00 8. "CC0,Compare Channel 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "PER,Period Busy" "0,1"
|
|
bitfld.long 0x00 6. "WAVE,Wave Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "PATT,Pattern Busy" "0,1"
|
|
bitfld.long 0x00 4. "COUNT,Count Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "STATUS,Status Busy" "0,1"
|
|
bitfld.long 0x00 2. "CTRLB,Ctrlb Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ENABLE,Enable Busy" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Swrst Busy" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FCTRLA,Recoverable Fault A Configuration"
|
|
bitfld.long 0x00 24.--27. "FILTERVAL,Fault A Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BLANKVAL,Fault A Blanking Time"
|
|
newline
|
|
bitfld.long 0x00 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1"
|
|
bitfld.long 0x00 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x00 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x00 7. "RESTART,Fault A Restart" "0,1"
|
|
bitfld.long 0x00 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the..,2: Blanking applied from falling edge of the..,3: Blanking applied from each toggle of the.."
|
|
newline
|
|
bitfld.long 0x00 4. "QUAL,Fault A Qualification" "0,1"
|
|
bitfld.long 0x00 3. "KEEP,Fault A Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of.."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FCTRLB,Recoverable Fault B Configuration"
|
|
bitfld.long 0x00 24.--27. "FILTERVAL,Fault B Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BLANKVAL,Fault B Blanking Time"
|
|
newline
|
|
bitfld.long 0x00 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1"
|
|
bitfld.long 0x00 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3"
|
|
bitfld.long 0x00 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault"
|
|
newline
|
|
bitfld.long 0x00 7. "RESTART,Fault B Restart" "0,1"
|
|
bitfld.long 0x00 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the..,2: Blanking applied from falling edge of the..,3: Blanking applied from each toggle of the.."
|
|
newline
|
|
bitfld.long 0x00 4. "QUAL,Fault B Qualification" "0,1"
|
|
bitfld.long 0x00 3. "KEEP,Fault B Keeper" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of.."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "WEXCTRL,Waveform Extension Configuration"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DTHS,Dead-time High Side Outputs Value"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value"
|
|
newline
|
|
bitfld.long 0x00 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1"
|
|
bitfld.long 0x00 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1"
|
|
bitfld.long 0x00 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "OTMX,Output Matrix" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DRVCTRL,Driver Control"
|
|
bitfld.long 0x00 28.--31. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 23. "INVEN7,Output Waveform 7 Inversion" "0,1"
|
|
bitfld.long 0x00 22. "INVEN6,Output Waveform 6 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "INVEN5,Output Waveform 5 Inversion" "0,1"
|
|
bitfld.long 0x00 20. "INVEN4,Output Waveform 4 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "INVEN3,Output Waveform 3 Inversion" "0,1"
|
|
bitfld.long 0x00 18. "INVEN2,Output Waveform 2 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "INVEN1,Output Waveform 1 Inversion" "0,1"
|
|
bitfld.long 0x00 16. "INVEN0,Output Waveform 0 Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1"
|
|
bitfld.long 0x00 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1"
|
|
bitfld.long 0x00 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1"
|
|
bitfld.long 0x00 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1"
|
|
bitfld.long 0x00 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1"
|
|
bitfld.long 0x00 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1"
|
|
bitfld.long 0x00 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1"
|
|
bitfld.long 0x00 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1"
|
|
bitfld.long 0x00 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1"
|
|
group.byte 0x1E++0x00
|
|
line.byte 0x00 "DBGCTRL,Debug Control"
|
|
bitfld.byte 0x00 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1"
|
|
bitfld.byte 0x00 0. "DBGRUN,Debug Running Mode" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "EVCTRL,Event Control"
|
|
bitfld.long 0x00 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1"
|
|
bitfld.long 0x00 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1"
|
|
bitfld.long 0x00 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1"
|
|
bitfld.long 0x00 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x00 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "TCINV1,Inverted Event 1 Input Enable" "0,1"
|
|
bitfld.long 0x00 12. "TCINV0,Inverted Event 0 Input Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CNTEO,Timer/counter Output Event Enable" "0,1"
|
|
bitfld.long 0x00 9. "TRGEO,Retrigger Output Event Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a..,?,3: An interrupt/event is generated when a new.."
|
|
newline
|
|
bitfld.long 0x00 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse..,7: Non-recoverable fault"
|
|
bitfld.long 0x00 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.long 0x00 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.long 0x00 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERR,Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "CNT,Counter Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TRG,Retrigger Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "OVF,Overflow Interrupt Enable" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.long 0x00 19. "MC3,Match or Capture 3" "0,1"
|
|
bitfld.long 0x00 18. "MC2,Match or Capture 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "MC1,Match or Capture 1" "0,1"
|
|
bitfld.long 0x00 16. "MC0,Match or Capture 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "FAULT1,Non-Recoverable Fault 1" "0,1"
|
|
bitfld.long 0x00 14. "FAULT0,Non-Recoverable Fault 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "FAULTB,Recoverable Fault B" "0,1"
|
|
bitfld.long 0x00 12. "FAULTA,Recoverable Fault A" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "DFS,Non-Recoverable Debug Fault" "0,1"
|
|
bitfld.long 0x00 10. "UFS,Non-Recoverable Update Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERR,Error" "0,1"
|
|
bitfld.long 0x00 2. "CNT,Counter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TRG,Retrigger" "0,1"
|
|
bitfld.long 0x00 0. "OVF,Overflow" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "STATUS,Status"
|
|
bitfld.long 0x00 27. "CMP3,Compare Channel 3 Value" "0,1"
|
|
bitfld.long 0x00 26. "CMP2,Compare Channel 2 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "CMP1,Compare Channel 1 Value" "0,1"
|
|
bitfld.long 0x00 24. "CMP0,Compare Channel 0 Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1"
|
|
bitfld.long 0x00 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1"
|
|
bitfld.long 0x00 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1"
|
|
bitfld.long 0x00 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "FAULTB,Recoverable Fault B State" "0,1"
|
|
bitfld.long 0x00 12. "FAULTA,Recoverable Fault A State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1"
|
|
bitfld.long 0x00 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "FAULTBIN,Recoverable Fault B Input" "0,1"
|
|
bitfld.long 0x00 8. "FAULTAIN,Recoverable Fault A Input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "PERBUFV,Period Buffer Valid" "0,1"
|
|
bitfld.long 0x00 5. "PATTBUFV,Pattern Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SLAVE,Slave" "0,1"
|
|
bitfld.long 0x00 3. "DFS,Non-Recoverable Debug Fault State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UFS,Non-recoverable Update Fault State" "0,1"
|
|
bitfld.long 0x00 1. "IDX,Ramp" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STOP,Stop" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "COUNT,Count"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "COUNT_DITH4_MODE,Count"
|
|
hexmask.long.tbyte 0x00 4.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "COUNT_DITH5_MODE,Count"
|
|
hexmask.long.tbyte 0x00 5.--23. 1. "COUNT,Counter Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "COUNT_DITH6_MODE,Count"
|
|
hexmask.long.tbyte 0x00 6.--23. 1. "COUNT,Counter Value"
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "PATT,Pattern"
|
|
bitfld.word 0x00 15. "PGV7,Pattern Generator 7 Output Value" "0,1"
|
|
bitfld.word 0x00 14. "PGV6,Pattern Generator 6 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x00 13. "PGV5,Pattern Generator 5 Output Value" "0,1"
|
|
bitfld.word 0x00 12. "PGV4,Pattern Generator 4 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x00 11. "PGV3,Pattern Generator 3 Output Value" "0,1"
|
|
bitfld.word 0x00 10. "PGV2,Pattern Generator 2 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "PGV1,Pattern Generator 1 Output Value" "0,1"
|
|
bitfld.word 0x00 8. "PGV0,Pattern Generator 0 Output Value" "0,1"
|
|
newline
|
|
bitfld.word 0x00 7. "PGE7,Pattern Generator 7 Output Enable" "0,1"
|
|
bitfld.word 0x00 6. "PGE6,Pattern Generator 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "PGE5,Pattern Generator 5 Output Enable" "0,1"
|
|
bitfld.word 0x00 4. "PGE4,Pattern Generator 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 3. "PGE3,Pattern Generator 3 Output Enable" "0,1"
|
|
bitfld.word 0x00 2. "PGE2,Pattern Generator 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "PGE1,Pattern Generator 1 Output Enable" "0,1"
|
|
bitfld.word 0x00 0. "PGE0,Pattern Generator 0 Output Enable" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "WAVE,Waveform Control"
|
|
bitfld.long 0x00 27. "SWAP3,Swap DTI Output Pair 3" "0,1"
|
|
bitfld.long 0x00 26. "SWAP2,Swap DTI Output Pair 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "SWAP1,Swap DTI Output Pair 1" "0,1"
|
|
bitfld.long 0x00 24. "SWAP0,Swap DTI Output Pair 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "POL3,Channel 3 Polarity" "0: Dual Compare PWM waveform generation Channel..,1: Dual Compare PWM waveform generation Channel.."
|
|
bitfld.long 0x00 18. "POL2,Channel 2 Polarity" "0: Dual Compare PWM waveform generation Channel..,1: Dual Compare PWM waveform generation Channel.."
|
|
newline
|
|
bitfld.long 0x00 17. "POL1,Channel 1 Polarity" "0: Dual Compare PWM waveform generation Channel..,1: Dual Compare PWM waveform generation Channel.."
|
|
bitfld.long 0x00 16. "POL0,Channel 0 Polarity" "0: Dual Compare PWM waveform generation Channel..,1: Dual Compare PWM waveform generation Channel.."
|
|
newline
|
|
bitfld.long 0x00 11. "CICCEN3,Circular Channel 3 Enable" "0,1"
|
|
bitfld.long 0x00 10. "CICCEN2,Circular Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CICCEN1,Circular Channel 1 Enable" "0,1"
|
|
bitfld.long 0x00 8. "CICCEN0,Circular Channel 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CIPEREN,Circular period Enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition..,6: Dual-slope with interrupt/event condition..,7: Dual-slope with interrupt/event condition.."
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PER,Period"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "PER,Period Value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PER_DITH4_MODE,Period"
|
|
hexmask.long.tbyte 0x00 4.--23. 1. "PER,Period Value"
|
|
bitfld.long 0x00 0.--3. "DITHER,Dithering Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PER_DITH5_MODE,Period"
|
|
hexmask.long.tbyte 0x00 5.--23. 1. "PER,Period Value"
|
|
bitfld.long 0x00 0.--4. "DITHER,Dithering Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PER_DITH6_MODE,Period"
|
|
hexmask.long.tbyte 0x00 6.--23. 1. "PER,Period Value"
|
|
bitfld.long 0x00 0.--5. "DITHER,Dithering Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x44)++0x03
|
|
line.long 0x00 "CC[$1],Compare and Capture $1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "CC,Channel Compare/Capture Value"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x44)++0x03
|
|
line.long 0x00 "CC_DITH4_MODE[$1],Compare and Capture $1"
|
|
hexmask.long.tbyte 0x00 4.--23. 1. "CC,Channel Compare/Capture Value"
|
|
bitfld.long 0x00 0.--3. "DITHER,Dithering Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x44)++0x03
|
|
line.long 0x00 "CC_DITH5_MODE[$1],Compare and Capture $1"
|
|
hexmask.long.tbyte 0x00 5.--23. 1. "CC,Channel Compare/Capture Value"
|
|
bitfld.long 0x00 0.--4. "DITHER,Dithering Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x44)++0x03
|
|
line.long 0x00 "CC_DITH6_MODE[$1],Compare and Capture $1"
|
|
hexmask.long.tbyte 0x00 6.--23. 1. "CC,Channel Compare/Capture Value"
|
|
bitfld.long 0x00 0.--5. "DITHER,Dithering Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
repeat.end
|
|
group.word 0x64++0x01
|
|
line.word 0x00 "PATTBUF,Pattern Buffer"
|
|
bitfld.word 0x00 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1"
|
|
bitfld.word 0x00 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x00 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1"
|
|
bitfld.word 0x00 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x00 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1"
|
|
bitfld.word 0x00 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x00 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1"
|
|
bitfld.word 0x00 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x00 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x00 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x00 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x00 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x00 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x00 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1"
|
|
bitfld.word 0x00 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PERBUF,Period Buffer"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "PERBUF,Period Buffer Value"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PERBUF_DITH4_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x00 4.--23. 1. "PERBUF,Period Buffer Value"
|
|
bitfld.long 0x00 0.--3. "DITHERBUF,Dithering Buffer Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PERBUF_DITH5_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x00 5.--23. 1. "PERBUF,Period Buffer Value"
|
|
bitfld.long 0x00 0.--4. "DITHERBUF,Dithering Buffer Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PERBUF_DITH6_MODE,Period Buffer"
|
|
hexmask.long.tbyte 0x00 6.--23. 1. "PERBUF,Period Buffer Value"
|
|
bitfld.long 0x00 0.--5. "DITHERBUF,Dithering Buffer Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x70)++0x03
|
|
line.long 0x00 "CCBUF[$1],Compare and Capture Buffer $1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x70)++0x03
|
|
line.long 0x00 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer $1"
|
|
hexmask.long.tbyte 0x00 4.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
bitfld.long 0x00 0.--3. "DITHERBUF,Dithering Buffer Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x70)++0x03
|
|
line.long 0x00 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer $1"
|
|
hexmask.long.tbyte 0x00 5.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
bitfld.long 0x00 0.--4. "DITHERBUF,Dithering Buffer Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x70)++0x03
|
|
line.long 0x00 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer $1"
|
|
hexmask.long.tbyte 0x00 6.--23. 1. "CCBUF,Channel Compare/Capture Buffer Value"
|
|
bitfld.long 0x00 0.--5. "DITHERBUF,Dithering Buffer Cycle Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TRAM (TrustRAM)"
|
|
base ad:0x42005400
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control"
|
|
bitfld.byte 0x00 7. "SILACC,Silent Access" "0,1"
|
|
bitfld.byte 0x00 6. "DRP,Data Remanence Prevention" "0,1"
|
|
bitfld.byte 0x00 4. "TAMPERS,Tamper Erase" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 1. "DRP,Data Remanence Prevention Ended Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "ERR,TrustRAM Readout Error Interrupt Enable" "0,1"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 1. "DRP,Data Remanence Prevention Ended Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "ERR,TrustRAM Readout Error Interrupt Enable" "0,1"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 1. "DRP,Data Remanence Prevention Ended" "0,1"
|
|
bitfld.byte 0x00 0. "ERR,TrustRAM Readout Error" "0,1"
|
|
rgroup.byte 0x07++0x00
|
|
line.byte 0x00 "STATUS,Status"
|
|
bitfld.byte 0x00 1. "DRP,Data Remanence Prevention Ongoing" "0,1"
|
|
bitfld.byte 0x00 0. "RAMINV,RAM Inversion Bit" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Status"
|
|
bitfld.long 0x00 1. "ENABLE,Enable Busy" "0,1"
|
|
bitfld.long 0x00 0. "SWRST,Software Reset Busy" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "DSCC,Data Scramble Control"
|
|
bitfld.long 0x00 31. "DSCEN,Data Scramble Enable" "0,1"
|
|
hexmask.long 0x00 0.--29. 1. "DSCKEY,Data Scramble Key"
|
|
repeat 128. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x200)++0x03
|
|
line.long 0x00 "RAM[$1],TrustRAM $1"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Trust RAM Data"
|
|
repeat.end
|
|
repeat 128. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x200)++0x03
|
|
line.long 0x00 "RAM_BYTE_MODE[$1],TrustRAM $1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "BYTE3,Trust RAM Data"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BYTE2,Trust RAM Data"
|
|
hexmask.long.byte 0x00 8.--15. 1. "BYTE1,Trust RAM Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BYTE0,Trust RAM Data"
|
|
repeat.end
|
|
repeat 128. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x200)++0x03
|
|
line.long 0x00 "RAM_HALFWORD_MODE[$1],TrustRAM $1"
|
|
hexmask.long.word 0x00 16.--31. 1. "HWORD1,Trust RAM Halfword Data"
|
|
hexmask.long.word 0x00 0.--15. 1. "HWORD0,Trust RAM Halfword Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "TRNG (True Random Generator)"
|
|
base ad:0x42004400
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 6. "RUNSTDBY,Run in Standby" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "EVCTRL,Event Control"
|
|
bitfld.byte 0x00 0. "DATARDYEO,Data Ready Event Output" "0,1"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 0. "DATARDY,Data Ready Interrupt Enable" "0,1"
|
|
group.byte 0x09++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 0. "DATARDY,Data Ready Interrupt Enable" "0,1"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 0. "DATARDY,Data Ready Interrupt Flag" "0,1"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "DATA,Output Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Output Data"
|
|
tree.end
|
|
tree "USB (Universal Serial Bus)"
|
|
base ad:0x4100A000
|
|
tree "DEVICE"
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 7. "MODE,Operating Mode" "0: Device Mode,1: Host Mode"
|
|
bitfld.byte 0x00 2. "RUNSTDBY,Run in Standby Mode" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
rgroup.byte 0x02++0x00
|
|
line.byte 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable Synchronization Busy" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "QOSCTRL,USB Quality Of Service"
|
|
bitfld.byte 0x00 2.--3. "DQOS,Data Quality of Service" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--1. "CQOS,Configuration Quality of Service" "0,1,2,3"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "CTRLB,DEVICE Control B"
|
|
bitfld.word 0x00 10.--11. "LPMHDSK,Link Power Management Handshake" "0: No handshake,1: ACK,2: NYET,?..."
|
|
bitfld.word 0x00 9. "GNAK,Global NAK" "0,1"
|
|
bitfld.word 0x00 4. "NREPLY,No Reply" "0,1"
|
|
bitfld.word 0x00 2.--3. "SPDCONF,Speed Configuration" "0: FS,1: LS,?..."
|
|
bitfld.word 0x00 1. "UPRSM,Upstream Resume" "0,1"
|
|
bitfld.word 0x00 0. "DETACH,Detach" "0,1"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "DADD,DEVICE Device Address"
|
|
bitfld.byte 0x00 7. "ADDEN,Device Address Enable" "0,1"
|
|
hexmask.byte 0x00 0.--6. 1. "DADD,Device Address"
|
|
rgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "STATUS,DEVICE Status"
|
|
bitfld.byte 0x00 6.--7. "LINESTATE,USB Line State Status" "0: SE0/RESET,1: FS-J or LS-K State,2: FS-K or LS-J State,?..."
|
|
bitfld.byte 0x00 2.--3. "SPEED,Speed Status" "0: Full-speed mode,1: Low-speed mode,?..."
|
|
rgroup.byte 0x0D++0x00
|
|
line.byte 0x00 "FSMSTATUS,Finite State Machine Status"
|
|
hexmask.byte 0x00 0.--6. 1. "FSMSTATE,Fine State Machine Status"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "FNUM,DEVICE Device Frame Number"
|
|
bitfld.word 0x00 15. "FNCERR,Frame Number CRC Error" "0,1"
|
|
hexmask.word 0x00 3.--13. 1. "FNUM,Frame Number"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "INTENCLR,DEVICE Device Interrupt Enable Clear"
|
|
bitfld.word 0x00 9. "LPMSUSP,Link Power Management Suspend Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 8. "LPMNYET,Link Power Management Not Yet Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 7. "RAMACER,Ram Access Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 6. "UPRSM,Upstream Resume Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 5. "EORSM,End Of Resume Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 4. "WAKEUP,Wake Up Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 3. "EORST,End of Reset Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 2. "SOF,Start Of Frame Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "SUSPEND,Suspend Interrupt Enable" "0,1"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "INTENSET,DEVICE Device Interrupt Enable Set"
|
|
bitfld.word 0x00 9. "LPMSUSP,Link Power Management Suspend Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 8. "LPMNYET,Link Power Management Not Yet Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 7. "RAMACER,Ram Access Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 6. "UPRSM,Upstream Resume Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 5. "EORSM,End Of Resume Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 4. "WAKEUP,Wake Up Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 3. "EORST,End of Reset Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 2. "SOF,Start Of Frame Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "SUSPEND,Suspend Interrupt Enable" "0,1"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "INTFLAG,DEVICE Device Interrupt Flag"
|
|
bitfld.word 0x00 9. "LPMSUSP,Link Power Management Suspend" "0,1"
|
|
bitfld.word 0x00 8. "LPMNYET,Link Power Management Not Yet" "0,1"
|
|
bitfld.word 0x00 7. "RAMACER,Ram Access" "0,1"
|
|
bitfld.word 0x00 6. "UPRSM,Upstream Resume" "0,1"
|
|
bitfld.word 0x00 5. "EORSM,End Of Resume" "0,1"
|
|
bitfld.word 0x00 4. "WAKEUP,Wake Up" "0,1"
|
|
bitfld.word 0x00 3. "EORST,End of Reset" "0,1"
|
|
bitfld.word 0x00 2. "SOF,Start Of Frame" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "SUSPEND,Suspend" "0,1"
|
|
rgroup.word 0x20++0x01
|
|
line.word 0x00 "EPINTSMRY,DEVICE End Point Interrupt Summary"
|
|
bitfld.word 0x00 7. "EPINT7,End Point 7 Interrupt" "0,1"
|
|
bitfld.word 0x00 6. "EPINT6,End Point 6 Interrupt" "0,1"
|
|
bitfld.word 0x00 5. "EPINT5,End Point 5 Interrupt" "0,1"
|
|
bitfld.word 0x00 4. "EPINT4,End Point 4 Interrupt" "0,1"
|
|
bitfld.word 0x00 3. "EPINT3,End Point 3 Interrupt" "0,1"
|
|
bitfld.word 0x00 2. "EPINT2,End Point 2 Interrupt" "0,1"
|
|
bitfld.word 0x00 1. "EPINT1,End Point 1 Interrupt" "0,1"
|
|
bitfld.word 0x00 0. "EPINT0,End Point 0 Interrupt" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DESCADD,Descriptor Address"
|
|
hexmask.long 0x00 0.--31. 1. "DESCADD,Descriptor Address Value"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PADCAL,USB PAD Calibration"
|
|
bitfld.word 0x00 12.--14. "TRIM,USB Pad Trim calibration" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 6.--10. "TRANSN,USB Pad Transn calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. "TRANSP,USB Pad Transp calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat 8. (increment 0 1)(increment 0 0x20)
|
|
tree "DEVICE_ENDPOINT[$1]"
|
|
group.byte ($2+0x100)++0x00
|
|
line.byte 0x00 "EPCFG,DEVICE_ENDPOINT End Point Configuration"
|
|
bitfld.byte 0x00 4.--6. "EPTYPE1,End Point Type1" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--2. "EPTYPE0,End Point Type0" "0,1,2,3,4,5,6,7"
|
|
wgroup.byte ($2+0x104)++0x00
|
|
line.byte 0x00 "EPSTATUSCLR,DEVICE_ENDPOINT End Point Pipe Status Clear"
|
|
bitfld.byte 0x00 7. "BK1RDY,Bank 1 Ready Clear" "0,1"
|
|
bitfld.byte 0x00 6. "BK0RDY,Bank 0 Ready Clear" "0,1"
|
|
bitfld.byte 0x00 5. "STALLRQ1,Stall 1 Request Clear" "0,1"
|
|
bitfld.byte 0x00 4. "STALLRQ0,Stall 0 Request Clear" "0,1"
|
|
bitfld.byte 0x00 2. "CURBK,Current Bank Clear" "0,1"
|
|
bitfld.byte 0x00 1. "DTGLIN,Data Toggle IN Clear" "0,1"
|
|
bitfld.byte 0x00 0. "DTGLOUT,Data Toggle OUT Clear" "0,1"
|
|
wgroup.byte ($2+0x105)++0x00
|
|
line.byte 0x00 "EPSTATUSSET,DEVICE_ENDPOINT End Point Pipe Status Set"
|
|
bitfld.byte 0x00 7. "BK1RDY,Bank 1 Ready Set" "0,1"
|
|
bitfld.byte 0x00 6. "BK0RDY,Bank 0 Ready Set" "0,1"
|
|
bitfld.byte 0x00 5. "STALLRQ1,Stall 1 Request Set" "0,1"
|
|
bitfld.byte 0x00 4. "STALLRQ0,Stall 0 Request Set" "0,1"
|
|
bitfld.byte 0x00 2. "CURBK,Current Bank Set" "0,1"
|
|
bitfld.byte 0x00 1. "DTGLIN,Data Toggle IN Set" "0,1"
|
|
bitfld.byte 0x00 0. "DTGLOUT,Data Toggle OUT Set" "0,1"
|
|
rgroup.byte ($2+0x106)++0x00
|
|
line.byte 0x00 "EPSTATUS,DEVICE_ENDPOINT End Point Pipe Status"
|
|
bitfld.byte 0x00 7. "BK1RDY,Bank 1 ready" "0,1"
|
|
bitfld.byte 0x00 6. "BK0RDY,Bank 0 ready" "0,1"
|
|
bitfld.byte 0x00 5. "STALLRQ1,Stall 1 Request" "0,1"
|
|
bitfld.byte 0x00 4. "STALLRQ0,Stall 0 Request" "0,1"
|
|
bitfld.byte 0x00 2. "CURBK,Current Bank" "0,1"
|
|
bitfld.byte 0x00 1. "DTGLIN,Data Toggle In" "0,1"
|
|
bitfld.byte 0x00 0. "DTGLOUT,Data Toggle Out" "0,1"
|
|
group.byte ($2+0x107)++0x00
|
|
line.byte 0x00 "EPINTFLAG,DEVICE_ENDPOINT End Point Interrupt Flag"
|
|
bitfld.byte 0x00 6. "STALL1,Stall 1 In/out" "0,1"
|
|
bitfld.byte 0x00 5. "STALL0,Stall 0 In/out" "0,1"
|
|
bitfld.byte 0x00 4. "RXSTP,Received Setup" "0,1"
|
|
bitfld.byte 0x00 3. "TRFAIL1,Error Flow 1" "0,1"
|
|
bitfld.byte 0x00 2. "TRFAIL0,Error Flow 0" "0,1"
|
|
bitfld.byte 0x00 1. "TRCPT1,Transfer Complete 1" "0,1"
|
|
bitfld.byte 0x00 0. "TRCPT0,Transfer Complete 0" "0,1"
|
|
group.byte ($2+0x108)++0x00
|
|
line.byte 0x00 "EPINTENCLR,DEVICE_ENDPOINT End Point Interrupt Clear Flag"
|
|
bitfld.byte 0x00 6. "STALL1,Stall 1 In/Out Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 5. "STALL0,Stall 0 In/Out Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 4. "RXSTP,Received Setup Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 3. "TRFAIL1,Error Flow 1 Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 2. "TRFAIL0,Error Flow 0 Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 1. "TRCPT1,Transfer Complete 1 Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 0. "TRCPT0,Transfer Complete 0 Interrupt Disable" "0,1"
|
|
group.byte ($2+0x109)++0x00
|
|
line.byte 0x00 "EPINTENSET,DEVICE_ENDPOINT End Point Interrupt Set Flag"
|
|
bitfld.byte 0x00 6. "STALL1,Stall 1 In/out Interrupt enable" "0,1"
|
|
bitfld.byte 0x00 5. "STALL0,Stall 0 In/out Interrupt enable" "0,1"
|
|
bitfld.byte 0x00 4. "RXSTP,Received Setup Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 3. "TRFAIL1,Error Flow 1 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 2. "TRFAIL0,Error Flow 0 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "TRCPT1,Transfer Complete 1 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "TRCPT0,Transfer Complete 0 Interrupt Enable" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "HOST"
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control A"
|
|
bitfld.byte 0x00 7. "MODE,Operating Mode" "0: Device Mode,1: Host Mode"
|
|
bitfld.byte 0x00 2. "RUNSTDBY,Run in Standby Mode" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset" "0,1"
|
|
rgroup.byte 0x02++0x00
|
|
line.byte 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable Synchronization Busy" "0,1"
|
|
bitfld.byte 0x00 0. "SWRST,Software Reset Synchronization Busy" "0,1"
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "QOSCTRL,USB Quality Of Service"
|
|
bitfld.byte 0x00 2.--3. "DQOS,Data Quality of Service" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--1. "CQOS,Configuration Quality of Service" "0,1,2,3"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "CTRLB,HOST Control B"
|
|
bitfld.word 0x00 11. "L1RESUME,Send L1 Resume" "0,1"
|
|
bitfld.word 0x00 10. "VBUSOK,VBUS is OK" "0,1"
|
|
bitfld.word 0x00 9. "BUSRESET,Send USB Reset" "0,1"
|
|
bitfld.word 0x00 8. "SOFE,Start of Frame Generation Enable" "0,1"
|
|
bitfld.word 0x00 4. "AUTORESUME,Auto Resume Enable" "0,1"
|
|
bitfld.word 0x00 2.--3. "SPDCONF,Speed Configuration for Host" "0: Normal mode,?..."
|
|
bitfld.word 0x00 1. "RESUME,Send USB Resume" "0,1"
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "HSOFC,HOST Host Start Of Frame Control"
|
|
bitfld.byte 0x00 7. "FLENCE,Frame Length Control Enable" "0,1"
|
|
bitfld.byte 0x00 0.--3. "FLENC,Frame Length Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "STATUS,HOST Status"
|
|
bitfld.byte 0x00 6.--7. "LINESTATE,USB Line State Status" "0: SE0/RESET,1: FS-J or LS-K State,2: FS-K or LS-J State,?..."
|
|
bitfld.byte 0x00 2.--3. "SPEED,Speed Status" "0: Full-speed mode,1: Low-speed mode,?..."
|
|
rgroup.byte 0x0D++0x00
|
|
line.byte 0x00 "FSMSTATUS,Finite State Machine Status"
|
|
hexmask.byte 0x00 0.--6. 1. "FSMSTATE,Fine State Machine Status"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "FNUM,HOST Host Frame Number"
|
|
hexmask.word 0x00 3.--13. 1. "FNUM,Frame Number"
|
|
rgroup.byte 0x12++0x00
|
|
line.byte 0x00 "FLENHIGH,HOST Host Frame Length"
|
|
hexmask.byte 0x00 0.--7. 1. "FLENHIGH,Frame Length"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "INTENCLR,HOST Host Interrupt Enable Clear"
|
|
bitfld.word 0x00 9. "DDISC,Device Disconnection Interrupt Disable" "0,1"
|
|
bitfld.word 0x00 8. "DCONN,Device Connection Interrupt Disable" "0,1"
|
|
bitfld.word 0x00 7. "RAMACER,Ram Access Interrupt Disable" "0,1"
|
|
bitfld.word 0x00 6. "UPRSM,Upstream Resume from Device Interrupt Disable" "0,1"
|
|
bitfld.word 0x00 5. "DNRSM,DownStream to Device Interrupt Disable" "0,1"
|
|
bitfld.word 0x00 4. "WAKEUP,Wake Up Interrupt Disable" "0,1"
|
|
bitfld.word 0x00 3. "RST,BUS Reset Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "HSOF,Host Start Of Frame Interrupt Disable" "0,1"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "INTENSET,HOST Host Interrupt Enable Set"
|
|
bitfld.word 0x00 9. "DDISC,Device Disconnection Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 8. "DCONN,Link Power Management Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 7. "RAMACER,Ram Access Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 6. "UPRSM,Upstream Resume fromthe device Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 5. "DNRSM,DownStream to the Device Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 4. "WAKEUP,Wake Up Interrupt Enable" "0,1"
|
|
bitfld.word 0x00 3. "RST,Bus Reset Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "HSOF,Host Start Of Frame Interrupt Enable" "0,1"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "INTFLAG,HOST Host Interrupt Flag"
|
|
bitfld.word 0x00 9. "DDISC,Device Disconnection" "0,1"
|
|
bitfld.word 0x00 8. "DCONN,Device Connection" "0,1"
|
|
bitfld.word 0x00 7. "RAMACER,Ram Access" "0,1"
|
|
bitfld.word 0x00 6. "UPRSM,Upstream Resume from the Device" "0,1"
|
|
bitfld.word 0x00 5. "DNRSM,Downstream" "0,1"
|
|
bitfld.word 0x00 4. "WAKEUP,Wake Up" "0,1"
|
|
bitfld.word 0x00 3. "RST,Bus Reset" "0,1"
|
|
newline
|
|
bitfld.word 0x00 2. "HSOF,Host Start Of Frame" "0,1"
|
|
rgroup.word 0x20++0x01
|
|
line.word 0x00 "PINTSMRY,HOST Pipe Interrupt Summary"
|
|
bitfld.word 0x00 7. "PINT7,Pipe 7 Interrupt" "0,1"
|
|
bitfld.word 0x00 6. "PINT6,Pipe 6 Interrupt" "0,1"
|
|
bitfld.word 0x00 5. "PINT5,Pipe 5 Interrupt" "0,1"
|
|
bitfld.word 0x00 4. "PINT4,Pipe 4 Interrupt" "0,1"
|
|
bitfld.word 0x00 3. "PINT3,Pipe 3 Interrupt" "0,1"
|
|
bitfld.word 0x00 2. "PINT2,Pipe 2 Interrupt" "0,1"
|
|
bitfld.word 0x00 1. "PINT1,Pipe 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.word 0x00 0. "PINT0,Pipe 0 Interrupt" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DESCADD,Descriptor Address"
|
|
hexmask.long 0x00 0.--31. 1. "DESCADD,Descriptor Address Value"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PADCAL,USB PAD Calibration"
|
|
bitfld.word 0x00 12.--14. "TRIM,USB Pad Trim calibration" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 6.--10. "TRANSN,USB Pad Transn calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. "TRANSP,USB Pad Transp calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
repeat 8. (increment 0 1)(increment 0 0x20)
|
|
tree "HOST_PIPE[$1]"
|
|
group.byte ($2+0x100)++0x00
|
|
line.byte 0x00 "PCFG,HOST_PIPE End Point Configuration"
|
|
bitfld.byte 0x00 3.--5. "PTYPE,Pipe Type" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 2. "BK,Pipe Bank" "0,1"
|
|
bitfld.byte 0x00 0.--1. "PTOKEN,Pipe Token" "0,1,2,3"
|
|
group.byte ($2+0x103)++0x00
|
|
line.byte 0x00 "BINTERVAL,HOST_PIPE Bus Access Period of Pipe"
|
|
hexmask.byte 0x00 0.--7. 1. "BINTERVAL,Bit Interval"
|
|
wgroup.byte ($2+0x104)++0x00
|
|
line.byte 0x00 "PSTATUSCLR,HOST_PIPE End Point Pipe Status Clear"
|
|
bitfld.byte 0x00 7. "BK1RDY,Bank 1 Ready Clear" "0,1"
|
|
bitfld.byte 0x00 6. "BK0RDY,Bank 0 Ready Clear" "0,1"
|
|
bitfld.byte 0x00 4. "PFREEZE,Pipe Freeze Clear" "0,1"
|
|
bitfld.byte 0x00 2. "CURBK,Curren Bank clear" "0,1"
|
|
bitfld.byte 0x00 0. "DTGL,Data Toggle clear" "0,1"
|
|
wgroup.byte ($2+0x105)++0x00
|
|
line.byte 0x00 "PSTATUSSET,HOST_PIPE End Point Pipe Status Set"
|
|
bitfld.byte 0x00 7. "BK1RDY,Bank 1 Ready Set" "0,1"
|
|
bitfld.byte 0x00 6. "BK0RDY,Bank 0 Ready Set" "0,1"
|
|
bitfld.byte 0x00 4. "PFREEZE,Pipe Freeze Set" "0,1"
|
|
bitfld.byte 0x00 2. "CURBK,Current Bank Set" "0,1"
|
|
bitfld.byte 0x00 0. "DTGL,Data Toggle Set" "0,1"
|
|
rgroup.byte ($2+0x106)++0x00
|
|
line.byte 0x00 "PSTATUS,HOST_PIPE End Point Pipe Status"
|
|
bitfld.byte 0x00 7. "BK1RDY,Bank 1 ready" "0,1"
|
|
bitfld.byte 0x00 6. "BK0RDY,Bank 0 ready" "0,1"
|
|
bitfld.byte 0x00 4. "PFREEZE,Pipe Freeze" "0,1"
|
|
bitfld.byte 0x00 2. "CURBK,Current Bank" "0,1"
|
|
bitfld.byte 0x00 0. "DTGL,Data Toggle" "0,1"
|
|
group.byte ($2+0x107)++0x00
|
|
line.byte 0x00 "PINTFLAG,HOST_PIPE Pipe Interrupt Flag"
|
|
bitfld.byte 0x00 5. "STALL,Stall Interrupt Flag" "0,1"
|
|
bitfld.byte 0x00 4. "TXSTP,Transmit Setup Interrupt Flag" "0,1"
|
|
bitfld.byte 0x00 3. "PERR,Pipe Error Interrupt Flag" "0,1"
|
|
bitfld.byte 0x00 2. "TRFAIL,Error Flow Interrupt Flag" "0,1"
|
|
bitfld.byte 0x00 1. "TRCPT1,Transfer Complete 1 Interrupt Flag" "0,1"
|
|
bitfld.byte 0x00 0. "TRCPT0,Transfer Complete 0 Interrupt Flag" "0,1"
|
|
group.byte ($2+0x108)++0x00
|
|
line.byte 0x00 "PINTENCLR,HOST_PIPE Pipe Interrupt Flag Clear"
|
|
bitfld.byte 0x00 5. "STALL,Stall Inetrrupt Disable" "0,1"
|
|
bitfld.byte 0x00 4. "TXSTP,Transmit Setup Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 3. "PERR,Pipe Error Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 2. "TRFAIL,Error Flow Interrupt Disable" "0,1"
|
|
bitfld.byte 0x00 1. "TRCPT1,Transfer Complete 1 Disable" "0,1"
|
|
bitfld.byte 0x00 0. "TRCPT0,Transfer Complete 0 Disable" "0,1"
|
|
group.byte ($2+0x109)++0x00
|
|
line.byte 0x00 "PINTENSET,HOST_PIPE Pipe Interrupt Flag Set"
|
|
bitfld.byte 0x00 5. "STALL,Stall Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 4. "TXSTP,Transmit Setup Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 3. "PERR,Pipe Error Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 2. "TRFAIL,Error Flow Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 1. "TRCPT1,Transfer Complete 1 Interrupt Enable" "0,1"
|
|
bitfld.byte 0x00 0. "TRCPT0,Transfer Complete 0 Interrupt Enable" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "WDT (Watchdog Timer Unit)"
|
|
base ad:0x40002000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRLA,Control"
|
|
bitfld.byte 0x00 7. "ALWAYSON,Always-On" "0,1"
|
|
bitfld.byte 0x00 6. "RUNSTDBY,Run During Standby" "0,1"
|
|
bitfld.byte 0x00 2. "WEN,Watchdog Timer Window Mode Enable" "0,1"
|
|
bitfld.byte 0x00 1. "ENABLE,Enable" "0,1"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "CONFIG,Configuration"
|
|
bitfld.byte 0x00 4.--7. "WINDOW,Window Mode Time-Out Period" "0: 8 clock cycles,1: 16 clock cycles,2: 32 clock cycles,3: 64 clock cycles,4: 128 clock cycles,5: 256 clock cycles,6: 512 clock cycles,7: 1024 clock cycles,8: 2048 clock cycles,9: 4096 clock cycles,10: 8192 clock cycles,11: 16384 clock cycles,?..."
|
|
bitfld.byte 0x00 0.--3. "PER,Time-Out Period" "0: 8 clock cycles,1: 16 clock cycles,2: 32 clock cycles,3: 64 clock cycles,4: 128 clock cycles,5: 256 clock cycles,6: 512 clock cycles,7: 1024 clock cycles,8: 2048 clock cycles,9: 4096 clock cycles,10: 8192 clock cycles,11: 16384 clock cycles,?..."
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "EWCTRL,Early Warning Interrupt Control"
|
|
bitfld.byte 0x00 0.--3. "EWOFFSET,Early Warning Interrupt Time Offset" "0: 8 clock cycles,1: 16 clock cycles,2: 32 clock cycles,3: 64 clock cycles,4: 128 clock cycles,5: 256 clock cycles,6: 512 clock cycles,7: 1024 clock cycles,8: 2048 clock cycles,9: 4096 clock cycles,10: 8192 clock cycles,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "INTENCLR,Interrupt Enable Clear"
|
|
bitfld.byte 0x00 0. "EW,Early Warning Interrupt Enable" "0,1"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "INTENSET,Interrupt Enable Set"
|
|
bitfld.byte 0x00 0. "EW,Early Warning Interrupt Enable" "0,1"
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "INTFLAG,Interrupt Flag Status and Clear"
|
|
bitfld.byte 0x00 0. "EW,Early Warning" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy"
|
|
bitfld.long 0x00 5. "CLEAR,Clear Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 4. "ALWAYSON,Always-On Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 3. "RUNSTDBY,Run During Standby Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 2. "WEN,Window Enable Synchronization Busy" "0,1"
|
|
bitfld.long 0x00 1. "ENABLE,Enable Synchronization Busy" "0,1"
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "CLEAR,Clear"
|
|
hexmask.byte 0x00 0.--7. 1. "CLEAR,Watchdog Clear"
|
|
tree.end
|
|
autoindent.off
|
|
newline
|