720 lines
54 KiB
Plaintext
720 lines
54 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: OMAP4460 On-Chip Peripherals
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; @Props: Released
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; @Author: KAM, LEM, SLA, PIW
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; @Changelog:
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; 2011-08-31
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; 2011-11-14
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; 2012-04-18
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; 2022-05-12 PIW
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; @Manufacturer: TI - Texas Instruments
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; @Doc: XML generated (TIXML2PER 2.1.1), based on: OMAP4460.xml (Rev. 1.1)
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; @Core: ARM968E
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; @Chip: OMAP4460
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: peromap4460iva.per 14797 2022-05-18 06:30:25Z kwisniewski $
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;
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; WARNING: EXPORT NOTICE
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;
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; Recipient agrees to not knowingly export or re-export, directly or
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; indirectly, any product or technical data (as defined by the U.S., EU, and
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; other Export Administration Regulations) including software, or any
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; controlled product restricted by other applicable national regulations,
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; received from Disclosing party under this Agreement, or any direct
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; product of such technology, to any destination to which such export or
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; re-export is restricted or prohibited by U.S. or other applicable laws,
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; without obtaining prior authorisation from U.S. Department of Commerce
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; and other competent Government authorities to the extent required by
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; those laws. This provision shall survive termination or expiration of this
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; Agreement.
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;
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; According to our best knowledge of the state and end-use of this
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; product or technology, and in compliance with the export control
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; regulations of dual-use goods in force in the origin and exporting
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; countries, this technology is classified as follows:
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;
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; US ECCN: 3E991
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; EU ECCN: EAR99
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;
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; And may require export or re-export license for shipping it in compliance
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; with the applicable regulations of certain countries.
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;
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;
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tree "Core Registers"
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width 8.
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tree "ID Registers"
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rgroup c15:0x0000--0x0000
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line.long 0x0 "MIDR,Identity Code"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
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hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
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hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
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hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
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hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
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tree.end
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tree "System Configuration and Control"
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width 8.
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group c15:0x1--0x1
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable"
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bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
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textline " "
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bitfld.long 0x0 12. " I ,Instruction SRAM Enable" "Disable,Enable"
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bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
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bitfld.long 0x0 3. " W ,Write Buffer" "Disable,Enable"
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bitfld.long 0x0 2. " D ,Data SRAM Enable" "Disable,Enable"
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tree.end
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tree "ICEbreaker"
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width 8.
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group ice:0x0--0x5 "Debug Control"
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line.long 0x0 "DBGCTRL,Debug Control Register"
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bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
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bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
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textline " "
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bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
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bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
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bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x4 "DBGSTAT,Debug Status Register"
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bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,1"
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bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
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bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
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bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x8 "VECTOR,Vector Catch Register"
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bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
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bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
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bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
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bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
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bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
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bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
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bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
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line.long 0x10 "COMCTRL,Debug Communication Control Register"
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bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
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bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
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line.long 0x14 "COMDATA,Debug Communication Data Register"
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group ice:0x8--0x0d "Watchpoint 0"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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group ice:0x10--0x15 "Watchpoint 1"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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tree.end
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tree.end
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AUTOINDENT.ON center tree
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tree "IVA_HD_Overview"
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tree "SYSCTRL_iCONT"
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base ad:0xDA400
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rgroup.long 0x00++0x07
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line.long 0x00 "IVAHD_REVISION,IP revision identifier (X.Y.R)"
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line.long 0x04 "IVAHD_HWINFO,Information about the IP module's hardware configuration"
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bitfld.long 0x04 14. "ECD3,ECD3 available" "ECD3 not present,ECD3 present"
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newline
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bitfld.long 0x04 13. "MC3,MC3 available" "MC3 not present,MC3 present"
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newline
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bitfld.long 0x04 12. "IPE3,iPE3 available" "iPE3 not present,iPE3 present"
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newline
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bitfld.long 0x04 11. "CALC3,CALC3 available" "CALC3 not present,CALC3 present"
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newline
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bitfld.long 0x04 10. "IME3,iME3 available" "iME3 not present,iME3 present"
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newline
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bitfld.long 0x04 9. "ILF3,iLF3 available" "iLF3 not present,iLF3 present"
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newline
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bitfld.long 0x04 8. "VDMA,vDMA available" "vDMA not present,vDMA present"
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newline
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bitfld.long 0x04 7. "ICONT2,iCONT2 available" "iCONT2 not present,iCONT2 present"
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newline
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bitfld.long 0x04 6. "ICONT1,iCONT1 available" "iCONT1 not present,iCONT1 present"
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newline
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bitfld.long 0x04 4.--5. "SL2BANK," "SL2BANK_0_r,SL2BANK_1_r,SL2BANK_2_r,SL2BANK_3_r"
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newline
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bitfld.long 0x04 0.--3. "SL2SIZE,Size of SL2 memory" "?,SL2SIZE_1_r,SL2SIZE_2_r,SL2SIZE_3_r,SL2SIZE_4_r,SL2SIZE_5_r,SL2SIZE_6_r,SL2SIZE_7_r,SL2SIZE_8_r,SL2SIZE_9_r,SL2SIZE_10_r,SL2SIZE_11_r,SL2SIZE_12_r,SL2SIZE_13_r,SL2SIZE_14_r,?"
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group.long 0x10++0x03
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line.long 0x00 "IVAHD_SYSCONFIG,Clock management configuration"
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bitfld.long 0x00 4.--5. "STANDBYMODE,Configuration of the local initiator state management mode" "?,STANDBYMODE_1,STANDBYMODE_2,?"
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newline
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bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "?,IDLEMODE_1,IDLEMODE_2,?"
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group.long 0x24++0x1F
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line.long 0x00 "IVAHD_IRQSTATUS_RAW,Per-event raw interrupt status vector"
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bitfld.long 0x00 0. "SYSCTRL_CLKERR,Settable raw status for Clock Programming Error event" "SYSCTRL_CLKERR_0_r,SYSCTRL_CLKERR_1_w"
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line.long 0x04 "IVAHD_IRQSTATUS,Per-event 'enabled' interrupt status vector. line 0"
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bitfld.long 0x04 0. "SYSCTRL_CLKERR,Clearable enabled status for Clock Programming Error event" "SYSCTRL_CLKERR_0_r,SYSCTRL_CLKERR_1_w"
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line.long 0x08 "IVAHD_IRQENABLE_SET,Per-event interrupt enable bit vector"
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bitfld.long 0x08 0. "SYSCTRL_CLKERR,Clock Programing Error" "SYSCTRL_CLKERR_0_r,SYSCTRL_CLKERR_1_w"
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line.long 0x0C "IVAHD_IRQENABLE_CLR,Per-event interrupt enable bit vector"
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bitfld.long 0x0C 0. "SYSCTRL_CLKERR,Clock Programing Error" "SYSCTRL_CLKERR_0_r,SYSCTRL_CLKERR_1_w"
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line.long 0x10 "IVAHD_SYNC_IRQSTATUS_RAW,Per-event raw interrupt status vector"
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abitfld.long 0x10 0.--7. "SYNC_INPUT7_0,Settable raw status for SYNC INPUT event" "0x00=No action Write,0x01=Set event (debug)"
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line.long 0x14 "IVAHD_SYNC_IRQSTATUS,Per-event 'enabled' interrupt status vector. line 0"
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abitfld.long 0x14 0.--7. "SYNC_INPUT7_0,Clearable enabled status for SYNC INPUT event" "0x00=No action Write,0x01=Clear (raw) event"
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line.long 0x18 "IVAHD_SYNC_IRQENABLE_SET,Per-event interrupt enable bit vector"
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abitfld.long 0x18 0.--7. "SYNC_INPUT7_0,Enable for interrupt event" "0x00=No action Write,0x01=Enable interrupt"
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line.long 0x1C "IVAHD_SYNC_IRQENABLE_CLR,Per-event interrupt enable bit vector"
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abitfld.long 0x1C 0.--7. "SYNC_INPUT7_0,Enable for interrupt event" "0x00=No action Write,0x01=Disable interrupt"
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group.long 0x50++0x0B
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line.long 0x00 "IVAHD_CLKCTRL,IVA-HD clock control register"
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bitfld.long 0x00 10. "SMSET,Clock control of SMSET" "Exit idle state and start SMSET clock,Request SMSET to go to idle state and stop SMSET.."
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newline
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bitfld.long 0x00 9. "MSGIF,Clock control of MSGIF" "Exit idle state and start MSGIF clock,Request MSGIF to go to idle state and stop MSGIF.."
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newline
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bitfld.long 0x00 8. "ECD3,Clock control of ECD3" "Exit idle state and start ECD3 clock,Request ECD3 to go to idle state and stop ECD3.."
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newline
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bitfld.long 0x00 7. "MC3,Clock control of MC3" "Exit idle state and start MC3 clock,Request MC3 to go to idle state and stop MC3 clock"
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newline
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bitfld.long 0x00 6. "IPE3,Clock control of iPE3" "Exit idle state and start iPE3 clock,Request iME3 to go to idle state and stop iPE3.."
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newline
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bitfld.long 0x00 5. "CALC3,Clock control of CALC3" "Exit idle state and start CALC3 clock,Request CALC3 to go to idle state and stop CALC3.."
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newline
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bitfld.long 0x00 4. "ILF3,Clock control of iLF3" "Exit idle state and start iLF3 clock,Request iLF3 to go to idle state and stop iLF3.."
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newline
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bitfld.long 0x00 3. "IME3,Clock control of iME3" "Exit idle state and start iME3 clock,Request iME3 to go to idle state and stop iME3.."
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newline
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bitfld.long 0x00 2. "VDMA,Clock control of vDMA" "Exit idle state and start vDMA clock,Request vDMA to go to idle state and stop vDMA.."
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newline
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bitfld.long 0x00 1. "ICONT2,Clock control of iCONT2" "Exit idle state and start iCONT2 clock,Request iCONT2 to go to idle state and stop.."
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newline
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bitfld.long 0x00 0. "ICONT1,Clock control of iCONT1" "Exit idle state and start iCONT1 clock,Request iCONT1 to go to idle state and stop.."
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line.long 0x04 "IVAHD_CLKST,IVA-HD clock status register"
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bitfld.long 0x04 10. "SMSET,Clock status of SMSET" "SMSET clock is idled,SMSET clock is active"
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newline
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bitfld.long 0x04 9. "MSGIF,Clock status of MSGIF" "MSGIF clock is idled,MSGIF clock is active"
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newline
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bitfld.long 0x04 8. "ECD3,Clock status of ECD3" "ECD3 clock is idled,ECD3 clock is active"
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newline
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bitfld.long 0x04 7. "MC3,Clock status of MC3" "MC3 clock is idled,MC3 clock is active"
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newline
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bitfld.long 0x04 6. "IPE3,Clock status of iPE3" "iPE3 clock is idled,iPE3 clock is active"
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newline
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bitfld.long 0x04 5. "CALC3,Clock status of CALC3" "CALC3 clock is idled,CALC3 clock is active"
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newline
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bitfld.long 0x04 4. "ILF3,Clock status of iLF3" "iLF3 clock is idled,iLF3 clock is active"
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newline
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bitfld.long 0x04 3. "IME3,Clock status of iME3" "iME3 clock is idled,iME3 clock is active"
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newline
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bitfld.long 0x04 2. "VDMA,Clock status of vDMA" "vDMA clock is idled,vDMA clock is active"
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newline
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bitfld.long 0x04 1. "ICONT2,Clock status of iCONT2" "iCONT2 clock is idled,iCONT2 clock is active"
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newline
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bitfld.long 0x04 0. "ICONT1,Clock status of iCONT1" "iCONT1 clock is idled,iCONT1 clock is active"
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line.long 0x08 "IVAHD_STDBYST,IVA-HD STANDBY status"
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bitfld.long 0x08 2. "vDMA,vDMA Standby status" "module is not in Standby,module is in Standby"
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newline
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bitfld.long 0x08 1. "ICONT2,iCONT2 Standby status" "module is not in Standby,module is in Standby"
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newline
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bitfld.long 0x08 0. "ICONT1,iCONT1 Standby status" "module is not in Standby,module is in Standby"
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tree.end
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tree.end
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tree "Mailbox"
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tree "IVAHD_Mailbox_ICONT"
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base ad:0x8DA800
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tree "Channel_0"
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rgroup.long 0x80++0x03
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line.long 0x00 "MAILBOX_FIFOSTATUS_m_0,The FIFO status register has the status related to the mailbox internal FIFO"
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bitfld.long 0x00 0. "FIFOFULLMBM,Full flag for Mailbox" "FIFOFULLMBM_0_r,FIFOFULLMBM_1_r"
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group.long 0x10C++0x03
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line.long 0x00 "MAILBOX_IRQENABLE_CLR_u_0,The interrupt enable register enables to mask the module internal source of interrupt to the corresponding user"
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bitfld.long 0x00 15. "NOTFULLENABLEUUMB7,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB7_0_w,NOTFULLENABLEUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGENABLEUUMB7,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB7_0_w,NEWMSGENABLEUUMB7_1_w"
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newline
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bitfld.long 0x00 13. "NOTFULLENABLEUUMB6,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB6_0_w,NOTFULLENABLEUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGENABLEUUMB6,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB6_0_w,NEWMSGENABLEUUMB6_1_w"
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newline
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bitfld.long 0x00 11. "NOTFULLENABLEUUMB5,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB5_0_w,NOTFULLENABLEUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGENABLEUUMB5,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB5_0_w,NEWMSGENABLEUUMB5_1_w"
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newline
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bitfld.long 0x00 9. "NOTFULLENABLEUUMB4,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB4_0_w,NOTFULLENABLEUUMB4_1_w"
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bitfld.long 0x00 8. "NEWMSGENABLEUUMB4,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB4_0_w,NEWMSGENABLEUUMB4_1_w"
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newline
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bitfld.long 0x00 7. "NOTFULLENABLEUUMB3,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB3_0_w,NOTFULLENABLEUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGENABLEUUMB3,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB3_0_w,NEWMSGENABLEUUMB3_1_w"
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newline
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bitfld.long 0x00 5. "NOTFULLENABLEUUMB2,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB2_0_w,NOTFULLENABLEUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGENABLEUUMB2,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB2_0_w,NEWMSGENABLEUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLENABLEUUMB1,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB1_0_w,NOTFULLENABLEUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGENABLEUUMB1,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB1_0_w,NEWMSGENABLEUUMB1_1_w"
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newline
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bitfld.long 0x00 1. "NOTFULLENABLEUUMB0,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB0_0_w,NOTFULLENABLEUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGENABLEUUMB0,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB0_0_w,NEWMSGENABLEUUMB0_1_w"
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group.long 0x108++0x03
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line.long 0x00 "MAILBOX_IRQENABLE_SET_u_0,The interrupt enable register enables to unmask the module internal source of interrupt to the corresponding user"
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bitfld.long 0x00 15. "NOTFULLENABLEUUMB7,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB7_0_w,NOTFULLENABLEUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGENABLEUUMB7,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB7_0_w,NEWMSGENABLEUUMB7_1_w"
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newline
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bitfld.long 0x00 13. "NOTFULLENABLEUUMB6,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB6_0_w,NOTFULLENABLEUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGENABLEUUMB6,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB6_0_w,NEWMSGENABLEUUMB6_1_w"
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newline
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bitfld.long 0x00 11. "NOTFULLENABLEUUMB5,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB5_0_w,NOTFULLENABLEUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGENABLEUUMB5,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB5_0_w,NEWMSGENABLEUUMB5_1_w"
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newline
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bitfld.long 0x00 9. "NOTFULLENABLEUUMB4,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB4_0_w,NOTFULLENABLEUUMB4_1_w"
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bitfld.long 0x00 8. "NEWMSGENABLEUUMB4,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB4_0_w,NEWMSGENABLEUUMB4_1_w"
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newline
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bitfld.long 0x00 7. "NOTFULLENABLEUUMB3,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB3_0_w,NOTFULLENABLEUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGENABLEUUMB3,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB3_0_w,NEWMSGENABLEUUMB3_1_w"
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newline
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bitfld.long 0x00 5. "NOTFULLENABLEUUMB2,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB2_0_w,NOTFULLENABLEUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGENABLEUUMB2,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB2_0_w,NEWMSGENABLEUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLENABLEUUMB1,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB1_0_w,NOTFULLENABLEUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGENABLEUUMB1,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB1_0_w,NEWMSGENABLEUUMB1_1_w"
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newline
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bitfld.long 0x00 1. "NOTFULLENABLEUUMB0,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB0_0_w,NOTFULLENABLEUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGENABLEUUMB0,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB0_0_w,NEWMSGENABLEUUMB0_1_w"
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group.long 0x104++0x03
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line.long 0x00 "MAILBOX_IRQSTATUS_CLR_u_0,The interrupt status register has the status combined with irq-enable for each event that may be responsible for the generation of an interrupt to the corresponding user - write 1 to a given bit resets this bit"
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bitfld.long 0x00 15. "NOTFULLSTATUSENUUMB7,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB7_0_w,NOTFULLSTATUSENUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGSTATUSENUUMB7,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB7_0_w,NEWMSGSTATUSENUUMB7_1_w"
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newline
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bitfld.long 0x00 13. "NOTFULLSTATUSENUUMB6,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB6_0_w,NOTFULLSTATUSENUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGSTATUSENUUMB6,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB6_0_w,NEWMSGSTATUSENUUMB6_1_w"
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newline
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bitfld.long 0x00 11. "NOTFULLSTATUSENUUMB5,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB5_0_w,NOTFULLSTATUSENUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGSTATUSENUUMB5,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB5_0_w,NEWMSGSTATUSENUUMB5_1_w"
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newline
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bitfld.long 0x00 9. "NOTFULLSTATUSENUUMB4,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB4_0_w,NOTFULLSTATUSENUUMB4_1_w"
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bitfld.long 0x00 8. "NEWMSGSTATUSENUUMB4,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB4_0_w,NEWMSGSTATUSENUUMB4_1_w"
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newline
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bitfld.long 0x00 7. "NOTFULLSTATUSENUUMB3,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB3_0_w,NOTFULLSTATUSENUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGSTATUSENUUMB3,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB3_0_w,NEWMSGSTATUSENUUMB3_1_w"
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newline
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bitfld.long 0x00 5. "NOTFULLSTATUSENUUMB2,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB2_0_w,NOTFULLSTATUSENUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGSTATUSENUUMB2,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB2_0_w,NEWMSGSTATUSENUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLSTATUSENUUMB1,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB1_0_w,NOTFULLSTATUSENUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGSTATUSENUUMB1,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB1_0_w,NEWMSGSTATUSENUUMB1_1_w"
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newline
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bitfld.long 0x00 1. "NOTFULLSTATUSENUUMB0,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB0_0_w,NOTFULLSTATUSENUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGSTATUSENUUMB0,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB0_0_w,NEWMSGSTATUSENUUMB0_1_w"
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group.long 0x100++0x03
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line.long 0x00 "MAILBOX_IRQSTATUS_RAW_u_0,The interrupt status register has the raw status for each event that may be responsible for the generation of an interrupt to the corresponding user - write 1 to a given bit sets this bit"
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bitfld.long 0x00 15. "NOTFULLSTATUSENUUMB7,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB7_0_w,NOTFULLSTATUSENUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGSTATUSUUMB7,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB7_0_w,NEWMSGSTATUSUUMB7_1_w"
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newline
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bitfld.long 0x00 13. "NOTFULLSTATUSUUMB6,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB6_0_w,NOTFULLSTATUSUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGSTATUSUUMB6,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB6_0_w,NEWMSGSTATUSUUMB6_1_w"
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|
newline
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bitfld.long 0x00 11. "NOTFULLSTATUSUUMB5,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB5_0_w,NOTFULLSTATUSUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGSTATUSUUMB5,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB5_0_w,NEWMSGSTATUSUUMB5_1_w"
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newline
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bitfld.long 0x00 9. "NOTFULLSTATUSUUMB4,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB4_0_w,NOTFULLSTATUSUUMB4_1_w"
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bitfld.long 0x00 8. "NEWMSGSTATUSUUMB4,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB4_0_w,NEWMSGSTATUSUUMB4_1_w"
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newline
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bitfld.long 0x00 7. "NOTFULLSTATUSUUMB3,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB3_0_w,NOTFULLSTATUSUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGSTATUSUUMB3,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB3_0_w,NEWMSGSTATUSUUMB3_1_w"
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newline
|
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bitfld.long 0x00 5. "NOTFULLSTATUSUUMB2,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB2_0_w,NOTFULLSTATUSUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGSTATUSUUMB2,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB2_0_w,NEWMSGSTATUSUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLSTATUSUUMB1,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB1_0_w,NOTFULLSTATUSUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGSTATUSUUMB1,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB1_0_w,NEWMSGSTATUSUUMB1_1_w"
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newline
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bitfld.long 0x00 1. "NOTFULLSTATUSUUMB0,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB0_0_w,NOTFULLSTATUSUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGSTATUSUUMB0,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB0_0_w,NEWMSGSTATUSUUMB0_1_w"
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group.long 0x40++0x03
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line.long 0x00 "MAILBOX_MESSAGE_m_0,The message register stores the next to be read message of the mailbox"
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rgroup.long 0xC0++0x03
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line.long 0x00 "MAILBOX_MSGSTATUS_m_0,The message status register has the status of the messages in the mailbox"
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bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in MailboxNote: Limited to four messages per mailbox" "0,1,2,3,4,5,6,7"
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tree.end
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tree "Channel_1"
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rgroup.long 0x84++0x03
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line.long 0x00 "MAILBOX_FIFOSTATUS_m_1,The FIFO status register has the status related to the mailbox internal FIFO"
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bitfld.long 0x00 0. "FIFOFULLMBM,Full flag for Mailbox" "FIFOFULLMBM_0_r,FIFOFULLMBM_1_r"
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group.long 0x11C++0x03
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line.long 0x00 "MAILBOX_IRQENABLE_CLR_u_1,The interrupt enable register enables to mask the module internal source of interrupt to the corresponding user"
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bitfld.long 0x00 15. "NOTFULLENABLEUUMB7,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB7_0_w,NOTFULLENABLEUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGENABLEUUMB7,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB7_0_w,NEWMSGENABLEUUMB7_1_w"
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newline
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bitfld.long 0x00 13. "NOTFULLENABLEUUMB6,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB6_0_w,NOTFULLENABLEUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGENABLEUUMB6,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB6_0_w,NEWMSGENABLEUUMB6_1_w"
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newline
|
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bitfld.long 0x00 11. "NOTFULLENABLEUUMB5,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB5_0_w,NOTFULLENABLEUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGENABLEUUMB5,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB5_0_w,NEWMSGENABLEUUMB5_1_w"
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newline
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bitfld.long 0x00 9. "NOTFULLENABLEUUMB4,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB4_0_w,NOTFULLENABLEUUMB4_1_w"
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bitfld.long 0x00 8. "NEWMSGENABLEUUMB4,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB4_0_w,NEWMSGENABLEUUMB4_1_w"
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newline
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bitfld.long 0x00 7. "NOTFULLENABLEUUMB3,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB3_0_w,NOTFULLENABLEUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGENABLEUUMB3,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB3_0_w,NEWMSGENABLEUUMB3_1_w"
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newline
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bitfld.long 0x00 5. "NOTFULLENABLEUUMB2,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB2_0_w,NOTFULLENABLEUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGENABLEUUMB2,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB2_0_w,NEWMSGENABLEUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLENABLEUUMB1,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB1_0_w,NOTFULLENABLEUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGENABLEUUMB1,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB1_0_w,NEWMSGENABLEUUMB1_1_w"
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newline
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bitfld.long 0x00 1. "NOTFULLENABLEUUMB0,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB0_0_w,NOTFULLENABLEUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGENABLEUUMB0,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB0_0_w,NEWMSGENABLEUUMB0_1_w"
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group.long 0x118++0x03
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line.long 0x00 "MAILBOX_IRQENABLE_SET_u_1,The interrupt enable register enables to unmask the module internal source of interrupt to the corresponding user"
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bitfld.long 0x00 15. "NOTFULLENABLEUUMB7,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB7_0_w,NOTFULLENABLEUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGENABLEUUMB7,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB7_0_w,NEWMSGENABLEUUMB7_1_w"
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newline
|
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bitfld.long 0x00 13. "NOTFULLENABLEUUMB6,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB6_0_w,NOTFULLENABLEUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGENABLEUUMB6,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB6_0_w,NEWMSGENABLEUUMB6_1_w"
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newline
|
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bitfld.long 0x00 11. "NOTFULLENABLEUUMB5,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB5_0_w,NOTFULLENABLEUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGENABLEUUMB5,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB5_0_w,NEWMSGENABLEUUMB5_1_w"
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|
newline
|
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bitfld.long 0x00 9. "NOTFULLENABLEUUMB4,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB4_0_w,NOTFULLENABLEUUMB4_1_w"
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bitfld.long 0x00 8. "NEWMSGENABLEUUMB4,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB4_0_w,NEWMSGENABLEUUMB4_1_w"
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|
newline
|
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bitfld.long 0x00 7. "NOTFULLENABLEUUMB3,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB3_0_w,NOTFULLENABLEUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGENABLEUUMB3,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB3_0_w,NEWMSGENABLEUUMB3_1_w"
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newline
|
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bitfld.long 0x00 5. "NOTFULLENABLEUUMB2,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB2_0_w,NOTFULLENABLEUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGENABLEUUMB2,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB2_0_w,NEWMSGENABLEUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLENABLEUUMB1,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB1_0_w,NOTFULLENABLEUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGENABLEUUMB1,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB1_0_w,NEWMSGENABLEUUMB1_1_w"
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newline
|
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bitfld.long 0x00 1. "NOTFULLENABLEUUMB0,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB0_0_w,NOTFULLENABLEUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGENABLEUUMB0,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB0_0_w,NEWMSGENABLEUUMB0_1_w"
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group.long 0x114++0x03
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line.long 0x00 "MAILBOX_IRQSTATUS_CLR_u_1,The interrupt status register has the status combined with irq-enable for each event that may be responsible for the generation of an interrupt to the corresponding user - write 1 to a given bit resets this bit"
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|
bitfld.long 0x00 15. "NOTFULLSTATUSENUUMB7,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB7_0_w,NOTFULLSTATUSENUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGSTATUSENUUMB7,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB7_0_w,NEWMSGSTATUSENUUMB7_1_w"
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newline
|
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bitfld.long 0x00 13. "NOTFULLSTATUSENUUMB6,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB6_0_w,NOTFULLSTATUSENUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGSTATUSENUUMB6,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB6_0_w,NEWMSGSTATUSENUUMB6_1_w"
|
|
newline
|
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bitfld.long 0x00 11. "NOTFULLSTATUSENUUMB5,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB5_0_w,NOTFULLSTATUSENUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGSTATUSENUUMB5,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB5_0_w,NEWMSGSTATUSENUUMB5_1_w"
|
|
newline
|
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bitfld.long 0x00 9. "NOTFULLSTATUSENUUMB4,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB4_0_w,NOTFULLSTATUSENUUMB4_1_w"
|
|
bitfld.long 0x00 8. "NEWMSGSTATUSENUUMB4,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB4_0_w,NEWMSGSTATUSENUUMB4_1_w"
|
|
newline
|
|
bitfld.long 0x00 7. "NOTFULLSTATUSENUUMB3,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB3_0_w,NOTFULLSTATUSENUUMB3_1_w"
|
|
bitfld.long 0x00 6. "NEWMSGSTATUSENUUMB3,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB3_0_w,NEWMSGSTATUSENUUMB3_1_w"
|
|
newline
|
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bitfld.long 0x00 5. "NOTFULLSTATUSENUUMB2,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB2_0_w,NOTFULLSTATUSENUUMB2_1_w"
|
|
bitfld.long 0x00 4. "NEWMSGSTATUSENUUMB2,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB2_0_w,NEWMSGSTATUSENUUMB2_1_w"
|
|
newline
|
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bitfld.long 0x00 3. "NOTFULLSTATUSENUUMB1,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB1_0_w,NOTFULLSTATUSENUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGSTATUSENUUMB1,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB1_0_w,NEWMSGSTATUSENUUMB1_1_w"
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newline
|
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bitfld.long 0x00 1. "NOTFULLSTATUSENUUMB0,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB0_0_w,NOTFULLSTATUSENUUMB0_1_w"
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|
bitfld.long 0x00 0. "NEWMSGSTATUSENUUMB0,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB0_0_w,NEWMSGSTATUSENUUMB0_1_w"
|
|
group.long 0x110++0x03
|
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line.long 0x00 "MAILBOX_IRQSTATUS_RAW_u_1,The interrupt status register has the raw status for each event that may be responsible for the generation of an interrupt to the corresponding user - write 1 to a given bit sets this bit"
|
|
bitfld.long 0x00 15. "NOTFULLSTATUSENUUMB7,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB7_0_w,NOTFULLSTATUSENUUMB7_1_w"
|
|
bitfld.long 0x00 14. "NEWMSGSTATUSUUMB7,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB7_0_w,NEWMSGSTATUSUUMB7_1_w"
|
|
newline
|
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bitfld.long 0x00 13. "NOTFULLSTATUSUUMB6,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB6_0_w,NOTFULLSTATUSUUMB6_1_w"
|
|
bitfld.long 0x00 12. "NEWMSGSTATUSUUMB6,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB6_0_w,NEWMSGSTATUSUUMB6_1_w"
|
|
newline
|
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bitfld.long 0x00 11. "NOTFULLSTATUSUUMB5,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB5_0_w,NOTFULLSTATUSUUMB5_1_w"
|
|
bitfld.long 0x00 10. "NEWMSGSTATUSUUMB5,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB5_0_w,NEWMSGSTATUSUUMB5_1_w"
|
|
newline
|
|
bitfld.long 0x00 9. "NOTFULLSTATUSUUMB4,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB4_0_w,NOTFULLSTATUSUUMB4_1_w"
|
|
bitfld.long 0x00 8. "NEWMSGSTATUSUUMB4,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB4_0_w,NEWMSGSTATUSUUMB4_1_w"
|
|
newline
|
|
bitfld.long 0x00 7. "NOTFULLSTATUSUUMB3,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB3_0_w,NOTFULLSTATUSUUMB3_1_w"
|
|
bitfld.long 0x00 6. "NEWMSGSTATUSUUMB3,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB3_0_w,NEWMSGSTATUSUUMB3_1_w"
|
|
newline
|
|
bitfld.long 0x00 5. "NOTFULLSTATUSUUMB2,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB2_0_w,NOTFULLSTATUSUUMB2_1_w"
|
|
bitfld.long 0x00 4. "NEWMSGSTATUSUUMB2,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB2_0_w,NEWMSGSTATUSUUMB2_1_w"
|
|
newline
|
|
bitfld.long 0x00 3. "NOTFULLSTATUSUUMB1,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB1_0_w,NOTFULLSTATUSUUMB1_1_w"
|
|
bitfld.long 0x00 2. "NEWMSGSTATUSUUMB1,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB1_0_w,NEWMSGSTATUSUUMB1_1_w"
|
|
newline
|
|
bitfld.long 0x00 1. "NOTFULLSTATUSUUMB0,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB0_0_w,NOTFULLSTATUSUUMB0_1_w"
|
|
bitfld.long 0x00 0. "NEWMSGSTATUSUUMB0,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB0_0_w,NEWMSGSTATUSUUMB0_1_w"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "MAILBOX_MESSAGE_m_1,The message register stores the next to be read message of the mailbox"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "MAILBOX_MSGSTATUS_m_1,The message status register has the status of the messages in the mailbox"
|
|
bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in MailboxNote: Limited to four messages per mailbox" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Channel_2"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "MAILBOX_FIFOSTATUS_m_2,The FIFO status register has the status related to the mailbox internal FIFO"
|
|
bitfld.long 0x00 0. "FIFOFULLMBM,Full flag for Mailbox" "FIFOFULLMBM_0_r,FIFOFULLMBM_1_r"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "MAILBOX_IRQENABLE_CLR_u_2,The interrupt enable register enables to mask the module internal source of interrupt to the corresponding user"
|
|
bitfld.long 0x00 15. "NOTFULLENABLEUUMB7,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB7_0_w,NOTFULLENABLEUUMB7_1_w"
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|
bitfld.long 0x00 14. "NEWMSGENABLEUUMB7,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB7_0_w,NEWMSGENABLEUUMB7_1_w"
|
|
newline
|
|
bitfld.long 0x00 13. "NOTFULLENABLEUUMB6,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB6_0_w,NOTFULLENABLEUUMB6_1_w"
|
|
bitfld.long 0x00 12. "NEWMSGENABLEUUMB6,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB6_0_w,NEWMSGENABLEUUMB6_1_w"
|
|
newline
|
|
bitfld.long 0x00 11. "NOTFULLENABLEUUMB5,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB5_0_w,NOTFULLENABLEUUMB5_1_w"
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|
bitfld.long 0x00 10. "NEWMSGENABLEUUMB5,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB5_0_w,NEWMSGENABLEUUMB5_1_w"
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|
newline
|
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bitfld.long 0x00 9. "NOTFULLENABLEUUMB4,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB4_0_w,NOTFULLENABLEUUMB4_1_w"
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|
bitfld.long 0x00 8. "NEWMSGENABLEUUMB4,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB4_0_w,NEWMSGENABLEUUMB4_1_w"
|
|
newline
|
|
bitfld.long 0x00 7. "NOTFULLENABLEUUMB3,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB3_0_w,NOTFULLENABLEUUMB3_1_w"
|
|
bitfld.long 0x00 6. "NEWMSGENABLEUUMB3,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB3_0_w,NEWMSGENABLEUUMB3_1_w"
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|
newline
|
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bitfld.long 0x00 5. "NOTFULLENABLEUUMB2,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB2_0_w,NOTFULLENABLEUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGENABLEUUMB2,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB2_0_w,NEWMSGENABLEUUMB2_1_w"
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|
newline
|
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bitfld.long 0x00 3. "NOTFULLENABLEUUMB1,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB1_0_w,NOTFULLENABLEUUMB1_1_w"
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|
bitfld.long 0x00 2. "NEWMSGENABLEUUMB1,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB1_0_w,NEWMSGENABLEUUMB1_1_w"
|
|
newline
|
|
bitfld.long 0x00 1. "NOTFULLENABLEUUMB0,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB0_0_w,NOTFULLENABLEUUMB0_1_w"
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|
bitfld.long 0x00 0. "NEWMSGENABLEUUMB0,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB0_0_w,NEWMSGENABLEUUMB0_1_w"
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|
group.long 0x128++0x03
|
|
line.long 0x00 "MAILBOX_IRQENABLE_SET_u_2,The interrupt enable register enables to unmask the module internal source of interrupt to the corresponding user"
|
|
bitfld.long 0x00 15. "NOTFULLENABLEUUMB7,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB7_0_w,NOTFULLENABLEUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGENABLEUUMB7,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB7_0_w,NEWMSGENABLEUUMB7_1_w"
|
|
newline
|
|
bitfld.long 0x00 13. "NOTFULLENABLEUUMB6,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB6_0_w,NOTFULLENABLEUUMB6_1_w"
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|
bitfld.long 0x00 12. "NEWMSGENABLEUUMB6,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB6_0_w,NEWMSGENABLEUUMB6_1_w"
|
|
newline
|
|
bitfld.long 0x00 11. "NOTFULLENABLEUUMB5,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB5_0_w,NOTFULLENABLEUUMB5_1_w"
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|
bitfld.long 0x00 10. "NEWMSGENABLEUUMB5,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB5_0_w,NEWMSGENABLEUUMB5_1_w"
|
|
newline
|
|
bitfld.long 0x00 9. "NOTFULLENABLEUUMB4,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB4_0_w,NOTFULLENABLEUUMB4_1_w"
|
|
bitfld.long 0x00 8. "NEWMSGENABLEUUMB4,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB4_0_w,NEWMSGENABLEUUMB4_1_w"
|
|
newline
|
|
bitfld.long 0x00 7. "NOTFULLENABLEUUMB3,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB3_0_w,NOTFULLENABLEUUMB3_1_w"
|
|
bitfld.long 0x00 6. "NEWMSGENABLEUUMB3,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB3_0_w,NEWMSGENABLEUUMB3_1_w"
|
|
newline
|
|
bitfld.long 0x00 5. "NOTFULLENABLEUUMB2,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB2_0_w,NOTFULLENABLEUUMB2_1_w"
|
|
bitfld.long 0x00 4. "NEWMSGENABLEUUMB2,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB2_0_w,NEWMSGENABLEUUMB2_1_w"
|
|
newline
|
|
bitfld.long 0x00 3. "NOTFULLENABLEUUMB1,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB1_0_w,NOTFULLENABLEUUMB1_1_w"
|
|
bitfld.long 0x00 2. "NEWMSGENABLEUUMB1,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB1_0_w,NEWMSGENABLEUUMB1_1_w"
|
|
newline
|
|
bitfld.long 0x00 1. "NOTFULLENABLEUUMB0,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB0_0_w,NOTFULLENABLEUUMB0_1_w"
|
|
bitfld.long 0x00 0. "NEWMSGENABLEUUMB0,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB0_0_w,NEWMSGENABLEUUMB0_1_w"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "MAILBOX_IRQSTATUS_CLR_u_2,The interrupt status register has the status combined with irq-enable for each event that may be responsible for the generation of an interrupt to the corresponding user - write 1 to a given bit resets this bit"
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|
bitfld.long 0x00 15. "NOTFULLSTATUSENUUMB7,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB7_0_w,NOTFULLSTATUSENUUMB7_1_w"
|
|
bitfld.long 0x00 14. "NEWMSGSTATUSENUUMB7,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB7_0_w,NEWMSGSTATUSENUUMB7_1_w"
|
|
newline
|
|
bitfld.long 0x00 13. "NOTFULLSTATUSENUUMB6,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB6_0_w,NOTFULLSTATUSENUUMB6_1_w"
|
|
bitfld.long 0x00 12. "NEWMSGSTATUSENUUMB6,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB6_0_w,NEWMSGSTATUSENUUMB6_1_w"
|
|
newline
|
|
bitfld.long 0x00 11. "NOTFULLSTATUSENUUMB5,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB5_0_w,NOTFULLSTATUSENUUMB5_1_w"
|
|
bitfld.long 0x00 10. "NEWMSGSTATUSENUUMB5,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB5_0_w,NEWMSGSTATUSENUUMB5_1_w"
|
|
newline
|
|
bitfld.long 0x00 9. "NOTFULLSTATUSENUUMB4,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB4_0_w,NOTFULLSTATUSENUUMB4_1_w"
|
|
bitfld.long 0x00 8. "NEWMSGSTATUSENUUMB4,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB4_0_w,NEWMSGSTATUSENUUMB4_1_w"
|
|
newline
|
|
bitfld.long 0x00 7. "NOTFULLSTATUSENUUMB3,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB3_0_w,NOTFULLSTATUSENUUMB3_1_w"
|
|
bitfld.long 0x00 6. "NEWMSGSTATUSENUUMB3,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB3_0_w,NEWMSGSTATUSENUUMB3_1_w"
|
|
newline
|
|
bitfld.long 0x00 5. "NOTFULLSTATUSENUUMB2,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB2_0_w,NOTFULLSTATUSENUUMB2_1_w"
|
|
bitfld.long 0x00 4. "NEWMSGSTATUSENUUMB2,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB2_0_w,NEWMSGSTATUSENUUMB2_1_w"
|
|
newline
|
|
bitfld.long 0x00 3. "NOTFULLSTATUSENUUMB1,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB1_0_w,NOTFULLSTATUSENUUMB1_1_w"
|
|
bitfld.long 0x00 2. "NEWMSGSTATUSENUUMB1,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB1_0_w,NEWMSGSTATUSENUUMB1_1_w"
|
|
newline
|
|
bitfld.long 0x00 1. "NOTFULLSTATUSENUUMB0,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB0_0_w,NOTFULLSTATUSENUUMB0_1_w"
|
|
bitfld.long 0x00 0. "NEWMSGSTATUSENUUMB0,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB0_0_w,NEWMSGSTATUSENUUMB0_1_w"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MAILBOX_IRQSTATUS_RAW_u_2,The interrupt status register has the raw status for each event that may be responsible for the generation of an interrupt to the corresponding user - write 1 to a given bit sets this bit"
|
|
bitfld.long 0x00 15. "NOTFULLSTATUSENUUMB7,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB7_0_w,NOTFULLSTATUSENUUMB7_1_w"
|
|
bitfld.long 0x00 14. "NEWMSGSTATUSUUMB7,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB7_0_w,NEWMSGSTATUSUUMB7_1_w"
|
|
newline
|
|
bitfld.long 0x00 13. "NOTFULLSTATUSUUMB6,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB6_0_w,NOTFULLSTATUSUUMB6_1_w"
|
|
bitfld.long 0x00 12. "NEWMSGSTATUSUUMB6,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB6_0_w,NEWMSGSTATUSUUMB6_1_w"
|
|
newline
|
|
bitfld.long 0x00 11. "NOTFULLSTATUSUUMB5,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB5_0_w,NOTFULLSTATUSUUMB5_1_w"
|
|
bitfld.long 0x00 10. "NEWMSGSTATUSUUMB5,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB5_0_w,NEWMSGSTATUSUUMB5_1_w"
|
|
newline
|
|
bitfld.long 0x00 9. "NOTFULLSTATUSUUMB4,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB4_0_w,NOTFULLSTATUSUUMB4_1_w"
|
|
bitfld.long 0x00 8. "NEWMSGSTATUSUUMB4,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB4_0_w,NEWMSGSTATUSUUMB4_1_w"
|
|
newline
|
|
bitfld.long 0x00 7. "NOTFULLSTATUSUUMB3,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB3_0_w,NOTFULLSTATUSUUMB3_1_w"
|
|
bitfld.long 0x00 6. "NEWMSGSTATUSUUMB3,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB3_0_w,NEWMSGSTATUSUUMB3_1_w"
|
|
newline
|
|
bitfld.long 0x00 5. "NOTFULLSTATUSUUMB2,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB2_0_w,NOTFULLSTATUSUUMB2_1_w"
|
|
bitfld.long 0x00 4. "NEWMSGSTATUSUUMB2,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB2_0_w,NEWMSGSTATUSUUMB2_1_w"
|
|
newline
|
|
bitfld.long 0x00 3. "NOTFULLSTATUSUUMB1,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB1_0_w,NOTFULLSTATUSUUMB1_1_w"
|
|
bitfld.long 0x00 2. "NEWMSGSTATUSUUMB1,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB1_0_w,NEWMSGSTATUSUUMB1_1_w"
|
|
newline
|
|
bitfld.long 0x00 1. "NOTFULLSTATUSUUMB0,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB0_0_w,NOTFULLSTATUSUUMB0_1_w"
|
|
bitfld.long 0x00 0. "NEWMSGSTATUSUUMB0,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB0_0_w,NEWMSGSTATUSUUMB0_1_w"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MAILBOX_MESSAGE_m_2,The message register stores the next to be read message of the mailbox"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "MAILBOX_MSGSTATUS_m_2,The message status register has the status of the messages in the mailbox"
|
|
bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in MailboxNote: Limited to four messages per mailbox" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Channel_3"
|
|
rgroup.long 0x8C++0x03
|
|
line.long 0x00 "MAILBOX_FIFOSTATUS_m_3,The FIFO status register has the status related to the mailbox internal FIFO"
|
|
bitfld.long 0x00 0. "FIFOFULLMBM,Full flag for Mailbox" "FIFOFULLMBM_0_r,FIFOFULLMBM_1_r"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "MAILBOX_IRQENABLE_CLR_u_3,The interrupt enable register enables to mask the module internal source of interrupt to the corresponding user"
|
|
bitfld.long 0x00 15. "NOTFULLENABLEUUMB7,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB7_0_w,NOTFULLENABLEUUMB7_1_w"
|
|
bitfld.long 0x00 14. "NEWMSGENABLEUUMB7,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB7_0_w,NEWMSGENABLEUUMB7_1_w"
|
|
newline
|
|
bitfld.long 0x00 13. "NOTFULLENABLEUUMB6,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB6_0_w,NOTFULLENABLEUUMB6_1_w"
|
|
bitfld.long 0x00 12. "NEWMSGENABLEUUMB6,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB6_0_w,NEWMSGENABLEUUMB6_1_w"
|
|
newline
|
|
bitfld.long 0x00 11. "NOTFULLENABLEUUMB5,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB5_0_w,NOTFULLENABLEUUMB5_1_w"
|
|
bitfld.long 0x00 10. "NEWMSGENABLEUUMB5,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB5_0_w,NEWMSGENABLEUUMB5_1_w"
|
|
newline
|
|
bitfld.long 0x00 9. "NOTFULLENABLEUUMB4,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB4_0_w,NOTFULLENABLEUUMB4_1_w"
|
|
bitfld.long 0x00 8. "NEWMSGENABLEUUMB4,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB4_0_w,NEWMSGENABLEUUMB4_1_w"
|
|
newline
|
|
bitfld.long 0x00 7. "NOTFULLENABLEUUMB3,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB3_0_w,NOTFULLENABLEUUMB3_1_w"
|
|
bitfld.long 0x00 6. "NEWMSGENABLEUUMB3,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB3_0_w,NEWMSGENABLEUUMB3_1_w"
|
|
newline
|
|
bitfld.long 0x00 5. "NOTFULLENABLEUUMB2,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB2_0_w,NOTFULLENABLEUUMB2_1_w"
|
|
bitfld.long 0x00 4. "NEWMSGENABLEUUMB2,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB2_0_w,NEWMSGENABLEUUMB2_1_w"
|
|
newline
|
|
bitfld.long 0x00 3. "NOTFULLENABLEUUMB1,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB1_0_w,NOTFULLENABLEUUMB1_1_w"
|
|
bitfld.long 0x00 2. "NEWMSGENABLEUUMB1,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB1_0_w,NEWMSGENABLEUUMB1_1_w"
|
|
newline
|
|
bitfld.long 0x00 1. "NOTFULLENABLEUUMB0,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB0_0_w,NOTFULLENABLEUUMB0_1_w"
|
|
bitfld.long 0x00 0. "NEWMSGENABLEUUMB0,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB0_0_w,NEWMSGENABLEUUMB0_1_w"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "MAILBOX_IRQENABLE_SET_u_3,The interrupt enable register enables to unmask the module internal source of interrupt to the corresponding user"
|
|
bitfld.long 0x00 15. "NOTFULLENABLEUUMB7,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB7_0_w,NOTFULLENABLEUUMB7_1_w"
|
|
bitfld.long 0x00 14. "NEWMSGENABLEUUMB7,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB7_0_w,NEWMSGENABLEUUMB7_1_w"
|
|
newline
|
|
bitfld.long 0x00 13. "NOTFULLENABLEUUMB6,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB6_0_w,NOTFULLENABLEUUMB6_1_w"
|
|
bitfld.long 0x00 12. "NEWMSGENABLEUUMB6,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB6_0_w,NEWMSGENABLEUUMB6_1_w"
|
|
newline
|
|
bitfld.long 0x00 11. "NOTFULLENABLEUUMB5,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB5_0_w,NOTFULLENABLEUUMB5_1_w"
|
|
bitfld.long 0x00 10. "NEWMSGENABLEUUMB5,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB5_0_w,NEWMSGENABLEUUMB5_1_w"
|
|
newline
|
|
bitfld.long 0x00 9. "NOTFULLENABLEUUMB4,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB4_0_w,NOTFULLENABLEUUMB4_1_w"
|
|
bitfld.long 0x00 8. "NEWMSGENABLEUUMB4,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB4_0_w,NEWMSGENABLEUUMB4_1_w"
|
|
newline
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bitfld.long 0x00 7. "NOTFULLENABLEUUMB3,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB3_0_w,NOTFULLENABLEUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGENABLEUUMB3,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB3_0_w,NEWMSGENABLEUUMB3_1_w"
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newline
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bitfld.long 0x00 5. "NOTFULLENABLEUUMB2,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB2_0_w,NOTFULLENABLEUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGENABLEUUMB2,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB2_0_w,NEWMSGENABLEUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLENABLEUUMB1,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB1_0_w,NOTFULLENABLEUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGENABLEUUMB1,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB1_0_w,NEWMSGENABLEUUMB1_1_w"
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newline
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bitfld.long 0x00 1. "NOTFULLENABLEUUMB0,NotFull Enable bit for User u Mailbox" "NOTFULLENABLEUUMB0_0_w,NOTFULLENABLEUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGENABLEUUMB0,NewMessage Enable bit for User u Mailbox" "NEWMSGENABLEUUMB0_0_w,NEWMSGENABLEUUMB0_1_w"
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group.long 0x134++0x03
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line.long 0x00 "MAILBOX_IRQSTATUS_CLR_u_3,The interrupt status register has the status combined with irq-enable for each event that may be responsible for the generation of an interrupt to the corresponding user - write 1 to a given bit resets this bit"
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bitfld.long 0x00 15. "NOTFULLSTATUSENUUMB7,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB7_0_w,NOTFULLSTATUSENUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGSTATUSENUUMB7,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB7_0_w,NEWMSGSTATUSENUUMB7_1_w"
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newline
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bitfld.long 0x00 13. "NOTFULLSTATUSENUUMB6,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB6_0_w,NOTFULLSTATUSENUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGSTATUSENUUMB6,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB6_0_w,NEWMSGSTATUSENUUMB6_1_w"
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newline
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bitfld.long 0x00 11. "NOTFULLSTATUSENUUMB5,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB5_0_w,NOTFULLSTATUSENUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGSTATUSENUUMB5,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB5_0_w,NEWMSGSTATUSENUUMB5_1_w"
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newline
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bitfld.long 0x00 9. "NOTFULLSTATUSENUUMB4,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB4_0_w,NOTFULLSTATUSENUUMB4_1_w"
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bitfld.long 0x00 8. "NEWMSGSTATUSENUUMB4,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB4_0_w,NEWMSGSTATUSENUUMB4_1_w"
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newline
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bitfld.long 0x00 7. "NOTFULLSTATUSENUUMB3,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB3_0_w,NOTFULLSTATUSENUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGSTATUSENUUMB3,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB3_0_w,NEWMSGSTATUSENUUMB3_1_w"
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newline
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bitfld.long 0x00 5. "NOTFULLSTATUSENUUMB2,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB2_0_w,NOTFULLSTATUSENUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGSTATUSENUUMB2,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB2_0_w,NEWMSGSTATUSENUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLSTATUSENUUMB1,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB1_0_w,NOTFULLSTATUSENUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGSTATUSENUUMB1,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB1_0_w,NEWMSGSTATUSENUUMB1_1_w"
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newline
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bitfld.long 0x00 1. "NOTFULLSTATUSENUUMB0,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB0_0_w,NOTFULLSTATUSENUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGSTATUSENUUMB0,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSENUUMB0_0_w,NEWMSGSTATUSENUUMB0_1_w"
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group.long 0x130++0x03
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line.long 0x00 "MAILBOX_IRQSTATUS_RAW_u_3,The interrupt status register has the raw status for each event that may be responsible for the generation of an interrupt to the corresponding user - write 1 to a given bit sets this bit"
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bitfld.long 0x00 15. "NOTFULLSTATUSENUUMB7,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSENUUMB7_0_w,NOTFULLSTATUSENUUMB7_1_w"
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bitfld.long 0x00 14. "NEWMSGSTATUSUUMB7,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB7_0_w,NEWMSGSTATUSUUMB7_1_w"
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newline
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bitfld.long 0x00 13. "NOTFULLSTATUSUUMB6,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB6_0_w,NOTFULLSTATUSUUMB6_1_w"
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bitfld.long 0x00 12. "NEWMSGSTATUSUUMB6,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB6_0_w,NEWMSGSTATUSUUMB6_1_w"
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newline
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bitfld.long 0x00 11. "NOTFULLSTATUSUUMB5,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB5_0_w,NOTFULLSTATUSUUMB5_1_w"
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bitfld.long 0x00 10. "NEWMSGSTATUSUUMB5,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB5_0_w,NEWMSGSTATUSUUMB5_1_w"
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newline
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bitfld.long 0x00 9. "NOTFULLSTATUSUUMB4,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB4_0_w,NOTFULLSTATUSUUMB4_1_w"
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bitfld.long 0x00 8. "NEWMSGSTATUSUUMB4,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB4_0_w,NEWMSGSTATUSUUMB4_1_w"
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newline
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bitfld.long 0x00 7. "NOTFULLSTATUSUUMB3,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB3_0_w,NOTFULLSTATUSUUMB3_1_w"
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bitfld.long 0x00 6. "NEWMSGSTATUSUUMB3,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB3_0_w,NEWMSGSTATUSUUMB3_1_w"
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newline
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bitfld.long 0x00 5. "NOTFULLSTATUSUUMB2,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB2_0_w,NOTFULLSTATUSUUMB2_1_w"
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bitfld.long 0x00 4. "NEWMSGSTATUSUUMB2,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB2_0_w,NEWMSGSTATUSUUMB2_1_w"
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newline
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bitfld.long 0x00 3. "NOTFULLSTATUSUUMB1,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB1_0_w,NOTFULLSTATUSUUMB1_1_w"
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bitfld.long 0x00 2. "NEWMSGSTATUSUUMB1,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB1_0_w,NEWMSGSTATUSUUMB1_1_w"
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newline
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bitfld.long 0x00 1. "NOTFULLSTATUSUUMB0,NotFull Status bit for User u Mailbox" "NOTFULLSTATUSUUMB0_0_w,NOTFULLSTATUSUUMB0_1_w"
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bitfld.long 0x00 0. "NEWMSGSTATUSUUMB0,NewMessage Status bit for User u Mailbox" "NEWMSGSTATUSUUMB0_0_w,NEWMSGSTATUSUUMB0_1_w"
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group.long 0x4C++0x03
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line.long 0x00 "MAILBOX_MESSAGE_m_3,The message register stores the next to be read message of the mailbox"
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rgroup.long 0xCC++0x03
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line.long 0x00 "MAILBOX_MSGSTATUS_m_3,The message status register has the status of the messages in the mailbox"
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bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in MailboxNote: Limited to four messages per mailbox" "0,1,2,3,4,5,6,7"
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tree.end
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tree "Channel_4"
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rgroup.long 0x90++0x03
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line.long 0x00 "MAILBOX_FIFOSTATUS_m_4,The FIFO status register has the status related to the mailbox internal FIFO"
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bitfld.long 0x00 0. "FIFOFULLMBM,Full flag for Mailbox" "FIFOFULLMBM_0_r,FIFOFULLMBM_1_r"
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group.long 0x50++0x03
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line.long 0x00 "MAILBOX_MESSAGE_m_4,The message register stores the next to be read message of the mailbox"
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rgroup.long 0xD0++0x03
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line.long 0x00 "MAILBOX_MSGSTATUS_m_4,The message status register has the status of the messages in the mailbox"
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bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in MailboxNote: Limited to four messages per mailbox" "0,1,2,3,4,5,6,7"
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tree.end
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tree "Channel_5"
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rgroup.long 0x94++0x03
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line.long 0x00 "MAILBOX_FIFOSTATUS_m_5,The FIFO status register has the status related to the mailbox internal FIFO"
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bitfld.long 0x00 0. "FIFOFULLMBM,Full flag for Mailbox" "FIFOFULLMBM_0_r,FIFOFULLMBM_1_r"
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group.long 0x54++0x03
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line.long 0x00 "MAILBOX_MESSAGE_m_5,The message register stores the next to be read message of the mailbox"
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rgroup.long 0xD4++0x03
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line.long 0x00 "MAILBOX_MSGSTATUS_m_5,The message status register has the status of the messages in the mailbox"
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bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in MailboxNote: Limited to four messages per mailbox" "0,1,2,3,4,5,6,7"
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tree.end
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rgroup.long 0x00++0x03
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line.long 0x00 "MAILBOX_REVISION,This register contains the IP revision code"
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group.long 0x10++0x03
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line.long 0x00 "MAILBOX_SYSCONFIG,This register controls the various parameters of the communication interface"
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bitfld.long 0x00 2.--3. "SIDLEMODE,Idle Mode" "SIDLEMODE_0,SIDLEMODE_1,SIDLEMODE_2,SIDLEMODE_3"
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bitfld.long 0x00 0. "SOFTRESET,Softreset" "SOFTRESET_0_w,SOFTRESET_1_w"
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tree.end
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tree.end
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autoindent.off
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newline
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