13805 lines
920 KiB
Plaintext
13805 lines
920 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: iMX27 On-Chip Peripherals
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; @Props: Released
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; @Author: FIL
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; @Changelog: 2007-10-02 FIL
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; @Manufacturer: NXP
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; @Doc: MCIMX27RM_20081212.pdf (Rev. 0.3. 2008-12)
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; @Core: ARM926EJ-S
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; @Chip: IMX27
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: permcimx27.per 17347 2024-01-19 09:09:16Z kwisniewski $
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;Known problems:
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;- 3 channels of SDHC in registers map (p.67), in decription of this module there are only 2 channels (p.833)
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;- Different names of registers (CSI) register map (p.67), description of this module (p.1375)
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;- Duplicated addresses of Video_Codec module registers (p.87 starting from offset 0x180)
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config 16. 8.
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width 0x0b
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tree "ARM Core Registers"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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width 8.
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tree "ID Registers"
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group c15:0x0000--0x0000
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line.long 0x0 "MIDR,Identity Code"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
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hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
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hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
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hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
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hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
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group c15:0x0100--0x0100
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line.long 0x0 "CTR,Cache Type"
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bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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group c15:0x0200--0x0200
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line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register"
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bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes"
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bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes"
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tree.end
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tree "MMU Control and Configuration"
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width 8.
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group c15:0x0001--0x0001
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
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bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
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textline " "
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bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
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bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
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bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
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textline " "
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bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
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bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
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bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
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textline " "
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group c15:0x0002--0x0002
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line.long 0x0 "TTBR,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
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textline " "
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group c15:0x3--0x3
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line.long 0x0 "DACR,Domain Access Control Register"
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bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
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textline " "
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group c15:0x0005--0x0005
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line.long 0x0 "DFSR,Data Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x0105--0x0105
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line.long 0x0 "IFSR,Instruction Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x0006--0x0006
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line.long 0x0 "DFAR,Data Fault Address Register"
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textline " "
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group c15:0x000a--0x000a
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line.long 0x0 "TLBR,TLB Lockdown Register"
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bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. " P ,P bit" "0,1"
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textline " "
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group c15:0x000d--0x000d
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line.long 0x0 "FCSEPID,FCSE Process ID"
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group c15:0x010d--0x010d
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line.long 0x0 "CONTEXT,Context ID"
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tree.end
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tree "Cache Control and Configuration"
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group c15:0x0009--0x0009
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line.long 0x0 "DCACHE,Data Cache Lockdown"
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bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
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bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
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bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
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bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
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group c15:0x0109--0x0109
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line.long 0x0 "ICACHE,Instruction Cache Lockdown"
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bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
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bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
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bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
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bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
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tree.end
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tree "TCM Control and Configuration"
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group c15:0x0019--0x0019
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line.long 0x0 "DTCM,Data TCM Region Register"
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hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
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bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
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bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
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group c15:0x0119--0x0119
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line.long 0x0 "ITCM,Instruction TCM Region Register"
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hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
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bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
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bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
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tree.end
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tree "Test and Debug"
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group c15:0x000f--0x000f
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line.long 0x0 "DOVRR,Debug Override Register"
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bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable"
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bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort"
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bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort"
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textline " "
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bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable"
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bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable"
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bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable"
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bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT"
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group c15:0x001f--0x001f
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line.long 0x0 "ADDRESS,Debug/Test Address"
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;wgroup c15:0x402f--0x402f
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; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry"
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;wgroup c15:0x403f--0x403f
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; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry"
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;wgroup c15:0x404f--0x404f
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; line.long 0x0 "RMTLBPA,Read PA in main TLB entry"
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;wgroup c15:0x405f--0x405f
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; line.long 0x0 "WMTLBPA,Write PA in main TLB entry"
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;wgroup c15:0x407f--0x407f
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; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM"
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;wgroup c15:0x412f--0x412f
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; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry"
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;wgroup c15:0x413f--0x413f
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; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry"
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;wgroup c15:0x414f--0x414f
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; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry"
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;wgroup c15:0x415f--0x415f
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; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry"
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;wgroup c15:0x417f--0x417f
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; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM"
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group c15:0x101f--0x101f
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line.long 0x0 "TRACE,Trace Control"
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bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall"
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bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall"
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group c15:0x700f--0x700f
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line.long 0x0 "CACHE,Cache Debug Control"
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bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through"
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bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable"
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bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable"
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group c15:0x701f--0x701f
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line.long 0x0 "MMU,MMU Debug Control"
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bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable"
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bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable"
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bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable"
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bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable"
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textline " "
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bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable"
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bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable"
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bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable"
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bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable"
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group c15:0x002f--0x002f
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line.long 0x0 "REMAP,Memory Region Remap"
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bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB"
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textline " "
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bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB"
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tree.end
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tree "ICEbreaker"
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width 8.
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group ice:0x0--0x5 "Debug Control"
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line.long 0x0 "DBGCTRL,Debug Control Register"
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bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
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bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
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textline " "
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bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
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bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
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bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x4 "DBGSTAT,Debug Status Register"
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bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
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bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java"
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bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb"
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bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
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bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
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bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x8 "VECTOR,Vector Catch Register"
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bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
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bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
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bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
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bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
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bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
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bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
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bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
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line.long 0x10 "COMCTRL,Debug Communication Control Register"
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bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
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bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
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line.long 0x14 "COMDATA,Debug Communication Data Register"
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group ice:0x8--0x0d "Watchpoint 0"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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group ice:0x10--0x15 "Watchpoint 1"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
|
|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "PLLCLK (Phase Locked Loop Clock Controller)"
|
|
base ad:0x10027000
|
|
width 6.
|
|
group.long 0x00++0x02b
|
|
line.long 0x00 "CSCR,Clock Source Control Register"
|
|
bitfld.long 0x00 31. " UPDATE_DIS ,Disable source selection and divider update until next MPLL lock" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 28.--30. " USB_DIV ,USB Clock Divider" "SPLL_CLK div by 1,SPLL_CLK div by 2,SPLL_CLK div by 3,SPLL_CLK div by 4,SPLL_CLK div by 5,SPLL_CLK div by 6,SPLL_CLK div by 7,SPLL_CLK div by 8"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SD_CNT ,Shut-Down Control" "Next rising edge,Second rising edge,Third rising edge,Fourth rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SSI2_SEL ,SSI2 Baud Source Select" "SPLL,MPLL"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SSI1_SEL ,SSI1 Baud Source Select" "SPLL,MPLL"
|
|
textline " "
|
|
bitfld.long 0x00 21. " H264_SEL ,H264 CCLK Source Select" "SPLL,MPLL"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MSHC_SEL ,MSHC CCLK Source Select" "SPLL,MPLL"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPLL_RESTART ,SPLL Restart" "No Effect,Restarted"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MPLL_RESTART ,MPLL Restart" "No Effect,Restarted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SP_SEL ,SPLL Select" "Internal premultiplier,External high frequency clock"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MCU_SEL ,MPLL Select" "Internal premultiplier,External high frequency clock"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ARM_SRC ,ARM clock source" "MPLL CLK * 2 / 3,MPLL CLK"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ARM_DIV ,Divider value for arm clk" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " AHB_DIV ,Divider value for AHB clk" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OSC26M_DIV1P5 ,Oscillator 26M Divide Enable" "Div by 1,Div by 1.5"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OSC26M_DIS ,Oscillator Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FPM_EN ,Frequency Premultiplier Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPEN ,Serial Peripheral PLL Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MPEN ,MPLL Enable" "Disabled,Enabled"
|
|
width 11.
|
|
line.long 0x04 "MPCTL0,MCU & System PLL Control Register 0"
|
|
bitfld.long 0x04 31. " CPLM ,Phase Lock Mode" "FOL,FPL"
|
|
bitfld.long 0x04 26.--29. " PD ,Predivider Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 16.--25. 1. " MFD ,Multiplication Factor (Denominator Part)"
|
|
bitfld.long 0x04 10.--13. " MFI ,Multiplication Factor (Integer)" "5,5,5,5,5,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--9. 1. " MFN ,Multiplication Factor (Numerator)"
|
|
line.long 0x08 "MPCTL1,MCU and System PLL Control Register 1"
|
|
bitfld.long 0x08 15. " LF ,Lock Flag" "Not locked,Locked"
|
|
bitfld.long 0x08 6. " BRMO ,BRM Order" "1st order,2nd order"
|
|
line.long 0x0c "SPCTL0,Serial Peripheral PLL Control Register 0"
|
|
bitfld.long 0x0C 31. " CPLM ,Phase Lock Mode" "FOL,FPL"
|
|
bitfld.long 0x0C 26.--29. " PD ,Predivider Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x0C 16.--25. 1. " MFD ,Multiplication Factor (Denominator Part)"
|
|
bitfld.long 0x0C 10.--13. " MFI ,Multiplication Factor (Integer Part)" "5,5,5,5,5,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--9. 1. " MFN ,Multiplication Factor (Numerator Part)"
|
|
line.long 0x10 "SPCTL1,SPLL Control Register 1"
|
|
bitfld.long 0x10 15. " LF ,Lock Flag" "Not locked,Locked"
|
|
bitfld.long 0x10 6. " BRMO ,BRM Order Bit" "1st order,2nd order"
|
|
line.long 0x14 "OSC26MCTL,Oscillator 26M Control Register"
|
|
bitfld.long 0x14 16.--17. " OSC26M_PEAK ,OSC26M_PEAK" "Desired range,Too low,Too high,Invalid state"
|
|
hexmask.long.byte 0x14 8.--13. 1. " AGC ,Automatic Gain Control"
|
|
width 9.
|
|
line.long 0x18 "PCDR0,Peripheral Clock Divider Register 0"
|
|
bitfld.long 0x18 26.--31. " SSI2DIV ,SSI2 Baud Clock Divider." "2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,7,7.5,8,8.5,9,9.5,10,10.5,11,11.5,12,12.5,13,13.5,14,14.5,15,15.5,16,16.5,17,17.5,18,18.5,19,19.5,20,20.5,21,21.5,22,22.5,23,23.5,24,24.5,25,25.5,26,26.5,27,27.5,28,28.5,29,29.5,30,30.5,31,31.5,32,32.5,33,33.5"
|
|
bitfld.long 0x18 25. " CLKO_EN ,Clock Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 22.--24. " CLKO_DIV ,Clock Out Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8"
|
|
textline " "
|
|
bitfld.long 0x18 16.--21. " SSI1DIV ,SSI1 Baud Clock Divider" "2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,7,7.5,8,8.5,9,9.5,10,10.5,11,11.5,12,12.5,13,13.5,14,14.5,15,15.5,16,16.5,17,17.5,18,18.5,19,19.5,20,20.5,21,21.5,22,22.5,23,23.5,24,24.5,25,25.5,26,26.5,27,27.5,28,28.5,29,29.5,30,30.5,31,31.5,32,32.5,33,33.5"
|
|
bitfld.long 0x18 10.--15. " H264DIV ,H264 Baud Clock Divider" "2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,7,7.5,8,8.5,9,9.5,10,10.5,11,11.5,12,12.5,13,13.5,14,14.5,15,15.5,16,16.5,17,17.5,18,18.5,19,19.5,20,20.5,21,21.5,22,22.5,23,23.5,24,24.5,25,25.5,26,26.5,27,27.5,28,28.5,29,29.5,30,30.5,31,31.5,32,32.5,33,33.5"
|
|
bitfld.long 0x18 6.--9. " NFCDIV ,NAND Flash Controller Clock Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16"
|
|
textline " "
|
|
bitfld.long 0x18 0.--5. " MSHCDIV ,MSHC Clock Divider" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16,Div by 17,Div by 18,Div by 19,Div by 20,Div by 21,Div by 22,Div by 23,Div by 24,Div by 25,Div by 26,Div by 27,Div by 28,Div by 29,Div by 30,Div by 31,Div by 32,Div by 33,Div by 34,Div by 35,Div by 36,Div by 37,Div by 38,Div by 39,Div by 40,Div by 41,Div by 42,Div by 43,Div by 44,Div by 45,Div by 46,Div by 47,Div by 48,Div by 49,Div by 50,Div by 51,Div by 52,Div by 53,Div by 54,Div by 55,Div by 56,Div by 57,Div by 58,Div by 59,Div by 60,Div by 61,Div by 62,Div by 63,Div by 64"
|
|
line.long 0x1c "PCDR1,Peripheral Clock Divider Register 1"
|
|
bitfld.long 0x1c 24.--29. " PERDIV4 ,Peripheral Clock Divider 4" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16,Div by 17,Div by 18,Div by 19,Div by 20,Div by 21,Div by 22,Div by 23,Div by 24,Div by 25,Div by 26,Div by 27,Div by 28,Div by 29,Div by 30,Div by 31,Div by 32,Div by 33,Div by 34,Div by 35,Div by 36,Div by 37,Div by 38,Div by 39,Div by 40,Div by 41,Div by 42,Div by 43,Div by 44,Div by 45,Div by 46,Div by 47,Div by 48,Div by 49,Div by 50,Div by 51,Div by 52,Div by 53,Div by 54,Div by 55,Div by 56,Div by 57,Div by 58,Div by 59,Div by 60,Div by 61,Div by 62,Div by 63,Div by 64"
|
|
bitfld.long 0x1c 16.--21. " PERDIV3 ,Peripheral Clock Divider 3" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16,Div by 17,Div by 18,Div by 19,Div by 20,Div by 21,Div by 22,Div by 23,Div by 24,Div by 25,Div by 26,Div by 27,Div by 28,Div by 29,Div by 30,Div by 31,Div by 32,Div by 33,Div by 34,Div by 35,Div by 36,Div by 37,Div by 38,Div by 39,Div by 40,Div by 41,Div by 42,Div by 43,Div by 44,Div by 45,Div by 46,Div by 47,Div by 48,Div by 49,Div by 50,Div by 51,Div by 52,Div by 53,Div by 54,Div by 55,Div by 56,Div by 57,Div by 58,Div by 59,Div by 60,Div by 61,Div by 62,Div by 63,Div by 64"
|
|
bitfld.long 0x1c 8.--13. " PERDIV2 ,Peripheral Clock Divider 2" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16,Div by 17,Div by 18,Div by 19,Div by 20,Div by 21,Div by 22,Div by 23,Div by 24,Div by 25,Div by 26,Div by 27,Div by 28,Div by 29,Div by 30,Div by 31,Div by 32,Div by 33,Div by 34,Div by 35,Div by 36,Div by 37,Div by 38,Div by 39,Div by 40,Div by 41,Div by 42,Div by 43,Div by 44,Div by 45,Div by 46,Div by 47,Div by 48,Div by 49,Div by 50,Div by 51,Div by 52,Div by 53,Div by 54,Div by 55,Div by 56,Div by 57,Div by 58,Div by 59,Div by 60,Div by 61,Div by 62,Div by 63,Div by 64"
|
|
textline " "
|
|
bitfld.long 0x1c 0.--5. " PERDIV1 ,Peripheral Clock Divider 1" "Div by 1,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16,Div by 17,Div by 18,Div by 19,Div by 20,Div by 21,Div by 22,Div by 23,Div by 24,Div by 25,Div by 26,Div by 27,Div by 28,Div by 29,Div by 30,Div by 31,Div by 32,Div by 33,Div by 34,Div by 35,Div by 36,Div by 37,Div by 38,Div by 39,Div by 40,Div by 41,Div by 42,Div by 43,Div by 44,Div by 45,Div by 46,Div by 47,Div by 48,Div by 49,Div by 50,Div by 51,Div by 52,Div by 53,Div by 54,Div by 55,Div by 56,Div by 57,Div by 58,Div by 59,Div by 60,Div by 61,Div by 62,Div by 63,Div by 64"
|
|
line.long 0x20 "PCCR0,Peripheral Clock Control Register 0"
|
|
bitfld.long 0x20 31. " CSPI1_EN ,CSPI1 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 30. " CSPI2_EN ,CSPI2 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 29. " CSPI3_EN ,CSPI3 IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 28. " DMA_EN ,DMA IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 27. " EMMA_EN ,EMMA IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 26. " FEC_EN ,FEC IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 25. " GPIO_EN ,GPIO IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 24. " GPT1_EN ,GPT1 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 23. " GPT2_EN ,GPT2 IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 22. " GPT3_EN ,GPT3 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 21. " GPT4_EN ,GPT4 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 20. " GPT5_EN ,GPT5 IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 19. " GPT6_EN ,GPT6 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 18. " I2C1_EN ,I2C1 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " I2C2_EN ,I2C2 IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 16. " IIM_EN ,IIM IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 15. " KPP_EN ,KPP IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 14. " LCDC_EN ,LCDC IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 13. " MSHC_EN ,OWIRE IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 12. " OWIRE_EN ,OWIRE IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 11. " PWM_EN ,PWM IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 9. " RTC_EN ,RTC IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " RTIC_EN ,RTIC IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 7. " SAHARA_EN ,SAHARA IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 6. " SCC_EN ,SCC IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 5. " SDHC1_EN ,SDHC1 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 4. " SDHC2_EN ,SDHC2 IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 3. " SDHC3_EN ,SDHC3 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 2. " SLCDC_EN ,SLCDC IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " SSI1_EN ,SSI1 IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 0. " SSI2_EN ,SSI2 IPG Clock Enable" "Disabled,Enabled"
|
|
line.long 0x24 "PCCR1,Peripheral Clock Control Register 1"
|
|
bitfld.long 0x24 31. " UART1_EN ,UART1 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 30. " UART2_EN ,UART2 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 29. " UART3_EN ,UART3 IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 28. " UART4_EN ,UART4 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 27. " UART5_EN ,UART5 IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 26. " UART6_EN ,UART6 IPG Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 25. " USB_EN ,USB IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 24. " WDT_EN ,WDT IPG Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 23. " HCLK_ATA ,ATA AHB Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 22. " HCLK_BROM ,BROM AHB Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 21. " HCLK_CSI ,CSI AHB Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 20. " HCLK_DMA ,DMA AHB Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 19. " HCLK_EMI ,EMI AHB Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 18. " HCLK_EMMA ,EMMA AHB Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 17. " HCLK_FEC ,FEC AHB Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 16. " HCLK_H264 ,H264 AHB Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 15. " HCLK_LCDC ,LCDC AHB Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 14. " HCLK_RTIC ,RTIC AHB Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 13. " HCLK_SAHARA ,SAHARA AHB Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 12. " HCLK_SLCDC ,SLCDC AHB Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 11. " HCLK_USB ,USB AHB Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 10. " PERCLK1_EN ,PERCLK1 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 9. " PERCLK2_EN ,PERCLK2 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 8. " PERCLK3_EN ,PERCLK3 Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 7. " PERCLK4_EN ,PERCLK4 Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 6. " H264_BAUDEN ,H264 BAUD Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 5. " SSI1_BAUDEN ,SSI1 BAUD Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 4. " SSI2_BAUDEN ,SSI2 BAUD Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 3. " NFC_BAUDEN ,NFC BAUD Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 2. " MSHC_BAUDEN ,MSHC BAUD Clock Enable" "Disabled,Enabled"
|
|
line.long 0x28 "CCSR,Clock Control Status Register"
|
|
bitfld.long 0x28 15. " 32K_SR ,32K Status Register" "Low phase,High phase"
|
|
bitfld.long 0x28 8.--9. " CLKMODE ,Configuration of FPM, OSC26M and DPLL" "DPLL/FPM/OSC26M bypassed,FPM bypassed,FPM and OSC26M bypassed,FPM and DPLL in use"
|
|
textline " "
|
|
bitfld.long 0x28 0.--4. " CLKO_SEL ,CLKO Select" "CLK32,PREMCLK,CLK26M,MPLL Reference CLK,SPLL Reference CLK,HCLK Source,SPLL CLK,FCLK,HCLK,IPG_CLK,PERCLK1,PERCLK2,PERCLK3,PERCLK4,SSI 1 Baud,SSI 2 Baud,NFC Baud,MSHC_Baud,H264 Baud,CLK60M Always,CLK32K Always,CLK60M,DPTC Reference Clock,?..."
|
|
hgroup.long 0x2c++0x07
|
|
hide.long 0x00 "PMCTL,PMOS Switch Control Register"
|
|
hide.long 0x04 "PMCOUNT,PMOS Switch Counter Register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "WKGDCTL,Wakeup Guard Mode Control Register"
|
|
bitfld.long 0x00 0. " WKDG_EN ,Wakeup Guard Mode Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "SYSCTRL (System Control)"
|
|
base ad:0x10027800
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CID,Chip ID Register"
|
|
hexmask.long.byte 0x00 28.--31. 1. " VERSION_ID ,ID number"
|
|
textline " "
|
|
hexmask.long.word 0x00 12.--27. 1. " PART_NUMBER ,Number of the chip"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " MANUFACTURER_ID ,Manufacturer ID"
|
|
group.long 0x14++0x47
|
|
line.long 0x00 "FMCR,Function Multiplexing Control Register"
|
|
bitfld.long 0x00 25. " UART4_RXD_CTL ,UART4 RXD Control" "USBH1_TXDP GPIO's AOUT,USBH1_RXDP"
|
|
textline " "
|
|
bitfld.long 0x00 24. " UART4_RTS_CTL ,UART4 RTS Control" "USBH1_RXDP,USBH1_FS"
|
|
textline " "
|
|
bitfld.long 0x00 18. " KP_COL6_CTL ,Keypad Column 6 Control" "TEST_WB2,UART2_TXD"
|
|
textline " "
|
|
bitfld.long 0x00 17. " KP_ROW7_CTL ,Keypad Row 7 Control" "TEST_WB0,UART2_RTS"
|
|
textline " "
|
|
bitfld.long 0x00 16. " KP_ROW6_CTL ,Keypad Row 6 Control." "TEST_WB1,UART2_RXD"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PC_WAIT_B_CTL ,PC_WAIT_B Control" "BOUT of GPIO PORT C[31],PC_WAIT_B"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PC_READY_CTL ,PC_READY Control" "BOUT of GPIO PORT C[30],PC_READY"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PC_VS1_CTL ,PC_VS1 Control" "BOUT of GPIO PORT C[29],PC_VS1"
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textline " "
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bitfld.long 0x00 11. " PC_VS2_CTL ,PC_VS2 Control" "BOUT of GPIO PORT C[28],PC_VS2"
|
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textline " "
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|
bitfld.long 0x00 10. " PC_BVD1_CTL ,PC_BVD1 Control" "BOUT of GPIO PORT C[19],PC_BVD1"
|
|
textline " "
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bitfld.long 0x00 9. " PC_BVD2_CTL ,PC_BVD2 Control" "BOUT of GPIO PORT C[18],PC_BVD2"
|
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textline " "
|
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bitfld.long 0x00 8. " IOIS16_CTL ,IOIS16 Control" "GPIO PORT C[17],IOIS16"
|
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textline " "
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bitfld.long 0x00 5. " NF_FMS ,Flash Memory Select" "512 byte,2 Kbyte"
|
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textline " "
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bitfld.long 0x00 4. " NF_16BIT_SEL ,NAND Flash 16-bit Select" "8-bit,16-bit"
|
|
textline " "
|
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bitfld.long 0x00 2. " SLCDC_SEL ,SLCDC Select" "SLCDC,BB"
|
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textline " "
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bitfld.long 0x00 1. " SDCS1_SEL ,SDRAM Chip Select" "/CS3,/CSD1"
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textline " "
|
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bitfld.long 0x00 0. " SDCS0_SEL ,SDRAM Chip Select" "/CS2,/CSD0"
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width 6.
|
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line.long 0x04 "GPCR,Global Peripheral Control Register"
|
|
bitfld.long 0x04 16.--19. " BOOT ,Boot Mode" "Bootstrap from UART/USB,Reserved,8-bit NAND Flash,16-bit Nand Flash,16-bit Nand Flash,16-bit CS0,32-bit CS0,8 bit Nand Flash,?..."
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|
textline " "
|
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bitfld.long 0x04 11. " ETM9_PAD_EN ,ETM9 Pad Enable" "Disabled,Enabled"
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bitfld.long 0x04 10. " USB_Burst_Override ,USB Burst Override Control" "Bypassed,INCR8"
|
|
textline " "
|
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bitfld.long 0x04 9. " PP_Burst_Override ,EMMA PP Burst Override Control" "Bypassed,INCR4/INCR8"
|
|
bitfld.long 0x04 8. " DMA_Burst_Override ,DMA Burst Override Control" "Bypassed,INCR4/INCR8"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CLOCK_GATING_EN ,Clock Gating Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " DDR_MODE ,DDR Drive Strength Control" "DSCRx,SSTL_18"
|
|
textline " "
|
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bitfld.long 0x04 1. " CLK_DDR_MODE ,Selects DDR drive strength of SDCLK pad" "Selected,Not selected"
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|
bitfld.long 0x04 0. " DDR_INPUT ,Forces input mode of DDR pads to CMOS input mode" "Nor forced,Forced"
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|
width 6.
|
|
line.long 0x08 "WBCR,Well Bias Control Register"
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|
bitfld.long 0x08 26.--27. " CRM_SPA_EMI ,EMI PWELL Set Point Adjust" "Minimum,Decreased,Moderate,Increased"
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bitfld.long 0x08 24.--25. " CRM_SPA_EMI ,EMI NWELL Set Point Adjust" "Minimum,Decreased,Moderate,Increased"
|
|
bitfld.long 0x08 19. " CRM_WBFA_EMI ,Well Bias Frequency Adjust" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16.--18. " CRM_WBM_EMI ,Enables or disables EMI Well Bias System during Sleep mode" "Not applied,@ Sleep,Not applied,Not applied,Not applied,Not applied,Not applied,Not applied"
|
|
bitfld.long 0x08 10.--11. " CRM_SPA ,A926P PWELL Set Point Adjust" "Minimum,Decreased,Moderate,Increased"
|
|
bitfld.long 0x08 8.--9. " CRM_SPA ,A926P NWELL Set Point Adjust" "Minimum,Decreased,Moderate,Increased"
|
|
textline " "
|
|
bitfld.long 0x08 3. " CRM_WBFA ,Well Bias Frequency Adjust" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--2. " CRM_WBM ,Enables or disables Well Bias System during Sleep mode" "Reserved,@ Sleep,@ Sleep and DOZE,Not applied,Not applied,Not applied,Not applied,Not applied"
|
|
width 8.
|
|
line.long 0x0c "DSCR1,Drive Strength Control Register 1"
|
|
bitfld.long 0x0C 20.--21. " DS_SLOW11 ,Drive Strength Slow I/O (DVS_PMIC)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x0C 18.--19. " DS_SLOW10 ,Drive Strength Slow I/O (SDHC1 and CSPI3)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x0C 16.--17. " DS_SLOW9 ,Drive Strength Slow I/O (JTAG)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " DS_SLOW8 ,Drive Strength Slow I/O (PWM, KPP, UART1,UART2, UART3, and RESET_OUT_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x0C 12.--13. " DS_SLOW7 ,Drive Strength Slow I/O (CSPI1 and CSPI2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x0C 10.--11. " DS_SLOW6 ,Drive Strength Slow I/O (SSI1, SSI2, SAP, SSI3,GPT4, and GPT5)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x0C 8.--9. " DS_SLOW5 ,Drive Strength Slow I/O (GPT1, I2C1, and I2C2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x0C 6.--7. " DS_SLOW4 ,Drive Strength Slow I/O (USBH1, UART4, and USBG)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x0C 4.--5. " DS_SLOW3 ,Drive Strength Slow I/O (CSI, UART5, and UART6) " "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x0C 2.--3. " DS_SLOW2 ,Drive Strength Slow I/O (SDHC2 and MSHC)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x0C 0.--1. " DS_SLOW1 ,Drive Strength Slow I/O (LCDC)" "Normal,High,Max high,Max high"
|
|
line.long 0x10 "DSCR2,Drive Strength Control Register 2"
|
|
bitfld.long 0x10 30.--31. " DS_FAST16 ,Drive Strength Fast I/O (D15)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 28.--29. " DS_FAST15 ,Drive Strength Fast I/O (D14)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 26.--27. " DS_FAST14 ,Drive Strength Fast I/O (D13)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x10 24.--25. " DS_FAST13 ,Drive Strength Fast I/O (D12)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 22.--23. " DS_FAST12 ,Drive Strength Fast I/O (D11)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 20.--21. " DS_FAST11 ,Drive Strength Fast I/O (D10)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " DS_FAST10 ,Drive Strength Fast I/O (D9)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 16.--17. " DS_FAST9 ,Drive Strength Fast I/O (D8)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 14.--15. " DS_FAST8 ,Drive Strength Fast I/O (D7)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x10 12.--13. " DS_FAST7 ,Drive Strength Fast I/O (D6)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 10.--11. " DS_FAST6 ,Drive Strength Fast I/O (D5)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 8.--9. " DS_FAST5 ,Drive Strength Fast I/O (D4)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " DS_FAST4 ,Drive Strength Fast I/O (D3)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 4.--5. " DS_FAST3 ,Drive Strength Fast I/O (D2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x10 2.--3. " DS_FAST2 ,Drive Strength Fast I/O (D1)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x10 0.--1. " DS_FAST1 ,Drive Strength Fast I/O (D0)" "Normal,High,Max high,Max high"
|
|
line.long 0x14 "DSCR3,Drive Strength Control Register 3"
|
|
bitfld.long 0x14 30.--31. " DS_FAST32 ,Drive Strength Fast I/O (A15)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 28.--29. " DS_FAST31 ,Drive Strength Fast I/O (A14)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 26.--27. " DS_FAST30 ,Drive Strength Fast I/O (A13)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x14 24.--25. " DS_FAS29 ,Drive Strength Fast I/O (A12)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 22.--23. " DS_FAST28 ,Drive Strength Fast I/O (A11)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 20.--21. " DS_FAST27 ,Drive Strength Fast I/O (A10)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " DS_FAST26 ,Drive Strength Fast I/O (A9)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 16.--17. " DS_FAST25 ,Drive Strength Fast I/O (A8)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 14.--15. " DS_FAST24 ,Drive Strength Fast I/O (A7)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x14 12.--13. " DS_FAST23 ,Drive Strength Fast I/O (A6)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 10.--11. " DS_FAST22 ,Drive Strength Fast I/O (A5)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 8.--9. " DS_FAST21 ,Drive Strength Fast I/O (A4)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " DS_FAST20 ,Drive Strength Fast I/O (A3)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x14 4.--5. " DS_FAST19 ,Drive Strength Fast I/O (A2)" "Normal,High,Max high,Max high"
|
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bitfld.long 0x14 2.--3. " DS_FAST18 ,Drive Strength Fast I/O (A1)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x14 0.--1. " DS_FAST17 ,Drive Strength Fast I/O (A0)" "Normal,High,Max high,Max high"
|
|
line.long 0x18 "DSCR4,Drive Strength Control Register 4"
|
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bitfld.long 0x18 18.--19. " DS_FAST42 ,Drive Strength Fast I/O (A25)" "Normal,High,Max high,Max high"
|
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bitfld.long 0x18 16.--17. " DS_FAST41 ,Drive Strength Fast I/O (A24)" "Normal,High,Max high,Max high"
|
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bitfld.long 0x18 14.--15. " DS_FAST40 ,Drive Strength Fast I/O (A23)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x18 12.--13. " DS_FAST39 ,Drive Strength Fast I/O (A22)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x18 10.--11. " DS_FAST38 ,Drive Strength Fast I/O (A21)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x18 8.--9. " DS_FAST37 ,Drive Strength Fast I/O (A20)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " DS_FAST36 ,Drive Strength Fast I/O (A19)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x18 4.--5. " DS_FAST35 ,Drive Strength Fast I/O (A18)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x18 2.--3. " DS_FAST34 ,Drive Strength Fast I/O (A17)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x18 0.--1. " DS_FAST33 ,Drive Strength Fast I/O (A16)" "Normal,High,Max high,Max high"
|
|
line.long 0x1c "DSCR5,Drive Strength Control Register 5"
|
|
bitfld.long 0x1C 30.--31. " DS_FAST64 ,Drive Strength Fast I/O (SD15)" "Normal,High,Max high,Max high"
|
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bitfld.long 0x1C 28.--29. " DS_FAST63 ,Drive Strength Fast I/O (SD14 )" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 26.--27. " DS_FAST62 ,Drive Strength Fast I/O (SD13)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x1C 24.--25. " DS_FAST61 ,Drive Strength Fast I/O (SD12)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 22.--23. " DS_FAST60 ,Drive Strength Fast I/O (SD11)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 20.--21. " DS_FAST59 ,Drive Strength Fast I/O (SD10)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " DS_FAST58 ,Drive Strength Fast I/O (SD9)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 16.--17. " DS_FAST57 ,Drive Strength Fast I/O (SD8)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 14.--15. " DS_FAST56 ,Drive Strength Fast I/O (SD7)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x1C 12.--13. " DS_FAST55 ,Drive Strength Fast I/O (SD6)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 10.--11. " DS_FAST54 ,Drive Strength Fast I/O (SD5)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 8.--9. " DS_FAST53 ,Drive Strength Fast I/O (SD4)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x1C 6.--7. " DS_FAST52 ,Drive Strength Fast I/O (SD3)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 4.--5. " DS_FAST51 ,Drive Strength Fast I/O (SD2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x1C 2.--3. " DS_FAST50 ,Drive Strength Fast I/O (SD1)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x1C 0.--1. " DS_FAST49 ,Drive Strength Fast I/O (SD0)" "Normal,High,Max high,Max high"
|
|
line.long 0x20 "DSCR6,Drive Strength Control Register 6"
|
|
bitfld.long 0x20 30.--31. " DS_FAST80 ,Drive Strength Fast I/O (SD31)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 28.--29. " DS_FAST79 ,Drive Strength Fast I/O (SD30)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 26.--27. " DS_FAST78 ,Drive Strength Fast I/O (SD29)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x20 24.--25. " DS_FAST77 ,Drive Strength Fast I/O (SD28)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 22.--23. " DS_FAST76 ,Drive Strength Fast I/O (SD27)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 20.--21. " DS_FAST75 ,Drive Strength Fast I/O (SD26)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x20 18.--19. " DS_FAST74 ,Drive Strength Fast I/O (SD25)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 16.--17. " DS_FAST73 ,Drive Strength Fast I/O (SD24)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 14.--15. " DS_FAST72 ,Drive Strength Fast I/O (SD23)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x20 12.--13. " DS_FAST71 ,Drive Strength Fast I/O (SD22)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 10.--11. " DS_FAST70 ,Drive Strength Fast I/O (SD21)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 8.--9. " DS_FAST69 ,Drive Strength Fast I/O (SD20)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x20 6.--7. " DS_FAST68 ,Drive Strength Fast I/O (SD19)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 4.--5. " DS_FAST67 ,Drive Strength Fast I/O (SD18)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x20 2.--3. " DS_FAST66 ,Drive Strength Fast I/O (SD17)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x20 0.--1. " DS_FAST65 ,Drive Strength Fast I/O (SD16)" "Normal,High,Max high,Max high"
|
|
line.long 0x24 "DSCR7,Drive Strength Control Register 7"
|
|
bitfld.long 0x24 28.--29. " S_FAST95 ,Drive Strength Fast I/O (RW_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 26.--27. " S_FAST94 ,Drive Strength Fast I/O (BCLK)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 24.--25. " S_FAST93 ,Drive Strength Fast I/O (LBA_B)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x24 22.--23. " S_FAST92 ,Drive Strength Fast I/O (OE_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 20.--21. " S_FAST91 ,Drive Strength Fast I/O (ECB_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 18.--19. " S_FAST90 ,Drive Strength Fast I/O (CS5_B)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x24 16.--17. " S_FAST89 ,Drive Strength Fast I/O (CS4_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 14.--15. " S_FAST88 ,Drive Strength Fast I/O (CS3_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 12.--13. " S_FAST87 ,Drive Strength Fast I/O (CS2_B)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x24 10.--11. " S_FAST86 ,Drive Strength Fast I/O (CS1_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 8.--9. " S_FAST85 ,Drive Strength Fast I/O (CS0_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 6.--7. " S_FAST84 ,Drive Strength Fast I/O (EB1_B)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x24 4.--5. " S_FAST83 ,Drive Strength Fast I/O (EB0_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 2.--3. " S_FAST82 ,Drive Strength Fast I/O (SDBA1)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x24 0.--1. " S_FAST81 ,Drive Strength Fast I/O (SDBA0)" "Normal,High,Max high,Max high"
|
|
line.long 0x28 "DSCR8,Drive Strength Control Register 8"
|
|
bitfld.long 0x28 28.--29. " DS_FAST111 ,Drive Strength Fast I/O (SDQS3)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 26.--27. " DS_FAST110 ,Drive Strength Fast I/O (SDQS2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 24.--25. " DS_FAST109 ,Drive Strength Fast I/O (SDQS1)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x28 22.--23. " DS_FAST108 ,Drive Strength Fast I/O (SDQS0)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 20.--21. " DS_FAST107 ,Drive Strength Fast I/O (SDCLK)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 18.--19. " DS_FAST106 ,Drive Strength Fast I/O (SDCKE1)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x28 16.--17. " DS_FAST105 ,Drive Strength Fast I/O (SDCKE0)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 14.--15. " DS_FAST104 ,Drive Strength Fast I/O (SDWE_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 12.--13. " DS_FAST103 ,Drive Strength Fast I/O (CAS_B)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x28 10.--11. " DS_FAST102 ,Drive Strength Fast I/O (RAS_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 8.--9. " DS_FAST101 ,Drive Strength Fast I/O (MA10)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 6.--7. " DS_FAST100 ,Drive Strength Fast I/O (DQM3)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x28 4.--5. " DS_FAST99 ,Drive Strength Fast I/O (DQM2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 2.--3. " DS_FAST98 ,Drive Strength Fast I/O (DQM1)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x28 0.--1. " DS_FAST97 ,Drive Strength Fast I/O (DQM0)" "Normal,High,Max high,Max high"
|
|
line.long 0x2c "DSCR9,Drive Strength Control Register 9"
|
|
bitfld.long 0x2C 28.--29. " DS_FAST127 ,Drive Strength Fast I/O (M_REQUEST)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 26.--27. " DS_FAST126 ,Drive Strength Fast I/O (M_GRANT)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 24.--25. " DS_FAST125 ,Drive Strength Fast I/O (IOIS16)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x2C 22.--23. " DS_FAST124 ,Drive Strength Fast I/O (PC_POE)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 20.--21. " DS_FAST123 ,Drive Strength Fast I/O (PC_RW_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 18.--19. " DS_FAST122 ,Drive Strength Fast I/O (PC_RST)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x2C 16.--17. " DS_FAST121 ,Drive Strength Fast I/O (PC_BVD2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 14.--15. " DS_FAST120 ,Drive Strength Fast I/O (PC_BVD1)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 12.--13. " DS_FAST119 ,Drive Strength Fast I/O (PC_VS2)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x2C 10.--11. " DS_FAST118 ,Drive Strength Fast I/O (PC_VS1)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 8.--9. " DS_FAST117 ,Drive Strength Fast I/O (PC_PWRON)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 6.--7. " DS_FAST116 ,Drive Strength Fast I/O (PC_READY)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x2C 4.--5. " DS_FAST115 ,Drive Strength Fast I/O (PC_WAIT_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 2.--3. " DS_FAST114 ,Drive Strength Fast I/O (PC_CD2_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x2C 0.--1. " DS_FAST113 ,Drive Strength Fast I/O (PC_CD1_B)" "Normal,High,Max high,Max high"
|
|
line.long 0x30 "DSCR10,Drive Strength Control Register 10"
|
|
bitfld.long 0x30 28.--29. " DS_FAST143 ,Drive Strength Fast I/O (SD3_CMD)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 26.--27. " DS_FAST142 ,Drive Strength Fast I/O (SD3_CLK)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 24.--25. " DS_FAST141 ,Drive Strength Fast I/O (SD2_CLK)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x30 22.--23. " DS_FAST140 ,Drive Strength Fast I/O (LSCLK)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 20.--21. " DS_FAST139 ,Drive Strength Fast I/O (CSI_MCLK)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 18.--19. " DS_FAST138 ,Drive Strength Fast I/O (CSI_PIXCLK)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x30 16.--17. " DS_FAST137 ,Drive Strength Fast I/O (CLKO)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 14.--15. " DS_FAST136 ,Drive Strength Fast I/O " "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 12.--13. " DS_FAST135 ,Drive Strength Fast I/O (NFWE_B)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x30 10.--11. " DS_FAST134 ,Drive Strength Fast I/O (NFRE_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 8.--9. " DS_FAST133 ,Drive Strength Fast I/O (NFALE)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 6.--7. " DS_FAST132 ,Drive Strength Fast I/O (NFCLE)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x30 4.--5. " DS_FAST131 ,Drive Strength Fast I/O (NFWP_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 2.--3. " DS_FAST130 ,Drive Strength Fast I/O (NFCE_B)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x30 0.--1. " DS_FAST129 ,Drive Strength Fast I/O (NFRB)" "Normal,High,Max high,Max high"
|
|
line.long 0x34 "DSCR11,Drive Strength Control Register 11"
|
|
bitfld.long 0x34 30.--31. " DS_FAST160 ,Drive Strength Fast I/O (ATA_DATA15)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 28.--29. " DS_FAST159 ,Drive Strength Fast I/O (ATA_DATA14)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 26.--27. " DS_FAST158 ,Drive Strength Fast I/O (ATA_DATA13)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x34 24.--25. " DS_FAST157 ,Drive Strength Fast I/O (ATA_DATA12)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 22.--23. " DS_FAST156 ,Drive Strength Fast I/O (ATA_DATA11)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 20.--21. " DS_FAST155 ,Drive Strength Fast I/O (ATA_DATA10)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x34 18.--19. " DS_FAST154 ,Drive Strength Fast I/O (ATA_DATA9)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 16.--17. " DS_FAST153 ,Drive Strength Fast I/O (ATA_DATA8)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 14.--15. " DS_FAST152 ,Drive Strength Fast I/O (ATA_DATA7)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x34 12.--13. " DS_FAST151 ,Drive Strength Fast I/O (ATA_DATA6)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 10.--11. " DS_FAST150 ,Drive Strength Fast I/O (ATA_DATA5)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 8.--9. " DS_FAST149 ,Drive Strength Fast I/O (ATA_DATA4)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x34 6.--7. " DS_FAST148 ,Drive Strength Fast I/O (ATA_DATA3)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 4.--5. " DS_FAST147 ,Drive Strength Fast I/O (ATA_DATA2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x34 2.--3. " DS_FAST146 ,Drive Strength Fast I/O (ATA_DATA1)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x34 0.--1. " DS_FAST145 ,Drive Strength Fast I/O (ATA_DATA0)" "Normal,High,Max high,Max high"
|
|
line.long 0x38 "DSCR12,Drive Strength Control Register 12"
|
|
bitfld.long 0x38 22.--23. " DS_FAST172 ,Drive Strength Fast I/O (USBOTG_CLK)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x38 20.--21. " DS_FAST171 ,Drive Strength Fast I/O (USBOTG_NXT)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x38 18.--19. " DS_FAST170 ,Drive Strength Fast I/O (USBOTG_STP)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x38 16.--17. " DS_FAST169 ,Drive Strength Fast I/O (USBOTG_DIR)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x38 14.--15. " DS_FAST168 ,Drive Strength Fast I/O (USBOTG_DATA7)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x38 12.--13. " DS_FAST167 ,Drive Strength Fast I/O (USBOTG_DATA6)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x38 10.--11. " DS_FAST166 ,Drive Strength Fast I/O (USBOTG_DATA5)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x38 8.--9. " DS_FAST165 ,Drive Strength Fast I/O (USBOTG_DATA4)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x38 6.--7. " DS_FAST164 ,Drive Strength Fast I/O (USBOTG_DATA3)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x38 4.--5. " DS_FAST163 ,Drive Strength Fast I/O (USBOTG_DATA2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x38 2.--3. " DS_FAST162 ,Drive Strength Fast I/O (USBOTG_DATA1)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x38 0.--1. " DS_FAST161 ,Drive Strength Fast I/O (USBOTG_DATA0)" "Normal,High,Max high,Max high"
|
|
line.long 0x3c "DSCR13,Drive Strength Control Register 13"
|
|
bitfld.long 0x3C 22.--23. " DS_FAST188 ,Drive Strength Fast I/O (USBH2_CLK)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x3C 20.--21. " DS_FAST187 ,Drive Strength Fast I/O (USBH2_DIR)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x3C 18.--19. " DS_FAST186 ,Drive Strength Fast I/O (USBH2_NXT)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x3C 16.--17. " DS_FAST185 ,Drive Strength Fast I/O (USBH2_STP)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x3C 14.--15. " DS_FAST184 ,Drive Strength Fast I/O (USBH2_DATA7)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x3C 12.--13. " DS_FAST183 ,Drive Strength Fast I/O (USBH2_DATA6)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x3C 10.--11. " DS_FAST182 ,Drive Strength Fast I/O (USBH2_DATA5)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x3C 8.--9. " DS_FAST181 ,Drive Strength Fast I/O (USBH2_DATA4)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x3C 6.--7. " DS_FAST180 ,Drive Strength Fast I/O (USBH2_DATA3)" "Normal,High,Max high,Max high"
|
|
textline " "
|
|
bitfld.long 0x3C 4.--5. " DS_FAST179 ,Drive Strength Fast I/O (USBH2_DATA2)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x3C 2.--3. " DS_FAST178 ,Drive Strength Fast I/O (USBH2_DATA1)" "Normal,High,Max high,Max high"
|
|
bitfld.long 0x3C 0.--1. " DS_FAST177 ,Drive Strength Fast I/O (USBH2_DATA0)" "Normal,High,Max high,Max high"
|
|
width 6.
|
|
line.long 0x40 "PSCR,Pull Strength Control Register"
|
|
bitfld.long 0x40 14.--15. " PUENCR7 ,PUEN Strength Control 7 (SD2_D0_MSHC_DATA0)" "100k pull-down,100k pull-up,47k pull-up,22k pull-up"
|
|
bitfld.long 0x40 12.--13. " PUENCR6 ,PUEN Strength Control 6 (SD2_D1_MSHC_DATA1)" "100k pull-down,100k pull-up,47k pull-up,22k pull-up"
|
|
textline " "
|
|
bitfld.long 0x40 10.--11. " PUENCR5 ,PUEN Strength Control 5 (SD2_D2_MSHC_DATA2)" "100k pull-down,100k pull-up,47k pull-up,22k pull-up"
|
|
bitfld.long 0x40 8.--9. " PUENCR4 ,PUEN Strength Control 4 (SD2_D3_MSHC_DATA3)" "100k pull-down,100k pull-up,47k pull-up,22k pull-up"
|
|
textline " "
|
|
bitfld.long 0x40 6.--7. " PUENCR3 ,PUEN Strength Control 3 (SD2_CMD_MSHC_BS)" "100k pull-down,100k pull-up,47k pull-up,22k pull-up"
|
|
bitfld.long 0x40 4.--5. " PUENCR2 ,PUEN Strength Control 2 (SD2_CLK_MSHC_SCLK)" "100k pull-down,100k pull-up,47k pull-up,22k pull-up"
|
|
textline " "
|
|
bitfld.long 0x40 2.--3. " PUENCR1 ,PUEN Strength Control 1 (SD1_D3_CSPI3_SS)" "100k pull-down,100k pull-up,47k pull-up,22k pull-up"
|
|
bitfld.long 0x40 0.--1. " PUENCR0 ,PUEN Strength Control 0 (ATA_DATA3_SD3_D3S)" "100k pull-down,100k pull-up,47k pull-up,22k pull-up"
|
|
line.long 0x44 "PCSR,Priority Control and Select Register"
|
|
bitfld.long 0x44 19. " S3_AMPR_SEL ,Slave Alternate Context Priority Select" "Regular register,Alternate register"
|
|
bitfld.long 0x44 18. " S2_AMPR_SEL ,Slave Alternate Context Priority Select" "Regular register,Alternate register"
|
|
textline " "
|
|
bitfld.long 0x44 17. " S1_AMPR_SEL ,Slave Alternate Context Priority Select" "Regular register,Alternate register"
|
|
bitfld.long 0x44 16. " S0_AMPR_SEL ,Slave Alternate Context Priority Select" "Regular register,Alternate register"
|
|
textline " "
|
|
bitfld.long 0x44 5. " M5_HIGH_PRIORITY ,Master High Priority" "Low priority,High priority"
|
|
bitfld.long 0x44 4. " M4_HIGH_PRIORITY ,Master High Priority" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x44 3. " M3_HIGH_PRIORITY ,Master High Priority" "Low priority,High priority"
|
|
bitfld.long 0x44 2. " M2_HIGH_PRIORITY ,Master High Priority" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x44 1. " M1_HIGH_PRIORITY ,Master High Priority" "Low priority,High priority"
|
|
bitfld.long 0x44 0. " M0_HIGH_PRIORITY ,Master High Priority" "Low priority,High priority"
|
|
group.long 0x60++0x13
|
|
line.long 0x00 "PMCR,Power Management Control Register"
|
|
bitfld.long 0x00 31. " MC ,Measure complete status bit" "On progress or idle,Measure completed"
|
|
bitfld.long 0x00 30. " EM ,Emergency interrupt state bit" "Not detected,Detected"
|
|
bitfld.long 0x00 29. " UP ,Upper_limit interrupt state bit" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " LO ,Lower_limit interrupt state bit" "Not detected,Detected"
|
|
hexmask.long.word 0x00 16.--26. 1. " REFCOUNTER ,Reference Counter Value"
|
|
bitfld.long 0x00 15. " RVEN ,Reduced Voltage Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " VSTBY ,Voltage Standby Control" "0,1,2,3"
|
|
bitfld.long 0x00 9. " DCR ,DPTC counting range" "128,256"
|
|
bitfld.long 0x00 8. " RCLKON ,DPTC Reference Clock Monitor On" "Normal operation,Always on"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DRCE3 ,DPTC reference circuit3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DRCE2 ,DPTC reference circuit2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DRCE1 ,DPTC reference circuit1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DRCE0 ,DPTC reference circuit0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " DIM ,DPTC interrupt mask" "All,Lower_limit,Upper_limit,Emergency"
|
|
bitfld.long 0x00 1. " DIE ,DPTC Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DPTEN ,DPTC enable" "Disabled,Enabled"
|
|
width 7.
|
|
line.long 0x04 "DCVR0,DPTC Comparator Value Register 0"
|
|
hexmask.long.word 0x04 21.--31. 1. " ULV ,Upper Limit"
|
|
hexmask.long.word 0x04 10.--20. 1. " LLV ,Lower Limit"
|
|
hexmask.long.word 0x04 0.--9. 1. " ELV ,Emergency Limit"
|
|
line.long 0x08 "DCVR1,DPTC Comparator Value Register 1"
|
|
hexmask.long.word 0x08 21.--31. 1. " ULV ,Upper Limit"
|
|
hexmask.long.word 0x08 10.--20. 1. " LLV ,Lower Limit"
|
|
hexmask.long.word 0x08 0.--9. 1. " ELV ,Emergency Limit"
|
|
line.long 0x0c "DCVR2,DPTC Comparator Value Register 2"
|
|
hexmask.long.word 0x0c 21.--31. 1. " ULV ,Upper Limit"
|
|
hexmask.long.word 0x0c 10.--20. 1. " LLV ,Lower Limit"
|
|
hexmask.long.word 0x0c 0.--9. 1. " ELV ,Emergency Limit"
|
|
line.long 0x10 "DCVR3,DPTC Comparator Value Register 3"
|
|
hexmask.long.word 0x10 21.--31. 1. " ULV ,Upper Limit"
|
|
hexmask.long.word 0x10 10.--20. 1. " LLV ,Lower Limit"
|
|
hexmask.long.word 0x10 0.--9. 1. " ELV ,Emergency Limit"
|
|
if ((d.l(ad:0x10027860)&0x8000)==0x8000)
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "PPCR,PMIC Pad Control Register"
|
|
bitfld.long 0x00 12.--13. " PUS1 ,PUS control of BOOT1 pad" "0,1,2,3"
|
|
bitfld.long 0x00 11. " PUE1 ,PUE control of BOOT1 pad" "0,1"
|
|
bitfld.long 0x00 9.--10. " DSE1 ,DSE control of BOOT1 pad" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 8. " OE1 ,OE control of BOOT1 pad" "0,1"
|
|
bitfld.long 0x00 4.--5. " PUS0 ,PUS control of BOOT0 pad" "0,1,2,3"
|
|
bitfld.long 0x00 3. " PUE0 ,PUE control of BOOT0 pad" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " DSE0 ,DSE control of BOOT0 pad" "0,1,2,3"
|
|
bitfld.long 0x00 0. " OE0 ,OE control of BOOT0 pad" "0,1"
|
|
else
|
|
hgroup.long 0x74++0x03
|
|
hide.long 0x00 "PPCR,PMIC Pad Control Register"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.open "GPIO (General-Purpose I/O)"
|
|
tree "Port A"
|
|
base ad:0x10015000
|
|
width 10.
|
|
group.long 0x00++0x1f
|
|
line.long 0x00 "PTA_DDIR,Data Direction Port A Register"
|
|
bitfld.long 0x00 31. " DDIR(31) ,Data Direction (31)" "Input,Output"
|
|
bitfld.long 0x00 30. " DDIR(30) ,Data Direction (30)" "Input,Output"
|
|
bitfld.long 0x00 29. " DDIR(29) ,Data Direction (29)" "Input,Output"
|
|
bitfld.long 0x00 28. " DDIR(28) ,Data Direction (28)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DDIR(27) ,Data Direction (27)" "Input,Output"
|
|
bitfld.long 0x00 26. " DDIR(26) ,Data Direction (26)" "Input,Output"
|
|
bitfld.long 0x00 25. " DDIR(25) ,Data Direction (25)" "Input,Output"
|
|
bitfld.long 0x00 24. " DDIR(24) ,Data Direction (24)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DDIR(23) ,Data Direction (23)" "Input,Output"
|
|
bitfld.long 0x00 22. " DDIR(22) ,Data Direction (22)" "Input,Output"
|
|
bitfld.long 0x00 21. " DDIR(21) ,Data Direction (21)" "Input,Output"
|
|
bitfld.long 0x00 20. " DDIR(20) ,Data Direction (20)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DDIR(19) ,Data Direction (19)" "Input,Output"
|
|
bitfld.long 0x00 18. " DDIR(18) ,Data Direction (18)" "Input,Output"
|
|
bitfld.long 0x00 17. " DDIR(17) ,Data Direction (17)" "Input,Output"
|
|
bitfld.long 0x00 16. " DDIR(16) ,Data Direction (16)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DDIR(15) ,Data Direction (15)" "Input,Output"
|
|
bitfld.long 0x00 14. " DDIR(14) ,Data Direction (14)" "Input,Output"
|
|
bitfld.long 0x00 13. " DDIR(13) ,Data Direction (13)" "Input,Output"
|
|
bitfld.long 0x00 12. " DDIR(12) ,Data Direction (12)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DDIR(11) ,Data Direction (11)" "Input,Output"
|
|
bitfld.long 0x00 10. " DDIR(10) ,Data Direction (10)" "Input,Output"
|
|
bitfld.long 0x00 9. " DDIR(9) ,Data Direction (9)" "Input,Output"
|
|
bitfld.long 0x00 8. " DDIR(8) ,Data Direction (8)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DDIR(7) ,Data Direction (7)" "Input,Output"
|
|
bitfld.long 0x00 6. " DDIR(6) ,Data Direction (6)" "Input,Output"
|
|
bitfld.long 0x00 5. " DDIR(5) ,Data Direction (5)" "Input,Output"
|
|
bitfld.long 0x00 4. " DDIR(4) ,Data Direction (4)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DDIR(3) ,Data Direction (3)" "Input,Output"
|
|
bitfld.long 0x00 2. " DDIR(2) ,Data Direction (2)" "Input,Output"
|
|
bitfld.long 0x00 1. " DDIR(1) ,Data Direction (1)" "Input,Output"
|
|
bitfld.long 0x00 0. " DDIR(0) ,Data Direction (0)" "Input,Output"
|
|
line.long 0x04 "PTA_OCR1,Output Configuration Register 1"
|
|
bitfld.long 0x04 30.--31. " OCR1(15) ,Output Configuration (15)" "Input A_IN[15],Input B_IN[15],Input C_IN[15],Data [15]"
|
|
bitfld.long 0x04 28.--29. " OCR1(14) ,Output Configuration (14)" "Input A_IN[14],Input B_IN[14],Input C_IN[14],Data [14]"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " OCR1(13) ,Output Configuration (13)" "Input A_IN[13],Input B_IN[13],Input C_IN[13],Data [13]"
|
|
bitfld.long 0x04 24.--25. " OCR1(12) ,Output Configuration (12)" "Input A_IN[12],Input B_IN[12],Input C_IN[12],Data [12]"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " OCR1(11) ,Output Configuration (11)" "Input A_IN[11],Input B_IN[11],Input C_IN[11],Data [11]"
|
|
bitfld.long 0x04 20.--21. " OCR1(10) ,Output Configuration (10)" "Input A_IN[10],Input B_IN[10],Input C_IN[10],Data [10]"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " OCR1(9) ,Output Configuration (9)" "Input A_IN[9],Input B_IN[9],Input C_IN[9],Data [9]"
|
|
bitfld.long 0x04 16.--17. " OCR1(8) ,Output Configuration (8)" "Input A_IN[8],Input B_IN[8],Input C_IN[8],Data [8]"
|
|
textline " "
|
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bitfld.long 0x04 14.--15. " OCR1(7) ,Output Configuration (7)" "Input A_IN[7],Input B_IN[7],Input C_IN[7],Data [7]"
|
|
bitfld.long 0x04 12.--13. " OCR1(6) ,Output Configuration (6)" "Input A_IN[6],Input B_IN[6],Input C_IN[6],Data [6]"
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " OCR1(5) ,Output Configuration (5)" "Input A_IN[5],Input B_IN[5],Input C_IN[5],Data [5]"
|
|
bitfld.long 0x04 8.--9. " OCR1(4) ,Output Configuration (4)" "Input A_IN[4],Input B_IN[4],Input C_IN[4],Data [4]"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " OCR1(3) ,Output Configuration (3)" "Input A_IN[3],Input B_IN[3],Input C_IN[3],Data [3]"
|
|
bitfld.long 0x04 4.--5. " OCR1(2) ,Output Configuration (2)" "Input A_IN[2],Input B_IN[2],Input C_IN[2],Data [2]"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " OCR1(1) ,Output Configuration (1)" "Input A_IN[1],Input B_IN[1],Input C_IN[1],Data [1]"
|
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bitfld.long 0x04 0.--1. " OCR1(0) ,Output Configuration (0)" "Input A_IN[0],Input B_IN[0],Input C_IN[0],Data [0]"
|
|
line.long 0x08 "PTA_OCR2,Output Configuration Register 2"
|
|
bitfld.long 0x08 30.--31. " OCR2(31) ,Output Configuration (31)" "Input A_IN[31],Input B_IN[31],Input C_IN[31],Data [31]"
|
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bitfld.long 0x08 28.--29. " OCR2(30) ,Output Configuration (30)" "Input A_IN[30],Input B_IN[30],Input C_IN[30],Data [30]"
|
|
textline " "
|
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bitfld.long 0x08 26.--27. " OCR2(29) ,Output Configuration (29)" "Input A_IN[29],Input B_IN[29],Input C_IN[29],Data [29]"
|
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bitfld.long 0x08 24.--25. " OCR2(28) ,Output Configuration (28)" "Input A_IN[28],Input B_IN[28],Input C_IN[28],Data [28]"
|
|
textline " "
|
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bitfld.long 0x08 22.--23. " OCR2(27) ,Output Configuration (27)" "Input A_IN[27],Input B_IN[27],Input C_IN[27],Data [27]"
|
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bitfld.long 0x08 20.--21. " OCR2(26) ,Output Configuration (26)" "Input A_IN[26],Input B_IN[26],Input C_IN[26],Data [26]"
|
|
textline " "
|
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bitfld.long 0x08 18.--19. " OCR2(25) ,Output Configuration (25)" "Input A_IN[25],Input B_IN[25],Input C_IN[25],Data [25]"
|
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bitfld.long 0x08 16.--17. " OCR2(24) ,Output Configuration (24)" "Input A_IN[24],Input B_IN[24],Input C_IN[24],Data [24]"
|
|
textline " "
|
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bitfld.long 0x08 14.--15. " OCR2(23) ,Output Configuration (23)" "Input A_IN[23],Input B_IN[23],Input C_IN[23],Data [23]"
|
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bitfld.long 0x08 12.--13. " OCR2(22) ,Output Configuration (22)" "Input A_IN[22],Input B_IN[22],Input C_IN[22],Data [22]"
|
|
textline " "
|
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bitfld.long 0x08 10.--11. " OCR2(21) ,Output Configuration (21)" "Input A_IN[21],Input B_IN[21],Input C_IN[21],Data [21]"
|
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bitfld.long 0x08 8.--9. " OCR2(20) ,Output Configuration (20)" "Input A_IN[20],Input B_IN[20],Input C_IN[20],Data [20]"
|
|
textline " "
|
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bitfld.long 0x08 6.--7. " OCR2(19) ,Output Configuration (19)" "Input A_IN[19],Input B_IN[19],Input C_IN[19],Data [19]"
|
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bitfld.long 0x08 4.--5. " OCR2(18) ,Output Configuration (18)" "Input A_IN[18],Input B_IN[18],Input C_IN[18],Data [18]"
|
|
textline " "
|
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bitfld.long 0x08 2.--3. " OCR2(17) ,Output Configuration (17)" "Input A_IN[17],Input B_IN[17],Input C_IN[17],Data [17]"
|
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bitfld.long 0x08 0.--1. " OCR2(16) ,Output Configuration (16)" "Input A_IN[16],Input B_IN[16],Input C_IN[16],Data [16]"
|
|
width 13.
|
|
line.long 0x0c "PTA_ICONFA1,Input Configuration Register A1"
|
|
bitfld.long 0x0c 30.--31. " ICONFA1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
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bitfld.long 0x0c 28.--29. " ICONFA1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
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bitfld.long 0x0c 26.--27. " ICONFA1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x0c 24.--25. " ICONFA1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
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bitfld.long 0x0c 22.--23. " ICONFA1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x0c 20.--21. " ICONFA1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 18.--19. " ICONFA1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x0c 16.--17. " ICONFA1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " ICONFA1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x0c 12.--13. " ICONFA1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 10.--11. " ICONFA1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x0c 8.--9. " ICONFA1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 6.--7. " ICONFA1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x0c 4.--5. " ICONFA1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 2.--3. " ICONFA1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x0c 0.--1. " ICONFA1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x10 "PTA_ICONFA2,Input Configuration Register A2"
|
|
bitfld.long 0x10 30.--31. " ICONFA2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x10 28.--29. " ICONFA2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 26.--27. " ICONFA2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x10 24.--25. " ICONFA2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ICONFA2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x10 20.--21. " ICONFA2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " ICONFA2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x10 16.--17. " ICONFA2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " ICONFA2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x10 12.--13. " ICONFA2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 10.--11. " ICONFA2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x10 8.--9. " ICONFA2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ICONFA2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x10 4.--5. " ICONFA2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " ICONFA2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x10 0.--1. " ICONFA2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
line.long 0x14 "PTA_ICONFB1,Input Configuration Register B1"
|
|
bitfld.long 0x14 30.--31. " ICONFB1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x14 28.--29. " ICONFB1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 26.--27. " ICONFB1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x14 24.--25. " ICONFB1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 22.--23. " ICONFB1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x14 20.--21. " ICONFB1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " ICONFB1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x14 16.--17. " ICONFB1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " ICONFB1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x14 12.--13. " ICONFB1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 10.--11. " ICONFB1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x14 8.--9. " ICONFB1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " ICONFB1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x14 4.--5. " ICONFB1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " ICONFB1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x14 0.--1. " ICONFB1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x18 "PTA_ICONFB2,Input Configuration Register B2"
|
|
bitfld.long 0x18 30.--31. " ICONFB2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x18 28.--29. " ICONFB2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 26.--27. " ICONFB2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x18 24.--25. " ICONFB2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 22.--23. " ICONFB2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x18 20.--21. " ICONFB2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " ICONFB2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x18 16.--17. " ICONFB2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " ICONFB2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x18 12.--13. " ICONFB2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 10.--11. " ICONFB2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x18 8.--9. " ICONFB2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " ICONFB2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x18 4.--5. " ICONFB2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " ICONFB2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x18 0.--1. " ICONFB2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
width 8.
|
|
line.long 0x1c "PTA_DR,Data Register"
|
|
bitfld.long 0x1c 31. " DR(31) ,Data Register 31" "Low,High"
|
|
bitfld.long 0x1c 30. " DR(30) ,Data Register 30" "Low,High"
|
|
bitfld.long 0x1c 29. " DR(29) ,Data Register 29" "Low,High"
|
|
bitfld.long 0x1c 28. " DR(28) ,Data Register 28" "Low,High"
|
|
bitfld.long 0x1c 27. " DR(27) ,Data Register 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 26. " DR(26) ,Data Register 26" "Low,High"
|
|
bitfld.long 0x1c 25. " DR(25) ,Data Register 25" "Low,High"
|
|
bitfld.long 0x1c 24. " DR(24) ,Data Register 24" "Low,High"
|
|
bitfld.long 0x1c 23. " DR(23) ,Data Register 23" "Low,High"
|
|
bitfld.long 0x1c 22. " DR(22) ,Data Register 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 21. " DR(21) ,Data Register 21" "Low,High"
|
|
bitfld.long 0x1c 20. " DR(20) ,Data Register 20" "Low,High"
|
|
bitfld.long 0x1c 19. " DR(19) ,Data Register 19" "Low,High"
|
|
bitfld.long 0x1c 18. " DR(18) ,Data Register 18" "Low,High"
|
|
bitfld.long 0x1c 17. " DR(17) ,Data Register 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 16. " DR(16) ,Data Register 16" "Low,High"
|
|
bitfld.long 0x1c 15. " DR(15) ,Data Register 15" "Low,High"
|
|
bitfld.long 0x1c 14. " DR(14) ,Data Register 14" "Low,High"
|
|
bitfld.long 0x1c 13. " DR(13) ,Data Register 13" "Low,High"
|
|
bitfld.long 0x1c 12. " DR(12) ,Data Register 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 11. " DR(11) ,Data Register 11" "Low,High"
|
|
bitfld.long 0x1c 10. " DR(10) ,Data Register 10" "Low,High"
|
|
bitfld.long 0x1c 9. " DR(9) ,Data Register 9" "Low,High"
|
|
bitfld.long 0x1c 8. " DR(8) ,Data Register 8" "Low,High"
|
|
bitfld.long 0x1c 7. " DR(7) ,Data Register 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 6. " DR(6) ,Data Register 6" "Low,High"
|
|
bitfld.long 0x1c 5. " DR(5) ,Data Register 5" "Low,High"
|
|
bitfld.long 0x1c 4. " DR(4) ,Data Register 4" "Low,High"
|
|
bitfld.long 0x1c 3. " DR(3) ,Data Register 3" "Low,High"
|
|
bitfld.long 0x1c 2. " DR(2) ,Data Register 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " DR(1) ,Data Register 1" "Low,High"
|
|
bitfld.long 0x1c 0. " DR(0) ,Data Register 0" "Low,High"
|
|
width 10.
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PTA_GIUS,GPIO In Use Register A"
|
|
bitfld.long 0x00 31. " GIUS(31) ,GPIO In Use Pin 31" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 30. " GIUS(30) ,GPIO In Use Pin 30" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 29. " GIUS(29) ,GPIO In Use Pin 29" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GIUS(28) ,GPIO In Use Pin 28" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 27. " GIUS(27) ,GPIO In Use Pin 27" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 26. " GIUS(26) ,GPIO In Use Pin 26" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GIUS(25) ,GPIO In Use Pin 25" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 24. " GIUS(24) ,GPIO In Use Pin 24" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 23. " GIUS(23) ,GPIO In Use Pin 23" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GIUS(22) ,GPIO In Use Pin 22" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 21. " GIUS(21) ,GPIO In Use Pin 21" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 20. " GIUS(20) ,GPIO In Use Pin 20" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GIUS(19) ,GPIO In Use Pin 19" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 18. " GIUS(18) ,GPIO In Use Pin 18" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 17. " GIUS(17) ,GPIO In Use Pin 17" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GIUS(16) ,GPIO In Use Pin 16" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 15. " GIUS(15) ,GPIO In Use Pin 15" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 14. " GIUS(14) ,GPIO In Use Pin 14" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GIUS(13) ,GPIO In Use Pin 13" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 12. " GIUS(12) ,GPIO In Use Pin 12" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 11. " GIUS(11) ,GPIO In Use Pin 11" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GIUS(10) ,GPIO In Use Pin 10" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 9. " GIUS(9) ,GPIO In Use Pin 9" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 8. " GIUS(8) ,GPIO In Use Pin 8" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GIUS(7) ,GPIO In Use Pin 7" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 6. " GIUS(6) ,GPIO In Use Pin 6" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 5. " GIUS(5) ,GPIO In Use Pin 5" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GIUS(4) ,GPIO In Use Pin 4" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 3. " GIUS(3) ,GPIO In Use Pin 3" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 2. " GIUS(2) ,GPIO In Use Pin 2" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GIUS(1) ,GPIO In Use Pin 1" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 0. " GIUS(0) ,GPIO In Use Pin 0" "Multiplexed,GPIO"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PTA_SSR,Sample Status Register"
|
|
bitfld.long 0x00 31. " SSR31 ,Sample Status Pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " SSR30 ,Sample Status Pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " SSR29 ,Sample Status Pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " SSR28 ,Sample Status Pin 28" "Low,High"
|
|
bitfld.long 0x00 27. " SSR27 ,Sample Status Pin 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SSR26 ,Sample Status Pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " SSR25 ,Sample Status Pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " SSR24 ,Sample Status Pin 24" "Low,High"
|
|
bitfld.long 0x00 23. " SSR23 ,Sample Status Pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " SSR22 ,Sample Status Pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SSR21 ,Sample Status Pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " SSR20 ,Sample Status Pin 20" "Low,High"
|
|
bitfld.long 0x00 19. " SSR19 ,Sample Status Pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " SSR18 ,Sample Status Pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " SSR17 ,Sample Status Pin 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSR16 ,Sample Status Pin 16" "Low,High"
|
|
bitfld.long 0x00 15. " SSR15 ,Sample Status Pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " SSR14 ,Sample Status Pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " SSR13 ,Sample Status Pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " SSR12 ,Sample Status Pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SSR11 ,Sample Status Pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " SSR10 ,Sample Status Pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " SSR9 ,Sample Status Pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " SSR8 ,Sample Status Pin 8" "Low,High"
|
|
bitfld.long 0x00 7. " SSR7 ,Sample Status Pin 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SSR6 ,Sample Status Pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " SSR5 ,Sample Status Pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " SSR4 ,Sample Status Pin 4" "Low,High"
|
|
bitfld.long 0x00 3. " SSR3 ,Sample Status Pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " SSR2 ,Sample Status Pin 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SSR1 ,Sample Status Pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " SSR0 ,Sample Status Pin 0" "Low,High"
|
|
group.long 0x28++0x1b
|
|
line.long 0x00 "PTA_ICR1,Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR1(15) ,Interrupt Configuration 15" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 28.--29. " ICR1(14) ,Interrupt Configuration 14" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 26.--27. " ICR1(13) ,Interrupt Configuration 13" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1(12) ,Interrupt Configuration 12" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 22.--23. " ICR1(11) ,Interrupt Configuration 11" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 20.--21. " ICR1(10) ,Interrupt Configuration 10" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1(9) ,Interrupt Configuration 9" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 16.--17. " ICR1(8) ,Interrupt Configuration 8" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 14.--15. " ICR1(7) ,Interrupt Configuration 7" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1(6) ,Interrupt Configuration 6" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 10.--11. " ICR1(5) ,Interrupt Configuration 5" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 8.--9. " ICR1(4) ,Interrupt Configuration 4" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1(3) ,Interrupt Configuration 3" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 4.--5. " ICR1(2) ,Interrupt Configuration 2" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 2.--3. " ICR1(1) ,Interrupt Configuration 1" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1(0) ,Interrupt Configuration 0" "Rising edge,Falling edge,High level,Low level"
|
|
line.long 0x04 "PTA_ICR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x04 30.--31. " ICR2(31) ,Interrupt Configuration 31" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 28.--29. " ICR2(30) ,Interrupt Configuration 30" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 26.--27. " ICR2(29) ,Interrupt Configuration 29" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2(28) ,Interrupt Configuration 28" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 22.--23. " ICR2(27) ,Interrupt Configuration 27" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 20.--21. " ICR2(26) ,Interrupt Configuration 26" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2(25) ,Interrupt Configuration 25" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 16.--17. " ICR2(24) ,Interrupt Configuration 24" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 14.--15. " ICR2(23) ,Interrupt Configuration 23" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2(22) ,Interrupt Configuration 22" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 10.--11. " ICR2(21) ,Interrupt Configuration 21" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 8.--9. " ICR2(20) ,Interrupt Configuration 20" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2(19) ,Interrupt Configuration 19" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 4.--5. " ICR2(18) ,Interrupt Configuration 18" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 2.--3. " ICR2(17) ,Interrupt Configuration 17" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2(16) ,Interrupt Configuration 16" "Rising edge,Falling edge,High level,Low level"
|
|
width 9.
|
|
line.long 0x08 "PTA_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR(31) ,Interrupt Mask 31" "Masked,Not masked"
|
|
bitfld.long 0x08 30. " IMR(30) ,Interrupt Mask 30" "Masked,Not masked"
|
|
bitfld.long 0x08 29. " IMR(29) ,Interrupt Mask 29" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR(28) ,Interrupt Mask 28" "Masked,Not masked"
|
|
bitfld.long 0x08 27. " IMR(27) ,Interrupt Mask 27" "Masked,Not masked"
|
|
bitfld.long 0x08 26. " IMR(26) ,Interrupt Mask 26" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR(25) ,Interrupt Mask 25" "Masked,Not masked"
|
|
bitfld.long 0x08 24. " IMR(24) ,Interrupt Mask 24" "Masked,Not masked"
|
|
bitfld.long 0x08 23. " IMR(23) ,Interrupt Mask 23" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR(22) ,Interrupt Mask 22" "Masked,Not masked"
|
|
bitfld.long 0x08 21. " IMR(21) ,Interrupt Mask 21" "Masked,Not masked"
|
|
bitfld.long 0x08 20. " IMR(20) ,Interrupt Mask 20" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR(19) ,Interrupt Mask 19" "Masked,Not masked"
|
|
bitfld.long 0x08 18. " IMR(18) ,Interrupt Mask 18" "Masked,Not masked"
|
|
bitfld.long 0x08 17. " IMR(17) ,Interrupt Mask 17" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR(16) ,Interrupt Mask 16" "Masked,Not masked"
|
|
bitfld.long 0x08 15. " IMR(15) ,Interrupt Mask 15" "Masked,Not masked"
|
|
bitfld.long 0x08 14. " IMR(14) ,Interrupt Mask 14" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR(13) ,Interrupt Mask 13" "Masked,Not masked"
|
|
bitfld.long 0x08 12. " IMR(12) ,Interrupt Mask 12" "Masked,Not masked"
|
|
bitfld.long 0x08 11. " IMR(11) ,Interrupt Mask 11" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR(10) ,Interrupt Mask 10" "Masked,Not masked"
|
|
bitfld.long 0x08 9. " IMR(9) ,Interrupt Mask 9" "Masked,Not masked"
|
|
bitfld.long 0x08 8. " IMR(8) ,Interrupt Mask 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR(7) ,Interrupt Mask 7" "Masked,Not masked"
|
|
bitfld.long 0x08 6. " IMR(6) ,Interrupt Mask 6" "Masked,Not masked"
|
|
bitfld.long 0x08 5. " IMR(5) ,Interrupt Mask 5" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR(4) ,Interrupt Mask 4" "Masked,Not masked"
|
|
bitfld.long 0x08 3. " IMR(3) ,Interrupt Mask 3" "Masked,Not masked"
|
|
bitfld.long 0x08 2. " IMR(2) ,Interrupt Mask 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR(1) ,Interrupt Mask 1" "Masked,Not masked"
|
|
bitfld.long 0x08 0. " IMR(0) ,Interrupt Mask 0" "Masked,Not masked"
|
|
line.long 0x0c "PTA_ISR,Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " ISR(31) ,Interrupt Status 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 30. " ISR(30) ,Interrupt Status 30" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 29. " ISR(29) ,Interrupt Status 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 28. " ISR(28) ,Interrupt Status 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 27. " ISR(27) ,Interrupt Status 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 26. " ISR(26) ,Interrupt Status 26" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " ISR(25) ,Interrupt Status 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 24. " ISR(24) ,Interrupt Status 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 23. " ISR(23) ,Interrupt Status 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 22. " ISR(22) ,Interrupt Status 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 21. " ISR(21) ,Interrupt Status 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 20. " ISR(20) ,Interrupt Status 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " ISR(19) ,Interrupt Status 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 18. " ISR(18) ,Interrupt Status 18" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 17. " ISR(17) ,Interrupt Status 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 16. " ISR(16) ,Interrupt Status 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 15. " ISR(15) ,Interrupt Status 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 14. " ISR(14) ,Interrupt Status 14" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " ISR(13) ,Interrupt Status 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 12. " ISR(12) ,Interrupt Status 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 11. " ISR(11) ,Interrupt Status 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 10. " ISR(10) ,Interrupt Status 10" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 9. " ISR(9) ,Interrupt Status 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 8. " ISR(8) ,Interrupt Status 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " ISR(7) ,Interrupt Status 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 6. " ISR(6) ,Interrupt Status 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 5. " ISR(5) ,Interrupt Status 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 4. " ISR(4) ,Interrupt Status 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 3. " ISR(3) ,Interrupt Status 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 2. " ISR(2) ,Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " ISR(1) ,Interrupt Status 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 0. " ISR(0) ,Interrupt Status 0" "No interrupt,Interrupt"
|
|
line.long 0x10 "PTA_GPR,General Purpose Register"
|
|
bitfld.long 0x10 31. " GPR(31) ,General Purpose 31" "Primary,Alternate"
|
|
bitfld.long 0x10 30. " GPR(30) ,General Purpose 30" "Primary,Alternate"
|
|
bitfld.long 0x10 29. " GPR(29) ,General Purpose 29" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 28. " GPR(28) ,General Purpose 28" "Primary,Alternate"
|
|
bitfld.long 0x10 27. " GPR(27) ,General Purpose 27" "Primary,Alternate"
|
|
bitfld.long 0x10 26. " GPR(26) ,General Purpose 26" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 25. " GPR(25) ,General Purpose 25" "Primary,Alternate"
|
|
bitfld.long 0x10 24. " GPR(24) ,General Purpose 24" "Primary,Alternate"
|
|
bitfld.long 0x10 23. " GPR(23) ,General Purpose 23" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 22. " GPR(22) ,General Purpose 22" "Primary,Alternate"
|
|
bitfld.long 0x10 21. " GPR(21) ,General Purpose 21" "Primary,Alternate"
|
|
bitfld.long 0x10 20. " GPR(20) ,General Purpose 20" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 19. " GPR(19) ,General Purpose 19" "Primary,Alternate"
|
|
bitfld.long 0x10 18. " GPR(18) ,General Purpose 18" "Primary,Alternate"
|
|
bitfld.long 0x10 17. " GPR(17) ,General Purpose 17" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 16. " GPR(16) ,General Purpose 16" "Primary,Alternate"
|
|
bitfld.long 0x10 15. " GPR(15) ,General Purpose 15" "Primary,Alternate"
|
|
bitfld.long 0x10 14. " GPR(14) ,General Purpose 14" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 13. " GPR(13) ,General Purpose 13" "Primary,Alternate"
|
|
bitfld.long 0x10 12. " GPR(12) ,General Purpose 12" "Primary,Alternate"
|
|
bitfld.long 0x10 11. " GPR(11) ,General Purpose 11" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 10. " GPR(10) ,General Purpose 10" "Primary,Alternate"
|
|
bitfld.long 0x10 9. " GPR(9) ,General Purpose 9" "Primary,Alternate"
|
|
bitfld.long 0x10 8. " GPR(8) ,General Purpose 8" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 7. " GPR(7) ,General Purpose 7" "Primary,Alternate"
|
|
bitfld.long 0x10 6. " GPR(6) ,General Purpose 6" "Primary,Alternate"
|
|
bitfld.long 0x10 5. " GPR(5) ,General Purpose 5" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 4. " GPR(4) ,General Purpose 4" "Primary,Alternate"
|
|
bitfld.long 0x10 3. " GPR(3) ,General Purpose 3" "Primary,Alternate"
|
|
bitfld.long 0x10 2. " GPR(2) ,General Purpose 2" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 1. " GPR(1) ,General Purpose 1" "Primary,Alternate"
|
|
bitfld.long 0x10 0. " GPR(0) ,General Purpose 0" "Primary,Alternate"
|
|
line.long 0x14 "PTA_SWR,Software Reset Register"
|
|
bitfld.long 0x14 0. " SWR ,Software Reset" "No effect,Reset"
|
|
line.long 0x18 "PTA_PUEN,Pull-Up Enable Register"
|
|
bitfld.long 0x18 31. " PUEN(31) ,Pull_Up Enable 31" "Tri-state,Pull up"
|
|
bitfld.long 0x18 30. " PUEN(30) ,Pull_Up Enable 30" "Tri-state,Pull up"
|
|
bitfld.long 0x18 29. " PUEN(29) ,Pull_Up Enable 29" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PUEN(28) ,Pull_Up Enable 28" "Tri-state,Pull up"
|
|
bitfld.long 0x18 27. " PUEN(27) ,Pull_Up Enable 27" "Tri-state,Pull up"
|
|
bitfld.long 0x18 26. " PUEN(26) ,Pull_Up Enable 26" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 25. " PUEN(25) ,Pull_Up Enable 25" "Tri-state,Pull up"
|
|
bitfld.long 0x18 24. " PUEN(24) ,Pull_Up Enable 24" "Tri-state,Pull up"
|
|
bitfld.long 0x18 23. " PUEN(23) ,Pull_Up Enable 23" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 22. " PUEN(22) ,Pull_Up Enable 22" "Tri-state,Pull up"
|
|
bitfld.long 0x18 21. " PUEN(21) ,Pull_Up Enable 21" "Tri-state,Pull up"
|
|
bitfld.long 0x18 20. " PUEN(20) ,Pull_Up Enable 20" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 19. " PUEN(19) ,Pull_Up Enable 19" "Tri-state,Pull up"
|
|
bitfld.long 0x18 18. " PUEN(18) ,Pull_Up Enable 18" "Tri-state,Pull up"
|
|
bitfld.long 0x18 17. " PUEN(17) ,Pull_Up Enable 17" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 16. " PUEN(16) ,Pull_Up Enable 16" "Tri-state,Pull up"
|
|
bitfld.long 0x18 15. " PUEN(15) ,Pull_Up Enable 15" "Tri-state,Pull up"
|
|
bitfld.long 0x18 14. " PUEN(14) ,Pull_Up Enable 14" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 13. " PUEN(13) ,Pull_Up Enable 13" "Tri-state,Pull up"
|
|
bitfld.long 0x18 12. " PUEN(12) ,Pull_Up Enable 12" "Tri-state,Pull up"
|
|
bitfld.long 0x18 11. " PUEN(11) ,Pull_Up Enable 11" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 10. " PUEN(10) ,Pull_Up Enable 10" "Tri-state,Pull up"
|
|
bitfld.long 0x18 9. " PUEN(9) ,Pull_Up Enable 9" "Tri-state,Pull up"
|
|
bitfld.long 0x18 8. " PUEN(8) ,Pull_Up Enable 8" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 7. " PUEN(7) ,Pull_Up Enable 7" "Tri-state,Pull up"
|
|
bitfld.long 0x18 6. " PUEN(6) ,Pull_Up Enable 6" "Tri-state,Pull up"
|
|
bitfld.long 0x18 5. " PUEN(5) ,Pull_Up Enable 5" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 4. " PUEN(4) ,Pull_Up Enable 4" "Tri-state,Pull up"
|
|
bitfld.long 0x18 3. " PUEN(3) ,Pull_Up Enable 3" "Tri-state,Pull up"
|
|
bitfld.long 0x18 2. " PUEN(2) ,Pull_Up Enable 2" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 1. " PUEN(1) ,Pull_Up Enable 1" "Tri-state,Pull up"
|
|
bitfld.long 0x18 0. " PUEN(0) ,Pull_Up Enable 0" "Tri-state,Pull up"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port B"
|
|
base ad:0x10015100
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width 10.
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group.long 0x00++0x1f
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line.long 0x00 "PTB_DDIR,Data Direction Port A Register"
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bitfld.long 0x00 31. " DDIR(31) ,Data Direction (31)" "Input,Output"
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bitfld.long 0x00 30. " DDIR(30) ,Data Direction (30)" "Input,Output"
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bitfld.long 0x00 29. " DDIR(29) ,Data Direction (29)" "Input,Output"
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bitfld.long 0x00 28. " DDIR(28) ,Data Direction (28)" "Input,Output"
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textline " "
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bitfld.long 0x00 27. " DDIR(27) ,Data Direction (27)" "Input,Output"
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bitfld.long 0x00 26. " DDIR(26) ,Data Direction (26)" "Input,Output"
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bitfld.long 0x00 25. " DDIR(25) ,Data Direction (25)" "Input,Output"
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bitfld.long 0x00 24. " DDIR(24) ,Data Direction (24)" "Input,Output"
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textline " "
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bitfld.long 0x00 23. " DDIR(23) ,Data Direction (23)" "Input,Output"
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bitfld.long 0x00 22. " DDIR(22) ,Data Direction (22)" "Input,Output"
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bitfld.long 0x00 21. " DDIR(21) ,Data Direction (21)" "Input,Output"
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bitfld.long 0x00 20. " DDIR(20) ,Data Direction (20)" "Input,Output"
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textline " "
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bitfld.long 0x00 19. " DDIR(19) ,Data Direction (19)" "Input,Output"
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bitfld.long 0x00 18. " DDIR(18) ,Data Direction (18)" "Input,Output"
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bitfld.long 0x00 17. " DDIR(17) ,Data Direction (17)" "Input,Output"
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bitfld.long 0x00 16. " DDIR(16) ,Data Direction (16)" "Input,Output"
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textline " "
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bitfld.long 0x00 15. " DDIR(15) ,Data Direction (15)" "Input,Output"
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bitfld.long 0x00 14. " DDIR(14) ,Data Direction (14)" "Input,Output"
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bitfld.long 0x00 13. " DDIR(13) ,Data Direction (13)" "Input,Output"
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bitfld.long 0x00 12. " DDIR(12) ,Data Direction (12)" "Input,Output"
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textline " "
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bitfld.long 0x00 11. " DDIR(11) ,Data Direction (11)" "Input,Output"
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bitfld.long 0x00 10. " DDIR(10) ,Data Direction (10)" "Input,Output"
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bitfld.long 0x00 9. " DDIR(9) ,Data Direction (9)" "Input,Output"
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bitfld.long 0x00 8. " DDIR(8) ,Data Direction (8)" "Input,Output"
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textline " "
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bitfld.long 0x00 7. " DDIR(7) ,Data Direction (7)" "Input,Output"
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bitfld.long 0x00 6. " DDIR(6) ,Data Direction (6)" "Input,Output"
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bitfld.long 0x00 5. " DDIR(5) ,Data Direction (5)" "Input,Output"
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bitfld.long 0x00 4. " DDIR(4) ,Data Direction (4)" "Input,Output"
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textline " "
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bitfld.long 0x00 3. " DDIR(3) ,Data Direction (3)" "Input,Output"
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bitfld.long 0x00 2. " DDIR(2) ,Data Direction (2)" "Input,Output"
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bitfld.long 0x00 1. " DDIR(1) ,Data Direction (1)" "Input,Output"
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bitfld.long 0x00 0. " DDIR(0) ,Data Direction (0)" "Input,Output"
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line.long 0x04 "PTB_OCR1,Output Configuration Register 1"
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bitfld.long 0x04 30.--31. " OCR1(15) ,Output Configuration (15)" "Input A_IN[15],Input B_IN[15],Input C_IN[15],Data [15]"
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bitfld.long 0x04 28.--29. " OCR1(14) ,Output Configuration (14)" "Input A_IN[14],Input B_IN[14],Input C_IN[14],Data [14]"
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textline " "
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bitfld.long 0x04 26.--27. " OCR1(13) ,Output Configuration (13)" "Input A_IN[13],Input B_IN[13],Input C_IN[13],Data [13]"
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bitfld.long 0x04 24.--25. " OCR1(12) ,Output Configuration (12)" "Input A_IN[12],Input B_IN[12],Input C_IN[12],Data [12]"
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textline " "
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bitfld.long 0x04 22.--23. " OCR1(11) ,Output Configuration (11)" "Input A_IN[11],Input B_IN[11],Input C_IN[11],Data [11]"
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bitfld.long 0x04 20.--21. " OCR1(10) ,Output Configuration (10)" "Input A_IN[10],Input B_IN[10],Input C_IN[10],Data [10]"
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textline " "
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bitfld.long 0x04 18.--19. " OCR1(9) ,Output Configuration (9)" "Input A_IN[9],Input B_IN[9],Input C_IN[9],Data [9]"
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bitfld.long 0x04 16.--17. " OCR1(8) ,Output Configuration (8)" "Input A_IN[8],Input B_IN[8],Input C_IN[8],Data [8]"
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textline " "
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bitfld.long 0x04 14.--15. " OCR1(7) ,Output Configuration (7)" "Input A_IN[7],Input B_IN[7],Input C_IN[7],Data [7]"
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bitfld.long 0x04 12.--13. " OCR1(6) ,Output Configuration (6)" "Input A_IN[6],Input B_IN[6],Input C_IN[6],Data [6]"
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textline " "
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bitfld.long 0x04 10.--11. " OCR1(5) ,Output Configuration (5)" "Input A_IN[5],Input B_IN[5],Input C_IN[5],Data [5]"
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bitfld.long 0x04 8.--9. " OCR1(4) ,Output Configuration (4)" "Input A_IN[4],Input B_IN[4],Input C_IN[4],Data [4]"
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textline " "
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bitfld.long 0x04 6.--7. " OCR1(3) ,Output Configuration (3)" "Input A_IN[3],Input B_IN[3],Input C_IN[3],Data [3]"
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bitfld.long 0x04 4.--5. " OCR1(2) ,Output Configuration (2)" "Input A_IN[2],Input B_IN[2],Input C_IN[2],Data [2]"
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textline " "
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bitfld.long 0x04 2.--3. " OCR1(1) ,Output Configuration (1)" "Input A_IN[1],Input B_IN[1],Input C_IN[1],Data [1]"
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bitfld.long 0x04 0.--1. " OCR1(0) ,Output Configuration (0)" "Input A_IN[0],Input B_IN[0],Input C_IN[0],Data [0]"
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line.long 0x08 "PTB_OCR2,Output Configuration Register 2"
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bitfld.long 0x08 30.--31. " OCR2(31) ,Output Configuration (31)" "Input A_IN[31],Input B_IN[31],Input C_IN[31],Data [31]"
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bitfld.long 0x08 28.--29. " OCR2(30) ,Output Configuration (30)" "Input A_IN[30],Input B_IN[30],Input C_IN[30],Data [30]"
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textline " "
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bitfld.long 0x08 26.--27. " OCR2(29) ,Output Configuration (29)" "Input A_IN[29],Input B_IN[29],Input C_IN[29],Data [29]"
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bitfld.long 0x08 24.--25. " OCR2(28) ,Output Configuration (28)" "Input A_IN[28],Input B_IN[28],Input C_IN[28],Data [28]"
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textline " "
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bitfld.long 0x08 22.--23. " OCR2(27) ,Output Configuration (27)" "Input A_IN[27],Input B_IN[27],Input C_IN[27],Data [27]"
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bitfld.long 0x08 20.--21. " OCR2(26) ,Output Configuration (26)" "Input A_IN[26],Input B_IN[26],Input C_IN[26],Data [26]"
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textline " "
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bitfld.long 0x08 18.--19. " OCR2(25) ,Output Configuration (25)" "Input A_IN[25],Input B_IN[25],Input C_IN[25],Data [25]"
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bitfld.long 0x08 16.--17. " OCR2(24) ,Output Configuration (24)" "Input A_IN[24],Input B_IN[24],Input C_IN[24],Data [24]"
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textline " "
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bitfld.long 0x08 14.--15. " OCR2(23) ,Output Configuration (23)" "Input A_IN[23],Input B_IN[23],Input C_IN[23],Data [23]"
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bitfld.long 0x08 12.--13. " OCR2(22) ,Output Configuration (22)" "Input A_IN[22],Input B_IN[22],Input C_IN[22],Data [22]"
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textline " "
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bitfld.long 0x08 10.--11. " OCR2(21) ,Output Configuration (21)" "Input A_IN[21],Input B_IN[21],Input C_IN[21],Data [21]"
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bitfld.long 0x08 8.--9. " OCR2(20) ,Output Configuration (20)" "Input A_IN[20],Input B_IN[20],Input C_IN[20],Data [20]"
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textline " "
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bitfld.long 0x08 6.--7. " OCR2(19) ,Output Configuration (19)" "Input A_IN[19],Input B_IN[19],Input C_IN[19],Data [19]"
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bitfld.long 0x08 4.--5. " OCR2(18) ,Output Configuration (18)" "Input A_IN[18],Input B_IN[18],Input C_IN[18],Data [18]"
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textline " "
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bitfld.long 0x08 2.--3. " OCR2(17) ,Output Configuration (17)" "Input A_IN[17],Input B_IN[17],Input C_IN[17],Data [17]"
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bitfld.long 0x08 0.--1. " OCR2(16) ,Output Configuration (16)" "Input A_IN[16],Input B_IN[16],Input C_IN[16],Data [16]"
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width 13.
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line.long 0x0c "PTB_ICONFA1,Input Configuration Register A1"
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bitfld.long 0x0c 30.--31. " ICONFA1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
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bitfld.long 0x0c 28.--29. " ICONFA1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
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textline " "
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bitfld.long 0x0c 26.--27. " ICONFA1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
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bitfld.long 0x0c 24.--25. " ICONFA1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
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textline " "
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bitfld.long 0x0c 22.--23. " ICONFA1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
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bitfld.long 0x0c 20.--21. " ICONFA1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
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textline " "
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bitfld.long 0x0c 18.--19. " ICONFA1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
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bitfld.long 0x0c 16.--17. " ICONFA1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
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textline " "
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bitfld.long 0x0c 14.--15. " ICONFA1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
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bitfld.long 0x0c 12.--13. " ICONFA1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
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textline " "
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bitfld.long 0x0c 10.--11. " ICONFA1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
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bitfld.long 0x0c 8.--9. " ICONFA1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
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textline " "
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bitfld.long 0x0c 6.--7. " ICONFA1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
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bitfld.long 0x0c 4.--5. " ICONFA1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
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textline " "
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bitfld.long 0x0c 2.--3. " ICONFA1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
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bitfld.long 0x0c 0.--1. " ICONFA1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
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line.long 0x10 "PTB_ICONFA2,Input Configuration Register A2"
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bitfld.long 0x10 30.--31. " ICONFA2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
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bitfld.long 0x10 28.--29. " ICONFA2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
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textline " "
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bitfld.long 0x10 26.--27. " ICONFA2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
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bitfld.long 0x10 24.--25. " ICONFA2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
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textline " "
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bitfld.long 0x10 22.--23. " ICONFA2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
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bitfld.long 0x10 20.--21. " ICONFA2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
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textline " "
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bitfld.long 0x10 18.--19. " ICONFA2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
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bitfld.long 0x10 16.--17. " ICONFA2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
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textline " "
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bitfld.long 0x10 14.--15. " ICONFA2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
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bitfld.long 0x10 12.--13. " ICONFA2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
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textline " "
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bitfld.long 0x10 10.--11. " ICONFA2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
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bitfld.long 0x10 8.--9. " ICONFA2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
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textline " "
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bitfld.long 0x10 6.--7. " ICONFA2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
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bitfld.long 0x10 4.--5. " ICONFA2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
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textline " "
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bitfld.long 0x10 2.--3. " ICONFA2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
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bitfld.long 0x10 0.--1. " ICONFA2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
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line.long 0x14 "PTB_ICONFB1,Input Configuration Register B1"
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bitfld.long 0x14 30.--31. " ICONFB1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
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bitfld.long 0x14 28.--29. " ICONFB1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
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textline " "
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bitfld.long 0x14 26.--27. " ICONFB1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
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bitfld.long 0x14 24.--25. " ICONFB1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
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textline " "
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bitfld.long 0x14 22.--23. " ICONFB1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
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bitfld.long 0x14 20.--21. " ICONFB1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
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textline " "
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bitfld.long 0x14 18.--19. " ICONFB1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
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bitfld.long 0x14 16.--17. " ICONFB1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
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textline " "
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bitfld.long 0x14 14.--15. " ICONFB1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
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bitfld.long 0x14 12.--13. " ICONFB1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
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textline " "
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bitfld.long 0x14 10.--11. " ICONFB1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
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bitfld.long 0x14 8.--9. " ICONFB1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
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textline " "
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bitfld.long 0x14 6.--7. " ICONFB1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
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bitfld.long 0x14 4.--5. " ICONFB1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
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textline " "
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bitfld.long 0x14 2.--3. " ICONFB1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
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bitfld.long 0x14 0.--1. " ICONFB1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
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line.long 0x18 "PTB_ICONFB2,Input Configuration Register B2"
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bitfld.long 0x18 30.--31. " ICONFB2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
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bitfld.long 0x18 28.--29. " ICONFB2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
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textline " "
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bitfld.long 0x18 26.--27. " ICONFB2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
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bitfld.long 0x18 24.--25. " ICONFB2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
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textline " "
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bitfld.long 0x18 22.--23. " ICONFB2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
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bitfld.long 0x18 20.--21. " ICONFB2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
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textline " "
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bitfld.long 0x18 18.--19. " ICONFB2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
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bitfld.long 0x18 16.--17. " ICONFB2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
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textline " "
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bitfld.long 0x18 14.--15. " ICONFB2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
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bitfld.long 0x18 12.--13. " ICONFB2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
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textline " "
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bitfld.long 0x18 10.--11. " ICONFB2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
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bitfld.long 0x18 8.--9. " ICONFB2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
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textline " "
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bitfld.long 0x18 6.--7. " ICONFB2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
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bitfld.long 0x18 4.--5. " ICONFB2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
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textline " "
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bitfld.long 0x18 2.--3. " ICONFB2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
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bitfld.long 0x18 0.--1. " ICONFB2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
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width 8.
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line.long 0x1c "PTB_DR,Data Register"
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bitfld.long 0x1c 31. " DR(31) ,Data Register 31" "Low,High"
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bitfld.long 0x1c 30. " DR(30) ,Data Register 30" "Low,High"
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bitfld.long 0x1c 29. " DR(29) ,Data Register 29" "Low,High"
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bitfld.long 0x1c 28. " DR(28) ,Data Register 28" "Low,High"
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bitfld.long 0x1c 27. " DR(27) ,Data Register 27" "Low,High"
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textline " "
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bitfld.long 0x1c 26. " DR(26) ,Data Register 26" "Low,High"
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bitfld.long 0x1c 25. " DR(25) ,Data Register 25" "Low,High"
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bitfld.long 0x1c 24. " DR(24) ,Data Register 24" "Low,High"
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bitfld.long 0x1c 23. " DR(23) ,Data Register 23" "Low,High"
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bitfld.long 0x1c 22. " DR(22) ,Data Register 22" "Low,High"
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textline " "
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bitfld.long 0x1c 21. " DR(21) ,Data Register 21" "Low,High"
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bitfld.long 0x1c 20. " DR(20) ,Data Register 20" "Low,High"
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bitfld.long 0x1c 19. " DR(19) ,Data Register 19" "Low,High"
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bitfld.long 0x1c 18. " DR(18) ,Data Register 18" "Low,High"
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bitfld.long 0x1c 17. " DR(17) ,Data Register 17" "Low,High"
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textline " "
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bitfld.long 0x1c 16. " DR(16) ,Data Register 16" "Low,High"
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bitfld.long 0x1c 15. " DR(15) ,Data Register 15" "Low,High"
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bitfld.long 0x1c 14. " DR(14) ,Data Register 14" "Low,High"
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bitfld.long 0x1c 13. " DR(13) ,Data Register 13" "Low,High"
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bitfld.long 0x1c 12. " DR(12) ,Data Register 12" "Low,High"
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textline " "
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bitfld.long 0x1c 11. " DR(11) ,Data Register 11" "Low,High"
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bitfld.long 0x1c 10. " DR(10) ,Data Register 10" "Low,High"
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bitfld.long 0x1c 9. " DR(9) ,Data Register 9" "Low,High"
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bitfld.long 0x1c 8. " DR(8) ,Data Register 8" "Low,High"
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bitfld.long 0x1c 7. " DR(7) ,Data Register 7" "Low,High"
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textline " "
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bitfld.long 0x1c 6. " DR(6) ,Data Register 6" "Low,High"
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bitfld.long 0x1c 5. " DR(5) ,Data Register 5" "Low,High"
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bitfld.long 0x1c 4. " DR(4) ,Data Register 4" "Low,High"
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bitfld.long 0x1c 3. " DR(3) ,Data Register 3" "Low,High"
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bitfld.long 0x1c 2. " DR(2) ,Data Register 2" "Low,High"
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textline " "
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bitfld.long 0x1c 1. " DR(1) ,Data Register 1" "Low,High"
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bitfld.long 0x1c 0. " DR(0) ,Data Register 0" "Low,High"
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width 10.
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group.long 0x20++0x03
|
|
line.long 0x00 "PTB_GIUS,GPIO In Use Register B"
|
|
bitfld.long 0x00 31. " GIUS(31) ,GPIO In Use Pin 31" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 30. " GIUS(30) ,GPIO In Use Pin 30" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 29. " GIUS(29) ,GPIO In Use Pin 29" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GIUS(28) ,GPIO In Use Pin 28" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 27. " GIUS(27) ,GPIO In Use Pin 27" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 26. " GIUS(26) ,GPIO In Use Pin 26" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GIUS(25) ,GPIO In Use Pin 25" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 24. " GIUS(24) ,GPIO In Use Pin 24" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 23. " GIUS(23) ,GPIO In Use Pin 23" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GIUS(22) ,GPIO In Use Pin 22" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 21. " GIUS(21) ,GPIO In Use Pin 21" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 20. " GIUS(20) ,GPIO In Use Pin 20" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GIUS(19) ,GPIO In Use Pin 19" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 18. " GIUS(18) ,GPIO In Use Pin 18" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 17. " GIUS(17) ,GPIO In Use Pin 17" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GIUS(16) ,GPIO In Use Pin 16" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 15. " GIUS(15) ,GPIO In Use Pin 15" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 14. " GIUS(14) ,GPIO In Use Pin 14" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GIUS(13) ,GPIO In Use Pin 13" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 12. " GIUS(12) ,GPIO In Use Pin 12" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 11. " GIUS(11) ,GPIO In Use Pin 11" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GIUS(10) ,GPIO In Use Pin 10" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 9. " GIUS(9) ,GPIO In Use Pin 9" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 8. " GIUS(8) ,GPIO In Use Pin 8" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GIUS(7) ,GPIO In Use Pin 7" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 6. " GIUS(6) ,GPIO In Use Pin 6" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 5. " GIUS(5) ,GPIO In Use Pin 5" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GIUS(4) ,GPIO In Use Pin 4" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 3. " GIUS(3) ,GPIO In Use Pin 3" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 2. " GIUS(2) ,GPIO In Use Pin 2" "Multiplexed,GPIO"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PTB_SSR,Sample Status Register"
|
|
bitfld.long 0x00 31. " SSR31 ,Sample Status Pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " SSR30 ,Sample Status Pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " SSR29 ,Sample Status Pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " SSR28 ,Sample Status Pin 28" "Low,High"
|
|
bitfld.long 0x00 27. " SSR27 ,Sample Status Pin 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SSR26 ,Sample Status Pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " SSR25 ,Sample Status Pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " SSR24 ,Sample Status Pin 24" "Low,High"
|
|
bitfld.long 0x00 23. " SSR23 ,Sample Status Pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " SSR22 ,Sample Status Pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SSR21 ,Sample Status Pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " SSR20 ,Sample Status Pin 20" "Low,High"
|
|
bitfld.long 0x00 19. " SSR19 ,Sample Status Pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " SSR18 ,Sample Status Pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " SSR17 ,Sample Status Pin 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSR16 ,Sample Status Pin 16" "Low,High"
|
|
bitfld.long 0x00 15. " SSR15 ,Sample Status Pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " SSR14 ,Sample Status Pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " SSR13 ,Sample Status Pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " SSR12 ,Sample Status Pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SSR11 ,Sample Status Pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " SSR10 ,Sample Status Pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " SSR9 ,Sample Status Pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " SSR8 ,Sample Status Pin 8" "Low,High"
|
|
bitfld.long 0x00 7. " SSR7 ,Sample Status Pin 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SSR6 ,Sample Status Pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " SSR5 ,Sample Status Pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " SSR4 ,Sample Status Pin 4" "Low,High"
|
|
bitfld.long 0x00 3. " SSR3 ,Sample Status Pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " SSR2 ,Sample Status Pin 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SSR1 ,Sample Status Pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " SSR0 ,Sample Status Pin 0" "Low,High"
|
|
group.long 0x28++0x1b
|
|
line.long 0x00 "PTB_ICR1,Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR1(15) ,Interrupt Configuration 15" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 28.--29. " ICR1(14) ,Interrupt Configuration 14" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 26.--27. " ICR1(13) ,Interrupt Configuration 13" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1(12) ,Interrupt Configuration 12" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 22.--23. " ICR1(11) ,Interrupt Configuration 11" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 20.--21. " ICR1(10) ,Interrupt Configuration 10" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1(9) ,Interrupt Configuration 9" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 16.--17. " ICR1(8) ,Interrupt Configuration 8" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 14.--15. " ICR1(7) ,Interrupt Configuration 7" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1(6) ,Interrupt Configuration 6" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 10.--11. " ICR1(5) ,Interrupt Configuration 5" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 8.--9. " ICR1(4) ,Interrupt Configuration 4" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1(3) ,Interrupt Configuration 3" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 4.--5. " ICR1(2) ,Interrupt Configuration 2" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 2.--3. " ICR1(1) ,Interrupt Configuration 1" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1(0) ,Interrupt Configuration 0" "Rising edge,Falling edge,High level,Low level"
|
|
line.long 0x04 "PTB_ICR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x04 30.--31. " ICR2(31) ,Interrupt Configuration 31" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 28.--29. " ICR2(30) ,Interrupt Configuration 30" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 26.--27. " ICR2(29) ,Interrupt Configuration 29" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2(28) ,Interrupt Configuration 28" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 22.--23. " ICR2(27) ,Interrupt Configuration 27" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 20.--21. " ICR2(26) ,Interrupt Configuration 26" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2(25) ,Interrupt Configuration 25" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 16.--17. " ICR2(24) ,Interrupt Configuration 24" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 14.--15. " ICR2(23) ,Interrupt Configuration 23" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2(22) ,Interrupt Configuration 22" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 10.--11. " ICR2(21) ,Interrupt Configuration 21" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 8.--9. " ICR2(20) ,Interrupt Configuration 20" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2(19) ,Interrupt Configuration 19" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 4.--5. " ICR2(18) ,Interrupt Configuration 18" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 2.--3. " ICR2(17) ,Interrupt Configuration 17" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2(16) ,Interrupt Configuration 16" "Rising edge,Falling edge,High level,Low level"
|
|
width 9.
|
|
line.long 0x08 "PTB_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR(31) ,Interrupt Mask 31" "Masked,Not masked"
|
|
bitfld.long 0x08 30. " IMR(30) ,Interrupt Mask 30" "Masked,Not masked"
|
|
bitfld.long 0x08 29. " IMR(29) ,Interrupt Mask 29" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR(28) ,Interrupt Mask 28" "Masked,Not masked"
|
|
bitfld.long 0x08 27. " IMR(27) ,Interrupt Mask 27" "Masked,Not masked"
|
|
bitfld.long 0x08 26. " IMR(26) ,Interrupt Mask 26" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR(25) ,Interrupt Mask 25" "Masked,Not masked"
|
|
bitfld.long 0x08 24. " IMR(24) ,Interrupt Mask 24" "Masked,Not masked"
|
|
bitfld.long 0x08 23. " IMR(23) ,Interrupt Mask 23" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR(22) ,Interrupt Mask 22" "Masked,Not masked"
|
|
bitfld.long 0x08 21. " IMR(21) ,Interrupt Mask 21" "Masked,Not masked"
|
|
bitfld.long 0x08 20. " IMR(20) ,Interrupt Mask 20" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR(19) ,Interrupt Mask 19" "Masked,Not masked"
|
|
bitfld.long 0x08 18. " IMR(18) ,Interrupt Mask 18" "Masked,Not masked"
|
|
bitfld.long 0x08 17. " IMR(17) ,Interrupt Mask 17" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR(16) ,Interrupt Mask 16" "Masked,Not masked"
|
|
bitfld.long 0x08 15. " IMR(15) ,Interrupt Mask 15" "Masked,Not masked"
|
|
bitfld.long 0x08 14. " IMR(14) ,Interrupt Mask 14" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR(13) ,Interrupt Mask 13" "Masked,Not masked"
|
|
bitfld.long 0x08 12. " IMR(12) ,Interrupt Mask 12" "Masked,Not masked"
|
|
bitfld.long 0x08 11. " IMR(11) ,Interrupt Mask 11" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR(10) ,Interrupt Mask 10" "Masked,Not masked"
|
|
bitfld.long 0x08 9. " IMR(9) ,Interrupt Mask 9" "Masked,Not masked"
|
|
bitfld.long 0x08 8. " IMR(8) ,Interrupt Mask 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR(7) ,Interrupt Mask 7" "Masked,Not masked"
|
|
bitfld.long 0x08 6. " IMR(6) ,Interrupt Mask 6" "Masked,Not masked"
|
|
bitfld.long 0x08 5. " IMR(5) ,Interrupt Mask 5" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR(4) ,Interrupt Mask 4" "Masked,Not masked"
|
|
bitfld.long 0x08 3. " IMR(3) ,Interrupt Mask 3" "Masked,Not masked"
|
|
bitfld.long 0x08 2. " IMR(2) ,Interrupt Mask 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR(1) ,Interrupt Mask 1" "Masked,Not masked"
|
|
bitfld.long 0x08 0. " IMR(0) ,Interrupt Mask 0" "Masked,Not masked"
|
|
line.long 0x0c "PTB_ISR,Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " ISR(31) ,Interrupt Status 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 30. " ISR(30) ,Interrupt Status 30" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 29. " ISR(29) ,Interrupt Status 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 28. " ISR(28) ,Interrupt Status 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 27. " ISR(27) ,Interrupt Status 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 26. " ISR(26) ,Interrupt Status 26" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " ISR(25) ,Interrupt Status 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 24. " ISR(24) ,Interrupt Status 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 23. " ISR(23) ,Interrupt Status 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 22. " ISR(22) ,Interrupt Status 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 21. " ISR(21) ,Interrupt Status 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 20. " ISR(20) ,Interrupt Status 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " ISR(19) ,Interrupt Status 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 18. " ISR(18) ,Interrupt Status 18" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 17. " ISR(17) ,Interrupt Status 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 16. " ISR(16) ,Interrupt Status 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 15. " ISR(15) ,Interrupt Status 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 14. " ISR(14) ,Interrupt Status 14" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " ISR(13) ,Interrupt Status 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 12. " ISR(12) ,Interrupt Status 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 11. " ISR(11) ,Interrupt Status 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 10. " ISR(10) ,Interrupt Status 10" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 9. " ISR(9) ,Interrupt Status 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 8. " ISR(8) ,Interrupt Status 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " ISR(7) ,Interrupt Status 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 6. " ISR(6) ,Interrupt Status 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 5. " ISR(5) ,Interrupt Status 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 4. " ISR(4) ,Interrupt Status 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 3. " ISR(3) ,Interrupt Status 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 2. " ISR(2) ,Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " ISR(1) ,Interrupt Status 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 0. " ISR(0) ,Interrupt Status 0" "No interrupt,Interrupt"
|
|
line.long 0x10 "PTB_GPR,General Purpose Register"
|
|
bitfld.long 0x10 31. " GPR(31) ,General Purpose 31" "Primary,Alternate"
|
|
bitfld.long 0x10 30. " GPR(30) ,General Purpose 30" "Primary,Alternate"
|
|
bitfld.long 0x10 29. " GPR(29) ,General Purpose 29" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 28. " GPR(28) ,General Purpose 28" "Primary,Alternate"
|
|
bitfld.long 0x10 27. " GPR(27) ,General Purpose 27" "Primary,Alternate"
|
|
bitfld.long 0x10 26. " GPR(26) ,General Purpose 26" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 25. " GPR(25) ,General Purpose 25" "Primary,Alternate"
|
|
bitfld.long 0x10 24. " GPR(24) ,General Purpose 24" "Primary,Alternate"
|
|
bitfld.long 0x10 23. " GPR(23) ,General Purpose 23" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 22. " GPR(22) ,General Purpose 22" "Primary,Alternate"
|
|
bitfld.long 0x10 21. " GPR(21) ,General Purpose 21" "Primary,Alternate"
|
|
bitfld.long 0x10 20. " GPR(20) ,General Purpose 20" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 19. " GPR(19) ,General Purpose 19" "Primary,Alternate"
|
|
bitfld.long 0x10 18. " GPR(18) ,General Purpose 18" "Primary,Alternate"
|
|
bitfld.long 0x10 17. " GPR(17) ,General Purpose 17" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 16. " GPR(16) ,General Purpose 16" "Primary,Alternate"
|
|
bitfld.long 0x10 15. " GPR(15) ,General Purpose 15" "Primary,Alternate"
|
|
bitfld.long 0x10 14. " GPR(14) ,General Purpose 14" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 13. " GPR(13) ,General Purpose 13" "Primary,Alternate"
|
|
bitfld.long 0x10 12. " GPR(12) ,General Purpose 12" "Primary,Alternate"
|
|
bitfld.long 0x10 11. " GPR(11) ,General Purpose 11" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 10. " GPR(10) ,General Purpose 10" "Primary,Alternate"
|
|
bitfld.long 0x10 9. " GPR(9) ,General Purpose 9" "Primary,Alternate"
|
|
bitfld.long 0x10 8. " GPR(8) ,General Purpose 8" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 7. " GPR(7) ,General Purpose 7" "Primary,Alternate"
|
|
bitfld.long 0x10 6. " GPR(6) ,General Purpose 6" "Primary,Alternate"
|
|
bitfld.long 0x10 5. " GPR(5) ,General Purpose 5" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 4. " GPR(4) ,General Purpose 4" "Primary,Alternate"
|
|
bitfld.long 0x10 3. " GPR(3) ,General Purpose 3" "Primary,Alternate"
|
|
bitfld.long 0x10 2. " GPR(2) ,General Purpose 2" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 1. " GPR(1) ,General Purpose 1" "Primary,Alternate"
|
|
bitfld.long 0x10 0. " GPR(0) ,General Purpose 0" "Primary,Alternate"
|
|
line.long 0x14 "PTB_SWR,Software Reset Register"
|
|
bitfld.long 0x14 0. " SWR ,Software Reset" "No effect,Reset"
|
|
line.long 0x18 "PTB_PUEN,Pull-Up Enable Register"
|
|
bitfld.long 0x18 31. " PUEN(31) ,Pull_Up Enable 31" "Tri-state,Pull up"
|
|
bitfld.long 0x18 30. " PUEN(30) ,Pull_Up Enable 30" "Tri-state,Pull up"
|
|
bitfld.long 0x18 29. " PUEN(29) ,Pull_Up Enable 29" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PUEN(28) ,Pull_Up Enable 28" "Tri-state,Pull up"
|
|
bitfld.long 0x18 27. " PUEN(27) ,Pull_Up Enable 27" "Tri-state,Pull up"
|
|
bitfld.long 0x18 26. " PUEN(26) ,Pull_Up Enable 26" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 25. " PUEN(25) ,Pull_Up Enable 25" "Tri-state,Pull up"
|
|
bitfld.long 0x18 24. " PUEN(24) ,Pull_Up Enable 24" "Tri-state,Pull up"
|
|
bitfld.long 0x18 23. " PUEN(23) ,Pull_Up Enable 23" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 22. " PUEN(22) ,Pull_Up Enable 22" "Tri-state,Pull up"
|
|
bitfld.long 0x18 21. " PUEN(21) ,Pull_Up Enable 21" "Tri-state,Pull up"
|
|
bitfld.long 0x18 20. " PUEN(20) ,Pull_Up Enable 20" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 19. " PUEN(19) ,Pull_Up Enable 19" "Tri-state,Pull up"
|
|
bitfld.long 0x18 18. " PUEN(18) ,Pull_Up Enable 18" "Tri-state,Pull up"
|
|
bitfld.long 0x18 17. " PUEN(17) ,Pull_Up Enable 17" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 16. " PUEN(16) ,Pull_Up Enable 16" "Tri-state,Pull up"
|
|
bitfld.long 0x18 15. " PUEN(15) ,Pull_Up Enable 15" "Tri-state,Pull up"
|
|
bitfld.long 0x18 14. " PUEN(14) ,Pull_Up Enable 14" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 13. " PUEN(13) ,Pull_Up Enable 13" "Tri-state,Pull up"
|
|
bitfld.long 0x18 12. " PUEN(12) ,Pull_Up Enable 12" "Tri-state,Pull up"
|
|
bitfld.long 0x18 11. " PUEN(11) ,Pull_Up Enable 11" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 10. " PUEN(10) ,Pull_Up Enable 10" "Tri-state,Pull up"
|
|
bitfld.long 0x18 9. " PUEN(9) ,Pull_Up Enable 9" "Tri-state,Pull up"
|
|
bitfld.long 0x18 8. " PUEN(8) ,Pull_Up Enable 8" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 7. " PUEN(7) ,Pull_Up Enable 7" "Tri-state,Pull up"
|
|
bitfld.long 0x18 6. " PUEN(6) ,Pull_Up Enable 6" "Tri-state,Pull up"
|
|
bitfld.long 0x18 5. " PUEN(5) ,Pull_Up Enable 5" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 4. " PUEN(4) ,Pull_Up Enable 4" "Tri-state,Pull up"
|
|
bitfld.long 0x18 3. " PUEN(3) ,Pull_Up Enable 3" "Tri-state,Pull up"
|
|
bitfld.long 0x18 2. " PUEN(2) ,Pull_Up Enable 2" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 1. " PUEN(1) ,Pull_Up Enable 1" "Tri-state,Pull up"
|
|
bitfld.long 0x18 0. " PUEN(0) ,Pull_Up Enable 0" "Tri-state,Pull up"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port C"
|
|
base ad:0x10015200
|
|
width 10.
|
|
group.long 0x00++0x1f
|
|
line.long 0x00 "PTC_DDIR,Data Direction Port A Register"
|
|
bitfld.long 0x00 31. " DDIR(31) ,Data Direction (31)" "Input,Output"
|
|
bitfld.long 0x00 30. " DDIR(30) ,Data Direction (30)" "Input,Output"
|
|
bitfld.long 0x00 29. " DDIR(29) ,Data Direction (29)" "Input,Output"
|
|
bitfld.long 0x00 28. " DDIR(28) ,Data Direction (28)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DDIR(27) ,Data Direction (27)" "Input,Output"
|
|
bitfld.long 0x00 26. " DDIR(26) ,Data Direction (26)" "Input,Output"
|
|
bitfld.long 0x00 25. " DDIR(25) ,Data Direction (25)" "Input,Output"
|
|
bitfld.long 0x00 24. " DDIR(24) ,Data Direction (24)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DDIR(23) ,Data Direction (23)" "Input,Output"
|
|
bitfld.long 0x00 22. " DDIR(22) ,Data Direction (22)" "Input,Output"
|
|
bitfld.long 0x00 21. " DDIR(21) ,Data Direction (21)" "Input,Output"
|
|
bitfld.long 0x00 20. " DDIR(20) ,Data Direction (20)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DDIR(19) ,Data Direction (19)" "Input,Output"
|
|
bitfld.long 0x00 18. " DDIR(18) ,Data Direction (18)" "Input,Output"
|
|
bitfld.long 0x00 17. " DDIR(17) ,Data Direction (17)" "Input,Output"
|
|
bitfld.long 0x00 16. " DDIR(16) ,Data Direction (16)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DDIR(15) ,Data Direction (15)" "Input,Output"
|
|
bitfld.long 0x00 14. " DDIR(14) ,Data Direction (14)" "Input,Output"
|
|
bitfld.long 0x00 13. " DDIR(13) ,Data Direction (13)" "Input,Output"
|
|
bitfld.long 0x00 12. " DDIR(12) ,Data Direction (12)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DDIR(11) ,Data Direction (11)" "Input,Output"
|
|
bitfld.long 0x00 10. " DDIR(10) ,Data Direction (10)" "Input,Output"
|
|
bitfld.long 0x00 9. " DDIR(9) ,Data Direction (9)" "Input,Output"
|
|
bitfld.long 0x00 8. " DDIR(8) ,Data Direction (8)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DDIR(7) ,Data Direction (7)" "Input,Output"
|
|
bitfld.long 0x00 6. " DDIR(6) ,Data Direction (6)" "Input,Output"
|
|
bitfld.long 0x00 5. " DDIR(5) ,Data Direction (5)" "Input,Output"
|
|
bitfld.long 0x00 4. " DDIR(4) ,Data Direction (4)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DDIR(3) ,Data Direction (3)" "Input,Output"
|
|
bitfld.long 0x00 2. " DDIR(2) ,Data Direction (2)" "Input,Output"
|
|
bitfld.long 0x00 1. " DDIR(1) ,Data Direction (1)" "Input,Output"
|
|
bitfld.long 0x00 0. " DDIR(0) ,Data Direction (0)" "Input,Output"
|
|
line.long 0x04 "PTC_OCR1,Output Configuration Register 1"
|
|
bitfld.long 0x04 30.--31. " OCR1(15) ,Output Configuration (15)" "Input A_IN[15],Input B_IN[15],Input C_IN[15],Data [15]"
|
|
bitfld.long 0x04 28.--29. " OCR1(14) ,Output Configuration (14)" "Input A_IN[14],Input B_IN[14],Input C_IN[14],Data [14]"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " OCR1(13) ,Output Configuration (13)" "Input A_IN[13],Input B_IN[13],Input C_IN[13],Data [13]"
|
|
bitfld.long 0x04 24.--25. " OCR1(12) ,Output Configuration (12)" "Input A_IN[12],Input B_IN[12],Input C_IN[12],Data [12]"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " OCR1(11) ,Output Configuration (11)" "Input A_IN[11],Input B_IN[11],Input C_IN[11],Data [11]"
|
|
bitfld.long 0x04 20.--21. " OCR1(10) ,Output Configuration (10)" "Input A_IN[10],Input B_IN[10],Input C_IN[10],Data [10]"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " OCR1(9) ,Output Configuration (9)" "Input A_IN[9],Input B_IN[9],Input C_IN[9],Data [9]"
|
|
bitfld.long 0x04 16.--17. " OCR1(8) ,Output Configuration (8)" "Input A_IN[8],Input B_IN[8],Input C_IN[8],Data [8]"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " OCR1(7) ,Output Configuration (7)" "Input A_IN[7],Input B_IN[7],Input C_IN[7],Data [7]"
|
|
bitfld.long 0x04 12.--13. " OCR1(6) ,Output Configuration (6)" "Input A_IN[6],Input B_IN[6],Input C_IN[6],Data [6]"
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " OCR1(5) ,Output Configuration (5)" "Input A_IN[5],Input B_IN[5],Input C_IN[5],Data [5]"
|
|
bitfld.long 0x04 8.--9. " OCR1(4) ,Output Configuration (4)" "Input A_IN[4],Input B_IN[4],Input C_IN[4],Data [4]"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " OCR1(3) ,Output Configuration (3)" "Input A_IN[3],Input B_IN[3],Input C_IN[3],Data [3]"
|
|
bitfld.long 0x04 4.--5. " OCR1(2) ,Output Configuration (2)" "Input A_IN[2],Input B_IN[2],Input C_IN[2],Data [2]"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " OCR1(1) ,Output Configuration (1)" "Input A_IN[1],Input B_IN[1],Input C_IN[1],Data [1]"
|
|
bitfld.long 0x04 0.--1. " OCR1(0) ,Output Configuration (0)" "Input A_IN[0],Input B_IN[0],Input C_IN[0],Data [0]"
|
|
line.long 0x08 "PTC_OCR2,Output Configuration Register 2"
|
|
bitfld.long 0x08 30.--31. " OCR2(31) ,Output Configuration (31)" "Input A_IN[31],Input B_IN[31],Input C_IN[31],Data [31]"
|
|
bitfld.long 0x08 28.--29. " OCR2(30) ,Output Configuration (30)" "Input A_IN[30],Input B_IN[30],Input C_IN[30],Data [30]"
|
|
textline " "
|
|
bitfld.long 0x08 26.--27. " OCR2(29) ,Output Configuration (29)" "Input A_IN[29],Input B_IN[29],Input C_IN[29],Data [29]"
|
|
bitfld.long 0x08 24.--25. " OCR2(28) ,Output Configuration (28)" "Input A_IN[28],Input B_IN[28],Input C_IN[28],Data [28]"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OCR2(27) ,Output Configuration (27)" "Input A_IN[27],Input B_IN[27],Input C_IN[27],Data [27]"
|
|
bitfld.long 0x08 20.--21. " OCR2(26) ,Output Configuration (26)" "Input A_IN[26],Input B_IN[26],Input C_IN[26],Data [26]"
|
|
textline " "
|
|
bitfld.long 0x08 18.--19. " OCR2(25) ,Output Configuration (25)" "Input A_IN[25],Input B_IN[25],Input C_IN[25],Data [25]"
|
|
bitfld.long 0x08 16.--17. " OCR2(24) ,Output Configuration (24)" "Input A_IN[24],Input B_IN[24],Input C_IN[24],Data [24]"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OCR2(23) ,Output Configuration (23)" "Input A_IN[23],Input B_IN[23],Input C_IN[23],Data [23]"
|
|
bitfld.long 0x08 12.--13. " OCR2(22) ,Output Configuration (22)" "Input A_IN[22],Input B_IN[22],Input C_IN[22],Data [22]"
|
|
textline " "
|
|
bitfld.long 0x08 10.--11. " OCR2(21) ,Output Configuration (21)" "Input A_IN[21],Input B_IN[21],Input C_IN[21],Data [21]"
|
|
bitfld.long 0x08 8.--9. " OCR2(20) ,Output Configuration (20)" "Input A_IN[20],Input B_IN[20],Input C_IN[20],Data [20]"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OCR2(19) ,Output Configuration (19)" "Input A_IN[19],Input B_IN[19],Input C_IN[19],Data [19]"
|
|
bitfld.long 0x08 4.--5. " OCR2(18) ,Output Configuration (18)" "Input A_IN[18],Input B_IN[18],Input C_IN[18],Data [18]"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OCR2(17) ,Output Configuration (17)" "Input A_IN[17],Input B_IN[17],Input C_IN[17],Data [17]"
|
|
bitfld.long 0x08 0.--1. " OCR2(16) ,Output Configuration (16)" "Input A_IN[16],Input B_IN[16],Input C_IN[16],Data [16]"
|
|
width 13.
|
|
line.long 0x0c "PTC_ICONFA1,Input Configuration Register A1"
|
|
bitfld.long 0x0c 30.--31. " ICONFA1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x0c 28.--29. " ICONFA1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 26.--27. " ICONFA1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x0c 24.--25. " ICONFA1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 22.--23. " ICONFA1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x0c 20.--21. " ICONFA1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 18.--19. " ICONFA1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x0c 16.--17. " ICONFA1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " ICONFA1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x0c 12.--13. " ICONFA1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 10.--11. " ICONFA1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x0c 8.--9. " ICONFA1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 6.--7. " ICONFA1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x0c 4.--5. " ICONFA1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 2.--3. " ICONFA1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x0c 0.--1. " ICONFA1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x10 "PTC_ICONFA2,Input Configuration Register A2"
|
|
bitfld.long 0x10 30.--31. " ICONFA2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x10 28.--29. " ICONFA2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 26.--27. " ICONFA2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x10 24.--25. " ICONFA2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ICONFA2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x10 20.--21. " ICONFA2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " ICONFA2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x10 16.--17. " ICONFA2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " ICONFA2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x10 12.--13. " ICONFA2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 10.--11. " ICONFA2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x10 8.--9. " ICONFA2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ICONFA2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x10 4.--5. " ICONFA2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " ICONFA2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x10 0.--1. " ICONFA2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
line.long 0x14 "PTC_ICONFB1,Input Configuration Register B1"
|
|
bitfld.long 0x14 30.--31. " ICONFB1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x14 28.--29. " ICONFB1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 26.--27. " ICONFB1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x14 24.--25. " ICONFB1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 22.--23. " ICONFB1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x14 20.--21. " ICONFB1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " ICONFB1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x14 16.--17. " ICONFB1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " ICONFB1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x14 12.--13. " ICONFB1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 10.--11. " ICONFB1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x14 8.--9. " ICONFB1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " ICONFB1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x14 4.--5. " ICONFB1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " ICONFB1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x14 0.--1. " ICONFB1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x18 "PTC_ICONFB2,Input Configuration Register B2"
|
|
bitfld.long 0x18 30.--31. " ICONFB2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x18 28.--29. " ICONFB2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 26.--27. " ICONFB2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x18 24.--25. " ICONFB2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 22.--23. " ICONFB2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x18 20.--21. " ICONFB2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " ICONFB2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x18 16.--17. " ICONFB2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " ICONFB2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x18 12.--13. " ICONFB2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 10.--11. " ICONFB2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x18 8.--9. " ICONFB2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " ICONFB2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x18 4.--5. " ICONFB2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " ICONFB2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x18 0.--1. " ICONFB2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
width 8.
|
|
line.long 0x1c "PTC_DR,Data Register"
|
|
bitfld.long 0x1c 31. " DR(31) ,Data Register 31" "Low,High"
|
|
bitfld.long 0x1c 30. " DR(30) ,Data Register 30" "Low,High"
|
|
bitfld.long 0x1c 29. " DR(29) ,Data Register 29" "Low,High"
|
|
bitfld.long 0x1c 28. " DR(28) ,Data Register 28" "Low,High"
|
|
bitfld.long 0x1c 27. " DR(27) ,Data Register 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 26. " DR(26) ,Data Register 26" "Low,High"
|
|
bitfld.long 0x1c 25. " DR(25) ,Data Register 25" "Low,High"
|
|
bitfld.long 0x1c 24. " DR(24) ,Data Register 24" "Low,High"
|
|
bitfld.long 0x1c 23. " DR(23) ,Data Register 23" "Low,High"
|
|
bitfld.long 0x1c 22. " DR(22) ,Data Register 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 21. " DR(21) ,Data Register 21" "Low,High"
|
|
bitfld.long 0x1c 20. " DR(20) ,Data Register 20" "Low,High"
|
|
bitfld.long 0x1c 19. " DR(19) ,Data Register 19" "Low,High"
|
|
bitfld.long 0x1c 18. " DR(18) ,Data Register 18" "Low,High"
|
|
bitfld.long 0x1c 17. " DR(17) ,Data Register 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 16. " DR(16) ,Data Register 16" "Low,High"
|
|
bitfld.long 0x1c 15. " DR(15) ,Data Register 15" "Low,High"
|
|
bitfld.long 0x1c 14. " DR(14) ,Data Register 14" "Low,High"
|
|
bitfld.long 0x1c 13. " DR(13) ,Data Register 13" "Low,High"
|
|
bitfld.long 0x1c 12. " DR(12) ,Data Register 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 11. " DR(11) ,Data Register 11" "Low,High"
|
|
bitfld.long 0x1c 10. " DR(10) ,Data Register 10" "Low,High"
|
|
bitfld.long 0x1c 9. " DR(9) ,Data Register 9" "Low,High"
|
|
bitfld.long 0x1c 8. " DR(8) ,Data Register 8" "Low,High"
|
|
bitfld.long 0x1c 7. " DR(7) ,Data Register 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 6. " DR(6) ,Data Register 6" "Low,High"
|
|
bitfld.long 0x1c 5. " DR(5) ,Data Register 5" "Low,High"
|
|
bitfld.long 0x1c 4. " DR(4) ,Data Register 4" "Low,High"
|
|
bitfld.long 0x1c 3. " DR(3) ,Data Register 3" "Low,High"
|
|
bitfld.long 0x1c 2. " DR(2) ,Data Register 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " DR(1) ,Data Register 1" "Low,High"
|
|
bitfld.long 0x1c 0. " DR(0) ,Data Register 0" "Low,High"
|
|
width 10.
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PTC_GIUS,GPIO In Use Register C"
|
|
bitfld.long 0x00 31. " GIUS(31) ,GPIO In Use Pin 31" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 30. " GIUS(30) ,GPIO In Use Pin 30" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 29. " GIUS(29) ,GPIO In Use Pin 29" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GIUS(28) ,GPIO In Use Pin 28" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 27. " GIUS(27) ,GPIO In Use Pin 27" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 26. " GIUS(26) ,GPIO In Use Pin 26" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GIUS(25) ,GPIO In Use Pin 25" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 24. " GIUS(24) ,GPIO In Use Pin 24" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 23. " GIUS(23) ,GPIO In Use Pin 23" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GIUS(22) ,GPIO In Use Pin 22" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 21. " GIUS(21) ,GPIO In Use Pin 21" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 20. " GIUS(20) ,GPIO In Use Pin 20" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GIUS(19) ,GPIO In Use Pin 19" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 18. " GIUS(18) ,GPIO In Use Pin 18" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 17. " GIUS(17) ,GPIO In Use Pin 17" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GIUS(16) ,GPIO In Use Pin 16" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 15. " GIUS(15) ,GPIO In Use Pin 15" "Multiplexed,GPIO"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PTC_SSR,Sample Status Register"
|
|
bitfld.long 0x00 31. " SSR31 ,Sample Status Pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " SSR30 ,Sample Status Pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " SSR29 ,Sample Status Pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " SSR28 ,Sample Status Pin 28" "Low,High"
|
|
bitfld.long 0x00 27. " SSR27 ,Sample Status Pin 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SSR26 ,Sample Status Pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " SSR25 ,Sample Status Pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " SSR24 ,Sample Status Pin 24" "Low,High"
|
|
bitfld.long 0x00 23. " SSR23 ,Sample Status Pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " SSR22 ,Sample Status Pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SSR21 ,Sample Status Pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " SSR20 ,Sample Status Pin 20" "Low,High"
|
|
bitfld.long 0x00 19. " SSR19 ,Sample Status Pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " SSR18 ,Sample Status Pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " SSR17 ,Sample Status Pin 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSR16 ,Sample Status Pin 16" "Low,High"
|
|
bitfld.long 0x00 15. " SSR15 ,Sample Status Pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " SSR14 ,Sample Status Pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " SSR13 ,Sample Status Pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " SSR12 ,Sample Status Pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SSR11 ,Sample Status Pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " SSR10 ,Sample Status Pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " SSR9 ,Sample Status Pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " SSR8 ,Sample Status Pin 8" "Low,High"
|
|
bitfld.long 0x00 7. " SSR7 ,Sample Status Pin 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SSR6 ,Sample Status Pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " SSR5 ,Sample Status Pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " SSR4 ,Sample Status Pin 4" "Low,High"
|
|
bitfld.long 0x00 3. " SSR3 ,Sample Status Pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " SSR2 ,Sample Status Pin 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SSR1 ,Sample Status Pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " SSR0 ,Sample Status Pin 0" "Low,High"
|
|
group.long 0x28++0x1b
|
|
line.long 0x00 "PTC_ICR1,Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR1(15) ,Interrupt Configuration 15" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 28.--29. " ICR1(14) ,Interrupt Configuration 14" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 26.--27. " ICR1(13) ,Interrupt Configuration 13" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1(12) ,Interrupt Configuration 12" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 22.--23. " ICR1(11) ,Interrupt Configuration 11" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 20.--21. " ICR1(10) ,Interrupt Configuration 10" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1(9) ,Interrupt Configuration 9" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 16.--17. " ICR1(8) ,Interrupt Configuration 8" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 14.--15. " ICR1(7) ,Interrupt Configuration 7" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1(6) ,Interrupt Configuration 6" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 10.--11. " ICR1(5) ,Interrupt Configuration 5" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 8.--9. " ICR1(4) ,Interrupt Configuration 4" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1(3) ,Interrupt Configuration 3" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 4.--5. " ICR1(2) ,Interrupt Configuration 2" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 2.--3. " ICR1(1) ,Interrupt Configuration 1" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1(0) ,Interrupt Configuration 0" "Rising edge,Falling edge,High level,Low level"
|
|
line.long 0x04 "PTC_ICR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x04 30.--31. " ICR2(31) ,Interrupt Configuration 31" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 28.--29. " ICR2(30) ,Interrupt Configuration 30" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 26.--27. " ICR2(29) ,Interrupt Configuration 29" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2(28) ,Interrupt Configuration 28" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 22.--23. " ICR2(27) ,Interrupt Configuration 27" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 20.--21. " ICR2(26) ,Interrupt Configuration 26" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2(25) ,Interrupt Configuration 25" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 16.--17. " ICR2(24) ,Interrupt Configuration 24" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 14.--15. " ICR2(23) ,Interrupt Configuration 23" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2(22) ,Interrupt Configuration 22" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 10.--11. " ICR2(21) ,Interrupt Configuration 21" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 8.--9. " ICR2(20) ,Interrupt Configuration 20" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2(19) ,Interrupt Configuration 19" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 4.--5. " ICR2(18) ,Interrupt Configuration 18" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 2.--3. " ICR2(17) ,Interrupt Configuration 17" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2(16) ,Interrupt Configuration 16" "Rising edge,Falling edge,High level,Low level"
|
|
width 9.
|
|
line.long 0x08 "PTC_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR(31) ,Interrupt Mask 31" "Masked,Not masked"
|
|
bitfld.long 0x08 30. " IMR(30) ,Interrupt Mask 30" "Masked,Not masked"
|
|
bitfld.long 0x08 29. " IMR(29) ,Interrupt Mask 29" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR(28) ,Interrupt Mask 28" "Masked,Not masked"
|
|
bitfld.long 0x08 27. " IMR(27) ,Interrupt Mask 27" "Masked,Not masked"
|
|
bitfld.long 0x08 26. " IMR(26) ,Interrupt Mask 26" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR(25) ,Interrupt Mask 25" "Masked,Not masked"
|
|
bitfld.long 0x08 24. " IMR(24) ,Interrupt Mask 24" "Masked,Not masked"
|
|
bitfld.long 0x08 23. " IMR(23) ,Interrupt Mask 23" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR(22) ,Interrupt Mask 22" "Masked,Not masked"
|
|
bitfld.long 0x08 21. " IMR(21) ,Interrupt Mask 21" "Masked,Not masked"
|
|
bitfld.long 0x08 20. " IMR(20) ,Interrupt Mask 20" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR(19) ,Interrupt Mask 19" "Masked,Not masked"
|
|
bitfld.long 0x08 18. " IMR(18) ,Interrupt Mask 18" "Masked,Not masked"
|
|
bitfld.long 0x08 17. " IMR(17) ,Interrupt Mask 17" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR(16) ,Interrupt Mask 16" "Masked,Not masked"
|
|
bitfld.long 0x08 15. " IMR(15) ,Interrupt Mask 15" "Masked,Not masked"
|
|
bitfld.long 0x08 14. " IMR(14) ,Interrupt Mask 14" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR(13) ,Interrupt Mask 13" "Masked,Not masked"
|
|
bitfld.long 0x08 12. " IMR(12) ,Interrupt Mask 12" "Masked,Not masked"
|
|
bitfld.long 0x08 11. " IMR(11) ,Interrupt Mask 11" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR(10) ,Interrupt Mask 10" "Masked,Not masked"
|
|
bitfld.long 0x08 9. " IMR(9) ,Interrupt Mask 9" "Masked,Not masked"
|
|
bitfld.long 0x08 8. " IMR(8) ,Interrupt Mask 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR(7) ,Interrupt Mask 7" "Masked,Not masked"
|
|
bitfld.long 0x08 6. " IMR(6) ,Interrupt Mask 6" "Masked,Not masked"
|
|
bitfld.long 0x08 5. " IMR(5) ,Interrupt Mask 5" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR(4) ,Interrupt Mask 4" "Masked,Not masked"
|
|
bitfld.long 0x08 3. " IMR(3) ,Interrupt Mask 3" "Masked,Not masked"
|
|
bitfld.long 0x08 2. " IMR(2) ,Interrupt Mask 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR(1) ,Interrupt Mask 1" "Masked,Not masked"
|
|
bitfld.long 0x08 0. " IMR(0) ,Interrupt Mask 0" "Masked,Not masked"
|
|
line.long 0x0c "PTC_ISR,Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " ISR(31) ,Interrupt Status 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 30. " ISR(30) ,Interrupt Status 30" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 29. " ISR(29) ,Interrupt Status 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 28. " ISR(28) ,Interrupt Status 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 27. " ISR(27) ,Interrupt Status 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 26. " ISR(26) ,Interrupt Status 26" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " ISR(25) ,Interrupt Status 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 24. " ISR(24) ,Interrupt Status 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 23. " ISR(23) ,Interrupt Status 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 22. " ISR(22) ,Interrupt Status 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 21. " ISR(21) ,Interrupt Status 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 20. " ISR(20) ,Interrupt Status 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " ISR(19) ,Interrupt Status 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 18. " ISR(18) ,Interrupt Status 18" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 17. " ISR(17) ,Interrupt Status 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 16. " ISR(16) ,Interrupt Status 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 15. " ISR(15) ,Interrupt Status 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 14. " ISR(14) ,Interrupt Status 14" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " ISR(13) ,Interrupt Status 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 12. " ISR(12) ,Interrupt Status 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 11. " ISR(11) ,Interrupt Status 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 10. " ISR(10) ,Interrupt Status 10" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 9. " ISR(9) ,Interrupt Status 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 8. " ISR(8) ,Interrupt Status 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " ISR(7) ,Interrupt Status 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 6. " ISR(6) ,Interrupt Status 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 5. " ISR(5) ,Interrupt Status 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 4. " ISR(4) ,Interrupt Status 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 3. " ISR(3) ,Interrupt Status 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 2. " ISR(2) ,Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " ISR(1) ,Interrupt Status 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 0. " ISR(0) ,Interrupt Status 0" "No interrupt,Interrupt"
|
|
line.long 0x10 "PTC_GPR,General Purpose Register"
|
|
bitfld.long 0x10 31. " GPR(31) ,General Purpose 31" "Primary,Alternate"
|
|
bitfld.long 0x10 30. " GPR(30) ,General Purpose 30" "Primary,Alternate"
|
|
bitfld.long 0x10 29. " GPR(29) ,General Purpose 29" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 28. " GPR(28) ,General Purpose 28" "Primary,Alternate"
|
|
bitfld.long 0x10 27. " GPR(27) ,General Purpose 27" "Primary,Alternate"
|
|
bitfld.long 0x10 26. " GPR(26) ,General Purpose 26" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 25. " GPR(25) ,General Purpose 25" "Primary,Alternate"
|
|
bitfld.long 0x10 24. " GPR(24) ,General Purpose 24" "Primary,Alternate"
|
|
bitfld.long 0x10 23. " GPR(23) ,General Purpose 23" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 22. " GPR(22) ,General Purpose 22" "Primary,Alternate"
|
|
bitfld.long 0x10 21. " GPR(21) ,General Purpose 21" "Primary,Alternate"
|
|
bitfld.long 0x10 20. " GPR(20) ,General Purpose 20" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 19. " GPR(19) ,General Purpose 19" "Primary,Alternate"
|
|
bitfld.long 0x10 18. " GPR(18) ,General Purpose 18" "Primary,Alternate"
|
|
bitfld.long 0x10 17. " GPR(17) ,General Purpose 17" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 16. " GPR(16) ,General Purpose 16" "Primary,Alternate"
|
|
bitfld.long 0x10 15. " GPR(15) ,General Purpose 15" "Primary,Alternate"
|
|
bitfld.long 0x10 14. " GPR(14) ,General Purpose 14" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 13. " GPR(13) ,General Purpose 13" "Primary,Alternate"
|
|
bitfld.long 0x10 12. " GPR(12) ,General Purpose 12" "Primary,Alternate"
|
|
bitfld.long 0x10 11. " GPR(11) ,General Purpose 11" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 10. " GPR(10) ,General Purpose 10" "Primary,Alternate"
|
|
bitfld.long 0x10 9. " GPR(9) ,General Purpose 9" "Primary,Alternate"
|
|
bitfld.long 0x10 8. " GPR(8) ,General Purpose 8" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 7. " GPR(7) ,General Purpose 7" "Primary,Alternate"
|
|
bitfld.long 0x10 6. " GPR(6) ,General Purpose 6" "Primary,Alternate"
|
|
bitfld.long 0x10 5. " GPR(5) ,General Purpose 5" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 4. " GPR(4) ,General Purpose 4" "Primary,Alternate"
|
|
bitfld.long 0x10 3. " GPR(3) ,General Purpose 3" "Primary,Alternate"
|
|
bitfld.long 0x10 2. " GPR(2) ,General Purpose 2" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 1. " GPR(1) ,General Purpose 1" "Primary,Alternate"
|
|
bitfld.long 0x10 0. " GPR(0) ,General Purpose 0" "Primary,Alternate"
|
|
line.long 0x14 "PTC_SWR,Software Reset Register"
|
|
bitfld.long 0x14 0. " SWR ,Software Reset" "No effect,Reset"
|
|
line.long 0x18 "PTC_PUEN,Pull-Up Enable Register"
|
|
bitfld.long 0x18 31. " PUEN(31) ,Pull_Up Enable 31" "Tri-state,Pull up"
|
|
bitfld.long 0x18 30. " PUEN(30) ,Pull_Up Enable 30" "Tri-state,Pull up"
|
|
bitfld.long 0x18 29. " PUEN(29) ,Pull_Up Enable 29" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PUEN(28) ,Pull_Up Enable 28" "Tri-state,Pull up"
|
|
bitfld.long 0x18 27. " PUEN(27) ,Pull_Up Enable 27" "Tri-state,Pull up"
|
|
bitfld.long 0x18 26. " PUEN(26) ,Pull_Up Enable 26" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 25. " PUEN(25) ,Pull_Up Enable 25" "Tri-state,Pull up"
|
|
bitfld.long 0x18 24. " PUEN(24) ,Pull_Up Enable 24" "Tri-state,Pull up"
|
|
bitfld.long 0x18 23. " PUEN(23) ,Pull_Up Enable 23" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 22. " PUEN(22) ,Pull_Up Enable 22" "Tri-state,Pull up"
|
|
bitfld.long 0x18 21. " PUEN(21) ,Pull_Up Enable 21" "Tri-state,Pull up"
|
|
bitfld.long 0x18 20. " PUEN(20) ,Pull_Up Enable 20" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 19. " PUEN(19) ,Pull_Up Enable 19" "Tri-state,Pull up"
|
|
bitfld.long 0x18 18. " PUEN(18) ,Pull_Up Enable 18" "Tri-state,Pull up"
|
|
bitfld.long 0x18 17. " PUEN(17) ,Pull_Up Enable 17" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 16. " PUEN(16) ,Pull_Up Enable 16" "Tri-state,Pull up"
|
|
bitfld.long 0x18 15. " PUEN(15) ,Pull_Up Enable 15" "Tri-state,Pull up"
|
|
bitfld.long 0x18 14. " PUEN(14) ,Pull_Up Enable 14" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 13. " PUEN(13) ,Pull_Up Enable 13" "Tri-state,Pull up"
|
|
bitfld.long 0x18 12. " PUEN(12) ,Pull_Up Enable 12" "Tri-state,Pull up"
|
|
bitfld.long 0x18 11. " PUEN(11) ,Pull_Up Enable 11" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 10. " PUEN(10) ,Pull_Up Enable 10" "Tri-state,Pull up"
|
|
bitfld.long 0x18 9. " PUEN(9) ,Pull_Up Enable 9" "Tri-state,Pull up"
|
|
bitfld.long 0x18 8. " PUEN(8) ,Pull_Up Enable 8" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 7. " PUEN(7) ,Pull_Up Enable 7" "Tri-state,Pull up"
|
|
bitfld.long 0x18 6. " PUEN(6) ,Pull_Up Enable 6" "Tri-state,Pull up"
|
|
bitfld.long 0x18 5. " PUEN(5) ,Pull_Up Enable 5" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 4. " PUEN(4) ,Pull_Up Enable 4" "Tri-state,Pull up"
|
|
bitfld.long 0x18 3. " PUEN(3) ,Pull_Up Enable 3" "Tri-state,Pull up"
|
|
bitfld.long 0x18 2. " PUEN(2) ,Pull_Up Enable 2" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 1. " PUEN(1) ,Pull_Up Enable 1" "Tri-state,Pull up"
|
|
bitfld.long 0x18 0. " PUEN(0) ,Pull_Up Enable 0" "Tri-state,Pull up"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port D"
|
|
base ad:0x10015300
|
|
width 10.
|
|
group.long 0x00++0x1f
|
|
line.long 0x00 "PTD_DDIR,Data Direction Port A Register"
|
|
bitfld.long 0x00 31. " DDIR(31) ,Data Direction (31)" "Input,Output"
|
|
bitfld.long 0x00 30. " DDIR(30) ,Data Direction (30)" "Input,Output"
|
|
bitfld.long 0x00 29. " DDIR(29) ,Data Direction (29)" "Input,Output"
|
|
bitfld.long 0x00 28. " DDIR(28) ,Data Direction (28)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DDIR(27) ,Data Direction (27)" "Input,Output"
|
|
bitfld.long 0x00 26. " DDIR(26) ,Data Direction (26)" "Input,Output"
|
|
bitfld.long 0x00 25. " DDIR(25) ,Data Direction (25)" "Input,Output"
|
|
bitfld.long 0x00 24. " DDIR(24) ,Data Direction (24)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DDIR(23) ,Data Direction (23)" "Input,Output"
|
|
bitfld.long 0x00 22. " DDIR(22) ,Data Direction (22)" "Input,Output"
|
|
bitfld.long 0x00 21. " DDIR(21) ,Data Direction (21)" "Input,Output"
|
|
bitfld.long 0x00 20. " DDIR(20) ,Data Direction (20)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DDIR(19) ,Data Direction (19)" "Input,Output"
|
|
bitfld.long 0x00 18. " DDIR(18) ,Data Direction (18)" "Input,Output"
|
|
bitfld.long 0x00 17. " DDIR(17) ,Data Direction (17)" "Input,Output"
|
|
bitfld.long 0x00 16. " DDIR(16) ,Data Direction (16)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DDIR(15) ,Data Direction (15)" "Input,Output"
|
|
bitfld.long 0x00 14. " DDIR(14) ,Data Direction (14)" "Input,Output"
|
|
bitfld.long 0x00 13. " DDIR(13) ,Data Direction (13)" "Input,Output"
|
|
bitfld.long 0x00 12. " DDIR(12) ,Data Direction (12)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DDIR(11) ,Data Direction (11)" "Input,Output"
|
|
bitfld.long 0x00 10. " DDIR(10) ,Data Direction (10)" "Input,Output"
|
|
bitfld.long 0x00 9. " DDIR(9) ,Data Direction (9)" "Input,Output"
|
|
bitfld.long 0x00 8. " DDIR(8) ,Data Direction (8)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DDIR(7) ,Data Direction (7)" "Input,Output"
|
|
bitfld.long 0x00 6. " DDIR(6) ,Data Direction (6)" "Input,Output"
|
|
bitfld.long 0x00 5. " DDIR(5) ,Data Direction (5)" "Input,Output"
|
|
bitfld.long 0x00 4. " DDIR(4) ,Data Direction (4)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DDIR(3) ,Data Direction (3)" "Input,Output"
|
|
bitfld.long 0x00 2. " DDIR(2) ,Data Direction (2)" "Input,Output"
|
|
bitfld.long 0x00 1. " DDIR(1) ,Data Direction (1)" "Input,Output"
|
|
bitfld.long 0x00 0. " DDIR(0) ,Data Direction (0)" "Input,Output"
|
|
line.long 0x04 "PTD_OCR1,Output Configuration Register 1"
|
|
bitfld.long 0x04 30.--31. " OCR1(15) ,Output Configuration (15)" "Input A_IN[15],Input B_IN[15],Input C_IN[15],Data [15]"
|
|
bitfld.long 0x04 28.--29. " OCR1(14) ,Output Configuration (14)" "Input A_IN[14],Input B_IN[14],Input C_IN[14],Data [14]"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " OCR1(13) ,Output Configuration (13)" "Input A_IN[13],Input B_IN[13],Input C_IN[13],Data [13]"
|
|
bitfld.long 0x04 24.--25. " OCR1(12) ,Output Configuration (12)" "Input A_IN[12],Input B_IN[12],Input C_IN[12],Data [12]"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " OCR1(11) ,Output Configuration (11)" "Input A_IN[11],Input B_IN[11],Input C_IN[11],Data [11]"
|
|
bitfld.long 0x04 20.--21. " OCR1(10) ,Output Configuration (10)" "Input A_IN[10],Input B_IN[10],Input C_IN[10],Data [10]"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " OCR1(9) ,Output Configuration (9)" "Input A_IN[9],Input B_IN[9],Input C_IN[9],Data [9]"
|
|
bitfld.long 0x04 16.--17. " OCR1(8) ,Output Configuration (8)" "Input A_IN[8],Input B_IN[8],Input C_IN[8],Data [8]"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " OCR1(7) ,Output Configuration (7)" "Input A_IN[7],Input B_IN[7],Input C_IN[7],Data [7]"
|
|
bitfld.long 0x04 12.--13. " OCR1(6) ,Output Configuration (6)" "Input A_IN[6],Input B_IN[6],Input C_IN[6],Data [6]"
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " OCR1(5) ,Output Configuration (5)" "Input A_IN[5],Input B_IN[5],Input C_IN[5],Data [5]"
|
|
bitfld.long 0x04 8.--9. " OCR1(4) ,Output Configuration (4)" "Input A_IN[4],Input B_IN[4],Input C_IN[4],Data [4]"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " OCR1(3) ,Output Configuration (3)" "Input A_IN[3],Input B_IN[3],Input C_IN[3],Data [3]"
|
|
bitfld.long 0x04 4.--5. " OCR1(2) ,Output Configuration (2)" "Input A_IN[2],Input B_IN[2],Input C_IN[2],Data [2]"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " OCR1(1) ,Output Configuration (1)" "Input A_IN[1],Input B_IN[1],Input C_IN[1],Data [1]"
|
|
bitfld.long 0x04 0.--1. " OCR1(0) ,Output Configuration (0)" "Input A_IN[0],Input B_IN[0],Input C_IN[0],Data [0]"
|
|
line.long 0x08 "PTD_OCR2,Output Configuration Register 2"
|
|
bitfld.long 0x08 30.--31. " OCR2(31) ,Output Configuration (31)" "Input A_IN[31],Input B_IN[31],Input C_IN[31],Data [31]"
|
|
bitfld.long 0x08 28.--29. " OCR2(30) ,Output Configuration (30)" "Input A_IN[30],Input B_IN[30],Input C_IN[30],Data [30]"
|
|
textline " "
|
|
bitfld.long 0x08 26.--27. " OCR2(29) ,Output Configuration (29)" "Input A_IN[29],Input B_IN[29],Input C_IN[29],Data [29]"
|
|
bitfld.long 0x08 24.--25. " OCR2(28) ,Output Configuration (28)" "Input A_IN[28],Input B_IN[28],Input C_IN[28],Data [28]"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OCR2(27) ,Output Configuration (27)" "Input A_IN[27],Input B_IN[27],Input C_IN[27],Data [27]"
|
|
bitfld.long 0x08 20.--21. " OCR2(26) ,Output Configuration (26)" "Input A_IN[26],Input B_IN[26],Input C_IN[26],Data [26]"
|
|
textline " "
|
|
bitfld.long 0x08 18.--19. " OCR2(25) ,Output Configuration (25)" "Input A_IN[25],Input B_IN[25],Input C_IN[25],Data [25]"
|
|
bitfld.long 0x08 16.--17. " OCR2(24) ,Output Configuration (24)" "Input A_IN[24],Input B_IN[24],Input C_IN[24],Data [24]"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OCR2(23) ,Output Configuration (23)" "Input A_IN[23],Input B_IN[23],Input C_IN[23],Data [23]"
|
|
bitfld.long 0x08 12.--13. " OCR2(22) ,Output Configuration (22)" "Input A_IN[22],Input B_IN[22],Input C_IN[22],Data [22]"
|
|
textline " "
|
|
bitfld.long 0x08 10.--11. " OCR2(21) ,Output Configuration (21)" "Input A_IN[21],Input B_IN[21],Input C_IN[21],Data [21]"
|
|
bitfld.long 0x08 8.--9. " OCR2(20) ,Output Configuration (20)" "Input A_IN[20],Input B_IN[20],Input C_IN[20],Data [20]"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OCR2(19) ,Output Configuration (19)" "Input A_IN[19],Input B_IN[19],Input C_IN[19],Data [19]"
|
|
bitfld.long 0x08 4.--5. " OCR2(18) ,Output Configuration (18)" "Input A_IN[18],Input B_IN[18],Input C_IN[18],Data [18]"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OCR2(17) ,Output Configuration (17)" "Input A_IN[17],Input B_IN[17],Input C_IN[17],Data [17]"
|
|
bitfld.long 0x08 0.--1. " OCR2(16) ,Output Configuration (16)" "Input A_IN[16],Input B_IN[16],Input C_IN[16],Data [16]"
|
|
width 13.
|
|
line.long 0x0c "PTD_ICONFA1,Input Configuration Register A1"
|
|
bitfld.long 0x0c 30.--31. " ICONFA1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x0c 28.--29. " ICONFA1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 26.--27. " ICONFA1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x0c 24.--25. " ICONFA1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 22.--23. " ICONFA1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x0c 20.--21. " ICONFA1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 18.--19. " ICONFA1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x0c 16.--17. " ICONFA1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " ICONFA1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x0c 12.--13. " ICONFA1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 10.--11. " ICONFA1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x0c 8.--9. " ICONFA1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 6.--7. " ICONFA1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x0c 4.--5. " ICONFA1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 2.--3. " ICONFA1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x0c 0.--1. " ICONFA1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x10 "PTD_ICONFA2,Input Configuration Register A2"
|
|
bitfld.long 0x10 30.--31. " ICONFA2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x10 28.--29. " ICONFA2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 26.--27. " ICONFA2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x10 24.--25. " ICONFA2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ICONFA2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x10 20.--21. " ICONFA2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " ICONFA2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x10 16.--17. " ICONFA2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " ICONFA2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x10 12.--13. " ICONFA2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 10.--11. " ICONFA2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x10 8.--9. " ICONFA2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ICONFA2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x10 4.--5. " ICONFA2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " ICONFA2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x10 0.--1. " ICONFA2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
line.long 0x14 "PTD_ICONFB1,Input Configuration Register B1"
|
|
bitfld.long 0x14 30.--31. " ICONFB1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x14 28.--29. " ICONFB1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 26.--27. " ICONFB1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x14 24.--25. " ICONFB1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 22.--23. " ICONFB1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x14 20.--21. " ICONFB1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " ICONFB1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x14 16.--17. " ICONFB1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " ICONFB1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x14 12.--13. " ICONFB1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 10.--11. " ICONFB1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x14 8.--9. " ICONFB1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " ICONFB1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x14 4.--5. " ICONFB1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " ICONFB1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x14 0.--1. " ICONFB1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x18 "PTD_ICONFB2,Input Configuration Register B2"
|
|
bitfld.long 0x18 30.--31. " ICONFB2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x18 28.--29. " ICONFB2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 26.--27. " ICONFB2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x18 24.--25. " ICONFB2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 22.--23. " ICONFB2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x18 20.--21. " ICONFB2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " ICONFB2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x18 16.--17. " ICONFB2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " ICONFB2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x18 12.--13. " ICONFB2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 10.--11. " ICONFB2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x18 8.--9. " ICONFB2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " ICONFB2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x18 4.--5. " ICONFB2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " ICONFB2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x18 0.--1. " ICONFB2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
width 8.
|
|
line.long 0x1c "PTD_DR,Data Register"
|
|
bitfld.long 0x1c 31. " DR(31) ,Data Register 31" "Low,High"
|
|
bitfld.long 0x1c 30. " DR(30) ,Data Register 30" "Low,High"
|
|
bitfld.long 0x1c 29. " DR(29) ,Data Register 29" "Low,High"
|
|
bitfld.long 0x1c 28. " DR(28) ,Data Register 28" "Low,High"
|
|
bitfld.long 0x1c 27. " DR(27) ,Data Register 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 26. " DR(26) ,Data Register 26" "Low,High"
|
|
bitfld.long 0x1c 25. " DR(25) ,Data Register 25" "Low,High"
|
|
bitfld.long 0x1c 24. " DR(24) ,Data Register 24" "Low,High"
|
|
bitfld.long 0x1c 23. " DR(23) ,Data Register 23" "Low,High"
|
|
bitfld.long 0x1c 22. " DR(22) ,Data Register 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 21. " DR(21) ,Data Register 21" "Low,High"
|
|
bitfld.long 0x1c 20. " DR(20) ,Data Register 20" "Low,High"
|
|
bitfld.long 0x1c 19. " DR(19) ,Data Register 19" "Low,High"
|
|
bitfld.long 0x1c 18. " DR(18) ,Data Register 18" "Low,High"
|
|
bitfld.long 0x1c 17. " DR(17) ,Data Register 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 16. " DR(16) ,Data Register 16" "Low,High"
|
|
bitfld.long 0x1c 15. " DR(15) ,Data Register 15" "Low,High"
|
|
bitfld.long 0x1c 14. " DR(14) ,Data Register 14" "Low,High"
|
|
bitfld.long 0x1c 13. " DR(13) ,Data Register 13" "Low,High"
|
|
bitfld.long 0x1c 12. " DR(12) ,Data Register 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 11. " DR(11) ,Data Register 11" "Low,High"
|
|
bitfld.long 0x1c 10. " DR(10) ,Data Register 10" "Low,High"
|
|
bitfld.long 0x1c 9. " DR(9) ,Data Register 9" "Low,High"
|
|
bitfld.long 0x1c 8. " DR(8) ,Data Register 8" "Low,High"
|
|
bitfld.long 0x1c 7. " DR(7) ,Data Register 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 6. " DR(6) ,Data Register 6" "Low,High"
|
|
bitfld.long 0x1c 5. " DR(5) ,Data Register 5" "Low,High"
|
|
bitfld.long 0x1c 4. " DR(4) ,Data Register 4" "Low,High"
|
|
bitfld.long 0x1c 3. " DR(3) ,Data Register 3" "Low,High"
|
|
bitfld.long 0x1c 2. " DR(2) ,Data Register 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " DR(1) ,Data Register 1" "Low,High"
|
|
bitfld.long 0x1c 0. " DR(0) ,Data Register 0" "Low,High"
|
|
width 10.
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PTD_GIUS,GPIO In Use Register D"
|
|
bitfld.long 0x00 31. " GIUS(31) ,GPIO In Use Pin 31" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 30. " GIUS(30) ,GPIO In Use Pin 30" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 29. " GIUS(29) ,GPIO In Use Pin 29" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GIUS(28) ,GPIO In Use Pin 28" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 27. " GIUS(27) ,GPIO In Use Pin 27" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 26. " GIUS(26) ,GPIO In Use Pin 26" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GIUS(25) ,GPIO In Use Pin 25" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 24. " GIUS(24) ,GPIO In Use Pin 24" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 23. " GIUS(23) ,GPIO In Use Pin 23" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GIUS(22) ,GPIO In Use Pin 22" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 21. " GIUS(21) ,GPIO In Use Pin 21" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 20. " GIUS(20) ,GPIO In Use Pin 20" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GIUS(19) ,GPIO In Use Pin 19" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 18. " GIUS(18) ,GPIO In Use Pin 18" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 17. " GIUS(17) ,GPIO In Use Pin 17" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GIUS(16) ,GPIO In Use Pin 16" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 15. " GIUS(15) ,GPIO In Use Pin 15" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 14. " GIUS(14) ,GPIO In Use Pin 14" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GIUS(13) ,GPIO In Use Pin 13" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 12. " GIUS(12) ,GPIO In Use Pin 12" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 11. " GIUS(11) ,GPIO In Use Pin 11" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GIUS(10) ,GPIO In Use Pin 10" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 9. " GIUS(9) ,GPIO In Use Pin 9" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 8. " GIUS(8) ,GPIO In Use Pin 8" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GIUS(7) ,GPIO In Use Pin 7" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 6. " GIUS(6) ,GPIO In Use Pin 6" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 5. " GIUS(5) ,GPIO In Use Pin 5" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GIUS(4) ,GPIO In Use Pin 4" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 3. " GIUS(3) ,GPIO In Use Pin 3" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 2. " GIUS(2) ,GPIO In Use Pin 2" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GIUS(1) ,GPIO In Use Pin 1" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 0. " GIUS(0) ,GPIO In Use Pin 0" "Multiplexed,GPIO"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PTD_SSR,Sample Status Register"
|
|
bitfld.long 0x00 31. " SSR31 ,Sample Status Pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " SSR30 ,Sample Status Pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " SSR29 ,Sample Status Pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " SSR28 ,Sample Status Pin 28" "Low,High"
|
|
bitfld.long 0x00 27. " SSR27 ,Sample Status Pin 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SSR26 ,Sample Status Pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " SSR25 ,Sample Status Pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " SSR24 ,Sample Status Pin 24" "Low,High"
|
|
bitfld.long 0x00 23. " SSR23 ,Sample Status Pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " SSR22 ,Sample Status Pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SSR21 ,Sample Status Pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " SSR20 ,Sample Status Pin 20" "Low,High"
|
|
bitfld.long 0x00 19. " SSR19 ,Sample Status Pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " SSR18 ,Sample Status Pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " SSR17 ,Sample Status Pin 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSR16 ,Sample Status Pin 16" "Low,High"
|
|
bitfld.long 0x00 15. " SSR15 ,Sample Status Pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " SSR14 ,Sample Status Pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " SSR13 ,Sample Status Pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " SSR12 ,Sample Status Pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SSR11 ,Sample Status Pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " SSR10 ,Sample Status Pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " SSR9 ,Sample Status Pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " SSR8 ,Sample Status Pin 8" "Low,High"
|
|
bitfld.long 0x00 7. " SSR7 ,Sample Status Pin 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SSR6 ,Sample Status Pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " SSR5 ,Sample Status Pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " SSR4 ,Sample Status Pin 4" "Low,High"
|
|
bitfld.long 0x00 3. " SSR3 ,Sample Status Pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " SSR2 ,Sample Status Pin 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SSR1 ,Sample Status Pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " SSR0 ,Sample Status Pin 0" "Low,High"
|
|
group.long 0x28++0x1b
|
|
line.long 0x00 "PTD_ICR1,Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR1(15) ,Interrupt Configuration 15" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 28.--29. " ICR1(14) ,Interrupt Configuration 14" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 26.--27. " ICR1(13) ,Interrupt Configuration 13" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1(12) ,Interrupt Configuration 12" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 22.--23. " ICR1(11) ,Interrupt Configuration 11" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 20.--21. " ICR1(10) ,Interrupt Configuration 10" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1(9) ,Interrupt Configuration 9" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 16.--17. " ICR1(8) ,Interrupt Configuration 8" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 14.--15. " ICR1(7) ,Interrupt Configuration 7" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1(6) ,Interrupt Configuration 6" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 10.--11. " ICR1(5) ,Interrupt Configuration 5" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 8.--9. " ICR1(4) ,Interrupt Configuration 4" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1(3) ,Interrupt Configuration 3" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 4.--5. " ICR1(2) ,Interrupt Configuration 2" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 2.--3. " ICR1(1) ,Interrupt Configuration 1" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1(0) ,Interrupt Configuration 0" "Rising edge,Falling edge,High level,Low level"
|
|
line.long 0x04 "PTD_ICR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x04 30.--31. " ICR2(31) ,Interrupt Configuration 31" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 28.--29. " ICR2(30) ,Interrupt Configuration 30" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 26.--27. " ICR2(29) ,Interrupt Configuration 29" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2(28) ,Interrupt Configuration 28" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 22.--23. " ICR2(27) ,Interrupt Configuration 27" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 20.--21. " ICR2(26) ,Interrupt Configuration 26" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2(25) ,Interrupt Configuration 25" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 16.--17. " ICR2(24) ,Interrupt Configuration 24" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 14.--15. " ICR2(23) ,Interrupt Configuration 23" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2(22) ,Interrupt Configuration 22" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 10.--11. " ICR2(21) ,Interrupt Configuration 21" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 8.--9. " ICR2(20) ,Interrupt Configuration 20" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2(19) ,Interrupt Configuration 19" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 4.--5. " ICR2(18) ,Interrupt Configuration 18" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 2.--3. " ICR2(17) ,Interrupt Configuration 17" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2(16) ,Interrupt Configuration 16" "Rising edge,Falling edge,High level,Low level"
|
|
width 9.
|
|
line.long 0x08 "PTD_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR(31) ,Interrupt Mask 31" "Masked,Not masked"
|
|
bitfld.long 0x08 30. " IMR(30) ,Interrupt Mask 30" "Masked,Not masked"
|
|
bitfld.long 0x08 29. " IMR(29) ,Interrupt Mask 29" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR(28) ,Interrupt Mask 28" "Masked,Not masked"
|
|
bitfld.long 0x08 27. " IMR(27) ,Interrupt Mask 27" "Masked,Not masked"
|
|
bitfld.long 0x08 26. " IMR(26) ,Interrupt Mask 26" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR(25) ,Interrupt Mask 25" "Masked,Not masked"
|
|
bitfld.long 0x08 24. " IMR(24) ,Interrupt Mask 24" "Masked,Not masked"
|
|
bitfld.long 0x08 23. " IMR(23) ,Interrupt Mask 23" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR(22) ,Interrupt Mask 22" "Masked,Not masked"
|
|
bitfld.long 0x08 21. " IMR(21) ,Interrupt Mask 21" "Masked,Not masked"
|
|
bitfld.long 0x08 20. " IMR(20) ,Interrupt Mask 20" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR(19) ,Interrupt Mask 19" "Masked,Not masked"
|
|
bitfld.long 0x08 18. " IMR(18) ,Interrupt Mask 18" "Masked,Not masked"
|
|
bitfld.long 0x08 17. " IMR(17) ,Interrupt Mask 17" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR(16) ,Interrupt Mask 16" "Masked,Not masked"
|
|
bitfld.long 0x08 15. " IMR(15) ,Interrupt Mask 15" "Masked,Not masked"
|
|
bitfld.long 0x08 14. " IMR(14) ,Interrupt Mask 14" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR(13) ,Interrupt Mask 13" "Masked,Not masked"
|
|
bitfld.long 0x08 12. " IMR(12) ,Interrupt Mask 12" "Masked,Not masked"
|
|
bitfld.long 0x08 11. " IMR(11) ,Interrupt Mask 11" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR(10) ,Interrupt Mask 10" "Masked,Not masked"
|
|
bitfld.long 0x08 9. " IMR(9) ,Interrupt Mask 9" "Masked,Not masked"
|
|
bitfld.long 0x08 8. " IMR(8) ,Interrupt Mask 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR(7) ,Interrupt Mask 7" "Masked,Not masked"
|
|
bitfld.long 0x08 6. " IMR(6) ,Interrupt Mask 6" "Masked,Not masked"
|
|
bitfld.long 0x08 5. " IMR(5) ,Interrupt Mask 5" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR(4) ,Interrupt Mask 4" "Masked,Not masked"
|
|
bitfld.long 0x08 3. " IMR(3) ,Interrupt Mask 3" "Masked,Not masked"
|
|
bitfld.long 0x08 2. " IMR(2) ,Interrupt Mask 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR(1) ,Interrupt Mask 1" "Masked,Not masked"
|
|
bitfld.long 0x08 0. " IMR(0) ,Interrupt Mask 0" "Masked,Not masked"
|
|
line.long 0x0c "PTD_ISR,Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " ISR(31) ,Interrupt Status 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 30. " ISR(30) ,Interrupt Status 30" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 29. " ISR(29) ,Interrupt Status 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 28. " ISR(28) ,Interrupt Status 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 27. " ISR(27) ,Interrupt Status 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 26. " ISR(26) ,Interrupt Status 26" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " ISR(25) ,Interrupt Status 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 24. " ISR(24) ,Interrupt Status 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 23. " ISR(23) ,Interrupt Status 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 22. " ISR(22) ,Interrupt Status 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 21. " ISR(21) ,Interrupt Status 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 20. " ISR(20) ,Interrupt Status 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " ISR(19) ,Interrupt Status 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 18. " ISR(18) ,Interrupt Status 18" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 17. " ISR(17) ,Interrupt Status 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 16. " ISR(16) ,Interrupt Status 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 15. " ISR(15) ,Interrupt Status 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 14. " ISR(14) ,Interrupt Status 14" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " ISR(13) ,Interrupt Status 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 12. " ISR(12) ,Interrupt Status 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 11. " ISR(11) ,Interrupt Status 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 10. " ISR(10) ,Interrupt Status 10" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 9. " ISR(9) ,Interrupt Status 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 8. " ISR(8) ,Interrupt Status 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " ISR(7) ,Interrupt Status 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 6. " ISR(6) ,Interrupt Status 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 5. " ISR(5) ,Interrupt Status 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 4. " ISR(4) ,Interrupt Status 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 3. " ISR(3) ,Interrupt Status 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 2. " ISR(2) ,Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " ISR(1) ,Interrupt Status 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 0. " ISR(0) ,Interrupt Status 0" "No interrupt,Interrupt"
|
|
line.long 0x10 "PTD_GPR,General Purpose Register"
|
|
bitfld.long 0x10 31. " GPR(31) ,General Purpose 31" "Primary,Alternate"
|
|
bitfld.long 0x10 30. " GPR(30) ,General Purpose 30" "Primary,Alternate"
|
|
bitfld.long 0x10 29. " GPR(29) ,General Purpose 29" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 28. " GPR(28) ,General Purpose 28" "Primary,Alternate"
|
|
bitfld.long 0x10 27. " GPR(27) ,General Purpose 27" "Primary,Alternate"
|
|
bitfld.long 0x10 26. " GPR(26) ,General Purpose 26" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 25. " GPR(25) ,General Purpose 25" "Primary,Alternate"
|
|
bitfld.long 0x10 24. " GPR(24) ,General Purpose 24" "Primary,Alternate"
|
|
bitfld.long 0x10 23. " GPR(23) ,General Purpose 23" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 22. " GPR(22) ,General Purpose 22" "Primary,Alternate"
|
|
bitfld.long 0x10 21. " GPR(21) ,General Purpose 21" "Primary,Alternate"
|
|
bitfld.long 0x10 20. " GPR(20) ,General Purpose 20" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 19. " GPR(19) ,General Purpose 19" "Primary,Alternate"
|
|
bitfld.long 0x10 18. " GPR(18) ,General Purpose 18" "Primary,Alternate"
|
|
bitfld.long 0x10 17. " GPR(17) ,General Purpose 17" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 16. " GPR(16) ,General Purpose 16" "Primary,Alternate"
|
|
bitfld.long 0x10 15. " GPR(15) ,General Purpose 15" "Primary,Alternate"
|
|
bitfld.long 0x10 14. " GPR(14) ,General Purpose 14" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 13. " GPR(13) ,General Purpose 13" "Primary,Alternate"
|
|
bitfld.long 0x10 12. " GPR(12) ,General Purpose 12" "Primary,Alternate"
|
|
bitfld.long 0x10 11. " GPR(11) ,General Purpose 11" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 10. " GPR(10) ,General Purpose 10" "Primary,Alternate"
|
|
bitfld.long 0x10 9. " GPR(9) ,General Purpose 9" "Primary,Alternate"
|
|
bitfld.long 0x10 8. " GPR(8) ,General Purpose 8" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 7. " GPR(7) ,General Purpose 7" "Primary,Alternate"
|
|
bitfld.long 0x10 6. " GPR(6) ,General Purpose 6" "Primary,Alternate"
|
|
bitfld.long 0x10 5. " GPR(5) ,General Purpose 5" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 4. " GPR(4) ,General Purpose 4" "Primary,Alternate"
|
|
bitfld.long 0x10 3. " GPR(3) ,General Purpose 3" "Primary,Alternate"
|
|
bitfld.long 0x10 2. " GPR(2) ,General Purpose 2" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 1. " GPR(1) ,General Purpose 1" "Primary,Alternate"
|
|
bitfld.long 0x10 0. " GPR(0) ,General Purpose 0" "Primary,Alternate"
|
|
line.long 0x14 "PTD_SWR,Software Reset Register"
|
|
bitfld.long 0x14 0. " SWR ,Software Reset" "No effect,Reset"
|
|
line.long 0x18 "PTD_PUEN,Pull-Up Enable Register"
|
|
bitfld.long 0x18 31. " PUEN(31) ,Pull_Up Enable 31" "Tri-state,Pull up"
|
|
bitfld.long 0x18 30. " PUEN(30) ,Pull_Up Enable 30" "Tri-state,Pull up"
|
|
bitfld.long 0x18 29. " PUEN(29) ,Pull_Up Enable 29" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PUEN(28) ,Pull_Up Enable 28" "Tri-state,Pull up"
|
|
bitfld.long 0x18 27. " PUEN(27) ,Pull_Up Enable 27" "Tri-state,Pull up"
|
|
bitfld.long 0x18 26. " PUEN(26) ,Pull_Up Enable 26" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 25. " PUEN(25) ,Pull_Up Enable 25" "Tri-state,Pull up"
|
|
bitfld.long 0x18 24. " PUEN(24) ,Pull_Up Enable 24" "Tri-state,Pull up"
|
|
bitfld.long 0x18 23. " PUEN(23) ,Pull_Up Enable 23" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 22. " PUEN(22) ,Pull_Up Enable 22" "Tri-state,Pull up"
|
|
bitfld.long 0x18 21. " PUEN(21) ,Pull_Up Enable 21" "Tri-state,Pull up"
|
|
bitfld.long 0x18 20. " PUEN(20) ,Pull_Up Enable 20" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 19. " PUEN(19) ,Pull_Up Enable 19" "Tri-state,Pull up"
|
|
bitfld.long 0x18 18. " PUEN(18) ,Pull_Up Enable 18" "Tri-state,Pull up"
|
|
bitfld.long 0x18 17. " PUEN(17) ,Pull_Up Enable 17" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 16. " PUEN(16) ,Pull_Up Enable 16" "Tri-state,Pull up"
|
|
bitfld.long 0x18 15. " PUEN(15) ,Pull_Up Enable 15" "Tri-state,Pull up"
|
|
bitfld.long 0x18 14. " PUEN(14) ,Pull_Up Enable 14" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 13. " PUEN(13) ,Pull_Up Enable 13" "Tri-state,Pull up"
|
|
bitfld.long 0x18 12. " PUEN(12) ,Pull_Up Enable 12" "Tri-state,Pull up"
|
|
bitfld.long 0x18 11. " PUEN(11) ,Pull_Up Enable 11" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 10. " PUEN(10) ,Pull_Up Enable 10" "Tri-state,Pull up"
|
|
bitfld.long 0x18 9. " PUEN(9) ,Pull_Up Enable 9" "Tri-state,Pull up"
|
|
bitfld.long 0x18 8. " PUEN(8) ,Pull_Up Enable 8" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 7. " PUEN(7) ,Pull_Up Enable 7" "Tri-state,Pull up"
|
|
bitfld.long 0x18 6. " PUEN(6) ,Pull_Up Enable 6" "Tri-state,Pull up"
|
|
bitfld.long 0x18 5. " PUEN(5) ,Pull_Up Enable 5" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 4. " PUEN(4) ,Pull_Up Enable 4" "Tri-state,Pull up"
|
|
bitfld.long 0x18 3. " PUEN(3) ,Pull_Up Enable 3" "Tri-state,Pull up"
|
|
bitfld.long 0x18 2. " PUEN(2) ,Pull_Up Enable 2" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 1. " PUEN(1) ,Pull_Up Enable 1" "Tri-state,Pull up"
|
|
bitfld.long 0x18 0. " PUEN(0) ,Pull_Up Enable 0" "Tri-state,Pull up"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port E"
|
|
base ad:0x10015400
|
|
width 10.
|
|
group.long 0x00++0x1f
|
|
line.long 0x00 "PTE_DDIR,Data Direction Port A Register"
|
|
bitfld.long 0x00 31. " DDIR(31) ,Data Direction (31)" "Input,Output"
|
|
bitfld.long 0x00 30. " DDIR(30) ,Data Direction (30)" "Input,Output"
|
|
bitfld.long 0x00 29. " DDIR(29) ,Data Direction (29)" "Input,Output"
|
|
bitfld.long 0x00 28. " DDIR(28) ,Data Direction (28)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DDIR(27) ,Data Direction (27)" "Input,Output"
|
|
bitfld.long 0x00 26. " DDIR(26) ,Data Direction (26)" "Input,Output"
|
|
bitfld.long 0x00 25. " DDIR(25) ,Data Direction (25)" "Input,Output"
|
|
bitfld.long 0x00 24. " DDIR(24) ,Data Direction (24)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DDIR(23) ,Data Direction (23)" "Input,Output"
|
|
bitfld.long 0x00 22. " DDIR(22) ,Data Direction (22)" "Input,Output"
|
|
bitfld.long 0x00 21. " DDIR(21) ,Data Direction (21)" "Input,Output"
|
|
bitfld.long 0x00 20. " DDIR(20) ,Data Direction (20)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DDIR(19) ,Data Direction (19)" "Input,Output"
|
|
bitfld.long 0x00 18. " DDIR(18) ,Data Direction (18)" "Input,Output"
|
|
bitfld.long 0x00 17. " DDIR(17) ,Data Direction (17)" "Input,Output"
|
|
bitfld.long 0x00 16. " DDIR(16) ,Data Direction (16)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DDIR(15) ,Data Direction (15)" "Input,Output"
|
|
bitfld.long 0x00 14. " DDIR(14) ,Data Direction (14)" "Input,Output"
|
|
bitfld.long 0x00 13. " DDIR(13) ,Data Direction (13)" "Input,Output"
|
|
bitfld.long 0x00 12. " DDIR(12) ,Data Direction (12)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DDIR(11) ,Data Direction (11)" "Input,Output"
|
|
bitfld.long 0x00 10. " DDIR(10) ,Data Direction (10)" "Input,Output"
|
|
bitfld.long 0x00 9. " DDIR(9) ,Data Direction (9)" "Input,Output"
|
|
bitfld.long 0x00 8. " DDIR(8) ,Data Direction (8)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DDIR(7) ,Data Direction (7)" "Input,Output"
|
|
bitfld.long 0x00 6. " DDIR(6) ,Data Direction (6)" "Input,Output"
|
|
bitfld.long 0x00 5. " DDIR(5) ,Data Direction (5)" "Input,Output"
|
|
bitfld.long 0x00 4. " DDIR(4) ,Data Direction (4)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DDIR(3) ,Data Direction (3)" "Input,Output"
|
|
bitfld.long 0x00 2. " DDIR(2) ,Data Direction (2)" "Input,Output"
|
|
bitfld.long 0x00 1. " DDIR(1) ,Data Direction (1)" "Input,Output"
|
|
bitfld.long 0x00 0. " DDIR(0) ,Data Direction (0)" "Input,Output"
|
|
line.long 0x04 "PTE_OCR1,Output Configuration Register 1"
|
|
bitfld.long 0x04 30.--31. " OCR1(15) ,Output Configuration (15)" "Input A_IN[15],Input B_IN[15],Input C_IN[15],Data [15]"
|
|
bitfld.long 0x04 28.--29. " OCR1(14) ,Output Configuration (14)" "Input A_IN[14],Input B_IN[14],Input C_IN[14],Data [14]"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " OCR1(13) ,Output Configuration (13)" "Input A_IN[13],Input B_IN[13],Input C_IN[13],Data [13]"
|
|
bitfld.long 0x04 24.--25. " OCR1(12) ,Output Configuration (12)" "Input A_IN[12],Input B_IN[12],Input C_IN[12],Data [12]"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " OCR1(11) ,Output Configuration (11)" "Input A_IN[11],Input B_IN[11],Input C_IN[11],Data [11]"
|
|
bitfld.long 0x04 20.--21. " OCR1(10) ,Output Configuration (10)" "Input A_IN[10],Input B_IN[10],Input C_IN[10],Data [10]"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " OCR1(9) ,Output Configuration (9)" "Input A_IN[9],Input B_IN[9],Input C_IN[9],Data [9]"
|
|
bitfld.long 0x04 16.--17. " OCR1(8) ,Output Configuration (8)" "Input A_IN[8],Input B_IN[8],Input C_IN[8],Data [8]"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " OCR1(7) ,Output Configuration (7)" "Input A_IN[7],Input B_IN[7],Input C_IN[7],Data [7]"
|
|
bitfld.long 0x04 12.--13. " OCR1(6) ,Output Configuration (6)" "Input A_IN[6],Input B_IN[6],Input C_IN[6],Data [6]"
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " OCR1(5) ,Output Configuration (5)" "Input A_IN[5],Input B_IN[5],Input C_IN[5],Data [5]"
|
|
bitfld.long 0x04 8.--9. " OCR1(4) ,Output Configuration (4)" "Input A_IN[4],Input B_IN[4],Input C_IN[4],Data [4]"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " OCR1(3) ,Output Configuration (3)" "Input A_IN[3],Input B_IN[3],Input C_IN[3],Data [3]"
|
|
bitfld.long 0x04 4.--5. " OCR1(2) ,Output Configuration (2)" "Input A_IN[2],Input B_IN[2],Input C_IN[2],Data [2]"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " OCR1(1) ,Output Configuration (1)" "Input A_IN[1],Input B_IN[1],Input C_IN[1],Data [1]"
|
|
bitfld.long 0x04 0.--1. " OCR1(0) ,Output Configuration (0)" "Input A_IN[0],Input B_IN[0],Input C_IN[0],Data [0]"
|
|
line.long 0x08 "PTE_OCR2,Output Configuration Register 2"
|
|
bitfld.long 0x08 30.--31. " OCR2(31) ,Output Configuration (31)" "Input A_IN[31],Input B_IN[31],Input C_IN[31],Data [31]"
|
|
bitfld.long 0x08 28.--29. " OCR2(30) ,Output Configuration (30)" "Input A_IN[30],Input B_IN[30],Input C_IN[30],Data [30]"
|
|
textline " "
|
|
bitfld.long 0x08 26.--27. " OCR2(29) ,Output Configuration (29)" "Input A_IN[29],Input B_IN[29],Input C_IN[29],Data [29]"
|
|
bitfld.long 0x08 24.--25. " OCR2(28) ,Output Configuration (28)" "Input A_IN[28],Input B_IN[28],Input C_IN[28],Data [28]"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OCR2(27) ,Output Configuration (27)" "Input A_IN[27],Input B_IN[27],Input C_IN[27],Data [27]"
|
|
bitfld.long 0x08 20.--21. " OCR2(26) ,Output Configuration (26)" "Input A_IN[26],Input B_IN[26],Input C_IN[26],Data [26]"
|
|
textline " "
|
|
bitfld.long 0x08 18.--19. " OCR2(25) ,Output Configuration (25)" "Input A_IN[25],Input B_IN[25],Input C_IN[25],Data [25]"
|
|
bitfld.long 0x08 16.--17. " OCR2(24) ,Output Configuration (24)" "Input A_IN[24],Input B_IN[24],Input C_IN[24],Data [24]"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OCR2(23) ,Output Configuration (23)" "Input A_IN[23],Input B_IN[23],Input C_IN[23],Data [23]"
|
|
bitfld.long 0x08 12.--13. " OCR2(22) ,Output Configuration (22)" "Input A_IN[22],Input B_IN[22],Input C_IN[22],Data [22]"
|
|
textline " "
|
|
bitfld.long 0x08 10.--11. " OCR2(21) ,Output Configuration (21)" "Input A_IN[21],Input B_IN[21],Input C_IN[21],Data [21]"
|
|
bitfld.long 0x08 8.--9. " OCR2(20) ,Output Configuration (20)" "Input A_IN[20],Input B_IN[20],Input C_IN[20],Data [20]"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OCR2(19) ,Output Configuration (19)" "Input A_IN[19],Input B_IN[19],Input C_IN[19],Data [19]"
|
|
bitfld.long 0x08 4.--5. " OCR2(18) ,Output Configuration (18)" "Input A_IN[18],Input B_IN[18],Input C_IN[18],Data [18]"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OCR2(17) ,Output Configuration (17)" "Input A_IN[17],Input B_IN[17],Input C_IN[17],Data [17]"
|
|
bitfld.long 0x08 0.--1. " OCR2(16) ,Output Configuration (16)" "Input A_IN[16],Input B_IN[16],Input C_IN[16],Data [16]"
|
|
width 13.
|
|
line.long 0x0c "PTE_ICONFA1,Input Configuration Register A1"
|
|
bitfld.long 0x0c 30.--31. " ICONFA1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x0c 28.--29. " ICONFA1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 26.--27. " ICONFA1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x0c 24.--25. " ICONFA1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 22.--23. " ICONFA1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x0c 20.--21. " ICONFA1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 18.--19. " ICONFA1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x0c 16.--17. " ICONFA1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " ICONFA1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x0c 12.--13. " ICONFA1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 10.--11. " ICONFA1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x0c 8.--9. " ICONFA1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 6.--7. " ICONFA1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x0c 4.--5. " ICONFA1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 2.--3. " ICONFA1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x0c 0.--1. " ICONFA1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x10 "PTE_ICONFA2,Input Configuration Register A2"
|
|
bitfld.long 0x10 30.--31. " ICONFA2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x10 28.--29. " ICONFA2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 26.--27. " ICONFA2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x10 24.--25. " ICONFA2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ICONFA2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x10 20.--21. " ICONFA2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " ICONFA2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x10 16.--17. " ICONFA2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " ICONFA2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x10 12.--13. " ICONFA2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 10.--11. " ICONFA2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x10 8.--9. " ICONFA2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ICONFA2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x10 4.--5. " ICONFA2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " ICONFA2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x10 0.--1. " ICONFA2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
line.long 0x14 "PTE_ICONFB1,Input Configuration Register B1"
|
|
bitfld.long 0x14 30.--31. " ICONFB1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x14 28.--29. " ICONFB1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 26.--27. " ICONFB1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x14 24.--25. " ICONFB1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 22.--23. " ICONFB1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x14 20.--21. " ICONFB1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " ICONFB1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x14 16.--17. " ICONFB1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " ICONFB1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x14 12.--13. " ICONFB1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 10.--11. " ICONFB1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x14 8.--9. " ICONFB1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " ICONFB1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x14 4.--5. " ICONFB1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " ICONFB1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x14 0.--1. " ICONFB1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x18 "PTE_ICONFB2,Input Configuration Register B2"
|
|
bitfld.long 0x18 30.--31. " ICONFB2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x18 28.--29. " ICONFB2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 26.--27. " ICONFB2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x18 24.--25. " ICONFB2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 22.--23. " ICONFB2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x18 20.--21. " ICONFB2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " ICONFB2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x18 16.--17. " ICONFB2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " ICONFB2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x18 12.--13. " ICONFB2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 10.--11. " ICONFB2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x18 8.--9. " ICONFB2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " ICONFB2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x18 4.--5. " ICONFB2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " ICONFB2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x18 0.--1. " ICONFB2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
width 8.
|
|
line.long 0x1c "PTE_DR,Data Register"
|
|
bitfld.long 0x1c 31. " DR(31) ,Data Register 31" "Low,High"
|
|
bitfld.long 0x1c 30. " DR(30) ,Data Register 30" "Low,High"
|
|
bitfld.long 0x1c 29. " DR(29) ,Data Register 29" "Low,High"
|
|
bitfld.long 0x1c 28. " DR(28) ,Data Register 28" "Low,High"
|
|
bitfld.long 0x1c 27. " DR(27) ,Data Register 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 26. " DR(26) ,Data Register 26" "Low,High"
|
|
bitfld.long 0x1c 25. " DR(25) ,Data Register 25" "Low,High"
|
|
bitfld.long 0x1c 24. " DR(24) ,Data Register 24" "Low,High"
|
|
bitfld.long 0x1c 23. " DR(23) ,Data Register 23" "Low,High"
|
|
bitfld.long 0x1c 22. " DR(22) ,Data Register 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 21. " DR(21) ,Data Register 21" "Low,High"
|
|
bitfld.long 0x1c 20. " DR(20) ,Data Register 20" "Low,High"
|
|
bitfld.long 0x1c 19. " DR(19) ,Data Register 19" "Low,High"
|
|
bitfld.long 0x1c 18. " DR(18) ,Data Register 18" "Low,High"
|
|
bitfld.long 0x1c 17. " DR(17) ,Data Register 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 16. " DR(16) ,Data Register 16" "Low,High"
|
|
bitfld.long 0x1c 15. " DR(15) ,Data Register 15" "Low,High"
|
|
bitfld.long 0x1c 14. " DR(14) ,Data Register 14" "Low,High"
|
|
bitfld.long 0x1c 13. " DR(13) ,Data Register 13" "Low,High"
|
|
bitfld.long 0x1c 12. " DR(12) ,Data Register 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 11. " DR(11) ,Data Register 11" "Low,High"
|
|
bitfld.long 0x1c 10. " DR(10) ,Data Register 10" "Low,High"
|
|
bitfld.long 0x1c 9. " DR(9) ,Data Register 9" "Low,High"
|
|
bitfld.long 0x1c 8. " DR(8) ,Data Register 8" "Low,High"
|
|
bitfld.long 0x1c 7. " DR(7) ,Data Register 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 6. " DR(6) ,Data Register 6" "Low,High"
|
|
bitfld.long 0x1c 5. " DR(5) ,Data Register 5" "Low,High"
|
|
bitfld.long 0x1c 4. " DR(4) ,Data Register 4" "Low,High"
|
|
bitfld.long 0x1c 3. " DR(3) ,Data Register 3" "Low,High"
|
|
bitfld.long 0x1c 2. " DR(2) ,Data Register 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " DR(1) ,Data Register 1" "Low,High"
|
|
bitfld.long 0x1c 0. " DR(0) ,Data Register 0" "Low,High"
|
|
width 10.
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PTE_GIUS,GPIO In Use Register E"
|
|
bitfld.long 0x00 31. " GIUS(31) ,GPIO In Use Pin 31" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 30. " GIUS(30) ,GPIO In Use Pin 30" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 29. " GIUS(29) ,GPIO In Use Pin 29" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GIUS(28) ,GPIO In Use Pin 28" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 27. " GIUS(27) ,GPIO In Use Pin 27" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 26. " GIUS(26) ,GPIO In Use Pin 26" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GIUS(23) ,GPIO In Use Pin 23" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 22. " GIUS(22) ,GPIO In Use Pin 22" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 21. " GIUS(21) ,GPIO In Use Pin 21" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 20. " GIUS(20) ,GPIO In Use Pin 20" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 19. " GIUS(19) ,GPIO In Use Pin 19" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 18. " GIUS(18) ,GPIO In Use Pin 18" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 17. " GIUS(17) ,GPIO In Use Pin 17" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 16. " GIUS(16) ,GPIO In Use Pin 16" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 15. " GIUS(15) ,GPIO In Use Pin 15" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 14. " GIUS(14) ,GPIO In Use Pin 14" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 13. " GIUS(13) ,GPIO In Use Pin 13" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 12. " GIUS(12) ,GPIO In Use Pin 12" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GIUS(11) ,GPIO In Use Pin 11" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 10. " GIUS(10) ,GPIO In Use Pin 10" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 9. " GIUS(9) ,GPIO In Use Pin 9" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GIUS(8) ,GPIO In Use Pin 8" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 7. " GIUS(7) ,GPIO In Use Pin 7" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 6. " GIUS(6) ,GPIO In Use Pin 6" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " GIUS(5) ,GPIO In Use Pin 5" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 4. " GIUS(4) ,GPIO In Use Pin 4" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 3. " GIUS(3) ,GPIO In Use Pin 3" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 2. " GIUS(2) ,GPIO In Use Pin 2" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 1. " GIUS(1) ,GPIO In Use Pin 1" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 0. " GIUS(0) ,GPIO In Use Pin 0" "Multiplexed,GPIO"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PTE_SSR,Sample Status Register"
|
|
bitfld.long 0x00 31. " SSR31 ,Sample Status Pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " SSR30 ,Sample Status Pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " SSR29 ,Sample Status Pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " SSR28 ,Sample Status Pin 28" "Low,High"
|
|
bitfld.long 0x00 27. " SSR27 ,Sample Status Pin 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SSR26 ,Sample Status Pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " SSR25 ,Sample Status Pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " SSR24 ,Sample Status Pin 24" "Low,High"
|
|
bitfld.long 0x00 23. " SSR23 ,Sample Status Pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " SSR22 ,Sample Status Pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SSR21 ,Sample Status Pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " SSR20 ,Sample Status Pin 20" "Low,High"
|
|
bitfld.long 0x00 19. " SSR19 ,Sample Status Pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " SSR18 ,Sample Status Pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " SSR17 ,Sample Status Pin 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSR16 ,Sample Status Pin 16" "Low,High"
|
|
bitfld.long 0x00 15. " SSR15 ,Sample Status Pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " SSR14 ,Sample Status Pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " SSR13 ,Sample Status Pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " SSR12 ,Sample Status Pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SSR11 ,Sample Status Pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " SSR10 ,Sample Status Pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " SSR9 ,Sample Status Pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " SSR8 ,Sample Status Pin 8" "Low,High"
|
|
bitfld.long 0x00 7. " SSR7 ,Sample Status Pin 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SSR6 ,Sample Status Pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " SSR5 ,Sample Status Pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " SSR4 ,Sample Status Pin 4" "Low,High"
|
|
bitfld.long 0x00 3. " SSR3 ,Sample Status Pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " SSR2 ,Sample Status Pin 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SSR1 ,Sample Status Pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " SSR0 ,Sample Status Pin 0" "Low,High"
|
|
group.long 0x28++0x1b
|
|
line.long 0x00 "PTE_ICR1,Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR1(15) ,Interrupt Configuration 15" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 28.--29. " ICR1(14) ,Interrupt Configuration 14" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 26.--27. " ICR1(13) ,Interrupt Configuration 13" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1(12) ,Interrupt Configuration 12" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 22.--23. " ICR1(11) ,Interrupt Configuration 11" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 20.--21. " ICR1(10) ,Interrupt Configuration 10" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1(9) ,Interrupt Configuration 9" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 16.--17. " ICR1(8) ,Interrupt Configuration 8" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 14.--15. " ICR1(7) ,Interrupt Configuration 7" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1(6) ,Interrupt Configuration 6" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 10.--11. " ICR1(5) ,Interrupt Configuration 5" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 8.--9. " ICR1(4) ,Interrupt Configuration 4" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1(3) ,Interrupt Configuration 3" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 4.--5. " ICR1(2) ,Interrupt Configuration 2" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 2.--3. " ICR1(1) ,Interrupt Configuration 1" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1(0) ,Interrupt Configuration 0" "Rising edge,Falling edge,High level,Low level"
|
|
line.long 0x04 "PTE_ICR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x04 30.--31. " ICR2(31) ,Interrupt Configuration 31" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 28.--29. " ICR2(30) ,Interrupt Configuration 30" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 26.--27. " ICR2(29) ,Interrupt Configuration 29" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2(28) ,Interrupt Configuration 28" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 22.--23. " ICR2(27) ,Interrupt Configuration 27" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 20.--21. " ICR2(26) ,Interrupt Configuration 26" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2(25) ,Interrupt Configuration 25" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 16.--17. " ICR2(24) ,Interrupt Configuration 24" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 14.--15. " ICR2(23) ,Interrupt Configuration 23" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2(22) ,Interrupt Configuration 22" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 10.--11. " ICR2(21) ,Interrupt Configuration 21" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 8.--9. " ICR2(20) ,Interrupt Configuration 20" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2(19) ,Interrupt Configuration 19" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 4.--5. " ICR2(18) ,Interrupt Configuration 18" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 2.--3. " ICR2(17) ,Interrupt Configuration 17" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2(16) ,Interrupt Configuration 16" "Rising edge,Falling edge,High level,Low level"
|
|
width 9.
|
|
line.long 0x08 "PTE_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR(31) ,Interrupt Mask 31" "Masked,Not masked"
|
|
bitfld.long 0x08 30. " IMR(30) ,Interrupt Mask 30" "Masked,Not masked"
|
|
bitfld.long 0x08 29. " IMR(29) ,Interrupt Mask 29" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR(28) ,Interrupt Mask 28" "Masked,Not masked"
|
|
bitfld.long 0x08 27. " IMR(27) ,Interrupt Mask 27" "Masked,Not masked"
|
|
bitfld.long 0x08 26. " IMR(26) ,Interrupt Mask 26" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR(25) ,Interrupt Mask 25" "Masked,Not masked"
|
|
bitfld.long 0x08 24. " IMR(24) ,Interrupt Mask 24" "Masked,Not masked"
|
|
bitfld.long 0x08 23. " IMR(23) ,Interrupt Mask 23" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR(22) ,Interrupt Mask 22" "Masked,Not masked"
|
|
bitfld.long 0x08 21. " IMR(21) ,Interrupt Mask 21" "Masked,Not masked"
|
|
bitfld.long 0x08 20. " IMR(20) ,Interrupt Mask 20" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR(19) ,Interrupt Mask 19" "Masked,Not masked"
|
|
bitfld.long 0x08 18. " IMR(18) ,Interrupt Mask 18" "Masked,Not masked"
|
|
bitfld.long 0x08 17. " IMR(17) ,Interrupt Mask 17" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR(16) ,Interrupt Mask 16" "Masked,Not masked"
|
|
bitfld.long 0x08 15. " IMR(15) ,Interrupt Mask 15" "Masked,Not masked"
|
|
bitfld.long 0x08 14. " IMR(14) ,Interrupt Mask 14" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR(13) ,Interrupt Mask 13" "Masked,Not masked"
|
|
bitfld.long 0x08 12. " IMR(12) ,Interrupt Mask 12" "Masked,Not masked"
|
|
bitfld.long 0x08 11. " IMR(11) ,Interrupt Mask 11" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR(10) ,Interrupt Mask 10" "Masked,Not masked"
|
|
bitfld.long 0x08 9. " IMR(9) ,Interrupt Mask 9" "Masked,Not masked"
|
|
bitfld.long 0x08 8. " IMR(8) ,Interrupt Mask 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR(7) ,Interrupt Mask 7" "Masked,Not masked"
|
|
bitfld.long 0x08 6. " IMR(6) ,Interrupt Mask 6" "Masked,Not masked"
|
|
bitfld.long 0x08 5. " IMR(5) ,Interrupt Mask 5" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR(4) ,Interrupt Mask 4" "Masked,Not masked"
|
|
bitfld.long 0x08 3. " IMR(3) ,Interrupt Mask 3" "Masked,Not masked"
|
|
bitfld.long 0x08 2. " IMR(2) ,Interrupt Mask 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR(1) ,Interrupt Mask 1" "Masked,Not masked"
|
|
bitfld.long 0x08 0. " IMR(0) ,Interrupt Mask 0" "Masked,Not masked"
|
|
line.long 0x0c "PTE_ISR,Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " ISR(31) ,Interrupt Status 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 30. " ISR(30) ,Interrupt Status 30" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 29. " ISR(29) ,Interrupt Status 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 28. " ISR(28) ,Interrupt Status 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 27. " ISR(27) ,Interrupt Status 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 26. " ISR(26) ,Interrupt Status 26" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " ISR(25) ,Interrupt Status 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 24. " ISR(24) ,Interrupt Status 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 23. " ISR(23) ,Interrupt Status 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 22. " ISR(22) ,Interrupt Status 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 21. " ISR(21) ,Interrupt Status 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 20. " ISR(20) ,Interrupt Status 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " ISR(19) ,Interrupt Status 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 18. " ISR(18) ,Interrupt Status 18" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 17. " ISR(17) ,Interrupt Status 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 16. " ISR(16) ,Interrupt Status 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 15. " ISR(15) ,Interrupt Status 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 14. " ISR(14) ,Interrupt Status 14" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " ISR(13) ,Interrupt Status 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 12. " ISR(12) ,Interrupt Status 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 11. " ISR(11) ,Interrupt Status 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 10. " ISR(10) ,Interrupt Status 10" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 9. " ISR(9) ,Interrupt Status 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 8. " ISR(8) ,Interrupt Status 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " ISR(7) ,Interrupt Status 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 6. " ISR(6) ,Interrupt Status 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 5. " ISR(5) ,Interrupt Status 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 4. " ISR(4) ,Interrupt Status 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 3. " ISR(3) ,Interrupt Status 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 2. " ISR(2) ,Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " ISR(1) ,Interrupt Status 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 0. " ISR(0) ,Interrupt Status 0" "No interrupt,Interrupt"
|
|
line.long 0x10 "PTE_GPR,General Purpose Register"
|
|
bitfld.long 0x10 31. " GPR(31) ,General Purpose 31" "Primary,Alternate"
|
|
bitfld.long 0x10 30. " GPR(30) ,General Purpose 30" "Primary,Alternate"
|
|
bitfld.long 0x10 29. " GPR(29) ,General Purpose 29" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 28. " GPR(28) ,General Purpose 28" "Primary,Alternate"
|
|
bitfld.long 0x10 27. " GPR(27) ,General Purpose 27" "Primary,Alternate"
|
|
bitfld.long 0x10 26. " GPR(26) ,General Purpose 26" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 25. " GPR(25) ,General Purpose 25" "Primary,Alternate"
|
|
bitfld.long 0x10 24. " GPR(24) ,General Purpose 24" "Primary,Alternate"
|
|
bitfld.long 0x10 23. " GPR(23) ,General Purpose 23" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 22. " GPR(22) ,General Purpose 22" "Primary,Alternate"
|
|
bitfld.long 0x10 21. " GPR(21) ,General Purpose 21" "Primary,Alternate"
|
|
bitfld.long 0x10 20. " GPR(20) ,General Purpose 20" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 19. " GPR(19) ,General Purpose 19" "Primary,Alternate"
|
|
bitfld.long 0x10 18. " GPR(18) ,General Purpose 18" "Primary,Alternate"
|
|
bitfld.long 0x10 17. " GPR(17) ,General Purpose 17" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 16. " GPR(16) ,General Purpose 16" "Primary,Alternate"
|
|
bitfld.long 0x10 15. " GPR(15) ,General Purpose 15" "Primary,Alternate"
|
|
bitfld.long 0x10 14. " GPR(14) ,General Purpose 14" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 13. " GPR(13) ,General Purpose 13" "Primary,Alternate"
|
|
bitfld.long 0x10 12. " GPR(12) ,General Purpose 12" "Primary,Alternate"
|
|
bitfld.long 0x10 11. " GPR(11) ,General Purpose 11" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 10. " GPR(10) ,General Purpose 10" "Primary,Alternate"
|
|
bitfld.long 0x10 9. " GPR(9) ,General Purpose 9" "Primary,Alternate"
|
|
bitfld.long 0x10 8. " GPR(8) ,General Purpose 8" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 7. " GPR(7) ,General Purpose 7" "Primary,Alternate"
|
|
bitfld.long 0x10 6. " GPR(6) ,General Purpose 6" "Primary,Alternate"
|
|
bitfld.long 0x10 5. " GPR(5) ,General Purpose 5" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 4. " GPR(4) ,General Purpose 4" "Primary,Alternate"
|
|
bitfld.long 0x10 3. " GPR(3) ,General Purpose 3" "Primary,Alternate"
|
|
bitfld.long 0x10 2. " GPR(2) ,General Purpose 2" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 1. " GPR(1) ,General Purpose 1" "Primary,Alternate"
|
|
bitfld.long 0x10 0. " GPR(0) ,General Purpose 0" "Primary,Alternate"
|
|
line.long 0x14 "PTE_SWR,Software Reset Register"
|
|
bitfld.long 0x14 0. " SWR ,Software Reset" "No effect,Reset"
|
|
line.long 0x18 "PTE_PUEN,Pull-Up Enable Register"
|
|
bitfld.long 0x18 31. " PUEN(31) ,Pull_Up Enable 31" "Tri-state,Pull up"
|
|
bitfld.long 0x18 30. " PUEN(30) ,Pull_Up Enable 30" "Tri-state,Pull up"
|
|
bitfld.long 0x18 29. " PUEN(29) ,Pull_Up Enable 29" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PUEN(28) ,Pull_Up Enable 28" "Tri-state,Pull up"
|
|
bitfld.long 0x18 27. " PUEN(27) ,Pull_Up Enable 27" "Tri-state,Pull up"
|
|
bitfld.long 0x18 26. " PUEN(26) ,Pull_Up Enable 26" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 25. " PUEN(25) ,Pull_Up Enable 25" "Tri-state,Pull up"
|
|
bitfld.long 0x18 24. " PUEN(24) ,Pull_Up Enable 24" "Tri-state,Pull up"
|
|
bitfld.long 0x18 23. " PUEN(23) ,Pull_Up Enable 23" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 22. " PUEN(22) ,Pull_Up Enable 22" "Tri-state,Pull up"
|
|
bitfld.long 0x18 21. " PUEN(21) ,Pull_Up Enable 21" "Tri-state,Pull up"
|
|
bitfld.long 0x18 20. " PUEN(20) ,Pull_Up Enable 20" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 19. " PUEN(19) ,Pull_Up Enable 19" "Tri-state,Pull up"
|
|
bitfld.long 0x18 18. " PUEN(18) ,Pull_Up Enable 18" "Tri-state,Pull up"
|
|
bitfld.long 0x18 17. " PUEN(17) ,Pull_Up Enable 17" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 16. " PUEN(16) ,Pull_Up Enable 16" "Tri-state,Pull up"
|
|
bitfld.long 0x18 15. " PUEN(15) ,Pull_Up Enable 15" "Tri-state,Pull up"
|
|
bitfld.long 0x18 14. " PUEN(14) ,Pull_Up Enable 14" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 13. " PUEN(13) ,Pull_Up Enable 13" "Tri-state,Pull up"
|
|
bitfld.long 0x18 12. " PUEN(12) ,Pull_Up Enable 12" "Tri-state,Pull up"
|
|
bitfld.long 0x18 11. " PUEN(11) ,Pull_Up Enable 11" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 10. " PUEN(10) ,Pull_Up Enable 10" "Tri-state,Pull up"
|
|
bitfld.long 0x18 9. " PUEN(9) ,Pull_Up Enable 9" "Tri-state,Pull up"
|
|
bitfld.long 0x18 8. " PUEN(8) ,Pull_Up Enable 8" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 7. " PUEN(7) ,Pull_Up Enable 7" "Tri-state,Pull up"
|
|
bitfld.long 0x18 6. " PUEN(6) ,Pull_Up Enable 6" "Tri-state,Pull up"
|
|
bitfld.long 0x18 5. " PUEN(5) ,Pull_Up Enable 5" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 4. " PUEN(4) ,Pull_Up Enable 4" "Tri-state,Pull up"
|
|
bitfld.long 0x18 3. " PUEN(3) ,Pull_Up Enable 3" "Tri-state,Pull up"
|
|
bitfld.long 0x18 2. " PUEN(2) ,Pull_Up Enable 2" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 1. " PUEN(1) ,Pull_Up Enable 1" "Tri-state,Pull up"
|
|
bitfld.long 0x18 0. " PUEN(0) ,Pull_Up Enable 0" "Tri-state,Pull up"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port F"
|
|
base ad:0x10015500
|
|
width 10.
|
|
group.long 0x00++0x1f
|
|
line.long 0x00 "PTF_DDIR,Data Direction Port A Register"
|
|
bitfld.long 0x00 31. " DDIR(31) ,Data Direction (31)" "Input,Output"
|
|
bitfld.long 0x00 30. " DDIR(30) ,Data Direction (30)" "Input,Output"
|
|
bitfld.long 0x00 29. " DDIR(29) ,Data Direction (29)" "Input,Output"
|
|
bitfld.long 0x00 28. " DDIR(28) ,Data Direction (28)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DDIR(27) ,Data Direction (27)" "Input,Output"
|
|
bitfld.long 0x00 26. " DDIR(26) ,Data Direction (26)" "Input,Output"
|
|
bitfld.long 0x00 25. " DDIR(25) ,Data Direction (25)" "Input,Output"
|
|
bitfld.long 0x00 24. " DDIR(24) ,Data Direction (24)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DDIR(23) ,Data Direction (23)" "Input,Output"
|
|
bitfld.long 0x00 22. " DDIR(22) ,Data Direction (22)" "Input,Output"
|
|
bitfld.long 0x00 21. " DDIR(21) ,Data Direction (21)" "Input,Output"
|
|
bitfld.long 0x00 20. " DDIR(20) ,Data Direction (20)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DDIR(19) ,Data Direction (19)" "Input,Output"
|
|
bitfld.long 0x00 18. " DDIR(18) ,Data Direction (18)" "Input,Output"
|
|
bitfld.long 0x00 17. " DDIR(17) ,Data Direction (17)" "Input,Output"
|
|
bitfld.long 0x00 16. " DDIR(16) ,Data Direction (16)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DDIR(15) ,Data Direction (15)" "Input,Output"
|
|
bitfld.long 0x00 14. " DDIR(14) ,Data Direction (14)" "Input,Output"
|
|
bitfld.long 0x00 13. " DDIR(13) ,Data Direction (13)" "Input,Output"
|
|
bitfld.long 0x00 12. " DDIR(12) ,Data Direction (12)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DDIR(11) ,Data Direction (11)" "Input,Output"
|
|
bitfld.long 0x00 10. " DDIR(10) ,Data Direction (10)" "Input,Output"
|
|
bitfld.long 0x00 9. " DDIR(9) ,Data Direction (9)" "Input,Output"
|
|
bitfld.long 0x00 8. " DDIR(8) ,Data Direction (8)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DDIR(7) ,Data Direction (7)" "Input,Output"
|
|
bitfld.long 0x00 6. " DDIR(6) ,Data Direction (6)" "Input,Output"
|
|
bitfld.long 0x00 5. " DDIR(5) ,Data Direction (5)" "Input,Output"
|
|
bitfld.long 0x00 4. " DDIR(4) ,Data Direction (4)" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DDIR(3) ,Data Direction (3)" "Input,Output"
|
|
bitfld.long 0x00 2. " DDIR(2) ,Data Direction (2)" "Input,Output"
|
|
bitfld.long 0x00 1. " DDIR(1) ,Data Direction (1)" "Input,Output"
|
|
bitfld.long 0x00 0. " DDIR(0) ,Data Direction (0)" "Input,Output"
|
|
line.long 0x04 "PTF_OCR1,Output Configuration Register 1"
|
|
bitfld.long 0x04 30.--31. " OCR1(15) ,Output Configuration (15)" "Input A_IN[15],Input B_IN[15],Input C_IN[15],Data [15]"
|
|
bitfld.long 0x04 28.--29. " OCR1(14) ,Output Configuration (14)" "Input A_IN[14],Input B_IN[14],Input C_IN[14],Data [14]"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " OCR1(13) ,Output Configuration (13)" "Input A_IN[13],Input B_IN[13],Input C_IN[13],Data [13]"
|
|
bitfld.long 0x04 24.--25. " OCR1(12) ,Output Configuration (12)" "Input A_IN[12],Input B_IN[12],Input C_IN[12],Data [12]"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " OCR1(11) ,Output Configuration (11)" "Input A_IN[11],Input B_IN[11],Input C_IN[11],Data [11]"
|
|
bitfld.long 0x04 20.--21. " OCR1(10) ,Output Configuration (10)" "Input A_IN[10],Input B_IN[10],Input C_IN[10],Data [10]"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " OCR1(9) ,Output Configuration (9)" "Input A_IN[9],Input B_IN[9],Input C_IN[9],Data [9]"
|
|
bitfld.long 0x04 16.--17. " OCR1(8) ,Output Configuration (8)" "Input A_IN[8],Input B_IN[8],Input C_IN[8],Data [8]"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " OCR1(7) ,Output Configuration (7)" "Input A_IN[7],Input B_IN[7],Input C_IN[7],Data [7]"
|
|
bitfld.long 0x04 12.--13. " OCR1(6) ,Output Configuration (6)" "Input A_IN[6],Input B_IN[6],Input C_IN[6],Data [6]"
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " OCR1(5) ,Output Configuration (5)" "Input A_IN[5],Input B_IN[5],Input C_IN[5],Data [5]"
|
|
bitfld.long 0x04 8.--9. " OCR1(4) ,Output Configuration (4)" "Input A_IN[4],Input B_IN[4],Input C_IN[4],Data [4]"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " OCR1(3) ,Output Configuration (3)" "Input A_IN[3],Input B_IN[3],Input C_IN[3],Data [3]"
|
|
bitfld.long 0x04 4.--5. " OCR1(2) ,Output Configuration (2)" "Input A_IN[2],Input B_IN[2],Input C_IN[2],Data [2]"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " OCR1(1) ,Output Configuration (1)" "Input A_IN[1],Input B_IN[1],Input C_IN[1],Data [1]"
|
|
bitfld.long 0x04 0.--1. " OCR1(0) ,Output Configuration (0)" "Input A_IN[0],Input B_IN[0],Input C_IN[0],Data [0]"
|
|
line.long 0x08 "PTF_OCR2,Output Configuration Register 2"
|
|
bitfld.long 0x08 30.--31. " OCR2(31) ,Output Configuration (31)" "Input A_IN[31],Input B_IN[31],Input C_IN[31],Data [31]"
|
|
bitfld.long 0x08 28.--29. " OCR2(30) ,Output Configuration (30)" "Input A_IN[30],Input B_IN[30],Input C_IN[30],Data [30]"
|
|
textline " "
|
|
bitfld.long 0x08 26.--27. " OCR2(29) ,Output Configuration (29)" "Input A_IN[29],Input B_IN[29],Input C_IN[29],Data [29]"
|
|
bitfld.long 0x08 24.--25. " OCR2(28) ,Output Configuration (28)" "Input A_IN[28],Input B_IN[28],Input C_IN[28],Data [28]"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OCR2(27) ,Output Configuration (27)" "Input A_IN[27],Input B_IN[27],Input C_IN[27],Data [27]"
|
|
bitfld.long 0x08 20.--21. " OCR2(26) ,Output Configuration (26)" "Input A_IN[26],Input B_IN[26],Input C_IN[26],Data [26]"
|
|
textline " "
|
|
bitfld.long 0x08 18.--19. " OCR2(25) ,Output Configuration (25)" "Input A_IN[25],Input B_IN[25],Input C_IN[25],Data [25]"
|
|
bitfld.long 0x08 16.--17. " OCR2(24) ,Output Configuration (24)" "Input A_IN[24],Input B_IN[24],Input C_IN[24],Data [24]"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OCR2(23) ,Output Configuration (23)" "Input A_IN[23],Input B_IN[23],Input C_IN[23],Data [23]"
|
|
bitfld.long 0x08 12.--13. " OCR2(22) ,Output Configuration (22)" "Input A_IN[22],Input B_IN[22],Input C_IN[22],Data [22]"
|
|
textline " "
|
|
bitfld.long 0x08 10.--11. " OCR2(21) ,Output Configuration (21)" "Input A_IN[21],Input B_IN[21],Input C_IN[21],Data [21]"
|
|
bitfld.long 0x08 8.--9. " OCR2(20) ,Output Configuration (20)" "Input A_IN[20],Input B_IN[20],Input C_IN[20],Data [20]"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OCR2(19) ,Output Configuration (19)" "Input A_IN[19],Input B_IN[19],Input C_IN[19],Data [19]"
|
|
bitfld.long 0x08 4.--5. " OCR2(18) ,Output Configuration (18)" "Input A_IN[18],Input B_IN[18],Input C_IN[18],Data [18]"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OCR2(17) ,Output Configuration (17)" "Input A_IN[17],Input B_IN[17],Input C_IN[17],Data [17]"
|
|
bitfld.long 0x08 0.--1. " OCR2(16) ,Output Configuration (16)" "Input A_IN[16],Input B_IN[16],Input C_IN[16],Data [16]"
|
|
width 13.
|
|
line.long 0x0c "PTF_ICONFA1,Input Configuration Register A1"
|
|
bitfld.long 0x0c 30.--31. " ICONFA1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x0c 28.--29. " ICONFA1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 26.--27. " ICONFA1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x0c 24.--25. " ICONFA1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 22.--23. " ICONFA1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x0c 20.--21. " ICONFA1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 18.--19. " ICONFA1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x0c 16.--17. " ICONFA1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " ICONFA1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x0c 12.--13. " ICONFA1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 10.--11. " ICONFA1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x0c 8.--9. " ICONFA1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 6.--7. " ICONFA1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x0c 4.--5. " ICONFA1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 2.--3. " ICONFA1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x0c 0.--1. " ICONFA1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x10 "PTF_ICONFA2,Input Configuration Register A2"
|
|
bitfld.long 0x10 30.--31. " ICONFA2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x10 28.--29. " ICONFA2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 26.--27. " ICONFA2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x10 24.--25. " ICONFA2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ICONFA2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x10 20.--21. " ICONFA2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " ICONFA2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x10 16.--17. " ICONFA2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " ICONFA2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x10 12.--13. " ICONFA2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 10.--11. " ICONFA2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x10 8.--9. " ICONFA2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ICONFA2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x10 4.--5. " ICONFA2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " ICONFA2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x10 0.--1. " ICONFA2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
line.long 0x14 "PTF_ICONFB1,Input Configuration Register B1"
|
|
bitfld.long 0x14 30.--31. " ICONFB1(15) ,Input Configuration" "GPIO_In[15],ISR[15],0,1"
|
|
bitfld.long 0x14 28.--29. " ICONFB1(14) ,Input Configuration" "GPIO_In[14],ISR[14],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 26.--27. " ICONFB1(13) ,Input Configuration" "GPIO_In[13],ISR[13],0,1"
|
|
bitfld.long 0x14 24.--25. " ICONFB1(12) ,Input Configuration" "GPIO_In[12],ISR[12],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 22.--23. " ICONFB1(11) ,Input Configuration" "GPIO_In[11],ISR[11],0,1"
|
|
bitfld.long 0x14 20.--21. " ICONFB1(10) ,Input Configuration" "GPIO_In[10],ISR[10],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " ICONFB1(9) ,Input Configuration" "GPIO_In[9],ISR[9],0,1"
|
|
bitfld.long 0x14 16.--17. " ICONFB1(8) ,Input Configuration" "GPIO_In[8],ISR[8],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " ICONFB1(7) ,Input Configuration" "GPIO_In[7],ISR[7],0,1"
|
|
bitfld.long 0x14 12.--13. " ICONFB1(6) ,Input Configuration" "GPIO_In[6],ISR[6],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 10.--11. " ICONFB1(5) ,Input Configuration" "GPIO_In[5],ISR[5],0,1"
|
|
bitfld.long 0x14 8.--9. " ICONFB1(4) ,Input Configuration" "GPIO_In[4],ISR[4],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " ICONFB1(3) ,Input Configuration" "GPIO_In[3],ISR[3],0,1"
|
|
bitfld.long 0x14 4.--5. " ICONFB1(2) ,Input Configuration" "GPIO_In[2],ISR[2],0,1"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " ICONFB1(1) ,Input Configuration" "GPIO_In[1],ISR[1],0,1"
|
|
bitfld.long 0x14 0.--1. " ICONFB1(0) ,Input Configuration" "GPIO_In[0],ISR[0],0,1"
|
|
line.long 0x18 "PTF_ICONFB2,Input Configuration Register B2"
|
|
bitfld.long 0x18 30.--31. " ICONFB2(31) ,Input Configuration" "GPIO_In[31],ISR[31],0,1"
|
|
bitfld.long 0x18 28.--29. " ICONFB2(30) ,Input Configuration" "GPIO_In[30],ISR[30],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 26.--27. " ICONFB2(29) ,Input Configuration" "GPIO_In[29],ISR[29],0,1"
|
|
bitfld.long 0x18 24.--25. " ICONFB2(28) ,Input Configuration" "GPIO_In[28],ISR[28],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 22.--23. " ICONFB2(27) ,Input Configuration" "GPIO_In[27],ISR[27],0,1"
|
|
bitfld.long 0x18 20.--21. " ICONFB2(26) ,Input Configuration" "GPIO_In[26],ISR[26],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " ICONFB2(25) ,Input Configuration" "GPIO_In[25],ISR[25],0,1"
|
|
bitfld.long 0x18 16.--17. " ICONFB2(24) ,Input Configuration" "GPIO_In[24],ISR[24],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " ICONFB2(23) ,Input Configuration" "GPIO_In[23],ISR[23],0,1"
|
|
bitfld.long 0x18 12.--13. " ICONFB2(22) ,Input Configuration" "GPIO_In[22],ISR[22],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 10.--11. " ICONFB2(21) ,Input Configuration" "GPIO_In[21],ISR[21],0,1"
|
|
bitfld.long 0x18 8.--9. " ICONFB2(20) ,Input Configuration" "GPIO_In[20],ISR[20],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " ICONFB2(19) ,Input Configuration" "GPIO_In[19],ISR[19],0,1"
|
|
bitfld.long 0x18 4.--5. " ICONFB2(18) ,Input Configuration" "GPIO_In[18],ISR[18],0,1"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " ICONFB2(17) ,Input Configuration" "GPIO_In[17],ISR[17],0,1"
|
|
bitfld.long 0x18 0.--1. " ICONFB2(16) ,Input Configuration" "GPIO_In[16],ISR[16],0,1"
|
|
width 8.
|
|
line.long 0x1c "PTF_DR,Data Register"
|
|
bitfld.long 0x1c 31. " DR(31) ,Data Register 31" "Low,High"
|
|
bitfld.long 0x1c 30. " DR(30) ,Data Register 30" "Low,High"
|
|
bitfld.long 0x1c 29. " DR(29) ,Data Register 29" "Low,High"
|
|
bitfld.long 0x1c 28. " DR(28) ,Data Register 28" "Low,High"
|
|
bitfld.long 0x1c 27. " DR(27) ,Data Register 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 26. " DR(26) ,Data Register 26" "Low,High"
|
|
bitfld.long 0x1c 25. " DR(25) ,Data Register 25" "Low,High"
|
|
bitfld.long 0x1c 24. " DR(24) ,Data Register 24" "Low,High"
|
|
bitfld.long 0x1c 23. " DR(23) ,Data Register 23" "Low,High"
|
|
bitfld.long 0x1c 22. " DR(22) ,Data Register 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 21. " DR(21) ,Data Register 21" "Low,High"
|
|
bitfld.long 0x1c 20. " DR(20) ,Data Register 20" "Low,High"
|
|
bitfld.long 0x1c 19. " DR(19) ,Data Register 19" "Low,High"
|
|
bitfld.long 0x1c 18. " DR(18) ,Data Register 18" "Low,High"
|
|
bitfld.long 0x1c 17. " DR(17) ,Data Register 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 16. " DR(16) ,Data Register 16" "Low,High"
|
|
bitfld.long 0x1c 15. " DR(15) ,Data Register 15" "Low,High"
|
|
bitfld.long 0x1c 14. " DR(14) ,Data Register 14" "Low,High"
|
|
bitfld.long 0x1c 13. " DR(13) ,Data Register 13" "Low,High"
|
|
bitfld.long 0x1c 12. " DR(12) ,Data Register 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 11. " DR(11) ,Data Register 11" "Low,High"
|
|
bitfld.long 0x1c 10. " DR(10) ,Data Register 10" "Low,High"
|
|
bitfld.long 0x1c 9. " DR(9) ,Data Register 9" "Low,High"
|
|
bitfld.long 0x1c 8. " DR(8) ,Data Register 8" "Low,High"
|
|
bitfld.long 0x1c 7. " DR(7) ,Data Register 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 6. " DR(6) ,Data Register 6" "Low,High"
|
|
bitfld.long 0x1c 5. " DR(5) ,Data Register 5" "Low,High"
|
|
bitfld.long 0x1c 4. " DR(4) ,Data Register 4" "Low,High"
|
|
bitfld.long 0x1c 3. " DR(3) ,Data Register 3" "Low,High"
|
|
bitfld.long 0x1c 2. " DR(2) ,Data Register 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " DR(1) ,Data Register 1" "Low,High"
|
|
bitfld.long 0x1c 0. " DR(0) ,Data Register 0" "Low,High"
|
|
width 10.
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PTF_GIUS,GPIO In Use Register F"
|
|
bitfld.long 0x00 22. " GIUS(22) ,GPIO In Use Pin 22" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 21. " GIUS(21) ,GPIO In Use Pin 21" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 20. " GIUS(20) ,GPIO In Use Pin 20" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GIUS(19) ,GPIO In Use Pin 19" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 18. " GIUS(18) ,GPIO In Use Pin 18" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 17. " GIUS(17) ,GPIO In Use Pin 17" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GIUS(16) ,GPIO In Use Pin 16" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 15. " GIUS(15) ,GPIO In Use Pin 15" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 14. " GIUS(14) ,GPIO In Use Pin 14" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GIUS(13) ,GPIO In Use Pin 13" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 12. " GIUS(12) ,GPIO In Use Pin 12" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 11. " GIUS(11) ,GPIO In Use Pin 11" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GIUS(10) ,GPIO In Use Pin 10" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 9. " GIUS(9) ,GPIO In Use Pin 9" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 8. " GIUS(8) ,GPIO In Use Pin 8" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GIUS(7) ,GPIO In Use Pin 7" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 6. " GIUS(6) ,GPIO In Use Pin 6" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 5. " GIUS(5) ,GPIO In Use Pin 5" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GIUS(4) ,GPIO In Use Pin 4" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 3. " GIUS(3) ,GPIO In Use Pin 3" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 2. " GIUS(2) ,GPIO In Use Pin 2" "Multiplexed,GPIO"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GIUS(1) ,GPIO In Use Pin 1" "Multiplexed,GPIO"
|
|
bitfld.long 0x00 0. " GIUS(0) ,GPIO In Use Pin 0" "Multiplexed,GPIO"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PTF_SSR,Sample Status Register"
|
|
bitfld.long 0x00 31. " SSR31 ,Sample Status Pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " SSR30 ,Sample Status Pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " SSR29 ,Sample Status Pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " SSR28 ,Sample Status Pin 28" "Low,High"
|
|
bitfld.long 0x00 27. " SSR27 ,Sample Status Pin 27" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SSR26 ,Sample Status Pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " SSR25 ,Sample Status Pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " SSR24 ,Sample Status Pin 24" "Low,High"
|
|
bitfld.long 0x00 23. " SSR23 ,Sample Status Pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " SSR22 ,Sample Status Pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SSR21 ,Sample Status Pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " SSR20 ,Sample Status Pin 20" "Low,High"
|
|
bitfld.long 0x00 19. " SSR19 ,Sample Status Pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " SSR18 ,Sample Status Pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " SSR17 ,Sample Status Pin 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SSR16 ,Sample Status Pin 16" "Low,High"
|
|
bitfld.long 0x00 15. " SSR15 ,Sample Status Pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " SSR14 ,Sample Status Pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " SSR13 ,Sample Status Pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " SSR12 ,Sample Status Pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SSR11 ,Sample Status Pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " SSR10 ,Sample Status Pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " SSR9 ,Sample Status Pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " SSR8 ,Sample Status Pin 8" "Low,High"
|
|
bitfld.long 0x00 7. " SSR7 ,Sample Status Pin 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SSR6 ,Sample Status Pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " SSR5 ,Sample Status Pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " SSR4 ,Sample Status Pin 4" "Low,High"
|
|
bitfld.long 0x00 3. " SSR3 ,Sample Status Pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " SSR2 ,Sample Status Pin 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SSR1 ,Sample Status Pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " SSR0 ,Sample Status Pin 0" "Low,High"
|
|
group.long 0x28++0x1b
|
|
line.long 0x00 "PTF_ICR1,Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR1(15) ,Interrupt Configuration 15" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 28.--29. " ICR1(14) ,Interrupt Configuration 14" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 26.--27. " ICR1(13) ,Interrupt Configuration 13" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICR1(12) ,Interrupt Configuration 12" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 22.--23. " ICR1(11) ,Interrupt Configuration 11" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 20.--21. " ICR1(10) ,Interrupt Configuration 10" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICR1(9) ,Interrupt Configuration 9" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 16.--17. " ICR1(8) ,Interrupt Configuration 8" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 14.--15. " ICR1(7) ,Interrupt Configuration 7" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICR1(6) ,Interrupt Configuration 6" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 10.--11. " ICR1(5) ,Interrupt Configuration 5" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 8.--9. " ICR1(4) ,Interrupt Configuration 4" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICR1(3) ,Interrupt Configuration 3" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 4.--5. " ICR1(2) ,Interrupt Configuration 2" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x00 2.--3. " ICR1(1) ,Interrupt Configuration 1" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICR1(0) ,Interrupt Configuration 0" "Rising edge,Falling edge,High level,Low level"
|
|
line.long 0x04 "PTF_ICR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x04 30.--31. " ICR2(31) ,Interrupt Configuration 31" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 28.--29. " ICR2(30) ,Interrupt Configuration 30" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 26.--27. " ICR2(29) ,Interrupt Configuration 29" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICR2(28) ,Interrupt Configuration 28" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 22.--23. " ICR2(27) ,Interrupt Configuration 27" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 20.--21. " ICR2(26) ,Interrupt Configuration 26" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICR2(25) ,Interrupt Configuration 25" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 16.--17. " ICR2(24) ,Interrupt Configuration 24" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 14.--15. " ICR2(23) ,Interrupt Configuration 23" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICR2(22) ,Interrupt Configuration 22" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 10.--11. " ICR2(21) ,Interrupt Configuration 21" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 8.--9. " ICR2(20) ,Interrupt Configuration 20" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICR2(19) ,Interrupt Configuration 19" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 4.--5. " ICR2(18) ,Interrupt Configuration 18" "Rising edge,Falling edge,High level,Low level"
|
|
bitfld.long 0x04 2.--3. " ICR2(17) ,Interrupt Configuration 17" "Rising edge,Falling edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICR2(16) ,Interrupt Configuration 16" "Rising edge,Falling edge,High level,Low level"
|
|
width 9.
|
|
line.long 0x08 "PTF_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x08 31. " IMR(31) ,Interrupt Mask 31" "Masked,Not masked"
|
|
bitfld.long 0x08 30. " IMR(30) ,Interrupt Mask 30" "Masked,Not masked"
|
|
bitfld.long 0x08 29. " IMR(29) ,Interrupt Mask 29" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IMR(28) ,Interrupt Mask 28" "Masked,Not masked"
|
|
bitfld.long 0x08 27. " IMR(27) ,Interrupt Mask 27" "Masked,Not masked"
|
|
bitfld.long 0x08 26. " IMR(26) ,Interrupt Mask 26" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 25. " IMR(25) ,Interrupt Mask 25" "Masked,Not masked"
|
|
bitfld.long 0x08 24. " IMR(24) ,Interrupt Mask 24" "Masked,Not masked"
|
|
bitfld.long 0x08 23. " IMR(23) ,Interrupt Mask 23" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 22. " IMR(22) ,Interrupt Mask 22" "Masked,Not masked"
|
|
bitfld.long 0x08 21. " IMR(21) ,Interrupt Mask 21" "Masked,Not masked"
|
|
bitfld.long 0x08 20. " IMR(20) ,Interrupt Mask 20" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 19. " IMR(19) ,Interrupt Mask 19" "Masked,Not masked"
|
|
bitfld.long 0x08 18. " IMR(18) ,Interrupt Mask 18" "Masked,Not masked"
|
|
bitfld.long 0x08 17. " IMR(17) ,Interrupt Mask 17" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " IMR(16) ,Interrupt Mask 16" "Masked,Not masked"
|
|
bitfld.long 0x08 15. " IMR(15) ,Interrupt Mask 15" "Masked,Not masked"
|
|
bitfld.long 0x08 14. " IMR(14) ,Interrupt Mask 14" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IMR(13) ,Interrupt Mask 13" "Masked,Not masked"
|
|
bitfld.long 0x08 12. " IMR(12) ,Interrupt Mask 12" "Masked,Not masked"
|
|
bitfld.long 0x08 11. " IMR(11) ,Interrupt Mask 11" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 10. " IMR(10) ,Interrupt Mask 10" "Masked,Not masked"
|
|
bitfld.long 0x08 9. " IMR(9) ,Interrupt Mask 9" "Masked,Not masked"
|
|
bitfld.long 0x08 8. " IMR(8) ,Interrupt Mask 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IMR(7) ,Interrupt Mask 7" "Masked,Not masked"
|
|
bitfld.long 0x08 6. " IMR(6) ,Interrupt Mask 6" "Masked,Not masked"
|
|
bitfld.long 0x08 5. " IMR(5) ,Interrupt Mask 5" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " IMR(4) ,Interrupt Mask 4" "Masked,Not masked"
|
|
bitfld.long 0x08 3. " IMR(3) ,Interrupt Mask 3" "Masked,Not masked"
|
|
bitfld.long 0x08 2. " IMR(2) ,Interrupt Mask 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " IMR(1) ,Interrupt Mask 1" "Masked,Not masked"
|
|
bitfld.long 0x08 0. " IMR(0) ,Interrupt Mask 0" "Masked,Not masked"
|
|
line.long 0x0c "PTF_ISR,Interrupt Status Register"
|
|
eventfld.long 0x0c 31. " ISR(31) ,Interrupt Status 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 30. " ISR(30) ,Interrupt Status 30" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 29. " ISR(29) ,Interrupt Status 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 28. " ISR(28) ,Interrupt Status 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 27. " ISR(27) ,Interrupt Status 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 26. " ISR(26) ,Interrupt Status 26" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 25. " ISR(25) ,Interrupt Status 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 24. " ISR(24) ,Interrupt Status 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 23. " ISR(23) ,Interrupt Status 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 22. " ISR(22) ,Interrupt Status 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 21. " ISR(21) ,Interrupt Status 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 20. " ISR(20) ,Interrupt Status 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 19. " ISR(19) ,Interrupt Status 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 18. " ISR(18) ,Interrupt Status 18" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 17. " ISR(17) ,Interrupt Status 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 16. " ISR(16) ,Interrupt Status 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 15. " ISR(15) ,Interrupt Status 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 14. " ISR(14) ,Interrupt Status 14" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 13. " ISR(13) ,Interrupt Status 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 12. " ISR(12) ,Interrupt Status 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 11. " ISR(11) ,Interrupt Status 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 10. " ISR(10) ,Interrupt Status 10" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 9. " ISR(9) ,Interrupt Status 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 8. " ISR(8) ,Interrupt Status 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 7. " ISR(7) ,Interrupt Status 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 6. " ISR(6) ,Interrupt Status 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 5. " ISR(5) ,Interrupt Status 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 4. " ISR(4) ,Interrupt Status 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 3. " ISR(3) ,Interrupt Status 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 2. " ISR(2) ,Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0c 1. " ISR(1) ,Interrupt Status 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x0c 0. " ISR(0) ,Interrupt Status 0" "No interrupt,Interrupt"
|
|
line.long 0x10 "PTF_GPR,General Purpose Register"
|
|
bitfld.long 0x10 31. " GPR(31) ,General Purpose 31" "Primary,Alternate"
|
|
bitfld.long 0x10 30. " GPR(30) ,General Purpose 30" "Primary,Alternate"
|
|
bitfld.long 0x10 29. " GPR(29) ,General Purpose 29" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 28. " GPR(28) ,General Purpose 28" "Primary,Alternate"
|
|
bitfld.long 0x10 27. " GPR(27) ,General Purpose 27" "Primary,Alternate"
|
|
bitfld.long 0x10 26. " GPR(26) ,General Purpose 26" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 25. " GPR(25) ,General Purpose 25" "Primary,Alternate"
|
|
bitfld.long 0x10 24. " GPR(24) ,General Purpose 24" "Primary,Alternate"
|
|
bitfld.long 0x10 23. " GPR(23) ,General Purpose 23" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 22. " GPR(22) ,General Purpose 22" "Primary,Alternate"
|
|
bitfld.long 0x10 21. " GPR(21) ,General Purpose 21" "Primary,Alternate"
|
|
bitfld.long 0x10 20. " GPR(20) ,General Purpose 20" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 19. " GPR(19) ,General Purpose 19" "Primary,Alternate"
|
|
bitfld.long 0x10 18. " GPR(18) ,General Purpose 18" "Primary,Alternate"
|
|
bitfld.long 0x10 17. " GPR(17) ,General Purpose 17" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 16. " GPR(16) ,General Purpose 16" "Primary,Alternate"
|
|
bitfld.long 0x10 15. " GPR(15) ,General Purpose 15" "Primary,Alternate"
|
|
bitfld.long 0x10 14. " GPR(14) ,General Purpose 14" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 13. " GPR(13) ,General Purpose 13" "Primary,Alternate"
|
|
bitfld.long 0x10 12. " GPR(12) ,General Purpose 12" "Primary,Alternate"
|
|
bitfld.long 0x10 11. " GPR(11) ,General Purpose 11" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 10. " GPR(10) ,General Purpose 10" "Primary,Alternate"
|
|
bitfld.long 0x10 9. " GPR(9) ,General Purpose 9" "Primary,Alternate"
|
|
bitfld.long 0x10 8. " GPR(8) ,General Purpose 8" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 7. " GPR(7) ,General Purpose 7" "Primary,Alternate"
|
|
bitfld.long 0x10 6. " GPR(6) ,General Purpose 6" "Primary,Alternate"
|
|
bitfld.long 0x10 5. " GPR(5) ,General Purpose 5" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 4. " GPR(4) ,General Purpose 4" "Primary,Alternate"
|
|
bitfld.long 0x10 3. " GPR(3) ,General Purpose 3" "Primary,Alternate"
|
|
bitfld.long 0x10 2. " GPR(2) ,General Purpose 2" "Primary,Alternate"
|
|
textline " "
|
|
bitfld.long 0x10 1. " GPR(1) ,General Purpose 1" "Primary,Alternate"
|
|
bitfld.long 0x10 0. " GPR(0) ,General Purpose 0" "Primary,Alternate"
|
|
line.long 0x14 "PTF_SWR,Software Reset Register"
|
|
bitfld.long 0x14 0. " SWR ,Software Reset" "No effect,Reset"
|
|
line.long 0x18 "PTF_PUEN,Pull-Up Enable Register"
|
|
bitfld.long 0x18 31. " PUEN(31) ,Pull_Up Enable 31" "Tri-state,Pull up"
|
|
bitfld.long 0x18 30. " PUEN(30) ,Pull_Up Enable 30" "Tri-state,Pull up"
|
|
bitfld.long 0x18 29. " PUEN(29) ,Pull_Up Enable 29" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PUEN(28) ,Pull_Up Enable 28" "Tri-state,Pull up"
|
|
bitfld.long 0x18 27. " PUEN(27) ,Pull_Up Enable 27" "Tri-state,Pull up"
|
|
bitfld.long 0x18 26. " PUEN(26) ,Pull_Up Enable 26" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 25. " PUEN(25) ,Pull_Up Enable 25" "Tri-state,Pull up"
|
|
bitfld.long 0x18 24. " PUEN(24) ,Pull_Up Enable 24" "Tri-state,Pull up"
|
|
bitfld.long 0x18 23. " PUEN(23) ,Pull_Up Enable 23" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 22. " PUEN(22) ,Pull_Up Enable 22" "Tri-state,Pull up"
|
|
bitfld.long 0x18 21. " PUEN(21) ,Pull_Up Enable 21" "Tri-state,Pull up"
|
|
bitfld.long 0x18 20. " PUEN(20) ,Pull_Up Enable 20" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 19. " PUEN(19) ,Pull_Up Enable 19" "Tri-state,Pull up"
|
|
bitfld.long 0x18 18. " PUEN(18) ,Pull_Up Enable 18" "Tri-state,Pull up"
|
|
bitfld.long 0x18 17. " PUEN(17) ,Pull_Up Enable 17" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 16. " PUEN(16) ,Pull_Up Enable 16" "Tri-state,Pull up"
|
|
bitfld.long 0x18 15. " PUEN(15) ,Pull_Up Enable 15" "Tri-state,Pull up"
|
|
bitfld.long 0x18 14. " PUEN(14) ,Pull_Up Enable 14" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 13. " PUEN(13) ,Pull_Up Enable 13" "Tri-state,Pull up"
|
|
bitfld.long 0x18 12. " PUEN(12) ,Pull_Up Enable 12" "Tri-state,Pull up"
|
|
bitfld.long 0x18 11. " PUEN(11) ,Pull_Up Enable 11" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 10. " PUEN(10) ,Pull_Up Enable 10" "Tri-state,Pull up"
|
|
bitfld.long 0x18 9. " PUEN(9) ,Pull_Up Enable 9" "Tri-state,Pull up"
|
|
bitfld.long 0x18 8. " PUEN(8) ,Pull_Up Enable 8" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 7. " PUEN(7) ,Pull_Up Enable 7" "Tri-state,Pull up"
|
|
bitfld.long 0x18 6. " PUEN(6) ,Pull_Up Enable 6" "Tri-state,Pull up"
|
|
bitfld.long 0x18 5. " PUEN(5) ,Pull_Up Enable 5" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 4. " PUEN(4) ,Pull_Up Enable 4" "Tri-state,Pull up"
|
|
bitfld.long 0x18 3. " PUEN(3) ,Pull_Up Enable 3" "Tri-state,Pull up"
|
|
bitfld.long 0x18 2. " PUEN(2) ,Pull_Up Enable 2" "Tri-state,Pull up"
|
|
textline " "
|
|
bitfld.long 0x18 1. " PUEN(1) ,Pull_Up Enable 1" "Tri-state,Pull up"
|
|
bitfld.long 0x18 0. " PUEN(0) ,Pull_Up Enable 0" "Tri-state,Pull up"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port Mask"
|
|
base ad:0x10015600
|
|
width 7.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PMASK,Port Interrupt Mask Register"
|
|
bitfld.long 0x00 5. " PTF ,Port F" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " PTE ,Port E" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PTD ,Port D" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PTC ,Port C" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PTB ,Port B" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PTA ,Port A" "Masked,Not masked"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "ETB REG (ETB Registers)"
|
|
base ad:0x1003B000
|
|
width 21.
|
|
group.long 0x00++0x23
|
|
line.long 0x00 "ETB_ID,ETB Identify Register"
|
|
line.long 0x04 "ETB_RAM_DEPTH,ETB RAM Depth Register"
|
|
line.long 0x08 "ETB_RAM_WIDTH,ETB RAM Width Register"
|
|
line.long 0x0c "ETB_STATUS,ETB Status Register"
|
|
line.long 0x10 "ETB_DATA,ETB Data Register"
|
|
line.long 0x14 "ETB_READ_POINTER,ETB Read Pointer Register"
|
|
line.long 0x18 "ETB_WRITE_POINTER,ETB Write Pointer Register"
|
|
line.long 0x1c "ETB_TRIGGER_COUNTER,ETB Trigger Counter Register"
|
|
line.long 0x20 "ETB_CONTROL,ETB Control Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "JAM (Just Another Module)"
|
|
base ad:0x1003E000
|
|
width 16.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "JAM_ARM9P_GPR0,JAM ARM9P General Purpose Register 0"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "JAM_ARM9P_GPR4,JAM ARM9P General Purpose Register 4"
|
|
width 0xb
|
|
tree.end
|
|
tree "AITC (ARM926EJ-S Interrupt Controller)"
|
|
base ad:0x10040000
|
|
width 13.
|
|
group.long 0x00++0x3f
|
|
line.long 0x00 "INTCNTL,Interrupt Control Register"
|
|
bitfld.long 0x00 22. " NIDIS ,Normal Interrupt Disable" "Not affected,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FIDIS ,Fast Interrupt Disable" "Not affected,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NIAD ,Normal Interrupt Arbiter Rise ARM Level" "Disregarded interrupt,Increased priority"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FIAD ,Fast Interrupt Arbiter Rise ARM Level" "Disregard fast interrupt,Increased priority"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MD ,Interrupt Vector Table Mode" "High memory,Low memory"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--11. 1. " POINTER ,Interrupt Vector Table Pointer"
|
|
line.long 0x04 "NIMASK,Normal Interrupt Mask Register"
|
|
bitfld.long 0x04 0.--4. " NIMASK ,Normal Interrupt Mask" "Disabled priority = 0,Disabled priority <= 1,Disabled priority <= 2,Disabled priority <= 3,Disabled priority <= 4,Disabled priority <= 5,Disabled priority <= 6,Disabled priority <= 7,Disabled priority <= 8,Disabled priority <= 9,Disabled priority <= 10,Disabled priority <= 11,Disabled priority <= 12,Disabled priority <= 13,Disabled priority <= 14,Disabled all,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled,Not disabled"
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line.long 0x08 "INTENNUM,Interrupt Enable Number Register"
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bitfld.long 0x08 0.--5. " ENNUM ,Interrupt Enable Number" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,Source 8,Source 9,Source 10,Source 11,Source 12,Source 13,Source 14,Source 15,Source 16,Source 17,Source 18,Source 19,Source 20,Source 21,Source 22,Source 23,Source 24,Source 25,Source 26,Source 27,Source 28,Source 29,Source 30,Source 31,Source 32,Source 33,Source 34,Source 35,Source 36,Source 37,Source 38,Source 39,Source 40,Source 41,Source 42,Source 43,Source 44,Source 45,Source 46,Source 47,Source 48,Source 49,Source 50,Source 51,Source 52,Source 53,Source 54,Source 55,Source 56,Source 57,Source 58,Source 59,Source 60,Source 61,Source 62,Source 63"
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|
line.long 0xc "INTDISNUM,Interrupt Disable Number Register"
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bitfld.long 0x0c 0.--5. " DISNUM ,Interrupt Disable Number" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,Source 8,Source 9,Source 10,Source 11,Source 12,Source 13,Source 14,Source 15,Source 16,Source 17,Source 18,Source 19,Source 20,Source 21,Source 22,Source 23,Source 24,Source 25,Source 26,Source 27,Source 28,Source 29,Source 30,Source 31,Source 32,Source 33,Source 34,Source 35,Source 36,Source 37,Source 38,Source 39,Source 40,Source 41,Source 42,Source 43,Source 44,Source 45,Source 46,Source 47,Source 48,Source 49,Source 50,Source 51,Source 52,Source 53,Source 54,Source 55,Source 56,Source 57,Source 58,Source 59,Source 60,Source 61,Source 62,Source 63"
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line.long 0x10 "INTENABLEH,Interrupt Enable Register High"
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bitfld.long 0x10 31. " INTENABLE63 ,Interrupt Enable 63" "Disabled,Enabled"
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|
bitfld.long 0x10 30. " INTENABLE62 ,Interrupt Enable 62" "Disabled,Enabled"
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|
bitfld.long 0x10 29. " INTENABLE61 ,Interrupt Enable 61" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x10 28. " INTENABLE60 ,Interrupt Enable 60" "Disabled,Enabled"
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bitfld.long 0x10 27. " INTENABLE59 ,Interrupt Enable 59" "Disabled,Enabled"
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bitfld.long 0x10 26. " INTENABLE58 ,Interrupt Enable 58" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 25. " INTENABLE57 ,Interrupt Enable 57" "Disabled,Enabled"
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|
bitfld.long 0x10 24. " INTENABLE56 ,Interrupt Enable 56" "Disabled,Enabled"
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bitfld.long 0x10 23. " INTENABLE55 ,Interrupt Enable 55" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x10 22. " INTENABLE54 ,Interrupt Enable 54" "Disabled,Enabled"
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bitfld.long 0x10 21. " INTENABLE53 ,Interrupt Enable 53" "Disabled,Enabled"
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bitfld.long 0x10 20. " INTENABLE52 ,Interrupt Enable 52" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x10 19. " INTENABLE51 ,Interrupt Enable 51" "Disabled,Enabled"
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bitfld.long 0x10 18. " INTENABLE50 ,Interrupt Enable 50" "Disabled,Enabled"
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bitfld.long 0x10 17. " INTENABLE49 ,Interrupt Enable 49" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x10 16. " INTENABLE48 ,Interrupt Enable 48" "Disabled,Enabled"
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bitfld.long 0x10 15. " INTENABLE47 ,Interrupt Enable 47" "Disabled,Enabled"
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bitfld.long 0x10 14. " INTENABLE46 ,Interrupt Enable 46" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 13. " INTENABLE45 ,Interrupt Enable 45" "Disabled,Enabled"
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bitfld.long 0x10 12. " INTENABLE44 ,Interrupt Enable 44" "Disabled,Enabled"
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bitfld.long 0x10 11. " INTENABLE43 ,Interrupt Enable 43" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 10. " INTENABLE42 ,Interrupt Enable 42" "Disabled,Enabled"
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bitfld.long 0x10 9. " INTENABLE41 ,Interrupt Enable 41" "Disabled,Enabled"
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bitfld.long 0x10 8. " INTENABLE40 ,Interrupt Enable 40" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 7. " INTENABLE39 ,Interrupt Enable 39" "Disabled,Enabled"
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bitfld.long 0x10 6. " INTENABLE38 ,Interrupt Enable 38" "Disabled,Enabled"
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bitfld.long 0x10 5. " INTENABLE37 ,Interrupt Enable 37" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 4. " INTENABLE36 ,Interrupt Enable 36" "Disabled,Enabled"
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bitfld.long 0x10 3. " INTENABLE35 ,Interrupt Enable 35" "Disabled,Enabled"
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bitfld.long 0x10 2. " INTENABLE34 ,Interrupt Enable 34" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 1. " INTENABLE33 ,Interrupt Enable 33" "Disabled,Enabled"
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bitfld.long 0x10 0. " INTENABLE32 ,Interrupt Enable 32" "Disabled,Enabled"
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line.long 0x14 "INTENABLEL,Interrupt Enable Register Low"
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bitfld.long 0x14 31. " INTENABLE31 ,Interrupt Enable 31" "Disabled,Enabled"
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bitfld.long 0x14 30. " INTENABLE30 ,Interrupt Enable 30" "Disabled,Enabled"
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bitfld.long 0x14 29. " INTENABLE29 ,Interrupt Enable 29" "Disabled,Enabled"
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textline " "
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bitfld.long 0x14 28. " INTENABLE28 ,Interrupt Enable 28" "Disabled,Enabled"
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bitfld.long 0x14 27. " INTENABLE27 ,Interrupt Enable 27" "Disabled,Enabled"
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bitfld.long 0x14 26. " INTENABLE26 ,Interrupt Enable 26" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 25. " INTENABLE25 ,Interrupt Enable 25" "Disabled,Enabled"
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bitfld.long 0x14 24. " INTENABLE24 ,Interrupt Enable 24" "Disabled,Enabled"
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bitfld.long 0x14 23. " INTENABLE23 ,Interrupt Enable 23" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 22. " INTENABLE22 ,Interrupt Enable 22" "Disabled,Enabled"
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bitfld.long 0x14 21. " INTENABLE21 ,Interrupt Enable 21" "Disabled,Enabled"
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bitfld.long 0x14 20. " INTENABLE20 ,Interrupt Enable 20" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 19. " INTENABLE19 ,Interrupt Enable 19" "Disabled,Enabled"
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bitfld.long 0x14 18. " INTENABLE18 ,Interrupt Enable 18" "Disabled,Enabled"
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bitfld.long 0x14 17. " INTENABLE17 ,Interrupt Enable 17" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 16. " INTENABLE16 ,Interrupt Enable 16" "Disabled,Enabled"
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bitfld.long 0x14 15. " INTENABLE15 ,Interrupt Enable 15" "Disabled,Enabled"
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bitfld.long 0x14 14. " INTENABLE14 ,Interrupt Enable 14" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 13. " INTENABLE13 ,Interrupt Enable 13" "Disabled,Enabled"
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bitfld.long 0x14 12. " INTENABLE12 ,Interrupt Enable 12 " "Disabled,Enabled"
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bitfld.long 0x14 11. " INTENABLE11 ,Interrupt Enable 11" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 10. " INTENABLE10 ,Interrupt Enable 10" "Disabled,Enabled"
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bitfld.long 0x14 9. " INTENABLE9 ,Interrupt Enable 9" "Disabled,Enabled"
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bitfld.long 0x14 8. " INTENABLE8 ,Interrupt Enable 8" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 7. " INTENABLE7 ,Interrupt Enable 7" "Disabled,Enabled"
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bitfld.long 0x14 6. " INTENABLE6 ,Interrupt Enable 6" "Disabled,Enabled"
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bitfld.long 0x14 5. " INTENABLE5 ,Interrupt Enable 5" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 4. " INTENABLE4 ,Interrupt Enable 4" "Disabled,Enabled"
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bitfld.long 0x14 3. " INTENABLE3 ,Interrupt Enable 3" "Disabled,Enabled"
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bitfld.long 0x14 2. " INTENABLE2 ,Interrupt Enable 2" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x14 1. " INTENABLE1 ,Interrupt Enable 1" "Disabled,Enabled"
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bitfld.long 0x14 0. " INTENABLE0 ,Interrupt Enable 0" "Disabled,Enabled"
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line.long 0x18 "INTTYPEH,Interrupt Type Register High"
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bitfld.long 0x18 31. " INTTYPE63 ,Interrupt Type 63" "Normal,Fast"
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bitfld.long 0x18 30. " INTTYPE62 ,Interrupt Type 62" "Normal,Fast"
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bitfld.long 0x18 29. " INTTYPE61 ,Interrupt Type 61" "Normal,Fast"
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|
textline " "
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bitfld.long 0x18 28. " INTTYPE60 ,Interrupt Type 60" "Normal,Fast"
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bitfld.long 0x18 27. " INTTYPE59 ,Interrupt Type 59" "Normal,Fast"
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bitfld.long 0x18 26. " INTTYPE58 ,Interrupt Type 58" "Normal,Fast"
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|
textline " "
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bitfld.long 0x18 25. " INTTYPE57 ,Interrupt Type 57" "Normal,Fast"
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bitfld.long 0x18 24. " INTTYPE56 ,Interrupt Type 56" "Normal,Fast"
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bitfld.long 0x18 23. " INTTYPE55 ,Interrupt Type 55" "Normal,Fast"
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|
textline " "
|
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bitfld.long 0x18 22. " INTTYPE54 ,Interrupt Type 54" "Normal,Fast"
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bitfld.long 0x18 21. " INTTYPE53 ,Interrupt Type 53" "Normal,Fast"
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bitfld.long 0x18 20. " INTTYPE52 ,Interrupt Type 52" "Normal,Fast"
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textline " "
|
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bitfld.long 0x18 19. " INTTYPE51 ,Interrupt Type 51" "Normal,Fast"
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bitfld.long 0x18 18. " INTTYPE50 ,Interrupt Type 50" "Normal,Fast"
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bitfld.long 0x18 17. " INTTYPE49 ,Interrupt Type 49" "Normal,Fast"
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textline " "
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bitfld.long 0x18 16. " INTTYPE48 ,Interrupt Type 48" "Normal,Fast"
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bitfld.long 0x18 15. " INTTYPE47 ,Interrupt Type 47" "Normal,Fast"
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bitfld.long 0x18 14. " INTTYPE46 ,Interrupt Type 46" "Normal,Fast"
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textline " "
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bitfld.long 0x18 13. " INTTYPE45 ,Interrupt Type 45" "Normal,Fast"
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bitfld.long 0x18 12. " INTTYPE44 ,Interrupt Type 44" "Normal,Fast"
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bitfld.long 0x18 11. " INTTYPE43 ,Interrupt Type 43" "Normal,Fast"
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textline " "
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bitfld.long 0x18 10. " INTTYPE42 ,Interrupt Type 42" "Normal,Fast"
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bitfld.long 0x18 9. " INTTYPE41 ,Interrupt Type 41" "Normal,Fast"
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bitfld.long 0x18 8. " INTTYPE40 ,Interrupt Type 40" "Normal,Fast"
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textline " "
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bitfld.long 0x18 7. " INTTYPE39 ,Interrupt Type 39" "Normal,Fast"
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bitfld.long 0x18 6. " INTTYPE38 ,Interrupt Type 38" "Normal,Fast"
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bitfld.long 0x18 5. " INTTYPE37 ,Interrupt Type 37" "Normal,Fast"
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textline " "
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bitfld.long 0x18 4. " INTTYPE36 ,Interrupt Type 36" "Normal,Fast"
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bitfld.long 0x18 3. " INTTYPE35 ,Interrupt Type 35" "Normal,Fast"
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bitfld.long 0x18 2. " INTTYPE34 ,Interrupt Type 34" "Normal,Fast"
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textline " "
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bitfld.long 0x18 1. " INTTYPE33 ,Interrupt Type 33" "Normal,Fast"
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bitfld.long 0x18 0. " INTTYPE32 ,Interrupt Type 32" "Normal,Fast"
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line.long 0x1c "INTTYPEL,Interrupt Type Register Low"
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bitfld.long 0x1C 31. " INTTYPE31 ,Interrupt Type 31" "Normal,Fast"
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bitfld.long 0x1C 30. " INTTYPE30 ,Interrupt Type 30" "Normal,Fast"
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bitfld.long 0x1C 29. " INTTYPE29 ,Interrupt Type 29" "Normal,Fast"
|
|
textline " "
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bitfld.long 0x1C 28. " INTTYPE28 ,Interrupt Type 28" "Normal,Fast"
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bitfld.long 0x1C 27. " INTTYPE27 ,Interrupt Type 27" "Normal,Fast"
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bitfld.long 0x1C 26. " INTTYPE26 ,Interrupt Type 26" "Normal,Fast"
|
|
textline " "
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bitfld.long 0x1C 25. " INTTYPE25 ,Interrupt Type 25" "Normal,Fast"
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bitfld.long 0x1C 24. " INTTYPE24 ,Interrupt Type 24" "Normal,Fast"
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bitfld.long 0x1C 23. " INTTYPE23 ,Interrupt Type 23" "Normal,Fast"
|
|
textline " "
|
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bitfld.long 0x1C 22. " INTTYPE22 ,Interrupt Type 22" "Normal,Fast"
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bitfld.long 0x1C 21. " INTTYPE21 ,Interrupt Type 21" "Normal,Fast"
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bitfld.long 0x1C 20. " INTTYPE20 ,Interrupt Type 20" "Normal,Fast"
|
|
textline " "
|
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bitfld.long 0x1C 19. " INTTYPE19 ,Interrupt Type 19" "Normal,Fast"
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bitfld.long 0x1C 18. " INTTYPE18 ,Interrupt Type 18" "Normal,Fast"
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bitfld.long 0x1C 17. " INTTYPE17 ,Interrupt Type 17" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " INTTYPE16 ,Interrupt Type 16" "Normal,Fast"
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bitfld.long 0x1C 15. " INTTYPE15 ,Interrupt Type 15" "Normal,Fast"
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bitfld.long 0x1C 14. " INTTYPE14 ,Interrupt Type 14" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " INTTYPE13 ,Interrupt Type 13" "Normal,Fast"
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bitfld.long 0x1C 12. " INTTYPE12 ,Interrupt Type 12" "Normal,Fast"
|
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bitfld.long 0x1C 11. " INTTYPE11 ,Interrupt Type 11" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " INTTYPE10 ,Interrupt Type 10" "Normal,Fast"
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bitfld.long 0x1C 9. " INTTYPE9 ,Interrupt Type 9" "Normal,Fast"
|
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bitfld.long 0x1C 8. " INTTYPE8 ,Interrupt Type 8" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " INTTYPE7 ,Interrupt Type 7" "Normal,Fast"
|
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bitfld.long 0x1C 6. " INTTYPE6 ,Interrupt Type 6" "Normal,Fast"
|
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bitfld.long 0x1C 5. " INTTYPE5 ,Interrupt Type 5" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " INTTYPE4 ,Interrupt Type 4" "Normal,Fast"
|
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bitfld.long 0x1C 3. " INTTYPE3 ,Interrupt Type 3" "Normal,Fast"
|
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bitfld.long 0x1C 2. " INTTYPE2 ,Interrupt Type 2" "Normal,Fast"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " INTTYPE1 ,Interrupt Type 1" "Normal,Fast"
|
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bitfld.long 0x1C 0. " INTTYPE0 ,Interrupt Type 0" "Normal,Fast"
|
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line.long 0x20 "NIPRIORITY7,Normal Interrupt Priority Level Register 7"
|
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bitfld.long 0x20 28.--31. " NIPR63 ,Normal Interrupt Priority Level 63" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x20 24.--27. " NIPR62 ,Normal Interrupt Priority Level 62" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x20 20.--23. " NIPR61 ,Normal Interrupt Priority Level 61" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x20 16.--19. " NIPR60 ,Normal Interrupt Priority Level 60" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
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bitfld.long 0x20 12.--15. " NIPR59 ,Normal Interrupt Priority Level 59" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x20 8.--11. " NIPR58 ,Normal Interrupt Priority Level 58" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x20 4.--7. " NIPR57 ,Normal Interrupt Priority Level 57" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x20 0.--3. " NIPR56 ,Normal Interrupt Priority Level 56" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x24 "NIPRIORITY6,Normal Interrupt Priority Level Register 6"
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bitfld.long 0x24 28.--31. " NIPR55 ,Normal Interrupt Priority Level 55" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x24 24.--27. " NIPR54 ,Normal Interrupt Priority Level 54" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 20.--23. " NIPR53 ,Normal Interrupt Priority Level 53" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 16.--19. " NIPR52 ,Normal Interrupt Priority Level 52" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x24 12.--15. " NIPR51 ,Normal Interrupt Priority Level 51" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 8.--11. " NIPR50 ,Normal Interrupt Priority Level 50" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 4.--7. " NIPR49 ,Normal Interrupt Priority Level 49" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 0.--3. " NIPR48 ,Normal Interrupt Priority Level 48" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x28 "NIPRIORITY5,Normal Interrupt Priority Level Register 5"
|
|
bitfld.long 0x28 28.--31. " NIPR47 ,Normal Interrupt Priority Level 47" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 24.--27. " NIPR46 ,Normal Interrupt Priority Level 46" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 20.--23. " NIPR45 ,Normal Interrupt Priority Level 45" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 16.--19. " NIPR44 ,Normal Interrupt Priority Level 44" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x28 12.--15. " NIPR43 ,Normal Interrupt Priority Level 43" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 8.--11. " NIPR42 ,Normal Interrupt Priority Level 42" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 4.--7. " NIPR41 ,Normal Interrupt Priority Level 41" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 0.--3. " NIPR40 ,Normal Interrupt Priority Level 40" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x2c "NIPRIORITY4,Normal Interrupt Priority Level Register 4"
|
|
bitfld.long 0x2C 28.--31. " NIPR39 ,Normal Interrupt Priority Level 39" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 24.--27. " NIPR38 ,Normal Interrupt Priority Level 38" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 20.--23. " NIPR37 ,Normal Interrupt Priority Level 37" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 16.--19. " NIPR36 ,Normal Interrupt Priority Level 36" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x2C 12.--15. " NIPR35 ,Normal Interrupt Priority Level 35" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 8.--11. " NIPR34 ,Normal Interrupt Priority Level 34" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 4.--7. " NIPR33 ,Normal Interrupt Priority Level 33" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 0.--3. " NIPR32 ,Normal Interrupt Priority Level 32" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x30 "NIPRIORITY3,Normal Interrupt Priority Level Register 3"
|
|
bitfld.long 0x30 28.--31. " NIPR31 ,Normal Interrupt Priority Level 31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x30 24.--27. " NIPR30 ,Normal Interrupt Priority Level 30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x30 20.--23. " NIPR29 ,Normal Interrupt Priority Level 29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x30 16.--19. " NIPR28 ,Normal Interrupt Priority Level 28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x30 12.--15. " NIPR27 ,Normal Interrupt Priority Level 27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x30 8.--11. " NIPR26 ,Normal Interrupt Priority Level 26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x30 4.--7. " NIPR25 ,Normal Interrupt Priority Level 25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x30 0.--3. " NIPR24 ,Normal Interrupt Priority Level 24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x34 "NIPRIORITY2,Normal Interrupt Priority Level Register 2"
|
|
bitfld.long 0x34 28.--31. " NIPR23 ,Normal Interrupt Priority Level 23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x34 24.--27. " NIPR22 ,Normal Interrupt Priority Level 22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x34 20.--23. " NIPR21 ,Normal Interrupt Priority Level 21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x34 16.--19. " NIPR20 ,Normal Interrupt Priority Level 20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x34 12.--15. " NIPR19 ,Normal Interrupt Priority Level 19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x34 8.--11. " NIPR18 ,Normal Interrupt Priority Level 18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x34 4.--7. " NIPR17 ,Normal Interrupt Priority Level 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x34 0.--3. " NIPR16 ,Normal Interrupt Priority Level 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x38 "NIPRIORITY1,Normal Interrupt Priority Level Register 1"
|
|
bitfld.long 0x38 28.--31. " NIPR15 ,Normal Interrupt Priority Level 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x38 24.--27. " NIPR14 ,Normal Interrupt Priority Level 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x38 20.--23. " NIPR13 ,Normal Interrupt Priority Level 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x38 16.--19. " NIPR12 ,Normal Interrupt Priority Level 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x38 12.--15. " NIPR11 ,Normal Interrupt Priority Level 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x38 8.--11. " NIPR10 ,Normal Interrupt Priority Level 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x38 4.--7. " NIPR9 ,Normal Interrupt Priority Level 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x38 0.--3. " NIPR8 ,Normal Interrupt Priority Level 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x3c "NIPRIORITY0,Normal Interrupt Priority Level Register 0"
|
|
bitfld.long 0x3C 28.--31. " NIPR7 ,Normal Interrupt Priority Level 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x3C 24.--27. " NIPR6 ,Normal Interrupt Priority Level 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x3C 20.--23. " NIPR5 ,Normal Interrupt Priority Level 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x3C 16.--19. " NIPR4 ,Normal Interrupt Priority Level 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x3C 12.--15. " NIPR3 ,Normal Interrupt Priority Level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x3C 8.--11. " NIPR2 ,Normal Interrupt Priority Level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x3C 4.--7. " NIPR1 ,Normal Interrupt Priority Level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x3C 0.--3. " NIPR0 ,Normal Interrupt Priority Level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 9.
|
|
rgroup.long 0x40++0x0f
|
|
line.long 0x00 "NIVECSR,Normal Interrupt Vector and Status"
|
|
hexmask.long.word 0x00 16.--31. 1. " NIVECTOR ,Normal Interrupt Vector"
|
|
hexmask.long.word 0x00 0.--15. 1. " NIPRILVL ,Normal Interrupt Priority Level"
|
|
line.long 0x04 "FIVECSR,Fast Interrupt Vector And Status Register"
|
|
line.long 0x08 "INTSRCH,Interrupt Source Register High"
|
|
bitfld.long 0x08 31. " NT_DPTC ,Dynamic Process Temperature Compensate (DPTC)" "Negated,Asserted"
|
|
bitfld.long 0x08 30. " INT_IIM ,IC Identify Module (IIM)" "Negated,Asserted"
|
|
bitfld.long 0x08 29. " NT_LCDC ,LCD Controller (LCDC)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 28. " INT_SLCDC ,Smart LCD Controller (SLCDC)" "Negated,Asserted"
|
|
bitfld.long 0x08 27. " INT_SAHARA ,Symmetric/Asymmetric Hashing and Random Accelerator" "Negated,Asserted"
|
|
bitfld.long 0x08 26. " INT_SCM ,SCC SCM" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 25. " INT_SMN ,SCC SMN" "Negated,Asserted"
|
|
bitfld.long 0x08 24. " INT_USBOTG ,USB OTG" "Negated,Asserted"
|
|
bitfld.long 0x08 23. " INT_USBHS2 ,USB HOST2" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 22. " INT_USBHS1 ,USB HOST1" "Negated,Asserted"
|
|
bitfld.long 0x08 21. " INT_H264 ,H264" "Negated,Asserted"
|
|
bitfld.long 0x08 20. " INT_EMMAPP ,EMMA Post Processor Interrupt" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INT_EMMAPRP ,EMMA Pre Processor Interrupt" "Negated,Asserted"
|
|
bitfld.long 0x08 18. " INT_FEC ,Fast Ethernet Controller" "Negated,Asserted"
|
|
bitfld.long 0x08 17. " INT_UART5 ,UART5" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 16. " INT_UART6 ,UART6" "Negated,Asserted"
|
|
bitfld.long 0x08 15. " INT_DMACH15 ,DMA Channel 15" "Negated,Asserted"
|
|
bitfld.long 0x08 14. " INT_DMACH14 ,DMA Channel 14" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " INT_DMACH13 ,DMA Channel 13" "Negated,Asserted"
|
|
bitfld.long 0x08 12. " INT_DMACH12 ,DMA Channel 12" "Negated,Asserted"
|
|
bitfld.long 0x08 11. " INT_DMACH11 ,DMA Channel 11" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " INT_DMACH10 ,DMA Channel 10" "Negated,Asserted"
|
|
bitfld.long 0x08 9. " INT_DMACH9 ,DMA Channel 9" "Negated,Asserted"
|
|
bitfld.long 0x08 8. " INT_DMACH8 ,DMA Channel 8" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INT_DMACH7 ,DMA Channel 7" "Negated,Asserted"
|
|
bitfld.long 0x08 6. " INT_DMACH6 ,DMA Channel 6" "Negated,Asserted"
|
|
bitfld.long 0x08 5. " INT_DMACH5 ,DMA Channel 5" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " INT_DMACH4 ,DMA Channel 4" "Negated,Asserted"
|
|
bitfld.long 0x08 3. " INT_DMACH3 ,DMA Channel 3" "Negated,Asserted"
|
|
bitfld.long 0x08 2. " INT_DMACH2 ,DMA Channel 2" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 1. " INT_DMACH1 ,DMA Channel 1" "Negated,Asserted"
|
|
bitfld.long 0x08 0. " INT_DMACH0 ,DMA Channel 0" "Negated,Asserted"
|
|
line.long 0x0c "INTSRCL,Interrupt Source Register Low"
|
|
bitfld.long 0x0C 31. " INT_CSI ,CMOS Sensor Interface (CSI)" "Negated,Asserted"
|
|
bitfld.long 0x0C 30. " INT_ATA ,Advanced Technology Attachment (ATA)" "Negated,Asserted"
|
|
bitfld.long 0x0C 29. " INT_NFC ,Nand Flash Controller (NFC)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " INT_PCMCIA ,PCMCIA/CF Host Controller (PCMCIA)" "Negated,Asserted"
|
|
bitfld.long 0x0C 27. " INT_WDOG ,Watchdog (WDOG)" "Negated,Asserted"
|
|
bitfld.long 0x0C 26. " INT_GPT1 ,General Purpose Timer (GPT1)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " INT_GPT2 ,General Purpose Timer (GPT2)" "Negated,Asserted"
|
|
bitfld.long 0x0C 24. " INT_GPT3 ,General Purpose Timer (GPT3)" "Negated,Asserted"
|
|
bitfld.long 0x0C 23. " INT_PWM ,Pulse Width Modulator (PWM)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " INT_RTC ,Real-Time Clock (RTC)" "Negated,Asserted"
|
|
bitfld.long 0x0C 21. " INT_KPP ,Key Pad Port (KPP)" "Negated,Asserted"
|
|
bitfld.long 0x0C 20. " INT_UART1 ,UART1" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " INT_UART2 ,UART2" "Negated,Asserted"
|
|
bitfld.long 0x0C 18. " INT_UART3 ,UART3" "Negated,Asserted"
|
|
bitfld.long 0x0C 17. " INT_UART4 ,UART4" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " INT_CSPI1 ,Configurable SPI (CSPI1)" "Negated,Asserted"
|
|
bitfld.long 0x0C 15. " INT_CSPI2 ,Configurable SPI (CSPI2)" "Negated,Asserted"
|
|
bitfld.long 0x0C 14. " INT_SSI1 ,Synchronous Serial Interface 1(SSI1)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " INT_SS2 ,Synchronous Serial Interface (SSI2)" "Negated,Asserted"
|
|
bitfld.long 0x0C 12. " INT_I2C1 ,I2C Bus Controller (I2C1)" "Negated,Asserted"
|
|
bitfld.long 0x0C 11. " INT_SDHC1 ,Secure Digital Host Controller (SDHC1)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " INT_SDHC2 ,Secure Digital Host Controller (SDHC2)" "Negated,Asserted"
|
|
bitfld.long 0x0C 9. " INT_SDHC3 ,Secure Digital Host Controller (SDHC3)" "Negated,Asserted"
|
|
bitfld.long 0x0C 8. " INT_GPIO ,General Purpose Input/Output (GPIO)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " INT_MSHC ,Memory Stick Host Controller (MSHC)" "Negated,Asserted"
|
|
bitfld.long 0x0C 6. " INT_CSPI3 ,Configurable SPI (CSPI3)" "Negated,Asserted"
|
|
bitfld.long 0x0C 5. " INT_RTIC ,Real Time Integrity Checker (RTIC)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " INT_GPT4 ,General Purpose Timer (GPT4)" "Negated,Asserted"
|
|
bitfld.long 0x0C 3. " INT_GPT5 ,General Purpose Timer (GPT5)" "Negated,Asserted"
|
|
bitfld.long 0x0C 2. " INT_GPT6 ,General Purpose Timer (GPT6)" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " INT_I2C2 ,I2C Bus Controller (I2C2)" "Negated,Asserted"
|
|
group.long 0x50++0x07
|
|
line.long 0x00 "INTFRCH,Interrupt Force Register High"
|
|
bitfld.long 0x00 31. " FORCE63 ,Interrupt Source Force Request 63" "Standard,Forced"
|
|
bitfld.long 0x00 30. " FORCE62 ,Interrupt Source Force Request 62" "Standard,Forced"
|
|
bitfld.long 0x00 29. " FORCE61 ,Interrupt Source Force Request 61" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FORCE60 ,Interrupt Source Force Request 60" "Standard,Forced"
|
|
bitfld.long 0x00 27. " FORCE59 ,Interrupt Source Force Request 59" "Standard,Forced"
|
|
bitfld.long 0x00 26. " FORCE58 ,Interrupt Source Force Request 58" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FORCE57 ,Interrupt Source Force Request 57" "Standard,Forced"
|
|
bitfld.long 0x00 24. " FORCE56 ,Interrupt Source Force Request 56" "Standard,Forced"
|
|
bitfld.long 0x00 23. " FORCE55 ,Interrupt Source Force Request 55" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FORCE54 ,Interrupt Source Force Request 54" "Standard,Forced"
|
|
bitfld.long 0x00 21. " FORCE53 ,Interrupt Source Force Request 53" "Standard,Forced"
|
|
bitfld.long 0x00 20. " FORCE52 ,Interrupt Source Force Request 52" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FORCE51 ,Interrupt Source Force Request 51" "Standard,Forced"
|
|
bitfld.long 0x00 18. " FORCE50 ,Interrupt Source Force Request 50" "Standard,Forced"
|
|
bitfld.long 0x00 17. " FORCE49 ,Interrupt Source Force Request 49" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FORCE48 ,Interrupt Source Force Request 48" "Standard,Forced"
|
|
bitfld.long 0x00 15. " FORCE47 ,Interrupt Source Force Request 47" "Standard,Forced"
|
|
bitfld.long 0x00 14. " FORCE46 ,Interrupt Source Force Request 46" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FORCE45 ,Interrupt Source Force Request 45" "Standard,Forced"
|
|
bitfld.long 0x00 12. " FORCE44 ,Interrupt Source Force Request 44" "Standard,Forced"
|
|
bitfld.long 0x00 11. " FORCE43 ,Interrupt Source Force Request 43" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FORCE42 ,Interrupt Source Force Request 42" "Standard,Forced"
|
|
bitfld.long 0x00 9. " FORCE41 ,Interrupt Source Force Request 41" "Standard,Forced"
|
|
bitfld.long 0x00 8. " FORCE40 ,Interrupt Source Force Request 40" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FORCE39 ,Interrupt Source Force Request 39" "Standard,Forced"
|
|
bitfld.long 0x00 6. " FORCE38 ,Interrupt Source Force Request 38" "Standard,Forced"
|
|
bitfld.long 0x00 5. " FORCE37 ,Interrupt Source Force Request 37" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FORCE36 ,Interrupt Source Force Request 36" "Standard,Forced"
|
|
bitfld.long 0x00 3. " FORCE35 ,Interrupt Source Force Request 35" "Standard,Forced"
|
|
bitfld.long 0x00 2. " FORCE34 ,Interrupt Source Force Request 34" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FORCE33 ,Interrupt Source Force Request 33" "Standard,Forced"
|
|
bitfld.long 0x00 0. " FORCE32 ,Interrupt Source Force Request 32" "Standard,Forced"
|
|
line.long 0x04 "INTFRCL,Interrupt Force Register Low"
|
|
bitfld.long 0x04 31. " FORCE31 ,Interrupt Source Force Request 31" "Standard,Forced"
|
|
bitfld.long 0x04 30. " FORCE30 ,Interrupt Source Force Request 30" "Standard,Forced"
|
|
bitfld.long 0x04 29. " FORCE29 ,Interrupt Source Force Request 29" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 28. " FORCE28 ,Interrupt Source Force Request 28" "Standard,Forced"
|
|
bitfld.long 0x04 27. " FORCE27 ,Interrupt Source Force Request 27" "Standard,Forced"
|
|
bitfld.long 0x04 26. " FORCE26 ,Interrupt Source Force Request 26" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 25. " FORCE25 ,Interrupt Source Force Request 25" "Standard,Forced"
|
|
bitfld.long 0x04 24. " FORCE24 ,Interrupt Source Force Request 24" "Standard,Forced"
|
|
bitfld.long 0x04 23. " FORCE23 ,Interrupt Source Force Request 23" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 22. " FORCE22 ,Interrupt Source Force Request 22" "Standard,Forced"
|
|
bitfld.long 0x04 21. " FORCE21 ,Interrupt Source Force Request 21" "Standard,Forced"
|
|
bitfld.long 0x04 20. " FORCE20 ,Interrupt Source Force Request 20" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FORCE19 ,Interrupt Source Force Request 19" "Standard,Forced"
|
|
bitfld.long 0x04 18. " FORCE18 ,Interrupt Source Force Request 18" "Standard,Forced"
|
|
bitfld.long 0x04 17. " FORCE17 ,Interrupt Source Force Request 17" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FORCE16 ,Interrupt Source Force Request 16" "Standard,Forced"
|
|
bitfld.long 0x04 15. " FORCE15 ,Interrupt Source Force Request 15" "Standard,Forced"
|
|
bitfld.long 0x04 14. " FORCE14 ,Interrupt Source Force Request 14" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 13. " FORCE13 ,Interrupt Source Force Request 13" "Standard,Forced"
|
|
bitfld.long 0x04 12. " FORCE12 ,Interrupt Source Force Request 12" "Standard,Forced"
|
|
bitfld.long 0x04 11. " FORCE11 ,Interrupt Source Force Request 11" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 10. " FORCE10 ,Interrupt Source Force Request 10" "Standard,Forced"
|
|
bitfld.long 0x04 9. " FORCE9 ,Interrupt Source Force Request 9" "Standard,Forced"
|
|
bitfld.long 0x04 8. " FORCE8 ,Interrupt Source Force Request 8" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FORCE7 ,Interrupt Source Force Request 7" "Standard,Forced"
|
|
bitfld.long 0x04 6. " FORCE6 ,Interrupt Source Force Request 6" "Standard,Forced"
|
|
bitfld.long 0x04 5. " FORCE5 ,Interrupt Source Force Request 5" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FORCE4 ,Interrupt Source Force Request 4" "Standard,Forced"
|
|
bitfld.long 0x04 3. " FORCE3 ,Interrupt Source Force Request 3" "Standard,Forced"
|
|
bitfld.long 0x04 2. " FORCE2 ,Interrupt Source Force Request 2" "Standard,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FORCE1 ,Interrupt Source Force Request 1" "Standard,Forced"
|
|
bitfld.long 0x04 0. " FORCE0 ,Interrupt Source Force Request 0" "Standard,Forced"
|
|
rgroup.long 0x58++0x0f
|
|
line.long 0x00 "NIPNDH,Normal Interrupt Pending Register High"
|
|
bitfld.long 0x00 31. " NIPEND63 ,Normal Interrupt Pending Bit 63" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " NIPEND62 ,Normal Interrupt Pending Bit 62" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " NIPEND61 ,Normal Interrupt Pending Bit 61" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 28. " NIPEND60 ,Normal Interrupt Pending Bit 60" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " NIPEND59 ,Normal Interrupt Pending Bit 59" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " NIPEND58 ,Normal Interrupt Pending Bit 58" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NIPEND57 ,Normal Interrupt Pending Bit 57" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " NIPEND56 ,Normal Interrupt Pending Bit 56" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " NIPEND55 ,Normal Interrupt Pending Bit 55" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NIPEND54 ,Normal Interrupt Pending Bit 54" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " NIPEND53 ,Normal Interrupt Pending Bit 53" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " NIPEND52 ,Normal Interrupt Pending Bit 52" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " NIPEND51 ,Normal Interrupt Pending Bit 51" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " NIPEND50 ,Normal Interrupt Pending Bit 50" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " NIPEND49 ,Normal Interrupt Pending Bit 49" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " NIPEND48 ,Normal Interrupt Pending Bit 48" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " NIPEND47 ,Normal Interrupt Pending Bit 47" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " NIPEND46 ,Normal Interrupt Pending Bit 46" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NIPEND45 ,Normal Interrupt Pending Bit 45" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " NIPEND44 ,Normal Interrupt Pending Bit 44" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " NIPEND43 ,Normal Interrupt Pending Bit 43" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " NIPEND42 ,Normal Interrupt Pending Bit 42" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " NIPEND41 ,Normal Interrupt Pending Bit 41" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " NIPEND40 ,Normal Interrupt Pending Bit 40" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " NIPEND39 ,Normal Interrupt Pending Bit 39" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " NIPEND38 ,Normal Interrupt Pending Bit 38" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " NIPEND37 ,Normal Interrupt Pending Bit 37" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NIPEND36 ,Normal Interrupt Pending Bit 36" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " NIPEND35 ,Normal Interrupt Pending Bit 35" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " NIPEND34 ,Normal Interrupt Pending Bit 34" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NIPEND33 ,Normal Interrupt Pending Bit 33" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " NIPEND32 ,Normal Interrupt Pending Bit 32" "Not requested,Requested"
|
|
line.long 0x04 "NIPNDL,Normal Interrupt Pending Register Low"
|
|
bitfld.long 0x04 31. " NIPEND31 ,Normal Interrupt Pending Bit 31" "Not requested,Requested"
|
|
bitfld.long 0x04 30. " NIPEND30 ,Normal Interrupt Pending Bit 30" "Not requested,Requested"
|
|
bitfld.long 0x04 29. " NIPEND29 ,Normal Interrupt Pending Bit 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 28. " NIPEND28 ,Normal Interrupt Pending Bit 28" "Not requested,Requested"
|
|
bitfld.long 0x04 27. " NIPEND27 ,Normal Interrupt Pending Bit 27" "Not requested,Requested"
|
|
bitfld.long 0x04 26. " NIPEND26 ,Normal Interrupt Pending Bit 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 25. " NIPEND25 ,Normal Interrupt Pending Bit 25" "Not requested,Requested"
|
|
bitfld.long 0x04 24. " NIPEND24 ,Normal Interrupt Pending Bit 24" "Not requested,Requested"
|
|
bitfld.long 0x04 23. " NIPEND23 ,Normal Interrupt Pending Bit 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 22. " NIPEND22 ,Normal Interrupt Pending Bit 22" "Not requested,Requested"
|
|
bitfld.long 0x04 21. " NIPEND21 ,Normal Interrupt Pending Bit 21" "Not requested,Requested"
|
|
bitfld.long 0x04 20. " NIPEND20 ,Normal Interrupt Pending Bit 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 19. " NIPEND19 ,Normal Interrupt Pending Bit 19" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " NIPEND18 ,Normal Interrupt Pending Bit 18" "Not requested,Requested"
|
|
bitfld.long 0x04 17. " NIPEND17 ,Normal Interrupt Pending Bit 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 16. " NIPEND16 ,Normal Interrupt Pending Bit 16" "Not requested,Requested"
|
|
bitfld.long 0x04 15. " NIPEND15 ,Normal Interrupt Pending Bit 15" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " NIPEND14 ,Normal Interrupt Pending Bit 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 13. " NIPEND13 ,Normal Interrupt Pending Bit 13" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " NIPEND12 ,Normal Interrupt Pending Bit 12" "Not requested,Requested"
|
|
bitfld.long 0x04 11. " NIPEND11 ,Normal Interrupt Pending Bit 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 10. " NIPEND10 ,Normal Interrupt Pending Bit 10" "Not requested,Requested"
|
|
bitfld.long 0x04 9. " NIPEND9 ,Normal Interrupt Pending Bit 9" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " NIPEND8 ,Normal Interrupt Pending Bit 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 7. " NIPEND7 ,Normal Interrupt Pending Bit 7" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " NIPEND6 ,Normal Interrupt Pending Bit 6" "Not requested,Requested"
|
|
bitfld.long 0x04 5. " NIPEND5 ,Normal Interrupt Pending Bit 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 4. " NIPEND4 ,Normal Interrupt Pending Bit 4" "Not requested,Requested"
|
|
bitfld.long 0x04 3. " NIPEND3 ,Normal Interrupt Pending Bit 3" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " NIPEND2 ,Normal Interrupt Pending Bit 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 1. " NIPEND1 ,Normal Interrupt Pending Bit 1" "Not requested,Requested"
|
|
bitfld.long 0x04 0. " NIPEND0 ,Normal Interrupt Pending Bit 0" "Not requested,Requested"
|
|
line.long 0x08 "FIPNDH,Fast Interrupt Pending Register High"
|
|
bitfld.long 0x08 31. " FIPEND63 ,Fast Interrupt Pending Bit 63" "Not requested,Requested"
|
|
bitfld.long 0x08 30. " FIPEND62 ,Fast Interrupt Pending Bit 62" "Not requested,Requested"
|
|
bitfld.long 0x08 29. " FIPEND61 ,Fast Interrupt Pending Bit 61" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 28. " FIPEND60 ,Fast Interrupt Pending Bit 60" "Not requested,Requested"
|
|
bitfld.long 0x08 27. " FIPEND59 ,Fast Interrupt Pending Bit 59" "Not requested,Requested"
|
|
bitfld.long 0x08 26. " FIPEND58 ,Fast Interrupt Pending Bit 58" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 25. " FIPEND57 ,Fast Interrupt Pending Bit 57" "Not requested,Requested"
|
|
bitfld.long 0x08 24. " FIPEND56 ,Fast Interrupt Pending Bit 56" "Not requested,Requested"
|
|
bitfld.long 0x08 23. " FIPEND55 ,Fast Interrupt Pending Bit 55" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 22. " FIPEND54 ,Fast Interrupt Pending Bit 54" "Not requested,Requested"
|
|
bitfld.long 0x08 21. " FIPEND53 ,Fast Interrupt Pending Bit 53" "Not requested,Requested"
|
|
bitfld.long 0x08 20. " FIPEND52 ,Fast Interrupt Pending Bit 52" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 19. " FIPEND51 ,Fast Interrupt Pending Bit 51" "Not requested,Requested"
|
|
bitfld.long 0x08 18. " FIPEND50 ,Fast Interrupt Pending Bit 50" "Not requested,Requested"
|
|
bitfld.long 0x08 17. " FIPEND49 ,Fast Interrupt Pending Bit 49" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 16. " FIPEND48 ,Fast Interrupt Pending Bit 48" "Not requested,Requested"
|
|
bitfld.long 0x08 15. " FIPEND47 ,Fast Interrupt Pending Bit 47" "Not requested,Requested"
|
|
bitfld.long 0x08 14. " FIPEND46 ,Fast Interrupt Pending Bit 46" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 13. " FIPEND45 ,Fast Interrupt Pending Bit 45" "Not requested,Requested"
|
|
bitfld.long 0x08 12. " FIPEND44 ,Fast Interrupt Pending Bit 44" "Not requested,Requested"
|
|
bitfld.long 0x08 11. " FIPEND43 ,Fast Interrupt Pending Bit 43" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 10. " FIPEND42 ,Fast Interrupt Pending Bit 42" "Not requested,Requested"
|
|
bitfld.long 0x08 9. " FIPEND41 ,Fast Interrupt Pending Bit 41" "Not requested,Requested"
|
|
bitfld.long 0x08 8. " FIPEND40 ,Fast Interrupt Pending Bit 40" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 7. " FIPEND39 ,Fast Interrupt Pending Bit 39" "Not requested,Requested"
|
|
bitfld.long 0x08 6. " FIPEND38 ,Fast Interrupt Pending Bit 38" "Not requested,Requested"
|
|
bitfld.long 0x08 5. " FIPEND37 ,Fast Interrupt Pending Bit 37" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 4. " FIPEND36 ,Fast Interrupt Pending Bit 36" "Not requested,Requested"
|
|
bitfld.long 0x08 3. " FIPEND35 ,Fast Interrupt Pending Bit 35" "Not requested,Requested"
|
|
bitfld.long 0x08 2. " FIPEND34 ,Fast Interrupt Pending Bit 34" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x08 1. " FIPEND33 ,Fast Interrupt Pending Bit 33" "Not requested,Requested"
|
|
bitfld.long 0x08 0. " FIPEND32 ,Fast Interrupt Pending Bit 32" "Not requested,Requested"
|
|
line.long 0x0c "FIPNDL,Fast Interrupt Pending Register Low"
|
|
bitfld.long 0x0c 31. " FIPNDL31 ,Fast Interrupt Pending Register Low 31" "Not requested,Requested"
|
|
bitfld.long 0x0c 30. " FIPNDL30 ,Fast Interrupt Pending Register Low 30" "Not requested,Requested"
|
|
bitfld.long 0x0c 29. " FIPNDL29 ,Fast Interrupt Pending Register Low 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " FIPNDL28 ,Fast Interrupt Pending Register Low 28" "Not requested,Requested"
|
|
bitfld.long 0x0c 27. " FIPNDL27 ,Fast Interrupt Pending Register Low 27" "Not requested,Requested"
|
|
bitfld.long 0x0c 26. " FIPNDL26 ,Fast Interrupt Pending Register Low 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " FIPNDL25 ,Fast Interrupt Pending Register Low 25" "Not requested,Requested"
|
|
bitfld.long 0x0c 24. " FIPNDL24 ,Fast Interrupt Pending Register Low 24" "Not requested,Requested"
|
|
bitfld.long 0x0c 23. " FIPNDL23 ,Fast Interrupt Pending Register Low 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " FIPNDL22 ,Fast Interrupt Pending Register Low 22" "Not requested,Requested"
|
|
bitfld.long 0x0c 21. " FIPNDL21 ,Fast Interrupt Pending Register Low 21" "Not requested,Requested"
|
|
bitfld.long 0x0c 20. " FIPNDL20 ,Fast Interrupt Pending Register Low 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " FIPNDL19 ,Fast Interrupt Pending Register Low 19" "Not requested,Requested"
|
|
bitfld.long 0x0c 18. " FIPNDL18 ,Fast Interrupt Pending Register Low 18" "Not requested,Requested"
|
|
bitfld.long 0x0c 17. " FIPNDL17 ,Fast Interrupt Pending Register Low 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " FIPNDL16 ,Fast Interrupt Pending Register Low 16" "Not requested,Requested"
|
|
bitfld.long 0x0c 15. " FIPNDL15 ,Fast Interrupt Pending Register Low 15" "Not requested,Requested"
|
|
bitfld.long 0x0c 14. " FIPNDL14 ,Fast Interrupt Pending Register Low 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " FIPNDL13 ,Fast Interrupt Pending Register Low 13" "Not requested,Requested"
|
|
bitfld.long 0x0c 12. " FIPNDL12 ,Fast Interrupt Pending Register Low 12" "Not requested,Requested"
|
|
bitfld.long 0x0c 11. " FIPNDL11 ,Fast Interrupt Pending Register Low 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " FIPNDL10 ,Fast Interrupt Pending Register Low 10" "Not requested,Requested"
|
|
bitfld.long 0x0c 9. " FIPNDL9 ,Fast Interrupt Pending Register Low 9" "Not requested,Requested"
|
|
bitfld.long 0x0c 8. " FIPNDL8 ,Fast Interrupt Pending Register Low 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " FIPNDL7 ,Fast Interrupt Pending Register Low 7" "Not requested,Requested"
|
|
bitfld.long 0x0c 6. " FIPNDL6 ,Fast Interrupt Pending Register Low 6" "Not requested,Requested"
|
|
bitfld.long 0x0c 5. " FIPNDL5 ,Fast Interrupt Pending Register Low 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " FIPNDL4 ,Fast Interrupt Pending Register Low 4" "Not requested,Requested"
|
|
bitfld.long 0x0c 3. " FIPNDL3 ,Fast Interrupt Pending Register Low 3" "Not requested,Requested"
|
|
bitfld.long 0x0c 2. " FIPNDL2 ,Fast Interrupt Pending Register Low 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " FIPNDL1 ,Fast Interrupt Pending Register Low 1" "Not requested,Requested"
|
|
bitfld.long 0x0c 0. " FIPNDL0 ,Fast Interrupt Pending Register Low 0" "Not requested,Requested"
|
|
width 0xb
|
|
tree.end
|
|
tree "SCC (Security Controller)"
|
|
tree.end
|
|
tree "SAHARA2 (Symmetric/Asymmetric Hashing and Random Accelerator)"
|
|
tree.end
|
|
tree "RTIC (Run-Time Integrity Checker)"
|
|
tree.end
|
|
tree "IIM (IC Identification)"
|
|
tree.end
|
|
tree "M3IF (Multi-Master Memory Interface)"
|
|
base ad:0xd8003000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "M3IFCTL,M3IF Control Register"
|
|
bitfld.long 0x00 31. " SDA ,SDRAM/MDDR Memory Active" "Not active,Active"
|
|
bitfld.long 0x00 11. " MLSD_EN ,Master Lock SDRAM/MDDR Access" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " MLSD ,Master Lock SDRAM/MDDR Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MRRP7 ,Master Round Robin Priority 7" "Not on list,On list"
|
|
bitfld.long 0x00 6. " MRRP6 ,Master Round Robin Priority 6" "Not on list,On list"
|
|
bitfld.long 0x00 5. " MRRP5 ,Master Round Robin Priority 5" "Not on list,On list"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MRRP4 ,Master Round Robin Priority 4" "Not on list,On list"
|
|
bitfld.long 0x00 3. " MRRP3 ,Master Round Robin Priority 3" "Not on list,On list"
|
|
bitfld.long 0x00 2. " MRRP2 ,Master Round Robin Priority 2" "Not on list,On list"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MRRP1 ,Master Round Robin Priority 1" "Not on list,On list"
|
|
bitfld.long 0x00 0. " MRRP0 ,Master Round Robin Priority 0" "Not on list,On list"
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "M3IFSCFG0,M3IF Snooping Configuration Register 0"
|
|
hexmask.long 0x00 11.--31. 0x800 " SWBA ,Snooping Window Base Address"
|
|
bitfld.long 0x00 1.--4. " SWSZ ,Snooping Window Size" "2 KByte,4 KByte,8 KByte,16 KByte,32 KByte,64 KByte,128 KByte,256 KByte,512 KByte,1 MByte,2 MByte,4 MByte,8 MByte,16 MByte,?..."
|
|
bitfld.long 0x00 0. " SE ,Snooping Enable" "Disabled,Enabled"
|
|
line.long 0x04 "M3IFSCFG1,M3IF Snooping Configuration Register 1"
|
|
bitfld.long 0x04 31. " SSE0_31 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " SSE0_30 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " SSE0_29 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SSE0_28 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " SSE0_27 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " SSE0_26 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SSE0_25 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " SSE0_24 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " SSE0_23 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SSE0_22 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " SSE0_21 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " SSE0_20 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SSE0_19 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " SSE0_18 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " SSE0_17 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SSE0_16 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " SSE0_15 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " SSE0_14 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SSE0_13 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " SSE0_12 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " SSE0_11 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SSE0_10 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SSE0_9 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SSE0_8 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SSE0_7 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " SSE0_6 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SSE0_5 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SSE0_4 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " SSE0_3 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SSE0_2 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SSE0_1 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SSE0_0 ,Snooping Segment Enable 0" "Disabled,Enabled"
|
|
line.long 0x08 "M3IFSCFG2,M3IF Snooping Configuration Register 2"
|
|
bitfld.long 0x08 31. " SSE1_31 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " SSE1_30 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " SSE1_29 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SSE1_28 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " SSE1_27 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " SSE1_26 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SSE1_25 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " SSE1_24 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " SSE1_23 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SSE1_22 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " SSE1_21 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " SSE1_20 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SSE1_19 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " SSE1_18 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " SSE1_17 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SSE1_16 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " SSE1_15 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " SSE1_14 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SSE1_13 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " SSE1_12 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " SSE1_11 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SSE1_10 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SSE1_9 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " SSE1_8 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SSE1_7 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " SSE1_6 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " SSE1_5 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SSE1_4 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " SSE1_3 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " SSE1_2 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SSE1_1 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SSE1_0 ,Snooping Segment Enable 1" "Disabled,Enabled"
|
|
line.long 0x0c "M3IFSSR0,M3IF Snooping Status Register 0"
|
|
bitfld.long 0x0c 31. " SSS0_31 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 30. " SSS0_30 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 29. " SSS0_29 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " SSS0_28 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 27. " SSS0_27 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 26. " SSS0_26 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " SSS0_25 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 24. " SSS0_24 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 23. " SSS0_23 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " SSS0_22 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 21. " SSS0_21 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 20. " SSS0_20 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " SSS0_19 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 18. " SSS0_18 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 17. " SSS0_17 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " SSS0_16 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 15. " SSS0_15 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 14. " SSS0_14 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " SSS0_13 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 12. " SSS0_12 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 11. " SSS0_11 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " SSS0_10 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 9. " SSS0_9 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 8. " SSS0_8 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " SSS0_7 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 6. " SSS0_6 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 5. " SSS0_5 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " SSS0_4 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 3. " SSS0_3 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 2. " SSS0_2 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " SSS0_1 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
bitfld.long 0x0c 0. " SSS0_0 ,Snooping Segment Status 0" "Not occurred,Occurred"
|
|
line.long 0x10 "M3IFSSR1,M3IF Snooping Status Register 1"
|
|
bitfld.long 0x10 31. " SSS1_31 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 30. " SSS1_30 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 29. " SSS1_29 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SSS1_28 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 27. " SSS1_27 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 26. " SSS1_26 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SSS1_25 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 24. " SSS1_24 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 23. " SSS1_23 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SSS1_22 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 21. " SSS1_21 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 20. " SSS1_20 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SSS1_19 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 18. " SSS1_18 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 17. " SSS1_17 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SSS1_16 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 15. " SSS1_15 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 14. " SSS1_14 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SSS1_13 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 12. " SSS1_12 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 11. " SSS1_11 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SSS1_10 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 9. " SSS1_9 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 8. " SSS1_8 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SSS1_7 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 6. " SSS1_6 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 5. " SSS1_5 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SSS1_4 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 3. " SSS1_3 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 2. " SSS1_2 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SSS1_1 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 0. " SSS1_0 ,Snooping Segment Status 1" "Not occurred,Occurred"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "M3IFMLWE0,M3IF Master Lock WEIM CS0 Register"
|
|
bitfld.long 0x0 31. " WEMA0 ,WEIM CS0 Memory Active" "Not active,Active"
|
|
bitfld.long 0x0 3. " MLWE0_EN ,Master Lock WEIM CS0 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--2. " MLWE0 ,Master Lock WEIM CS0 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0x4 "M3IFMLWE1,M3IF Master Lock WEIM CS1 Register"
|
|
bitfld.long 0x4 31. " WEMA1 ,WEIM CS1 Memory Active" "Not active,Active"
|
|
bitfld.long 0x4 3. " MLWE1_EN ,Master Lock WEIM CS1 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--2. " MLWE1 ,Master Lock WEIM CS1 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0x8 "M3IFMLWE2,M3IF Master Lock WEIM CS2 Register"
|
|
bitfld.long 0x8 31. " WEMA2 ,WEIM CS2 Memory Active" "Not active,Active"
|
|
bitfld.long 0x8 3. " MLWE2_EN ,Master Lock WEIM CS2 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--2. " MLWE2 ,Master Lock WEIM CS2 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0xC "M3IFMLWE3,M3IF Master Lock WEIM CS3 Register"
|
|
bitfld.long 0xC 31. " WEMA3 ,WEIM CS3 Memory Active" "Not active,Active"
|
|
bitfld.long 0xC 3. " MLWE3_EN ,Master Lock WEIM CS3 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--2. " MLWE3 ,Master Lock WEIM CS3 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0x10 "M3IFMLWE4,M3IF Master Lock WEIM CS4 Register"
|
|
bitfld.long 0x10 31. " WEMA4 ,WEIM CS4 Memory Active" "Not active,Active"
|
|
bitfld.long 0x10 3. " MLWE4_EN ,Master Lock WEIM CS4 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--2. " MLWE4 ,Master Lock WEIM CS4 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
line.long 0x14 "M3IFMLWE5,M3IF Master Lock WEIM CS5 Register"
|
|
bitfld.long 0x14 31. " WEMA5 ,WEIM CS5 Memory Active" "Not active,Active"
|
|
bitfld.long 0x14 3. " MLWE5_EN ,Master Lock WEIM CS5 Access Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--2. " MLWE5 ,Master Lock WEIM CS5 Access" "Master Port Gasket 0,Master Port Gasket 1,Master Port Gasket 2,Master Port Gasket 3,Master Port Gasket 4,Master Port Gasket 5,Master Port Gasket 6,Master Port Gasket 7"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "WEIM (Wireless External Interface Module)"
|
|
base ad:0xd8002000
|
|
tree "WEIM 0"
|
|
width 8.
|
|
if (((data.long(ad:0xd8002000+0x0)&0x200000)==0x200000))
|
|
group.long (0x00+0x0)++0x03
|
|
line.long 0x00 "CSCR0U,Chip Select 0 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long (0x00+0x0)++0x03
|
|
line.long 0x00 "CSCR0U,Chip Select 0 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(ad:(0xd8002000+0x8+0x0))&0x8000)==0x8000))
|
|
width 8.
|
|
group.long (0x04+0x0)++0x03
|
|
line.long 0x00 "CSCR0L,Chip Select 0 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,Reserved,Reserved,16-bit,Reserved,32-bit,32-bit"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x0)++0x03
|
|
line.long 0x00 "CSCR0A,Chip Select 0 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "2,4,6,8"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group.long (0x04+0x0)++0x03
|
|
line.long 0x00 "CSCR0L,Chip Select 0 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,8-bit,8-bit,?..."
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x0)++0x03
|
|
line.long 0x00 "CSCR0A,Chip Select 0 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "WEIM 1"
|
|
width 8.
|
|
if (((data.long(ad:0xd8002000+0x10)&0x200000)==0x200000))
|
|
group.long (0x00+0x10)++0x03
|
|
line.long 0x00 "CSCR1U,Chip Select 1 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long (0x00+0x10)++0x03
|
|
line.long 0x00 "CSCR1U,Chip Select 1 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(ad:(0xd8002000+0x8+0x10))&0x8000)==0x8000))
|
|
width 8.
|
|
group.long (0x04+0x10)++0x03
|
|
line.long 0x00 "CSCR1L,Chip Select 1 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,Reserved,Reserved,16-bit,Reserved,32-bit,32-bit"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x10)++0x03
|
|
line.long 0x00 "CSCR1A,Chip Select 1 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "2,4,6,8"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group.long (0x04+0x10)++0x03
|
|
line.long 0x00 "CSCR1L,Chip Select 1 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,8-bit,8-bit,?..."
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x10)++0x03
|
|
line.long 0x00 "CSCR1A,Chip Select 1 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "WEIM 2"
|
|
width 8.
|
|
if (((data.long(ad:0xd8002000+0x20)&0x200000)==0x200000))
|
|
group.long (0x00+0x20)++0x03
|
|
line.long 0x00 "CSCR2U,Chip Select 2 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long (0x00+0x20)++0x03
|
|
line.long 0x00 "CSCR2U,Chip Select 2 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(ad:(0xd8002000+0x8+0x20))&0x8000)==0x8000))
|
|
width 8.
|
|
group.long (0x04+0x20)++0x03
|
|
line.long 0x00 "CSCR2L,Chip Select 2 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,Reserved,Reserved,16-bit,Reserved,32-bit,32-bit"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x20)++0x03
|
|
line.long 0x00 "CSCR2A,Chip Select 2 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "2,4,6,8"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group.long (0x04+0x20)++0x03
|
|
line.long 0x00 "CSCR2L,Chip Select 2 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,8-bit,8-bit,?..."
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x20)++0x03
|
|
line.long 0x00 "CSCR2A,Chip Select 2 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "WEIM 3"
|
|
width 8.
|
|
if (((data.long(ad:0xd8002000+0x30)&0x200000)==0x200000))
|
|
group.long (0x00+0x30)++0x03
|
|
line.long 0x00 "CSCR3U,Chip Select 3 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long (0x00+0x30)++0x03
|
|
line.long 0x00 "CSCR3U,Chip Select 3 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(ad:(0xd8002000+0x8+0x30))&0x8000)==0x8000))
|
|
width 8.
|
|
group.long (0x04+0x30)++0x03
|
|
line.long 0x00 "CSCR3L,Chip Select 3 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,Reserved,Reserved,16-bit,Reserved,32-bit,32-bit"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x30)++0x03
|
|
line.long 0x00 "CSCR3A,Chip Select 3 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "2,4,6,8"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group.long (0x04+0x30)++0x03
|
|
line.long 0x00 "CSCR3L,Chip Select 3 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,8-bit,8-bit,?..."
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x30)++0x03
|
|
line.long 0x00 "CSCR3A,Chip Select 3 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "WEIM 4"
|
|
width 8.
|
|
if (((data.long(ad:0xd8002000+0x40)&0x200000)==0x200000))
|
|
group.long (0x00+0x40)++0x03
|
|
line.long 0x00 "CSCR4U,Chip Select 4 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long (0x00+0x40)++0x03
|
|
line.long 0x00 "CSCR4U,Chip Select 4 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(ad:(0xd8002000+0x8+0x40))&0x8000)==0x8000))
|
|
width 8.
|
|
group.long (0x04+0x40)++0x03
|
|
line.long 0x00 "CSCR4L,Chip Select 4 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,Reserved,Reserved,16-bit,Reserved,32-bit,32-bit"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x40)++0x03
|
|
line.long 0x00 "CSCR4A,Chip Select 4 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "2,4,6,8"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group.long (0x04+0x40)++0x03
|
|
line.long 0x00 "CSCR4L,Chip Select 4 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,8-bit,8-bit,?..."
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x40)++0x03
|
|
line.long 0x00 "CSCR4A,Chip Select 4 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "WEIM 5"
|
|
width 8.
|
|
if (((data.long(ad:0xd8002000+0x50)&0x200000)==0x200000))
|
|
group.long (0x00+0x50)++0x03
|
|
line.long 0x00 "CSCR5U,Chip Select 5 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,32"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long (0x00+0x50)++0x03
|
|
line.long 0x00 "CSCR5U,Chip Select 5 Upper Control Register"
|
|
bitfld.long 0x00 31. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 30. " WP ,Write Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " BCD ,Burst Clock Divisor" "AHB,AHB/2,AHB/3,AHB/4"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BCS ,Burst Clock Start" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 22.--23. " PSZ ,Page Size" "4,8,16,Continuous"
|
|
bitfld.long 0x00 21. " PME ,Page Mode Emulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYNC ,Synchronous Burst Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " DOL ,Data Output Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14.--15. " CNC ,Chip Select Negation Clock Cycles" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--13. 1. " WSC ,Wait State Control"
|
|
bitfld.long 0x00 7. " EW ,ECB/WAIT" "Low,High"
|
|
bitfld.long 0x00 4.--6. " WWS ,Write Wait State" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " EDC ,Extra Dead Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if (((data.long(ad:(0xd8002000+0x8+0x50))&0x8000)==0x8000))
|
|
width 8.
|
|
group.long (0x04+0x50)++0x03
|
|
line.long 0x00 "CSCR5L,Chip Select 5 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,Reserved,Reserved,16-bit,Reserved,32-bit,32-bit"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x50)++0x03
|
|
line.long 0x00 "CSCR5A,Chip Select 5 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "2,3,4,5,6,7,8,9"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "2,4,6,8"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
else
|
|
group.long (0x04+0x50)++0x03
|
|
line.long 0x00 "CSCR5L,Chip Select 5 Lower Control Register"
|
|
bitfld.long 0x00 28.--31. " OEA ,/OE Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " OEN ,/OE Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " EBWA ,Enable Byte Write Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EBWN ,Enable Byte Write Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " CSA ,Chip Select Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " EBC ,Enable Byte Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DSZ ,Data Port Size" "Reserved,Reserved,8-bit,8-bit,?..."
|
|
bitfld.long 0x00 4.--7. " CSN ,Chip Select Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " PSR ,Pseudo SRAM Enable (Burst Write Enable)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRE ,Control Register Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WRAP ,Wrap Memory Mode" "Not wrap,Wrap"
|
|
bitfld.long 0x00 0. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
group.long (0x08+0x50)++0x03
|
|
line.long 0x00 "CSCR5A,Chip Select 5 Additional Control Register"
|
|
bitfld.long 0x00 28.--31. " EBRA ,Enable Byte Read Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " EBRN ,Enable Byte Read Negate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " RWA ,Read/Write Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RWN ,Read/Write Negation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. " MUM ,Muxed Mode" "Non-muxed,Muxed"
|
|
bitfld.long 0x00 13.--14. " LAH ,/LBA to Address Hold" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LBN ,/LBA Negation" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--9. " LBA ,/LBA Assertion" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " DWW ,Decrease Write Wait State" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DCT ,/DTACK Check Time" "0,1,2,3"
|
|
bitfld.long 0x00 3. " WWU ,Write Wrap Unmask" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " AGE ,Acknowledge Glue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNC2 ,Chip Select Negation Clock Cycles" "0,1"
|
|
bitfld.long 0x00 0. " FCE ,Feedback Clock Enable" "AHB clock,BCLK_FB"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
width 5.
|
|
tree "Common Register"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "WCR,CSPI Configuration Register"
|
|
bitfld.long 0x00 19. " ECP5 ,/ECB Capture Phase" "BCS[0],/BCS[0]"
|
|
bitfld.long 0x00 18. " ECP4 ,/ECB Capture Phase" "BCS[0],/BCS[0]"
|
|
bitfld.long 0x00 17. " ECP3 ,/ECB Capture Phase" "BCS[0],/BCS[0]"
|
|
bitfld.long 0x00 16. " ECP2 ,/ECB Capture Phase" "BCS[0],/BCS[0]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ECP1 ,/ECB Capture Phase" "BCS[0],/BCS[0]"
|
|
bitfld.long 0x00 14. " ECP0 ,/ECB Capture Phase" "BCS[0],/BCS[0]"
|
|
bitfld.long 0x00 13. " AUS5 ,Address Unshifted for CS5" "Shifted,Not shifted"
|
|
bitfld.long 0x00 12. " AUS4 ,Address Unshifted for CS4" "Shifted,Not shifted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " AUS3 ,Address Unshifted for CS3" "Shifted,Not shifted"
|
|
bitfld.long 0x00 10. " AUS2 ,Address Unshifted for CS2" "Shifted,Not shifted"
|
|
bitfld.long 0x00 9. " AUS1 ,Address Unshifted for CS1" "Shifted,Not shifted"
|
|
bitfld.long 0x00 8. " AUS0 ,Address Unshifted for CS0" "Shifted,Not shifted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BCM ,Burst Clock Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MAS ,Merged Address Space" "Standard,Merged"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "ESDRAMC (Enhanced SDRAM Controller)"
|
|
base ad:0xd8001000
|
|
width 9.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "ESDCTL0,Enhanced SDRAM Control Register 0"
|
|
bitfld.long 0x00 31. " SDE ,Enhanced SDRAM Controller Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--30. " SMODE ,SDRAM Controller Operating Mode" "Normal read/write,Precharge,Auto-Refresh,Load Mode Register,Manual Self Refresh,?..."
|
|
textline " "
|
|
bitfld.long 0x00 27. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " COL ,Column Address Width" "8,9,10,?..."
|
|
bitfld.long 0x00 16.--17. " DSIZ ,SDRAM Memory Data Width" "16-bit/D[31:16],16-bit/D[15:0],32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " SREFR ,SDRAM Refresh Rate" "000,001,010,011,100,101,?..."
|
|
bitfld.long 0x00 10.--11. " PWDT ,Power Down Timer" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FP ,Full Page" "Not full page,Full page"
|
|
bitfld.long 0x00 7. " BL ,Burst Length (SDR/LPDDR)" "4/Reserved,8/8"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " PRCT ,Precharge Timer"
|
|
if ((data.long(ad:(0xd8001000+0x10))&0x4)==0x4)
|
|
group.long (0x0+0x04)++0x03
|
|
line.long 0x00 "ESDCFG0,ESDRAMC Configuration Register 0"
|
|
bitfld.long 0x00 21.--22. " tXP ,LPDDR Exit Power Down to Next Valid Command Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 20. " tWTR ,TLPDDR WRITE to READ Command Delay" "1 clock,2 clocks"
|
|
bitfld.long 0x00 18.--19. " tRP ,SDRAM Row Precharge Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " tMRD ,TMRD - SDRAM Load Mode Register to ACTIVE Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 15. " tWR ,SDRAM WRITE to PRECHARGE Command" "2 clocks,3 clocks"
|
|
bitfld.long 0x00 12.--14. " tRAS ,SDRAM ACTIVE to PRECHARGE Command" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " tRRD ,ACTIVE Bank A to ACTIVE Bank B Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 8.--9. " tCAS ,SDRAM CAS Latency" "3 clocks,Reserved,2 clocks,3 clocks"
|
|
bitfld.long 0x00 4.--6. " tRCD ,SDRAM Row to Column Delay" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " tRC ,SDRAM Row Cycle Delay" "20 clocks,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,14 clocks,16 clocks"
|
|
else
|
|
group.long (0x0+0x04)++0x03
|
|
line.long 0x00 "ESDCFG0,ESDRAMC Configuration Register 0"
|
|
bitfld.long 0x00 21.--22. " tXP ,LPDDR Exit Power Down to Next Valid Command Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 20. " tWTR ,TLPDDR WRITE to READ Command Delay" "1 clock,2 clocks"
|
|
bitfld.long 0x00 18.--19. " tRP ,SDRAM Row Precharge Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " tMRD ,TMRD - SDRAM Load Mode Register to ACTIVE Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 15. " tWR ,SDRAM WRITE to PRECHARGE Command" "1 clock,2 clocks"
|
|
bitfld.long 0x00 12.--14. " tRAS ,SDRAM ACTIVE to PRECHARGE Command" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " tRRD ,ACTIVE Bank A to ACTIVE Bank B Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 8.--9. " tCAS ,SDRAM CAS Latency" "Reserved,Reserved,2 clocks,3 clocks"
|
|
bitfld.long 0x00 4.--6. " tRCD ,SDRAM Row to Column Delay" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " tRC ,SDRAM Row Cycle Delay" "20 clocks,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,14 clocks,16 clocks"
|
|
endif
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "ESDCTL1,Enhanced SDRAM Control Register 1"
|
|
bitfld.long 0x00 31. " SDE ,Enhanced SDRAM Controller Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--30. " SMODE ,SDRAM Controller Operating Mode" "Normal read/write,Precharge,Auto-Refresh,Load Mode Register,Manual Self Refresh,?..."
|
|
textline " "
|
|
bitfld.long 0x00 27. " SP ,Supervisor Protect" "Not protected,Protected"
|
|
bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11,12,13,14,15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " COL ,Column Address Width" "8,9,10,?..."
|
|
bitfld.long 0x00 16.--17. " DSIZ ,SDRAM Memory Data Width" "16-bit/D[31:16],16-bit/D[15:0],32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " SREFR ,SDRAM Refresh Rate" "000,001,010,011,100,101,?..."
|
|
bitfld.long 0x00 10.--11. " PWDT ,Power Down Timer" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FP ,Full Page" "Not full page,Full page"
|
|
bitfld.long 0x00 7. " BL ,Burst Length (SDR/LPDDR)" "4/Reserved,8/8"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " PRCT ,Precharge Timer"
|
|
if ((data.long(ad:(0xd8001000+0x10))&0x4)==0x4)
|
|
group.long (0x8+0x04)++0x03
|
|
line.long 0x00 "ESDCFG1,ESDRAMC Configuration Register 1"
|
|
bitfld.long 0x00 21.--22. " tXP ,LPDDR Exit Power Down to Next Valid Command Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 20. " tWTR ,TLPDDR WRITE to READ Command Delay" "1 clock,2 clocks"
|
|
bitfld.long 0x00 18.--19. " tRP ,SDRAM Row Precharge Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " tMRD ,TMRD - SDRAM Load Mode Register to ACTIVE Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 15. " tWR ,SDRAM WRITE to PRECHARGE Command" "2 clocks,3 clocks"
|
|
bitfld.long 0x00 12.--14. " tRAS ,SDRAM ACTIVE to PRECHARGE Command" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " tRRD ,ACTIVE Bank A to ACTIVE Bank B Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 8.--9. " tCAS ,SDRAM CAS Latency" "3 clocks,Reserved,2 clocks,3 clocks"
|
|
bitfld.long 0x00 4.--6. " tRCD ,SDRAM Row to Column Delay" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " tRC ,SDRAM Row Cycle Delay" "20 clocks,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,14 clocks,16 clocks"
|
|
else
|
|
group.long (0x8+0x04)++0x03
|
|
line.long 0x00 "ESDCFG1,ESDRAMC Configuration Register 1"
|
|
bitfld.long 0x00 21.--22. " tXP ,LPDDR Exit Power Down to Next Valid Command Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 20. " tWTR ,TLPDDR WRITE to READ Command Delay" "1 clock,2 clocks"
|
|
bitfld.long 0x00 18.--19. " tRP ,SDRAM Row Precharge Delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " tMRD ,TMRD - SDRAM Load Mode Register to ACTIVE Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 15. " tWR ,SDRAM WRITE to PRECHARGE Command" "1 clock,2 clocks"
|
|
bitfld.long 0x00 12.--14. " tRAS ,SDRAM ACTIVE to PRECHARGE Command" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " tRRD ,ACTIVE Bank A to ACTIVE Bank B Command" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 8.--9. " tCAS ,SDRAM CAS Latency" "Reserved,Reserved,2 clocks,3 clocks"
|
|
bitfld.long 0x00 4.--6. " tRCD ,SDRAM Row to Column Delay" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " tRC ,SDRAM Row Cycle Delay" "20 clocks,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,14 clocks,16 clocks"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ESDMISC,ESDMISC Miscellaneous Register"
|
|
bitfld.long 0x00 31. " SDRAMRDY ,External SDRAM/LPDDR Device Status" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " MA10_SHARE ,MA10 share" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LHD ,Latency Hiding Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MDDR_MDIS ,LPDDR Delay Line Measure Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 3. " MDDR_DL_RST ,LPDDR Delay Line Soft Reset" "No reset,Reset"
|
|
bitfld.long 0x00 2. " MDDREN ,Enable Mobile/Low Power DDR SDRAM" "SDR,DDR"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Software Initiated Local Module Reset" "Disabled,Initiated"
|
|
group.long 0x20++0x13
|
|
line.long 0x0 "ESDCDLY1,MDDR Delay Line 1 Configuration Debug Register"
|
|
bitfld.long 0x0 31. " SEL_DLY_REG_1 ,Bit Selects the Delay Used by Delay Line 1" "1/4 cycle-DLY_CORR_1,DLY_REG_1"
|
|
hexmask.long.word 0x0 16.--26. 1. " DLY_CORR_1 ,Delay Line 1 Correction Factor"
|
|
hexmask.long.word 0x0 0.--10. 1. " DLY_REG_1 ,Number of Inverters Units"
|
|
line.long 0x4 "ESDCDLY2,MDDR Delay Line 2 Configuration Debug Register"
|
|
bitfld.long 0x4 31. " SEL_DLY_REG_2 ,Bit Selects the Delay Used by Delay Line 2" "1/4 cycle-DLY_CORR_2,DLY_REG_2"
|
|
hexmask.long.word 0x4 16.--26. 1. " DLY_CORR_2 ,Delay Line 2 Correction Factor"
|
|
hexmask.long.word 0x4 0.--10. 1. " DLY_REG_2 ,Number of Inverters Units"
|
|
line.long 0x8 "ESDCDLY3,MDDR Delay Line 3 Configuration Debug Register"
|
|
bitfld.long 0x8 31. " SEL_DLY_REG_3 ,Bit Selects the Delay Used by Delay Line 3" "1/4 cycle-DLY_CORR_3,DLY_REG_3"
|
|
hexmask.long.word 0x8 16.--26. 1. " DLY_CORR_3 ,Delay Line 3 Correction Factor"
|
|
hexmask.long.word 0x8 0.--10. 1. " DLY_REG_3 ,Number of Inverters Units"
|
|
line.long 0xC "ESDCDLY4,MDDR Delay Line 4 Configuration Debug Register"
|
|
bitfld.long 0xC 31. " SEL_DLY_REG_4 ,Bit Selects the Delay Used by Delay Line 4" "1/4 cycle-DLY_CORR_4,DLY_REG_4"
|
|
hexmask.long.word 0xC 16.--26. 1. " DLY_CORR_4 ,Delay Line 4 Correction Factor"
|
|
hexmask.long.word 0xC 0.--10. 1. " DLY_REG_4 ,Number of Inverters Units"
|
|
line.long 0x10 "ESDCDLY5,MDDR Delay Line 5 Configuration Debug Register"
|
|
bitfld.long 0x10 31. " SEL_DLY_REG_5 ,Bit Selects the Delay Used by Delay Line 5" "1/4 cycle-DLY_CORR_5,DLY_REG_5"
|
|
hexmask.long.word 0x10 16.--26. 1. " DLY_CORR_5 ,Delay Line 5 Correction Factor"
|
|
hexmask.long.word 0x10 0.--10. 1. " DLY_REG_5 ,Number of Inverters Units"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "ESDCDLYL,MDDR Delay Line Cycle Length Debug Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " DLY_CYCLE_LENGTH ,Number of Inverters"
|
|
width 0xb
|
|
tree.end
|
|
tree "NFC (NAND Flash Controller)"
|
|
base ad:0xd8000e00
|
|
width 28.
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "NFC_BUFSIZE,Internal SRAM SIZE"
|
|
bitfld.word 0x00 0.--3. " BUFSIZE ,Buffer Size" "1 kb,2 kb,?..."
|
|
group.word 0x04++0x07
|
|
line.word 0x00 "RAM_BUFFER_ADDRESS,Buffer Number for Page Data Transfer"
|
|
bitfld.word 0x00 0.--3. " RBA ,RAM Buffer Address" "1st,2nd,3rd,4th,?..."
|
|
line.word 0x02 "NAND_FLASH_ADD,NAND Flash Address"
|
|
line.word 0x04 "NAND_Flash_CMD,NAND Flash Command"
|
|
line.word 0x06 "NFC_CONFIGURATION,NFC Internal Buffer Lock Control"
|
|
bitfld.word 0x06 0.--1. " BLS ,Buffer Lock Set" "Locked,Locked,Unlocked,Locked"
|
|
rgroup.word 0x0c++0x05
|
|
line.word 0x00 "ECC_STATUS_RESULT,Controller Status/Result of Flash Operation"
|
|
bitfld.word 0x00 2.--3. " ERM ,ECC Error for Main Area Data" "No error,1-bit error,2-bits error,?..."
|
|
bitfld.word 0x00 0.--1. " ERS ,ECC Error for Spare Area Data" "No error,1-bit error,2-bits error,?..."
|
|
line.word 0x02 "ECC_RSLT_MAIN_AREA_x16,ECC Error Position of Main Area Data Error x16"
|
|
hexmask.word.byte 0x02 4.--11. 1. " ECC_RESULT_1 ,ECC Result 1"
|
|
bitfld.word 0x02 0.--2. " ECC_RESULT_2 ,ECC Result 2" "0,1,2,3,4,5,6,7"
|
|
line.word 0x04 "ECC_RSLT_SPARE_AREA_x16,ECC Error Position of Spare Area Data Error x16"
|
|
bitfld.word 0x04 4. " ECC_RESULT_4 ,ECC Result 4" "0,1"
|
|
bitfld.word 0x04 0.--2. " ECC_RESULT_3 ,ECC Result 3" "0,1,2,3,4,5,6,7"
|
|
group.word 0x12++0x05
|
|
line.word 0x00 "NF_WR_PROT,Nand Flash Write Protection"
|
|
bitfld.long 0x00 0.--2. " WPC ,Write Protection Command" "Reserved,Lock-tight,Lock all,Reserved,Unlock,?..."
|
|
width 22.
|
|
line.word 0x02 "UNLOCK_START_BLK_ADD,Address to Unlock in Write Protection Mode - Start"
|
|
line.word 0x04 "UNLOCK_END_BLK_ADD,Address to Unlock in Write Protection Mode - End"
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "NAND_FLASH_WR_PR_ST,NAND Flash Write Protection Status"
|
|
bitfld.word 0x00 2. " US ,Unlocked Status" "Not unlocked,Unlocked"
|
|
bitfld.word 0x00 1. " LS ,Locked Status" "Not all,All"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LTS ,Lock-Tighten Status" "Not lock-tight,Lock-tight"
|
|
group.word 0x1a++0x03
|
|
line.word 0x00 "NAND_FLASH_CONFIG1,NAND Flash Operation Configuration"
|
|
bitfld.word 0x00 7. " NF_/CE ,NAND Flash Force CE" "Normal,/CE asserted"
|
|
bitfld.word 0x00 6. " NFC_RST ,NFC Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " NF_BIG ,NAND FLASH Big Endian Mode" "Little endian,Big endian"
|
|
bitfld.word 0x00 4. " INT_MASK ,Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 3. " ECC_EN ,ECC Operation Enable" "Bypassed,Executed"
|
|
bitfld.word 0x00 2. " SP_EN ,Spare Area Enable" "Main and spare,Spare only "
|
|
line.word 0x02 "NAND_FLASH_CONFIG2,NAND Flash Operation Configuration (Configuration 2)"
|
|
eventfld.word 0x02 15. " INT ,Interrupt" "Still running,Done"
|
|
bitfld.word 0x02 3.--5. " FDO ,NAND Flash Data Output" "Reserved,One page data out,NAND Flash ID,Reserved,NAND Flash status,?..."
|
|
textline " "
|
|
bitfld.word 0x02 2. " FDI ,NAND Flash Data Input" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " FADD ,NAND Flash Address Input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 0. " FCMD ,NAND Flash Command Input" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "PCMCIA (Personal Computer Memory Card International Association Controller)"
|
|
base ad:0xd8004000
|
|
width 0x7
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PIPR,PCMCIA Input Pins Register"
|
|
bitfld.long 0x00 8. " POWERON ,Power On" "No power,Power On"
|
|
bitfld.long 0x00 7. " RDY ,RDY /BSY /IREQ" "Busy/Requires host software,Ready/No host software required"
|
|
bitfld.long 0x00 6. " BVD2 ,Battery Voltage Detect 1/SPKR In" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BVD1 ,Battery Voltage Detect 1/STSCHG In" "Not changed,Changed"
|
|
bitfld.long 0x00 3.--4. " CD ,Card Detect 1 And Card Detect 2" "Card inserted,Inserted improperly,Inserted improperly,Card not inserted"
|
|
bitfld.long 0x00 2. " WP ,Write Protect" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " VS ,Voltage Sense" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PSCR,PCMCIA Status Change Register"
|
|
eventfld.long 0x00 11. " POWC ,The POWERON Signal from the Card Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 10. " RDYR ,Ready / Interupt Request Rising Edge" "Not detected,Detected"
|
|
eventfld.long 0x00 9. " RDYF ,Ready / Interupt Request Falling Edge" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " RDYH ,Ready / Interupt Request High" "Not detected,Detected"
|
|
eventfld.long 0x00 7. " RDYL ,Ready / Interupt Request Low" "Not detected,Detected"
|
|
eventfld.long 0x00 6. " BVDC2 ,Battery Voltage Detect 2/SPKR In Changed" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 5. " BVDC1 ,Battery Voltage Detect 1/STSCHG Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 4. " CDC2 ,Card Detect 2 Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 3. " CDC1 ,Card Detect 1 Changed" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x00 2. " WPC ,Write Protect Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 1. " VSC2 ,Voltage Sense 2 Changed" "Not changed,Changed"
|
|
eventfld.long 0x00 0. " VSC1 ,Voltage Sense 1 Changed" "Not changed,Changed"
|
|
group.long 0x08++0x17
|
|
line.long 0x00 "PER,PCMCIA Enable Register"
|
|
bitfld.long 0x00 12. " ERRINTEN ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " POWERONEN ,Power On Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RDYRE ,RDY /IREQ Pin Rising Edge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RDYFE ,RDY /IREQ Pin Falling Edge Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RDYHE ,RDY /IREQ High Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " RDYLE ,RDY /IREQ Low Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BVDE2 ,Battery Voltage 2/SPKR In Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " BVDE1 ,Battery Voltage 1/STSCHG Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CDE2 ,Card Detect 2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CDE1 ,Card Detect 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WPE ,Write Protect Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " VSE2 ,Voltage Sense 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VSE1 ,Voltage Sense 2 Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x4 "PBR0,PCMCIA Base Register 0"
|
|
hexmask.long 0x4 0.--25. 1. " PBA ,Base Register Address"
|
|
line.long 0x8 "PBR1,PCMCIA Base Register 1"
|
|
hexmask.long 0x8 0.--25. 1. " PBA ,Base Register Address"
|
|
line.long 0xC "PBR2,PCMCIA Base Register 2"
|
|
hexmask.long 0xC 0.--25. 1. " PBA ,Base Register Address"
|
|
line.long 0x10 "PBR3,PCMCIA Base Register 3"
|
|
hexmask.long 0x10 0.--25. 1. " PBA ,Base Register Address"
|
|
line.long 0x14 "PBR4,PCMCIA Base Register 4"
|
|
hexmask.long 0x14 0.--25. 1. " PBA ,Base Register Address"
|
|
group.long 0x28++0x13
|
|
line.long 0x0 "POR0,PCMCIA Option Register 0"
|
|
bitfld.long 0x0 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x0 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x0 27. " WP ,PCMCIA Write Protect Enable" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x0 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x0 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x0 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
bitfld.long 0x0 11.--16. " PSST ,PCMCIA Strobe Setup Time" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0x0 5.--10. " PSHT ,PCMCIA Strobe Hold Time" "0 clocks,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0x0 0.--4. " BSIZE ,PCMCIA Bank Size" "1 byte,2 byte,8 byte,4 byte,128 byte,64 byte,16 byte,32 byte,32 Kbyte,16 Kbyte,4 Kbyte,8 Kbyte,256 byte,512 byte,2 Kbyte,1 Kbyte,Reserved,Reserved,Reserved,Reserved,16 Mbyte,32 Mbyte,Reserved,64 Mbyte,64 Kbyte,128 Kbyte,512 Kbyte,256 Kbyte,8 Mbyte,4 Mbyte,1 Mbyte,2 Mbyte"
|
|
line.long 0x4 "POR1,PCMCIA Option Register 1"
|
|
bitfld.long 0x4 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x4 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x4 27. " WP ,PCMCIA Write Protect Enable" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x4 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x4 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x4 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
bitfld.long 0x4 11.--16. " PSST ,PCMCIA Strobe Setup Time" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0x4 5.--10. " PSHT ,PCMCIA Strobe Hold Time" "0 clocks,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0x4 0.--4. " BSIZE ,PCMCIA Bank Size" "1 byte,2 byte,8 byte,4 byte,128 byte,64 byte,16 byte,32 byte,32 Kbyte,16 Kbyte,4 Kbyte,8 Kbyte,256 byte,512 byte,2 Kbyte,1 Kbyte,Reserved,Reserved,Reserved,Reserved,16 Mbyte,32 Mbyte,Reserved,64 Mbyte,64 Kbyte,128 Kbyte,512 Kbyte,256 Kbyte,8 Mbyte,4 Mbyte,1 Mbyte,2 Mbyte"
|
|
line.long 0x8 "POR2,PCMCIA Option Register 2"
|
|
bitfld.long 0x8 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x8 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x8 27. " WP ,PCMCIA Write Protect Enable" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x8 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x8 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x8 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
bitfld.long 0x8 11.--16. " PSST ,PCMCIA Strobe Setup Time" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0x8 5.--10. " PSHT ,PCMCIA Strobe Hold Time" "0 clocks,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0x8 0.--4. " BSIZE ,PCMCIA Bank Size" "1 byte,2 byte,8 byte,4 byte,128 byte,64 byte,16 byte,32 byte,32 Kbyte,16 Kbyte,4 Kbyte,8 Kbyte,256 byte,512 byte,2 Kbyte,1 Kbyte,Reserved,Reserved,Reserved,Reserved,16 Mbyte,32 Mbyte,Reserved,64 Mbyte,64 Kbyte,128 Kbyte,512 Kbyte,256 Kbyte,8 Mbyte,4 Mbyte,1 Mbyte,2 Mbyte"
|
|
line.long 0xC "POR3,PCMCIA Option Register 3"
|
|
bitfld.long 0xC 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0xC 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0xC 27. " WP ,PCMCIA Write Protect Enable" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0xC 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0xC 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0xC 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
bitfld.long 0xC 11.--16. " PSST ,PCMCIA Strobe Setup Time" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0xC 5.--10. " PSHT ,PCMCIA Strobe Hold Time" "0 clocks,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0xC 0.--4. " BSIZE ,PCMCIA Bank Size" "1 byte,2 byte,8 byte,4 byte,128 byte,64 byte,16 byte,32 byte,32 Kbyte,16 Kbyte,4 Kbyte,8 Kbyte,256 byte,512 byte,2 Kbyte,1 Kbyte,Reserved,Reserved,Reserved,Reserved,16 Mbyte,32 Mbyte,Reserved,64 Mbyte,64 Kbyte,128 Kbyte,512 Kbyte,256 Kbyte,8 Mbyte,4 Mbyte,1 Mbyte,2 Mbyte"
|
|
line.long 0x10 "POR4,PCMCIA Option Register 4"
|
|
bitfld.long 0x10 29. " PV ,PCMCIA Valid" "Invalid,Valid"
|
|
bitfld.long 0x10 28. " WPEN ,PCMCIA Write Protect Input Enable" "Ignored,Enabled"
|
|
bitfld.long 0x10 27. " WP ,PCMCIA Write Protect Enable" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x10 25.--26. " PRS ,PCMCIA Region Select" "Common memory space,TrueIDE mode,Attribute memory space,I/O space"
|
|
bitfld.long 0x10 24. " PPS ,PCMCIA Port Size" "16-bit,8-bit"
|
|
hexmask.long.byte 0x10 17.--23. 1. " PSL ,PCMCIA Strobe Length"
|
|
textline " "
|
|
bitfld.long 0x10 11.--16. " PSST ,PCMCIA Strobe Setup Time" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0x10 5.--10. " PSHT ,PCMCIA Strobe Hold Time" "0 clocks,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks"
|
|
bitfld.long 0x10 0.--4. " BSIZE ,PCMCIA Bank Size" "1 byte,2 byte,8 byte,4 byte,128 byte,64 byte,16 byte,32 byte,32 Kbyte,16 Kbyte,4 Kbyte,8 Kbyte,256 byte,512 byte,2 Kbyte,1 Kbyte,Reserved,Reserved,Reserved,Reserved,16 Mbyte,32 Mbyte,Reserved,64 Mbyte,64 Kbyte,128 Kbyte,512 Kbyte,256 Kbyte,8 Mbyte,4 Mbyte,1 Mbyte,2 Mbyte"
|
|
group.long 0x44++0x13
|
|
line.long 0x0 "POFR0,PCMCIA Offsett Register 0"
|
|
hexmask.long.word 0x0 00.--25. 1. " POFA ,POFA"
|
|
line.long 0x4 "POFR1,PCMCIA Offsett Register 1"
|
|
hexmask.long.word 0x4 00.--25. 1. " POFA ,POFA"
|
|
line.long 0x8 "POFR2,PCMCIA Offsett Register 2"
|
|
hexmask.long.word 0x8 00.--25. 1. " POFA ,POFA"
|
|
line.long 0xC "POFR3,PCMCIA Offsett Register 3"
|
|
hexmask.long.word 0xC 00.--25. 1. " POFA ,POFA"
|
|
line.long 0x10 "POFR4,PCMCIA Offsett Register 4"
|
|
hexmask.long.word 0x10 00.--25. 1. " POFA ,POFA"
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "PGCR,PCMCIA General Control Register"
|
|
bitfld.long 0x00 3. " LPMEN ,Low Power Mode Enable" "Normal,Low power"
|
|
bitfld.long 0x00 2. " SPKREN ,SPKROUT Routing Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " POE ,Controller Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RESET ,Card Reset" "No reset,Reset"
|
|
line.long 0x04 "PGSR,PCMCIA General Status Register"
|
|
bitfld.long 0x04 4. " NWINE ,No Window Error" "No error,Error"
|
|
bitfld.long 0x04 3. " LPE ,Low Power Error" "No error,Error"
|
|
bitfld.long 0x04 2. " SE ,Size Error" "No error,Error"
|
|
bitfld.long 0x04 1. " CDE ,Card Detect Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " WPE ,Write Protect Error" "No error,Error"
|
|
width 0x0b
|
|
tree.end
|
|
tree "1-Wire (1-Wire Interface)"
|
|
base ad:0x10009000
|
|
width 0xe
|
|
group.word 0x00++0x07
|
|
line.word 0x00 "CONTROL,Control Register"
|
|
bitfld.word 0x00 7. " RPP ,Reset Presence Pulse" "No effect,Reset"
|
|
bitfld.word 0x00 6. " PST ,Presence Status" "Not present,Present"
|
|
bitfld.word 0x00 5. " WR0 ,Write 0" "No effect,Write"
|
|
textline " "
|
|
bitfld.word 0x00 4. " WR1 ,Write 1/Read" "No effect,Write"
|
|
bitfld.word 0x00 3. " RDST ,Read Status" "0 sampled,1 sampled"
|
|
line.word 0x02 "TIME_DIVIDER,Time Divider Register"
|
|
hexmask.long.byte 0x02 0.--7. 1. " DVDR ,Predivider Factor"
|
|
line.word 0x04 "RESET, Reset Register"
|
|
bitfld.word 0x04 0. " RST ,Software Reset" "No effect,Reset"
|
|
tree.end
|
|
tree.open "ATA (Advanced Technology Attachment)"
|
|
base ad:0x80001000
|
|
width 18.
|
|
tree "Timing Registers"
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "TIME_CONFIG0,ATA TIME_CONFIG0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TIME_2W ,Pio mode time parameter counter for time of DIOW- pulse width (t2w or t2)"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TIME_1 ,Pio mode time parameter counter for time of address valid to DIOR-/DIOW- setup(t1)"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TIME_ON ,Time parameter counter for transceiver to turn on"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TIME_OFF ,Time parameter counter for transceiver to turn off"
|
|
line.long 0x04 "TIME_CONFIG1,ATA TIME_CONFIG1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TIME_4 ,PIO mode time parameter counter for controlling the time of DIOR- data hold (t4)"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TIME_PIO_RDX ,Pio mode time parameter counter for controlling the time of read data valid to IORDY active (tRD)"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TIME_AX ,Pio time parameter counter for timing of IORDY setup time (tA)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TIME_2R ,Pio mode time parameter counter for time of DIOR- pulse width (t2r or t2)"
|
|
line.long 0x08 "TIME_CONFIG2,ATA TIME_CONFIG2 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TIME_D ,Multiword DMA mode time parameter counter for time of DIOR-/DIOW- asserted pulse width (tD)"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TIME_JN ,Multiword DMA mode time parameter counter for time of DIOW- data hold time (tH)"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TIME_M ,Multiword DMA mode time parameter counter for time from CS valid to DIOR-/DIOW- (tM)"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TIME_9 ,Pio mode time parameter counter for controlling the DIOR-/DIOW-"
|
|
line.long 0x0c "TIME_CONFIG3,ATA TIME_CONFIG3 Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " TIME_RPX ,Ultra DMA mode time parameter counter for time of tRP"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " TIME_ENV ,Ultra DMA mode time parameter counter for min. time of tENV"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " TIME_ACK ,Ultra DMA mode time parameter counter for time of tACK"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " TIME_K ,Multiword DMA mode time parameter counter for time of DIOW- negated pulse width (tKW)"
|
|
line.long 0x10 "TIME_CONFIG4,ATA TIME_CONFIG4 Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " TIME_DZFS ,Ultra DMA mode time parameter counter for tDZFS"
|
|
hexmask.long.byte 0x10 16.--23. 1. " TIME_DVH ,Ultra DMA mode time parameter counter for tDVH"
|
|
hexmask.long.byte 0x10 8.--15. 1. " TIME_MLIX ,Ultra DMA mode time parameter counter for tMLI"
|
|
hexmask.long.byte 0x10 0.--7. 1. " TIME_ZAH ,Ultra DMA mode time parameter counter for tZAH"
|
|
line.long 0x14 "TIME_CONFIG5,ATA TIME_CONFIG5 Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " TIME_CYC ,Ultra DMA mode time parameter counter for tCYC"
|
|
hexmask.long.byte 0x14 16.--23. 1. " TIME_SS ,Ultra DMA mode time parameter counter for tSS"
|
|
hexmask.long.byte 0x14 8.--15. 1. " TIME_CVH ,Ultra DMA mode time parameter counter for tCVH"
|
|
hexmask.long.byte 0x14 0.--7. 1. " TIME_DVS ,Ultra DMA mode time parameter counter for tDVS"
|
|
tree.end
|
|
tree "FIFO Data Registers"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FIFO_DATA_32,FIFO_DATA Register In 32-bit Mode"
|
|
group.word 0x1c++0x01
|
|
line.word 0x00 "FIFO_DATA_16,FIFO DATA Register In 16-bit Mode"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "FIFO_FILL,FIFO_FILL Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIGO_FILL[7:0] ,FIFO_FILL Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ATA_CONTROL,ATA Control Register"
|
|
bitfld.long 0x00 7. " FIFO_RST_B ,FIFO Reset or Enable" "Reset,Normal"
|
|
bitfld.long 0x00 6. " ATA_RST_B ,Control The Reset Of The Internal ATA" "Reset,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FIFO_TX_EN ,FIFO Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FIFO_RCV_EN ,FIFO Receive Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMA_PENDING ,DMA Pending Bit" "Not start,Start"
|
|
bitfld.long 0x00 2. " DMA_ULTRA_SELECTED ,UDMA Or MDMA Protocol Is used" "MDMA,UDMA"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMA_WRITE ,Data Direction On Any DMA" "In burst,Out burst"
|
|
bitfld.long 0x00 0. " IORDY_EN ,IORDY Handshake Or Disregarded" "Disregarded,Handshake"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "INT_PENDING,Interrupt Pending Register"
|
|
bitfld.long 0x00 7. " ATA_INTRQ1 ,ATA Interrupt Request 1" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " FIFO_UNDERFLOW ,FIFO Underflow" "No underflow,Underflow"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FIFO_OVERFLOW ,FIFO Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 4. " CONTROLLER_IDLE ,Controller Idle" "Active,Idle"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ATA_INTRQ2 ,ATA interrupt request 2" "Not pending,Pending"
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "INT_ENABLE,Interrupt_Enable Register"
|
|
bitfld.long 0x00 7. " ATA_INTRQ1 ,ATA Interrupt Request 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " FIFO_UNDERFLOW ,FIFO Underflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FIFO_OVERFLOW ,FIFO Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CONTROLLER_IDLE ,Controller Idle" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ATA_INTRQ2 ,ATA Interrupt Request 2" "Disabled,Enabled"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "INTERRUPT_CLEAR,Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " FIFO_UNDERFLOW ,FIFO Underflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " FIFO_OVERFLOW ,FIFO Overflow Interrupt Clear" "No effect,Clear"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "FIFO_ALARM,FIFO Alarm Register"
|
|
hexmask.long 0x00 0.--7. 1. " FIFO_ALARM[7:0] , FIFO Alarm Threshold"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "CSPI (Configurable Serial Peripheral Interface)"
|
|
tree "CSPI1"
|
|
base ad:0x1000e000
|
|
width 0xd
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "RXDATA1,Receive Data Register 1"
|
|
in
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "TXDATA1,Transmit Data Register 1"
|
|
if ((data.long(ad:((0x1000e000)+0x08))&0x800)==0x800)
|
|
;Master mode
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CONREG1,Control Register"
|
|
bitfld.long 0x00 23. " BURST ,Burst or Continuous" "Idle Time,No Idle Time"
|
|
bitfld.long 0x00 22. " SDHC_SPIEN ,SDHC SPI Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWAP ,SPI FIFO Swap" "Not swappped,Swapped"
|
|
bitfld.long 0x00 19.--20. " CHIPSELECT ,Chip Select" "SS0,SS1,SS2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--18. " DATARATE ,SPI Data Rate Control" "Reserved,Div by 3,Div by 4,Div by 6,Div by 8,Div by 12,Div by 16,Div by 24,Div by 32,Div by 48,Div by 64,Div by 96,Div by 128,Div by 192,Div by 256,Div by 384,Div by 512,?..."
|
|
bitfld.long 0x00 12.--13. " DR_CTL , /CSPI1_RDY Control." "Ignored,Failing edge,Low level,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 10. " SPIEN ,CSPI Module Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
bitfld.long 0x00 8. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SSCTL ,SPI SS Wave Form Select" "SS is Low,Pulse inserted"
|
|
bitfld.long 0x00 6. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 0.--4. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
else
|
|
;Slave mode
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CONREG1,Control Register"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWAP ,SPI FIFO Swap" "Not Swappped,Swapped"
|
|
bitfld.long 0x00 19.--20. " CHIPSELECT ,Chip Select" "SS0,SS1,SS2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--18. " DATARATE ,SPI Data Rate Control" "Reserved,Div by 3,Div by 4,Div by 6,Div by 8,Div by 12,Div by 16,Div by 24,Div by 32,Div by 48,Div by 64,Div by 96,Div by 128,Div by 192,Div by 256,Div by 384,Div by 512,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 10. " EN ,CSPI Module Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
bitfld.long 0x00 8. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SSCTL ,RxFIFO advancement (SS Wave Form)" "By Bit Count,By SS rising edge"
|
|
bitfld.long 0x00 6. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 0.--4. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
endif
|
|
group.long 0x0c++0x13
|
|
line.long 0x00 "INT1,Interrupt Control Register 1"
|
|
bitfld.long 0x00 17. " BOEN ,Bit Count Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " ROEN ,RxFIFO Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RFEN ,RxFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RHEN ,RxFIFO Half Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RREN ,RxFIFO Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TSHFEEN ,Tx FIFO and Tx Shift Register Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TFEN ,TxFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " THEN ,TxFIFO Half Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TEEN ,TxFIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " BO ,Bit Count Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RO ,RxFIFO Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " RF ,RxFIFO Full Status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RH ,RxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x00 4. " RR ,RxFIFO Data Ready Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TSHFE ,TxFIFO and TxShift Register Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " TF ,TxFIFO Full Status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TH ,TxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x00 0. " TE ,TxFIFO Empty Status" "Not empty,Empty"
|
|
line.long 0x04 "TESTREG1,Test Control Register 1"
|
|
bitfld.long 0x04 14. " LBC ,Loop Back Control" "Not connected,Connected"
|
|
bitfld.long 0x04 8.--11. " SMSTATUS ,State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " RXCNT ,RXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
bitfld.long 0x04 0.--3. " TXCNT ,TXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
line.long 0x08 "PERIODREG1,Sample Period Control Register 1"
|
|
bitfld.long 0x08 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL"
|
|
hexmask.long.word 0x08 0.--14. 1. " WAIT , Wait (Number of clocks inserted between data transactions)"
|
|
line.long 0x0C "DMAREG1,DMA Control Register 1"
|
|
bitfld.long 0x0C 15. " THDEN ,TxFIFO Half DMA Request Enable" "Disable,Enable"
|
|
bitfld.long 0x0C 14. " TEDEN ,TxFIFO Empty DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " RFDEN ,RxFIFO Full DMA Request Enable" "Disable,Enable"
|
|
bitfld.long 0x0C 12. " RHDEN ,RxFIFO Half DMA Request Enable" "Disabled,Enable"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " THDMA ,TxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x0C 6. " TEDMA ,TxFIFO Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " RFDMA ,RxFIFO Full Status" "Not full,Full"
|
|
bitfld.long 0x0C 4. " RHDMA ,RxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
line.long 0x10 "RESETREG1,Status Register 1"
|
|
bitfld.long 0x10 0. " START ,Soft Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree "CSPI2"
|
|
base ad:0x1000f000
|
|
width 0xd
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "RXDATA2,Receive Data Register 2"
|
|
in
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "TXDATA2,Transmit Data Register 2"
|
|
if ((data.long(ad:((0x1000f000)+0x08))&0x800)==0x800)
|
|
;Master mode
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CONREG2,Control Register"
|
|
bitfld.long 0x00 23. " BURST ,Burst or Continuous" "Idle Time,No Idle Time"
|
|
bitfld.long 0x00 22. " SDHC_SPIEN ,SDHC SPI Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWAP ,SPI FIFO Swap" "Not swappped,Swapped"
|
|
bitfld.long 0x00 19.--20. " CHIPSELECT ,Chip Select" "SS0,SS1,SS2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--18. " DATARATE ,SPI Data Rate Control" "Reserved,Div by 3,Div by 4,Div by 6,Div by 8,Div by 12,Div by 16,Div by 24,Div by 32,Div by 48,Div by 64,Div by 96,Div by 128,Div by 192,Div by 256,Div by 384,Div by 512,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 10. " SPIEN ,CSPI Module Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
bitfld.long 0x00 8. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SSCTL ,SPI SS Wave Form Select" "SS is Low,Pulse inserted"
|
|
bitfld.long 0x00 6. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 0.--4. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
else
|
|
;Slave mode
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CONREG2,Control Register"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWAP ,SPI FIFO Swap" "Not Swappped,Swapped"
|
|
bitfld.long 0x00 19.--20. " CHIPSELECT ,Chip Select" "SS0,SS1,SS2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--18. " DATARATE ,SPI Data Rate Control" "Reserved,Div by 3,Div by 4,Div by 6,Div by 8,Div by 12,Div by 16,Div by 24,Div by 32,Div by 48,Div by 64,Div by 96,Div by 128,Div by 192,Div by 256,Div by 384,Div by 512,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 10. " EN ,CSPI Module Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
bitfld.long 0x00 8. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SSCTL ,RxFIFO advancement (SS Wave Form)" "By Bit Count,By SS rising edge"
|
|
bitfld.long 0x00 6. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 0.--4. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
endif
|
|
group.long 0x0c++0x13
|
|
line.long 0x00 "INT2,Interrupt Control Register 2"
|
|
bitfld.long 0x00 17. " BOEN ,Bit Count Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " ROEN ,RxFIFO Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RFEN ,RxFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RHEN ,RxFIFO Half Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RREN ,RxFIFO Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TSHFEEN ,Tx FIFO and Tx Shift Register Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TFEN ,TxFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " THEN ,TxFIFO Half Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TEEN ,TxFIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " BO ,Bit Count Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RO ,RxFIFO Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " RF ,RxFIFO Full Status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RH ,RxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x00 4. " RR ,RxFIFO Data Ready Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TSHFE ,TxFIFO and TxShift Register Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " TF ,TxFIFO Full Status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TH ,TxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x00 0. " TE ,TxFIFO Empty Status" "Not empty,Empty"
|
|
line.long 0x04 "TESTREG2,Test Control Register 2"
|
|
bitfld.long 0x04 14. " LBC ,Loop Back Control" "Not connected,Connected"
|
|
bitfld.long 0x04 8.--11. " SMSTATUS ,State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " RXCNT ,RXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
bitfld.long 0x04 0.--3. " TXCNT ,TXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
line.long 0x08 "PERIODREG2,Sample Period Control Register 2"
|
|
bitfld.long 0x08 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL"
|
|
hexmask.long.word 0x08 0.--14. 1. " WAIT , Wait (Number of clocks inserted between data transactions)"
|
|
line.long 0x0C "DMAREG2,DMA Control Register 2"
|
|
bitfld.long 0x0C 15. " THDEN ,TxFIFO Half DMA Request Enable" "Disable,Enable"
|
|
bitfld.long 0x0C 14. " TEDEN ,TxFIFO Empty DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " RFDEN ,RxFIFO Full DMA Request Enable" "Disable,Enable"
|
|
bitfld.long 0x0C 12. " RHDEN ,RxFIFO Half DMA Request Enable" "Disabled,Enable"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " THDMA ,TxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x0C 6. " TEDMA ,TxFIFO Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " RFDMA ,RxFIFO Full Status" "Not full,Full"
|
|
bitfld.long 0x0C 4. " RHDMA ,RxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
line.long 0x10 "RESETREG2,Status Register 2"
|
|
bitfld.long 0x10 0. " START ,Soft Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree "CSPI3"
|
|
base ad:0x10017000
|
|
width 0xd
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "RXDATA3,Receive Data Register 3"
|
|
in
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "TXDATA3,Transmit Data Register 3"
|
|
if ((data.long(ad:((0x10017000)+0x08))&0x800)==0x800)
|
|
;Master mode
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CONREG3,Control Register"
|
|
bitfld.long 0x00 23. " BURST ,Burst or Continuous" "Idle Time,No Idle Time"
|
|
bitfld.long 0x00 22. " SDHC_SPIEN ,SDHC SPI Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWAP ,SPI FIFO Swap" "Not swappped,Swapped"
|
|
bitfld.long 0x00 19.--20. " CHIPSELECT ,Chip Select" "SS0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--18. " DATARATE ,SPI Data Rate Control" "Reserved,Div by 3,Div by 4,Div by 6,Div by 8,Div by 12,Div by 16,Div by 24,Div by 32,Div by 48,Div by 64,Div by 96,Div by 128,Div by 192,Div by 256,Div by 384,Div by 512,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 10. " SPIEN ,CSPI Module Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
bitfld.long 0x00 8. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SSCTL ,SPI SS Wave Form Select" "SS is Low,Pulse inserted"
|
|
bitfld.long 0x00 6. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 0.--4. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
else
|
|
;Slave mode
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CONREG3,Control Register"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWAP ,SPI FIFO Swap" "Not Swappped,Swapped"
|
|
bitfld.long 0x00 19.--20. " CHIPSELECT ,Chip Select" "SS0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--18. " DATARATE ,SPI Data Rate Control" "Reserved,Div by 3,Div by 4,Div by 6,Div by 8,Div by 12,Div by 16,Div by 24,Div by 32,Div by 48,Div by 64,Div by 96,Div by 128,Div by 192,Div by 256,Div by 384,Div by 512,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " MODE ,SPI Function Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 10. " EN ,CSPI Module Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " XCH ,SPI Exchange Bit" "Idle,Exchange or busy"
|
|
bitfld.long 0x00 8. " SSPOL ,SPI SS Polarity Select" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SSCTL ,RxFIFO advancement (SS Wave Form)" "By Bit Count,By SS rising edge"
|
|
bitfld.long 0x00 6. " PHA ,SPI Clock/Data Phase Control" "Phase 0,Phase 1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " POL ,SPI Clock Polarity Control" "High,Low"
|
|
bitfld.long 0x00 0.--4. " BITCOUNT ,Length of a Word to be Transferred" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
|
|
endif
|
|
group.long 0x0c++0x13
|
|
line.long 0x00 "INT3,Interrupt Control Register 3"
|
|
bitfld.long 0x00 17. " BOEN ,Bit Count Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " ROEN ,RxFIFO Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RFEN ,RxFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RHEN ,RxFIFO Half Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RREN ,RxFIFO Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TSHFEEN ,Tx FIFO and Tx Shift Register Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TFEN ,TxFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " THEN ,TxFIFO Half Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TEEN ,TxFIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " BO ,Bit Count Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RO ,RxFIFO Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " RF ,RxFIFO Full Status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RH ,RxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x00 4. " RR ,RxFIFO Data Ready Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TSHFE ,TxFIFO and TxShift Register Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " TF ,TxFIFO Full Status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TH ,TxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x00 0. " TE ,TxFIFO Empty Status" "Not empty,Empty"
|
|
line.long 0x04 "TESTREG3,Test Control Register 3"
|
|
bitfld.long 0x04 14. " LBC ,Loop Back Control" "Not connected,Connected"
|
|
bitfld.long 0x04 8.--11. " SMSTATUS ,State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " RXCNT ,RXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
bitfld.long 0x04 0.--3. " TXCNT ,TXFIFO Counter" "0 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,?..."
|
|
line.long 0x08 "PERIODREG3,Sample Period Control Register 3"
|
|
bitfld.long 0x08 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL"
|
|
hexmask.long.word 0x08 0.--14. 1. " WAIT , Wait (Number of clocks inserted between data transactions)"
|
|
line.long 0x0C "DMAREG3,DMA Control Register 3"
|
|
bitfld.long 0x0C 15. " THDEN ,TxFIFO Half DMA Request Enable" "Disable,Enable"
|
|
bitfld.long 0x0C 14. " TEDEN ,TxFIFO Empty DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " RFDEN ,RxFIFO Full DMA Request Enable" "Disable,Enable"
|
|
bitfld.long 0x0C 12. " RHDEN ,RxFIFO Half DMA Request Enable" "Disabled,Enable"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " THDMA ,TxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
bitfld.long 0x0C 6. " TEDMA ,TxFIFO Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " RFDMA ,RxFIFO Full Status" "Not full,Full"
|
|
bitfld.long 0x0C 4. " RHDMA ,RxFIFO Half Status" "< 4 empty slots,>= 4 empty slots"
|
|
line.long 0x10 "RESETREG3,Status Register 3"
|
|
bitfld.long 0x10 0. " START ,Soft Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "I2C (Inter-Integrated Circuit)"
|
|
tree "I2C1"
|
|
base ad:0x10012000
|
|
width 7.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "IADR1,I2C Address Register"
|
|
hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "IFDR1,I2C Frequency Divider Register"
|
|
bitfld.word 0x00 0.--5. " IC ,I2C Clock Rate Divider" "30,32,36,42,48,52,60,72,80,88,104,128,144,160,192,240,288,320,384,480,576,640,768,960,1152,1280,1536,1920,2304,2560,3072,3840,22,24,26,28,32,36,40,44,48,56,64,72,80,96,112,128,160,192,224,256,320,384,448,512,640,768,896,1024,1280,1536,1792,2048"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "I2CR1,I2C Control Register"
|
|
bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select" "Receive,Transmit"
|
|
bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "Acknowledge,No acknowledge"
|
|
bitfld.word 0x00 2. " RSTA ,Repeated START" "Not repeated,Repeated"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "I2SR1,I2C Status Register"
|
|
bitfld.word 0x00 7. " ICF ,Data Transferring" "In progress,Completed"
|
|
bitfld.word 0x00 6. " IAAS ,I2C Addressed As a Slave" "Not addressed,Addressed"
|
|
bitfld.word 0x00 5. " IBB ,I2C Bus Busy" "Idle,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 4. " IAL ,Arbitration Lost" "No arbitration,Arbitration"
|
|
bitfld.word 0x00 2. " SRW ,Slave Read/Write" "Slave receive,Slave transmit"
|
|
bitfld.word 0x00 1. " IIF ,I2C Interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXAK ,Received Acknowledge" "Acknowledge,No acknowledge"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "I2DR1,I2C Data I/O Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA ,I2C Data"
|
|
width 0x16
|
|
tree.end
|
|
tree "I2C2"
|
|
base ad:0x1001D000
|
|
width 7.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "IADR2,I2C Address Register"
|
|
hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "IFDR2,I2C Frequency Divider Register"
|
|
bitfld.word 0x00 0.--5. " IC ,I2C Clock Rate Divider" "30,32,36,42,48,52,60,72,80,88,104,128,144,160,192,240,288,320,384,480,576,640,768,960,1152,1280,1536,1920,2304,2560,3072,3840,22,24,26,28,32,36,40,44,48,56,64,72,80,96,112,128,160,192,224,256,320,384,448,512,640,768,896,1024,1280,1536,1792,2048"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "I2CR2,I2C Control Register"
|
|
bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select" "Receive,Transmit"
|
|
bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "Acknowledge,No acknowledge"
|
|
bitfld.word 0x00 2. " RSTA ,Repeated START" "Not repeated,Repeated"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "I2SR2,I2C Status Register"
|
|
bitfld.word 0x00 7. " ICF ,Data Transferring" "In progress,Completed"
|
|
bitfld.word 0x00 6. " IAAS ,I2C Addressed As a Slave" "Not addressed,Addressed"
|
|
bitfld.word 0x00 5. " IBB ,I2C Bus Busy" "Idle,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 4. " IAL ,Arbitration Lost" "No arbitration,Arbitration"
|
|
bitfld.word 0x00 2. " SRW ,Slave Read/Write" "Slave receive,Slave transmit"
|
|
bitfld.word 0x00 1. " IIF ,I2C Interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXAK ,Received Acknowledge" "Acknowledge,No acknowledge"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "I2DR2,I2C Data I/O Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA ,I2C Data"
|
|
width 0x16
|
|
tree.end
|
|
tree.end
|
|
tree "KPP (Keypad Port)"
|
|
base ad:0x10008000
|
|
width 0x6
|
|
group.word 0x00--0x08
|
|
line.word 0x00 "KPCR,Keypad Control Register"
|
|
bitfld.word 0x00 15. " KCO7 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 14. " KCO6 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 13. " KCO5 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 12. " KCO4 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
textline " "
|
|
bitfld.word 0x00 11. " KCO3 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 10. " KCO2 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 9. " KCO1 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
bitfld.word 0x00 8. " KCO0 ,Keypad Column Strobe Open-Drain Enable" "Totem-pole,Open drain"
|
|
textline " "
|
|
bitfld.word 0x00 7. " KRE7 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 6. " KRE6 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 5. " KRE5 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 4. " KRE4 ,Keypad Row Enable" "Not included,Included"
|
|
textline " "
|
|
bitfld.word 0x00 3. " KRE3 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 2. " KRE2 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 1. " KRE1 ,Keypad Row Enable" "Not included,Included"
|
|
bitfld.word 0x00 0. " KRE0 ,Keypad Row Enable" "Not included,Included"
|
|
line.word 0x02 "KPSR,Keypad Status Register"
|
|
bitfld.word 0x02 10. " KPP_EN ,Keypad Clock Gating Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " KRIE ,Keypad Release Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " KDIE ,Keypad Key Depress Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " KRSS ,Key Depress Sunchronizer Set" "No effect,Set chain"
|
|
textline " "
|
|
bitfld.word 0x02 2. " KDSC ,Key Depress Synchronizer Clear" "No effect,Cleared"
|
|
eventfld.word 0x02 1. " KPKR ,Keypad Key Release" "Not released,All released"
|
|
eventfld.word 0x02 0. " KPKD ,Keypad Key Depress" "Not depressed,Depressed"
|
|
line.word 0x04 "KDDR,Keypad Data Direction Register"
|
|
bitfld.word 0x04 15. " KCDD7 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 14. " KCDD6 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 13. " KCDD5 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 12. " KCDD4 ,Keypad Column Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 11. " KCDD3 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 10. " KCDD2 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 9. " KCDD1 ,Keypad Column Data Direction" "Input,Output"
|
|
bitfld.word 0x04 8. " KCDD0 ,Keypad Column Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 7. " KRDD7 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 6. " KRDD6 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 5. " KRDD5 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 4. " KRDD4 ,Keypad Row Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 3. " KRDD3 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 2. " KRDD2 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 1. " KRDD1 ,Keypad Row Data Direction" "Input,Output"
|
|
bitfld.word 0x04 0. " KRDD0 ,Keypad Row Data Direction" "Input,Output"
|
|
line.word 0x06 "KPDR,Keypad Data Register"
|
|
bitfld.word 0x06 15. " KCD7 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 14. " KCD6 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 13. " KCD5 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 12. " KCD4 ,Keypad Column Data" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x06 11. " KCD3 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 10. " KCD2 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 9. " KCD1 ,Keypad Column Data" "Low,High"
|
|
bitfld.word 0x06 8. " KCD0 ,Keypad Column Data" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x06 7. " KRD7 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 6. " KRD6 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 5. " KRD5 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 4. " KRD4 ,Keypad Row Data" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x06 3. " KRD3 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 2. " KRD2 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 1. " KRD1 ,Keypad Row Data" "Low,High"
|
|
bitfld.word 0x06 0. " KRD0 ,Keypad Row Data" "Low,High"
|
|
width 0xf
|
|
tree.end
|
|
tree "MSHC (Memory Stick Host Controller)"
|
|
base ad:0x10008000
|
|
width 13.
|
|
group.long 0x00++0x07
|
|
line.quad 0x00 "COMMAND_REG,MSHC Command Register"
|
|
hexmask.quad.word 0x00 48.--63. 1. " CMD ,SMSC Command Register"
|
|
hexmask.quad.byte 0x00 40.--47. 1. " TOVW ,Gasket Timeout Register"
|
|
group.long 0x08++0x07
|
|
line.quad 0x00 "DATA_REG,MSHC Data Register"
|
|
hexmask.quad.long 0x00 32.--63. 1. " DATA ,SMSC Data Register"
|
|
group.long 0x10++0x07
|
|
line.quad 0x00 "STATUS_REG,MSHC Status Register"
|
|
hexmask.quad.word 0x00 48.--63. 1. " STAT ,SMSC Status Register"
|
|
bitfld.quad 0x00 47. " IDA ,Illegal Data Access" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.quad 0x00 46. " IXFR ,Illegal Transfer" "Not occurred,Occurred"
|
|
bitfld.quad 0x00 43. " WFUL ,Write To FIFO When Full" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.quad 0x00 42. " REMP ,Read From FIFO When Empty" "Not occurred,Occurred"
|
|
group.long 0x18++0x07
|
|
line.quad 0x00 "SYSTEM_REG,MSHC System Register"
|
|
hexmask.quad.word 0x00 48.--63. 1. " SYS ,SMSC System Register"
|
|
bitfld.quad 0x00 47. " INTEN_IDA ,Illegal Data Access Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x00 46. " INTEN_IXFR ,Illegal Transfer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 43. " INTEN_WFUL ,Write To FIFO When Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.quad 0x00 42. " INTEN_REMP ,Read From FIFO When Empty Interrupt Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "SDHC (Secured Digital Host Controller)"
|
|
tree "SDHC1"
|
|
base ad:0x10013000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "STR_STP_CLK1,SDHC Clock Control Register"
|
|
bitfld.long 0x00 3. " SDHCRESET ,SDHC Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " START_CLK ,Start Clock" "No effect,Started"
|
|
bitfld.long 0x00 0. " STOP_CLK ,Stop Clock" "No effect,Stopped"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STATUS1,SDHC Status Register"
|
|
eventfld.long 0x00 31. " CARD_INSERTION ,Card Insertion" "Not inserted,Inserted"
|
|
eventfld.long 0x00 30. " CARD_REMOVAL ,Card Removal" "Not removed,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 29. " YBUF_EMPTY ,Y Data Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 28. " XBUF_EMPTY ,X Data Buffer Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 27. " YBUF_FULL ,Y Data Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 26. " XBUF_FULL ,X Data Buffer Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 25. " BUF_UND_RUN ,Buffer Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x00 24. " BUF_OVFL ,Buffer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 14. " SDIO_INT_ACTIVE ,SDIO Interrupt Active" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " END_CMD_RESP ,End Command Response" "Not successfull,Successfull"
|
|
textline " "
|
|
eventfld.long 0x00 12. " WRITE_OP_DONE ,Write Operation Done" "Not completed,Completed"
|
|
eventfld.long 0x00 11. " READ_OP_DONE ,Read Operation Done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " WR_CRC_ERROR_CODE ,Write CRC Error Code" "No error,Error,No CRC,?..."
|
|
bitfld.long 0x00 8. " CARD_BUS_CLK_RUN ,Card Bus Clock Run" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BUF_READ_READY ,Buffer Read Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " BUF_WRITE_READY ,Buffer Write Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 5. " RESP_CRC_ERR ,Response CRC Error" "No error,Error"
|
|
eventfld.long 0x00 3. " READ_CRC_ERR ,Read CRC Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 2. " WRITE_CRC_ERR ,Write CRC Error" "No error,Error"
|
|
eventfld.long 0x00 1. " TIME_OUT_RESP ,Time Out Response" "No error,Time out"
|
|
textline " "
|
|
eventfld.long 0x00 0. " TIME_OUT_READ ,Time Out Read" "No error,Time out"
|
|
group.long 0x08++0x17
|
|
line.long 0x00 "CLK_RATE1,SDHC Clock Rate Register"
|
|
hexmask.long.word 0x00 4.--15. 1. " CLK_PRESCALER ,Clock Prescaler"
|
|
bitfld.long 0x00 0.--3. " CLK_DIVIDER ,Clock Divider" "Reserved,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16"
|
|
line.long 0x04 "CMD_DAT_CONT1,SDHC Command And Data Control Register"
|
|
bitfld.long 0x04 15. " CMD_RESUME ,Command Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x04 12. " CMD_RESP_LONG_OFF ,Command Response Long Off" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " STOP_READWAIT ,Stop Read/Wait" "No effect,End cycle"
|
|
bitfld.long 0x04 10. " START_READWAIT ,Start Read/Wait" "No effect,Started"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " BUS_WIDTH ,Bus Width" "1-bit,Reserved,4-bit,?..."
|
|
bitfld.long 0x04 7. " INIT ,Initialize" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WRITE_READ ,Write/Read" "Read,Write"
|
|
bitfld.long 0x04 3. " DATA_ENABLE ,Data Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " FORMAT_OF_RESPONSE ,Format of Response" "No response,48-bit,136-bit,48-bit,?..."
|
|
line.long 0x08 "RES_TO1,SDHC Response Time Out Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RESPONSE_TIME_OUT ,Response Time Out"
|
|
line.long 0x0c "READ_TO1,SDHC Read Time Out Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " DATA_READ_TIME_OUT[15:0] ,Data Read Time Out"
|
|
line.long 0x10 "BLK_LEN1,SDHC Block Length Register"
|
|
hexmask.long.word 0x10 0.--11. 1. " BLOCK_LENGTH[11:0] ,Block Length"
|
|
line.long 0x14 "NOB1,SDHC Number of Blocks Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " NOB ,Specifies the Number of Blocks in a Block Transfer"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "REV_NO1,SDHC Revision Number Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " REVISION_NUMBER ,Revision Number"
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "INT_CNTR1,SDHC Interrupt Control Register"
|
|
bitfld.long 0x00 18. " SDIO_INT_WKP_EN ,SDIO Interrupt Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CARD_INSERTION_WKP_EN ,Card Insertion Wake-up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CARD_REMOVAL_WKP_EN ,Card Removal Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CARD_INSERTION_EN ,Card Insertion Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CARD_REMOVAL_EN ,Card Removal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SDIO_INT_EN ,SDIO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DAT0_EN ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BUF_READ_EN ,Bus Read Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUF_WRITE_EN ,Bus Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRITE_OP_DONE ,Write Operation Done" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READ_OP_DONE ,Read Operation Done" "Disabled,Enabled"
|
|
line.long 0x04 "CMD1,SDHC Command Number Register"
|
|
bitfld.long 0x04 0.--5. " COMMAND_NUMBER , Command Number" "CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CMD8,CMD9,CMD10,CMD11,CMD12,CMD13,CMD14,CMD15,CMD16,CMD17,CMD18,CMD19,CMD20,CMD21,CMD22,CMD23,CMD24,CMD25,CMD26,CMD27,CMD28,CMD29,CMD30,CMD31,CMD32,CMD33,CMD34,CMD35,CMD36,CMD37,CMD38,CMD39,CMD40,CMD41,CMD42,CMD43,CMD44,CMD45,CMD46,CMD47,CMD48,CMD49,CMD50,CMD51,CMD52,CMD53,CMD54,CMD55,CMD56,CMD57,CMD58,CMD59,CMD60,CMD61,CMD62,CMD63"
|
|
line.long 0x08 "ARG_H1,SDHC CMD Argument Register High"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "RES_FIFO1,SDHC Response FIFO Access Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RESPONSE_CONTENT ,Response Content FIFO Access Register"
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "BUFFER_ACCESS,SDHC Data Buffer Access Register"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree "SDHC2"
|
|
base ad:0x10014000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "STR_STP_CLK2,SDHC Clock Control Register"
|
|
bitfld.long 0x00 3. " SDHCRESET ,SDHC Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " START_CLK ,Start Clock" "No effect,Started"
|
|
bitfld.long 0x00 0. " STOP_CLK ,Stop Clock" "No effect,Stopped"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STATUS2,SDHC Status Register"
|
|
eventfld.long 0x00 31. " CARD_INSERTION ,Card Insertion" "Not inserted,Inserted"
|
|
eventfld.long 0x00 30. " CARD_REMOVAL ,Card Removal" "Not removed,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 29. " YBUF_EMPTY ,Y Data Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 28. " XBUF_EMPTY ,X Data Buffer Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 27. " YBUF_FULL ,Y Data Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 26. " XBUF_FULL ,X Data Buffer Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 25. " BUF_UND_RUN ,Buffer Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x00 24. " BUF_OVFL ,Buffer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 14. " SDIO_INT_ACTIVE ,SDIO Interrupt Active" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " END_CMD_RESP ,End Command Response" "Not successfull,Successfull"
|
|
textline " "
|
|
eventfld.long 0x00 12. " WRITE_OP_DONE ,Write Operation Done" "Not completed,Completed"
|
|
eventfld.long 0x00 11. " READ_OP_DONE ,Read Operation Done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " WR_CRC_ERROR_CODE ,Write CRC Error Code" "No error,Error,No CRC,?..."
|
|
bitfld.long 0x00 8. " CARD_BUS_CLK_RUN ,Card Bus Clock Run" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BUF_READ_READY ,Buffer Read Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " BUF_WRITE_READY ,Buffer Write Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 5. " RESP_CRC_ERR ,Response CRC Error" "No error,Error"
|
|
eventfld.long 0x00 3. " READ_CRC_ERR ,Read CRC Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 2. " WRITE_CRC_ERR ,Write CRC Error" "No error,Error"
|
|
eventfld.long 0x00 1. " TIME_OUT_RESP ,Time Out Response" "No error,Time out"
|
|
textline " "
|
|
eventfld.long 0x00 0. " TIME_OUT_READ ,Time Out Read" "No error,Time out"
|
|
group.long 0x08++0x17
|
|
line.long 0x00 "CLK_RATE2,SDHC Clock Rate Register"
|
|
hexmask.long.word 0x00 4.--15. 1. " CLK_PRESCALER ,Clock Prescaler"
|
|
bitfld.long 0x00 0.--3. " CLK_DIVIDER ,Clock Divider" "Reserved,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16"
|
|
line.long 0x04 "CMD_DAT_CONT2,SDHC Command And Data Control Register"
|
|
bitfld.long 0x04 15. " CMD_RESUME ,Command Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x04 12. " CMD_RESP_LONG_OFF ,Command Response Long Off" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " STOP_READWAIT ,Stop Read/Wait" "No effect,End cycle"
|
|
bitfld.long 0x04 10. " START_READWAIT ,Start Read/Wait" "No effect,Started"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " BUS_WIDTH ,Bus Width" "1-bit,Reserved,4-bit,?..."
|
|
bitfld.long 0x04 7. " INIT ,Initialize" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WRITE_READ ,Write/Read" "Read,Write"
|
|
bitfld.long 0x04 3. " DATA_ENABLE ,Data Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " FORMAT_OF_RESPONSE ,Format of Response" "No response,48-bit,136-bit,48-bit,?..."
|
|
line.long 0x08 "RES_TO2,SDHC Response Time Out Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RESPONSE_TIME_OUT ,Response Time Out"
|
|
line.long 0x0c "READ_TO2,SDHC Read Time Out Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " DATA_READ_TIME_OUT[15:0] ,Data Read Time Out"
|
|
line.long 0x10 "BLK_LEN2,SDHC Block Length Register"
|
|
hexmask.long.word 0x10 0.--11. 1. " BLOCK_LENGTH[11:0] ,Block Length"
|
|
line.long 0x14 "NOB2,SDHC Number of Blocks Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " NOB ,Specifies the Number of Blocks in a Block Transfer"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "REV_NO2,SDHC Revision Number Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " REVISION_NUMBER ,Revision Number"
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "INT_CNTR2,SDHC Interrupt Control Register"
|
|
bitfld.long 0x00 18. " SDIO_INT_WKP_EN ,SDIO Interrupt Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CARD_INSERTION_WKP_EN ,Card Insertion Wake-up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CARD_REMOVAL_WKP_EN ,Card Removal Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CARD_INSERTION_EN ,Card Insertion Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CARD_REMOVAL_EN ,Card Removal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SDIO_INT_EN ,SDIO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DAT0_EN ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BUF_READ_EN ,Bus Read Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUF_WRITE_EN ,Bus Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRITE_OP_DONE ,Write Operation Done" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READ_OP_DONE ,Read Operation Done" "Disabled,Enabled"
|
|
line.long 0x04 "CMD2,SDHC Command Number Register"
|
|
bitfld.long 0x04 0.--5. " COMMAND_NUMBER , Command Number" "CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CMD8,CMD9,CMD10,CMD11,CMD12,CMD13,CMD14,CMD15,CMD16,CMD17,CMD18,CMD19,CMD20,CMD21,CMD22,CMD23,CMD24,CMD25,CMD26,CMD27,CMD28,CMD29,CMD30,CMD31,CMD32,CMD33,CMD34,CMD35,CMD36,CMD37,CMD38,CMD39,CMD40,CMD41,CMD42,CMD43,CMD44,CMD45,CMD46,CMD47,CMD48,CMD49,CMD50,CMD51,CMD52,CMD53,CMD54,CMD55,CMD56,CMD57,CMD58,CMD59,CMD60,CMD61,CMD62,CMD63"
|
|
line.long 0x08 "ARG_H2,SDHC CMD Argument Register High"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "RES_FIFO2,SDHC Response FIFO Access Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RESPONSE_CONTENT ,Response Content FIFO Access Register"
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "BUFFER_ACCESS,SDHC Data Buffer Access Register"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree "SDHC3"
|
|
base ad:0x1001e000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "STR_STP_CLK3,SDHC Clock Control Register"
|
|
bitfld.long 0x00 3. " SDHCRESET ,SDHC Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " START_CLK ,Start Clock" "No effect,Started"
|
|
bitfld.long 0x00 0. " STOP_CLK ,Stop Clock" "No effect,Stopped"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STATUS3,SDHC Status Register"
|
|
eventfld.long 0x00 31. " CARD_INSERTION ,Card Insertion" "Not inserted,Inserted"
|
|
eventfld.long 0x00 30. " CARD_REMOVAL ,Card Removal" "Not removed,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 29. " YBUF_EMPTY ,Y Data Buffer Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 28. " XBUF_EMPTY ,X Data Buffer Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 27. " YBUF_FULL ,Y Data Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 26. " XBUF_FULL ,X Data Buffer Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 25. " BUF_UND_RUN ,Buffer Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x00 24. " BUF_OVFL ,Buffer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 14. " SDIO_INT_ACTIVE ,SDIO Interrupt Active" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " END_CMD_RESP ,End Command Response" "Not successfull,Successfull"
|
|
textline " "
|
|
eventfld.long 0x00 12. " WRITE_OP_DONE ,Write Operation Done" "Not completed,Completed"
|
|
eventfld.long 0x00 11. " READ_OP_DONE ,Read Operation Done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " WR_CRC_ERROR_CODE ,Write CRC Error Code" "No error,Error,No CRC,?..."
|
|
bitfld.long 0x00 8. " CARD_BUS_CLK_RUN ,Card Bus Clock Run" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BUF_READ_READY ,Buffer Read Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " BUF_WRITE_READY ,Buffer Write Ready" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x00 5. " RESP_CRC_ERR ,Response CRC Error" "No error,Error"
|
|
eventfld.long 0x00 3. " READ_CRC_ERR ,Read CRC Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 2. " WRITE_CRC_ERR ,Write CRC Error" "No error,Error"
|
|
eventfld.long 0x00 1. " TIME_OUT_RESP ,Time Out Response" "No error,Time out"
|
|
textline " "
|
|
eventfld.long 0x00 0. " TIME_OUT_READ ,Time Out Read" "No error,Time out"
|
|
group.long 0x08++0x17
|
|
line.long 0x00 "CLK_RATE3,SDHC Clock Rate Register"
|
|
hexmask.long.word 0x00 4.--15. 1. " CLK_PRESCALER ,Clock Prescaler"
|
|
bitfld.long 0x00 0.--3. " CLK_DIVIDER ,Clock Divider" "Reserved,Div by 2,Div by 3,Div by 4,Div by 5,Div by 6,Div by 7,Div by 8,Div by 9,Div by 10,Div by 11,Div by 12,Div by 13,Div by 14,Div by 15,Div by 16"
|
|
line.long 0x04 "CMD_DAT_CONT3,SDHC Command And Data Control Register"
|
|
bitfld.long 0x04 15. " CMD_RESUME ,Command Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x04 12. " CMD_RESP_LONG_OFF ,Command Response Long Off" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " STOP_READWAIT ,Stop Read/Wait" "No effect,End cycle"
|
|
bitfld.long 0x04 10. " START_READWAIT ,Start Read/Wait" "No effect,Started"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " BUS_WIDTH ,Bus Width" "1-bit,Reserved,4-bit,?..."
|
|
bitfld.long 0x04 7. " INIT ,Initialize" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WRITE_READ ,Write/Read" "Read,Write"
|
|
bitfld.long 0x04 3. " DATA_ENABLE ,Data Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " FORMAT_OF_RESPONSE ,Format of Response" "No response,48-bit,136-bit,48-bit,?..."
|
|
line.long 0x08 "RES_TO3,SDHC Response Time Out Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RESPONSE_TIME_OUT ,Response Time Out"
|
|
line.long 0x0c "READ_TO3,SDHC Read Time Out Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " DATA_READ_TIME_OUT[15:0] ,Data Read Time Out"
|
|
line.long 0x10 "BLK_LEN3,SDHC Block Length Register"
|
|
hexmask.long.word 0x10 0.--11. 1. " BLOCK_LENGTH[11:0] ,Block Length"
|
|
line.long 0x14 "NOB3,SDHC Number of Blocks Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " NOB ,Specifies the Number of Blocks in a Block Transfer"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "REV_NO3,SDHC Revision Number Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " REVISION_NUMBER ,Revision Number"
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "INT_CNTR3,SDHC Interrupt Control Register"
|
|
bitfld.long 0x00 18. " SDIO_INT_WKP_EN ,SDIO Interrupt Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CARD_INSERTION_WKP_EN ,Card Insertion Wake-up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CARD_REMOVAL_WKP_EN ,Card Removal Wake-up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CARD_INSERTION_EN ,Card Insertion Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CARD_REMOVAL_EN ,Card Removal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SDIO_INT_EN ,SDIO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DAT0_EN ,Data Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BUF_READ_EN ,Bus Read Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUF_WRITE_EN ,Bus Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " END_CMD_RES ,End Command Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRITE_OP_DONE ,Write Operation Done" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READ_OP_DONE ,Read Operation Done" "Disabled,Enabled"
|
|
line.long 0x04 "CMD3,SDHC Command Number Register"
|
|
bitfld.long 0x04 0.--5. " COMMAND_NUMBER , Command Number" "CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CMD8,CMD9,CMD10,CMD11,CMD12,CMD13,CMD14,CMD15,CMD16,CMD17,CMD18,CMD19,CMD20,CMD21,CMD22,CMD23,CMD24,CMD25,CMD26,CMD27,CMD28,CMD29,CMD30,CMD31,CMD32,CMD33,CMD34,CMD35,CMD36,CMD37,CMD38,CMD39,CMD40,CMD41,CMD42,CMD43,CMD44,CMD45,CMD46,CMD47,CMD48,CMD49,CMD50,CMD51,CMD52,CMD53,CMD54,CMD55,CMD56,CMD57,CMD58,CMD59,CMD60,CMD61,CMD62,CMD63"
|
|
line.long 0x08 "ARG_H3,SDHC CMD Argument Register High"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "RES_FIFO3,SDHC Response FIFO Access Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RESPONSE_CONTENT ,Response Content FIFO Access Register"
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "BUFFER_ACCESS,SDHC Data Buffer Access Register"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "UART (Universal Asynchronous Receiver/Transmitters)"
|
|
tree "UART1"
|
|
base ad:0x1000A000
|
|
width 0x8
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "URXD1,UART1 Receiver Register"
|
|
bitfld.word 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.word 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 11. " BRK ,BREAK Detect" "No BREAK,BREAK"
|
|
bitfld.word 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup.word 0x40++0x01
|
|
line.word 0x00 "UTXD1,UART1 Transmitter Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "UCR1_1,UART1 Control Register 1"
|
|
bitfld.word 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.word 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.word 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Enabled,Disabled"
|
|
bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "UCR2_1,UART1 Control Register 2"
|
|
bitfld.word 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IRTS ,Ignore /UART1_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.word 0x00 13. " CTSC ,/UART1_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.word 0x00 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.word 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.word 0x00 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.word 0x00 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " SRST ,Software Reset" "Reset,No reset"
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "UCR3_1,UART1 Control Register 3"
|
|
bitfld.word 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.word 0x00 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.word 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x8c++0x1
|
|
line.word 0x00 "UCR4_1,UART1 Control Register 4"
|
|
bitfld.word 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.word 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x90++0x1
|
|
line.word 0x00 "UFCR1,UART1 FIFO Control Register"
|
|
bitfld.word 0x00 10.--15. " TXTL ,Transmitter Trigger Level" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Div by 1,Div by 7,?..."
|
|
bitfld.word 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
group.word 0x94++0x1
|
|
line.word 0x00 "USR11,UART1 Status Register 1"
|
|
eventfld.word 0x00 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.word 0x00 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.word 0x00 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Required"
|
|
textline " "
|
|
eventfld.word 0x00 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.word 0x00 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.word 0x00 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.word 0x00 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
textline " "
|
|
eventfld.word 0x00 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "USR21,UART1 Status Register 2"
|
|
eventfld.word 0x00 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.word 0x00 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
eventfld.word 0x00 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.word 0x00 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.word 0x00 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 1. " ORE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
group.word 0x9c++0x1
|
|
line.word 0x00 "UESC1,UART1 Escape Character Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
group.word 0xa0++0x1
|
|
line.word 0x00 "UTIM1,UART1 Escape Timer Register"
|
|
hexmask.word 0x00 0.--11. 1. " TIM ,UART Escape Timer"
|
|
group.word 0xa4++0x1
|
|
line.word 0x00 "UBIR1,UART1 BRM Incremental Register"
|
|
hexmask.word 0x00 0.--15. 1. " INC ,Incremental Numerator"
|
|
group.word 0xa8++0x1
|
|
line.word 0x00 "UBMR1,UART1 BRM Modulator Register"
|
|
hexmask.word 0x00 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup.word 0xac++0x03
|
|
line.word 0x00 "UBRC1,UART1 Baud Rate Count Register"
|
|
hexmask.word.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group.word 0xb0++0x07
|
|
line.word 0x00 "ONEMS1,UART1 One Millisecond Register"
|
|
hexmask.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
group.word 0xb4++0x1
|
|
line.word 0x00 "UTS1,UART1 Test Register 1"
|
|
bitfld.word 0x00 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.word 0x00 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.word 0x00 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.word 0x00 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x1000B000
|
|
width 0x8
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "URXD2,UART2 Receiver Register"
|
|
bitfld.word 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.word 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 11. " BRK ,BREAK Detect" "No BREAK,BREAK"
|
|
bitfld.word 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup.word 0x40++0x01
|
|
line.word 0x00 "UTXD2,UART2 Transmitter Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "UCR1_2,UART2 Control Register 1"
|
|
bitfld.word 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.word 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.word 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Enabled,Disabled"
|
|
bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "UCR2_2,UART2 Control Register 2"
|
|
bitfld.word 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IRTS ,Ignore /UART2_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.word 0x00 13. " CTSC ,/UART2_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.word 0x00 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.word 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.word 0x00 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.word 0x00 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " SRST ,Software Reset" "Reset,No reset"
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "UCR3_2,UART2 Control Register 3"
|
|
bitfld.word 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.word 0x00 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.word 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x8c++0x1
|
|
line.word 0x00 "UCR4_2,UART2 Control Register 4"
|
|
bitfld.word 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.word 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x90++0x1
|
|
line.word 0x00 "UFCR2,UART2 FIFO Control Register"
|
|
bitfld.word 0x00 10.--15. " TXTL ,Transmitter Trigger Level" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Div by 1,Div by 7,?..."
|
|
bitfld.word 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
group.word 0x94++0x1
|
|
line.word 0x00 "USR12,UART2 Status Register 1"
|
|
eventfld.word 0x00 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.word 0x00 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.word 0x00 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Required"
|
|
textline " "
|
|
eventfld.word 0x00 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.word 0x00 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.word 0x00 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.word 0x00 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
textline " "
|
|
eventfld.word 0x00 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "USR22,UART2 Status Register 2"
|
|
eventfld.word 0x00 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.word 0x00 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
eventfld.word 0x00 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.word 0x00 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.word 0x00 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 1. " ORE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
group.word 0x9c++0x1
|
|
line.word 0x00 "UESC2,UART2 Escape Character Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
group.word 0xa0++0x1
|
|
line.word 0x00 "UTIM2,UART2 Escape Timer Register"
|
|
hexmask.word 0x00 0.--11. 1. " TIM ,UART Escape Timer"
|
|
group.word 0xa4++0x1
|
|
line.word 0x00 "UBIR2,UART2 BRM Incremental Register"
|
|
hexmask.word 0x00 0.--15. 1. " INC ,Incremental Numerator"
|
|
group.word 0xa8++0x1
|
|
line.word 0x00 "UBMR2,UART2 BRM Modulator Register"
|
|
hexmask.word 0x00 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup.word 0xac++0x03
|
|
line.word 0x00 "UBRC2,UART2 Baud Rate Count Register"
|
|
hexmask.word.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group.word 0xb0++0x07
|
|
line.word 0x00 "ONEMS2,UART2 One Millisecond Register"
|
|
hexmask.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
group.word 0xb4++0x1
|
|
line.word 0x00 "UTS2,UART2 Test Register 1"
|
|
bitfld.word 0x00 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.word 0x00 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.word 0x00 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.word 0x00 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART3"
|
|
base ad:0x1000C000
|
|
width 0x8
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "URXD3,UART3 Receiver Register"
|
|
bitfld.word 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.word 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 11. " BRK ,BREAK Detect" "No BREAK,BREAK"
|
|
bitfld.word 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup.word 0x40++0x01
|
|
line.word 0x00 "UTXD3,UART3 Transmitter Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "UCR1_3,UART3 Control Register 1"
|
|
bitfld.word 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.word 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.word 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Enabled,Disabled"
|
|
bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "UCR2_3,UART3 Control Register 2"
|
|
bitfld.word 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IRTS ,Ignore /UART3_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.word 0x00 13. " CTSC ,/UART3_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.word 0x00 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.word 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.word 0x00 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.word 0x00 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " SRST ,Software Reset" "Reset,No reset"
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "UCR3_3,UART3 Control Register 3"
|
|
bitfld.word 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.word 0x00 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.word 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x8c++0x1
|
|
line.word 0x00 "UCR4_3,UART3 Control Register 4"
|
|
bitfld.word 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.word 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x90++0x1
|
|
line.word 0x00 "UFCR3,UART3 FIFO Control Register"
|
|
bitfld.word 0x00 10.--15. " TXTL ,Transmitter Trigger Level" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Div by 1,Div by 7,?..."
|
|
bitfld.word 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
group.word 0x94++0x1
|
|
line.word 0x00 "USR13,UART3 Status Register 1"
|
|
eventfld.word 0x00 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.word 0x00 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.word 0x00 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Required"
|
|
textline " "
|
|
eventfld.word 0x00 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.word 0x00 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.word 0x00 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.word 0x00 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
textline " "
|
|
eventfld.word 0x00 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "USR23,UART3 Status Register 2"
|
|
eventfld.word 0x00 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.word 0x00 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
eventfld.word 0x00 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.word 0x00 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.word 0x00 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 1. " ORE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
group.word 0x9c++0x1
|
|
line.word 0x00 "UESC3,UART3 Escape Character Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
group.word 0xa0++0x1
|
|
line.word 0x00 "UTIM3,UART3 Escape Timer Register"
|
|
hexmask.word 0x00 0.--11. 1. " TIM ,UART Escape Timer"
|
|
group.word 0xa4++0x1
|
|
line.word 0x00 "UBIR3,UART3 BRM Incremental Register"
|
|
hexmask.word 0x00 0.--15. 1. " INC ,Incremental Numerator"
|
|
group.word 0xa8++0x1
|
|
line.word 0x00 "UBMR3,UART3 BRM Modulator Register"
|
|
hexmask.word 0x00 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup.word 0xac++0x03
|
|
line.word 0x00 "UBRC3,UART3 Baud Rate Count Register"
|
|
hexmask.word.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group.word 0xb0++0x07
|
|
line.word 0x00 "ONEMS3,UART3 One Millisecond Register"
|
|
hexmask.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
group.word 0xb4++0x1
|
|
line.word 0x00 "UTS3,UART3 Test Register 1"
|
|
bitfld.word 0x00 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.word 0x00 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.word 0x00 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.word 0x00 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART4"
|
|
base ad:0x1000D000
|
|
width 0x8
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "URXD4,UART4 Receiver Register"
|
|
bitfld.word 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.word 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 11. " BRK ,BREAK Detect" "No BREAK,BREAK"
|
|
bitfld.word 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup.word 0x40++0x01
|
|
line.word 0x00 "UTXD4,UART4 Transmitter Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "UCR1_4,UART4 Control Register 1"
|
|
bitfld.word 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.word 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.word 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Enabled,Disabled"
|
|
bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "UCR2_4,UART4 Control Register 2"
|
|
bitfld.word 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IRTS ,Ignore /UART4_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.word 0x00 13. " CTSC ,/UART4_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.word 0x00 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.word 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.word 0x00 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.word 0x00 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " SRST ,Software Reset" "Reset,No reset"
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "UCR3_4,UART4 Control Register 3"
|
|
bitfld.word 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.word 0x00 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.word 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x8c++0x1
|
|
line.word 0x00 "UCR4_4,UART4 Control Register 4"
|
|
bitfld.word 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.word 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x90++0x1
|
|
line.word 0x00 "UFCR4,UART4 FIFO Control Register"
|
|
bitfld.word 0x00 10.--15. " TXTL ,Transmitter Trigger Level" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Div by 1,Div by 7,?..."
|
|
bitfld.word 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
group.word 0x94++0x1
|
|
line.word 0x00 "USR14,UART4 Status Register 1"
|
|
eventfld.word 0x00 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.word 0x00 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.word 0x00 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Required"
|
|
textline " "
|
|
eventfld.word 0x00 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.word 0x00 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.word 0x00 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.word 0x00 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
textline " "
|
|
eventfld.word 0x00 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "USR24,UART4 Status Register 2"
|
|
eventfld.word 0x00 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.word 0x00 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
eventfld.word 0x00 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.word 0x00 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.word 0x00 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 1. " ORE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
group.word 0x9c++0x1
|
|
line.word 0x00 "UESC4,UART4 Escape Character Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
group.word 0xa0++0x1
|
|
line.word 0x00 "UTIM4,UART4 Escape Timer Register"
|
|
hexmask.word 0x00 0.--11. 1. " TIM ,UART Escape Timer"
|
|
group.word 0xa4++0x1
|
|
line.word 0x00 "UBIR4,UART4 BRM Incremental Register"
|
|
hexmask.word 0x00 0.--15. 1. " INC ,Incremental Numerator"
|
|
group.word 0xa8++0x1
|
|
line.word 0x00 "UBMR4,UART4 BRM Modulator Register"
|
|
hexmask.word 0x00 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup.word 0xac++0x03
|
|
line.word 0x00 "UBRC4,UART4 Baud Rate Count Register"
|
|
hexmask.word.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group.word 0xb0++0x07
|
|
line.word 0x00 "ONEMS4,UART4 One Millisecond Register"
|
|
hexmask.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
group.word 0xb4++0x1
|
|
line.word 0x00 "UTS4,UART4 Test Register 1"
|
|
bitfld.word 0x00 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.word 0x00 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.word 0x00 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.word 0x00 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART5"
|
|
base ad:0x1001B000
|
|
width 0x8
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "URXD5,UART5 Receiver Register"
|
|
bitfld.word 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.word 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 11. " BRK ,BREAK Detect" "No BREAK,BREAK"
|
|
bitfld.word 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup.word 0x40++0x01
|
|
line.word 0x00 "UTXD5,UART5 Transmitter Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "UCR1_5,UART5 Control Register 1"
|
|
bitfld.word 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.word 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.word 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Enabled,Disabled"
|
|
bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "UCR2_5,UART5 Control Register 2"
|
|
bitfld.word 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IRTS ,Ignore /UART5_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.word 0x00 13. " CTSC ,/UART5_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.word 0x00 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.word 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.word 0x00 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.word 0x00 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " SRST ,Software Reset" "Reset,No reset"
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "UCR3_5,UART5 Control Register 3"
|
|
bitfld.word 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.word 0x00 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.word 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x8c++0x1
|
|
line.word 0x00 "UCR4_5,UART5 Control Register 4"
|
|
bitfld.word 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.word 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x90++0x1
|
|
line.word 0x00 "UFCR5,UART5 FIFO Control Register"
|
|
bitfld.word 0x00 10.--15. " TXTL ,Transmitter Trigger Level" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Div by 1,Div by 7,?..."
|
|
bitfld.word 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
group.word 0x94++0x1
|
|
line.word 0x00 "USR15,UART5 Status Register 1"
|
|
eventfld.word 0x00 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.word 0x00 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.word 0x00 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Required"
|
|
textline " "
|
|
eventfld.word 0x00 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.word 0x00 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.word 0x00 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.word 0x00 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
textline " "
|
|
eventfld.word 0x00 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "USR25,UART5 Status Register 2"
|
|
eventfld.word 0x00 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.word 0x00 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
eventfld.word 0x00 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.word 0x00 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.word 0x00 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 1. " ORE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
group.word 0x9c++0x1
|
|
line.word 0x00 "UESC5,UART5 Escape Character Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
group.word 0xa0++0x1
|
|
line.word 0x00 "UTIM5,UART5 Escape Timer Register"
|
|
hexmask.word 0x00 0.--11. 1. " TIM ,UART Escape Timer"
|
|
group.word 0xa4++0x1
|
|
line.word 0x00 "UBIR5,UART5 BRM Incremental Register"
|
|
hexmask.word 0x00 0.--15. 1. " INC ,Incremental Numerator"
|
|
group.word 0xa8++0x1
|
|
line.word 0x00 "UBMR5,UART5 BRM Modulator Register"
|
|
hexmask.word 0x00 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup.word 0xac++0x03
|
|
line.word 0x00 "UBRC5,UART5 Baud Rate Count Register"
|
|
hexmask.word.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group.word 0xb0++0x07
|
|
line.word 0x00 "ONEMS5,UART5 One Millisecond Register"
|
|
hexmask.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
group.word 0xb4++0x1
|
|
line.word 0x00 "UTS5,UART5 Test Register 1"
|
|
bitfld.word 0x00 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.word 0x00 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.word 0x00 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.word 0x00 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART6"
|
|
base ad:0x1001C000
|
|
width 0x8
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "URXD6,UART6 Receiver Register"
|
|
bitfld.word 0x00 14. " ERR ,Error Detect" "Error,No error"
|
|
bitfld.word 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 12. " FRMERR ,Frame Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 11. " BRK ,BREAK Detect" "No BREAK,BREAK"
|
|
bitfld.word 0x00 10. " PRERR ,Parity Error" "No error,Error"
|
|
hexmask.word.byte 0x00 0.--7. 1. " RX_DATA ,Received Data"
|
|
wgroup.word 0x40++0x01
|
|
line.word 0x00 "UTXD6,UART6 Transmitter Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data"
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "UCR1_6,UART6 Control Register 1"
|
|
bitfld.word 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ADBR ,Automatic Detection Of Baud-Rate" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " IDEN ,Idle Condtion Detected Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames"
|
|
bitfld.word 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SNDBRK ,Send BREAK" "Not send,Send"
|
|
bitfld.word 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DOZE ,Determines the UART Enable Condition in the Doze State" "Enabled,Disabled"
|
|
bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "UCR2_6,UART6 Control Register 2"
|
|
bitfld.word 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " IRTS ,Ignore /UART6_RTS Pin" "Not ignored,Ignored"
|
|
bitfld.word 0x00 13. " CTSC ,/UART6_CTS Pin Control" "CTS,Receiver"
|
|
textline " "
|
|
bitfld.word 0x00 12. " CTS ,Clear to Send" "High,Low"
|
|
bitfld.word 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising edge,Falling edge,Any edge,Any edge"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd"
|
|
bitfld.word 0x00 6. " STPB ,Number of STOP Bits" "1,2"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WS ,Word Size" "7-bit,8-bit"
|
|
bitfld.word 0x00 4. " RTSEN ,Request To Send Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " SRST ,Software Reset" "Reset,No reset"
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "UCR3_6,UART6 Control Register 3"
|
|
bitfld.word 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " ADNIMP ,Autobaud Detection Not Improved" "New,Old"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "IPP_UART_RXD/IPP_UART_RXD_IR,IPP_UART_RXD_MUX"
|
|
textline " "
|
|
bitfld.word 0x00 1. " INVT ,Inverted Infrared Transmission" "Low,High"
|
|
bitfld.word 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x8c++0x1
|
|
line.word 0x00 "UCR4_6,UART6 Control Register 4"
|
|
bitfld.word 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 9. " INVR ,Inverted Infrared Reception" "Low,High"
|
|
bitfld.word 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " IRSC ,IR Special Case" "Sampling clock,UART clock"
|
|
textline " "
|
|
bitfld.word 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x90++0x1
|
|
line.word 0x00 "UFCR6,UART6 FIFO Control Register"
|
|
bitfld.word 0x00 10.--15. " TXTL ,Transmitter Trigger Level" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "Div by 6,Div by 5,Div by 4,Div by 3,Div by 2,Div by 1,Div by 7,?..."
|
|
bitfld.word 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
group.word 0x94++0x1
|
|
line.word 0x00 "USR16,UART6 Status Register 1"
|
|
eventfld.word 0x00 15. " PARITYERR ,Parity Error Interrupt Flag" "No error,Error"
|
|
bitfld.word 0x00 14. " RTSS ,/RTS Pin Status" "Inactive,Active"
|
|
bitfld.word 0x00 13. " TRDY ,Transmitter Ready Interrupt/DMA Flag" "Not require,Required"
|
|
textline " "
|
|
eventfld.word 0x00 12. " RTSD ,RTS Delta" "Not changed,Changed"
|
|
eventfld.word 0x00 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 10. " FRAMERR ,Frame Error Interrupt Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RRDY ,Receiver Ready Interrupt/DMA Flag" "Not ready,Ready"
|
|
eventfld.word 0x00 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active"
|
|
bitfld.word 0x00 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle"
|
|
textline " "
|
|
eventfld.word 0x00 5. " AIRINT ,Asynchronous IR WAKE Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 4. " AWAKE ,Asynchronous WAKE Interrupt Flag" "Not detected,Detected"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "USR26,UART6 Status Register 2"
|
|
eventfld.word 0x00 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Recieved"
|
|
bitfld.word 0x00 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty"
|
|
eventfld.word 0x00 12. " IDLE ,Idle Connection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished"
|
|
eventfld.word 0x00 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected"
|
|
eventfld.word 0x00 7. " WAKE ,Wake" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 3. " TXDC ,Transmitter Complete" "Incomplete,Complete"
|
|
eventfld.word 0x00 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.word 0x00 1. " ORE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " RDR ,Receive Data Ready" "Not ready,Ready"
|
|
group.word 0x9c++0x1
|
|
line.word 0x00 "UESC6,UART6 Escape Character Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " ESC_CHAR ,UART Escape Character"
|
|
group.word 0xa0++0x1
|
|
line.word 0x00 "UTIM6,UART6 Escape Timer Register"
|
|
hexmask.word 0x00 0.--11. 1. " TIM ,UART Escape Timer"
|
|
group.word 0xa4++0x1
|
|
line.word 0x00 "UBIR6,UART6 BRM Incremental Register"
|
|
hexmask.word 0x00 0.--15. 1. " INC ,Incremental Numerator"
|
|
group.word 0xa8++0x1
|
|
line.word 0x00 "UBMR6,UART6 BRM Modulator Register"
|
|
hexmask.word 0x00 0.--15. 1. " MOD ,Modular Denominator"
|
|
rgroup.word 0xac++0x03
|
|
line.word 0x00 "UBRC6,UART6 Baud Rate Count Register"
|
|
hexmask.word.word 0x00 0.--15. 1. " BCNT ,Baud Rate Count Register"
|
|
group.word 0xb0++0x07
|
|
line.word 0x00 "ONEMS6,UART6 One Millisecond Register"
|
|
hexmask.word 0x00 0.--15. 1. " ONEMS ,One Millisecond Register"
|
|
group.word 0xb4++0x1
|
|
line.word 0x00 "UTS6,UART6 Test Register 1"
|
|
bitfld.word 0x00 13. " FRCPERR ,Force Parity Error" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " LOOP ,Loop TX And RX For Test" "Normal operation,Internally connect"
|
|
bitfld.word 0x00 11. " DBGEN ,/Debug Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " LOOPIR ,Loop TX And RX For IR Test" "No IR loop,Connect IR"
|
|
bitfld.word 0x00 9. " RXDBG ,RXFIFO Debug Mode" "Not increment,Increment"
|
|
bitfld.word 0x00 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " SOFTRST ,Software Reset" "No reset,Reset"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "FEC (Fast Ethernet Controller)"
|
|
base ad:0x1002B000
|
|
tree "Control/Status Registers"
|
|
width 7.
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "EIR,Ethernet Interrupt Event Register"
|
|
eventfld.long 0x00 31. " HBERR ,Heartbeat error" "No error,Error"
|
|
eventfld.long 0x00 30. " BABR ,Babbling receive error" "No error,Error"
|
|
eventfld.long 0x00 29. " BABT ,Babbling receive error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 28. " GRA ,Graceful stop complete" "Not completed,Completed"
|
|
eventfld.long 0x00 27. " TXF ,Transmit frame interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 26. " TXB ,Transmit buffer interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 25. " RXF ,Receive frame interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " RXB ,Receive buffer interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 23. " MII ,MII interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 22. " EBERR ,Ethernet bus error" "No error,Error"
|
|
eventfld.long 0x00 21. " LC ,Late collision" "Not occurred,Occurred"
|
|
eventfld.long 0x00 20. " RL ,Collision retry limit" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 19. " UN ,Transmit FIFO underrun" "Not occurred,Occurred"
|
|
line.long 0x04 "EIMR,Interrupt Mask Register"
|
|
bitfld.long 0x04 31. " HBERR ,Heartbeat error" "Masked,Not masked"
|
|
bitfld.long 0x04 30. " BABR ,Babbling receive error" "Masked,Not masked"
|
|
bitfld.long 0x04 29. " BABT ,Babbling receive error" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GRA ,Graceful stop complete" "Masked,Not masked"
|
|
bitfld.long 0x04 27. " TXF ,Transmit frame interrupt" "Masked,Not masked"
|
|
bitfld.long 0x04 26. " TXB ,Transmit buffer interrupt" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 25. " RXF ,Receive frame interrupt" "Masked,Not masked"
|
|
bitfld.long 0x04 24. " RXB ,Receive buffer interrupt" "Masked,Not masked"
|
|
bitfld.long 0x04 23. " MII ,MII interrupt" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " EBERR ,Ethernet bus error" "Masked,Not masked"
|
|
bitfld.long 0x04 21. " LC ,Late collision" "Masked,Not masked"
|
|
bitfld.long 0x04 20. " RL ,Collision retry limit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " UN ,Transmit FIFO underrun" "Masked,Not masked"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "RDAR,Receive Descriptor Active Register"
|
|
bitfld.long 0x00 24. " RDAR ,RDAR" "Not received,Recived"
|
|
line.long 0x04 "TDAR,Transmit Descriptor Active Register"
|
|
bitfld.long 0x04 24. " TDAR ,TDAR" "Not transmitted,Transmitted"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ECR,Ethernet Control Register"
|
|
bitfld.long 0x00 1. " ETHER_EN ,Ethernet enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RESET ,Reset" "No reset,Reset"
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "MMFR,MII Management Frame Register"
|
|
bitfld.long 0x00 30.--31. " ST ,Start of frame delimiter" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. " OP ,Operation code" "Write,Write for MII frame,Read,Read for MII frame"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PA ,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 18.--22. " RA ,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " TA ,Turn around" "0,1,2,3"
|
|
hexmask.long.word 0x00 0.--15. 1. " DATA ,Management frame data"
|
|
line.long 0x04 "MSCR,MII Speed Control Register"
|
|
bitfld.long 0x04 7. " DIS_PRE ,DIS_PRE" "0,1"
|
|
bitfld.long 0x04 1.--6. " MII_SPEED ,Controls the frequency of the MII management interface clock" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "MIBC,MIB Control Register"
|
|
bitfld.long 0x00 31. " MIB_DIS ,A read/write control bit" "Not halted,Halted"
|
|
bitfld.long 0x00 30. " MIB_IDLE ,MIB counters update" "Not updated,Updated"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "RCR,Receive Control Register"
|
|
hexmask.long.word 0x00 16.--26. 1. " MAX_FL ,Maximum frame length"
|
|
bitfld.long 0x00 5. " FCE ,Flow control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BC_REJ ,Broadcast frame reject" "Not rejected,Rejected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PROM ,Promiscuous mode" "0,1"
|
|
bitfld.long 0x00 2. " MII_MODE ,dia independent interface mode" "7-wire,MII"
|
|
bitfld.long 0x00 1. " DRT ,Disable receive on transmit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LOOP ,Internal loopback" "Not looped,Looped"
|
|
group.long 0xc4++0x03
|
|
line.long 0x00 "TCR,Transmit Control Register"
|
|
bitfld.long 0x00 4. " RFC_PAUSE ,Receive frame control pause" "Not received,Recived"
|
|
bitfld.long 0x00 3. " TFC_PAUSE ,Transmit frame control pause" "Not transmitted,Transmitted"
|
|
bitfld.long 0x00 2. " FDEN ,Full duplex enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HBC ,Heartbeat contro" "Not checked,Checked"
|
|
bitfld.long 0x00 0. " GTS ,Graceful transmit stop" "Not stopped,Stopped"
|
|
group.long 0xe4++0x0b
|
|
line.long 0x00 "PALR,Physical Address Low Register"
|
|
line.long 0x04 "PAUR,Physical Address High Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " PADDR2 ,Bytes 4 and 5 of the 6-byte individual address used for exact match, and the source addressfield in PAUSE frames"
|
|
hexmask.long.word 0x04 0.--15. 1. " TYPE ,Type field in PAUSE frames"
|
|
line.long 0x08 "OPD,Opcode/Pause Duration Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " OPCODE ,Opcode field used in PAUSE frames"
|
|
hexmask.long.word 0x08 0.--15. 1. " PAUSE_DUR ,Pause Duration field used in PAUSE frames"
|
|
group.long 0x118++0x0f
|
|
line.long 0x00 "IAUR,Descriptor Individual Upper Address Register"
|
|
line.long 0x04 "IALR,Descriptor Individual Lower Address Register"
|
|
line.long 0x08 "GAUR,Descriptor Group Upper Address Register"
|
|
line.long 0x0c "GALR,Descriptor Group Lower Address Register"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "TFWR,Transmit FIFO Watermark Register"
|
|
bitfld.long 0x00 0.--1. " TFWR ,Number of bytes written to transmit FIFO" "64,64,128,192"
|
|
rgroup.long 0x14c++0x03
|
|
line.long 0x00 "FRBR,FIFO Receive Bound Register"
|
|
hexmask.long.byte 0x00 2.--9. 1. " R_BOUND ,Highest valid FIFO RAM address"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "FRSR,FIFO Receive Start Register"
|
|
hexmask.long.byte 0x00 2.--9. 1. " R_FSTART ,Address of first receive FIFO location"
|
|
group.long 0x180++0x0b
|
|
line.long 0x00 "ERDSR,Receive Buffer Descriptor Ring Start Register"
|
|
hexmask.long 0x00 2.--31. 1. " R_DES_START ,Pointer to start of receive buffer descriptor queue"
|
|
line.long 0x04 "ETDSR,Transmit Buffer Descriptor Ring Start Register"
|
|
hexmask.long 0x04 2.--31. 1. " X_DES_START ,Pointer to start of transmit buffer descriptor queue"
|
|
line.long 0x08 "EMRBR,Receive Buffer Size Register"
|
|
hexmask.long.byte 0x08 4.--10. 1. " R_BUF_SIZE ,Receive buffer size in bytes"
|
|
tree.end
|
|
tree "MIB Block Counters"
|
|
width 20.
|
|
group.long 0x200++0x77
|
|
line.long 0x00 "RMON_T_DROP,Count of frames not counted correctly"
|
|
line.long 0x04 "RMON_T_PACKETS,RMON Tx packet count"
|
|
line.long 0x08 "RMON_T_BC_PKT,RMON Tx Broadcast Packets"
|
|
line.long 0x0c "RMON_T_MC_PKT,RMON Tx Multicast Packets"
|
|
line.long 0x10 "RMON_T_CRC_ALIGN,RMON Tx Packets w CRC/Align error"
|
|
line.long 0x14 "RMON_T_UNDERSIZE,RMON Tx Packets < 64 bytes"
|
|
line.long 0x18 "RMON_T_OVERSIZE,RMON Tx Packets > MAX_FL bytes"
|
|
line.long 0x1c "RMON_T_FRAG,RMON Tx Packets < 64 bytes"
|
|
line.long 0x20 "RMON_T_JAB,RMON Tx Packets > MAX_FL bytes"
|
|
line.long 0x24 "RMON_T_COL,RMON Tx collision count"
|
|
line.long 0x28 "RMON_T_P64,RMON Tx 64 byte packets"
|
|
line.long 0x2c "RMON_T_P65TO127,RMON Tx 65 to 127 byte packets"
|
|
line.long 0x30 "RMON_T_P128TO255,RMON Tx 128 to 255 byte packets"
|
|
line.long 0x34 "RMON_T_P256TO511,RMON Tx 256 to 511 byte packets"
|
|
line.long 0x38 "RMON_T_P512TO1023,RMON Tx 512 to 1023 byte packets"
|
|
line.long 0x3c "RMON_T_P1024TO2047,RMON Tx 1024 to 2047 byte packets"
|
|
line.long 0x40 "RMON_T_P_GTE2048,RMON Tx packets w > 2048 bytes"
|
|
line.long 0x44 "RMON_T_OCTETS,RMON Tx Octets"
|
|
line.long 0x48 "IEEE_T_DROP,Count of frames not counted correctly"
|
|
line.long 0x4c "IEEE_T_FRAME_OK,Frames Transmitted OK"
|
|
line.long 0x50 "IEEE_T_1COL,Frames Transmitted with Single Collision"
|
|
line.long 0x54 "IEEE_T_MCOL,Frames Transmitted with Multiple Collisions"
|
|
line.long 0x58 "EEE_T_DEF,Frames Transmitted after Deferral Delay"
|
|
line.long 0x5c "IEEE_T_LCOL,Frames Transmitted with Late Collision"
|
|
line.long 0x60 "IEEE_T_EXCOL,Frames Transmitted with Excessive Collisions"
|
|
line.long 0x64 "IEEE_T_MACERR,Frames Transmitted with Tx FIFO Underrun"
|
|
line.long 0x68 "IEEE_T_CSERR,Frames Transmitted with Carrier Sense Error"
|
|
line.long 0x6c "IEEE_T_SQE,Frames Transmitted with SQE Error"
|
|
line.long 0x70 "IEEE_T_FDXFC,Flow Control Pause frames transmitted"
|
|
line.long 0x74 "IEEE_T_OCTETS_OK,Octet count for Frames Transmitted w/o Error"
|
|
group.long 0x284++0x5f
|
|
line.long 0x00 "RMON_R_PACKETS,RMON Rx packet count"
|
|
line.long 0x04 "RMON_R_BC_PKT,RMON Rx Broadcast Packets"
|
|
line.long 0x08 "RMON_R_MC_PKT,RMON Rx Multicast Packets"
|
|
line.long 0x0c "RMON_R_CRC_ALIGN,RMON Rx Packets w CRC/Align error"
|
|
line.long 0x10 "RMON_R_UNDERSIZE,RMON Rx Packets < 64 bytes"
|
|
line.long 0x14 "RMON_R_OVERSIZE,RMON Rx Packets > MAX_FL bytes"
|
|
line.long 0x18 "RMON_R_FRAG,RMON Rx Packets < 64 bytes"
|
|
line.long 0x1c "RMON_R_JAB,RMON Rx Packets > MAX_FL bytes"
|
|
line.long 0x20 "RMON_R_RESVD_0,RMON_R_RESVD_0"
|
|
line.long 0x24 "RMON_R_P64,RMON Rx 64 byte packets"
|
|
line.long 0x28 "RMON_R_P65TO127,RMON Rx 65 to 127 byte packets"
|
|
line.long 0x2c "RMON_R_P128TO255,RMON Rx 128 to 255 byte packets"
|
|
line.long 0x30 "RMON_R_P256TO511,RMON Rx 256 to 511 byte packets"
|
|
line.long 0x34 "RMON_R_P512TO1023,RMON Rx 512 to 1023 byte packets"
|
|
line.long 0x38 "RMON_R_P1024TO2047,RMON Rx 1024 to 2047 byte packets"
|
|
line.long 0x3c "RMON_R_P_GTE2048,RMON Rx packets w > 2048 bytes"
|
|
line.long 0x40 "RMON_R_OCTETS,RMON Rx Octets"
|
|
line.long 0x44 "IEEE_R_DROP,Count of frames not counted correctly"
|
|
line.long 0x48 "IEEE_R_FRAME_OK,Frames Received OK"
|
|
line.long 0x4c "IEEE_R_CRC,Frames Received with CRC Error"
|
|
line.long 0x50 "IEEE_R_ALIGN,Frames Received with Alignment Error"
|
|
line.long 0x54 "IEEE_R_MACERR,Receive Fifo Overflow count"
|
|
line.long 0x58 "IEEE_R_FDXFC,Flow Control Pause frames received"
|
|
line.long 0x5c "IEEE_R_OCTETS_OK,Octet count for Frames Rcvd w/o Error"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "HS USB-OTG (High-Speed USB On-The-Go)"
|
|
base ad:0x10024000
|
|
width 12.
|
|
tree "USB Control"
|
|
if ((data.long(ad:0x10024600)&0x1)==0x1)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "USBCONTROL,USB Control Register"
|
|
bitfld.long 0x00 31. " OWIR ,OTG Wake up Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 29.--30. " OSIC ,OTG Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OUIE ,OTG ULPI Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OWIE ,OTG Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " OBPVAL1 ,OTG Bypass Value for RxDB" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " OBPVAL0 ,OTG Bypass Value for RxDm" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " OPM ,OTG Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " H2WIR ,Host 2 Wake-up Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " H2SIC ,Host 2 Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 20. " H2UIE ,Host 2 ULPI Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " H2WIE ,Host 2 Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " H2PM ,Host 2 Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " H1WIR ,Host 1 Wake-up Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " H1SIC ,Host 1 Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 11. " H1WIE ,Host 1 Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " H1BPVAL1 ,HOST 1 Bypass Value for RxDB" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " H1BPVAL1 ,HOST 1 Bypass Value for RxDm" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " H1PM ,Host 1 Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " H2DT ,Host 2 TLL Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " H1DT ,Host 1 TLL Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BPE ,Bypass Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "USBCONTROL,USB Control Register"
|
|
bitfld.long 0x00 31. " OWIR ,OTG Wake up Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 29.--30. " OSIC ,OTG Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OUIE ,OTG ULPI Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OWIE ,OTG Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x00 24. " OPM ,OTG Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " H2WIR ,Host 2 Wake-up Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " H2SIC ,Host 2 Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 20. " H2UIE ,Host 2 ULPI Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " H2WIE ,Host 2 Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " H2PM ,Host 2 Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " H1WIR ,Host 1 Wake-up Interrupt Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " H1SIC ,Host 1 Serial Interface Configuration" "Differential / Unidirectional,Differential / Bidirectional,Single Ended / Unidirectional,Single Ended / Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 11. " H1WIE ,Host 1 Wake-up Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x00 8. " H1PM ,Host 1 Power Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " H2DT ,Host 2 TLL Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " H1DT ,Host 1 TLL Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BPE ,Bypass Enable" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x604++0x01
|
|
line.byte 0x00 "OTGMIRROR,OTG Port Mirror Register"
|
|
bitfld.byte 0x00 4. " SESEND ,B Device Session End" "Active,End"
|
|
bitfld.byte 0x00 3. " VBUSVLD ,Vbus Valid" "Not valid,Valid"
|
|
bitfld.byte 0x00 2. " BSESVLD ,B Session Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " ASESVLD ,A Session Valid" "Not valid,Valid"
|
|
bitfld.byte 0x00 0. " IDIDG ,OTG ID-pin Status" "Low(A-device),High(B-device)"
|
|
tree.end
|
|
width 16.
|
|
tree "OTG USB"
|
|
rgroup.long 0x00++0x17 "HWGENERAL"
|
|
line.long 0x00 "UOG_ID,Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core"
|
|
hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]"
|
|
hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number"
|
|
line.long 0x04 "UOG_HWGENERAL,General Hardware Register"
|
|
bitfld.long 0x04 9. " SM ,VUSB_HS_PHY_SERIAL" "0,1"
|
|
bitfld.long 0x04 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x04 4.--5. " PHYW ,VUSB_HS_PHY16_8" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x04 3. " BWT ,Reserved for Internal Testing" "0,1"
|
|
bitfld.long 0x04 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11"
|
|
bitfld.long 0x04 0. " RT ,VUSB_HS_RESET_TYPE" "0,1"
|
|
line.long 0x08 "UOG_HWHOST,Host Hardware Parameters Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS"
|
|
bitfld.long 0x08 1.--3. " NPORT ,VUSB_HS_NUM_PORT-1" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x08 0. " HC ,VUSB_HS_HOST" "0,1"
|
|
line.long 0x0c "UOG_HWDEVICE,Device Hardware Parameters Register"
|
|
hexmask.long.byte 0x0c 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP"
|
|
bitfld.long 0x0c 0. " DC ,VUSB_HS_DEV" "0,1"
|
|
line.long 0x10 "UOG_HWTXBUF,TX Buffer Hardware Parameters Register"
|
|
bitfld.long 0x10 31. " TXLC ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1"
|
|
hexmask.long.byte 0x10 16.--23. 1. " TXCHANADD ,VUSB_HS_TX_CHAN_ADD"
|
|
hexmask.long.byte 0x10 8.--15. 1. " TXADD ,VUSB_HS_TX_ADD"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " TCBURST ,VUSB_HS_TX_BURST"
|
|
line.long 0x14 "UOG_HWRXBUF,RX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. " RXADD ,VUSB_HS_RX_ADD"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RXBURST ,VUSB_HS_RX_BURST"
|
|
rgroup.byte 0x100++0x00 "Device/Host Capability Registers"
|
|
line.byte 0x00 "UOG_CAPLENGTH,EHCI Compliant Register"
|
|
rgroup.word 0x102++0x1
|
|
line.word 0x00 "UOG_HCIVERSION,EHCI Compliant Register"
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UOG_HCSPARAMS,EHCI Compliant With Extensions Register"
|
|
bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16. " PI ,Port Indicators" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " PPC ,Port Power Control" "Not controlled,Controlled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" "Reserved,1,2,3,4,5,6,7,8,?..."
|
|
line.long 0x04 "UOG_HCCPARAMS,EHCI Compliant Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer"
|
|
bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled"
|
|
rgroup.word 0x120++0x01
|
|
line.word 0x00 "UOG_DCIVERSION,Device Interface Version Number Register"
|
|
rgroup.long 0x124++0x03
|
|
line.long 0x00 "UOG_DCCPARAMS,Device Control Capability Parameters Register"
|
|
bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
group.long 0x80++0x0f "Device/Host Timer Registers"
|
|
line.long 0x00 "GPTIMER0LD,General Purpose Timer #0 Load Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " H\GPTLD ,General Purpose Timer Load Value"
|
|
line.long 0x04 "GPTIMER0CTRL,General Purpose Timer #0 Controller"
|
|
bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stop,Run"
|
|
bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No action,Load Counter Value"
|
|
bitfld.long 0x04 24. " GPTMOD ,General Purpose Timer Mode" "One Shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
line.long 0x08 "GPTIMER1LD,General Purpose Timer #1 Load Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " H\GPTLD ,General Purpose Timer Load Value"
|
|
line.long 0x0c "GPTIMER1CTRL,General Purpose Timer #1 Controller"
|
|
bitfld.long 0x0c 31. " GPTRUN ,General Purpose Timer Run" "Stop,Run"
|
|
bitfld.long 0x0c 30. " GPTRST ,General Purpose Timer Reset" "No action,Load Counter Value"
|
|
bitfld.long 0x0c 24. " GPTMOD ,General Purpose Timer Mode" "One Shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0c 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
group.long 0x140++0x0f "Device/Host Operational Registers"
|
|
line.long 0x00 "UOG_USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard"
|
|
bitfld.long 0x00 12. " ATDTW ,Add dTD TripWire" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enable"
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "4096 bytes,2048 bytes,1024 bytes,512 bytes,256 bytes,128 bytes,64 bytes,32 bytes"
|
|
bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "UOG_USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x04 14. " PS ,Periodic Schedule Status" "Disabled,Enabled"
|
|
eventfld.long 0x04 13. " RCL ,Reclamation" "Not empty,Empty"
|
|
eventfld.long 0x04 12. " HCH ,HCHaIted" "Not halted,Halted"
|
|
textline " "
|
|
eventfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 8. " SLI ,DCSuspend" "Not suspended,Suspended"
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not late,Late"
|
|
textline " "
|
|
eventfld.long 0x04 6. " URI ,USB Reset Received" "No reset,Reset"
|
|
eventfld.long 0x04 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 3. " FRI ,Frame List Rollover" "Not rollover,Rollover"
|
|
eventfld.long 0x04 2. " PCI ,Port Change Detect" "Not changed,Changed"
|
|
eventfld.long 0x04 1. " UEI ,USB Error Interrupt" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "UOG_USBINTR,USB Interrupt Enable"
|
|
bitfld.long 0x08 25. " TIE1 ,GPT Interrupt Enable1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " TIE0 ,GPT Interrupt Enable0" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SLE ,Sleep Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " SRE ,SOF Received Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " URE ,USB Reset Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x0c "UOG_FRINDEX,USB Frame Index Register"
|
|
hexmask.long.word 0x0c 0.--13. 1. " FRINDEX ,Frame Index"
|
|
width 22.
|
|
if ((data.long(ad:0x100241a8)&0x3)==0x3)
|
|
;if for host
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "UOG_PERIODICLISTBASE,Host Controller Frame List Base Address Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " BASEADR ,Base Address (Low)"
|
|
line.long 0x04 "UOG_ASYNCLISTADDR,Host Controller Next Asynch Address Register"
|
|
hexmask.long 0x04 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low"
|
|
;if for device
|
|
elif ((data.long(ad:0x100241a8)&0x3)==0x2)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "UOG_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
hexmask.long.byte 0x00 25.--31. 0x2 " USBADR ,Device Address"
|
|
line.long 0x04 "UOG_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
hexmask.long 0x04 11.--31. 0x800 " EPBASE[31:11] ,Device Controller Endpoint List Address"
|
|
else
|
|
hgroup.long 0x154++0x07
|
|
hide.long 0x00 "UOG_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
hide.long 0x04 "UOG_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
endif
|
|
group.long 0x160++0x07
|
|
line.long 0x00 "UOG_BURSTSIZE,Host Controller Embedded TT Async Buffer Status Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length"
|
|
line.long 0x04 "UOG_TXFILLTUNING,TX FIFO Fill Tuning Register"
|
|
hexmask.long.byte 0x04 16.--21. 1. " TXFIFOTHRES ,FIFO Burst Threshold"
|
|
hexmask.long.byte 0x04 8.--12. 1. " TXSCHEALTH ,Scheduler Health Counter"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead"
|
|
if ((data.long(ad:0x10024170)&0x20000000)==0x20000000)
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "ULPIVIEW,ULPI Viewport Register"
|
|
bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup"
|
|
bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "Not write,Write"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Other,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
else
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "ULPIVIEW,ULPI Viewport Register"
|
|
bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup"
|
|
bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Other,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
endif
|
|
width 13.
|
|
;if for host
|
|
if ((data.long(ad:0x100241a8)&0x3)==0x3)
|
|
group.long 0x184++0x1f
|
|
line.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x04 "UOG_PORTSC2,Port 2 Status and Control Register"
|
|
bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x04 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x04 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x08 "UOG_PORTSC3,Port 3 Status and Control Register"
|
|
bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x08 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x08 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x0c "UOG_PORTSC4,Port 4 Status and Control Register"
|
|
bitfld.long 0x0c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x0c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x0c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x0c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x0c 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x0c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x0c 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x0c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x0c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x10 "UOG_PORTSC5,Port 5 Status and Control Register"
|
|
bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x10 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x10 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x14 "UOG_PORTSC6,Port 6 Status and Control Register"
|
|
bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x14 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x14 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x18 "UOG_PORTSC7,Port 7 Status and Control Register"
|
|
bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x18 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x18 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x18 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x1c "UOG_PORTSC8,Port 8 Status and Control Register"
|
|
bitfld.long 0x1c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x1c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x1c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x1c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x1c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x1c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x1c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x1c 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x1c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x1c 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x1c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x1c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x1c 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x1c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
elif ((data.long(ad:0x100241a8)&0x3)==0x2)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached"
|
|
else
|
|
hgroup.long 0x184++0x03
|
|
hide.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register"
|
|
hide.long 0x04 "UOG_PORTSC2,Port 2 Status and Control Register"
|
|
hide.long 0x08 "UOG_PORTSC3,Port 3 Status and Control Register"
|
|
hide.long 0x0c "UOG_PORTSC4,Port 4 Status and Control Register"
|
|
hide.long 0x10 "UOG_PORTSC5,Port 5 Status and Control Register"
|
|
hide.long 0x14 "UOG_PORTSC6,Port 6 Status and Control Register"
|
|
hide.long 0x18 "UOG_PORTSC7,Port 7 Status and Control Register"
|
|
hide.long 0x1c "UOG_PORTSC8,Port 8 Status and Control Register"
|
|
endif
|
|
group.long 0x1a4++0x0b
|
|
line.long 0x00 "UOG_OTGSC,OTG Status Control Register"
|
|
bitfld.long 0x00 30. " DPIE ,Data Pulse Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " 1MSE ,1 Milisecond Timer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BSEIE ,B Session End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BSVIE ,B Session Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ASVIE ,A Session Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " AVVIE ,A VBus Valid Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IDIE ,USB ID Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. " DPIS ,Data Pulse Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 21. " 1MSS ,1 Milisecond Timer Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 20. " BSEIS ,B Session End Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 19. " BSVIS ,B Session Valid Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ASVIS ,A Session Valid Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 17. " AVVIS ,A VBus Valid Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " IDIS ,USB ID Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " 1MST ,1 Milisecond Timer Toggle" "Not toggled,Toggled"
|
|
bitfld.long 0x00 12. " BSE ,B Session End" "Not ended,Ended"
|
|
bitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8. " ID ,USB ID" "A device,B device"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IDPU ,ID Pullup" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DP ,Data Pulsing" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OT ,OTG Termination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VC ,VBUS Charge" "Not charged,Charged"
|
|
bitfld.long 0x00 0. " VD ,VBUS Discharge" "Not discharged,Discharged"
|
|
line.long 0x04 "UOG_USBMODE,USB Device Mode Register"
|
|
bitfld.long 0x04 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
bitfld.long 0x04 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ES ,Endian Select" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " CM[1:0] ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
width 20.
|
|
line.long 0x08 "UOG_ENDPTSETUPSTAT,Endpoint Setup Status Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " ENDPTSETUPSTAT[15:0] ,Setup Endpoint Status"
|
|
width 18.
|
|
if ((data.long(ad:0x100241a8)&0x3)==0x2)
|
|
;device mode
|
|
group.long 0x1b0++0x07
|
|
line.long 0x00 "UOG_ENDPTPRIME,Endpoint Initialization Register"
|
|
bitfld.long 0x00 31. " PETB15 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 30. " PETB14 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 29. " PETB13 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PETB12 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 27. " PETB11 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 26. " PETB10 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PETB9 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 24. " PETB8 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 23. " PETB7 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PETB6 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 21. " PETB5 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 20. " PETB4 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PETB3 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 18. " PETB2 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 17. " PETB1 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PETB0 ,Prime Endpoint Transmit Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 15. " PERB15 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 14. " PERB14 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PERB13 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 12. " PERB12 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 11. " PERB11 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PERB10 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 9. " PERB9 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 8. " PERB8 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PERB7 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 6. " PERB6 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 5. " PERB5 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PERB4 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 3. " PERB3 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 2. " PERB2 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PERB1 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
bitfld.long 0x00 0. " PERB0 ,Prime Endpoint Receive Buffer" "Not prime,Prime"
|
|
line.long 0x04 "UOG_ENDPTFLUSH,Endpoint De-Initialize Register"
|
|
bitfld.long 0x04 31. " FETB15 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 30. " FETB14 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 29. " FETB13 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 28. " FETB12 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 27. " FETB11 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 26. " FETB10 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " FETB9 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 24. " FETB8 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 23. " FETB7 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " FETB6 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 21. " FETB5 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 20. " FETB4 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FETB3 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 18. " FETB2 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 17. " FETB1 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FETB0 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 15. " FERB15 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 14. " FERB14 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 13. " FERB13 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 12. " FERB12 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 11. " FERB11 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " FERB10 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 9. " FERB9 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 8. " FERB8 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FERB7 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 6. " FERB6 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 5. " FERB5 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FERB4 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 3. " FERB3 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 2. " FERB2 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FERB1 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
bitfld.long 0x04 0. " FERB0 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed"
|
|
rgroup.long 0x1b8++0x03
|
|
line.long 0x00 "UOG_ENDPTSTAT,Endpoint Status Register"
|
|
bitfld.long 0x00 31. " ETBR15 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 30. " ETBR14 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 29. " ETBR13 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ETBR12 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 27. " ETBR11 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 26. " ETBR10 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ETBR9 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 24. " ETBR8 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 23. " ETBR7 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ETBR6 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 21. " ETBR5 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " ETBR4 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ETBR3 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 18. " ETBR2 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " ETBR1 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ETBR0 ,Endpoint Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 15. " ERBR15 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 14. " ERBR14 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERBR13 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 12. " ERBR12 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 11. " ERBR11 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ERBR10 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " ERBR9 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 8. " ERBR8 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ERBR7 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " ERBR6 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 5. " ERBR5 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ERBR4 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " ERBR3 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 2. " ERBR2 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ERBR1 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " ERBR0 ,Endpoint Receive Buffer Ready" "Not ready,Ready"
|
|
group.long 0x1bc++0x03
|
|
line.long 0x00 "UOG_ENDPTCOMPLETE,Endpoint Compete Register"
|
|
bitfld.long 0x00 31. " ETCE15 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " ETCE14 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " ETCE13 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ETCE12 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 27. " ETCE11 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " ETCE10 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ETCE9 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " ETCE8 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 23. " ETCE7 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ETCE6 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " ETCE5 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " ETCE4 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 15. " ERCE15 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " ERCE14 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ERCE13 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ERCE12 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " ERCE11 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ERCE10 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ERCE9 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " ERCE8 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ERCE7 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " ERCE6 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " ERCE5 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ERCE4 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred"
|
|
endif
|
|
width 12.
|
|
group.long 0x1c0++0x3f
|
|
line.long 0x00 "ENDPTCTRL0,Endpoint Control 0 Register"
|
|
bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x4 "ENDPTCTRL1,Endpoint Control 1 Register"
|
|
bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x8 "ENDPTCTRL2,Endpoint Control 2 Register"
|
|
bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0xC "ENDPTCTRL3,Endpoint Control 3 Register"
|
|
bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0xC 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x10 "ENDPTCTRL4,Endpoint Control 4 Register"
|
|
bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x10 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x14 "ENDPTCTRL5,Endpoint Control 5 Register"
|
|
bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x14 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x18 "ENDPTCTRL6,Endpoint Control 6 Register"
|
|
bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x18 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x1C "ENDPTCTRL7,Endpoint Control 7 Register"
|
|
bitfld.long 0x1C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x1C 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x1C 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x1C 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x1C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x1C 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x1C 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x20 "ENDPTCTRL8,Endpoint Control 8 Register"
|
|
bitfld.long 0x20 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x20 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x20 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x20 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x20 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x20 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x20 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x20 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x20 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x24 "ENDPTCTRL9,Endpoint Control 9 Register"
|
|
bitfld.long 0x24 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x24 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x24 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x24 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x24 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x24 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x24 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x24 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x24 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x28 "ENDPTCTRL10,Endpoint Control 10 Register"
|
|
bitfld.long 0x28 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x28 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x28 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x28 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x28 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x28 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x28 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x28 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x28 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x2C "ENDPTCTRL11,Endpoint Control 11 Register"
|
|
bitfld.long 0x2C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x2C 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x2C 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x2C 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x2C 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x2C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x2C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x2C 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x2C 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x30 "ENDPTCTRL12,Endpoint Control 12 Register"
|
|
bitfld.long 0x30 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x30 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x30 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x30 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x30 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x30 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x30 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x30 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x30 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x34 "ENDPTCTRL13,Endpoint Control 13 Register"
|
|
bitfld.long 0x34 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x34 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x34 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x34 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x34 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x34 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x34 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x34 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x34 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x38 "ENDPTCTRL14,Endpoint Control 14 Register"
|
|
bitfld.long 0x38 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x38 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x38 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x38 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x38 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x38 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x38 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x38 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x38 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
line.long 0x3C "ENDPTCTRL15,Endpoint Control 15 Register"
|
|
bitfld.long 0x3C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 22. " TXR ,TX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x3C 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x3C 18.--19. " TXT[1:0] ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x3C 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x3C 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 6. " RXR ,RX Data Toggle Reset" "No effect,Reset"
|
|
bitfld.long 0x3C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 2.--3. " RXT[1:0] ,RX Endpoint Type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x3C 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined"
|
|
bitfld.long 0x3C 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled"
|
|
tree.end
|
|
width 0x0b
|
|
width 16.
|
|
base ad:0x10024200
|
|
tree "Host 1"
|
|
rgroup.long 0x00++0x0b
|
|
line.long 0x00 "UH1_ID,Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core"
|
|
hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]"
|
|
hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number"
|
|
line.long 0x04 "UH1_HWGENERAL,General Hardware Register"
|
|
bitfld.long 0x04 9. " SM ,VUSB_HS_PHY_SERIAL" "0,1"
|
|
bitfld.long 0x04 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x04 4.--5. " PHYW ,VUSB_HS_PHY16_8" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x04 3. " BWT ,Reserved for Internal Testing" "0,1"
|
|
bitfld.long 0x04 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11"
|
|
bitfld.long 0x04 0. " RT ,VUSB_HS_RESET_TYPE" "0,1"
|
|
line.long 0x08 "UH1_HWHOST,Host Hardware Parameters Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS"
|
|
bitfld.long 0x08 1.--3. " NPORT ,VUSB_HS_NUM_PORT-1" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x08 0. " HC ,VUSB_HS_HOST" "0,1"
|
|
rgroup.long 0x10++0x07
|
|
line.long 0x00 "UUH1_HWTXBUF,TX Buffer Hardware Parameters Register"
|
|
bitfld.long 0x00 31. " TXLC ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXCHANADD ,VUSB_HS_TX_CHAN_ADD"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXADD ,VUSB_HS_TX_ADD"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCBURST ,VUSB_HS_TX_BURST"
|
|
line.long 0x04 "UH1_HWRXBUF,RX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXADD ,VUSB_HS_RX_ADD"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXBURST ,VUSB_HS_RX_BURST"
|
|
rgroup.byte 0x100++0x00
|
|
line.byte 0x00 "UH1_CAPLENGTH,EHCI Compliant Register"
|
|
rgroup.word 0x102++0x1
|
|
line.word 0x00 "UH1_HCIVERSION,EHCI Compliant Register"
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UH1_HCSPARAMS,EHCI Compliant With Extensions Register"
|
|
bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16. " PI ,Port Indicators" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " PPC ,Port Power Control" "Not controlled,Controlled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" "Reserved,1,2,3,4,5,6,7,8,?..."
|
|
line.long 0x04 "UH1_HCCPARAMS,EHCI Compliant Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer"
|
|
bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled"
|
|
group.long 0x80++0x0f
|
|
line.long 0x00 "GPTIMER0LD,General Purpose Timer #0 Load Register"
|
|
hexmask.long.tbyte 0x00 0.--24. 1. " H\GPTLD ,General Purpose Timer Load Value"
|
|
line.long 0x04 "GPTIMER0CTRL,General Purpose Timer #0 Controller"
|
|
bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stop,Run"
|
|
bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No action,Load Counter Value"
|
|
bitfld.long 0x04 24. " GPTMOD ,General Purpose Timer Mode" "One Shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
line.long 0x08 "GPTIMER1LD,General Purpose Timer #1 Load Register"
|
|
hexmask.long.tbyte 0x08 0.--24. 1. " H\GPTLD ,General Purpose Timer Load Value"
|
|
line.long 0x0c "GPTIMER1CTRL,General Purpose Timer #1 Controller"
|
|
bitfld.long 0x0c 31. " GPTRUN ,General Purpose Timer Run" "Stop,Run"
|
|
bitfld.long 0x0c 30. " GPTRST ,General Purpose Timer Reset" "No action,Load Counter Value"
|
|
bitfld.long 0x0c 24. " GPTMOD ,General Purpose Timer Mode" "One Shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0c 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
group.long 0x140++0x0f
|
|
line.long 0x00 "UH1_USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard"
|
|
bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enable"
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "4096 bytes,2048 bytes,1024 bytes,512 bytes,256 bytes,128 bytes,64 bytes,32 bytes"
|
|
bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "UH1_USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x04 14. " PS ,Periodic Schedule Status" "Disabled,Enabled"
|
|
eventfld.long 0x04 13. " RCL ,Reclamation" "Not empty,Empty"
|
|
eventfld.long 0x04 12. " HCH ,HCHaIted" "Not halted,Halted"
|
|
textline " "
|
|
eventfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 8. " SLI ,DCSuspend" "Not suspended,Suspended"
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not late,Late"
|
|
textline " "
|
|
eventfld.long 0x04 6. " URI ,USB Reset Received" "No reset,Reset"
|
|
eventfld.long 0x04 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 3. " FRI ,Frame List Rollover" "Not rollover,Rollover"
|
|
eventfld.long 0x04 2. " PCI ,Port Change Detect" "Not changed,Changed"
|
|
eventfld.long 0x04 1. " UEI ,USB Error Interrupt" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "UH1_USBINTR,USB Interrupt Enable"
|
|
bitfld.long 0x08 25. " TIE1 ,GPT Interrupt Enable1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " TIE0 ,GPT Interrupt Enable0" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SLE ,Sleep Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " SRE ,SOF Received Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " URE ,USB Reset Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x0c "UH1_FRINDEX,USB Frame Index Register"
|
|
hexmask.long.word 0x0c 0.--13. 1. " FRINDEX ,Frame Index"
|
|
width 22.
|
|
if ((data.long(ad:0x100243a8)&0x3)==0x3)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "UH1_PERIODICLISTBASE,Host Controller Frame List Base Address Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " BASEADR ,Base Address (Low)"
|
|
line.long 0x04 "UH1_ASYNCLISTADDR,Host Controller Next Asynch Address Register"
|
|
hexmask.long 0x04 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low"
|
|
elif ((data.long(ad:0x100243a8)&0x3)==0x2)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "UH1_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
hexmask.long.byte 0x00 25.--31. 0x2 " USBADR ,Device Address"
|
|
line.long 0x04 "UH1_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
hexmask.long 0x04 11.--31. 0x800 " EPBASE[31:11] ,Device Controller Endpoint List Address"
|
|
else
|
|
hgroup.long 0x154++0x07
|
|
hide.long 0x00 "UH1_PERIODICLISTBASE,Host Controller Frame List Base Address Register"
|
|
hide.long 0x04 "UH1_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
endif
|
|
group.long 0x160++0x07
|
|
line.long 0x00 "UH1_BURSTSIZE,Host Controller Embedded TT Async Buffer Status Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length"
|
|
line.long 0x04 "UH1_TXFILLTUNING,TX FIFO Fill Tuning Register"
|
|
hexmask.long.byte 0x04 16.--21. 1. " TXFIFOTHRES ,FIFO Burst Threshold"
|
|
hexmask.long.byte 0x04 8.--12. 1. " TXSCHEALTH ,Scheduler Health"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead"
|
|
width 13.
|
|
;if for host
|
|
if ((data.long(ad:0x100243a8)&0x3)==0x3)
|
|
group.long 0x184++0x1f
|
|
line.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x04 "UH1_PORTSC2,Port 2 Status and Control Register"
|
|
bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x04 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x04 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x08 "UH1_PORTSC3,Port 3 Status and Control Register"
|
|
bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x08 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x08 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x0c "UH1_PORTSC4,Port 4 Status and Control Register"
|
|
bitfld.long 0x0c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x0c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x0c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x0c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x0c 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x0c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x0c 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x0c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x0c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x10 "UH1_PORTSC5,Port 5 Status and Control Register"
|
|
bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x10 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x10 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x14 "UH1_PORTSC6,Port 6 Status and Control Register"
|
|
bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x14 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x14 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x18 "UH1_PORTSC7,Port 7 Status and Control Register"
|
|
bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x18 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x18 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x18 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x1c "UH1_PORTSC8,Port 8 Status and Control Register"
|
|
bitfld.long 0x1c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x1c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x1c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x1c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x1c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x1c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x1c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x1c 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x1c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x1c 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x1c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x1c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x1c 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x1c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
elif ((data.long(ad:0x100243a8)&0x3)==0x2)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached"
|
|
else
|
|
hgroup.long 0x184++0x03
|
|
hide.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register"
|
|
hide.long 0x04 "UH1_PORTSC2,Port 2 Status and Control Register"
|
|
hide.long 0x08 "UH1_PORTSC3,Port 3 Status and Control Register"
|
|
hide.long 0x0c "UH1_PORTSC4,Port 4 Status and Control Register"
|
|
hide.long 0x10 "UH1_PORTSC5,Port 5 Status and Control Register"
|
|
hide.long 0x14 "UH1_PORTSC6,Port 6 Status and Control Register"
|
|
hide.long 0x18 "UH1_PORTSC7,Port 7 Status and Control Register"
|
|
hide.long 0x1c "UH1_PORTSC8,Port 8 Status and Control Register"
|
|
endif
|
|
group.long 0x1a8++0x03
|
|
line.long 0x00 "UH1_USBMODE,USB Device Mode Register"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
tree.end
|
|
width 22.
|
|
base ad:0x10024400
|
|
tree "Host 2"
|
|
width 16.
|
|
rgroup.long 0x00++0x0b
|
|
line.long 0x00 "UH2_ID,Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core"
|
|
hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]"
|
|
hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number"
|
|
line.long 0x04 "UH2_HWGENERAL,General Hardware Register"
|
|
bitfld.long 0x04 9. " SM ,VUSB_HS_PHY_SERIAL" "0,1"
|
|
bitfld.long 0x04 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x04 4.--5. " PHYW ,VUSB_HS_PHY16_8" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x04 3. " BWT ,Reserved for Internal Testing" "0,1"
|
|
bitfld.long 0x04 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11"
|
|
bitfld.long 0x04 0. " RT ,VUSB_HS_RESET_TYPE" "0,1"
|
|
line.long 0x08 "UH2_HWHOST,Host Hardware Parameters Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS"
|
|
bitfld.long 0x08 1.--3. " NPORT ,VUSB_HS_NUM_PORT-1" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
bitfld.long 0x08 0. " HC ,VUSB_HS_HOST" "0,1"
|
|
rgroup.long 0x10++0x07
|
|
line.long 0x00 "UH2_HWTXBUF,TX Buffer Hardware Parameters Register"
|
|
bitfld.long 0x00 31. " TXLC ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXCHANADD ,VUSB_HS_TX_CHAN_ADD"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXADD ,VUSB_HS_TX_ADD"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCBURST ,VUSB_HS_TX_BURST"
|
|
line.long 0x04 "UH2_HWRXBUF,RX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXADD ,VUSB_HS_RX_ADD"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXBURST ,VUSB_HS_RX_BURST"
|
|
rgroup.byte 0x100++0x00
|
|
line.byte 0x00 "UH2_CAPLENGTH,EHCI Compliant Register"
|
|
rgroup.word 0x102++0x01
|
|
line.word 0x00 "UH2_HCIVERSION,EHCI Compliant Register"
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UH2_HCSPARAMS,EHCI Compliant With Extensions Register"
|
|
bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16. " PI ,Port Indicators" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " PPC ,Port Power Control" "Not controlled,Controlled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" "Reserved,1,2,3,4,5,6,7,8,?..."
|
|
line.long 0x04 "UH2_HCCPARAMS,EHCI Compliant Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer"
|
|
bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled"
|
|
group.long 0x80++0x0f
|
|
line.long 0x00 "GPTIMER0LD,General Purpose Timer #0 Load Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " H\GPTLD ,General Purpose Timer Load Value"
|
|
line.long 0x04 "GPTIMER0CTRL,General Purpose Timer #0 Controller"
|
|
bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stop,Run"
|
|
bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No action,Load Counter Value"
|
|
bitfld.long 0x04 24. " GPTMOD ,General Purpose Timer Mode" "One Shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
line.long 0x08 "GPTIMER1LD,General Purpose Timer #1 Load Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " H\GPTLD ,General Purpose Timer Load Value"
|
|
line.long 0x0c "GPTIMER1CTRL,General Purpose Timer #1 Controller"
|
|
bitfld.long 0x0c 31. " GPTRUN ,General Purpose Timer Run" "Stop,Run"
|
|
bitfld.long 0x0c 30. " GPTRST ,General Purpose Timer Reset" "No action,Load Counter Value"
|
|
bitfld.long 0x0c 24. " GPTMOD ,General Purpose Timer Mode" "One Shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0c 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
group.long 0x140++0x0f
|
|
line.long 0x00 "UH2_USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard"
|
|
bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enable"
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "4096 bytes,2048 bytes,1024 bytes,512 bytes,256 bytes,128 bytes,64 bytes,32 bytes"
|
|
bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "UH2_USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x04 14. " PS ,Periodic Schedule Status" "Disabled,Enabled"
|
|
eventfld.long 0x04 13. " RCL ,Reclamation" "Not empty,Empty"
|
|
eventfld.long 0x04 12. " HCH ,HCHaIted" "Not halted,Halted"
|
|
textline " "
|
|
eventfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 8. " SLI ,DCSuspend" "Not suspended,Suspended"
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not late,Late"
|
|
textline " "
|
|
eventfld.long 0x04 6. " URI ,USB Reset Received" "No reset,Reset"
|
|
eventfld.long 0x04 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested"
|
|
eventfld.long 0x04 4. " SEI ,System Error (Reserved))" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x04 3. " FRI ,Frame List Rollover" "Not rollover,Rollover"
|
|
eventfld.long 0x04 2. " PCI ,Port Change Detect" "Not changed,Changed"
|
|
eventfld.long 0x04 1. " UEI ,USB Error Interrupt" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "UH1_USBINTR,USB Interrupt Enable"
|
|
bitfld.long 0x08 25. " TIE1 ,GPT Interrupt Enable1" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " TIE0 ,GPT Interrupt Enable0" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SLE ,Sleep Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " SRE ,SOF Received Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " URE ,USB Reset Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x0c "UH2_FRINDEX,USB Frame Index Register"
|
|
hexmask.long.word 0x0c 0.--13. 1. " FRINDEX ,Frame Index"
|
|
width 22.
|
|
if ((data.long(ad:0x100245a8)&0x3)==0x3)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "UH2_PERIODICLISTBASE,Host Controller Frame List Base Address Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " BASEADR ,Base Address (Low)"
|
|
line.long 0x04 "UH2_ASYNCLISTADDR,Host Controller Next Asynch Address Register"
|
|
hexmask.long 0x04 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low"
|
|
;if for device
|
|
elif ((data.long(ad:0x100245a8)&0x3)==0x2)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "UH2_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
hexmask.long.byte 0x00 25.--31. 0x2 " USBADR ,Device Address"
|
|
line.long 0x04 "UH2_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
hexmask.long 0x04 11.--31. 0x800 " EPBASE[31:11] ,Device Controller Endpoint List Address"
|
|
else
|
|
hgroup.long 0x154++0x07
|
|
hide.long 0x00 "UH2_PERIODICLISTBASE,Device Controller USB Device Address Register"
|
|
hide.long 0x04 "UH2_ASYNCLISTADDR,Device Controller Endpoint List Address Register"
|
|
endif
|
|
group.long 0x160++0x07
|
|
line.long 0x00 "UH2_BURSTSIZE,Host Controller Embedded TT Async Buffer Status Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length"
|
|
line.long 0x04 "UH2_TXFILLTUNING,TX FIFO Fill Tuning Register"
|
|
hexmask.long.byte 0x04 16.--21. 1. " TXFIFOTHRES ,FIFO Burst Threshold"
|
|
hexmask.long.byte 0x04 8.--12. 1. " TXSCHEALTH ,Scheduler Health Counter"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead"
|
|
width 13.
|
|
if ((data.long(ad:0x10024570)&0x20000000)==0x20000000)
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "ULPIVIEW,ULPI Vieport Register"
|
|
bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "Not write ,Write "
|
|
bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal"
|
|
bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
else
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "ULPIVIEW,ULPI Vieport Register"
|
|
bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "Not read,Read "
|
|
bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal"
|
|
bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
endif
|
|
;if for host
|
|
if ((data.long(ad:0x100245a8)&0x3)==0x3)
|
|
group.long 0x184++0x1f
|
|
line.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x04 "UH2_PORTSC2,Port 2 Status and Control Register"
|
|
bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x04 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x04 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x08 "UH2_PORTSC3,Port 3 Status and Control Register"
|
|
bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x08 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x08 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x0c "UH2_PORTSC4,Port 4 Status and Control Register"
|
|
bitfld.long 0x0c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x0c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x0c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x0c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x0c 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x0c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x0c 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x0c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x0c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x0c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x10 "UH2_PORTSC5,Port 5 Status and Control Register"
|
|
bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x10 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x10 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x14 "UH2_PORTSC6,Port 6 Status and Control Register"
|
|
bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x14 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x14 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x18 "UH2_PORTSC7,Port 7 Status and Control Register"
|
|
bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x18 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x18 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x18 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device"
|
|
line.long 0x1c "UH2_PORTSC8,Port 8 Status and Control Register"
|
|
bitfld.long 0x1c 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial/1.1 PHY"
|
|
bitfld.long 0x1c 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x1c 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x1c 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x1c 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x1c 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x1c 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1c 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x1c 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x1c 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1c 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x1c 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " HSP ,High-Speed Port" "No high-speed,High-speed"
|
|
bitfld.long 0x1c 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x1c 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x1c 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x1c 5. " OCC ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 4. " OCA ,Over-current Active" "No over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x1c 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x1c 0. " CCS ,Current Connect Status" "No device,Device"
|
|
elif ((data.long(ad:0x100243a8)&0x3)==0x2)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register"
|
|
bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,Reserved,ULPI,Serial"
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit"
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined"
|
|
bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available"
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed"
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OCO ,Over-current Change" "Not changed,Changed"
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current ,Over-current"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached"
|
|
else
|
|
hgroup.long 0x184++0x03
|
|
hide.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register"
|
|
hide.long 0x04 "UH2_PORTSC2,Port 2 Status and Control Register"
|
|
hide.long 0x08 "UH2_PORTSC3,Port 3 Status and Control Register"
|
|
hide.long 0x0c "UH2_PORTSC4,Port 4 Status and Control Register"
|
|
hide.long 0x10 "UH2_PORTSC5,Port 5 Status and Control Register"
|
|
hide.long 0x14 "UH2_PORTSC6,Port 6 Status and Control Register"
|
|
hide.long 0x18 "UH2_PORTSC7,Port 7 Status and Control Register"
|
|
hide.long 0x1c "UH2_PORTSC8,Port 8 Status and Control Register"
|
|
endif
|
|
group.long 0x1a8++0x03
|
|
line.long 0x00 "UH2_USBMODE,USB Device Mode Register"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "GPT (General Purpose Timer)"
|
|
tree "GPT 1"
|
|
base ad:0x10003000
|
|
width 0x8
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "TCTL1,GPT Control Register 1"
|
|
bitfld.long 0x00 15. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 10. " CC ,Counter Clear" "Halted,Reset"
|
|
bitfld.long 0x00 9. " OM ,Output Mode" "Low pulse,Toggle output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRR ,Free-Run / Restart" "Restart,Free-run"
|
|
bitfld.long 0x00 6.--7. " CAP ,Capture Edge" "Disabled,Rising,Falling,Rising or falling"
|
|
bitfld.long 0x00 5. " CAPTEN ,Capture Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COMPEN ,Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--3. " CLKSOURCE ,Clock Source" "Stop count,PERCLK1,PERCLK1 div by 4,TIN,32kHz clock,32kHz clock,32kHz clock,32kHz clock"
|
|
bitfld.long 0x00 0. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TPRER1,GPT Prescaler Register 1"
|
|
hexmask.long.word 0x04 0.--10. 1. " PRESCALER ,Counter Clock Prescaler"
|
|
line.long 0x08 "TCMP1,GPT Compare Register 1"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "TCR1,GPT Capture Register 1"
|
|
line.long 0x04 "TCN1,GPT Counter Register 1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TSTAT1,GPT Status Register 1"
|
|
eventfld.long 0x00 1. " CAPT ,Capture Event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " COMP ,Compare Event" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "GPT 2"
|
|
base ad:0x10004000
|
|
width 0x8
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "TCTL2,GPT Control Register 2"
|
|
bitfld.long 0x00 15. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 10. " CC ,Counter Clear" "Halted,Reset"
|
|
bitfld.long 0x00 9. " OM ,Output Mode" "Low pulse,Toggle output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRR ,Free-Run / Restart" "Restart,Free-run"
|
|
bitfld.long 0x00 6.--7. " CAP ,Capture Edge" "Disabled,Rising,Falling,Rising or falling"
|
|
bitfld.long 0x00 5. " CAPTEN ,Capture Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COMPEN ,Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--3. " CLKSOURCE ,Clock Source" "Stop count,PERCLK1,PERCLK1 div by 4,TIN,32kHz clock,32kHz clock,32kHz clock,32kHz clock"
|
|
bitfld.long 0x00 0. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TPRER2,GPT Prescaler Register 2"
|
|
hexmask.long.word 0x04 0.--10. 1. " PRESCALER ,Counter Clock Prescaler"
|
|
line.long 0x08 "TCMP2,GPT Compare Register 2"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "TCR2,GPT Capture Register 2"
|
|
line.long 0x04 "TCN2,GPT Counter Register 2"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TSTAT2,GPT Status Register 2"
|
|
eventfld.long 0x00 1. " CAPT ,Capture Event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " COMP ,Compare Event" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "GPT 3"
|
|
base ad:0x10005000
|
|
width 0x8
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "TCTL3,GPT Control Register 3"
|
|
bitfld.long 0x00 15. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 10. " CC ,Counter Clear" "Halted,Reset"
|
|
bitfld.long 0x00 9. " OM ,Output Mode" "Low pulse,Toggle output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRR ,Free-Run / Restart" "Restart,Free-run"
|
|
bitfld.long 0x00 6.--7. " CAP ,Capture Edge" "Disabled,Rising,Falling,Rising or falling"
|
|
bitfld.long 0x00 5. " CAPTEN ,Capture Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COMPEN ,Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--3. " CLKSOURCE ,Clock Source" "Stop count,PERCLK1,PERCLK1 div by 4,TIN,32kHz clock,32kHz clock,32kHz clock,32kHz clock"
|
|
bitfld.long 0x00 0. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TPRER3,GPT Prescaler Register 3"
|
|
hexmask.long.word 0x04 0.--10. 1. " PRESCALER ,Counter Clock Prescaler"
|
|
line.long 0x08 "TCMP3,GPT Compare Register 3"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "TCR3,GPT Capture Register 3"
|
|
line.long 0x04 "TCN3,GPT Counter Register 3"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TSTAT3,GPT Status Register 3"
|
|
eventfld.long 0x00 1. " CAPT ,Capture Event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " COMP ,Compare Event" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "GPT 4"
|
|
base ad:0x10019000
|
|
width 0x8
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "TCTL4,GPT Control Register 4"
|
|
bitfld.long 0x00 15. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 10. " CC ,Counter Clear" "Halted,Reset"
|
|
bitfld.long 0x00 9. " OM ,Output Mode" "Low pulse,Toggle output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRR ,Free-Run / Restart" "Restart,Free-run"
|
|
bitfld.long 0x00 6.--7. " CAP ,Capture Edge" "Disabled,Rising,Falling,Rising or falling"
|
|
bitfld.long 0x00 5. " CAPTEN ,Capture Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COMPEN ,Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--3. " CLKSOURCE ,Clock Source" "Stop count,PERCLK1,PERCLK1 div by 4,TIN,32kHz clock,32kHz clock,32kHz clock,32kHz clock"
|
|
bitfld.long 0x00 0. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TPRER4,GPT Prescaler Register 4"
|
|
hexmask.long.word 0x04 0.--10. 1. " PRESCALER ,Counter Clock Prescaler"
|
|
line.long 0x08 "TCMP4,GPT Compare Register 4"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "TCR4,GPT Capture Register 4"
|
|
line.long 0x04 "TCN4,GPT Counter Register 4"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TSTAT4,GPT Status Register 4"
|
|
eventfld.long 0x00 1. " CAPT ,Capture Event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " COMP ,Compare Event" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "GPT 5"
|
|
base ad:0x1001a000
|
|
width 0x8
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "TCTL5,GPT Control Register 5"
|
|
bitfld.long 0x00 15. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 10. " CC ,Counter Clear" "Halted,Reset"
|
|
bitfld.long 0x00 9. " OM ,Output Mode" "Low pulse,Toggle output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRR ,Free-Run / Restart" "Restart,Free-run"
|
|
bitfld.long 0x00 6.--7. " CAP ,Capture Edge" "Disabled,Rising,Falling,Rising or falling"
|
|
bitfld.long 0x00 5. " CAPTEN ,Capture Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COMPEN ,Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--3. " CLKSOURCE ,Clock Source" "Stop count,PERCLK1,PERCLK1 div by 4,TIN,32kHz clock,32kHz clock,32kHz clock,32kHz clock"
|
|
bitfld.long 0x00 0. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TPRER5,GPT Prescaler Register 5"
|
|
hexmask.long.word 0x04 0.--10. 1. " PRESCALER ,Counter Clock Prescaler"
|
|
line.long 0x08 "TCMP5,GPT Compare Register 5"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "TCR5,GPT Capture Register 5"
|
|
line.long 0x04 "TCN5,GPT Counter Register 5"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TSTAT5,GPT Status Register 5"
|
|
eventfld.long 0x00 1. " CAPT ,Capture Event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " COMP ,Compare Event" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "GPT 6"
|
|
base ad:0x1001f000
|
|
width 0x8
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "TCTL6,GPT Control Register 6"
|
|
bitfld.long 0x00 15. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 10. " CC ,Counter Clear" "Halted,Reset"
|
|
bitfld.long 0x00 9. " OM ,Output Mode" "Low pulse,Toggle output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRR ,Free-Run / Restart" "Restart,Free-run"
|
|
bitfld.long 0x00 6.--7. " CAP ,Capture Edge" "Disabled,Rising,Falling,Rising or falling"
|
|
bitfld.long 0x00 5. " CAPTEN ,Capture Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COMPEN ,Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--3. " CLKSOURCE ,Clock Source" "Stop count,PERCLK1,PERCLK1 div by 4,TIN,32kHz clock,32kHz clock,32kHz clock,32kHz clock"
|
|
bitfld.long 0x00 0. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TPRER6,GPT Prescaler Register 6"
|
|
hexmask.long.word 0x04 0.--10. 1. " PRESCALER ,Counter Clock Prescaler"
|
|
line.long 0x08 "TCMP6,GPT Compare Register 6"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "TCR6,GPT Capture Register 6"
|
|
line.long 0x04 "TCN6,GPT Counter Register 6"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TSTAT6,GPT Status Register 6"
|
|
eventfld.long 0x00 1. " CAPT ,Capture Event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " COMP ,Compare Event" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "PWM (Pulse-Width Modulator)"
|
|
base ad:0x10006000
|
|
width 8.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "PWMCR,PWM Control Register"
|
|
bitfld.long 0x00 26.--27. " FWM ,FIFO Water Mark" ">= 1,>= 2,>= 3,>= 4"
|
|
bitfld.long 0x00 25. " STOPEN ,Sleep Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DOZEN ,Doze Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " WAITEN ,Wait Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " DBGEN ,Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " BCTR ,Byte Data Swap Control" "Normal,Reversed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " HCTR ,Half-Word Data Swap Control" "Not swapped,Swapped"
|
|
bitfld.long 0x00 18.--19. " POUTC ,PWM Output Configuration" "Output set,Output cleared,Disconnected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " CLKSRC ,Select Clock Source" "Disabled,ipg_clk,ipg_clk_highfreq,ipg_clk_32k"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. 1. " PRESCALER ,Counter Clock Prescaler Value"
|
|
bitfld.long 0x00 3. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1.--2. " REPEAT ,Sample Repeat" "Once,Twice,Four times,Eight times"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,PWM Enable" "Disabled,Enabled"
|
|
line.long 0x04 "PWMSR,PWM Status Register"
|
|
eventfld.long 0x04 6. " FWE ,FIFO Write Error Status" "No error,Error"
|
|
eventfld.long 0x04 5. " CMP ,Compare Status" "Not occurred,Occurred"
|
|
eventfld.long 0x04 4. " ROV ,Roll-Over Status" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x04 3. " FE ,FIFO Empty Status Bit" "Above,Below"
|
|
bitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "Not available,1 word,2 words,3 words,4 words,?..."
|
|
line.long 0x08 "PWMIR,PWM Interrupt Register"
|
|
bitfld.long 0x08 2. " CIE ,Compare Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RIE ,Roll-Over Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " FIE ,FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x0c "PWMSAR,PWM Sample Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SAMPLE ,Sample Value"
|
|
line.long 0x10 "PWMPR,PWM Period Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " PERIOD ,Period Value"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "PWMCNR,PWM Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "RTC (Real Time Clock)"
|
|
base ad:0x10007000
|
|
width 10.
|
|
group.long 0x00++0x27
|
|
line.long 0x00 "HOURMIN,RTC Hours And Minutes Counter Register"
|
|
bitfld.long 0x00 8.--12. " HOUR ,Hours Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--5. " MINUTES ,Minutes Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
line.long 0x04 "SECONDS,RTC Seconds Counter Register"
|
|
bitfld.long 0x04 0.--5. " SECONDS ,Seconds Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
line.long 0x08 "ALRM_HM,RTC Hours And Minutes Alarm Register"
|
|
bitfld.long 0x08 8.--12. " HOUR ,Hours Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
bitfld.long 0x08 0.--5. " MINUTES ,Minutes Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
line.long 0x0c "ALRM_SEC,RTC Seconds Alarm Register"
|
|
bitfld.long 0x0c 0.--5. " SECONDS ,Seconds Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
line.long 0x10 "RTCCTL,RTC Control Register"
|
|
bitfld.long 0x10 7. " EN ,Enables/Disables The Real-Time Clock" "Disabled,Enabled"
|
|
bitfld.long 0x10 5.--6. " XTL ,Crystal Selection" "32.768 kHz,32 kHz,38.4 kHz,32.768 kHz"
|
|
bitfld.long 0x10 1. " GEN ,IPG_CLK Gating Enable" "Enabled,Disabled"
|
|
bitfld.long 0x10 0. " SWR ,Software Reset" "No effect,Reset"
|
|
line.long 0x14 "RTCISR,RTC Interrupt Status Register"
|
|
bitfld.long 0x14 15. " SAM7 ,Sampling Timer Interrupt Flag At SAM7 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 14. " SAM6 ,Sampling Timer Interrupt Flag At SAM6 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 13. " SAM5 ,Sampling Timer Interrupt Flag At SAM5 Frequency" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 12. " SAM4 ,Sampling Timer Interrupt Flag At SAM4 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 11. " SAM3 ,Sampling Timer Interrupt Flag At SAM3 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 10. " SAM2 ,Sampling Timer Interrupt Flag At SAM2 frequency" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 9. " SAM1 ,Sampling Timer Interrupt Flag At SAM1 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 8. " SAM0 ,Sampling Timer Interrupt Flag At SAM0 Frequency" "Not occurred,Occurred"
|
|
bitfld.long 0x14 7. " 2HZ ,2 Hz Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 5. " HR ,Hour Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 4. " 1HZ ,1 Hz Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 3. " DAY ,Day Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 2. " ALM ,Alarm Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 1. " MIN ,Minute Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x14 0. " SW ,Stopwatch Flag" "Not time out,Timed out"
|
|
line.long 0x18 "RTCIENR,RTC Interrupt Enable Register"
|
|
bitfld.long 0x18 15. " SAM7 ,SAM7 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " SAM6 ,SAM6 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 13. " SAM5 ,SAM5 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 12. " SAM4 ,SAM4 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " SAM3 ,SAM3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 10. " SAM2 ,SAM2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 9. " SAM1 ,SAM1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " SAM0 ,SAM0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " 2HZ ,2HZ Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 5. " HR ,Hour Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " 1HZ ,1HZ Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " DAY ,DAY Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " ALM ,Alarm Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " MIN ,Minute Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " SW ,Stopwatch Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x1c "STPWCH,RTC Stopwatch Minutes Register"
|
|
bitfld.long 0x1c 0.--5. " CNT ,Stopwatch Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x20 "DAYR,RTC Days Counter Register"
|
|
hexmask.long.word 0x20 0.--15. 1. " DAYS ,Day Setting"
|
|
line.long 0x24 "DAYALARM,RTC Day Alarm Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " DAYSAL ,Day Setting Of The Alarm"
|
|
width 0xb
|
|
tree.end
|
|
tree "WDOG (Watchdog Timer)"
|
|
base ad:0x10002000
|
|
width 0x6
|
|
group.word 0x00++0x03
|
|
line.word 0x00 "WCR,Watchdog Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " WT ,Watchdog Time-Out Field"
|
|
bitfld.word 0x00 5. " WDA ,/Watchdog Assertion" "Asserted ,No effect"
|
|
bitfld.word 0x00 4. " SRS ,Software Reset Signal" "Reset,No effect"
|
|
bitfld.word 0x00 3. " WRE ,/WDOG Or /WDOG_RESET Enable" "Reset,/WDOG"
|
|
textline " "
|
|
bitfld.word 0x00 2. " WDE ,Watchdog Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " WDBG ,Watchdog DEBUG Enable" "Normal,Suspended"
|
|
bitfld.word 0x00 0. " WDZST ,Watchdog Low Power" "Normal,Suspended"
|
|
line.word 0x02 "WSR,Watchdog Service Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "WRSR,Watchdog Reset Status Register"
|
|
bitfld.word 0x00 4. " PWR ,Power-On Reset" "Not power-on reset,Power-on reset"
|
|
bitfld.word 0x00 3. " EXT ,External Reset" "Not external reset,External reset"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TOUT ,Time-Out" "Not WDOG time-out reset,WDOG time-out reset"
|
|
bitfld.word 0x00 0. " SFTW ,Software Reset" "Not software reset,Software reset"
|
|
width 0x16
|
|
tree.end
|
|
tree.open "AIPI (AHB-Lite IP Interface)"
|
|
tree "AIPI1"
|
|
base ad:0x10000000
|
|
width 6.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "PSR0,Peripheral Size Register 0"
|
|
bitfld.long 0x00 31. " GPT6S0 ,IP Bus GPT6 Size 0" "0,1"
|
|
bitfld.long 0x00 30. " SDHC3S0 ,IP Bus SDHC3 Size 0" "0,1"
|
|
bitfld.long 0x00 29. " I2C2S0 ,IP Bus I2C2 Size 0" "0,1"
|
|
bitfld.long 0x00 28. " UART6S0 ,IP Bus UART6 Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " UART5S0 ,IP Bus UART5 Size 0" "0,1"
|
|
bitfld.long 0x00 26. " GPT5S0 ,IP Bus GPT5 Size 0" "0,1"
|
|
bitfld.long 0x00 25. " GPT4S0 ,IP Bus MSHC Size 0" "0,1"
|
|
bitfld.long 0x00 24. " MSHCS0 ,IP Bus CSPI3 Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CSPI3S0 ,IP Bus CSPI3 Size 0" "0,1"
|
|
bitfld.long 0x00 22. " AUDMUXS0 ,IP Bus AUDMUX Size 0" "0,1"
|
|
bitfld.long 0x00 21. " GPIOS0 ,IP Bus GPIO Size 0" "0,1"
|
|
bitfld.long 0x00 20. " SDHC2S0 ,IP Bus SDHC2 Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SDHC1S0 ,IP Bus SDHC1 Size 0" "0,1"
|
|
bitfld.long 0x00 18. " I2CS0 ,IP Bus I2C Size 0" "0,1"
|
|
bitfld.long 0x00 17. " SSI2S0 ,IP Bus SSI2 Size 0" "0,1"
|
|
bitfld.long 0x00 16. " SSI1S0 ,IP Bus SSI1 Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CSPI2S0 ,IP Bus CSPI2 Size 0" "0,1"
|
|
bitfld.long 0x00 14. " CSPI1S0 ,IP Bus CSPI1 Size 0" "0,1"
|
|
bitfld.long 0x00 13. " UART4S0 ,IP Bus UART4 Size 0" "0,1"
|
|
bitfld.long 0x00 12. " UART3S0 ,IP Bus UART3 Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " UART2S0 ,IP Bus UART2 Size 0" "0,1"
|
|
bitfld.long 0x00 10. " UART1S0 ,IP Bus UART1 Size 0" "0,1"
|
|
bitfld.long 0x00 9. " OWIRES0 ,IP Bus OWIRE Size 0" "0,1"
|
|
bitfld.long 0x00 8. " KPPS0 ,IP Bus KPP Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RTCS0 ,IP Bus RTC Size 0" "0,1"
|
|
bitfld.long 0x00 6. " PWMS0 ,IP Bus PWM Size 0" "0,1"
|
|
bitfld.long 0x00 5. " GPT3S0 ,IP Bus GPT3 Size 0" "0,1"
|
|
bitfld.long 0x00 4. " GPT2S0 ,IP Bus GPT2 Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPT1S0 ,IP Bus GPT1 Size 0" "0,1"
|
|
bitfld.long 0x00 2. " WDOGS0 ,IP Bus WDOG Size 0" "0,1"
|
|
bitfld.long 0x00 1. " DMAS0 ,IP Bus DMA Size 0" "0,1"
|
|
bitfld.long 0x00 0. " AIPI1CS0 ,AIPI1 Control" "0,1"
|
|
line.long 0x04 "PSR1,Peripheral Size Register 1"
|
|
bitfld.long 0x04 31. " GPT6S1 ,IP Bus GPT6 Size 1" "0,1"
|
|
bitfld.long 0x04 30. " SDHC3S1 ,IP Bus SDHC3 Size 1" "0,1"
|
|
bitfld.long 0x04 29. " I2C2S1 ,IP Bus I2C2 Size 1" "0,1"
|
|
bitfld.long 0x04 28. " UART6S1 ,IP Bus UART6 Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " UART5S1 ,IP Bus UART5 Size 1" "0,1"
|
|
bitfld.long 0x04 26. " GPT5S1 ,IP Bus GPT5 Size 1" "0,1"
|
|
bitfld.long 0x04 25. " GPT4S1 ,IP Bus MSHC Size 1" "0,1"
|
|
bitfld.long 0x04 24. " MSHCS1 ,IP Bus CSPI3 Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 23. " CSPI3S1 ,IP Bus CSPI3 Size 1" "0,1"
|
|
bitfld.long 0x04 22. " AUDMUXS1 ,IP Bus AUDMUX Size 1" "0,1"
|
|
bitfld.long 0x04 21. " GPIOS1 ,IP Bus GPIO Size 1" "0,1"
|
|
bitfld.long 0x04 20. " SDHC2S1 ,IP Bus SDHC2 Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SDHC1S1 ,IP Bus SDHC1 Size 1" "0,1"
|
|
bitfld.long 0x04 18. " I2CS1 ,IP Bus I2C Size 1" "0,1"
|
|
bitfld.long 0x04 17. " SSI2S1 ,IP Bus SSI2 Size 1" "0,1"
|
|
bitfld.long 0x04 16. " SSI1S1 ,IP Bus SSI1 Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CSPI2S1 ,IP Bus CSPI2 Size 1" "0,1"
|
|
bitfld.long 0x04 14. " CSPI1S1 ,IP Bus CSPI1 Size 1" "0,1"
|
|
bitfld.long 0x04 13. " UART4S1 ,IP Bus UART4 Size 1" "0,1"
|
|
bitfld.long 0x04 12. " UART3S1 ,IP Bus UART3 Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 11. " UART2S1 ,IP Bus UART2 Size 1" "0,1"
|
|
bitfld.long 0x04 10. " UART1S1 ,IP Bus UART1 Size 1" "0,1"
|
|
bitfld.long 0x04 9. " OWIRES1 ,IP Bus OWIRE Size 1" "0,1"
|
|
bitfld.long 0x04 8. " KPPS1 ,IP Bus KPP Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RTCS1 ,IP Bus RTC Size 1" "0,1"
|
|
bitfld.long 0x04 6. " PWMS1 ,IP Bus PWM Size 1" "0,1"
|
|
bitfld.long 0x04 5. " GPT3S1 ,IP Bus GPT3 Size 1" "0,1"
|
|
bitfld.long 0x04 4. " GPT2S1 ,IP Bus GPT2 Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPT1S1 ,IP Bus GPT1 Size 1" "0,1"
|
|
bitfld.long 0x04 2. " WDOGS1 ,IP Bus WDOG Size 1" "0,1"
|
|
bitfld.long 0x04 1. " DMAS1 ,IP Bus DMA Size 1" "0,1"
|
|
bitfld.long 0x04 0. " AIPI1CS1 ,AIPI1 Control" "0,1"
|
|
line.long 0x08 "PAR,Peripheral Access Register"
|
|
bitfld.long 0x08 31. " GPT6 ,GPT6 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 30. " SDHC3 ,SDHC3 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 29. " I2C2 ,I2C2 Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 28. " UART6 ,UART6 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 27. " UART5 ,UART5 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 26. " GPT5 ,GPT5 Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 25. " GPT4 ,MSHC Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 24. " MSHC ,CSPI3 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 23. " CSPI3 ,CSPI3 Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 22. " AUDMUX ,AUDMUX Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 21. " GPIO ,GPIO Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 20. " SDHC2 ,SDHC2 Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SDHC1 ,SDHC1 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 18. " I2C ,I2C Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 17. " SSI2 ,SSI2 Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SSI1 ,SSI1 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 15. " CSPI2 ,CSPI2 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 14. " CSPI1 ,CSPI1 Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 13. " UART4 ,UART4 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 12. " UART3 ,UART3 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 11. " UART2 ,UART2 Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 10. " UART1 ,UART1 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 9. " OWIRE ,OWIRE Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 8. " KPP ,KPP Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 7. " RTC ,RTC Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 6. " PWM ,PWM Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 5. " GPT3 ,GPT3 Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 4. " GPT2 ,GPT2 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 3. " GPT1 ,GPT1 Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 2. " WDOG ,WDOG Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x08 1. " DMA ,DMA Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x08 0. " AIPI1C ,AIPI1 Control" "Supervisor/User,Supervisor"
|
|
width 0xb
|
|
tree.end
|
|
tree "AIPI2"
|
|
base ad:0x10020000
|
|
width 6.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PSR0,Peripheral Size Register 0"
|
|
bitfld.long 0x00 31. " MAXS0 , IP Bus MAX Size 0" "0,1"
|
|
bitfld.long 0x00 30. " JAMS0 , IP Bus JAM Size 0" "0,1"
|
|
bitfld.long 0x00 29. " ETBRAMS0 , IP Bus ETB RAM Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ETBRAMS0 , IP Bus ETB RAM Size 0" "0,1"
|
|
bitfld.long 0x00 27. " ETBREGS0 , IP Bus ETB Registers Size 0" "0,1"
|
|
bitfld.long 0x00 13. " SCC-HS0 , IP Bus SCC-H Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SCC-LS0 , IP Bus SCC-L Size 0" "0,1"
|
|
bitfld.long 0x00 11. " FECS0 , IP Bus FEC Size 0" "0,1"
|
|
bitfld.long 0x00 10. " RTICS0 , IP Bus RTIC Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FIRIS0 ,IP Bus FIRI Size 0" "0,1"
|
|
bitfld.long 0x00 7. " CRMS0 ,IP Bus CRM Size 0" "0,1"
|
|
bitfld.long 0x00 6. " EMMAS0 ,IP Bus EMMA Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " USB_OTGS0 ,IP Bus USB OTG Size 0" "0,1"
|
|
bitfld.long 0x00 4. " USB_OTGS0 ,IP Bus USB OTG Size 0" "0,1"
|
|
bitfld.long 0x00 2. " SLCDCS0 ,IP Bus SLCDC Size 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCDCS0 ,IP Bus LCDC Size 0" "0,1"
|
|
bitfld.long 0x00 0. " AIPI2S0 ,AIPI2 Control" "0,1"
|
|
line.long 0x04 "PSR1,Peripheral Size Register 1"
|
|
bitfld.long 0x04 31. " MAXS1 , IP Bus MAX Size 1" "0,1"
|
|
bitfld.long 0x04 30. " JAMS1 , IP Bus JAM Size 1" "0,1"
|
|
bitfld.long 0x04 29. " ETBRAMS1 , IP Bus ETB RAM Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ETBRAMS1 , IP Bus ETB RAM Size 1" "0,1"
|
|
bitfld.long 0x04 27. " ETBREGS1 , IP Bus ETB Registers Size 1" "0,1"
|
|
bitfld.long 0x04 13. " SCC-HS1 , IP Bus SCC-H Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " SCC-LS1 , IP Bus SCC-L Size 1" "0,1"
|
|
bitfld.long 0x04 11. " FECS1 , IP Bus FEC Size 1" "0,1"
|
|
bitfld.long 0x04 10. " RTICS1 , IP Bus RTIC Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 8. " FIRIS1 ,IP Bus FIRI Size 1" "0,1"
|
|
bitfld.long 0x04 7. " CRMS1 ,IP Bus CRM Size 1" "0,1"
|
|
bitfld.long 0x04 6. " EMMAS1 ,IP Bus EMMA Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 5. " USB_OTGS1 ,IP Bus USB OTG Size 1" "0,1"
|
|
bitfld.long 0x04 4. " USB_OTGS1 ,IP Bus USB OTG Size 1" "0,1"
|
|
bitfld.long 0x04 2. " SLCDCS1 ,IPS1 Bus SLCDC Size 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 1. " LCDCS1 ,IP Bus LCDC Size 1" "0,1"
|
|
bitfld.long 0x04 0. " AIPI2S1 ,AIPI2 Control" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PAR,Peripheral Access Register"
|
|
bitfld.long 0x00 31. " MAX ,MAX Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 30. " JAM ,JAM Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 29. " ETBRAM ,ETB RAM Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ETBRAM ,ETB RAM Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 27. " ETBREG ,ETB Registers Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 13. " SCC-H ,SCC-H Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SCC-L ,SCC-L Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 11. " FEC ,FEC Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 10. " RTIC ,RTIC Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FIRI ,FIRI Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 7. " CRM ,CRM Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 6. " EMMA ,EMMA Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x00 5. " USB_OTG ,USB_OTG Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 4. " USB_OTG ,USB_OTG Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 2. " SLCDC ,SLCDC Access Mode" "Supervisor/User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCDC ,LCDC Access Mode" "Supervisor/User,Supervisor"
|
|
bitfld.long 0x00 0. " AIPI2 ,AIPI2 Control" "Supervisor/User,Supervisor"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "MAX (Multi-Layer AHB Crossbar Switch)"
|
|
base ad:0x1003f000
|
|
width 0x9
|
|
if (((data.long(ad:(0x1003f000+0x0+0x10))&0x80000000)==0x0))
|
|
group.long (0x000+0x0)++0x07 "PORT 0"
|
|
line.long 0x00 "MPR0,Master Priority Register For Slave Port 0"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
line.long 0x04 "AMPR0,Alternate Master Priority Register For Slave Port 0"
|
|
bitfld.long 0x04 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group.long (0x010+0x0)++0x07
|
|
line.long 0x00 "SGPCR0,Slave General Purpose Control Register For Slave Port 0"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
line.long 0x04 "ASGPCR0,Alternate SGPCR For Slave Port 0"
|
|
bitfld.long 0x04 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x04 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
bitfld.long 0x04 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
else
|
|
rgroup.long (0x000+0x0)++0x07 "PORT 0"
|
|
line.long 0x00 "MPR0,Master Priority Register For Slave Port 0"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
line.long 0x04 "AMPR0,Alternate Master Priority Register For Slave Port 0"
|
|
bitfld.long 0x04 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
rgroup.long (0x010+0x0)++0x07
|
|
line.long 0x00 "SGPCR0,Slave General Purpose Control Register For Slave Port 0"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
line.long 0x04 "ASGPCR0,Alternate SGPCR For Slave Port 0"
|
|
bitfld.long 0x04 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x04 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
bitfld.long 0x04 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
endif
|
|
if (((data.long(ad:(0x1003f000+0x100+0x10))&0x80000000)==0x0))
|
|
group.long (0x000+0x100)++0x07 "PORT 1"
|
|
line.long 0x00 "MPR1,Master Priority Register For Slave Port 1"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
line.long 0x04 "AMPR1,Alternate Master Priority Register For Slave Port 1"
|
|
bitfld.long 0x04 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group.long (0x010+0x100)++0x07
|
|
line.long 0x00 "SGPCR1,Slave General Purpose Control Register For Slave Port 1"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
line.long 0x04 "ASGPCR1,Alternate SGPCR For Slave Port 1"
|
|
bitfld.long 0x04 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x04 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
bitfld.long 0x04 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
else
|
|
rgroup.long (0x000+0x100)++0x07 "PORT 1"
|
|
line.long 0x00 "MPR1,Master Priority Register For Slave Port 1"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
line.long 0x04 "AMPR1,Alternate Master Priority Register For Slave Port 1"
|
|
bitfld.long 0x04 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
rgroup.long (0x010+0x100)++0x07
|
|
line.long 0x00 "SGPCR1,Slave General Purpose Control Register For Slave Port 1"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
line.long 0x04 "ASGPCR1,Alternate SGPCR For Slave Port 1"
|
|
bitfld.long 0x04 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x04 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
bitfld.long 0x04 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
endif
|
|
if (((data.long(ad:(0x1003f000+0x200+0x10))&0x80000000)==0x0))
|
|
group.long (0x000+0x200)++0x07 "PORT 2"
|
|
line.long 0x00 "MPR2,Master Priority Register For Slave Port 2"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
line.long 0x04 "AMPR2,Alternate Master Priority Register For Slave Port 2"
|
|
bitfld.long 0x04 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
group.long (0x010+0x200)++0x07
|
|
line.long 0x00 "SGPCR2,Slave General Purpose Control Register For Slave Port 2"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
line.long 0x04 "ASGPCR2,Alternate SGPCR For Slave Port 2"
|
|
bitfld.long 0x04 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x04 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
bitfld.long 0x04 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
else
|
|
rgroup.long (0x000+0x200)++0x07 "PORT 2"
|
|
line.long 0x00 "MPR2,Master Priority Register For Slave Port 2"
|
|
bitfld.long 0x00 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x00 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
line.long 0x04 "AMPR2,Alternate Master Priority Register For Slave Port 2"
|
|
bitfld.long 0x04 20.--22. " MSTR_5 ,Master 5 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 16.--18. " MSTR_4 ,Master 4 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 12.--14. " MSTR_3 ,Master 3 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 8.--10. " MSTR_2 ,Master 2 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " MSTR_1 ,Master 1 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
bitfld.long 0x04 0.--2. " MSTR_0 ,Master 0 Priority" "Highest,6,5,4,3,2,1,Lowest"
|
|
rgroup.long (0x010+0x200)++0x07
|
|
line.long 0x00 "SGPCR2,Slave General Purpose Control Register For Slave Port 2"
|
|
bitfld.long 0x00 31. " RO ,Read Only" "Read/Write,Read only"
|
|
bitfld.long 0x00 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x00 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
bitfld.long 0x00 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
line.long 0x04 "ASGPCR2,Alternate SGPCR For Slave Port 2"
|
|
bitfld.long 0x04 30. " HLP ,Halt Low Priority" "Highest,Lowest"
|
|
bitfld.long 0x04 8.--9. " ARB ,Arbitration Mode" "Fixed priority,Round robin priority,?..."
|
|
bitfld.long 0x04 4.--5. " PCTL ,Parking Control" "PARK,Slave port,Safe state,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " PARK ,Park" "Master Port 0,Master Port 1,Master Port 2,Master Port 3,Master Port 4,Master Port 5,?..."
|
|
endif
|
|
group.long 0x800++0x03 "Master General Purpose Control Registers"
|
|
line.long 0x00 "MGPCR0,Master General Purpose Control Register For Master Port 0"
|
|
bitfld.long 0x00 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "MGPCR1,Master General Purpose Control Register For Master Port 1"
|
|
bitfld.long 0x00 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
group.long 0xa00++0x03
|
|
line.long 0x00 "MGPCR2,Master General Purpose Control Register For Master Port 2"
|
|
bitfld.long 0x00 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
group.long 0xb00++0x03
|
|
line.long 0x00 "MGPCR3,Master General Purpose Control Register For Master Port 3"
|
|
bitfld.long 0x00 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
group.long 0xc00++0x03
|
|
line.long 0x00 "MGPCR4,Master General Purpose Control Register For Master Port 4"
|
|
bitfld.long 0x00 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
group.long 0xd00++0x03
|
|
line.long 0x00 "MGPCR5,Master General Purpose Control Register For Master Port 5"
|
|
bitfld.long 0x00 0.--2. " AULB ,Arbitrate On Undefined Length Bursts" "Not allowed,Allowed at any time,Allowed after 4 beats,Allowed after 8 beats,Allowed after 16 beats,?..."
|
|
width 0xb
|
|
tree.end
|
|
tree.open "DMAC (Direct Memory Access Controller)"
|
|
base ad:0x10001000
|
|
width 0x8
|
|
tree "General Registers"
|
|
group.long 0x00++0x1f
|
|
line.long 0x00 "DCR,DMA Control Register"
|
|
bitfld.long 0x00 2. " DAM ,DMA Access Mode" "Privileged,User"
|
|
bitfld.long 0x00 1. " DRST ,DMA Soft Reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " DEN ,DMA Enable" "Disabled,Enabled"
|
|
line.long 0x04 "DISR,DMA Interrupt Status Register"
|
|
eventfld.long 0x04 15. " CH15 ,Channel 15 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 14. " CH14 ,Channel 14 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 13. " CH13 ,Channel 13 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 12. " CH12 ,Channel 12 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 11. " CH11 ,Channel 11 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 10. " CH10 ,Channel 10 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 9. " CH9 ,Channel 9 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 8. " CH8 ,Channel 8 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 7. " CH7 ,Channel 7 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 6. " CH6 ,Channel 6 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 5. " CH5 ,Channel 5 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 4. " CH4 ,Channel 4 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 3. " CH3 ,Channel 3 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 2. " CH2 ,Channel 2 Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 1. " CH1 ,Channel 1 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 0. " CH0 ,Channel 0 Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x08 "DIMR,DMA Interrupt Mask Register"
|
|
bitfld.long 0x08 15. " CH15 ,Channel 15 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 14. " CH14 ,Channel 14 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 13. " CH13 ,Channel 13 Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 12. " CH12 ,Channel 12 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 11. " CH11 ,Channel 11 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 10. " CH10 ,Channel 10 Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 9. " CH9 ,Channel 9 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " CH8 ,Channel 8 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 7. " CH7 ,Channel 7 Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " CH6 ,Channel 6 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " CH5 ,Channel 5 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " CH4 ,Channel 4 Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " CH3 ,Channel 3 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 2. " CH2 ,Channel 2 Interrupt Mask" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " CH1 ,Channel 1 Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CH0 ,Channel 0 Interrupt Mask" "Enabled,Disabled"
|
|
line.long 0x0c "DBTOSR,DMA Burst Time-Out Status Register"
|
|
eventfld.long 0x0C 15. " CH15 ,Channel 15 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 14. " CH14 ,Channel 14 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 13. " CH13 ,Channel 13 Burst Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x0C 12. " CH12 ,Channel 12 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 11. " CH11 ,Channel 11 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 10. " CH10 ,Channel 10 Burst Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x0C 9. " CH9 ,Channel 9 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 8. " CH8 ,Channel 8 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 7. " CH7 ,Channel 7 Burst Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x0C 6. " CH6 ,Channel 6 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 5. " CH5 ,Channel 5 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 4. " CH4 ,Channel 4 Burst Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x0C 3. " CH3 ,Channel 3 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 2. " CH2 ,Channel 2 Burst Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x0C 1. " CH1 ,Channel 1 Burst Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x0C 0. " CH0 ,Channel 0 Burst Time-Out Status" "No time-out,Time-out"
|
|
line.long 0x10 "DRTOSR,DMA Request Time-Out Status Register"
|
|
eventfld.long 0x10 15. " CH15 ,Channel 15 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 14. " CH14 ,Channel 14 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 13. " CH13 ,Channel 13 Request Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x10 12. " CH12 ,Channel 12 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 11. " CH11 ,Channel 11 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 10. " CH10 ,Channel 10 Request Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x10 9. " CH9 ,Channel 9 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 8. " CH8 ,Channel 8 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 7. " CH7 ,Channel 7 Request Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x10 6. " CH6 ,Channel 6 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 5. " CH5 ,Channel 5 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 4. " CH4 ,Channel 4 Request Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x10 3. " CH3 ,Channel 3 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 2. " CH2 ,Channel 2 Request Time-Out Status" "No time-out,Time-out"
|
|
eventfld.long 0x10 1. " CH1 ,Channel 1 Request Time-Out Status" "No time-out,Time-out"
|
|
textline " "
|
|
eventfld.long 0x10 0. " CH0 ,Channel 0 Request Time-Out Status" "No time-out,Time-out"
|
|
line.long 0x14 "DSESR,DMA Transfer Error Status Register"
|
|
eventfld.long 0x14 15. " CH15 ,Channel 15 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 14. " CH14 ,Channel 14 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 13. " CH13 ,Channel 13 Transfer Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x14 12. " CH12 ,Channel 12 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 11. " CH11 ,Channel 11 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 10. " CH10 ,Channel 10 Transfer Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x14 9. " CH9 ,Channel 9 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 8. " CH8 ,Channel 8 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 7. " CH7 ,Channel 7 Transfer Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x14 6. " CH6 ,Channel 6 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 5. " CH5 ,Channel 5 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 4. " CH4 ,Channel 4 Transfer Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x14 3. " CH3 ,Channel 3 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 2. " CH2 ,Channel 2 Transfer Error Status" "No error,Error"
|
|
eventfld.long 0x14 1. " CH1 ,Channel 1 Transfer Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x14 0. " CH0 ,Channel 0 Transfer Error Status" "No error,Error"
|
|
line.long 0x18 "DBOSR,DMA Buffer Overflow Status Register"
|
|
eventfld.long 0x18 15. " CH15 ,Channel 15 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 14. " CH14 ,Channel 14 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 13. " CH13 ,Channel 13 Buffer Overflow Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x18 12. " CH12 ,Channel 12 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 11. " CH11 ,Channel 11 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 10. " CH10 ,Channel 10 Buffer Overflow Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x18 9. " CH9 ,Channel 9 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 8. " CH8 ,Channel 8 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 7. " CH7 ,Channel 7 Buffer Overflow Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x18 6. " CH6 ,Channel 6 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 5. " CH5 ,Channel 5 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 4. " CH4 ,Channel 4 Buffer Overflow Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x18 3. " CH3 ,Channel 3 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 2. " CH2 ,Channel 2 Buffer Overflow Error Status" "No error,Error"
|
|
eventfld.long 0x18 1. " CH1 ,Channel 1 Buffer Overflow Error Status" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x18 0. " CH0 ,Channel 0 Buffer Overflow Error Status" "No error,Error"
|
|
line.long 0x1c "DBTOCR,DMA Burst Time-Out Control Register"
|
|
bitfld.long 0x1C 15. " EN ,Enables/Disables Burst Time-Out" "Disabled,Enabled"
|
|
hexmask.long.word 0x1C 0.--14. 1. " CNT ,Count Value"
|
|
tree.end
|
|
tree "2D Memory Registers"
|
|
group.long (0x40+0x0)++0x0b "Size Registers A"
|
|
line.long 0x00 "WSRA,W-Size Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " WS ,Contains The Number Of Bytes That Make Up The Display Width"
|
|
line.long 0x04 "XSRA,X-Size Register A"
|
|
hexmask.long.word 0x04 0.--15. 1. " XS ,Contains The Number Of Bytes Per Row That Define The X-Size Of The 2D Memory"
|
|
line.long 0x08 "YSRA,Y-Size Register A"
|
|
hexmask.long.word 0x08 0.--15. 1. " YS ,Contains The Number Of Rows That Make Up The 2D Memory Window"
|
|
group.long (0x40+0xC)++0x0b "Size Registers B"
|
|
line.long 0x00 "WSRB,W-Size Register B"
|
|
hexmask.long.word 0x00 0.--15. 1. " WS ,Contains The Number Of Bytes That Make Up The Display Width"
|
|
line.long 0x04 "XSRB,X-Size Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " XS ,Contains The Number Of Bytes Per Row That Define The X-Size Of The 2D Memory"
|
|
line.long 0x08 "YSRB,Y-Size Register B"
|
|
hexmask.long.word 0x08 0.--15. 1. " YS ,Contains The Number Of Rows That Make Up The 2D Memory Window"
|
|
tree.end
|
|
tree "Channel Registers"
|
|
tree "Channel 0"
|
|
group.long (0x80+0x0)++0x0b
|
|
line.long 0x00 "SAR0,Channel 0 Source Address Register"
|
|
line.long 0x04 "DAR0,Channel 0 Destination Address Register"
|
|
line.long 0x08 "CNTR0,Channel 0 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x0))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x0))&0xc00)==0x400))
|
|
group.long (0x8c+0x0)++0x03
|
|
line.long 0x00 "CCR0,Channel 0 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x0)++0x03
|
|
line.long 0x00 "CCR0,Channel 0 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x0)++0x07
|
|
line.long 0x00 "RSSR0,Channel 0 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR0,Channel 0 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x0))&0x8)==0x8))
|
|
group.long (0x98+0x0)++0x03
|
|
line.long 0x00 "RTOR0,Channel 0 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x0)++0x03
|
|
line.long 0x00 "BUCR0,Channel 0 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x0)++0x03
|
|
line.long 0x00 "CCNR0,Channel 0 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long (0x80+0x40)++0x0b
|
|
line.long 0x00 "SAR1,Channel 1 Source Address Register"
|
|
line.long 0x04 "DAR1,Channel 1 Destination Address Register"
|
|
line.long 0x08 "CNTR1,Channel 1 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x40))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x40))&0xc00)==0x400))
|
|
group.long (0x8c+0x40)++0x03
|
|
line.long 0x00 "CCR1,Channel 1 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x40)++0x03
|
|
line.long 0x00 "CCR1,Channel 1 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x40)++0x07
|
|
line.long 0x00 "RSSR1,Channel 1 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR1,Channel 1 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x40))&0x8)==0x8))
|
|
group.long (0x98+0x40)++0x03
|
|
line.long 0x00 "RTOR1,Channel 1 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x40)++0x03
|
|
line.long 0x00 "BUCR1,Channel 1 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x40)++0x03
|
|
line.long 0x00 "CCNR1,Channel 1 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long (0x80+0x80)++0x0b
|
|
line.long 0x00 "SAR2,Channel 2 Source Address Register"
|
|
line.long 0x04 "DAR2,Channel 2 Destination Address Register"
|
|
line.long 0x08 "CNTR2,Channel 2 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x80))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x80))&0xc00)==0x400))
|
|
group.long (0x8c+0x80)++0x03
|
|
line.long 0x00 "CCR2,Channel 2 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x80)++0x03
|
|
line.long 0x00 "CCR2,Channel 2 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x80)++0x07
|
|
line.long 0x00 "RSSR2,Channel 2 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR2,Channel 2 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x80))&0x8)==0x8))
|
|
group.long (0x98+0x80)++0x03
|
|
line.long 0x00 "RTOR2,Channel 2 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x80)++0x03
|
|
line.long 0x00 "BUCR2,Channel 2 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x80)++0x03
|
|
line.long 0x00 "CCNR2,Channel 2 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long (0x80+0xC0)++0x0b
|
|
line.long 0x00 "SAR3,Channel 3 Source Address Register"
|
|
line.long 0x04 "DAR3,Channel 3 Destination Address Register"
|
|
line.long 0x08 "CNTR3,Channel 3 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0xC0))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0xC0))&0xc00)==0x400))
|
|
group.long (0x8c+0xC0)++0x03
|
|
line.long 0x00 "CCR3,Channel 3 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0xC0)++0x03
|
|
line.long 0x00 "CCR3,Channel 3 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0xC0)++0x07
|
|
line.long 0x00 "RSSR3,Channel 3 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR3,Channel 3 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0xC0))&0x8)==0x8))
|
|
group.long (0x98+0xC0)++0x03
|
|
line.long 0x00 "RTOR3,Channel 3 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0xC0)++0x03
|
|
line.long 0x00 "BUCR3,Channel 3 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0xC0)++0x03
|
|
line.long 0x00 "CCNR3,Channel 3 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long (0x80+0x100)++0x0b
|
|
line.long 0x00 "SAR4,Channel 4 Source Address Register"
|
|
line.long 0x04 "DAR4,Channel 4 Destination Address Register"
|
|
line.long 0x08 "CNTR4,Channel 4 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x100))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x100))&0xc00)==0x400))
|
|
group.long (0x8c+0x100)++0x03
|
|
line.long 0x00 "CCR4,Channel 4 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x100)++0x03
|
|
line.long 0x00 "CCR4,Channel 4 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x100)++0x07
|
|
line.long 0x00 "RSSR4,Channel 4 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR4,Channel 4 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x100))&0x8)==0x8))
|
|
group.long (0x98+0x100)++0x03
|
|
line.long 0x00 "RTOR4,Channel 4 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x100)++0x03
|
|
line.long 0x00 "BUCR4,Channel 4 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x100)++0x03
|
|
line.long 0x00 "CCNR4,Channel 4 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long (0x80+0x140)++0x0b
|
|
line.long 0x00 "SAR5,Channel 5 Source Address Register"
|
|
line.long 0x04 "DAR5,Channel 5 Destination Address Register"
|
|
line.long 0x08 "CNTR5,Channel 5 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x140))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x140))&0xc00)==0x400))
|
|
group.long (0x8c+0x140)++0x03
|
|
line.long 0x00 "CCR5,Channel 5 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x140)++0x03
|
|
line.long 0x00 "CCR5,Channel 5 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x140)++0x07
|
|
line.long 0x00 "RSSR5,Channel 5 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR5,Channel 5 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x140))&0x8)==0x8))
|
|
group.long (0x98+0x140)++0x03
|
|
line.long 0x00 "RTOR5,Channel 5 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x140)++0x03
|
|
line.long 0x00 "BUCR5,Channel 5 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x140)++0x03
|
|
line.long 0x00 "CCNR5,Channel 5 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long (0x80+0x180)++0x0b
|
|
line.long 0x00 "SAR6,Channel 6 Source Address Register"
|
|
line.long 0x04 "DAR6,Channel 6 Destination Address Register"
|
|
line.long 0x08 "CNTR6,Channel 6 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x180))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x180))&0xc00)==0x400))
|
|
group.long (0x8c+0x180)++0x03
|
|
line.long 0x00 "CCR6,Channel 6 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x180)++0x03
|
|
line.long 0x00 "CCR6,Channel 6 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x180)++0x07
|
|
line.long 0x00 "RSSR6,Channel 6 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR6,Channel 6 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x180))&0x8)==0x8))
|
|
group.long (0x98+0x180)++0x03
|
|
line.long 0x00 "RTOR6,Channel 6 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x180)++0x03
|
|
line.long 0x00 "BUCR6,Channel 6 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x180)++0x03
|
|
line.long 0x00 "CCNR6,Channel 6 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long (0x80+0x1C0)++0x0b
|
|
line.long 0x00 "SAR7,Channel 7 Source Address Register"
|
|
line.long 0x04 "DAR7,Channel 7 Destination Address Register"
|
|
line.long 0x08 "CNTR7,Channel 7 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x1C0))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x1C0))&0xc00)==0x400))
|
|
group.long (0x8c+0x1C0)++0x03
|
|
line.long 0x00 "CCR7,Channel 7 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x1C0)++0x03
|
|
line.long 0x00 "CCR7,Channel 7 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x1C0)++0x07
|
|
line.long 0x00 "RSSR7,Channel 7 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR7,Channel 7 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x1C0))&0x8)==0x8))
|
|
group.long (0x98+0x1C0)++0x03
|
|
line.long 0x00 "RTOR7,Channel 7 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x1C0)++0x03
|
|
line.long 0x00 "BUCR7,Channel 7 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x1C0)++0x03
|
|
line.long 0x00 "CCNR7,Channel 7 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 8"
|
|
group.long (0x80+0x200)++0x0b
|
|
line.long 0x00 "SAR8,Channel 8 Source Address Register"
|
|
line.long 0x04 "DAR8,Channel 8 Destination Address Register"
|
|
line.long 0x08 "CNTR8,Channel 8 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x200))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x200))&0xc00)==0x400))
|
|
group.long (0x8c+0x200)++0x03
|
|
line.long 0x00 "CCR8,Channel 8 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x200)++0x03
|
|
line.long 0x00 "CCR8,Channel 8 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x200)++0x07
|
|
line.long 0x00 "RSSR8,Channel 8 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR8,Channel 8 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x200))&0x8)==0x8))
|
|
group.long (0x98+0x200)++0x03
|
|
line.long 0x00 "RTOR8,Channel 8 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x200)++0x03
|
|
line.long 0x00 "BUCR8,Channel 8 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x200)++0x03
|
|
line.long 0x00 "CCNR8,Channel 8 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 9"
|
|
group.long (0x80+0x240)++0x0b
|
|
line.long 0x00 "SAR9,Channel 9 Source Address Register"
|
|
line.long 0x04 "DAR9,Channel 9 Destination Address Register"
|
|
line.long 0x08 "CNTR9,Channel 9 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x240))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x240))&0xc00)==0x400))
|
|
group.long (0x8c+0x240)++0x03
|
|
line.long 0x00 "CCR9,Channel 9 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x240)++0x03
|
|
line.long 0x00 "CCR9,Channel 9 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x240)++0x07
|
|
line.long 0x00 "RSSR9,Channel 9 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR9,Channel 9 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x240))&0x8)==0x8))
|
|
group.long (0x98+0x240)++0x03
|
|
line.long 0x00 "RTOR9,Channel 9 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x240)++0x03
|
|
line.long 0x00 "BUCR9,Channel 9 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x240)++0x03
|
|
line.long 0x00 "CCNR9,Channel 9 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 10"
|
|
group.long (0x80+0x280)++0x0b
|
|
line.long 0x00 "SAR10,Channel 10 Source Address Register"
|
|
line.long 0x04 "DAR10,Channel 10 Destination Address Register"
|
|
line.long 0x08 "CNTR10,Channel 10 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x280))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x280))&0xc00)==0x400))
|
|
group.long (0x8c+0x280)++0x03
|
|
line.long 0x00 "CCR10,Channel 10 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x280)++0x03
|
|
line.long 0x00 "CCR10,Channel 10 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x280)++0x07
|
|
line.long 0x00 "RSSR10,Channel 10 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR10,Channel 10 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x280))&0x8)==0x8))
|
|
group.long (0x98+0x280)++0x03
|
|
line.long 0x00 "RTOR10,Channel 10 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x280)++0x03
|
|
line.long 0x00 "BUCR10,Channel 10 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x280)++0x03
|
|
line.long 0x00 "CCNR10,Channel 10 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 11"
|
|
group.long (0x80+0x2C0)++0x0b
|
|
line.long 0x00 "SAR11,Channel 11 Source Address Register"
|
|
line.long 0x04 "DAR11,Channel 11 Destination Address Register"
|
|
line.long 0x08 "CNTR11,Channel 11 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x2C0))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x2C0))&0xc00)==0x400))
|
|
group.long (0x8c+0x2C0)++0x03
|
|
line.long 0x00 "CCR11,Channel 11 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x2C0)++0x03
|
|
line.long 0x00 "CCR11,Channel 11 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x2C0)++0x07
|
|
line.long 0x00 "RSSR11,Channel 11 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR11,Channel 11 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x2C0))&0x8)==0x8))
|
|
group.long (0x98+0x2C0)++0x03
|
|
line.long 0x00 "RTOR11,Channel 11 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x2C0)++0x03
|
|
line.long 0x00 "BUCR11,Channel 11 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x2C0)++0x03
|
|
line.long 0x00 "CCNR11,Channel 11 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 12"
|
|
group.long (0x80+0x300)++0x0b
|
|
line.long 0x00 "SAR12,Channel 12 Source Address Register"
|
|
line.long 0x04 "DAR12,Channel 12 Destination Address Register"
|
|
line.long 0x08 "CNTR12,Channel 12 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x300))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x300))&0xc00)==0x400))
|
|
group.long (0x8c+0x300)++0x03
|
|
line.long 0x00 "CCR12,Channel 12 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x300)++0x03
|
|
line.long 0x00 "CCR12,Channel 12 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x300)++0x07
|
|
line.long 0x00 "RSSR12,Channel 12 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR12,Channel 12 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x300))&0x8)==0x8))
|
|
group.long (0x98+0x300)++0x03
|
|
line.long 0x00 "RTOR12,Channel 12 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x300)++0x03
|
|
line.long 0x00 "BUCR12,Channel 12 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x300)++0x03
|
|
line.long 0x00 "CCNR12,Channel 12 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 13"
|
|
group.long (0x80+0x340)++0x0b
|
|
line.long 0x00 "SAR13,Channel 13 Source Address Register"
|
|
line.long 0x04 "DAR13,Channel 13 Destination Address Register"
|
|
line.long 0x08 "CNTR13,Channel 13 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x340))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x340))&0xc00)==0x400))
|
|
group.long (0x8c+0x340)++0x03
|
|
line.long 0x00 "CCR13,Channel 13 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x340)++0x03
|
|
line.long 0x00 "CCR13,Channel 13 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x340)++0x07
|
|
line.long 0x00 "RSSR13,Channel 13 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR13,Channel 13 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x340))&0x8)==0x8))
|
|
group.long (0x98+0x340)++0x03
|
|
line.long 0x00 "RTOR13,Channel 13 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x340)++0x03
|
|
line.long 0x00 "BUCR13,Channel 13 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x340)++0x03
|
|
line.long 0x00 "CCNR13,Channel 13 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 14"
|
|
group.long (0x80+0x380)++0x0b
|
|
line.long 0x00 "SAR14,Channel 14 Source Address Register"
|
|
line.long 0x04 "DAR14,Channel 14 Destination Address Register"
|
|
line.long 0x08 "CNTR14,Channel 14 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x380))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x380))&0xc00)==0x400))
|
|
group.long (0x8c+0x380)++0x03
|
|
line.long 0x00 "CCR14,Channel 14 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x380)++0x03
|
|
line.long 0x00 "CCR14,Channel 14 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x380)++0x07
|
|
line.long 0x00 "RSSR14,Channel 14 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR14,Channel 14 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x380))&0x8)==0x8))
|
|
group.long (0x98+0x380)++0x03
|
|
line.long 0x00 "RTOR14,Channel 14 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x380)++0x03
|
|
line.long 0x00 "BUCR14,Channel 14 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x380)++0x03
|
|
line.long 0x00 "CCNR14,Channel 14 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree "Channel 15"
|
|
group.long (0x80+0x3C0)++0x0b
|
|
line.long 0x00 "SAR15,Channel 15 Source Address Register"
|
|
line.long 0x04 "DAR15,Channel 15 Destination Address Register"
|
|
line.long 0x08 "CNTR15,Channel 15 Count Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CNT ,Contains The Number Of Bytes Of Data To Be Transferred"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x3C0))&0x3000)==0x1000)||((data.long(ad:(0x10001000+0x8c+0x3C0))&0xc00)==0x400))
|
|
group.long (0x8c+0x3C0)++0x03
|
|
line.long 0x00 "CCR15,Channel 15 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSEL ,Memory Select" "A,B"
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x8c+0x3C0)++0x03
|
|
line.long 0x00 "CCR15,Channel 15 Control Register"
|
|
bitfld.long 0x00 14. " ACRPT ,Auto Clear RPT" "No effect,Reset"
|
|
bitfld.long 0x00 12.--13. " DMOD ,Destination Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 10.--11. " SMOD ,Source Mode" "Linear,2D,FIFO,?..."
|
|
bitfld.long 0x00 9. " MDIR ,Memory Direction" "Increment,Decrement"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSIZ ,Destination Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 4.--5. " SSIZ ,Source Size" "32-bit,8-bit,16-bit,?..."
|
|
bitfld.long 0x00 3. " REN ,Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RPT ,Repeat" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FRC ,Force a DMA Cycle" "No effect,Forced"
|
|
bitfld.long 0x00 0. " CEN ,DMA Channel Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x90+0x3C0)++0x07
|
|
line.long 0x00 "RSSR15,Channel 15 Request Source Select Register"
|
|
bitfld.long 0x00 0.--5. " RSS ,Request Source Select" "/dma_req[0],/dma_req[1],/dma_req[2],/dma_req[3],/dma_req[4],/dma_req[5],/dma_req[6],/dma_req[7],/dma_req[8],/dma_req[9],/dma_req[10],/dma_req[11],/dma_req[12],/dma_req[13],/dma_req[14],/dma_req[15],/dma_req[16],/dma_req[17],/dma_req[18],/dma_req[19],/dma_req[20],/dma_req[21],/dma_req[22],/dma_req[23],/dma_req[24],/dma_req[25],/dma_req[26],/dma_req[27],/dma_req[28],/dma_req[29],/dma_req[30],/dma_req[31],/dma_req[32],/dma_req[33],/dma_req[34],/dma_req[35],/dma_req[36],/dma_req[37],/dma_req[38],/dma_req[39],/dma_req[40],/dma_req[41],/dma_req[42],/dma_req[43],/dma_req[44],/dma_req[45],/dma_req[46],/dma_req[47],/dma_req[48],/dma_req[49],/dma_req[50],/dma_req[51],/dma_req[52],/dma_req[53],/dma_req[54],/dma_req[55],/dma_req[56],/dma_req[57],/dma_req[58],/dma_req[59],/dma_req[60],/dma_req[61],/dma_req[62],/dma_req[63]"
|
|
line.long 0x04 "BLR15,Channel 15 Burst Length Register"
|
|
bitfld.long 0x04 0.--5. " BL ,Burst Length" "64 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,63 bytes"
|
|
if (((data.long(ad:(0x10001000+0x8c+0x3C0))&0x8)==0x8))
|
|
group.long (0x98+0x3C0)++0x03
|
|
line.long 0x00 "RTOR15,Channel 15 Request Time-Out Register"
|
|
bitfld.long 0x00 15. " EN ,Enables/Disables The DMA Request Time-Out" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CLK ,Selects The Counter Of Input Clock Source" "HCLK,32.768 kHz"
|
|
bitfld.long 0x00 13. " PSC ,Prescaler Count" "Div by 1,Div by 256"
|
|
hexmask.long.word 0x00 0.--12. 1. " CNT ,Request Time-Out Count"
|
|
else
|
|
group.long (0x98+0x3C0)++0x03
|
|
line.long 0x00 "BUCR15,Channel 15 Bus Utilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BU_CNT ,Bus Utilization Clock Count"
|
|
endif
|
|
group.long (0x9c+0x3C0)++0x03
|
|
line.long 0x00 "CCNR15,Channel 15 Channel Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CCNR ,Channel Counter"
|
|
tree.end
|
|
tree.end
|
|
tree "Test Registers"
|
|
group.long 0x480++0x17
|
|
line.long 0x00 "TCR,Test Control Register"
|
|
line.long 0x04 "TFIFOAR,Test FIFO A Register"
|
|
line.long 0x08 "TDIPR,Test DMA In Progress Register"
|
|
line.long 0x0c "TFIFOBR,Test FIFO B Register"
|
|
line.long 0x10 "TDRR_L,Low 32 DMA Request Register"
|
|
line.long 0x14 "TDRR_H,High 32 DMA Request Register"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "AUDMUX (Digital Audio Mux)"
|
|
base ad:0x10016000
|
|
width 7.
|
|
group.long 0x00++0x0b
|
|
line.long 0x0 "HPCR1,Host Port Configuration Register"
|
|
bitfld.long 0x0 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x0 30. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x0 26.--29. " TFCSEL ,Transmit Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x0 25. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x0 24. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x0 20.--23. " RFCSEL ,Receive Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x0 13.--15. " RXDSEL ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,?..."
|
|
bitfld.long 0x0 12. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x0 10. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
textline " "
|
|
bitfld.long 0x0 08. " INMEN ,Internal Network Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " INMMASK7 ,Internal Network Mode Mask" "Include,Exclude"
|
|
bitfld.long 0x0 6. " INMMASK6 ,Internal Network Mode Mask Port 7" "Include,Exclude"
|
|
textline " "
|
|
bitfld.long 0x0 5. " INMMASK5 ,Internal Network Mode Mask Port 6" "Include,Exclude"
|
|
bitfld.long 0x0 4. " INMMASK4 ,Internal Network Mode Mask Port 5" "Include,Exclude"
|
|
bitfld.long 0x0 3. " INMMASK3 ,Internal Network Mode Mask Port 4" "Include,Exclude"
|
|
textline " "
|
|
bitfld.long 0x0 2. " INMMASK2 ,Internal Network Mode Mask Port 3" "Include,Exclude"
|
|
bitfld.long 0x0 1. " INMMASK1 ,Internal Network Mode Mask Port 2" "Include,Exclude"
|
|
bitfld.long 0x0 0. " INMMASK0 ,Internal Network Mode Mask Port 1" "Include,Exclude"
|
|
line.long 0x4 "HPCR2,Host Port Configuration Register"
|
|
bitfld.long 0x4 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x4 30. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x4 26.--29. " TFCSEL ,Transmit Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x4 25. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x4 24. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x4 20.--23. " RFCSEL ,Receive Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x4 13.--15. " RXDSEL ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,?..."
|
|
bitfld.long 0x4 12. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x4 10. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
textline " "
|
|
bitfld.long 0x4 08. " INMEN ,Internal Network Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 7. " INMMASK7 ,Internal Network Mode Mask" "Include,Exclude"
|
|
bitfld.long 0x4 6. " INMMASK6 ,Internal Network Mode Mask Port 7" "Include,Exclude"
|
|
textline " "
|
|
bitfld.long 0x4 5. " INMMASK5 ,Internal Network Mode Mask Port 6" "Include,Exclude"
|
|
bitfld.long 0x4 4. " INMMASK4 ,Internal Network Mode Mask Port 5" "Include,Exclude"
|
|
bitfld.long 0x4 3. " INMMASK3 ,Internal Network Mode Mask Port 4" "Include,Exclude"
|
|
textline " "
|
|
bitfld.long 0x4 2. " INMMASK2 ,Internal Network Mode Mask Port 3" "Include,Exclude"
|
|
bitfld.long 0x4 1. " INMMASK1 ,Internal Network Mode Mask Port 2" "Include,Exclude"
|
|
bitfld.long 0x4 0. " INMMASK0 ,Internal Network Mode Mask Port 1" "Include,Exclude"
|
|
line.long 0x8 "HPCR3,Host Port Configuration Register"
|
|
bitfld.long 0x8 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x8 30. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x8 26.--29. " TFCSEL ,Transmit Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x8 25. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x8 24. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x8 20.--23. " RFCSEL ,Receive Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x8 13.--15. " RXDSEL ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,?..."
|
|
bitfld.long 0x8 12. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x8 10. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
textline " "
|
|
bitfld.long 0x8 08. " INMEN ,Internal Network Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 7. " INMMASK7 ,Internal Network Mode Mask" "Include,Exclude"
|
|
bitfld.long 0x8 6. " INMMASK6 ,Internal Network Mode Mask Port 7" "Include,Exclude"
|
|
textline " "
|
|
bitfld.long 0x8 5. " INMMASK5 ,Internal Network Mode Mask Port 6" "Include,Exclude"
|
|
bitfld.long 0x8 4. " INMMASK4 ,Internal Network Mode Mask Port 5" "Include,Exclude"
|
|
bitfld.long 0x8 3. " INMMASK3 ,Internal Network Mode Mask Port 4" "Include,Exclude"
|
|
textline " "
|
|
bitfld.long 0x8 2. " INMMASK2 ,Internal Network Mode Mask Port 3" "Include,Exclude"
|
|
bitfld.long 0x8 1. " INMMASK1 ,Internal Network Mode Mask Port 2" "Include,Exclude"
|
|
bitfld.long 0x8 0. " INMMASK0 ,Internal Network Mode Mask Port 1" "Include,Exclude"
|
|
group.long 0x10++0x07
|
|
line.long 0x0 "PPCR1,Peripheral Port Configuration Register"
|
|
bitfld.long 0x0 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x0 30. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x0 26.--29. " TFCSEL ,Transmit Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x0 25. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x0 24. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x0 20.--23. " RFCSEL ,Receive Frame Sync And Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x0 13.--15. " RXDSEL ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,?..."
|
|
bitfld.long 0x0 12. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x0 10. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
line.long 0x4 "PPCR2,Peripheral Port Configuration Register"
|
|
bitfld.long 0x4 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x4 30. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x4 26.--29. " TFCSEL ,Transmit Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x4 25. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x4 24. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x4 20.--23. " RFCSEL ,Receive Frame Sync And Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x4 13.--15. " RXDSEL ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,?..."
|
|
bitfld.long 0x4 12. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x4 10. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "PPCR3,Peripheral Port Configuration Register"
|
|
bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 30. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 26.--29. " TFCSEL ,Transmit Frame Sync and Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x00 25. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output"
|
|
bitfld.long 0x00 24. " RCLKDIR ,Receive Clock Direction Control" "Input,Output"
|
|
bitfld.long 0x00 20.--23. " RFCSEL ,Receive Frame Sync And Clock Select" "TxFS and TxClk port 1,TxFS and TxClk port 2,TxFS and TxClk port 3,TxFS and TxClk port 4,TxFS and TxClk port 5,TxFS and TxClk port 6,Reserved,Reserved,RxFS and RxClk port 1,RxFS and RxClk port 2,RxFS and RxClk port 3,RxFS and RxClk port 4,RxFS and RxClk port 5,RxFS and RxClk port 6,?..."
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " RXDSEL ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,?..."
|
|
bitfld.long 0x00 12. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 10. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch"
|
|
width 0xb
|
|
tree.end
|
|
tree "CSI (CMOS Sensor Interface)"
|
|
base ad:0x80000000
|
|
width 0x8
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CSICR1,CSI Control Register 1"
|
|
bitfld.long 0x00 31. " SWAP16_EN ,SWAP 16-Bit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EXT_VSYNC ,External VSYNC Enable" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EOF_INT_EN ,End-of-Frame Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PrP_IF_EN ,CSI - PrP Interface Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CCIR_MODE ,CCIR Mode Select" "Progressive,Interlace"
|
|
bitfld.long 0x00 26. " COF_INT_E ,Change Of Image Field (COF) Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SF_OR_INTEN ,STATFIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RF_OR_INTEN ,RxFIFO Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " STATFF_LEVEL ,STATFIFO Full Level" "4 words,8 words,12 words,16 words"
|
|
bitfld.long 0x00 21. " STATFF_INTEN ,STATFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RXFF_LEVEL ,RxFIFO Full Level" "4 words,8 words,16 words,24 words"
|
|
bitfld.long 0x00 18. " RXFF_INTEN ,RxFIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SOF_POL ,Start Of Frame (SOF) Interrupt Polarity" "Falling edge,Rising edge"
|
|
bitfld.long 0x00 16. " SOF_INTEN ,Start Of Frame (SOF) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MCLKDIV ,Sensor Master Clock (MCLK) Divider" "Div by 2,Div by 4,Div by 6,Div by 8,Div by 10,Div by 12,Div by 14,Div by 16,Div by 18,Div by 20,Div by 22,Div by 24,Div by 26,Div by 28,Div by 30,Div by 32"
|
|
bitfld.long 0x00 11. " HSYNC_POL ,HSYNC Polarity Select" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CCIR_EN ,CCIR656 Interface Enable" "Traditional,CCIR656"
|
|
bitfld.long 0x00 9. " MCLKEN ,Sensor Master Clock (MCLK) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FCC ,FIFO Clear Control" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 7. " PACK_DIR ,Data Packing Direction" "From LSB,From MSB"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLR_STATFIFO ,Asynchronous STATFIFO Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_RXFIFO ,Asynchronous RxFIFO Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GCLK_MODE ,Gated Clock Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " INV_DATA ,Invert Data Input" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INV_PCLK ,Invert Pixel Clock Input" "Not inverted,Inverted"
|
|
bitfld.long 0x00 1. " REDGE ,Valid Pixel Clock Edge Select" "Falling edge,Rising edge"
|
|
if ((d.l(ad:(0x80000000+0x4))&0x800000)==0x800000)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CSICR2,CSI Control Register 2 "
|
|
bitfld.long 0x00 26. " DRM ,Double Resolution Mode" "8 x 6,8 x 12"
|
|
bitfld.long 0x00 24.--25. " AFS ,Auto Focus Spread" "Consecutive,Every third,Every four,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SCE ,Skip Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19.--20. " BTS ,Bayer Tile Start" "GR,RG,BG,GB"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " LVRM ,Live View Resolution Mode" "512 x 384,448 x 336,384 x 288,384 x 256,320 x 240,288 x 216,400 x 300,?..."
|
|
hexmask.long.byte 0x00 8.--15. 1. " VSC ,Vertical Skip Count"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " HSC ,Horizontal Skip Count"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CSICR2,CSI Control Register 2 "
|
|
bitfld.long 0x00 26. " DRM ,Double Resolution Mode" "8 x 6,8 x 12"
|
|
bitfld.long 0x00 24.--25. " AFS ,Auto Focus Spread" "Consecutive,Every third,Every four,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SCE ,Skip Count Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19.--20. " BTS ,Bayer Tile Start" "GR,RG,BG,GB"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " LVRM ,Live View Resolution Mode" "512 x 384,448 x 336,384 x 288,384 x 256,320 x 240,288 x 216,400 x 300,?..."
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "CSICR3,CSI Control Register 3"
|
|
hexmask.long.word 0x00 16.--31. 1. " FRMCNT ,Frame Counter"
|
|
bitfld.long 0x00 15. " FRMCNT_RST ,Frame Count Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CSI_SVR ,Supervisor Mode Access Control" "Any mode,Supervisor"
|
|
bitfld.long 0x00 2. " ZERO_PACK_EN ,Dummy Zero Packing Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ECC_INT_EN ,Error Detection Interrupt Enable" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " ECC_AUTO_EN ,Automatic Error Correction Enable" "Disabled,Enabled"
|
|
if ((d.l(ad:0x80000000)&0x8000000)==0x8000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CSISR,CSI Status Register 1"
|
|
eventfld.long 0x00 25. " SFF_OR_INT ,STATFIFO Overrun Interrupt Status" "No overflow,Overflow"
|
|
eventfld.long 0x00 24. " RFF_OR_INT ,RxFIFO Overrun Interrupt Status" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STATFF_INT ,STATFIFO Full Interrupt Status" "Not full,Full"
|
|
bitfld.long 0x00 18. " RXFF_INT ,RxFIFO Full Interrupt Status" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 17. " EOF_INT ,End of Frame (EOF) Interrupt Status" "Not detected,Detected"
|
|
eventfld.long 0x00 16. " SOF_INT ,Start Of Frame (SOF) Interrupt Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " F2_INT ,CCIR Field 2 Interrupt Status" "Not detected,About to start"
|
|
bitfld.long 0x00 14. " F1_INT ,CCIR Field 1 Interrupt Status" "Not detected,About to start"
|
|
textline " "
|
|
eventfld.long 0x00 13. " COF_INT ,Change Of Field Interrupt Status" "Not changed,Changed"
|
|
eventfld.long 0x00 1. " ECC_INT ,CCIR Error Interrupt" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DRDY ,RxFIFO Data Ready" "Not ready,Ready"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CSISR,CSI Status Register 1"
|
|
eventfld.long 0x00 25. " SFF_OR_INT ,STATFIFO Overrun Interrupt Status" "No overflow,Overflow"
|
|
eventfld.long 0x00 24. " RFF_OR_INT ,RxFIFO Overrun Interrupt Status" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STATFF_INT ,STATFIFO Full Interrupt Status" "Not full,Full"
|
|
bitfld.long 0x00 18. " RXFF_INT ,RxFIFO Full Interrupt Status" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 17. " EOF_INT ,End of Frame (EOF) Interrupt Status" "Not detected,Detected"
|
|
eventfld.long 0x00 16. " SOF_INT ,Start Of Frame (SOF) Interrupt Status" "Not detected,Detected"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x00 0. " DRDY ,RxFIFO Data Ready" "Not ready,Ready"
|
|
endif
|
|
width 13.
|
|
hgroup.long 0x0c++0x03
|
|
hide.long 0x00 "CSISTATFIFO,CSI Statistic FIFO Register"
|
|
in
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "CSIRFIFO,CSI RxFIFO Register"
|
|
in
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "CSIRXCNT,CSI RX COUNT Register"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. " RXCNT ,RxFIFO Count"
|
|
line.long 0x04 "CSIDEBUG,CSI Debug Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "Video_Codec (Video Codec)"
|
|
base ad:0x10023000
|
|
width 14.
|
|
wgroup.long 0x00++0x0f
|
|
line.long 0x00 "CodeRun,Video Codec Code Run Register"
|
|
bitfld.long 0x00 0. " CodeRun ,BIT processor run start bit" "Stopped,Started"
|
|
line.long 0x04 "CodeDown,Video Codec BIT Boot Code Download Data Register"
|
|
hexmask.long.word 0x04 16.--28. 1. " CodeAddr[12:0] ,Download address of Video Codec BIT boot code"
|
|
hexmask.long.word 0x04 0.--15. 1. " CodeData[15:0] ,Download data of Video Codec BIT boot code"
|
|
line.long 0x08 "HostIntReq,Video Codec Host Interrupt Request Register"
|
|
bitfld.long 0x08 0. " IntReq ,The host interrupt request bit" "Not requested,Requested"
|
|
line.long 0x0c "BitIntClear,Video Codec BIT Interrupt Clear Register"
|
|
bitfld.long 0x0c 0. " IntClear ,BIT interrupt clear bit" "No effect,Clear"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "BitIntSts,Video Codec BIT Interrupt Status Register"
|
|
bitfld.long 0x00 0. " IntSts ,BIT interrupt status bit" "Not asserted,Asserted"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x00 "BitCodeReset,Video Codec BIT Code Reset Register"
|
|
bitfld.long 0x00 0. " CodeReset ,BIT code reset bit" "No effect,Reset"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "BitCurPc,Video Codec BIT Current PC Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " CurPc ,BIT current PC value"
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "WorkBufAddr,Working Buffer Address in External Memory"
|
|
line.long 0x04 "CodeBufAddr,Code Table Size in External Memory"
|
|
line.long 0x08 "BitStreamCtrl,Bit Stream Control"
|
|
line.long 0x0c "FrameMemCtrl,Frame Memory Control"
|
|
line.long 0x10 "SramAddr,Internal SRAM Base Address"
|
|
line.long 0x14 "SramSize,Internal SRAM Size"
|
|
group.long 0x140++0x0b
|
|
line.long 0x00 "BitStreamRdPtr,Bit Stream Buffer Read Address"
|
|
line.long 0x04 "BitStreamWrPtr,Bit Stream Buffer Write Address"
|
|
line.long 0x08 "FrameNum,Encoded/Decoded Frame Number"
|
|
group.long 0x160++0x0f
|
|
line.long 0x00 "BusyFlag,Processing Busy Flag"
|
|
line.long 0x04 "RunCommand,Start/Stop Codec Run Command"
|
|
line.long 0x08 "RunIndex,Run Process Index"
|
|
line.long 0x0c "RunCodStd,Run Codec Standard"
|
|
group.long 0x180++0x33
|
|
line.long 0x00 "BitBufAddr,Bitstream Buffer Address"
|
|
line.long 0x04 "BitBufSize,Bitstream Buffer Size"
|
|
line.long 0x08 "FrameIntAddrY,Temporal Frame Y Address"
|
|
line.long 0x0c "FrameIntAddrCb,Temporal Frame Cb Address"
|
|
line.long 0x10 "FrameIntAddrCr,Temporal Frame Cr Address"
|
|
line.long 0x14 "EncCodStd,Encode Coding Standard"
|
|
line.long 0x18 "EncSrcFormat,Encode Source Frame Format"
|
|
line.long 0x1c "EncMp4Para,Encode MPEG4 Parameter"
|
|
line.long 0x20 "Enc263Para,Encode H.263 Parameter"
|
|
line.long 0x24 "Enc264Para,Encode H.264 Parameter"
|
|
line.long 0x28 "EncSliceMode,Encode Slice Mode"
|
|
line.long 0x2c "EncGopNum,Encode GOP Number"
|
|
line.long 0x30 "EncPictureQs,Encode Picture Quantize Step"
|
|
group.long 0x1c0++0x13
|
|
line.long 0x00 "RetStatus,Command Executing Result Status"
|
|
line.long 0x04 "RetSrcFormat,Decoded Source Format"
|
|
line.long 0x08 "RetMp4Info,Decoded MPEG4 Sequence Information"
|
|
line.long 0x0c "Ret263Info,Decoded H.263 Sequence Information"
|
|
line.long 0x10 "Ret264Info,Decoded H.264 Sequence Information"
|
|
;group.long 0x180++0x17
|
|
; line.long 0x00 "FrameSrcAddrY,Source Frame Y Address"
|
|
; line.long 0x04 "FrameSrcAddrCb,Source Frame Cb Address"
|
|
; line.long 0x08 "FrameSrcAddrCr,Source Frame Cr Address"
|
|
; line.long 0x0c "FrameDecAddrY,Decode Frame Y Address"
|
|
; line.long 0x10 "FrameDecAddrCb,Decode Frame Cb Address"
|
|
; line.long 0x14 "FrameDecAddrCr,Decode Frame Cr Address"
|
|
;group.long 0x1c0++0x03
|
|
; line.long 0x00 "RetStatus,Command Executing Result Status"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "eMMA_lt (enhanced Multimedia Accelerator Light)"
|
|
tree "Post Processor Registers"
|
|
base ad:0x10026000
|
|
width 18.
|
|
group.long 0x00++0x3f
|
|
line.long 0x00 "PP_CNTL,PP Control Register"
|
|
bitfld.long 0x00 12. " BSDI ,Byte Swap Input Data" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " CSC_OUT ,CSC Output" "32-bit,Reserved,16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SWRST ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x00 5.--6. " CSCTABLESEL ,CSC Table Select" "A1,A0,B1,B0"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CSCEN ,CSC Enable" "YUV 4:2:2,RGB"
|
|
bitfld.long 0x00 2. " DERINGEN ,De-ring Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DEBLOCKEN ,De-block Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PP_EN ,PP Enable" "Disabled,Enabled"
|
|
line.long 0x04 "PP_INTRCNTL,PP Interrupt Control Register"
|
|
bitfld.long 0x04 2. " ERR_INTR_EN ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " FRAME_COMP_INTR_EN ,Frame Complete Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x08 "PP_INTRSTATUS,PP Interrupt Status Register"
|
|
eventfld.long 0x08 2. " ERR_INTR ,Error Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 0. " FRAME_COM_INTR ,Frame Complete Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x0C "PP_SOURCE_Y_PTR,PP Source Y Address Register"
|
|
hexmask.long 0x0c 2.--31. 0x4 " PP_Y_SOURCE ,PP Y Source Parameter"
|
|
line.long 0x10 "PP_SOURCE_CB_PTR,PP Source CB Address Register"
|
|
hexmask.long 0x10 2.--31. 0x4 " PP_CB_SOURCE ,PP CB Source Parameter"
|
|
line.long 0x14 "PP_SOURCE_CR_PTR,PP Source CR Address Register"
|
|
hexmask.long 0x14 2.--31. 0x4 " PP_CR_SOURCE ,PP CR Source Parameter"
|
|
line.long 0x18 "PP_DEST_RGB_PTR,PP Destination RGB Frame Start Address Register"
|
|
hexmask.long 0x18 2.--31. 0x4 " RGB_START_ADDR ,RGB Start Address"
|
|
line.long 0x1C "PP_QUANTIZER_PTR,PP Quantizers Start Address Register"
|
|
hexmask.long 0x1c 2.--31. 0x4 " QUANTIZER_PTR ,Quantizer Parameter"
|
|
width 27.
|
|
line.long 0x20 "PP_PROCESS_FRAME_PARA,PP Process Frame Parameter Register"
|
|
hexmask.long.word 0x20 16.--25. 1. " PROCESS_FRAME_WIDTH ,Process Frame Width"
|
|
hexmask.long.word 0x20 0.--9. 1. " PROCESS_FRAME_HEIGHT ,Process Frame Height"
|
|
line.long 0x24 "PP_SOURCE_FRAME_WIDTH,PP Source Frame Width Register"
|
|
hexmask.long.byte 0x24 16.--23. 1. " QUANTIZER_FRAME_WIDTH ,Quantizer Frame Width"
|
|
hexmask.long.word 0x24 0.--11. 1. " Y_INPUT_LINE_STRIDE ,Y Input Line Stride"
|
|
line.long 0x28 "PP_DISPLAY_WIDTH,PP Destination Display Width"
|
|
hexmask.long.word 0x28 00.--12. 1. " OUTPUT_LINE_STRIDE ,Output Line Stride"
|
|
line.long 0x2C "PP_DEST_IMAGE_SIZE,PP Destination Image Size Register"
|
|
hexmask.long.word 0x2C 16.--27. 1. " OUT_IMAGE_WIDTH ,Out Image Width"
|
|
hexmask.long.word 0x2C 0.--11. 1. " OUT_IMAGE_HEIGHT ,Out Image Height"
|
|
line.long 0x30 "PP_DEST_FRAME_FORMAT_CNTL,PP Destination Frame Format Control Register"
|
|
hexmask.long.byte 0x30 26.--30. 1. " RED_OFFSET ,Red Offset"
|
|
hexmask.long.byte 0x30 21.--25. 1. " GREEN_OFFSET ,Green Offset"
|
|
textline " "
|
|
hexmask.long.byte 0x30 16.--20. 1. " BLUE_OFFSET ,Blue Offset"
|
|
bitfld.long 0x30 8.--11. " RED_WIDTH ,Red Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
textline " "
|
|
bitfld.long 0x30 4.--7. " GREEN_WIDTH ,Green Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
bitfld.long 0x30 0.--3. " BLUE_WIDTH ,Blue Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
line.long 0x34 "PP_RESIZE_INDEX,PP Resize Table Index Register"
|
|
bitfld.long 0x34 24.--29. " HORI_TBL_START_INDEX ,Horizontal Table Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,?..."
|
|
bitfld.long 0x34 16.--21. " HORI_TBL_END_INDEX ,Horizontal Table End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,?..."
|
|
textline " "
|
|
bitfld.long 0x34 8.--13. " VERT_TBL_START_INDEX ,Vertical Table Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,?..."
|
|
bitfld.long 0x34 0.--5. " VERT_TBL_END_INDEX ,Vertical Table End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,?..."
|
|
line.long 0x38 "PP_CSC_COEF_123,PP CSC Coefficients_123 Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " C0 ,CSC Coefficient 0"
|
|
hexmask.long.byte 0x38 16.--23. 1. " C1 ,CSC Coefficient 1"
|
|
hexmask.long.byte 0x38 8.--15. 1. " C2 ,CSC Coefficient 2"
|
|
hexmask.long.byte 0x38 0.--7. 1. " C3 ,CSC Coefficient 3"
|
|
line.long 0x3C "PP_CSC_COEF_4,PP CSC Coefficients Register"
|
|
bitfld.long 0x3C 9. " X0 ,Luminance Component Offset" "0,16"
|
|
hexmask.long.word 0x3C 0.--8. 1. " C4 ,CSC Coefficient 4"
|
|
tree "PP Resize Coefficient Table Registers"
|
|
width 22.
|
|
wgroup.long 0x100++0x7f
|
|
line.long 0x0 "PP_RESIZE_COEF_TBL0,PP Resize Coefficient Table 0 Register"
|
|
bitfld.long 0x0 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x0 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x0 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x4 "PP_RESIZE_COEF_TBL1,PP Resize Coefficient Table 1 Register"
|
|
bitfld.long 0x4 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x4 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x4 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x8 "PP_RESIZE_COEF_TBL2,PP Resize Coefficient Table 2 Register"
|
|
bitfld.long 0x8 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x8 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x8 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0xC "PP_RESIZE_COEF_TBL3,PP Resize Coefficient Table 3 Register"
|
|
bitfld.long 0xC 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0xC 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0xC 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x10 "PP_RESIZE_COEF_TBL4,PP Resize Coefficient Table 4 Register"
|
|
bitfld.long 0x10 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x10 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x10 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x14 "PP_RESIZE_COEF_TBL5,PP Resize Coefficient Table 5 Register"
|
|
bitfld.long 0x14 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x14 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x14 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x18 "PP_RESIZE_COEF_TBL6,PP Resize Coefficient Table 6 Register"
|
|
bitfld.long 0x18 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x18 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x18 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x1C "PP_RESIZE_COEF_TBL7,PP Resize Coefficient Table 7 Register"
|
|
bitfld.long 0x1C 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x1C 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x1C 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x20 "PP_RESIZE_COEF_TBL8,PP Resize Coefficient Table 8 Register"
|
|
bitfld.long 0x20 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x20 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x20 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x24 "PP_RESIZE_COEF_TBL9,PP Resize Coefficient Table 9 Register"
|
|
bitfld.long 0x24 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x24 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x24 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x28 "PP_RESIZE_COEF_TBL10,PP Resize Coefficient Table 10 Register"
|
|
bitfld.long 0x28 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x28 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x28 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x2C "PP_RESIZE_COEF_TBL11,PP Resize Coefficient Table 11 Register"
|
|
bitfld.long 0x2C 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x2C 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x2C 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x30 "PP_RESIZE_COEF_TBL12,PP Resize Coefficient Table 12 Register"
|
|
bitfld.long 0x30 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x30 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x30 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x34 "PP_RESIZE_COEF_TBL13,PP Resize Coefficient Table 13 Register"
|
|
bitfld.long 0x34 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x34 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x34 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x38 "PP_RESIZE_COEF_TBL14,PP Resize Coefficient Table 14 Register"
|
|
bitfld.long 0x38 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x38 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x38 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x3C "PP_RESIZE_COEF_TBL15,PP Resize Coefficient Table 15 Register"
|
|
bitfld.long 0x3C 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x3C 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x3C 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x40 "PP_RESIZE_COEF_TBL16,PP Resize Coefficient Table 16 Register"
|
|
bitfld.long 0x40 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x40 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x40 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x44 "PP_RESIZE_COEF_TBL17,PP Resize Coefficient Table 17 Register"
|
|
bitfld.long 0x44 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x44 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x44 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x48 "PP_RESIZE_COEF_TBL18,PP Resize Coefficient Table 18 Register"
|
|
bitfld.long 0x48 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x48 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x48 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x4C "PP_RESIZE_COEF_TBL19,PP Resize Coefficient Table 19 Register"
|
|
bitfld.long 0x4C 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x4C 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x4C 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x50 "PP_RESIZE_COEF_TBL20,PP Resize Coefficient Table 20 Register"
|
|
bitfld.long 0x50 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x50 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x50 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x54 "PP_RESIZE_COEF_TBL21,PP Resize Coefficient Table 21 Register"
|
|
bitfld.long 0x54 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x54 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x54 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x58 "PP_RESIZE_COEF_TBL22,PP Resize Coefficient Table 22 Register"
|
|
bitfld.long 0x58 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x58 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x58 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x5C "PP_RESIZE_COEF_TBL23,PP Resize Coefficient Table 23 Register"
|
|
bitfld.long 0x5C 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x5C 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x5C 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x60 "PP_RESIZE_COEF_TBL24,PP Resize Coefficient Table 24 Register"
|
|
bitfld.long 0x60 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x60 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x60 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x64 "PP_RESIZE_COEF_TBL25,PP Resize Coefficient Table 25 Register"
|
|
bitfld.long 0x64 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x64 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x64 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x68 "PP_RESIZE_COEF_TBL26,PP Resize Coefficient Table 26 Register"
|
|
bitfld.long 0x68 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x68 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x68 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x6C "PP_RESIZE_COEF_TBL27,PP Resize Coefficient Table 27 Register"
|
|
bitfld.long 0x6C 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x6C 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x6C 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x70 "PP_RESIZE_COEF_TBL28,PP Resize Coefficient Table 28 Register"
|
|
bitfld.long 0x70 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x70 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x70 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x74 "PP_RESIZE_COEF_TBL29,PP Resize Coefficient Table 29 Register"
|
|
bitfld.long 0x74 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x74 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x74 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x78 "PP_RESIZE_COEF_TBL30,PP Resize Coefficient Table 30 Register"
|
|
bitfld.long 0x78 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x78 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x78 0. " OP ,Output Pixels" "No output,Output"
|
|
line.long 0x7C "PP_RESIZE_COEF_TBL31,PP Resize Coefficient Table 31 Register"
|
|
bitfld.long 0x7C 3.--7. " W ,Weighting Coefficient" "0,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32"
|
|
bitfld.long 0x7C 1.--2. " N ,Number Of Pixels To Read" "No pixels,1,2,3"
|
|
bitfld.long 0x7C 0. " OP ,Output Pixels" "No output,Output"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "Pre-Processor Registers"
|
|
base asd:0x10026400
|
|
width 16.
|
|
group.long 0x00++0x83
|
|
line.long 0x00 "PRP_CNTL,PRP Control Register"
|
|
bitfld.long 0x00 31. " CH2FEN , Channel 2 Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CH2B2EN ,Channel 2 Buffer 2 Enable" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CH2B1EN ,Channel 2 Buffer 1 Enable" "Not ready,Ready"
|
|
bitfld.long 0x00 27.--28. " RZ_FIFO_LEVEL ,Resize FIFO Level" "64 words,48 words,32 words,16 words"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " INPUT_FIFO_LEVEL ,Input FIFO Level" "128 bits,96 bits,64 bits,32 bits"
|
|
textline " "
|
|
bitfld.long 0x00 22.--24. " CH2_TSKIP ,Channel 2 Skip Control" "No skip,Skip 1 out of every 2 (1-0),Skip 1 out of every 3 (1-0-1),Skip 2 out of every 3 (1-0-0),Skip 1 out of every 4 (1-1-1-0),Skip 3 out of every 4 (1-0-0-0),Skip 2 out of every 5 (1-0-1-0-1),Skip 4 out of every 5 (1-0-0-0-0)"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " CH1_TSKIP ,Channel 1 Skip Control" "No skip,Skip 1 out of every 2 (1-0),Skip 1 out of every 3 (1-0-1),Skip 2 out of every 3 (1-0-0),Skip 1 out of every 4 (1-1-1-0),Skip 3 out of every 4 (1-0-0-0),Skip 2 out of every 5 (1-0-1-0-1),Skip 4 out of every 5 (1-0-0-0-0)"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " IN_TSKIP ,Input Frame Skip" "No skip,Skip 1 out of every 2 (1-0),Skip 1 out of every 3 (1-0-1),Skip 2 out of every 3 (1-0-0),Skip 1 out of every 4 (1-1-1-0),Skip 3 out of every 4 (1-0-0-0),Skip 2 out of every 5 (1-0-1-0-1),Skip 4 out of every 5 (1-0-0-0-0)"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH1BYP ,Channel 1 Bypass" "Cascaded,Disabled"
|
|
bitfld.long 0x00 14. " WEN ,Window Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLKEN ,Clock Gating Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SWRST ,Software Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SKIP_FRAME ,Fram Skip" "Continue,Stopped"
|
|
bitfld.long 0x00 10. " CH2_LEN ,Channel 2 Loop Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CH1_LEN ,Channel 1 Loop Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7.--8. " CH2_OUT_MODE ,Channel-2 Output Mode" "YUV 4:2:0,YUV 4:2:2,YUV 4:4:4,YUV 4:2:0"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " CH1_OUT_MODE ,Channel-1 Output Mode" "8 bpp RGB,16 bpp RGB,32 bpp RGB,YUV 422"
|
|
bitfld.long 0x00 3.--4. " DATA_IN_MODE ,Data Input Mode" "YUV 4:2:0,YUV 4:2:2,16-bit RGB,32-bit RGB"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSIEN ,CSI Enable" "Main memory,CSI"
|
|
bitfld.long 0x00 1. " CH2EN ,Channel 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CH1EN ,Channel-1 Enable" "Disabled,Enabled"
|
|
line.long 0x04 "PRP_INTR_CNTL,PRP Interrupt Control Register"
|
|
bitfld.long 0x04 8. " CH2OVFIE ,Channel 2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " LBOVFIE ,Line Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " CH2FCIE ,Channel 2 Frame Complete Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CH1FCIE ,Channel 1 Frame Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CH2WERRIE ,Channel 2 Write Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CH1WERRIE ,Channel 1 Write Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RDERRIE ,Read Error Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x08 "PRP_INTRSTATUS,PRP Interrupt Status Register"
|
|
bitfld.long 0x08 8. " CH2OVF ,Channel 2 Buffer Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x08 7. " LBOVF ,Line Buffer Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x08 6. " CH1B1CI ,Channel 1 Buffer 1 Complete Interrupt" "Not complete,Complete"
|
|
bitfld.long 0x08 5. " CH1B2CI ,Channel 1 Buffer 2 Complete Interrupt" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x08 4. " CH2B1CI ,Channel 2 Buffer 1 Complete Interrupt" "Not complete,Complete"
|
|
bitfld.long 0x08 3. " CH2B2CI ,Channel 2 Buffer 2 Complete Interrupt" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x08 2. " CH2WRERR ,Channel 2 Write Error" "No error,Error"
|
|
bitfld.long 0x08 1. " CH1WRERR ,Channel 1 Write Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 0. " RDERR ,Read Error" "No error,Error"
|
|
width 19.
|
|
line.long 0x0C "PRP_SOURCE_Y_PTR,PRP Source Y Address Register"
|
|
line.long 0x10 "PRP_SOURCE_CB_PTR,PRP Source Cb Address Register"
|
|
line.long 0x14 "PRP_SOURCE_CR_PTR,PRP Source Cr Address Register"
|
|
line.long 0x18 "PRP_DEST_RGB1_PTR,PRP Destination RGB1 Start Address Register"
|
|
line.long 0x1C "PRP_DEST_RGB2_PTR,PRP Destination RGB2 Start Address Register"
|
|
line.long 0x20 "PRP_DEST_Y_PTR,PRP Destination Y Address Register"
|
|
line.long 0x24 "PRP_DEST_CB_PTR,PRP Destination Cb Address Register"
|
|
line.long 0x28 "PRP_DEST_CR_PTR,PRP Destination Cr Address Register"
|
|
width 27.
|
|
line.long 0x2C "PRP_SOURCE_FRAME_SIZE,PRP Source Frame Size Register"
|
|
hexmask.long.word 0x2C 16.--26. 1. " PICTURE_X_SIZE ,Picture X Size"
|
|
hexmask.long.word 0x2C 0.--10. 1. " PICTURE_Y_SIZE ,Picture Y Size"
|
|
line.long 0x30 "PRP_DEST_CH1_LINE_STRIDE,PRP Destination Channel 1 Line Stride Register"
|
|
hexmask.long.word 0x30 0.--11. 1. " CH1_OUT_LINE_STRIDE ,Channel 1 Out Line Stride"
|
|
line.long 0x34 "PRP_SRC_PIXEL_FORMAT_CNTL,PRP Source Pixel Format Control Register"
|
|
hexmask.long.byte 0x34 26.--30. 1. " RED_Y_OFFSET ,Red Y Offset"
|
|
hexmask.long.byte 0x34 21.--25. 1. " GREEN_U_CB_OFFSET ,Green U CB Offset"
|
|
textline " "
|
|
hexmask.long.byte 0x34 16.--20. 1. " BLUE_V_CR_OFFSET ,Blue V CR Offset"
|
|
bitfld.long 0x34 8.--11. " RED_WIDTH ,Red Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
textline " "
|
|
bitfld.long 0x34 4.--7. " GREEN_WIDTH ,Green Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
bitfld.long 0x34 0.--3. " BLUE_WIDTH ,Blue Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
line.long 0x38 "PRP_CH1_PIXEL_FORMAT_CNTL,PRP CH1 Pixel Format Control Register"
|
|
hexmask.long.byte 0x38 26.--30. 1. " RED_OFFSET ,Red Offset"
|
|
hexmask.long.byte 0x38 21.--25. 1. " GREEN_OFFSET ,Green Offset"
|
|
textline " "
|
|
hexmask.long.byte 0x38 16.--20. 1. " BLUE_OFFSET ,Blue Offset"
|
|
bitfld.long 0x38 8.--11. " RED_WIDTH ,Red Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
textline " "
|
|
bitfld.long 0x38 4.--7. " GREEN_WIDTH ,Green Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
bitfld.long 0x38 0.--3. " BLUE_WIDTH ,Blue Width" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8"
|
|
width 24.
|
|
line.long 0x3C "PRP_CH1_OUT_IMAGE_SIZE,PRP Destiantion Channel-1 Output Image Size Register"
|
|
hexmask.long.word 0x3C 16.--26. 1. " CH1_OUT_IMAGE_WIDTH ,Channel-1 Out Image Width"
|
|
hexmask.long.word 0x3C 0.--10. 1. " CH1_OUT_IMAGE_HEIGHT ,Channel-1 Out Image Height"
|
|
line.long 0x40 "PRP_CH2_OUT_IMAGE_SIZE,PRP Destination Channel-2 Output Image Size Register"
|
|
hexmask.long.word 0x40 16.--26. 1. " CH2_OUT_IMAGE_WIDTH ,Channel-2 Output Image Width"
|
|
hexmask.long.word 0x40 0.--10. 1. " CH2_OUT_IMAGE_HEIGHT ,Channel-2 Output Image Height"
|
|
line.long 0x44 "PRP_SOURCE_LINE_STRIDE,PRP Source Line Stride Register"
|
|
hexmask.long.word 0x44 16.--28. 1. " CSI_LINE_SKIP ,CSI Line Skip"
|
|
hexmask.long.word 0x44 0.--12. 1. " SOURCE_LINE_STRIDE ,Source Line Stride"
|
|
line.long 0x48 "PRP_CSC_COEF_012,PRP CSC Coefficient 012"
|
|
hexmask.long.byte 0x48 21.--28. 1. " C0 ,Coefficient 0"
|
|
hexmask.long.byte 0x48 11.--18. 1. " C1 ,Coefficient 1"
|
|
hexmask.long.byte 0x48 0.--07. 1. " C2 ,Coefficient 2"
|
|
line.long 0x4C "PRP_CSC_COEF_345,PRP CSC Coefficient 345"
|
|
hexmask.long.byte 0x4C 21.--28. 1. " C3 ,Coefficient 3"
|
|
hexmask.long.byte 0x4C 11.--19. 1. " C4 ,Coefficient 4"
|
|
hexmask.long.byte 0x4C 0.--06. 1. " C5 ,Coefficient 5"
|
|
line.long 0x50 "PRP_CSC_COEF_678,PRP CSC Coefficient 678"
|
|
bitfld.long 0x50 31. " X0 ,Luminance offset" "0,16"
|
|
hexmask.long.byte 0x50 21.--27. 1. " C6 ,Coefficient 6"
|
|
hexmask.long.byte 0x50 11.--17. 1. " C7 ,Coefficient 7"
|
|
hexmask.long.byte 0x50 0.--06. 1. " C8 ,Coefficient 8"
|
|
line.long 0x54 "PRP_CH1_RZ_HORI_COEF1,PRP Channel-1 Horizontal Resize Coefficient 1"
|
|
bitfld.long 0x54 28.--30. " HC9 ,Horizontal Resize Coefficient 9" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x54 25.--27. " HC8 ,Horizontal Resize Coefficient 8" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x54 22.--24. " HC7 ,Horizontal Resize Coefficient 7" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x54 19.--21. " HC6 ,Horizontal Resize Coefficient 6" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x54 16.--18. " HC5 ,Horizontal Resize Coefficient 5" "0,1,2,3,4,5,6,8"
|
|
textline " "
|
|
bitfld.long 0x54 12.--14. " HC4 ,Horizontal Resize Coefficient 4" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x54 09.--11. " HC3 ,Horizontal Resize Coefficient 3" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x54 06.--08. " HC2 ,Horizontal Resize Coefficient 2" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x54 03.--05. " HC1 ,Horizontal Resize Coefficient 1" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x54 00.--02. " HC0 ,Horizontal Resize Coefficient 0" "0,1,2,3,4,5,6,8"
|
|
line.long 0x58 "PRP_CH1_RZ_HORI_COEF2,PRP Channel 1 Horizontal Resize Coefficient 2"
|
|
bitfld.long 0x58 28.--30. " HC19 ,Horizontal Resize Coefficient 19" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x58 25.--27. " HC18 ,Horizontal Resize Coefficient 18" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x58 22.--24. " HC17 ,Horizontal Resize Coefficient 17" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x58 19.--21. " HC16 ,Horizontal Resize Coefficient 16" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x58 16.--18. " HC15 ,Horizontal Resize Coefficient 15" "0,1,2,3,4,5,6,8"
|
|
textline " "
|
|
bitfld.long 0x58 12.--14. " HC14 ,Horizontal Resize Coefficient 14" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x58 09.--11. " HC13 ,Horizontal Resize Coefficient 13" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x58 06.--08. " HC12 ,Horizontal Resize Coefficient 12" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x58 03.--05. " HC11 ,Horizontal Resize Coefficient 11" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x58 00.--02. " HC10 ,Horizontal Resize Coefficient 10" "0,1,2,3,4,5,6,8"
|
|
line.long 0x5C "PRP_CH1_RZ_HORI_VALID,PRP Channel-1 Resize Horizontal Valid"
|
|
bitfld.long 0x5C 31. " AVG_BIL ,Averaging Or Bilinear Mode Selector" "Averaging,Bi-linear"
|
|
hexmask.long.byte 0x5C 24.--28. 1. " HORI_TBL_LEN ,Horizontal Resize Table Length"
|
|
textline " "
|
|
bitfld.long 0x5C 19. " HOV19 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 18. " HOV18 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 17. " HOV17 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 16. " HOV16 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 15. " HOV15 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 14. " HOV14 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 13. " HOV13 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 12. " HOV12 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 11. " HOV11 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 10. " HOV10 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 09. " HOV9 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 08. " HOV8 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 07. " HOV7 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 06. " HOV6 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 05. " HOV5 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 04. " HOV4 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 03. " HOV3 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 02. " HOV2 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x5C 01. " HOV1 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x5C 00. " HOV0 ,Horizontal Output Valid" "Not output,Output"
|
|
line.long 0x60 "PRP_CH1_RZ_VERT_COEF1,PRP Channel 1 Vertical Resize Coefficient 1"
|
|
bitfld.long 0x60 28.--30. " VC9 ,Vertical Resize Coefficient 9" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x60 25.--27. " VC8 ,Vertical Resize Coefficient 8" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x60 22.--24. " VC7 ,Vertical Resize Coefficient 7" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x60 19.--21. " VC6 ,Vertical Resize Coefficient 6" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x60 16.--18. " VC5 ,Vertical Resize Coefficient 5" "0,1,2,3,4,5,6,8"
|
|
textline " "
|
|
bitfld.long 0x60 12.--14. " VC4 ,Vertical Resize Coefficient 4" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x60 9.--11. " VC3 ,Vertical Resize Coefficient 3" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x60 6.--8. " VC2 ,Vertical Resize Coefficient 2" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x60 3.--5. " VC1 ,Vertical Resize Coefficient 1" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x60 0.--2. " VC0 ,Vertical Resize Coefficient 0" "0,1,2,3,4,5,6,8"
|
|
line.long 0x64 "PRP_CH1_RZ_VERT_COEF2,PRP Channel-1 Vertical Resize Coefficient 2"
|
|
bitfld.long 0x64 28.--30. " VC19 ,Vertical Resize Coefficient 19" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x64 25.--27. " VC18 ,Vertical Resize Coefficient 18" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x64 22.--24. " VC17 ,Vertical Resize Coefficient 17" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x64 19.--21. " VC16 ,Vertical Resize Coefficient 16" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x64 16.--18. " VC15 ,Vertical Resize Coefficient 15" "0,1,2,3,4,5,6,8"
|
|
textline " "
|
|
bitfld.long 0x64 12.--14. " VC14 ,Vertical Resize Coefficient 14" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x64 9.--11. " VC13 ,Vertical Resize Coefficient 13" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x64 6.--8. " VC12 ,Vertical Resize Coefficient 12" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x64 3.--5. " VC11 ,Vertical Resize Coefficient 11" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x64 0.--2. " VC10 ,Vertical Resize Coefficient 10" "0,1,2,3,4,5,6,8"
|
|
line.long 0x68 "PrP_CH1_RZ_VERT_VALID,PRP Channel-1 Vertical Resize Valid"
|
|
bitfld.long 0x68 31. " AVG_BIL ,Averaging Or Bilinear Mode Select" "Averaging,Bi-linear"
|
|
hexmask.long.byte 0x68 24.--28. 1. " VERT_TBL_LEN ,Vertical Resize Table Length"
|
|
textline " "
|
|
bitfld.long 0x68 19. " VOV19 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 18. " VOV18 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 17. " VOV17 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 16. " VOV16 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 15. " VOV15 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 14. " VOV14 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 13. " VOV13 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 12. " VOV12 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 11. " VOV11 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 10. " VOV10 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 09. " VOV9 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 08. " VOV8 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 07. " VOV7 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 06. " VOV6 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 05. " VOV5 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 04. " VOV4 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 03. " VOV3 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 02. " VOV2 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x68 01. " VOV1 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x68 00. " VOV0 ,Vertical Output Valid" "Not output,Output"
|
|
line.long 0x6C "PRP_CH2_RZ_HORI_COEF1,PRP Channel 2 Horizontal Resize Coefficient 1"
|
|
bitfld.long 0x6C 28.--30. " HC9 ,Horizontal Resize Coefficient 9" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x6C 25.--27. " HC8 ,Horizontal Resize Coefficient 8" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x6C 22.--24. " HC7 ,Horizontal Resize Coefficient 7" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x6C 19.--21. " HC6 ,Horizontal Resize Coefficient 6" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x6C 16.--18. " HC5 ,Horizontal Resize Coefficient 5" "0,1,2,3,4,5,6,8"
|
|
textline " "
|
|
bitfld.long 0x6C 12.--14. " HC4 ,Horizontal Resize Coefficient 4" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x6C 9.--11. " HC3 ,Horizontal Resize Coefficient 3" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x6C 6.--8. " HC2 ,Horizontal Resize Coefficient 2" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x6C 3.--5. " HC1 ,Horizontal Resize Coefficient 1" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x6C 0.--2. " HC0 ,Horizontal Resize Coefficient 0" "0,1,2,3,4,5,6,8"
|
|
line.long 0x70 "PRP_CH2_RZ_HORI_COEF2,PRP Channel-2 Horizontal Resize Coefficient 2"
|
|
bitfld.long 0x70 28.--30. " HC19 ,Horizontal Resize Coefficient 19" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x70 25.--27. " HC18 ,Horizontal Resize Coefficient 18" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x70 22.--24. " HC17 ,Horizontal Resize Coefficient 17" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x70 19.--21. " HC16 ,Horizontal Resize Coefficient 16" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x70 16.--18. " HC15 ,Horizontal Resize Coefficient 15" "0,1,2,3,4,5,6,8"
|
|
textline " "
|
|
bitfld.long 0x70 12.--14. " HC14 ,Horizontal Resize Coefficient 14" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x70 9.--11. " HC13 ,Horizontal Resize Coefficient 13" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x70 6.--8. " HC12 ,Horizontal Resize Coefficient 12" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x70 3.--5. " HC11 ,Horizontal Resize Coefficient 11" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x70 0.--2. " HC10 ,Horizontal Resize Coefficient 10" "0,1,2,3,4,5,6,8"
|
|
line.long 0x74 "PRP_CH2_RZ_HORI_VALID,PRP Channel-2 Resize Horizontal Valid"
|
|
bitfld.long 0x74 31. " AVG_BIL ,Averaging Or Bilinear Mode Selector" "Averaging,Bi-linear"
|
|
hexmask.long.byte 0x74 24.--28. 1. " HORI_TBL_LEN ,Horizontal Resize Table Length"
|
|
textline " "
|
|
bitfld.long 0x74 19. " HOV19 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 18. " HOV18 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 17. " HOV17 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 16. " HOV16 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 15. " HOV15 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 14. " HOV14 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 13. " HOV13 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 12. " HOV12 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 11. " HOV11 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 10. " HOV10 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 09. " HOV9 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 08. " HOV8 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 07. " HOV7 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 06. " HOV6 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 05. " HOV5 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 04. " HOV4 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 03. " HOV3 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 02. " HOV2 ,Horizontal Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x74 01. " HOV1 ,Horizontal Output Valid" "Not output,Output"
|
|
bitfld.long 0x74 00. " HOV0 ,Horizontal Output Valid" "Not output,Output"
|
|
line.long 0x78 "PRP_CH2_RZ_VERT_COEF1,PRP Channel-2 Vertical Resize Coefficient 1"
|
|
bitfld.long 0x78 28.--30. " VC9 ,Vertical Resize Coefficient 9" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x78 25.--27. " VC8 ,Vertical Resize Coefficient 8" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x78 22.--24. " VC7 ,Vertical Resize Coefficient 7" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x78 19.--21. " VC6 ,Vertical Resize Coefficient 6" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x78 16.--18. " VC5 ,Vertical Resize Coefficient 5" "0,1,2,3,4,5,6,8"
|
|
textline " "
|
|
bitfld.long 0x78 12.--14. " VC4 ,Vertical Resize Coefficient 4" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x78 9.--11. " VC3 ,Vertical Resize Coefficient 3" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x78 6.--8. " VC2 ,Vertical Resize Coefficient 2" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x78 3.--5. " VC1 ,Vertical Resize Coefficient 1" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x78 0.--2. " VC0 ,Vertical Resize Coefficient 0" "0,1,2,3,4,5,6,8"
|
|
line.long 0x7C "PRP_CH2_RZ_VERT_COEF2,PRP Channel 2 Vertical Resize Coefficient 2"
|
|
bitfld.long 0x7C 28.--30. " VC19 ,Vertical Resize Coefficient 19" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x7C 25.--27. " VC18 ,Vertical Resize Coefficient 18" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x7C 22.--24. " VC17 ,Vertical Resize Coefficient 17" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x7C 19.--21. " VC16 ,Vertical Resize Coefficient 16" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x7C 16.--18. " VC15 ,Vertical Resize Coefficient 15" "0,1,2,3,4,5,6,8"
|
|
textline " "
|
|
bitfld.long 0x7C 12.--14. " VC14 ,Vertical Resize Coefficient 14" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x7C 9.--11. " VC13 ,Vertical Resize Coefficient 13" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x7C 6.--8. " VC12 ,Vertical Resize Coefficient 12" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x7C 3.--5. " VC11 ,Vertical Resize Coefficient 11" "0,1,2,3,4,5,6,8"
|
|
bitfld.long 0x7C 0.--2. " VC10 ,Vertical Resize Coefficient 10" "0,1,2,3,4,5,6,8"
|
|
line.long 0x80 "PRP_CH2_RZ_VERT_VALID,PRP Channel 2 Vertical Resize Valid"
|
|
bitfld.long 0x80 31. " AVG_BIL ,Averaging Or Bilinear Mode Selector" "Averaging,Bi-linear"
|
|
hexmask.long.byte 0x80 24.--28. 1. " VERT_TBL_LEN ,Vertical Resize Table Length"
|
|
textline " "
|
|
bitfld.long 0x80 19. " VOV19 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 18. " VOV18 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 17. " VOV17 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 16. " VOV16 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 15. " VOV15 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 14. " VOV14 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 13. " VOV13 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 12. " VOV12 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 11. " VOV11 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 10. " VOV10 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 09. " VOV9 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 08. " VOV8 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 07. " VOV7 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 06. " VOV6 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 05. " VOV5 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 04. " VOV4 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 03. " VOV3 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 02. " VOV2 ,Vertical Output Valid" "Not output,Output"
|
|
textline " "
|
|
bitfld.long 0x80 01. " VOV1 ,Vertical Output Valid" "Not output,Output"
|
|
bitfld.long 0x80 00. " VOV0 ,Vertical Output Valid" "Not output,Output"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "SSI (Synchronous Serial Interface)"
|
|
tree "SSI1"
|
|
base ad:0x10010000
|
|
width 9.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "STX0_1,SSI Transmit Data Register 0"
|
|
line.long 0x04 "STX1_1,SSI Transmit Data Register 1"
|
|
rgroup.long 0x08++0x07
|
|
line.long 0x00 "SRX0_1,SSI Receive Data Register 0"
|
|
line.long 0x04 "SRX1_1,SSI Receive Data Register 1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SCR1,SSI Control Register"
|
|
bitfld.long 0x00 9. " CLK_IST ,Clock Idle State" "0,1"
|
|
bitfld.long 0x00 8. " TCH_EN ,Two-Channel Operation Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SYS_CLK_EN ,System Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " I2SMODE[1:0] ,I2S Mode Select" "Normal,Master,Slave,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SYN ,Synchronous Mode" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 3. " NET ,Network Mode" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SSIEN ,SSI Enable" "Disabled,Enabled"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "SISR1,SSI Interrupt Status Register"
|
|
in
|
|
group.long 0x18++0x17
|
|
line.long 0x00 "SIER1,SSI Interrupt Enable Register"
|
|
bitfld.long 0x00 22. " RDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE , Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CMDAU_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CMDDU_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RXTW_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RDR1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RDR0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TDE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TDE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " ROE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ROE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TUE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TUE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TFS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TLS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RLS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RFF1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFF0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TFE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TFE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "STCR1,SSI Transmit Configuration Register"
|
|
bitfld.long 0x04 9. " TXBIT0 ,Transmit bit 0" "MSB,LSB"
|
|
bitfld.long 0x04 8. " TFEN1 ,Transmit FIFO Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TFEN0 ,Transmit FIFO Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " TFDIR ,Transmit Frame Direction" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x04 5. " TXDIR ,Transmit Clock Direction" "External,Internal"
|
|
bitfld.long 0x04 4. " TSHFD ,Transmit Shift Direction" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x04 3. " TSCKP ,Transmit Clock Polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x04 2. " TFSI ,Transmit Frame Sync Invert" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TFSL ,Transmit Frame Sync Length" "One-word,One-clock-bit"
|
|
bitfld.long 0x04 0. " TEFS ,Transmit Early Frame Sync" "First bit,One bit before"
|
|
line.long 0x08 "SRCR1,SSI Receive Configuration Register"
|
|
bitfld.long 0x08 10. " RXEXT ,Receive Data Extension" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " RXBIT0 ,Receive Bit 0" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x08 8. " RFEN1 ,Receive FIFO Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " RFEN0 ,Receive FIFO Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " RFDIR ,Receive Frame Direction" "External,Internal"
|
|
bitfld.long 0x08 5. " RXDIR ,Receive Clock Direction" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RSHFD ,Receive Shift Direction" "MSB,LSB"
|
|
bitfld.long 0x08 3. " RSCKP ,Receive Clock Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 2. " RFSI ,Receive Frame Sync Invert" "High,Low"
|
|
bitfld.long 0x08 1. " RFSL ,Receive Frame Sync Length" "One-word,One-clock-bit"
|
|
textline " "
|
|
bitfld.long 0x08 0. " REFS ,Receive Early Frame Sync" "One bit before,First bit"
|
|
line.long 0x0c "STCCR1,SSI Transmit Clock Control Register"
|
|
bitfld.long 0x0c 18. " DIV2 ,Divide by 2" "Bypassed,Div by 2"
|
|
bitfld.long 0x0c 17. " PSR ,Prescaler Range" "Bypassed,Div by 8"
|
|
textline " "
|
|
bitfld.long 0x0c 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
hexmask.long.byte 0x0c 8.--12. 1. " DC[4:0] ,Frame Rate Divider Control"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select"
|
|
line.long 0x10 "SRCCR1,SSI Receive Clock Control Register"
|
|
bitfld.long 0x10 18. " DIV2 ,Divide by 2" "Bypassed,Div by 2"
|
|
bitfld.long 0x10 17. " PSR ,Prescaler Range" "Bypassed,Div by 8"
|
|
textline " "
|
|
bitfld.long 0x10 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
hexmask.long.byte 0x10 8.--12. 1. " DC[4:0] ,Frame Rate Divider Control"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select"
|
|
line.long 0x14 "SFCSR1,SSI FIFO Control/Status Register"
|
|
bitfld.long 0x14 28.--31. " RFCNT1[3:0] ,Receive FIFO Counter 1" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x14 24.--27. " TFCNT1[3:0] ,Transmit FIFO Counter 1" "0,1,2,3,4,5,6,7,8,?..."
|
|
textline " "
|
|
bitfld.long 0x14 20.--23. " RFWM1[3:0] ,Receive FIFO Full Watermark 1" "Reserved,>= 1,>= 2,>= 3,>= 4,>= 5,>= 6,>= 7,8,?..."
|
|
bitfld.long 0x14 16.--19. " TFWM1[3:0] ,Transmit FIFO Empty Watermark 1" "Reserved,>= 1,>= 2,>= 3,>= 4,>= 5,>= 6,>= 7,8,?..."
|
|
textline " "
|
|
bitfld.long 0x14 12.--15. " RFCNT0[3:0] ,Receive FIFO Counter 0" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x14 8.--11. " TFCNT0[3:0] ,Transmit FIFO Counter 0" "0,1,2,3,4,5,6,7,8,?..."
|
|
textline " "
|
|
bitfld.long 0x14 4.--7. " RFWM0[3:0] ,Receive FIFO Full Watermark 0" "Reserved,>= 1,>= 2,>= 3,>= 4,>= 5,>= 6,>= 7,8,?..."
|
|
bitfld.long 0x14 0.--3. " TFWM0[3:0] ,Transmit FIFO Empty Watermark 0" "Reserved,>= 1,>= 2,>= 3,>= 4,>= 5,>= 6,>= 7,8,?..."
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "STR,SSI Test Register"
|
|
bitfld.long 0x00 15. " TEST ,Test Mode" "No effect,Test"
|
|
bitfld.long 0x00 14. " RCK2TCK ,Receive Clock to Transmit Clock Loop Back" "No effect,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RFS2TFS ,Receive Frame to Transmit Frame Loop Back" "No effect,Loopback"
|
|
hexmask.long.byte 0x00 8.--12. 1. " RXSTATE ,Receiver State Machine Status"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXD2RXD ,Transmit Data to Receive Data Loop Back" "No effect,Loopback"
|
|
bitfld.long 0x00 6. " TCK2RCK ,Transmit Clock to Receive Clock Loop Back" "No effect,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TFS2RFS ,Transmit Frame to Receive Frame Loop Back" "No effect,Loopback"
|
|
hexmask.long.byte 0x00 0.--4. 1. " TXSTATE ,Transmitter State Machine Status"
|
|
line.long 0x04 "SOR,SSI Option Register"
|
|
bitfld.long 0x04 6. " CLKOFF ,Clock Off" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " RX_CLR ,Receiver Clear" "No effect,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TX_CLR ,Transmitter Clear" "No effect,Flushed"
|
|
bitfld.long 0x04 3. " INIT ,Initialize" "No effect,Initialized"
|
|
textline " "
|
|
bitfld.long 0x04 1.--2. " WAIT ,Wait" "0,1,2,3"
|
|
bitfld.long 0x04 0. " SYNRST ,Frame Sync Reset" "No effect,Reset"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "SACNT1,SSI AC97 Control Register"
|
|
hexmask.long.byte 0x00 5.--10. 1. " FRDIV[5:0] ,Frame Rate Divider"
|
|
bitfld.long 0x00 4. " WR ,Write Command" "Not written,Written"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RD ,Read Command" "Not read,Read"
|
|
bitfld.long 0x00 2. " TIF ,Tag in FIFO " "SATAG,FIFO 0"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FV ,Fixed/Variable Operation" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " AC97EN ,AC97 Mode Enable" "Disabled,Enabled"
|
|
hgroup.long 0x3c++0x3
|
|
hide.long 0x00 "SACADD1,SSI AC97 Command Address Register"
|
|
in
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x08 "SACDAT1,SSI AC97 Command Data Register"
|
|
in
|
|
hgroup.long 0x44++0x3
|
|
hide.long 0x0c "SATAG1,SSI AC97 Tag Register"
|
|
in
|
|
group.long 0x48++0x7
|
|
line.long 0x00 "STMSK1,SSI Transmit Time Slot Mask Register"
|
|
bitfld.long 0x00 31. " STMSK[31] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 30. " STMSK[30] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STMSK[29] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 28. " STMSK[28] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " STMSK[27] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 26. " STMSK[26] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " STMSK[25] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 24. " STMSK[24] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " STMSK[23] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 22. " STMSK[22] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STMSK[21] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 20. " STMSK[20] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " STMSK[19] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 18. " STMSK[18] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " STMSK[17] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 16. " STMSK[16] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STMSK[15] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 14. " STMSK[14] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STMSK[13] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 12. " STMSK[12] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " STMSK[11] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 10. " STMSK[10] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STMSK[9] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 8. " STMSK[8] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STMSK[7] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 6. " STMSK[6] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STMSK[5] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 4. " STMSK[4] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STMSK[3] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 2. " STMSK[2] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STMSK[1] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 0. " STMSK[0] ,Transmit Mask" "Valid,Masked"
|
|
line.long 0x04 "SRMSK1,SSI Receive Time Slot Mask Register"
|
|
bitfld.long 0x04 31. " SRMSK[31] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 30. " SRMSK[30] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 29. " SRMSK[29] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 28. " SRMSK[28] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SRMSK[27] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 26. " SRMSK[26] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SRMSK[25] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 24. " SRMSK[24] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 23. " SRMSK[23] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 22. " SRMSK[22] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 21. " SRMSK[21] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 20. " SRMSK[20] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SRMSK[19] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 18. " SRMSK[18] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 17. " SRMSK[17] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 16. " SRMSK[16] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " SRMSK[15] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 14. " SRMSK[14] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SRMSK[13] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 12. " SRMSK[12] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 11. " SRMSK[11] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 10. " SRMSK[10] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 9. " SRMSK[9] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 8. " SRMSK[8] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SRMSK[7] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 6. " SRMSK[6] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " SRMSK[5] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 4. " SRMSK[4] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SRMSK[3] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 2. " SRMSK[2] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SRMSK[1] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 0. " SRMSK[0] ,Receive Mask" "Valid,Masked"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "SACCST1,SSI AC97 Channel Status Register"
|
|
bitfld.long 0x00 9. " SACCST[9] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SACCST[8] ,AC97 Channel Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SACCST[7] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SACCST[6] ,AC97 Channel Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SACCST[5] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SACCST[4] ,AC97 Channel Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SACCST[3] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SACCST[2] ,AC97 Channel Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SACCST[1] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SACCST[0] ,AC97 Channel Status" "Disabled,Enabled"
|
|
wgroup.long 0x54++0x07
|
|
line.long 0x00 "SACCEN1,SSI AC97 Channel Enable Register"
|
|
bitfld.long 0x00 9. " SACCEN[9] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " SACCEN[8] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SACCEN[7] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " SACCEN[6] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SACCEN[5] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " SACCEN[4] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SACCEN[3] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " SACCEN[2] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SACCEN[1] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " SACCEN[0] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
line.long 0x04 "SACCDIS1,SSI AC97 Channel Disable Register"
|
|
bitfld.long 0x04 9. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "SSI2"
|
|
base ad:0x10011000
|
|
width 9.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "STX0_2,SSI Transmit Data Register 0"
|
|
line.long 0x04 "STX1_2,SSI Transmit Data Register 1"
|
|
rgroup.long 0x08++0x07
|
|
line.long 0x00 "SRX0_2,SSI Receive Data Register 0"
|
|
line.long 0x04 "SRX1_2,SSI Receive Data Register 1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SCR2,SSI Control Register"
|
|
bitfld.long 0x00 9. " CLK_IST ,Clock Idle State" "0,1"
|
|
bitfld.long 0x00 8. " TCH_EN ,Two-Channel Operation Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SYS_CLK_EN ,System Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " I2SMODE[1:0] ,I2S Mode Select" "Normal,Master,Slave,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SYN ,Synchronous Mode" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 3. " NET ,Network Mode" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SSIEN ,SSI Enable" "Disabled,Enabled"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "SISR2,SSI Interrupt Status Register"
|
|
in
|
|
group.long 0x18++0x17
|
|
line.long 0x00 "SIER2,SSI Interrupt Enable Register"
|
|
bitfld.long 0x00 22. " RDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE , Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CMDAU_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CMDDU_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RXTW_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RDR1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RDR0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TDE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TDE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " ROE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ROE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TUE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TUE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TFS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TLS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RLS_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RFF1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFF0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TFE1_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TFE0_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "STCR2,SSI Transmit Configuration Register"
|
|
bitfld.long 0x04 9. " TXBIT0 ,Transmit bit 0" "MSB,LSB"
|
|
bitfld.long 0x04 8. " TFEN1 ,Transmit FIFO Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TFEN0 ,Transmit FIFO Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " TFDIR ,Transmit Frame Direction" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x04 5. " TXDIR ,Transmit Clock Direction" "External,Internal"
|
|
bitfld.long 0x04 4. " TSHFD ,Transmit Shift Direction" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x04 3. " TSCKP ,Transmit Clock Polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x04 2. " TFSI ,Transmit Frame Sync Invert" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TFSL ,Transmit Frame Sync Length" "One-word,One-clock-bit"
|
|
bitfld.long 0x04 0. " TEFS ,Transmit Early Frame Sync" "First bit,One bit before"
|
|
line.long 0x08 "SRCR2,SSI Receive Configuration Register"
|
|
bitfld.long 0x08 10. " RXEXT ,Receive Data Extension" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " RXBIT0 ,Receive Bit 0" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x08 8. " RFEN1 ,Receive FIFO Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " RFEN0 ,Receive FIFO Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " RFDIR ,Receive Frame Direction" "External,Internal"
|
|
bitfld.long 0x08 5. " RXDIR ,Receive Clock Direction" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RSHFD ,Receive Shift Direction" "MSB,LSB"
|
|
bitfld.long 0x08 3. " RSCKP ,Receive Clock Polarity" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 2. " RFSI ,Receive Frame Sync Invert" "High,Low"
|
|
bitfld.long 0x08 1. " RFSL ,Receive Frame Sync Length" "One-word,One-clock-bit"
|
|
textline " "
|
|
bitfld.long 0x08 0. " REFS ,Receive Early Frame Sync" "One bit before,First bit"
|
|
line.long 0x0c "STCCR2,SSI Transmit Clock Control Register"
|
|
bitfld.long 0x0c 18. " DIV2 ,Divide by 2" "Bypassed,Div by 2"
|
|
bitfld.long 0x0c 17. " PSR ,Prescaler Range" "Bypassed,Div by 8"
|
|
textline " "
|
|
bitfld.long 0x0c 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
hexmask.long.byte 0x0c 8.--12. 1. " DC[4:0] ,Frame Rate Divider Control"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select"
|
|
line.long 0x10 "SRCCR2,SSI Receive Clock Control Register"
|
|
bitfld.long 0x10 18. " DIV2 ,Divide by 2" "Bypassed,Div by 2"
|
|
bitfld.long 0x10 17. " PSR ,Prescaler Range" "Bypassed,Div by 8"
|
|
textline " "
|
|
bitfld.long 0x10 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
hexmask.long.byte 0x10 8.--12. 1. " DC[4:0] ,Frame Rate Divider Control"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select"
|
|
line.long 0x14 "SFCSR2,SSI FIFO Control/Status Register"
|
|
bitfld.long 0x14 28.--31. " RFCNT1[3:0] ,Receive FIFO Counter 1" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x14 24.--27. " TFCNT1[3:0] ,Transmit FIFO Counter 1" "0,1,2,3,4,5,6,7,8,?..."
|
|
textline " "
|
|
bitfld.long 0x14 20.--23. " RFWM1[3:0] ,Receive FIFO Full Watermark 1" "Reserved,>= 1,>= 2,>= 3,>= 4,>= 5,>= 6,>= 7,8,?..."
|
|
bitfld.long 0x14 16.--19. " TFWM1[3:0] ,Transmit FIFO Empty Watermark 1" "Reserved,>= 1,>= 2,>= 3,>= 4,>= 5,>= 6,>= 7,8,?..."
|
|
textline " "
|
|
bitfld.long 0x14 12.--15. " RFCNT0[3:0] ,Receive FIFO Counter 0" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x14 8.--11. " TFCNT0[3:0] ,Transmit FIFO Counter 0" "0,1,2,3,4,5,6,7,8,?..."
|
|
textline " "
|
|
bitfld.long 0x14 4.--7. " RFWM0[3:0] ,Receive FIFO Full Watermark 0" "Reserved,>= 1,>= 2,>= 3,>= 4,>= 5,>= 6,>= 7,8,?..."
|
|
bitfld.long 0x14 0.--3. " TFWM0[3:0] ,Transmit FIFO Empty Watermark 0" "Reserved,>= 1,>= 2,>= 3,>= 4,>= 5,>= 6,>= 7,8,?..."
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "STR,SSI Test Register"
|
|
bitfld.long 0x00 15. " TEST ,Test Mode" "No effect,Test"
|
|
bitfld.long 0x00 14. " RCK2TCK ,Receive Clock to Transmit Clock Loop Back" "No effect,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RFS2TFS ,Receive Frame to Transmit Frame Loop Back" "No effect,Loopback"
|
|
hexmask.long.byte 0x00 8.--12. 1. " RXSTATE ,Receiver State Machine Status"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXD2RXD ,Transmit Data to Receive Data Loop Back" "No effect,Loopback"
|
|
bitfld.long 0x00 6. " TCK2RCK ,Transmit Clock to Receive Clock Loop Back" "No effect,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TFS2RFS ,Transmit Frame to Receive Frame Loop Back" "No effect,Loopback"
|
|
hexmask.long.byte 0x00 0.--4. 1. " TXSTATE ,Transmitter State Machine Status"
|
|
line.long 0x04 "SOR,SSI Option Register"
|
|
bitfld.long 0x04 6. " CLKOFF ,Clock Off" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " RX_CLR ,Receiver Clear" "No effect,Flushed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TX_CLR ,Transmitter Clear" "No effect,Flushed"
|
|
bitfld.long 0x04 3. " INIT ,Initialize" "No effect,Initialized"
|
|
textline " "
|
|
bitfld.long 0x04 1.--2. " WAIT ,Wait" "0,1,2,3"
|
|
bitfld.long 0x04 0. " SYNRST ,Frame Sync Reset" "No effect,Reset"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "SACNT2,SSI AC97 Control Register"
|
|
hexmask.long.byte 0x00 5.--10. 1. " FRDIV[5:0] ,Frame Rate Divider"
|
|
bitfld.long 0x00 4. " WR ,Write Command" "Not written,Written"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RD ,Read Command" "Not read,Read"
|
|
bitfld.long 0x00 2. " TIF ,Tag in FIFO " "SATAG,FIFO 0"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FV ,Fixed/Variable Operation" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " AC97EN ,AC97 Mode Enable" "Disabled,Enabled"
|
|
hgroup.long 0x3c++0x3
|
|
hide.long 0x00 "SACADD2,SSI AC97 Command Address Register"
|
|
in
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x08 "SACDAT2,SSI AC97 Command Data Register"
|
|
in
|
|
hgroup.long 0x44++0x3
|
|
hide.long 0x0c "SATAG2,SSI AC97 Tag Register"
|
|
in
|
|
group.long 0x48++0x7
|
|
line.long 0x00 "STMSK2,SSI Transmit Time Slot Mask Register"
|
|
bitfld.long 0x00 31. " STMSK[31] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 30. " STMSK[30] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " STMSK[29] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 28. " STMSK[28] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " STMSK[27] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 26. " STMSK[26] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " STMSK[25] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 24. " STMSK[24] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " STMSK[23] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 22. " STMSK[22] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STMSK[21] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 20. " STMSK[20] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " STMSK[19] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 18. " STMSK[18] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " STMSK[17] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 16. " STMSK[16] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STMSK[15] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 14. " STMSK[14] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STMSK[13] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 12. " STMSK[12] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " STMSK[11] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 10. " STMSK[10] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STMSK[9] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 8. " STMSK[8] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STMSK[7] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 6. " STMSK[6] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STMSK[5] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 4. " STMSK[4] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STMSK[3] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 2. " STMSK[2] ,Transmit Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STMSK[1] ,Transmit Mask" "Valid,Masked"
|
|
bitfld.long 0x00 0. " STMSK[0] ,Transmit Mask" "Valid,Masked"
|
|
line.long 0x04 "SRMSK2,SSI Receive Time Slot Mask Register"
|
|
bitfld.long 0x04 31. " SRMSK[31] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 30. " SRMSK[30] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 29. " SRMSK[29] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 28. " SRMSK[28] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SRMSK[27] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 26. " SRMSK[26] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SRMSK[25] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 24. " SRMSK[24] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 23. " SRMSK[23] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 22. " SRMSK[22] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 21. " SRMSK[21] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 20. " SRMSK[20] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SRMSK[19] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 18. " SRMSK[18] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 17. " SRMSK[17] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 16. " SRMSK[16] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " SRMSK[15] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 14. " SRMSK[14] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SRMSK[13] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 12. " SRMSK[12] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 11. " SRMSK[11] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 10. " SRMSK[10] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 9. " SRMSK[9] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 8. " SRMSK[8] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SRMSK[7] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 6. " SRMSK[6] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " SRMSK[5] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 4. " SRMSK[4] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SRMSK[3] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 2. " SRMSK[2] ,Receive Mask" "Valid,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SRMSK[1] ,Receive Mask" "Valid,Masked"
|
|
bitfld.long 0x04 0. " SRMSK[0] ,Receive Mask" "Valid,Masked"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "SACCST2,SSI AC97 Channel Status Register"
|
|
bitfld.long 0x00 9. " SACCST[9] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SACCST[8] ,AC97 Channel Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SACCST[7] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SACCST[6] ,AC97 Channel Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SACCST[5] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SACCST[4] ,AC97 Channel Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SACCST[3] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SACCST[2] ,AC97 Channel Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SACCST[1] ,AC97 Channel Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SACCST[0] ,AC97 Channel Status" "Disabled,Enabled"
|
|
wgroup.long 0x54++0x07
|
|
line.long 0x00 "SACCEN2,SSI AC97 Channel Enable Register"
|
|
bitfld.long 0x00 9. " SACCEN[9] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " SACCEN[8] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SACCEN[7] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " SACCEN[6] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SACCEN[5] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " SACCEN[4] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SACCEN[3] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " SACCEN[2] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SACCEN[1] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " SACCEN[0] ,AC97 Channel Enable Register" "No effect,Enabled"
|
|
line.long 0x04 "SACCDIS2,SSI AC97 Channel Disable Register"
|
|
bitfld.long 0x04 9. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " SACCDIS ,AC97 Channel Disable Register" "No effect,Disabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "LCDC (Liquid Crystal Display Controller)"
|
|
base ad:0x10021000
|
|
width 0x9
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "LSSAR,Screen Start Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " SSA ,Screen Start Address Of LCD Panel"
|
|
line.long 0x04 "LSR,Size Register"
|
|
bitfld.long 0x04 28. " BusSize ,LCDC bus size" "64-bit,32-bit"
|
|
hexmask.long.byte 0x04 20.--25. 1. " XMAX ,Screen Width Divided By 16"
|
|
hexmask.long.word 0x04 0.--9. 1. " YMAX ,Screen Height"
|
|
line.long 0x08 "LVPWR,Virtual Page Width Register"
|
|
hexmask.long.word 0x08 0.--9. 1. " VPW ,Virtual Page Width"
|
|
if (((d.l(ad:(0x10021000+0xc)))&0x10000000)==0x10000000)
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "LCPR,Cursor Position Register"
|
|
bitfld.long 0x00 30.--31. " CC ,Cursor Control" "Disabled,OR,XOR,AND"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OP ,Arithmetic Operation Control" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 16.--25. 1. " CXP ,Cursor X Position"
|
|
hexmask.long.word 0x00 0.--9. 1. " CYP ,Cursor Y Position"
|
|
else
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "LCPR,Cursor Position Register"
|
|
bitfld.long 0x00 30.--31. " CC ,Cursor Control" "Disabled,1 for non-color displays,Reversed,0 for non-color displays"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OP ,Arithmetic Operation Control" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 16.--25. 1. " CXP ,Cursor X Position"
|
|
hexmask.long.word 0x00 0.--9. 1. " CYP ,Cursor Y Position"
|
|
endif
|
|
group.long 0x10++0x2f
|
|
line.long 0x00 "LCWHBR,Cursor Width Height and Blink Register"
|
|
bitfld.long 0x00 31. " BK_EN ,Blink Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--28. " CW ,Cursor Width" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " CH ,Cursor Height" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " BD ,Blink Divisor"
|
|
line.long 0x04 "LCCMR,Color Cursor Mapping Register"
|
|
bitfld.long 0x04 12.--17. " CUR_COL_R ,Cursor Red Field" "No red,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,Full red"
|
|
bitfld.long 0x04 6.--11. " CUR_COL_G ,Cursor Green Field" "No green,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,Full green"
|
|
bitfld.long 0x04 0.--5. " CUR_COL_B ,Cursor Blue Field" "No blue,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,Full blue"
|
|
line.long 0x08 "LPCR,Panel Configuration Register"
|
|
bitfld.long 0x08 31. " TFT ,Interfaces to TFT Display" "Passive,Active"
|
|
bitfld.long 0x08 30. " COLOR ,Interfaces to Color Display" "Monochrome,Color"
|
|
bitfld.long 0x08 28.--29. " PBSIZ ,Panel Bus Width" "1-bit,Reserved,4-bit,8-bit"
|
|
textline " "
|
|
bitfld.long 0x08 25.--27. " BPIX ,Bits Per Pixel" "1 bpp/FRCBypss,2 bpp,4 bpp,8 bpp,12 bpp(16 bits),16 bpp,18 bpp(32 bits),?..."
|
|
bitfld.long 0x08 24. " PIXPOL ,Pixel Polarity" "High,Low"
|
|
bitfld.long 0x08 23. " FLMPOL ,First Line Marker Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x08 22. " LPPOL ,Line Pulse Polarity" "High,Low"
|
|
bitfld.long 0x08 21. " CLKPOL ,LCD Shift Clock Polarity" "Negative edge,Positive edge"
|
|
bitfld.long 0x08 20. " OEPOL ,Output Enable Polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SCLKIDLE ,LSCLK Idle Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " END_SEL ,Endian Select" "Little endian,Big endian"
|
|
bitfld.long 0x08 17. " SWAP_SEL ,Swap Select" "16/12 bpp,8/4/2/1 bpp"
|
|
textline " "
|
|
bitfld.long 0x08 16. " REV_VS ,Reverse Vertical Scan" "Normal,Reverse"
|
|
bitfld.long 0x08 15. " ACDSEL ,ACD Clock Source Select" "FRM,LP/HSYN"
|
|
hexmask.long.byte 0x08 8.--14. 1. " ACD ,Alternate Crystal Direction"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SCLKSEL ,LSCLK Select" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " SHARP ,Sharp Panel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--5. " PCD ,Pixel Clock Divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
line.long 0x0c "LHCR,Horizontal Configuration Register"
|
|
bitfld.long 0x0c 26.--31. " H_WIDTH ,Horizontal Sync Pulse Width" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " H_WAIT_1 ,Wait Between OE And HSYNC"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " H_WAIT_2 ,Wait Between HSYNC And Start Of Next Line"
|
|
line.long 0x10 "LVCR,Vertical Configuration Register"
|
|
hexmask.long.byte 0x10 26.--31. 1. " V_WIDTH ,Vertical Sync Pulse Width"
|
|
hexmask.long.byte 0x10 8.--15. 1. " V_WAIT_1 ,Wait Between Frames 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " V_WAIT_2 ,Wait Between Frames 2"
|
|
line.long 0x14 "LPOR,Panning Offset Register"
|
|
hexmask.long.byte 0x14 0.--4. 1. " POS ,Panning Offset"
|
|
line.long 0x18 "LSCR,Sharp Configuration 1 Register"
|
|
bitfld.long 0x18 26.--31. " PS_RISE_DELAY ,PS Rise Delay" "0 LSCLK,1 LSCLK,2 LSCLK,3 LSCLK,4 LSCLK,5 LSCLK,6 LSCLK,7 LSCLK,8 LSCLK,9 LSCLK,10 LSCLK,11 LSCLK,12 LSCLK,13 LSCLK,14 LSCLK,15 LSCLK,16 LSCLK,17 LSCLK,18 LSCLK,19 LSCLK,20 LSCLK,21 LSCLK,22 LSCLK,23 LSCLK,24 LSCLK,25 LSCLK,26 LSCLK,27 LSCLK,28 LSCLK,29 LSCLK,30 LSCLK,31 LSCLK,32 LSCLK,33 LSCLK,34 LSCLK,35 LSCLK,36 LSCLK,37 LSCLK,38 LSCLK,39 LSCLK,40 LSCLK,41 LSCLK,42 LSCLK,43 LSCLK,44 LSCLK,45 LSCLK,46 LSCLK,47 LSCLK,48 LSCLK,49 LSCLK,50 LSCLK,51 LSCLK,52 LSCLK,53 LSCLK,54 LSCLK,55 LSCLK,56 LSCLK,57 LSCLK,58 LSCLK,59 LSCLK,60 LSCLK,61 LSCLK,62 LSCLK,63 LSCLK"
|
|
hexmask.long.byte 0x18 16.--23. 1. " CLS_RISE_DELAY ,CLS Rise Delay"
|
|
bitfld.long 0x18 8.--11. " REV_TOGGLE_DELAY ,REV Toggle Delay" "1 LSCLK,2 LSCLK,3 LSCLK,4 LSCLK,5 LSCLK,6 LSCLK,7 LSCLK,8 LSCLK,9 LSCLK,10 LSCLK,11 LSCLK,12 LSCLK,13 LSCLK,14 LSCLK,15 LSCLK,16 LSCLK"
|
|
textline " "
|
|
bitfld.long 0x18 4.--7. " GRAY_2 ,Gray-Scale 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x18 0.--3. " GRAY_1 ,Gray-Scale 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x1C "LPCCR,PWM Contrast Control Register"
|
|
hexmask.long.word 0x1c 16.--24. 1. " CLS_HI_WIDTH ,CLS High Pulse Width"
|
|
bitfld.long 0x1c 15. " LDMSK ,LD Mask" "Normal,Masked"
|
|
bitfld.long 0x1c 9.--10. " SCR ,Source Select" "Line pulse,Pixel clock,LCD clock,?..."
|
|
textline " "
|
|
bitfld.long 0x1c 8. " CC_EN ,Contrast Control Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PW ,Pulse-Width"
|
|
line.long 0x20 "LDCR,DMA Control Register"
|
|
bitfld.long 0x20 31. " BURST ,Burst Length" "Dynamic,Fixed"
|
|
hexmask.long.byte 0x20 16.--22. 1. " HM ,DMA High Mark"
|
|
hexmask.long.byte 0x20 0.--6. 1. " TM ,DMA Trigger Mark"
|
|
line.long 0x24 "LRMCR,Refresh Mode Control Register"
|
|
bitfld.long 0x24 0. " SELF_REF ,Self-Refresh" "Disabled,Enabled"
|
|
line.long 0x28 "LICR,Interrupt Configuration Register"
|
|
bitfld.long 0x28 4. " GW_INT_CON ,Graphic Window Interrupt" "End,Begin"
|
|
bitfld.long 0x28 2. " INTSYN ,Interrupt Source" "Load,Output"
|
|
bitfld.long 0x28 0. " INTCON ,Interrupt Condition" "EOF,BOF"
|
|
line.long 0x2C "LIER,Interrupt Enable Register"
|
|
bitfld.long 0x2C 7. " GW_UDR_ERR_EN ,Graphic Window Underrun Error Interrupt Enable" "Masked,Enabled"
|
|
bitfld.long 0x2C 6. " GW_ERR_RES_EN ,Graphic Window Error Response Interrupt Enable" "Masked,Enabled"
|
|
bitfld.long 0x2C 5. " GW_EOF_EN ,Graphic Window End Of Frame Interrupt Enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 4. " GW_BOF_EN ,Graphic Window Beginning Of Frame Interrupt Enable" "Masked,Enabled"
|
|
bitfld.long 0x2C 3. " UDR_ERR_EN ,Underrun Error Interrupt Enable" "Masked,Enabled"
|
|
bitfld.long 0x2C 2. " ERR_RES_EN ,Error Response Interrupt Enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 1. " EOF_EN ,End Of Frame Interrupt Enable" "Masked,Enabled"
|
|
bitfld.long 0x2C 0. " BOF_EN ,Beginning of Frame Interrupt Enable" "Masked,Enabled"
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "LISR,Interrupt Status Register"
|
|
in
|
|
group.long 0x50++0x1b
|
|
line.long 0x00 "LGWSAR,Graphic Window Start Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " GWSA ,Graphic Window Start Address On LCD Screen"
|
|
line.long 0x04 "LGWSR,Graphic Window Size Register"
|
|
hexmask.long.byte 0x04 20.--25. 1. " GWW ,Graphic Window Width Divided By 16"
|
|
hexmask.long.word 0x04 0.--9. 1. " GWH ,Graphic Window Height"
|
|
line.long 0x08 "LGWVPWR,Graphic Window Virtual Page Width Register"
|
|
hexmask.long.word 0x08 0.--9. 1. " GWVPW ,Graphic Window Virtual Page Width"
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|
line.long 0x0C "LGWPOR,Graphic Window Panning Offest Register"
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|
hexmask.long.byte 0x0C 0.--4. 1. " GWPO ,Graphic Window Panning Offset"
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|
line.long 0x10 "LGWPR,Graphic Window Position Register"
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|
hexmask.long.word 0x10 16.--25. 1. " GWXP ,Graphic Window X Position"
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hexmask.long.word 0x10 0.--9. 1. " GWYP ,Graphic Window Y Position"
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line.long 0x14 "LGWCR,Graphic Window Control Register"
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|
bitfld.long 0x14 31. " GWAV31 ,Graphic Window Alpha Value" "Not displayed,Displayed"
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|
bitfld.long 0x14 30. " GWAV30 ,Graphic Window Alpha Value" "Not displayed,Displayed"
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|
bitfld.long 0x14 29. " GWAV29 ,Graphic Window Alpha Value" "Not displayed,Displayed"
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|
textline " "
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bitfld.long 0x14 28. " GWAV28 ,Graphic Window Alpha Value" "Not displayed,Displayed"
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|
bitfld.long 0x14 27. " GWAV27 ,Graphic Window Alpha Value" "Not displayed,Displayed"
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bitfld.long 0x14 26. " GWAV26 ,Graphic Window Alpha Value" "Not displayed,Displayed"
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|
textline " "
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bitfld.long 0x14 25. " GWAV25 ,Graphic Window Alpha Value" "Not displayed,Displayed"
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|
bitfld.long 0x14 24. " GWAV24 ,Graphic Window Alpha Value" "Not displayed,Displayed"
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bitfld.long 0x14 23. " GWCKE ,Graphic Window Color Keying Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x14 22. " GWE ,Graphic Window Enable" "Disabled,Enabled"
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bitfld.long 0x14 21. " GW_RVS ,Graphic Window Reverse Vertical Scan" "Normal,Reverse"
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bitfld.long 0x14 12.--17. " GWCKR ,Graphic Window Color Keying Red Component" "No red,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,Full red"
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textline " "
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bitfld.long 0x14 6.--11. " GWCKG ,Graphic Window Color Keying Green Component" "No green,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,Full green"
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bitfld.long 0x14 0.--5. " GWCKB ,Graphic Window Color Keying Blue Component" "No blue,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,Full blue"
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line.long 0x18 "LGWDCR,Graphic Window DMA Control Register"
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bitfld.long 0x18 31. " GWBT ,Graphic Window DMA Burst Type" "Dynamic,Fixed"
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hexmask.long.byte 0x18 16.--22. 1. " GWHM ,Graphic Window DMA High Mark"
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hexmask.long.byte 0x18 0.--6. 1. " GWTM ,Graphic Window DMA Low Mark"
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if (((d.l(ad:(0x10021000+0x80)))&0x80000000)==0x80000000)
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;AUS mode
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group.long 0x80++0x07
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line.long 0x00 "LAUSCR,LCDC AUS Mode Control Register"
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bitfld.long 0x00 31. " AUSMode ,AUS Mode Control" "Normal,AUS"
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hexmask.long.byte 0x00 16.--23. 1. " AGWCKR ,AUS Graphic Window Color Keying Red Component"
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hexmask.long.byte 0x00 8.--15. 1. " AGWCKG ,AUS Graphic Window Color Keying Green Component"
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textline " "
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hexmask.long.byte 0x00 0.--7. 1. " AGWCKB ,AUS Graphic Window Color Keying Blue Component"
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line.long 0x04 "LAUSCCR,LCDC AUS Mode Cursor Control Register"
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hexmask.long.byte 0x04 16.--23. 1. " ACUR_COL_R ,AUS Cursor Red Field"
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hexmask.long.byte 0x04 8.--15. 1. " ACUR_COL_G ,AUS Cursor Red Field"
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hexmask.long.byte 0x04 0.--7. 1. " ACUR_COL_B ,AUS Cursor Red Field"
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else
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;Normal mode
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group.long 0x80++0x07
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line.long 0x00 "LAUSCR,LCDC AUS Mode Control Register"
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bitfld.long 0x00 31. " AUSMode ,AUS Mode Control" "Normal,AUS"
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textline " "
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line.long 0x04 "LAUSCCR,LCDC AUS Mode Cursor Control Register"
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endif
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group.long 0x800++0x03
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line.long 0x00 "BGLUT,Background Lookup Table"
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button "BGLUT" "d ad:0x10021800--ad:0x10021BFC /long"
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group.long 0xc00++0x03
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line.long 0x00 "GWLUT,Graphic Window Lookup Table"
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button "GWLUT" "d ad:0x10021C00--ad:0x10021FFC /long"
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width 0xb
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|
tree.end
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tree "SLCDC (Smart Liquid Crystal Display Controller)"
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base ad:0x10022000
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width 21.
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group.long 0x00++0x2b
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line.long 0x00 "DATABASEADR,Data Buffer Base Address Register"
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hexmask.long 0x00 2.--31. 0x4 " DATABASEADR ,Data Buffer Base Address"
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line.long 0x04 "DATABUFSIZE,Data Buffer Size Register"
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hexmask.long.tbyte 0x04 0.--16. 1. " DATABUFSIZE ,Data Buffer Size"
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line.long 0x08 "COMBASEADR,Command Buffer Base Address Register"
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hexmask.long 0x08 2.--31. 0x4 " COMBASEADR ,Command Buffer Base Address"
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line.long 0x0C "COMBUFSIZ,Command Buffer Size Register"
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hexmask.long.tbyte 0x0C 0.--16. 1. " COMBUFSIZ ,Command Buffer Size"
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line.long 0x10 "COMSTRINGSIZ,Command String Size Register"
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hexmask.long.byte 0x10 0.--7. 1. " COMSTRINGSIZ ,Command String Size"
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line.long 0x14 "FIFOCONFIG,FIFO Configuration Register"
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bitfld.long 0x14 0.--2. " BURST ,DMA Burst Length" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words"
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line.long 0x18 "LCDCONFIG,LCD Controller Configuration Register"
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hexmask.long.word 0x18 0.--12. 1. " WORDPPAGE ,LCD Bytes Per Page"
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line.long 0x1C "LCDTRANSCONFIG,LCD Transfer Configuration Register"
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bitfld.long 0x1C 16.--17. " IMGEND ,Image Endianess" "Big Endian/32-bit little endian,16-bit little endian,8-bit little endian,?..."
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|
textline " "
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bitfld.long 0x1C 5. " WORDDEFWRITE ,Word Define - Write Data" "8-bit,16-bit"
|
|
textline " "
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bitfld.long 0x1C 4. " WORDDEFDAT ,Word Define - Data" "8-bit,16-bit"
|
|
textline " "
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bitfld.long 0x1C 3. " WORDDEFCOM ,Word Define - Command" "8-bit,16-bit"
|
|
textline " "
|
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bitfld.long 0x1C 2. " XFRMODE ,Image Data Transfer Width" "Serial,Parallel"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " CSPOL ,Chip Select Polarity" "Low,High"
|
|
textline " "
|
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bitfld.long 0x1C 0. " SKCPOL ,Serial Data Clock Polarity" "Rising edge,Falling edge"
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line.long 0x20 "SLCDCCONTROL/STATUS,SLCDC Control/Status Register"
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bitfld.long 0x20 11.--12. " AUTOMODE ,Automatic Transfer Mode" "LCD_RS = 0,LCD_RS = 1,10,?..."
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bitfld.long 0x20 8. " PROT1 ,R-AHB Protection Code" "User,Privileged"
|
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bitfld.long 0x20 7. " IRQEN ,Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
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eventfld.long 0x20 6. " IRQ ,SLCDC Interrupt Flag" "Not pending,Pending"
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|
eventfld.long 0x20 5. " UNDRFLOW ,SLCDC FIFO Underflow" "No underflow,Underflow"
|
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eventfld.long 0x20 4. " TEA ,SLCDC DMA Transfer Error" "No error,Error"
|
|
textline " "
|
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bitfld.long 0x20 2. " BUSY ,SLCDC Busy" "Idle,Busy"
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|
bitfld.long 0x20 1. " ABORT ,Abort SLCDC Transfer" "Not aborted,Aborted"
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bitfld.long 0x20 0. " GO ,Start SLCDC Transfer" "Not started,Started"
|
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line.long 0x24 "LCDCLOCKCONFIG,LCD Clock Configuration Register"
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bitfld.long 0x24 0.--5. " DIVIDE ,LCD Clock Divide Value" "Disabled,HCLK_SLCDC clock/128,HCLK_SLCDC clock*2/128,HCLK_SLCDC clock*3/128,HCLK_SLCDC clock*4/128,HCLK_SLCDC clock*5/128,HCLK_SLCDC clock*6/128,HCLK_SLCDC clock*7/128,HCLK_SLCDC clock*8/128,HCLK_SLCDC clock*9/128,HCLK_SLCDC clock*10/128,HCLK_SLCDC clock*11/128,HCLK_SLCDC clock*12/128,HCLK_SLCDC clock*13/128,HCLK_SLCDC clock*14/128,HCLK_SLCDC clock*15/128,HCLK_SLCDC clock*16/128,HCLK_SLCDC clock*17/128,HCLK_SLCDC clock*18/128,HCLK_SLCDC clock*19/128,HCLK_SLCDC clock*20/128,HCLK_SLCDC clock*21/128,HCLK_SLCDC clock*22/128,HCLK_SLCDC clock*23/128,HCLK_SLCDC clock*24/128,HCLK_SLCDC clock*25/128,HCLK_SLCDC clock*26/128,HCLK_SLCDC clock*27/128,HCLK_SLCDC clock*28/128,HCLK_SLCDC clock*29/128,HCLK_SLCDC clock*30/128,HCLK_SLCDC clock*31/128,HCLK_SLCDC clock*32/128,HCLK_SLCDC clock*33/128,HCLK_SLCDC clock*34/128,HCLK_SLCDC clock*35/128,HCLK_SLCDC clock*36/128,HCLK_SLCDC clock*37/128,HCLK_SLCDC clock*38/128,HCLK_SLCDC clock*39/128,HCLK_SLCDC clock*40/128,HCLK_SLCDC clock*41/128,HCLK_SLCDC clock*42/128,HCLK_SLCDC clock*43/128,HCLK_SLCDC clock*44/128,HCLK_SLCDC clock*45/128,HCLK_SLCDC clock*46/128,HCLK_SLCDC clock*47/128,HCLK_SLCDC clock*48/128,HCLK_SLCDC clock*49/128,HCLK_SLCDC clock*50/128,HCLK_SLCDC clock*51/128,HCLK_SLCDC clock*52/128,HCLK_SLCDC clock*53/128,HCLK_SLCDC clock*54/128,HCLK_SLCDC clock*55/128,HCLK_SLCDC clock*56/128,HCLK_SLCDC clock*57/128,HCLK_SLCDC clock*58/128,HCLK_SLCDC clock*59/128,HCLK_SLCDC clock*60/128,HCLK_SLCDC clock*61/128,HCLK_SLCDC clock*62/128,HCLK_SLCDC clock*63/128"
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|
line.long 0x28 "LCDWRITEDATA,LCD Write Data Register"
|
|
bitfld.long 0x28 16. " RS ,LCD Register Select" "LCD_RS = 0,LCD_RS = 1"
|
|
hexmask.long.word 0x28 0.--15. 1. " LCDDAT ,LCD Controller Data"
|
|
width 0xb
|
|
tree.end
|
|
textline ""
|