33777 lines
2.1 MiB
33777 lines
2.1 MiB
; --------------------------------------------------------------------------------
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; @Title: LPC2xxx On-Chip Peripherals
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; @Props: Released
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; @Author: WOJ, (ADI), (BOB), (FIL), (GAC), (KAM), (SYL)
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; @Changelog: 2006-01-14 WOJ
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; @Manufacturer: NXP - NXP Semiconductors
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; @Doc: UM10139_1.pdf; UM10139_1.pdf; lpc2101_2102_2103UM.pdf
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; user.manual.lpc2131.lpc2132.lpc2134.lpc2136.lpc2138.pdf (Rev. 02 - 2006-07-25)
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; user.manual.lpc2131.lpc2132.lpc2134.lpc2136.lpc2138.pdf (Rev. 02 - 2006-07-25)
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; lpc2210_2220UM.pdf (Rev. 01 - 2005-10-12)
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; user.manual.LPC2364.LPC2366.LPC2368.LPC2378.pdf (UM10211 Rev. 01 - 2006-10-06)
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; user.manual.lpc2880.lpc2888.pdf (Rev. 01 - 5 2006-08-05)
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; UM_LPC2114_2124_2212_2214_2.pdf; UM_LPC21XX_LPC22XX_2.pdf
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; UM_LPC21XX_LPC22XX_2.pdf; user.manual.lpc2468.pdf
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; LPC23xx_UM10211_2.pdf (Rev. 02 - 2009-02-11)
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; UM10237_2.pdf (Rev. 02 - 2008-12-10); SAF1562_1.pdf
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; @Core: ARM
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perlpc2xxx.per 17441 2024-02-02 17:32:46Z kwisniewski $
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; LPC Supported:
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; 2101 2102 2103 2104 2105 2106
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; 2114 2119
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; 2124 2129
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; 2131 2131/01 2132 2132/01 2134 2134/01 2136 2136/01 2138 2138/01
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; 2141 2142 2144 2146 2148
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; 2157 2158
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; 2194
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; 2212 2214
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; 2210 2220
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; 2880 2888
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; 2290 2292 2294
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; 2361 2362 2364 2365 2366 2367 2368 2377 2378 2387 2388
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; 2420 2458 2460 2468 2470 2478
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; Known problems: In the documentation of LPC2210/20 the "VPB peripheries and base addresses" map (page 25) SSP module is shown two times with different base addresses
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config 16. 8.
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width 0xB
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base ad:0x00000000
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; --------------------------------------------------------------------------------
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; cm FOR ALL PROCESSORS
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; --------------------------------------------------------------------------------
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; --------------------------------------------------------------------------------
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; MAM
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; --------------------------------------------------------------------------------
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tree "MAM (Memory Acceleration Module)"
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sif (cpu()=="LPC2880"||cpu()=="LPC2888")
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elif ((cpu()=="LPC2210")||(cpu()=="LPC2220")||(cpu()=="LPC2420")||(cpu()=="LPC2460")||(cpu()=="LPC2470"))
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;do not include anything
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elif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||cpu()=="LPC2458"||cpu()=="LPC2478")
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width 0x08
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group.byte ad:0xE01FC000++0x00
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line.byte 0x00 "MAMCR,MAM Control Register"
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bitfld.byte 0x00 0.--1. " MAM_mode_control ,MAM Mode Control Bits" "Disabled,Partially enabled,Fully enabled,?..."
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group.byte ad:0xE01FC004++0x00
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line.byte 0x0 "MAMTIM,MAM Timing Register"
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bitfld.byte 0x0 0.--2. " MAM_fetch_cycle_timing ,MAM Timing Control" "Reserved,1 CCLK,2 CCLKs,3 CCLKs,4 CCLKs,5 CCLKs,6 CCLKs,7 CCLKs"
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width 0x0B
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else
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width 0x08
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group.byte ad:0xE01FC000++0x00
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line.byte 0x00 "MAMCR,MAM Control Register"
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bitfld.byte 0x00 0.--1. " MODE ,MAM Mode Control Bits" "Disabled,Partially enabled,Fully enabled,?..."
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group.byte ad:0xE01FC004++0x00
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line.byte 0x0 "MAMTIM,MAM Timing Register"
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bitfld.byte 0x0 0.--2. " MODE ,MAM Timing Control" "Reserved,1 CCLK,2 CCLKs,3 CCLKs,4 CCLKs,5 CCLKs,6 CCLKs,7 CCLKs"
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width 0x0B
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endif
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tree.end
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; --------------------------------------------------------------------------------
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; VIC
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; --------------------------------------------------------------------------------
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tree "VIC (Vectored Interrupt Controller)"
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sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
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width 20.
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base 0xFFFFF000
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group.long 0x0C++0x37
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line.long 0x0C "VICSoftInt_SET/CLR,Set/Clear Software Interrupt Register"
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setclrfld.long 0x0C 22. 0x0C 22. 0x10 22. " USBSI ,USB Software Interrupt (IRQ22) Force Request" "No request,Request"
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setclrfld.long 0x0C 21. 0x0C 21. 0x10 21. " AD1SI ,Analog-to-Digital Converter 1 Software Interrupt (IRQ21) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 20. 0x0C 20. 0x10 20. " BODSI ,Brown Output Detect Software Interrupt (IRQ20) Force Request" "No request,Request"
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setclrfld.long 0x0C 19. 0x0C 19. 0x10 19. " I2C1SI ,I2C1 Software Interrupt (IRQ19) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 18. 0x0C 18. 0x10 18. " AD0SI ,Analog-to-Digital Converter 0 Software Interrupt (IRQ18) Force Request" "No request,Request"
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setclrfld.long 0x0C 17. 0x0C 17. 0x10 17. " EINT3SI ,External Interrupt 3 Software Interrupt (IRQ17) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " EINT2SI ,External Interrupt 2 Software Interrupt (IRQ16) Force Request" "No request,Request"
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setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " EINT1SI ,External Interrupt 1 Software Interrupt (IRQ15) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " EINT0SI ,External Interrupt 0 Software Interrupt (IRQ14) Force Request" "No request,Request"
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setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " RTCSI ,Real Time Clock Software Interrupt (IRQ13) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " PLLSI ,Phase-Locked Loop Software Interrupt (IRQ12) Force Request" "No request,Request"
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setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " SPI1/SPPSI ,SPI1/SSP Software Interrupt (IRQ11) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 10. 0x0C 10. 0x10 10. " SP0 ,SP0SI Software Interrupt (IRQ10) Force Request" "No request,Request"
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setclrfld.long 0x0C 9. 0x0C 9. 0x10 9. " I2C0SI ,I2C1 Software Interrupt (IRQ9) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " PWMSI ,Pulse Width Modulator Software Interrupt (IRQ8) Force Request" "No request,Request"
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setclrfld.long 0x0C 7. 0x0C 7. 0x10 7. " UART1SI ,Universal Asynchronous Receiver/Transmitter 1 Software Interrupt (IRQ7) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " UART0SI ,Universal Asynchronous Receiver/Transmitter 0 Software Interrupt (IRQ6) Force Request" "No request,Request"
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setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " TIMER1SI ,Timer/Counter 0 Software Interrupt (IRQ5) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 4. 0x0C 4. 0x10 4. " TIMER0SI ,Timer/Counter 1 Software Interrupt (IRQ4) Force Request" "No request,Request"
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setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " ARMCORE1SI ,ARM Core 1 Software Interrupt (IRQ3) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " ARMCORE0SI ,ARM Core 0 Software Interrupt (IRQ2) Force Request" "No request,Request"
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setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " WDTSI ,WDT Software Interrupt (IRQ0) Force Request" "No request,Request"
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line.long 0x04 "VICIntEn_SET/CLR,Set/Clear Interrupt Enable Register"
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setclrfld.long 0x04 22. 0x04 22. 0x08 22. " USBEn ,USB Software Interrupt (IRQ22) Force Request" "No request,Request"
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setclrfld.long 0x04 21. 0x04 21. 0x08 21. " AD1En ,Analog-to-Digital Converter 1 Software Interrupt (IRQ21) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 20. 0x04 20. 0x08 20. " BODEn ,Brown Output Detect Software Interrupt (IRQ20) Force Request" "No request,Request"
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setclrfld.long 0x04 19. 0x04 19. 0x08 19. " I2C1En ,I2C1 Software Interrupt (IRQ19) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 18. 0x04 18. 0x08 18. " AD0En ,Analog-to-Digital Converter 0 Software Interrupt (IRQ18) Force Request" "No request,Request"
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setclrfld.long 0x04 17. 0x04 17. 0x08 17. " EINT3En ,External Interrupt 3 Software Interrupt (IRQ17) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 16. 0x04 16. 0x08 16. " EINT2En ,External Interrupt 2 Software Interrupt (IRQ16) Force Request" "No request,Request"
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setclrfld.long 0x04 15. 0x04 15. 0x08 15. " EINT1En ,External Interrupt 1 Software Interrupt (IRQ15) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 14. 0x04 14. 0x08 14. " EINT0En ,External Interrupt 0 Software Interrupt (IRQ14) Force Request" "No request,Request"
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setclrfld.long 0x04 13. 0x04 13. 0x08 13. " RTCEn ,Real Time Clock Software Interrupt (IRQ13) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 12. 0x04 12. 0x08 12. " PLLEn ,Phase-Locked Loop Software Interrupt (IRQ12) Force Request" "No request,Request"
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setclrfld.long 0x04 11. 0x04 11. 0x08 11. " SPI1/SPPEn ,SPI1/SSP Software Interrupt (IRQ11) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 10. 0x04 10. 0x08 10. " SP0En ,SP0 Software Interrupt (IRQ10) Force Request" "No request,Request"
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setclrfld.long 0x04 9. 0x04 9. 0x08 9. " I2C0En ,I2C1 Software Interrupt (IRQ9) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 8. 0x04 8. 0x08 8. " PWMEn ,Pulse Width Modulator Software Interrupt (IRQ8) Force Request" "No request,Request"
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setclrfld.long 0x04 7. 0x04 7. 0x08 7. " UART1En ,Universal Asynchronous Receiver/Transmitter 1 Software Interrupt (IRQ7) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 6. 0x04 6. 0x08 6. " UART0En ,Universal Asynchronous Receiver/Transmitter 0 Software Interrupt (IRQ6) Force Request" "No request,Request"
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setclrfld.long 0x04 5. 0x04 5. 0x08 5. " TIMER1En ,Timer/Counter 0 Software Interrupt (IRQ5) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 4. 0x04 4. 0x08 4. " TIMER0En ,Timer/Counter 1 Software Interrupt (IRQ4) Force Request" "No request,Request"
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setclrfld.long 0x04 3. 0x04 3. 0x08 3. " ARMCORE1En ,ARM Core 1 Software Interrupt (IRQ3) Force Request" "No request,Request"
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textline " "
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setclrfld.long 0x04 2. 0x04 2. 0x08 2. " ARMCORE0En ,ARM Core 0 Software Interrupt (IRQ2) Force Request" "No request,Request"
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setclrfld.long 0x04 0. 0x04 0. 0x08 0. " WDTEn ,WDT Software Interrupt (IRQ0) Force Request" "No request,Request"
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line.long 0x00 "VICINTSELECT,Interrupt Select Register"
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bitfld.long 0x00 22. " USBCat ,USB Interrupt (IRQ22) Category" "IRQ,FIQ"
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bitfld.long 0x00 21. " AD1Cat ,Analog-to-Digital Converter 1 Interrupt (IRQ21) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 20. " BODCat ,Brown Output Detect Interrupt (IRQ20) Category" "IRQ,FIQ"
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bitfld.long 0x00 19. " I2C1Cat ,I2C1 Interrupt (IRQ19) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 18. " AD0Cat ,Analog-to-Digital Converter 0 Interrupt (IRQ18) Category" "IRQ,FIQ"
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bitfld.long 0x00 17. " EINT3Cat ,External Interrupt 3 (IRQ17) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 16. " EINT2Cat ,External Interrupt 2 (IRQ16) Category" "IRQ,FIQ"
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bitfld.long 0x00 15. " EINT1Cat ,External Interrupt 1 (IRQ15) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 14. " EINT0Cat ,External Interrupt 0 (IRQ14) Category" "IRQ,FIQ"
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bitfld.long 0x00 13. " RTCCat ,Real Time Clock Interrupt (IRQ13) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 12. " PLLCat ,Phase-Locked Loop Interrupt (IRQ12) Category" "IRQ,FIQ"
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bitfld.long 0x00 11. " SPI1/SPPCat ,SPI1/SSP Interrupt (IRQ11) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 10. " SP0Cat ,SP0 Interrupt (IRQ10) Category" "IRQ,FIQ"
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bitfld.long 0x00 9. " I2C0Cat ,I2C1 Interrupt (IRQ9) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 8. " PWMCat ,Pulse Width Modulator Interrupt (IRQ8) Category" "IRQ,FIQ"
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bitfld.long 0x00 7. " UART1Cat ,Universal Asynchronous Receiver/Transmitter 1 Interrupt (IRQ7) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 6. " UART0Cat ,Universal Asynchronous Receiver/Transmitter 0 Interrupt (IRQ6) Category" "IRQ,FIQ"
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bitfld.long 0x00 5. " TIMER1Cat ,Timer/Counter 0 Interrupt (IRQ5) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 4. " TIMER0Cat ,Timer/Counter 1 Interrupt (IRQ4) Category" "IRQ,FIQ"
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bitfld.long 0x00 3. " ARMCORE1Cat ,ARM Core 1 Interrupt (IRQ3) Category" "IRQ,FIQ"
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textline " "
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bitfld.long 0x00 2. " ARMCORE0Cat ,ARM Core 0 Interrupt (IRQ2) Category" "IRQ,FIQ"
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bitfld.long 0x00 0. " WDTCat ,WDT Interrupt (IRQ0) Category" "IRQ,FIQ"
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line.long 0x14 "VICPROTECT,Protection Enable Register"
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bitfld.long 0x14 0. " VICACC ,VIC Registres Access Mode" "User/Privileged,Privileged"
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line.long 0x24 "VICVECTADDR,Vector Address Register"
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line.long 0x28 "VICDEFVECTADDR,Default Vector Address Register"
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rgroup.long 0x00++0x0B
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line.long 0x00 "VICIRQSTATUS,IRQ Status Register"
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bitfld.long 0x00 22. " USBISt ,USB Interrupt (IRQ22) Enable" "Not asserted,Asserted"
|
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bitfld.long 0x00 21. " AD1ISt ,Analog-to-Digital Converter 1 Interrupt (IRQ21) Enable" "Not asserted,Asserted"
|
|
textline " "
|
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bitfld.long 0x00 20. " BODISt ,Brown Output Detect Interrupt (IRQ20) Enable" "Not asserted,Asserted"
|
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bitfld.long 0x00 19. " I2C1ISt ,I2C1 Interrupt (IRQ19) Enable" "Not asserted,Asserted"
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|
textline " "
|
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bitfld.long 0x00 18. " AD0ISt ,Analog-to-Digital Converter 0 Interrupt (IRQ18) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 17. " EINT3ISt ,External Interrupt 3 (IRQ17) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2ISt ,External Interrupt 2 (IRQ16) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 15. " EINT1ISt ,External Interrupt 1 (IRQ15) Enable" "Not asserted,Asserted"
|
|
textline " "
|
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bitfld.long 0x00 14. " EINT0ISt ,External Interrupt 0 (IRQ14) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 13. " RTCISt ,Real Time Clock Interrupt (IRQ13) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLLISt ,Phase-Locked Loop Interrupt (IRQ12) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 11. " SPI1/SPPISt ,SPI1/SSP Interrupt (IRQ11) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SP0ISt ,SP0 Interrupt (IRQ10) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " I2C0ISt ,I2C1 Interrupt (IRQ9) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PWMISt ,Pulse Width Modulator Interrupt (IRQ8) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 7. " UART1ISt ,Universal Asynchronous Receiver/Transmitter 1 Interrupt (IRQ7) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " UART0ISt ,Universal Asynchronous Receiver/Transmitter 0 Interrupt (IRQ6) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. " TIMER1ISt ,Timer/Counter 0 Interrupt (IRQ5) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMER0ISt ,Timer/Counter 1 Interrupt (IRQ4) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. " ARMCORE1ISt ,ARM Core 1 Interrupt (IRQ3) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ARMCORE0ISt ,ARM Core 0 Interrupt (IRQ2) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " WDTISt ,WDT Interrupt (IRQ0) Enable" "Not asserted,Asserted"
|
|
line.long 0x04 "VICFIQSTATUS,FIQ Status Register"
|
|
bitfld.long 0x04 22. " USBFSt ,USB Interrupt (IRQ22) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 21. " AD1FSt ,Analog-to-Digital Converter 1 Interrupt (IRQ21) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 20. " BODFSt ,Brown Output Detect Interrupt (IRQ20) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 19. " I2C1FSt ,I2C1 Interrupt (IRQ19) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 18. " AD0FSt ,Analog-to-Digital Converter 0 Interrupt (IRQ18) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 17. " EINT3FSt ,External Interrupt 3 (IRQ17) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 16. " EINT2FSt ,External Interrupt 2 (IRQ16) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 15. " EINT1FSt ,External Interrupt 1 (IRQ15) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 14. " EINT0FSt ,External Interrupt 0 (IRQ14) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 13. " RTCFSt ,Real Time Clock Interrupt (IRQ13) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PLLFSt ,Phase-Locked Loop Interrupt (IRQ12) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 11. " SPI1/SPPFSt ,SPI1/SSP Interrupt (IRQ11) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SP0FSt ,SP0 Interrupt (IRQ10) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 9. " I2C0FSt ,I2C1 Interrupt (IRQ9) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PWMFSt ,Pulse Width Modulator Interrupt (IRQ8) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 7. " UART1FSt ,Universal Asynchronous Receiver/Transmitter 1 Interrupt (IRQ7) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 6. " UART0FSt ,Universal Asynchronous Receiver/Transmitter 0 Interrupt (IRQ6) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 5. " TIMER1FSt ,Timer/Counter 0 Interrupt (IRQ5) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TIMER0FSt ,Timer/Counter 1 Interrupt (IRQ4) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 3. " ARMCORE1FSt ,ARM Core 1 Interrupt (IRQ3) Enable" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 2. " ARMCORE0FSt ,ARM Core 0 Interrupt (IRQ2) Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x04 0. " WDTFSt ,WDT Interrupt (IRQ0) Enable" "Not asserted,Asserted"
|
|
line.long 0x08 "VICRAWINT,Raw Interrupt Status Register"
|
|
bitfld.long 0x08 22. " USBRSt ,USB Interrupt (IRQ22) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 21. " AD1RSt ,Analog-to-Digital Converter 1 Interrupt (IRQ21) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 20. " BODRSt ,Brown Output Detect Interrupt (IRQ20) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 19. " I2C1RSt ,I2C1 Interrupt (IRQ19) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 18. " AD0RSt ,Analog-to-Digital Converter 0 Interrupt (IRQ18) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 17. " EINT3RSt ,External Interrupt 3 (IRQ17) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 16. " EINT2RSt ,External Interrupt 2 (IRQ16) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 15. " EINT1RSt ,External Interrupt 1 (IRQ15) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 14. " EINT0RSt ,External Interrupt 0 (IRQ14) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 13. " RTCRSt ,Real Time Clock Interrupt (IRQ13) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PLLRSt ,Phase-Locked Loop Interrupt (IRQ12) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 11. " SPI1/SPPRSt ,SPI1/SSP Interrupt (IRQ11) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SP0RSt ,SP0 Interrupt (IRQ10) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 9. " I2C0RSt ,I2C1 Interrupt (IRQ9) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 8. " PWMRSt ,Pulse Width Modulator Interrupt (IRQ8) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 7. " UART1RSt ,Universal Asynchronous Receiver/Transmitter 1 Interrupt (IRQ7) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 6. " UART0RSt ,Universal Asynchronous Receiver/Transmitter 0 Interrupt (IRQ6) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 5. " TIMER1RSt ,Timer/Counter 0 Interrupt (IRQ5) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " TIMER0RSt ,Timer/Counter 1 Interrupt (IRQ4) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 3. " ARMCORE1RSt ,ARM Core 1 Interrupt (IRQ3) Assert" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 2. " ARMCORE0RSt ,ARM Core 0 Interrupt (IRQ2) Assert" "Negated,Asserted"
|
|
bitfld.long 0x08 0. " WDTRSt ,WDT Interrupt (IRQ0) Assert" "Negated,Asserted"
|
|
group.long 0x100++0x3F
|
|
line.long 0x0 "VICVECTADDR0,Vector Address Register 0"
|
|
line.long 0x4 "VICVECTADDR1,Vector Address Register 1"
|
|
line.long 0x8 "VICVECTADDR2,Vector Address Register 2"
|
|
line.long 0xC "VICVECTADDR3,Vector Address Register 3"
|
|
line.long 0x10 "VICVECTADDR4,Vector Address Register 4"
|
|
line.long 0x14 "VICVECTADDR5,Vector Address Register 5"
|
|
line.long 0x18 "VICVECTADDR6,Vector Address Register 6"
|
|
line.long 0x1C "VICVECTADDR7,Vector Address Register 7"
|
|
line.long 0x20 "VICVECTADDR8,Vector Address Register 8"
|
|
line.long 0x24 "VICVECTADDR9,Vector Address Register 9"
|
|
line.long 0x28 "VICVECTADDR10,Vector Address Register 10"
|
|
line.long 0x2C "VICVECTADDR11,Vector Address Register 11"
|
|
line.long 0x30 "VICVECTADDR12,Vector Address Register 12"
|
|
line.long 0x34 "VICVECTADDR13,Vector Address Register 13"
|
|
line.long 0x38 "VICVECTADDR14,Vector Address Register 14"
|
|
line.long 0x3C "VICVECTADDR15,Vector Address Register 15"
|
|
group.long 0x200++0x3F
|
|
line.long 0x0 "VICVECTCNTL0,Vector Control Register 0"
|
|
line.long 0x4 "VICVECTCNTL1,Vector Control Register 1"
|
|
line.long 0x8 "VICVECTCNTL2,Vector Control Register 2"
|
|
line.long 0xC "VICVECTCNTL3,Vector Control Register 3"
|
|
line.long 0x10 "VICVECTCNTL4,Vector Control Register 4"
|
|
line.long 0x14 "VICVECTCNTL5,Vector Control Register 5"
|
|
line.long 0x18 "VICVECTCNTL6,Vector Control Register 6"
|
|
line.long 0x1C "VICVECTCNTL7,Vector Control Register 7"
|
|
line.long 0x20 "VICVECTCNTL8,Vector Control Register 8"
|
|
line.long 0x24 "VICVECTCNTL9,Vector Control Register 9"
|
|
line.long 0x28 "VICVECTCNTL10,Vector Control Register 10"
|
|
line.long 0x2C "VICVECTCNTL11,Vector Control Register 11"
|
|
line.long 0x30 "VICVECTCNTL12,Vector Control Register 12"
|
|
line.long 0x34 "VICVECTCNTL13,Vector Control Register 13"
|
|
line.long 0x38 "VICVECTCNTL14,Vector Control Register 14"
|
|
line.long 0x3C "VICVECTCNTL15,Vector Control Register 15"
|
|
elif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
width 20.
|
|
base sd:0xfffff000
|
|
group.long 0x18++0x7
|
|
line.long 0x00 "VICSoftIntSetClr,Software Interrupt Register"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " TIMER3 ,Timer 3 Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " TIMER2 ,Timer 2 Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " I2C1 ,I2C1 Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " AD0 ,AD0 Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " EINT2 ,EINT2 Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " EINT1 ,EINT1 Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " EINT0 ,EINT0 Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " RTC ,RTC Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " PLL ,PLL Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " SSP/SPI1 ,SSP/SPI1 Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " SPI0 ,SPI0 Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " I2C0 ,I2C0 Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " UART1 ,UART1 Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " UART0 ,UART0 Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " TIMER1 ,TIMER1 Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMER0 ,TIMER0 Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " ARMCore1 ,ARMCore1 Interupt Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " ARMCore0 ,ARMCore0 Interupt Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " WDT ,WDT Interupt Request" "Not requested,Requested"
|
|
rgroup.long 0x08++0x7
|
|
line.long 0x00 "VICRawIntr,Raw Interrupt Status Register"
|
|
bitfld.long 0x00 27. " TIMER3 ,Timer 3 Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 26. " TIMER2 ,Timer 2 Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I2C1 ,I2C1 Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 18. " AD0 ,AD0 Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2 ,EINT2 Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 15. " EINT1 ,EINT1 Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0 ,EINT0 Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 13. " RTC ,RTC Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLL ,PLL Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 11. " SSP/SPI1 ,SSP/SPI1 Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0 ,SPI0 Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 9. " I2C0 ,I2C0 Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " UART1 ,UART1 Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 6. " UART0 ,UART0 Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1 ,TIMER1 Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 4. " TIMER0 ,TIMER0 Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMCore1 ,ARMCore1 Raw Interrupt Status" "Negated,Asserted"
|
|
bitfld.long 0x00 2. " ARMCore0 ,ARMCore0 Raw Interrupt Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDT ,WDT Raw Interrupt Status" "Negated,Asserted"
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "VICIntEnableSetClr,Interrupt Enable Register"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " TIMER3 ,Timer 3 Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " TIMER2 ,Timer 2 Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " I2C1 ,I2C1 Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " AD0 ,AD0 Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " EINT2 ,EINT2 Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " EINT1 ,EINT1 Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " EINT0 ,EINT0 Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " RTC ,RTC Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " PLL ,PLL Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " SSP/SPI1 ,SSP/SPI1 Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " SPI0 ,SPI0 Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " I2C0 ,I2C0 Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " UART1 ,UART1 Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " UART0 ,UART0 Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " TIMER1 ,TIMER1 Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMER0 ,TIMER0 Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " ARMCore1 ,ARMCore1 Interupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " ARMCore0 ,ARMCore0 Interupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " WDT ,WDT Interupt Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "VICIntSelect,Interrupt Select Register"
|
|
bitfld.long 0x00 27. " TIMER3 ,Timer 3 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 26. " TIMER2 ,Timer 2 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I2C1 ,I2C1 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 18. " AD0 ,AD0 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2 ,EINT2 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 15. " EINT1 ,EINT1 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0 ,EINT0 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " RTC ,RTC Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLL ,PLL Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " SSP/SPI1 ,SSP/SPI1 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0 ,SPI0 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " I2C0 ,I2C0 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 7. " UART1 ,UART1 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 6. " UART0 ,UART0 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1 ,TIMER1 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 4. " TIMER0 ,TIMER0 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMCore1 ,ARMCore1 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " ARMCore0 ,ARMCore0 Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDT ,WDT Raw Interrupt Category Selection" "IRQ,FIQ"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "VICIRQStatus,IRQ Status Register"
|
|
bitfld.long 0x00 27. " TIMER3 ,Timer 3 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " TIMER2 ,Timer 2 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I2C1 ,I2C1 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " AD0 ,AD0 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2 ,EINT2 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 15. " EINT1 ,EINT1 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0 ,EINT0 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 13. " RTC ,RTC Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLL ,PLL Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 11. " SSP/SPI1 ,SSP/SPI1 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0 ,SPI0 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " I2C0 ,I2C0 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " UART1 ,UART1 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " UART0 ,UART0 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1 ,TIMER1 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " TIMER0 ,TIMER0 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMCore1 ,ARMCore1 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " ARMCore0 ,ARMCore0 Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDT ,WDT Interrupt Request Enabled Classified As IRQ And Asserted" "Not asserted,Asserted"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "VICFIQStatus,FIQ Status Register"
|
|
bitfld.long 0x00 27. " TIMER3 ,Timer 3 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " TIMER2 ,Timer 2 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I2C1 ,I2C1 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " AD0 ,AD0 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2 ,EINT2 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 15. " EINT1 ,EINT1 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0 ,EINT0 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 13. " RTC ,RTC Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLL ,PLL Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 11. " SSP/SPI1 ,SSP/SPI1 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0 ,SPI0 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " I2C0 ,I2C0 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " UART1 ,UART1 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " UART0 ,UART0 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1 ,TIMER1 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " TIMER0 ,TIMER0 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMCore1 ,ARMCore1 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " ARMCore0 ,ARMCore0 Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDT ,WDT Interrupt Request Enabled Classified As FIQ And Asserted" "Not asserted,Asserted"
|
|
group.long 0x200++0x3f
|
|
line.long 0x0 "VICVectCntl0,Vector control 0 register"
|
|
bitfld.long 0x0 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x4 "VICVectCntl1,Vector control 1 register"
|
|
bitfld.long 0x4 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x8 "VICVectCntl2,Vector control 2 register"
|
|
bitfld.long 0x8 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0xC "VICVectCntl3,Vector control 3 register"
|
|
bitfld.long 0xC 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x10 "VICVectCntl4,Vector control 4 register"
|
|
bitfld.long 0x10 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x14 "VICVectCntl5,Vector control 5 register"
|
|
bitfld.long 0x14 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x18 "VICVectCntl6,Vector control 6 register"
|
|
bitfld.long 0x18 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x1C "VICVectCntl7,Vector control 7 register"
|
|
bitfld.long 0x1C 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x20 "VICVectCntl8,Vector control 8 register"
|
|
bitfld.long 0x20 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x24 "VICVectCntl9,Vector control 9 register"
|
|
bitfld.long 0x24 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x28 "VICVectCntl10,Vector control 10 register"
|
|
bitfld.long 0x28 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x2C "VICVectCntl11,Vector control 11 register"
|
|
bitfld.long 0x2C 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x30 "VICVectCntl12,Vector control 12 register"
|
|
bitfld.long 0x30 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x34 "VICVectCntl13,Vector control 13 register"
|
|
bitfld.long 0x34 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x38 "VICVectCntl14,Vector control 14 register"
|
|
bitfld.long 0x38 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x3C "VICVectCntl15,Vector control 15 register"
|
|
bitfld.long 0x3C 5. " IRQslot_en ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 0.--4. " Int_request ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "VICVectAddr,Vector Address Register"
|
|
line.long 0x4 "VICDefVectAddr,Default Vector Address Register"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "VICProtection,Protection enable register"
|
|
bitfld.long 0x0 0. " VIC_access ,Protection Enable Register" "User/Privileged,Privileged"
|
|
group.long 0x100++0x3f
|
|
line.long 0x0 "VICVectAddr0,Vector address 0 register"
|
|
line.long 0x4 "VICVectAddr1,Vector address 1 register"
|
|
line.long 0x8 "VICVectAddr2,Vector address 2 register"
|
|
line.long 0xC "VICVectAddr3,Vector address 3 register"
|
|
line.long 0x10 "VICVectAddr4,Vector address 4 register"
|
|
line.long 0x14 "VICVectAddr5,Vector address 5 register"
|
|
line.long 0x18 "VICVectAddr6,Vector address 6 register"
|
|
line.long 0x1C "VICVectAddr7,Vector address 7 register"
|
|
line.long 0x20 "VICVectAddr8,Vector address 8 register"
|
|
line.long 0x24 "VICVectAddr9,Vector address 9 register"
|
|
line.long 0x28 "VICVectAddr10,Vector address 10 register"
|
|
line.long 0x2C "VICVectAddr11,Vector address 11 register"
|
|
line.long 0x30 "VICVectAddr12,Vector address 12 register"
|
|
line.long 0x34 "VICVectAddr13,Vector address 13 register"
|
|
line.long 0x38 "VICVectAddr14,Vector address 14 register"
|
|
line.long 0x3C "VICVectAddr15,Vector address 15 register"
|
|
elif (cpu()=="LPC2131"||cpu()=="LPC2132"||cpu()=="LPC2134"||cpu()=="LPC2136"||cpu()=="LPC2138"||cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xFFFFF000
|
|
width 0x10
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "VICSoftInt,Software Interrupt Register"
|
|
setclrfld.long 0x0 0. 0x0 0. 0x4 0. " WDT_set/clr ,Watchdog Software Interrupt (IRQ 0) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 2. 0x0 2. 0x4 2. " ARMCore0_set/clr ,ARM Core 0 Software Interrupt (IRQ 2) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 3. 0x0 3. 0x4 3. " ARMCore1_set/clr ,ARM Core 1 Software Interrupt (IRQ 3) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 4. 0x0 4. 0x4 4. " TIMER0_set/clr ,Timer 0 Software Interrupt (IRQ 4) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x0 5. 0x4 5. " TIMER1_set/clr ,Timer 1 Software Interrupt (IRQ 5) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 6. 0x0 6. 0x4 6. " UART0_set/clr ,UART 0 Software Interrupt (IRQ 6) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x0 7. 0x4 7. " UART1_set/clr ,UART 1 Software Interrupt (IRQ 7) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 8. 0x0 8. 0x4 8. " PWM0_set/clr ,PWM 0 Software Interrupt (IRQ 8) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x0 9. 0x4 9. " I2C0_set/clr ,I2C 0 Software Interrupt (IRQ 9) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 10. 0x0 10. 0x4 10. " SPI0_set/clr ,SPI 0 Software Interrupt (IRQ 10) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x0 11. 0x4 11. " SPI1/SSP_set/clr ,SPI 1/SSP Software Interrupt (IRQ 11) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 12. 0x0 12. 0x4 12. " PLL_set/clr ,PLL Software Interrupt (IRQ 12) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x0 13. 0x4 13. " RTC_set/clr ,RTC Software Interrupt (IRQ 13) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 14. 0x0 14. 0x4 14. " EINT0_set/clr ,External Interrupt 0 Software Interrupt (IRQ 14) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 15. 0x0 15. 0x4 15. " EINT1_set/clr ,External Interrupt 1 Software Interrupt (IRQ 15) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 16. 0x0 16. 0x4 16. " EINT2_set/clr ,External Interrupt 2 Software Interrupt (IRQ 16) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 17. 0x0 17. 0x4 17. " EINT3_set/clr ,External Interrupt 3 Software Interrupt (IRQ 17) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 18. 0x0 18. 0x4 18. " AD0_set/clr ,A/D 0 Converter Software Interrupt (IRQ 18) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x0 19. 0x4 19. " I2C1_set/clr ,I2C 1 Software Interrupt (IRQ 19) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 20. 0x0 20. 0x4 20. " BOD_set/clr ,Brown Out Detection Software Interrupt (IRQ 20) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 21. 0x0 21. 0x4 21. " AD1_set/clr ,A/D 0 Converter Software Interrupt (IRQ 21) Force Request" "Not requested,Requested"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "VICRawIntr,Raw Interrupt Status Register"
|
|
bitfld.long 0x00 0. " WDT ,Watchdog Raw Interrupt (IRQ 0) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 2. " ARMCore0 ,ARM Core 0 Raw Interrupt (IRQ 2) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMCore1 ,ARM Core 1 Raw Interrupt (IRQ 3) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 4. " TIMER0 ,Timer 0 Raw Interrupt (IRQ 4) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1 ,Timer 1 Raw Interrupt (IRQ 5) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 6. " UART0 ,UART 0 Raw Interrupt (IRQ 6) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " UART1 ,UART 1 Raw Interrupt (IRQ 7) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 8. " PWM0 ,PWM 0 Raw Interrupt (IRQ 8) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I2C0 ,I2C 0 Raw Interrupt (IRQ 9) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 10. " SPI0 ,SPI 0 Raw Interrupt (IRQ 10) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI1/SSP ,SPI 1/SSP Raw Interrupt (IRQ 11) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 12. " PLL ,PLL Raw Interrupt (IRQ 12) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RTC ,RTC Raw Interrupt (IRQ 13) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 14. " EINT0 ,External 0 Raw Interrupt (IRQ 14) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EINT1 ,External 1 Raw Interrupt (IRQ 15) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 16. " EINT2 ,External 2 Raw Interrupt (IRQ 16) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT3 ,External 3 Raw Interrupt (IRQ 17) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 18. " AD0 ,A/D 0 Converter Raw Interrupt (IRQ 18) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I2C1 ,I2C 1 Raw Interrupt (IRQ 19) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 20. " BOD ,Brown Out Detection Raw Interrupt (IRQ 20) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " AD1 ,A/D 1 Converter Raw Interrupt (IRQ 21) Status" "Negated,Asserted"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "VICIntEnable,Interrupt Enable Register"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " WDT_set/clr ,Watchdog Interrupt (IRQ 0) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " ARMCore0_set/clr ,ARM Core 0 Interrupt (IRQ 2) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " ARMCore1_set/clr ,ARM Core 1 Interrupt (IRQ 3) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMER0_set/clr ,Timer 0 Interrupt (IRQ 4) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " TIMER1_set/clr ,Timer 1 Interrupt (IRQ 5) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " UART0_set/clr ,UART 0 Interrupt (IRQ 6) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " UART1_set/clr ,UART 1 Interrupt (IRQ 7) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " PWM0_set/clr ,PWM Interrupt (IRQ 8) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " I2C0_set/clr ,I2C Interrupt (IRQ 9) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " SPI0_set/clr ,SPI 0 Interrupt (IRQ 10) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " SPI1/SSP_set/clr ,SPI 1 Interrupt (IRQ 11) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " PLL_set/clr ,PLL Interrupt (IRQ 12) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " RTC_set/clr ,RTC Interrupt (IRQ 13) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " EINT0_set/clr ,External Interrupt 0 (IRQ 14) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " EINT1_set/clr ,External Interrupt 1 (IRQ 15) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " EINT2_set/clr ,External Interrupt 2 (IRQ 16) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " EINT3_set/clr ,External Interrupt 3 (IRQ 17) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " AD0_set/clr ,A/D 0 Converter Interrupt (IRQ 18) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " I2C1_set/clr ,I2C 1 Interrupt (IRQ 19) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " BOD_set/clr ,Brown Out Detection Interrupt (IRQ 20) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " AD1_set/clr ,A/D 1 Converter Interrupt (IRQ 21) Enable" "Disabled,Enabled"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "VICIntSelect,Interrupt Select Register"
|
|
bitfld.long 0x00 0. " WDTSEL ,Watchdog Interrupt (IRQ 0) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 1. " IRQ1SEL ,Software Interrupt (IRQ 1) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ARMCore0SEL ,ARM Core 0 Interrupt (IRQ 2) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 3. " ARMCore1SEL ,ARM Core 1 Interrupt (IRQ 3) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMER0SEL ,Timer 0 Interrupt (IRQ 4) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " TIMER1SEL ,Timer 1 Interrupt (IRQ 5) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 6. " UART0SEL ,UART 0 Interrupt (IRQ 6) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 7. " UART1SEL ,UART 1 Interrupt (IRQ 7) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PWM0SEL ,PWM 0 Interrupt (IRQ 8) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " I2C0SEL ,I2C 0 Interrupt (IRQ 9) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0SEL ,SPI 0 Interrupt (IRQ 10) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " SPI1/SSPSEL ,SPI 1 Interrupt (IRQ 11) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLLSEL ,PLL Interrupt (IRQ 12) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " RTCSEL ,RTC Interrupt (IRQ 13) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0SEL ,External Interrupt 0 (IRQ 14) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 15. " EINT1SEL ,External Interrupt 1 (IRQ 15) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2SEL ,External Interrupt 2 (IRQ 16) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " EINT3SEL ,External Interrupt 3 (IRQ 17) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 18. " AD0SEL ,A/D 0 Converter Interrupt (IRQ 18) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 19. " I2C1SEL ,I2C 1 Interrupt (IRQ 19) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 20. " BODSEL ,Brown Out Detection Interrupt (IRQ 20) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 21. " AD1SEL ,A/D 1 Converter Interrupt (IRQ 21) Category Selection" "IRQ,FIQ"
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VICIRQStatus,IRQ Status Register"
|
|
bitfld.long 0x00 0. " WDT ,WDT (IRQ 0) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " ARMCore0 ,ARM Core 0 (IRQ 2) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMCore1 ,ARM Core 1 (IRQ 3) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " TIMER0 ,TIMER0 (IRQ 4) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1 ,TIMER1 (IRQ 5) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " UART0 ,UART0 (IRQ 6) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " UART0 ,UART1 (IRQ 7) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " PWM0 ,PWM 0 (IRQ 8) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I2C0 ,I2C 0 (IRQ 9) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " SPI0 ,SPI0 (IRQ 10) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI1/SSP ,SPI1 (IRQ 11) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " PLL ,PLL (IRQ 12) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RTC ,RTC (IRQ 13) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " EINT0 ,EINT0 (IRQ 14) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EINT1 ,EINT1 (IRQ 15) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " EINT2 ,EINT2 (IRQ 16) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT3 ,EINT2 (IRQ 17) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " AD0 ,A/D 0 (IRQ 18) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I2C1 ,I2C 1 (IRQ 19) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " BOD ,Brown Out Detection (IRQ 20) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " AD1 ,A/D 1 (IRQ 21) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
line.long 0x04 "VICFIQStatus,FIQ Status Requests"
|
|
bitfld.long 0x04 0. " FIQ0 ,WDT (IRQ 0) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " FIQ2 ,ARM Core 0 (IRQ 2) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FIQ3 ,ARM Core 1 (IRQ 3) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " FIQ4 ,TIMER1 (IRQ 4) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 5. " FIQ5 ,TIMER1 (IRQ 5) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " FIQ6 ,UART0 (IRQ 6) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FIQ7 ,UART1 (IRQ 7) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " FIQ8 ,PWM 0 (IRQ 8) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 9. " FIQ9 ,I2C 0 (IRQ 9) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " FIQ10 ,SPI0 (IRQ 10) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 11. " FIQ11 ,SPI1/SSP (IRQ 11) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " FIQ12 ,PLL (IRQ 12) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 13. " FIQ13 ,RTC (IRQ 13) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " FIQ14 ,EINT0 (IRQ 14) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FIQ15 ,EINT1 (IRQ 15) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 16. " FIQ16 ,EINT2 (IRQ 16) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 17. " FIQ17 ,EINT2 (IRQ 17) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " FIQ18 ,AD 0 (IRQ 18) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FIQ19 ,I2C 1 (IRQ 19) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 20. " FIQ20 ,BOD (IRQ 20) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 21. " FIQ21 ,AD 1 (IRQ 21) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2132"||cpu()=="LPC2131/01"||cpu()=="LPC2132/01")
|
|
group.long 0x200++0x3F
|
|
line.long 0x00 "VICVectCntl0,Vector control 0 register"
|
|
bitfld.long 0x00 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x00 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x04 "VICVectCntl1,Vector control 1 register"
|
|
bitfld.long 0x04 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x04 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x08 "VICVectCntl2,Vector control 2 register"
|
|
bitfld.long 0x08 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x08 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x0C "VICVectCntl3,Vector control 3 register"
|
|
bitfld.long 0x0C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x0C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x10 "VICVectCntl4,Vector control 4 register"
|
|
bitfld.long 0x10 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x10 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x14 "VICVectCntl5,Vector control 5 register"
|
|
bitfld.long 0x14 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x14 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x18 "VICVectCntl6,Vector control 6 register"
|
|
bitfld.long 0x18 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x18 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x1C "VICVectCntl7,Vector control 7 register"
|
|
bitfld.long 0x1C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x1C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x20 "VICVectCntl8,Vector control 8 register"
|
|
bitfld.long 0x20 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x20 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x24 "VICVectCntl9,Vector control 9 register"
|
|
bitfld.long 0x24 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x24 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x28 "VICVectCntl10,Vector control 10 register"
|
|
bitfld.long 0x28 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x28 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x2C "VICVectCntl11,Vector control 11 register"
|
|
bitfld.long 0x2C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x2C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x30 "VICVectCntl12,Vector control 12 register"
|
|
bitfld.long 0x30 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x30 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x34 "VICVectCntl13,Vector control 13 register"
|
|
bitfld.long 0x34 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x34 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x38 "VICVectCntl14,Vector control 14 register"
|
|
bitfld.long 0x38 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x38 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x3C "VICVectCntl15,Vector control 15 register"
|
|
bitfld.long 0x3C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
bitfld.long 0x3C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x200++0x3F
|
|
line.long 0x00 "VICVectCntl0,Vector control 0 register"
|
|
bitfld.long 0x00 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x00 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x04 "VICVectCntl1,Vector control 1 register"
|
|
bitfld.long 0x04 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x04 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x08 "VICVectCntl2,Vector control 2 register"
|
|
bitfld.long 0x08 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x08 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x0C "VICVectCntl3,Vector control 3 register"
|
|
bitfld.long 0x0C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x0C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x10 "VICVectCntl4,Vector control 4 register"
|
|
bitfld.long 0x10 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x10 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x14 "VICVectCntl5,Vector control 5 register"
|
|
bitfld.long 0x14 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x14 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x18 "VICVectCntl6,Vector control 6 register"
|
|
bitfld.long 0x18 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x18 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x1C "VICVectCntl7,Vector control 7 register"
|
|
bitfld.long 0x1C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x1C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x20 "VICVectCntl8,Vector control 8 register"
|
|
bitfld.long 0x20 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x20 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x24 "VICVectCntl9,Vector control 9 register"
|
|
bitfld.long 0x24 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x24 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x28 "VICVectCntl10,Vector control 10 register"
|
|
bitfld.long 0x28 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x28 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x2C "VICVectCntl11,Vector control 11 register"
|
|
bitfld.long 0x2C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x2C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x30 "VICVectCntl12,Vector control 12 register"
|
|
bitfld.long 0x30 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x30 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x34 "VICVectCntl13,Vector control 13 register"
|
|
bitfld.long 0x34 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x34 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x38 "VICVectCntl14,Vector control 14 register"
|
|
bitfld.long 0x38 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x38 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x3C "VICVectCntl15,Vector control 15 register"
|
|
bitfld.long 0x3C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore0,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,ADC1,?..."
|
|
bitfld.long 0x3C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x100++0x3F
|
|
line.long 0x00 "VICVectAddr0,Vector address 0 register"
|
|
line.long 0x04 "VICVectAddr1,Vector address 1 register"
|
|
line.long 0x08 "VICVectAddr2,Vector address 2 register"
|
|
line.long 0x0C "VICVectAddr3,Vector address 3 register"
|
|
line.long 0x10 "VICVectAddr4,Vector address 4 register"
|
|
line.long 0x14 "VICVectAddr5,Vector address 5 register"
|
|
line.long 0x18 "VICVectAddr6,Vector address 6 register"
|
|
line.long 0x1C "VICVectAddr7,Vector address 7 register"
|
|
line.long 0x20 "VICVectAddr8,Vector address 8 register"
|
|
line.long 0x24 "VICVectAddr9,Vector address 9 register"
|
|
line.long 0x28 "VICVectAddr10,Vector address 10 register"
|
|
line.long 0x2C "VICVectAddr11,Vector address 11 register"
|
|
line.long 0x30 "VICVectAddr12,Vector address 12 register"
|
|
line.long 0x34 "VICVectAddr13,Vector address 13 register"
|
|
line.long 0x38 "VICVectAddr14,Vector address 14 register"
|
|
line.long 0x3C "VICVectAddr15,Vector address 15 register"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "VICDefVectAddr,Default Vector Address Register"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "VICVectAddr,Vector Address Register"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "VICProtection,Protection enable register"
|
|
bitfld.long 0x0 0. " VIC_access ,Protection Enable Register" "User/Privileged,Privileged"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2420")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
base 0xFFFFF000
|
|
group.long 0x00++0x3
|
|
width 0xE
|
|
tree "IRQ/FIQ Status Registers"
|
|
textline " "
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VICIRQStatus,IRQ Status Register"
|
|
bitfld.long 0x0 31. " I2S ,I2S IRQ 31 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 30. " I2C2 ,I2C2 IRQ 30 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 29. " UART3 ,UART3 IRQ 29 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 28. " UART2 ,UART2 IRQ 28 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 27. " TIMER3 ,TIMER3 IRQ 27 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 26. " TIMER2 ,TIMER2 IRQ 26 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " GPDMA ,GPDMA IRQ 25 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 24. " SD/MMC ,SD/MMC IRQ 24 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 23. " CAN1&2 ,CAN1 And CAN2 IRQ 23 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 22. " USB ,USB IRQ 22 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="LPC2361")
|
|
bitfld.long 0x0 21. " Ethernet ,Ethernet IRQ 21 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x0 20. " BOD ,BOD IRQ 20 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 19. " I2C1 ,I2C1 IRQ 19 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 18. " AD0 ,A/D Converter 0 IRQ 18 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 17. " EINT3 ,External Interrupt 3 IRQ 17 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 16. " LCD ,External Interrupt 2 IRQ 16 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x0 16. " EINT2 ,External Interrupt 2 IRQ 16 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 15. " EINT1 ,External Interrupt 1 IRQ 15 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 14. " EINT0 ,External Interrupt 0 IRQ 14 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " RTC ,RTC IRQ 13 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " PLL ,PLL IRQ 12 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " SSP1 ,SSP 1 IRQ 11 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " SPI/SSP0 ,SPI/SSP0 IRQ 10 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " I2C0 ,I2C0 IRQ 9 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 8. " PWM0&1 ,PWM0&1 IRQ 8 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x0 8. " PWM1 ,PWM1 IRQ 8 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 7. " UART1 ,UART 1 IRQ 7 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " UART0 ,UART 0 IRQ 6 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " TIMER1 ,Timer 1 IRQ 5 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " TIMER0 ,Timer 0 IRQ 4 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " ARMCore1 ,ARMCore1 IRQ 3 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " ARMCore0 ,ARMCore0 IRQ 2 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WDT ,Watchdog IRQ 0 enabled/classified as IRQ and asserted" "No interrupt,Interrupt"
|
|
line.long 0x04 "VICFIQStatus,FIQ Status Register"
|
|
bitfld.long 0x4 31. " I2S ,I2S FIQ 31 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 30. " I2C2 ,I2C2 FIQ 30 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 29. " UART3 ,UART3 FIQ 29 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 28. " UART2 ,UART2 FIQ 28 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 27. " TIMER3 ,TIMER3 FIQ 27 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 26. " TIMER2 ,TIMER2 FIQ 26 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 25. " GPDMA ,GPDMA FIQ 25 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x4 24. " SD/MMC ,SD/MMC FIQ 24 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x4 23. " CAN1&2 ,CAN1 And CAN2 FIQ 23 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 22. " USB ,USB FIQ 22 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="LPC2361")
|
|
bitfld.long 0x4 21. " Ethernet ,Ethernet FIQ 21 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x4 20. " BOD ,BOD FIQ 20 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 19. " I2C1 ,I2C1 FIQ 19 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 18. " AD0 ,A/D Converter 0 FIQ 18 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 17. " EINT3 ,External Interrupt 3 FIQ 17 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x4 16. " LCD ,External Interrupt 2 FIQ 16 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x4 16. " EINT2 ,External Interrupt 2 FIQ 16 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x4 15. " EINT1 ,External Interrupt 1 FIQ 15 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 14. " EINT0 ,External Interrupt 0 FIQ 14 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 13. " RTC ,RTC FIQ 13 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " PLL ,PLL FIQ 12 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " SSP1 ,SSP 1 FIQ 11 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " SPI/SSP0 ,SPI/SSP0 FIQ 10 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " I2C0 ,I2C0 FIQ 9 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x4 8. " PWM0&1 ,PWM0&1 FIQ 8 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x4 8. " PWM1 ,PWM1 FIQ 8 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x4 7. " UART1 ,UART 1 FIQ 7 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " UART0 ,UART 0 FIQ 6 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " TIMER1 ,Timer 1 FIQ 5 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " TIMER0 ,Timer 0 FIQ 4 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " ARMCore1 ,ARMCore1 FIQ 3 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " ARMCore0 ,ARMCore0 FIQ 2 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 0. " WDT ,Watchdog FIQ 0 enabled/classified as FIQ and asserted" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xC
|
|
textline " "
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "VICRawIntr,Raw Interrupt Status Register"
|
|
bitfld.long 0x0 31. " I2S ,I2S Raw Interrupt 31 Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 30. " I2C2 ,I2C2 Raw Interrupt 30 Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 29. " UART3 ,UART3 Raw Interrupt 29 Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 28. " UART2 ,UART2 Raw Interrupt 28 Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 27. " TIMER3 ,TIMER3 Raw Interrupt (IRQ 27) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 26. " TIMER2 ,TIMER2 Raw Interrupt (IRQ 26) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " GPDMA ,GPDMA Raw Interrupt (IRQ 25) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 24. " SD/MMC ,SD/MMC Raw Interrupt (IRQ 24) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 23. " CAN1&2 ,CAN1 And CAN2 Raw Interrupt (IRQ 23) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 22. " USB ,USB Raw Interrupt (IRQ 22) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="LPC2361")
|
|
bitfld.long 0x0 21. " Ethernet ,Ethernet Raw Interrupt (IRQ 21) Status" "No interrupt,Interrupt"
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x0 20. " BOD ,BOD Raw Interrupt (IRQ 20) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 19. " I2C1 ,I2C1 Raw Interrupt (IRQ 19) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 18. " AD0 ,A/D Converter 0 Raw Interrupt (IRQ 18) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 17. " EINT3 ,External Interrupt 3 Raw Interrupt (IRQ 17) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 16. " LCD ,External Interrupt 2 Raw Interrupt (IRQ 16) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x0 16. " EINT2 ,External Interrupt 2 Raw Interrupt (IRQ 16) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 15. " EINT1 ,External Interrupt 1 Raw Interrupt (IRQ 15) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 14. " EINT0 ,External Interrupt 0 Raw Interrupt (IRQ 14) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 13. " RTC ,RTC Raw Interrupt (IRQ 13) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PLL ,PLL Raw Interrupt (IRQ 12) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 11. " SSP1 ,SSP 1 Raw Interrupt (IRQ 11) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " SPI/SSP0 ,SPI/SSP0 Raw Interrupt (IRQ 10) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " I2C0 ,I2C0 Raw Interrupt (IRQ 9) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif (cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 8. " PWM0&1 ,PWM0&1 Raw Interrupt (IRQ 8) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x0 8. " PWM1 ,PWM1 Raw Interrupt (IRQ 8) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 7. " UART1 ,UART 1 Raw Interrupt (IRQ 7) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " UART0 ,UART 0 Raw Interrupt (IRQ 6) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 5. " TIMER1 ,Timer 1 Raw Interrupt (IRQ 5) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TIMER0 ,Timer 0 Raw Interrupt (IRQ 4) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " ARMCore1 ,ARMCore1 Raw Interrupt (IRQ 3) Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " ARMCore0 ,ARMCore0 Raw Interrupt (IRQ 2) Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WDT ,Watchdog Raw Interrupt (IRQ 0) Status" "No interrupt,Interrupt"
|
|
width 0xE
|
|
tree "Interrupt Select/Enable Registers"
|
|
textline " "
|
|
group.long 0x0C++0x7
|
|
line.long 0x00 "VICIntSelect,Interrupt Select Register"
|
|
bitfld.long 0x0 31. " I2S ,I2S Interrupt 31 Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 30. " I2C2 ,I2C2 Interrupt 30 Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 29. " UART3 ,UART3 Interrupt 29 Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 28. " UART2 ,UART2 Interrupt 28 Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x0 27. " TIMER3 ,TIMER3 Interrupt (IRQ 27) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 26. " TIMER2 ,TIMER2 Interrupt (IRQ 26) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 25. " GPDMA ,GPDMA Interrupt (IRQ 25) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 24. " SD/MMC ,SD/MMC Interrupt (IRQ 24) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 23. " CAN1&2 ,CAN1 And CAN2 Interrupt (IRQ 23) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 22. " USB ,USB Interrupt (IRQ 22) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="LPC2361")
|
|
bitfld.long 0x0 21. " Ethernet ,Ethernet Interrupt (IRQ 21) Category Selection" "IRQ,FIQ"
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x0 20. " BOD ,BOD Interrupt (IRQ 20) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 19. " I2C1 ,I2C1 Interrupt (IRQ 19) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 18. " AD0 ,A/D Converter 0 Interrupt (IRQ 18) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x0 17. " EINT3 ,External Interrupt 3 Interrupt (IRQ 17) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 16. " LCD ,External Interrupt 2 Interrupt (IRQ 16) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x0 16. " EINT2 ,External Interrupt 2 Interrupt (IRQ 16) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 15. " EINT1 ,External Interrupt 1 Interrupt (IRQ 15) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 14. " EINT0 ,External Interrupt 0 Interrupt (IRQ 14) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 13. " RTC ,RTC Interrupt (IRQ 13) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 12. " PLL ,PLL Interrupt (IRQ 12) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x0 11. " SSP1 ,SSP 1 Interrupt (IRQ 11) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 10. " SPI/SSP0 ,SPI/SSP0 Interrupt (IRQ 10) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 9. " I2C0 ,I2C0 Interrupt (IRQ 9) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
sif (cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 8. " PWM0&1 ,PWM0&1 Interrupt (IRQ 8) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x0 8. " PWM1 ,PWM1 Interrupt (IRQ 8) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 7. " UART1 ,UART 1 Interrupt (IRQ 7) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 6. " UART0 ,UART 0 Interrupt (IRQ 6) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 5. " TIMER1 ,Timer 1 Interrupt (IRQ 5) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 4. " TIMER0 ,Timer 0 Interrupt (IRQ 4) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x0 3. " ARMCore1 ,ARMCore1 Interrupt (IRQ 3) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 2. " ARMCore0 ,ARMCore0 Interrupt (IRQ 2) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x0 0. " WDT ,Watchdog Interrupt (IRQ 0) Category Selection" "IRQ,FIQ"
|
|
width 0xe
|
|
line.long 0x04 "VICIntEnable,Interrupt Enable Register"
|
|
setclrfld.long 0x4 31. 0x4 31. 0x8 31. " I2S_Clear/Set ,I2S Interrupt 31 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 30. 0x4 30. 0x8 30. " I2C2_Clear/Set ,I2C2 Interrupt 30 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x4 29. 0x8 29. " UART3_Clear/Set ,UART3 Interrupt 29 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 28. 0x4 28. 0x8 28. " UART2_Clear/Set ,UART2 Interrupt 28 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x4 27. 0x8 27. " TIMER3_Clear/Set ,TIMER3 Interrupt (IRQ 27) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 26. 0x4 26. 0x8 26. " TIMER2_Clear/Set ,TIMER2 Interrupt (IRQ 26) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x4 25. 0x8 25. " GPDMA_Clear/Set ,GPDMA Interrupt (IRQ 25) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
setclrfld.long 0x4 24. 0x4 24. 0x8 24. " SD/MMC_Clear/Set ,SD/MMC Interrupt (IRQ 24) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
setclrfld.long 0x4 23. 0x4 23. 0x8 23. " CAN1&2_Clear/Set ,CAN1 And CAN2 Interrupt (IRQ 23) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 22. 0x4 22. 0x8 22. " USB_Clear/Set ,USB Interrupt (IRQ 22) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="LPC2361")
|
|
setclrfld.long 0x4 21. 0x4 21. 0x8 21. " Ethernet_Clear/Set ,Ethernet Interrupt (IRQ 21) Enable" "Disabled,Enabled"
|
|
textfld " "
|
|
endif
|
|
setclrfld.long 0x4 20. 0x4 20. 0x8 20. " BOD_Clear/Set ,BOD Interrupt (IRQ 20) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x4 19. 0x8 19. " I2C1_Clear/Set ,I2C1 Interrupt (IRQ 19) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 18. 0x4 18. 0x8 18. " AD0_Clear/Set ,A/D Converter 0 Interrupt (IRQ 18) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x4 17. 0x8 17. " EINT3_Clear/Set ,External Interrupt 3 Interrupt (IRQ 17) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
setclrfld.long 0x4 16. 0x4 16. 0x8 16. " LCD_Clear/Set ,External Interrupt 2 Interrupt (IRQ 16) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
setclrfld.long 0x4 16. 0x4 16. 0x8 16. " EINT2_Clear/Set ,External Interrupt 2 Interrupt (IRQ 16) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x4 15. 0x4 15. 0x8 15. " EINT1_Clear/Set ,External Interrupt 1 Interrupt (IRQ 15) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 14. 0x4 14. 0x8 14. " EINT0_Clear/Set ,External Interrupt 0 Interrupt (IRQ 14) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x4 13. 0x8 13. " RTC_Clear/Set ,RTC Interrupt (IRQ 13) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 12. 0x4 12. 0x8 12. " PLL_Clear/Set ,PLL Interrupt (IRQ 12) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x4 11. 0x8 11. " SSP1_Clear/Set ,SSP 1 Interrupt (IRQ 11) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 10. 0x4 10. 0x8 10. " SPI/SSP0_Clear/Set ,SPI/SSP0 Interrupt (IRQ 10) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x4 9. 0x8 9. " I2C0_Clear/Set ,I2C0 Interrupt (IRQ 9) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
setclrfld.long 0x4 8. 0x4 8. 0x8 8. " PWM0&1_Clear/Set ,PWM0&1 Interrupt (IRQ 8) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
setclrfld.long 0x4 8. 0x4 8. 0x8 8. " PWM1_Clear/Set ,PWM1 Interrupt (IRQ 8) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x4 7. 0x4 7. 0x8 7. " UART1_Clear/Set ,UART 1 Interrupt (IRQ 7) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 6. 0x4 6. 0x8 6. " UART0_Clear/Set ,UART 0 Interrupt (IRQ 6) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x4 5. 0x8 5. " TIMER1_Clear/Set ,Timer 1 Interrupt (IRQ 5) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 4. 0x4 4. 0x8 4. " TIMER0_Clear/Set ,Timer 0 Interrupt (IRQ 4) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x4 3. 0x8 3. " ARMCore1_Clear/Set ,ARMCore1 Interrupt (IRQ 3) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x4 2. 0x4 2. 0x8 2. " ARMCore0_Clear/Set ,ARMCore0 Interrupt (IRQ 2) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 0. 0x4 0. 0x8 0. " WDT_Clear/Set ,Watchdog Interrupt (IRQ 0) Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xF
|
|
textline " "
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "VICSoftInt,Software Interrupt Register"
|
|
setclrfld.long 0x0 31. 0x0 31. 0x4 31. " I2S_Clear/Set ,I2S Software Interrupt 31 Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 30. 0x0 30. 0x4 30. " I2C2_Clear/Set ,I2C2 Software Interrupt 30 Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 29. 0x0 29. 0x4 29. " UART3_Clear/Set ,UART3 Software Interrupt 29 Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 28. 0x0 28. 0x4 28. " UART2_Clear/Set ,UART2 Software Interrupt 28 Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 27. 0x0 27. 0x4 27. " TIMER3_Clear/Set ,TIMER3 Software Interrupt (IRQ 27) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 26. 0x0 26. 0x4 26. " TIMER2_Clear/Set ,TIMER2 Software Interrupt (IRQ 26) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x0 25. 0x4 25. " GPDMA_Clear/Set ,GPDMA Software Interrupt (IRQ 25) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
setclrfld.long 0x0 24. 0x0 24. 0x4 24. " SD/MMC_Clear/Set ,SD/MMC Software Interrupt (IRQ 24) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
setclrfld.long 0x0 23. 0x0 23. 0x4 23. " CAN1&2_Clear/Set ,CAN1 And CAN2 Software Interrupt (IRQ 23) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 22. 0x0 22. 0x4 22. " USB_Clear/Set ,USB Software Interrupt (IRQ 22) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="LPC2361")
|
|
setclrfld.long 0x0 21. 0x0 21. 0x4 21. " Ethernet_Clear/Set ,Ethernet Software Interrupt (IRQ 21) Force Request" "Not forced,Forced"
|
|
textfld " "
|
|
endif
|
|
setclrfld.long 0x0 20. 0x0 20. 0x4 20. " BOD_Clear/Set ,BOD Software Interrupt (IRQ 20) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x0 19. 0x4 19. " I2C1_Clear/Set ,I2C1 Software Interrupt (IRQ 19) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 18. 0x0 18. 0x4 18. " AD0_Clear/Set ,A/D Converter 0 Software Interrupt (IRQ 18) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 17. 0x0 17. 0x4 17. " EINT3_Clear/Set ,External Interrupt 3 Software Interrupt (IRQ 17) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
setclrfld.long 0x0 16. 0x0 16. 0x4 16. " LCD_Clear/Set ,External Interrupt 2 Software Interrupt (IRQ 16) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
else
|
|
setclrfld.long 0x0 16. 0x0 16. 0x4 16. " EINT2_Clear/Set ,External Interrupt 2 Software Interrupt (IRQ 16) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x0 15. 0x0 15. 0x4 15. " EINT1_Clear/Set ,External Interrupt 1 Software Interrupt (IRQ 15) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 14. 0x0 14. 0x4 14. " EINT0_Clear/Set ,External Interrupt 0 Software Interrupt (IRQ 14) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x0 13. 0x4 13. " RTC_Clear/Set ,RTC Software Interrupt (IRQ 13) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 12. 0x0 12. 0x4 12. " PLL_Clear/Set ,PLL Software Interrupt (IRQ 12) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x0 11. 0x4 11. " SSP1_Clear/Set ,SSP 1 Software Interrupt (IRQ 11) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 10. 0x0 10. 0x4 10. " SPI/SSP0_Clear/Set ,SPI/SSP0 Software Interrupt (IRQ 10) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x0 9. 0x4 9. " I2C0_Clear/Set ,I2C0 Software Interrupt (IRQ 9) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
sif (cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
setclrfld.long 0x0 8. 0x0 8. 0x4 8. " PWM0&1_Clear/Set ,PWM0&1 Software Interrupt (IRQ 8) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
else
|
|
setclrfld.long 0x0 8. 0x0 8. 0x4 8. " PWM1_Clear/Set ,PWM1 Software Interrupt (IRQ 8) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x0 7. 0x0 7. 0x4 7. " UART1_Clear/Set ,UART 1 Software Interrupt (IRQ 7) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 6. 0x0 6. 0x4 6. " UART0_Clear/Set ,UART 0 Software Interrupt (IRQ 6) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x0 5. 0x4 5. " TIMER1_Clear/Set ,Timer 1 Software Interrupt (IRQ 5) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 4. 0x0 4. 0x4 4. " TIMER0_Clear/Set ,Timer 0 Software Interrupt (IRQ 4) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 3. 0x0 3. 0x4 3. " ARMCore1_Clear/Set ,ARMCore1 Software Interrupt (IRQ 3) Force Request" "Not forced,Forced"
|
|
setclrfld.long 0x0 2. 0x0 2. 0x4 2. " ARMCore0_Clear/Set ,ARMCore0 Software Interrupt (IRQ 2) Force Request" "Not forced,Forced"
|
|
textline " "
|
|
setclrfld.long 0x0 0. 0x0 0. 0x4 0. " WDT_Clear/Set ,Watchdog Software Interrupt (IRQ 0) Force Request" "Not forced,Forced"
|
|
width 0xf
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "VICProtection,Protection enable register"
|
|
bitfld.long 0x0 0. " VIC_access ,Protection Enable Register" "User/Privileged,Privileged"
|
|
width 0x13
|
|
tree "Software/Vector Priority Registers"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "VICSWPriorityMask,Software Priority Mask Register"
|
|
bitfld.long 0x0 15. " VICSWPriorityMask15 ,Interrupt priority level Mask 15" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 14. " VICSWPriorityMask14 ,Interrupt priority level Mask 14" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 13. " VICSWPriorityMask13 ,Interrupt priority level Mask 13" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 12. " VICSWPriorityMask12 ,Interrupt priority level Mask 12" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 11. " VICSWPriorityMask11 ,Interrupt priority level Mask 11" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 10. " VICSWPriorityMask10 ,Interrupt priority level Mask 10" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 9. " VICSWPriorityMask9 ,Interrupt priority level Mask 9" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 8. " VICSWPriorityMask8 ,Interrupt priority level Mask 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 7. " VICSWPriorityMask7 ,Interrupt priority level Mask 7" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 6. " VICSWPriorityMask6 ,Interrupt priority level Mask 6" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 5. " VICSWPriorityMask5 ,Interrupt priority level Mask 5" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 4. " VICSWPriorityMask4 ,Interrupt priority level Mask 4" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 3. " VICSWPriorityMask3 ,Interrupt priority level Mask 3" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 2. " VICSWPriorityMask2 ,Interrupt priority level Mask 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 1. " VICSWPriorityMask1 ,Interrupt priority level Mask 1" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x0 0. " VICSWPriorityMask0 ,Interrupt priority level Mask 0" "Masked,Not masked"
|
|
group.long 0x200++0x7F
|
|
line.long 0x0 "VICVectPriority0,Vector priority 0 register"
|
|
bitfld.long 0x0 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 0 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x4 "VICVectPriority1,Vector priority 1 register"
|
|
bitfld.long 0x4 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 1 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x8 "VICVectPriority2,Vector priority 2 register"
|
|
bitfld.long 0x8 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 2 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0xC "VICVectPriority3,Vector priority 3 register"
|
|
bitfld.long 0xC 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 3 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x10 "VICVectPriority4,Vector priority 4 register"
|
|
bitfld.long 0x10 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 4 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x14 "VICVectPriority5,Vector priority 5 register"
|
|
bitfld.long 0x14 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 5 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x18 "VICVectPriority6,Vector priority 6 register"
|
|
bitfld.long 0x18 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 6 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x1C "VICVectPriority7,Vector priority 7 register"
|
|
bitfld.long 0x1C 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 7 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x20 "VICVectPriority8,Vector priority 8 register"
|
|
bitfld.long 0x20 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 8 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x24 "VICVectPriority9,Vector priority 9 register"
|
|
bitfld.long 0x24 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 9 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x28 "VICVectPriority10,Vector priority 10 register"
|
|
bitfld.long 0x28 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 10 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x2C "VICVectPriority11,Vector priority 11 register"
|
|
bitfld.long 0x2C 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 11 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x30 "VICVectPriority12,Vector priority 12 register"
|
|
bitfld.long 0x30 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 12 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x34 "VICVectPriority13,Vector priority 13 register"
|
|
bitfld.long 0x34 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 13 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x38 "VICVectPriority14,Vector priority 14 register"
|
|
bitfld.long 0x38 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 14 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x3C "VICVectPriority15,Vector priority 15 register"
|
|
bitfld.long 0x3C 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 15 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x40 "VICVectPriority16,Vector priority 16 register"
|
|
bitfld.long 0x40 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 16 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x44 "VICVectPriority17,Vector priority 17 register"
|
|
bitfld.long 0x44 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 17 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x48 "VICVectPriority18,Vector priority 18 register"
|
|
bitfld.long 0x48 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 18 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x4C "VICVectPriority19,Vector priority 19 register"
|
|
bitfld.long 0x4C 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 19 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x50 "VICVectPriority20,Vector priority 20 register"
|
|
bitfld.long 0x50 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 20 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x54 "VICVectPriority21,Vector priority 21 register"
|
|
bitfld.long 0x54 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 21 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x58 "VICVectPriority22,Vector priority 22 register"
|
|
bitfld.long 0x58 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 22 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x5C "VICVectPriority23,Vector priority 23 register"
|
|
bitfld.long 0x5C 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 23 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x60 "VICVectPriority24,Vector priority 24 register"
|
|
bitfld.long 0x60 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 24 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x64 "VICVectPriority25,Vector priority 25 register"
|
|
bitfld.long 0x64 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 25 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x68 "VICVectPriority26,Vector priority 26 register"
|
|
bitfld.long 0x68 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 26 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x6C "VICVectPriority27,Vector priority 27 register"
|
|
bitfld.long 0x6C 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 27 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x70 "VICVectPriority28,Vector priority 28 register"
|
|
bitfld.long 0x70 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 28 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x74 "VICVectPriority29,Vector priority 29 register"
|
|
bitfld.long 0x74 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 29 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x78 "VICVectPriority30,Vector priority 30 register"
|
|
bitfld.long 0x78 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 30 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x7C "VICVectPriority31,Vector priority 31 register"
|
|
bitfld.long 0x7C 0.--3. " VICVectPriority ,One of 16 priority levels for the vectored interrupt 31 selection" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
tree.end
|
|
width 0xE
|
|
tree "Vector address registers"
|
|
group.long 0x100++0x7F
|
|
line.long 0x0 "VICVectAddr0,Vector address 0 register"
|
|
line.long 0x4 "VICVectAddr1,Vector address 1 register"
|
|
line.long 0x8 "VICVectAddr2,Vector address 2 register"
|
|
line.long 0xC "VICVectAddr3,Vector address 3 register"
|
|
line.long 0x10 "VICVectAddr4,Vector address 4 register"
|
|
line.long 0x14 "VICVectAddr5,Vector address 5 register"
|
|
line.long 0x18 "VICVectAddr6,Vector address 6 register"
|
|
line.long 0x1C "VICVectAddr7,Vector address 7 register"
|
|
line.long 0x20 "VICVectAddr8,Vector address 8 register"
|
|
line.long 0x24 "VICVectAddr9,Vector address 9 register"
|
|
line.long 0x28 "VICVectAddr10,Vector address 10 register"
|
|
line.long 0x2C "VICVectAddr11,Vector address 11 register"
|
|
line.long 0x30 "VICVectAddr12,Vector address 12 register"
|
|
line.long 0x34 "VICVectAddr13,Vector address 13 register"
|
|
line.long 0x38 "VICVectAddr14,Vector address 14 register"
|
|
line.long 0x3C "VICVectAddr15,Vector address 15 register"
|
|
line.long 0x40 "VICVectAddr16,Vector address 16 register"
|
|
line.long 0x44 "VICVectAddr17,Vector address 17 register"
|
|
line.long 0x48 "VICVectAddr18,Vector address 18 register"
|
|
line.long 0x4C "VICVectAddr19,Vector address 19 register"
|
|
line.long 0x50 "VICVectAddr20,Vector address 20 register"
|
|
line.long 0x54 "VICVectAddr21,Vector address 21 register"
|
|
line.long 0x58 "VICVectAddr22,Vector address 22 register"
|
|
line.long 0x5C "VICVectAddr23,Vector address 23 register"
|
|
line.long 0x60 "VICVectAddr24,Vector address 24 register"
|
|
line.long 0x64 "VICVectAddr25,Vector address 25 register"
|
|
line.long 0x68 "VICVectAddr26,Vector address 26 register"
|
|
line.long 0x6C "VICVectAddr27,Vector address 27 register"
|
|
line.long 0x70 "VICVectAddr28,Vector address 28 register"
|
|
line.long 0x74 "VICVectAddr29,Vector address 29 register"
|
|
line.long 0x78 "VICVectAddr30,Vector address 30 register"
|
|
line.long 0x7C "VICVectAddr31,Vector address 31 register"
|
|
group.long 0xF00++0x3
|
|
line.long 0x0 "VICAddress,Vector address register"
|
|
tree.end
|
|
width 0x0B
|
|
elif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
base 0xFFFFF000
|
|
width 0x10
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "VICSoftInt,Software Interrupt Register"
|
|
setclrfld.long 0x0 0. 0x0 0. 0x4 0. " WDT_set/clr ,Watchdog Software Interrupt (IRQ 0) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 2. 0x0 2. 0x4 2. " ARMCore0_set/clr ,ARM Core 0 Software Interrupt (IRQ 2) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 3. 0x0 3. 0x4 3. " ARMCore1_set/clr ,ARM Core 1 Software Interrupt (IRQ 3) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 4. 0x0 4. 0x4 4. " TIMER0_set/clr ,Timer 0 Software Interrupt (IRQ 4) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x0 5. 0x4 5. " TIMER1_set/clr ,Timer 1 Software Interrupt (IRQ 5) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 6. 0x0 6. 0x4 6. " UART0_set/clr ,UART 0 Software Interrupt (IRQ 6) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x0 7. 0x4 7. " UART1_set/clr ,UART 1 Software Interrupt (IRQ 7) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 8. 0x0 8. 0x4 8. " PWM_set/clr ,PWM Software Interrupt (IRQ 8) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x0 9. 0x4 9. " I2C_set/clr ,I2C Software Interrupt (IRQ 9) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 10. 0x0 10. 0x4 10. " SPI0_set/clr ,SPI 0 Software Interrupt (IRQ 10) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x0 11. 0x4 11. " SPI1/SSP_set/clr ,SPI 1/SSP Software Interrupt (IRQ 11) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 12. 0x0 12. 0x4 12. " PLL_set/clr ,PLL Software Interrupt (IRQ 12) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x0 13. 0x4 13. " RTC_set/clr ,RTC Software Interrupt (IRQ 13) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 14. 0x0 14. 0x4 14. " EINT0_set/clr ,External Interrupt 0 Software Interrupt (IRQ 14) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 15. 0x0 15. 0x4 15. " EINT1_set/clr ,External Interrupt 1 Software Interrupt (IRQ 15) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 16. 0x0 16. 0x4 16. " EINT2_set/clr ,External Interrupt 2 Software Interrupt (IRQ 16) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 17. 0x0 17. 0x4 17. " EINT3_set/clr ,External Interrupt 3 Software Interrupt (IRQ 17) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 18. 0x0 18. 0x4 18. " ADC_set/clr ,A/D Converter Software Interrupt (IRQ 18) Force Request" "Not requested,Requested"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "VICRawIntr,Raw Interrupt Status Register"
|
|
bitfld.long 0x00 0. " WDT ,Watchdog Raw Interrupt (IRQ 0) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 2. " ARMCore0 ,ARM Core 0 Raw Interrupt (IRQ 2) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMCore1 ,ARM Core 1 Raw Interrupt (IRQ 3) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 4. " TIMER0 ,Timer 0 Raw Interrupt (IRQ 4) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1 ,Timer 1 Raw Interrupt (IRQ 5) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 6. " UART0 ,UART 0 Raw Interrupt (IRQ 6) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " UART1 ,UART 1 Raw Interrupt (IRQ 7) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 8. " PWM ,PWM Raw Interrupt (IRQ 8) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I2C ,I2C Raw Interrupt (IRQ 9) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 10. " SPI0 ,SPI 0 Raw Interrupt (IRQ 10) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI1/SSP ,SPI 1/SSP Raw Interrupt (IRQ 11) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 12. " PLL ,PLL Raw Interrupt (IRQ 12) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RTC ,RTC Raw Interrupt (IRQ 13) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 14. " EINT0 ,External 0 Raw Interrupt (IRQ 14) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EINT1 ,External 1 Raw Interrupt (IRQ 15) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 16. " EINT2 ,External 2 Raw Interrupt (IRQ 16) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT3 ,External 3 Raw Interrupt (IRQ 17) Status" "Negated,Asserted"
|
|
bitfld.long 0x00 18. " ADC ,A/D Converter Raw Interrupt (IRQ 18) Status" "Negated,Asserted"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "VICIntEnable,Interrupt Enable Register (Read Access)"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " WDT_set/clr ,Watchdog Interrupt (IRQ 0) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " ARMCore0_set/clr ,ARM Core 0 Interrupt (IRQ 2) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " ARMCore1_set/clr ,ARM Core 1 Interrupt (IRQ 3) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMER0_set/clr ,Timer 0 Interrupt (IRQ 4) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " TIMER1_set/clr ,Timer 1 Interrupt (IRQ 5) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " UART0_set/clr ,UART 0 Interrupt (IRQ 6) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " UART1_set/clr ,UART 1 Interrupt (IRQ 7) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " PWM0_set/clr ,PWM Interrupt (IRQ 8) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " I2C_set/clr ,I2C Interrupt (IRQ 9) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " SPI0_set/clr ,SPI 0 Interrupt (IRQ 10) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " SPI1/SSP_set/clr ,SPI 1 Interrupt (IRQ 11) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " PLL_set/clr ,PLL Interrupt (IRQ 12) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " RTC_set/clr ,RTC Interrupt (IRQ 13) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " EINT0_set/clr ,External Interrupt 0 (IRQ 14) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " EINT1_set/clr ,External Interrupt 1 (IRQ 15) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " EINT2_set/clr ,External Interrupt 2 (IRQ 16) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " EINT3_set/clr ,External Interrupt 3 (IRQ 17) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " ADC_set/clr ,A/D Converter Interrupt (IRQ 18) Enable" "Disabled,Enabled"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "VICIntSelect,Interrupt Select Register"
|
|
bitfld.long 0x00 0. " WDTSEL ,Watchdog Interrupt (IRQ 0) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 1. " IRQ1SEL ,Software Interrupt (IRQ 1) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ARMCore0SEL ,ARM Core 0 Interrupt (IRQ 2) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 3. " ARMCore1SEL ,ARM Core 1 Interrupt (IRQ 3) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMER0SEL ,Timer 0 Interrupt (IRQ 4) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " TIMER1SEL ,Timer 1 Interrupt (IRQ 5) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 6. " UART0SEL ,UART 0 Interrupt (IRQ 6) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 7. " UART1SEL ,UART 1 Interrupt (IRQ 7) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PWMSEL ,PWM Interrupt (IRQ 8) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " I2CSEL ,I2C Interrupt (IRQ 9) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0SEL ,SPI 0 Interrupt (IRQ 10) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " SPI1/SSPSEL ,SPI 1 Interrupt (IRQ 11) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 12. " PLLSEL ,PLL Interrupt (IRQ 12) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RTCSEL ,RTC Interrupt (IRQ 13) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 14. " EINT0SEL ,External Interrupt 0 (IRQ 14) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EINT1EL ,External Interrupt 1 (IRQ 15) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 16. " EINT2SEL ,External Interrupt 2 (IRQ 16) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT3SEL ,External Interrupt 3 (IRQ 17) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 18. " ADCSEL ,A/D Converter Interrupt (IRQ 18) Category Selection" "IRQ,FIQ"
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VICIRQStatus,IRQ Status Register"
|
|
bitfld.long 0x00 0. " WDT ,WDT (IRQ 0) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " ARMCore0 ,ARM Core 0 (IRQ 2) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMCore1 ,ARM Core 1 (IRQ 3) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " TIMER0 ,TIMER0 (IRQ 4) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1 ,TIMER1 (IRQ 5) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " UART0 ,UART0 (IRQ 6) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " UART0 ,UART1 (IRQ 7) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " PWM0 ,PWM0 (IRQ 8) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I2C ,I2C (IRQ 9) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " SPI0 ,SPI0 (IRQ 10) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI1/SSP ,SPI1 (IRQ 11) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " PLL ,PLL (IRQ 12) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RTC ,RTC (IRQ 13) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " EINT0 ,EINT0 (IRQ 14) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EINT1 ,EINT1 (IRQ 15) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " EINT2 ,EINT2 (IRQ 16) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT2 ,EINT2 (IRQ 17) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " ADC ,A/D (IRQ 18) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
line.long 0x04 "VICFIQStatus,FIQ Status Requests"
|
|
bitfld.long 0x04 0. " FIQ0 ,WDT (IRQ 0) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " FIQ2 ,ARM Core 0 (IRQ 2) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FIQ3 ,ARM Core 1 (IRQ 3) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " FIQ4 ,TIMER1 (IRQ 4) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 5. " FIQ5 ,TIMER1 (IRQ 5) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " FIQ6 ,UART0 (IRQ 6) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FIQ7 ,UART1 (IRQ 7) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " FIQ8 ,PWM0 (IRQ 8) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 9. " FIQ9 ,I2C (IRQ 9) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " FIQ10 ,SPI0 (IRQ 10) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 11. " FIQ11 ,SPI1/SSP (IRQ 11) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " FIQ12 ,PLL (IRQ 12) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 13. " FIQ13 ,RTC (IRQ 13) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " FIQ14 ,EINT0 (IRQ 14) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FIQ15 ,EINT1 (IRQ 15) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 16. " FIQ16 ,EINT2 (IRQ 16) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 17. " FIQ17 ,EINT2 (IRQ 17) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " FIQ18 ,ADC (IRQ 18) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
group.long 0x200++0x3F
|
|
line.long 0x00 "VICVectCntl0,Vector control 0 register"
|
|
bitfld.long 0x00 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC0,I2C1,BOD,?..."
|
|
line.long 0x04 "VICVectCntl1,Vector control 1 register"
|
|
bitfld.long 0x04 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x08 "VICVectCntl2,Vector control 2 register"
|
|
bitfld.long 0x08 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x0C "VICVectCntl3,Vector control 3 register"
|
|
bitfld.long 0x0C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x10 "VICVectCntl4,Vector control 4 register"
|
|
bitfld.long 0x10 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x14 "VICVectCntl5,Vector control 5 register"
|
|
bitfld.long 0x14 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x18 "VICVectCntl6,Vector control 6 register"
|
|
bitfld.long 0x18 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x1C "VICVectCntl7,Vector control 7 register"
|
|
bitfld.long 0x1C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x20 "VICVectCntl8,Vector control 8 register"
|
|
bitfld.long 0x20 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x24 "VICVectCntl9,Vector control 9 register"
|
|
bitfld.long 0x24 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x28 "VICVectCntl10,Vector control 10 register"
|
|
bitfld.long 0x28 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x2C "VICVectCntl11,Vector control 11 register"
|
|
bitfld.long 0x2C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x30 "VICVectCntl12,Vector control 12 register"
|
|
bitfld.long 0x30 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x34 "VICVectCntl13,Vector control 13 register"
|
|
bitfld.long 0x34 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x38 "VICVectCntl14,Vector control 14 register"
|
|
bitfld.long 0x38 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
line.long 0x3C "VICVectCntl15,Vector control 15 register"
|
|
bitfld.long 0x3C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,Reserved,ARMCore0,ARMCore1,TIMER0,TIMER1,UART0,UART1,PWM0,I2C0,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,ADC,?..."
|
|
group.long 0x100++0x3F
|
|
line.long 0x00 "VICVectAddr0,Vector address 0 register"
|
|
line.long 0x04 "VICVectAddr1,Vector address 1 register"
|
|
line.long 0x08 "VICVectAddr2,Vector address 2 register"
|
|
line.long 0x0C "VICVectAddr3,Vector address 3 register"
|
|
line.long 0x10 "VICVectAddr4,Vector address 4 register"
|
|
line.long 0x14 "VICVectAddr5,Vector address 5 register"
|
|
line.long 0x18 "VICVectAddr6,Vector address 6 register"
|
|
line.long 0x1C "VICVectAddr7,Vector address 7 register"
|
|
line.long 0x20 "VICVectAddr8,Vector address 8 register"
|
|
line.long 0x24 "VICVectAddr9,Vector address 9 register"
|
|
line.long 0x28 "VICVectAddr10,Vector address 10 register"
|
|
line.long 0x2C "VICVectAddr11,Vector address 11 register"
|
|
line.long 0x30 "VICVectAddr12,Vector address 12 register"
|
|
line.long 0x34 "VICVectAddr13,Vector address 13 register"
|
|
line.long 0x38 "VICVectAddr14,Vector address 14 register"
|
|
line.long 0x3C "VICVectAddr15,Vector address 15 register"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "VICDefVectAddr,Default Vector Address Register"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "VICVectAddr,Vector Address Register"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "VICProtection,Protection enable register"
|
|
bitfld.long 0x0 0. " VICPROT ,Protection Enable Register" "User/Privileged,Privileged"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
;do not include anything
|
|
elif (cpu()=="LPC2114"||cpu()=="LPC2124"||cpu()=="LPC2212"||cpu()=="LPC2214"||cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2294")
|
|
base 0xFFFFF000
|
|
width 0x11
|
|
rgroup.long 0x00++0x0B
|
|
line.long 0x00 "VICIRQStatus,IRQ Status Register"
|
|
bitfld.long 0x00 0. " WDTASS ,WDT (IRQ 0) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " IRQ1ASS ,Software Interrupt (IRQ 1) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ARMCOREASS ,ARMCORE (IRQ 2) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " ARMCOREASS ,ARMCORE (IRQ 3) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMER0ASS ,TIMER0 (IRQ 4) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TIMER1ASS ,TIMER1 (IRQ 5) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 6. " UART0ASS ,UART0 (IRQ 6) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " UART0ASS ,UART1 (IRQ 7) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PWM0ASS ,PWM0 (IRQ 8) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " I2CASS ,I2C (IRQ 9) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0ASS ,SPI0 (IRQ 10) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " SPI1ASS ,SPI1 (IRQ 11) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLLASS ,PLL (IRQ 12) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " RTCASS ,RTC (IRQ 13) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0ASS ,EINT0 (IRQ 14) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " EINT1ASS ,EINT1 (IRQ 15) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2ASS ,EINT2 (IRQ 16) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " EINT2ASS ,EINT2 (IRQ 17) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 18. " A/DASS ,A/D (IRQ 18) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x00 19. " CANASS ,CAN (IRQ 19) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CAN1ASS ,CAN1 (IRQ 20) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " CAN2ASS ,CAN2 (IRQ 21) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x00 22. " CAN3ASS ,CAN3 (IRQ 22) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " CAN4ASS ,CAN4 (IRQ 23) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 26. " CAN1ASS ,CAN1 (IRQ 26) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " CAN2ASS ,CAN2 (IRQ 27) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x00 28. " CAN3ASS ,CAN3 (IRQ 28) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " CAN4ASS ,CAN4 (IRQ 29) enabled, classified as IRQ and asserted" "Not requested,Requested"
|
|
endif
|
|
endif
|
|
line.long 0x04 "VICFIQStatus,FIQ Status Requests"
|
|
bitfld.long 0x04 0. " FIQ0ASS ,WDT (IRQ 0) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " FIQ1ASS ,Software Interrupt (IRQ 1) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 2. " FIQ2ASS ,ARMCORE (IRQ 2) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 3. " FIQ3ASS ,ARMCORE (IRQ 3) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FIQ4ASS ,TIMER1 (IRQ 4) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 5. " FIQ5ASS ,TIMER1 (IRQ 5) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 6. " FIQ6ASS ,UART0 (IRQ 6) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 7. " FIQ7ASS ,UART1 (IRQ 7) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 8. " FIQ8ASS ,PWM0 (IRQ 8) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 9. " FIQ9ASS ,I2C (IRQ 9) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 10. " FIQ10ASS ,SPI0 (IRQ 10) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 11. " FIQ11ASS ,SPI1 (IRQ 11) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 12. " FIQ12ASS ,PLL (IRQ 12) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 13. " FIQ13ASS ,RTC (IRQ 13) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 14. " FIQ14ASS ,EINT0 (IRQ 14) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 15. " FIQ15ASS ,EINT1 (IRQ 15) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FIQ16ASS ,EINT2 (IRQ 16) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 17. " FIQ17ASS ,EINT2 (IRQ 17) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 18. " FIQ18ASS ,A/D (IRQ 18) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x04 19. " FIQ19ASS ,CAN (IRQ 19) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 20. " FIQ20ASS ,CAN1 (IRQ 20) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 21. " FIQ21ASS ,CAN2 (IRQ 21) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x04 22. " FIQ22ASS ,CAN3 (IRQ 22) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 23. " FIQ23ASS ,CAN4 (IRQ 23) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 26. " FIQ26ASS ,CAN1 (IRQ 26) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 27. " FIQ27ASS ,CAN2 (IRQ 27) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x04 28. " FIQ28ASS ,CAN3 (IRQ 28) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
bitfld.long 0x04 29. " FIQ29ASS ,CAN4 (IRQ 29) enabled, classified as FIQ and asserted" "Not requested,Requested"
|
|
endif
|
|
endif
|
|
line.long 0x08 "VICRawIntr,Raw Interrupt Status Register"
|
|
bitfld.long 0x08 0. " WDT ,Watchdog Raw Interrupt (IRQ 0) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 1. " IRQ1 ,Software Raw Interrupt (IRQ 1) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 2. " ARMCORE ,Embedded ICE Raw Interrupt (IRQ 2) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 3. " ARMCORE ,Embedded ICE Raw Interrupt (IRQ 3) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " TIMER0 ,Timer 0 Raw Interrupt (IRQ 4) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 5. " TIMER1 ,Timer 1 Raw Interrupt (IRQ 5) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 6. " UART0 ,UART 0 Raw Interrupt (IRQ 6) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 7. " UART1 ,UART 1 Raw Interrupt (IRQ 7) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 8. " PWM0 ,PWM Raw Interrupt (IRQ 8) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 9. " I2C ,I2C Raw Interrupt (IRQ 9) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI0 ,SPI 0 Raw Interrupt (IRQ 10) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 11. " SPI1 ,SPI 1 Raw Interrupt (IRQ 11) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PLL ,PLL Raw Interrupt (IRQ 12) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 13. " RTC ,RTC Raw Interrupt (IRQ 13) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 14. " EINT0 ,External 0 Raw Interrupt (IRQ 14) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 15. " EINT1 ,External 1 Raw Interrupt (IRQ 15) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 16. " EINT2 ,External 2 Raw Interrupt (IRQ 16) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 17. " EINT2 ,External 2 Raw Interrupt (IRQ 17) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 18. " A/D ,A/D Converter Raw Interrupt (IRQ 18) Status" "Negated,Asserted"
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x08 19. " CAN ,CAN And Acceptance Filter Raw Interrupt (IRQ 19) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 20. " CAN1 ,CAN 1 Raw Interrupt (IRQ 20) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 21. " CAN2 ,CAN 1 Raw Interrupt (IRQ 21) Status" "Negated,Asserted"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x08 22. " CAN3 ,CAN 3 Raw Interrupt (IRQ 22) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 23. " CAN4 ,CAN 4 Raw Interrupt (IRQ 23) Status" "Negated,Asserted"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x08 26. " CAN1 ,CAN 1 Raw Interrupt (IRQ 26) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 27. " CAN2 ,CAN 2 Raw Interrupt (IRQ 27) Status" "Negated,Asserted"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x08 28. " CAN3 ,CAN 3 Raw Interrupt (IRQ 28) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 29. " CAN4 ,CAN 4 Raw Interrupt (IRQ 29) Status" "Negated,Asserted"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "VICIntSelect,Interrupt Select Register"
|
|
bitfld.long 0x00 0. " WDTSEL ,Watchdog Interrupt (IRQ 0) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 1. " IRQ1SEL ,Software Interrupt (IRQ 1) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ARMCORESEL ,Embedded ICE Interrupt (IRQ 2) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 3. " ARMCORESEL ,Embedded ICE Interrupt (IRQ 3) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMER0SEL ,Timer 0 Interrupt (IRQ 4) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " TIMER1SEL ,Timer 1 Interrupt (IRQ 5) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 6. " UART0SEL ,UART 0 Interrupt (IRQ 6) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 7. " UART1SEL ,UART 1 Interrupt (IRQ 7) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PWMSEL ,PWM Interrupt (IRQ 8) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " I2CSEL ,I2C Interrupt (IRQ 9) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0SEL ,SPI 0 Interrupt (IRQ 10) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " SPI1SEL ,SPI 1 Interrupt (IRQ 11) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLLSEL ,PLL Interrupt (IRQ 12) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " RTCSEL ,RTC Interrupt (IRQ 13) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0SEL ,External Interrupt 0 (IRQ 14) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 15. " EINT1EL ,External Interrupt 1 (IRQ 15) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2SEL ,External Interrupt 2 (IRQ 16) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " EINT2SEL ,External Interrupt 2 (IRQ 17) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 18. " A/DSEL ,A/D Converter Interrupt (IRQ 18) Category Selection" "IRQ,FIQ"
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x00 19. " CANSEL ,CAN And Acceptance Filter Interrupt (IRQ 19) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CAN1SEL ,CAN1 Interrupt (IRQ 20) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 21. " CAN2SEL ,CAN2 Interrupt (IRQ 21) Category Selection" "IRQ,FIQ"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x00 22. " CAN3SEL ,CAN3 Interrupt (IRQ 22) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 23. " CAN4SEL ,CAN4 Interrupt (IRQ 23) Category Selection" "IRQ,FIQ"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 24. " CAN1SEL ,CAN1 Interrupt (IRQ 24) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 25. " CAN2SEL ,CAN2 Interrupt (IRQ 25) Category Selection" "IRQ,FIQ"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
bitfld.long 0x00 28. " CAN3SEL ,CAN3 Interrupt (IRQ 28) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " CAN4SEL ,CAN4 Interrupt (IRQ 29) Category Selection" "IRQ,FIQ"
|
|
endif
|
|
endif
|
|
line.long 0x04 "VICIntEnable,Interrupt Enable Register (Read Access)"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x08 0. " WDTENA ,Watchdog Interrupt (IRQ 0) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 1. 0x04 1. 0x08 1. " IRQ1ENA ,Software Interrupt (IRQ 1) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 2. 0x04 2. 0x08 2. " ARMCOREENA ,Embedded ICE Interrupt (IRQ 2) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x08 3. " ARMCOREENA ,Embedded ICE Interrupt (IRQ 3) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x04 4. 0x08 4. " TIMER0ENA ,Timer 0 Interrupt (IRQ 4) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x08 5. " TIMER1ENA ,Timer 1 Interrupt (IRQ 5) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 6. 0x04 6. 0x08 6. " UART0ENA ,UART 0 Interrupt (IRQ 6) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 7. 0x04 7. 0x08 7. " UART1ENA ,UART 1 Interrupt (IRQ 7) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 8. 0x04 8. 0x08 8. " PWM0ENA ,PWM Interrupt (IRQ 8) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x08 9. " I2CENA ,I2C Interrupt (IRQ 9) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x04 10. 0x08 10. " SPI0ENA ,SPI 0 Interrupt (IRQ 10) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x08 11. " SPI1ENA ,SPI 1 Interrupt (IRQ 11) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 12. 0x04 12. 0x08 12. " PLLENA ,PLL Interrupt (IRQ 12) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 13. 0x04 13. 0x08 13. " RTCENA ,RTC Interrupt (IRQ 13) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 14. 0x04 14. 0x08 14. " EINT0ENA ,External Interrupt 0 (IRQ 14) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x08 15. " EINT1ENA ,External Interrupt 1 (IRQ 15) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x04 16. 0x08 16. " EINT2ENA ,External Interrupt 2 (IRQ 16) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x08 17. " EINT2ENA ,External Interrupt 2 (IRQ 17) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 18. 0x04 18. 0x08 18. " A/DENA ,A/D Converter Interrupt (IRQ 18) Enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x08 19. " CANENA ,CAN And Acceptance Filter Interrupt (IRQ 19) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 20. 0x04 20. 0x08 20. " CAN1ENA ,CAN1 Interrupt (IRQ 20) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x08 21. " CAN2ENA ,CAN2 Interrupt (IRQ 21) Enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x04 22. 0x08 22. " CAN3ENA ,CAN3 Interrupt (IRQ 22) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x08 23. " CAN4ENA ,CAN4 Interrupt (IRQ 23) Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x04 26. 0x04 26. 0x08 26. " CAN1ENA ,CAN1 Interrupt (IRQ 26) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x08 27. " CAN2ENA ,CAN2 Interrupt (IRQ 27) Enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x04 28. 0x08 28. " CAN3ENA ,CAN3 Interrupt (IRQ 28) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x08 29. " CAN4ENA ,CAN4 Interrupt (IRQ 29) Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "VICSoftInt,Software Interrupt Register"
|
|
setclrfld.long 0x0 0. 0x0 0. 0x4 0. " WDTSE ,Watchdog Software Interrupt (IRQ 0) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 2. 0x0 2. 0x4 2. " ARMCORESE ,Embedded ICE Software Interrupt (IRQ 2) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 3. 0x0 3. 0x4 3. " ARMCORESE ,Embedded ICE Software Interrupt (IRQ 3) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 4. 0x0 4. 0x4 4. " TIMER0SE ,Timer 0 Software Interrupt (IRQ 4) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x0 5. 0x4 5. " TIMER1SE ,Timer 1 Software Interrupt (IRQ 5) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 6. 0x0 6. 0x4 6. " UART0SE ,UART 0 Software Interrupt (IRQ 6) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x0 7. 0x4 7. " UART1SE ,UART 1 Software Interrupt (IRQ 7) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 8. 0x0 8. 0x4 8. " PWM0SE ,PWM Software Interrupt (IRQ 8) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x0 9. 0x4 9. " I2CSE ,I2C Software Interrupt (IRQ 9) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 10. 0x0 10. 0x4 10. " SPI0SE ,SPI 0 Software Interrupt (IRQ 10) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x0 11. 0x4 11. " SPI1SE ,SPI 1 Software Interrupt (IRQ 11) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 12. 0x0 12. 0x4 12. " PLLSE ,PLL Software Interrupt (IRQ 12) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x0 13. 0x4 13. " RTCSE ,RTC Software Interrupt (IRQ 13) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 14. 0x0 14. 0x4 14. " EINT0SE ,External Interrupt 0 Software Interrupt (IRQ 14) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 15. 0x0 15. 0x4 15. " EINT1SE ,External Interrupt 1 Software Interrupt (IRQ 15) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 16. 0x0 16. 0x4 16. " EINT2SE ,External Interrupt 2 Software Interrupt (IRQ 16) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 17. 0x0 17. 0x4 17. " EINT2SE ,External Interrupt 2 Software Interrupt (IRQ 17) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 18. 0x0 18. 0x4 18. " A/DSE ,A/D Converter Software Interrupt (IRQ 18) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x0 19. 0x4 19. " CANSE ,CAN And Acceptance Filter Software Interrupt (IRQ 19) Force Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 20. 0x0 20. 0x4 20. " CAN1SE ,CAN1 Software Interrupt (IRQ 20) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 21. 0x0 21. 0x4 21. " CAN2SE ,CAN2 Software Interrupt (IRQ 21) Force Request" "Not requested,Requested"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x0 22. 0x4 22. " CAN3SE ,CAN3 Software Interrupt (IRQ 22) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 23. 0x0 23. 0x4 23. " CAN4SE ,CAN4 Software Interrupt (IRQ 23) Force Request" "Not requested,Requested"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x0 26. 0x0 26. 0x4 26. " CAN1SE ,CAN1 Software Interrupt (IRQ 26) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 27. 0x0 27. 0x4 27. " CAN2SE ,CAN2 Software Interrupt (IRQ 27) Force Request" "Not requested,Requested"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2194")
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x0 28. 0x4 28. " CAN3SE ,CAN3 Software Interrupt (IRQ 28) Force Request" "Not requested,Requested"
|
|
setclrfld.long 0x0 29. 0x0 29. 0x4 29. " CAN4SE ,CAN4 Software Interrupt (IRQ 29) Force Request" "Not requested,requested"
|
|
endif
|
|
endif
|
|
group.long 0x200++0x3f
|
|
line.long 0x0 " VICVectCntl0 ,Vector Control Registers 0"
|
|
bitfld.long 0x0 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x0 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x4 " VICVectCntl1 ,Vector Control Registers 1"
|
|
bitfld.long 0x4 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x4 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x8 " VICVectCntl2 ,Vector Control Registers 2"
|
|
bitfld.long 0x8 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x8 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0xC " VICVectCntl3 ,Vector Control Registers 3"
|
|
bitfld.long 0xC 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0xC 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x10 " VICVectCntl4 ,Vector Control Registers 4"
|
|
bitfld.long 0x10 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x10 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x14 " VICVectCntl5 ,Vector Control Registers 5"
|
|
bitfld.long 0x14 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x14 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x18 " VICVectCntl6 ,Vector Control Registers 6"
|
|
bitfld.long 0x18 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x18 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x1C " VICVectCntl7 ,Vector Control Registers 7"
|
|
bitfld.long 0x1C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x1C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x20 " VICVectCntl8 ,Vector Control Registers 8"
|
|
bitfld.long 0x20 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x20 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x24 " VICVectCntl9 ,Vector Control Registers 9"
|
|
bitfld.long 0x24 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x24 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x28 " VICVectCntl10 ,Vector Control Registers 10"
|
|
bitfld.long 0x28 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x28 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x2C " VICVectCntl11 ,Vector Control Registers 11"
|
|
bitfld.long 0x2C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x2C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x30 " VICVectCntl12 ,Vector Control Registers 12"
|
|
bitfld.long 0x30 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x30 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x34 " VICVectCntl13 ,Vector Control Registers 13"
|
|
bitfld.long 0x34 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x34 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x38 " VICVectCntl14 ,Vector Control Registers 14"
|
|
bitfld.long 0x38 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x38 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
line.long 0x3C " VICVectCntl15 ,Vector Control Registers 15"
|
|
bitfld.long 0x3C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "WDT,ARM Core,ARM Core,TIMER0,TIMER1,UART0,UART1,PWM0,I2C,SPI0,SPI1,PLL,RTC,SysCtrl0,SysCtrl1,SysCtrl2,SysCtrl3,A/D,?..."
|
|
bitfld.long 0x3C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
group.long 0x100++0x3f
|
|
line.long 0x0 " VICVectAddr0 ,Vector Address Registers 0"
|
|
line.long 0x4 " VICVectAddr1 ,Vector Address Registers 1"
|
|
line.long 0x8 " VICVectAddr2 ,Vector Address Registers 2"
|
|
line.long 0xC " VICVectAddr3 ,Vector Address Registers 3"
|
|
line.long 0x10 " VICVectAddr4 ,Vector Address Registers 4"
|
|
line.long 0x14 " VICVectAddr5 ,Vector Address Registers 5"
|
|
line.long 0x18 " VICVectAddr6 ,Vector Address Registers 6"
|
|
line.long 0x1C " VICVectAddr7 ,Vector Address Registers 7"
|
|
line.long 0x20 " VICVectAddr8 ,Vector Address Registers 8"
|
|
line.long 0x24 " VICVectAddr9 ,Vector Address Registers 9"
|
|
line.long 0x28 " VICVectAddr10 ,Vector Address Registers 10"
|
|
line.long 0x2C " VICVectAddr11 ,Vector Address Registers 11"
|
|
line.long 0x30 " VICVectAddr12 ,Vector Address Registers 12"
|
|
line.long 0x34 " VICVectAddr13 ,Vector Address Registers 13"
|
|
line.long 0x38 " VICVectAddr14 ,Vector Address Registers 14"
|
|
line.long 0x3C " VICVectAddr15 ,Vector Address Registers 15"
|
|
group.long 0x30++0x07
|
|
line.long 0x04 " VICDefVectAddr ,Default Vector Address Register"
|
|
line.long 0x00 " VICVectAddr ,Vector Address Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 " VICProtection ,Protection Enable Register"
|
|
bitfld.long 0x00 0. " VIC_access ,Protection Enable Register" "User/Privileged,Privileged"
|
|
else
|
|
width 0x10
|
|
base 0xFFFFF000
|
|
rgroup.long 0x00++0x0B
|
|
line.long 0x00 "VICIRQStatus,IRQ Status Register"
|
|
bitfld.long 0x00 0. " WDTASS ,WDT (IRQ 0) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 1. " IRQ1ASS ,Software Interrupt (IRQ 1) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ARMCOREASS ,ARMCORE (IRQ 2) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 3. " ARMCOREASS ,ARMCORE (IRQ 3) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMER0ASS ,TIMER0 (IRQ 4) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 5. " TIMER1ASS ,TIMER1 (IRQ 5) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 6. " UART0ASS ,UART0 (IRQ 6) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 7. " UART0ASS ,UART1 (IRQ 7) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PWM0ASS ,PWM0 (IRQ 8) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 9. " I2CASS ,I2C (IRQ 9) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0ASS ,SPI0 (IRQ 10) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 11. " SPI1ASS ,SPI1 (IRQ 11) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLLASS ,PLL (IRQ 12) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 13. " RTCASS ,RTC (IRQ 13) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0ASS ,EINT0 (IRQ 14) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 15. " EINT1ASS ,EINT1 (IRQ 15) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2ASS ,EINT2 (IRQ 16) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 17. " EINT2ASS ,EINT2 (IRQ 17) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 18. " A/DASS ,A/D (IRQ 18) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 19. " CANASS ,CAN (IRQ 19) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CAN12ASS ,CAN12 (IRQ 20) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 21. " CAN12ASS ,CAN12 (IRQ 21) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CAN12ASS ,CAN12 (IRQ 22) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 23. " CAN12ASS ,CAN12 (IRQ 23) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CAN34ASS ,CAN34 (IRQ 24) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 25. " CAN34ASS ,CAN34 (IRQ 25) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CAN34ASS ,CAN34 (IRQ 26) enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 27. " CAN34ASS ,CAN34 (IRQ 27) enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ28ASS ,IRQ 28 enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 29. " IRQ29ASS ,IRQ 29 enabled, classified as IRQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x00 30. " IRQ30ASS ,IRQ 30 enabled, classified as IRQ and asserted" "No request,Request"
|
|
bitfld.long 0x00 31. " IRQ31ASS ,IRQ 31 enabled, classified as IRQ and asserted" "No request,Request"
|
|
line.long 0x04 "VICFIQStatus,FIQ Status Requests"
|
|
bitfld.long 0x04 0. " FIQ0ASS ,WDT (IRQ 0) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 1. " FIQ1ASS ,Software Interrupt (IRQ 1) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 2. " FIQ2ASS ,ARMCORE (IRQ 2) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 3. " FIQ3ASS ,ARMCORE (IRQ 3) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FIQ4ASS ,TIMER1 (IRQ 4) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 5. " FIQ5ASS ,TIMER1 (IRQ 5) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 6. " FIQ6ASS ,UART0 (IRQ 6) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 7. " FIQ7ASS ,UART1 (IRQ 7) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 8. " FIQ8ASS ,PWM0 (IRQ 8) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 9. " FIQ9ASS ,I2C (IRQ 9) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 10. " FIQ10ASS ,SPI0 (IRQ 10) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 11. " FIQ11ASS ,SPI1 (IRQ 11) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 12. " FIQ12ASS ,PLL (IRQ 12) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 13. " FIQ13ASS ,RTC (IRQ 13) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 14. " FIQ14ASS ,EINT0 (IRQ 14) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 15. " FIQ15ASS ,EINT1 (IRQ 15) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FIQ16ASS ,EINT2 (IRQ 16) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 17. " FIQ17ASS ,EINT2 (IRQ 17) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 18. " FIQ18ASS ,A/D (IRQ 18) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 19. " FIQ19ASS ,CAN (IRQ 19) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 20. " FIQ20ASS ,CAN12 (IRQ 20) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 21. " FIQ21ASS ,CAN12 (IRQ 21) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 22. " FIQ22ASS ,CAN12 (IRQ 22) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 23. " FIQ23ASS ,CAN12 (IRQ 23) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 24. " FIQ24ASS ,CAN34 (IRQ 24) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 25. " FIQ25ASS ,CAN34 (IRQ 25) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 26. " FIQ26ASS ,CAN34 (IRQ 26) enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 27. " FIQ27ASS ,CAN34 (IRQ 27) enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 28. " FIQ28ASS ,IRQ 28 enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 29. " FIQ29ASS ,IRQ 29 enabled, classified as FIQ and asserted" "No request,Request"
|
|
textline " "
|
|
bitfld.long 0x04 30. " FIQ30ASS ,IRQ 30 enabled, classified as FIQ and asserted" "No request,Request"
|
|
bitfld.long 0x04 31. " FIQ31ASS ,IRQ 31 enabled, classified as FIQ and asserted" "No request,Request"
|
|
line.long 0x08 "VICRawIntr,Raw Interrupt Status Register"
|
|
bitfld.long 0x08 0. " WDT ,Watchdog Raw Interrupt (IRQ 0) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 1. " IRQ1 ,Software Raw Interrupt (IRQ 1) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 2. " ARMCORE ,Embedded ICE Raw Interrupt (IRQ 2) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 3. " ARMCORE ,Embedded ICE Raw Interrupt (IRQ 3) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 4. " TIMER0 ,Timer 0 Raw Interrupt (IRQ 4) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 5. " TIMER1 ,Timer 1 Raw Interrupt (IRQ 5) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 6. " UART0 ,UART 0 Raw Interrupt (IRQ 6) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 7. " UART1 ,UART 1 Raw Interrupt (IRQ 7) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 8. " PWM0 ,PWM Raw Interrupt (IRQ 8) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 9. " I2C ,I2C Raw Interrupt (IRQ 9) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI0 ,SPI 0 Raw Interrupt (IRQ 10) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 11. " SPI1 ,SPI 1 Raw Interrupt (IRQ 11) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PLL ,PLL Raw Interrupt (IRQ 12) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 13. " RTC ,RTC Raw Interrupt (IRQ 13) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 14. " EINT0 ,External 0 Raw Interrupt (IRQ 14) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 15. " EINT1 ,External 1 Raw Interrupt (IRQ 15) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 16. " EINT2 ,External 2 Raw Interrupt (IRQ 16) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 17. " EINT2 ,External 2 Raw Interrupt (IRQ 17) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 18. " A/D ,A/D Converter Raw Interrupt (IRQ 18) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 19. " CAN ,CAN And Acceptance Filter Raw Interrupt (IRQ 19) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 20. " CAN12 ,CAN 1 And CAN 2 Raw Interrupt (IRQ 20) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 21. " CAN12 ,CAN 1 And CAN 2 Raw Interrupt (IRQ 21) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 22. " CAN12 ,CAN 1 And CAN 2 Raw Interrupt (IRQ 22) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 23. " CAN12 ,CAN 1 And CAN 2 Raw Interrupt (IRQ 23) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " CAN34 ,CAN 3 And CAN 4 Raw Interrupt (IRQ 24) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 25. " CAN34 ,CAN 3 And CAN 4 Raw Interrupt (IRQ 25) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 26. " CAN34 ,CAN 3 And CAN 4 Raw Interrupt (IRQ 26) Status" "Negated,Asserted"
|
|
bitfld.long 0x08 27. " CAN34 ,CAN 3 And CAN 4 Raw Interrupt (IRQ 27) Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 28. " IRQ28 ,Raw Interrupt 28 Status" "Negated,Asserted"
|
|
bitfld.long 0x08 29. " IRQ29 ,Raw Interrupt 29 Status" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 30. " IRQ30 ,Raw Interrupt 30 Status" "Negated,Asserted"
|
|
bitfld.long 0x08 31. " IRQ31 ,Raw Interrupt 31 Status" "Negated,Asserted"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "VICIntSelect,Interrupt Select Register"
|
|
bitfld.long 0x00 0. " WDTSEL ,Watchdog Interrupt (IRQ 0) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 1. " IRQ1SEL ,Software Interrupt (IRQ 1) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ARMCORESEL ,Embedded ICE Interrupt (IRQ 2) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 3. " ARMCORESEL ,Embedded ICE Interrupt (IRQ 3) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TIMER0SEL ,Timer 0 Interrupt (IRQ 4) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " TIMER1SEL ,Timer 1 Interrupt (IRQ 5) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 6. " UART0SEL ,UART 0 Interrupt (IRQ 6) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 7. " UART1SEL ,UART 1 Interrupt (IRQ 7) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PWMSEL ,PWM Interrupt (IRQ 8) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " I2CSEL ,I2C Interrupt (IRQ 9) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPI0SEL ,SPI 0 Interrupt (IRQ 10) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " SPI1SEL ,SPI 1 Interrupt (IRQ 11) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PLLSEL ,PLL Interrupt (IRQ 12) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " RTCSEL ,RTC Interrupt (IRQ 13) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT0SEL ,External Interrupt 0 (IRQ 14) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 15. " EINT1EL ,External Interrupt 1 (IRQ 15) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT2SEL ,External Interrupt 2 (IRQ 16) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " EINT2SEL ,External Interrupt 2 (IRQ 17) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 18. " A/DSEL ,A/D Converter Interrupt (IRQ 18) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 19. " CANSEL ,CAN And Acceptance Filter Interrupt (IRQ 19) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CAN12SEL ,CAN1 And CAN2 Interrupt (IRQ 20) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 21. " CAN12SEL ,CAN1 And CAN2 Interrupt (IRQ 21) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CAN12SEL ,CAN1 And CAN2 Interrupt (IRQ 22) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 23. " CAN12SEL ,CAN1 And CAN2 Interrupt (IRQ 23) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CAN34SEL ,CAN3 And CAN4 Interrupt (IRQ 24) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 25. " CAN34SEL ,CAN3 And CAN4 Interrupt (IRQ 25) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CAN34SEL ,CAN3 And CAN4 Interrupt (IRQ 26) Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 27. " CAN34SEL ,CAN3 And CAN4 Interrupt (IRQ 27) Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ28SEL ,Interrupt 28 Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " IRQ29SEL ,Interrupt 29 Category Selection" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 30. " IRQ30SEL ,Interrupt 30 Category Selection" "IRQ,FIQ"
|
|
bitfld.long 0x00 31. " IRQ31SEL ,Interrupt 31 Category Selection" "IRQ,FIQ"
|
|
line.long 0x04 "VICIntEnable,Interrupt Enable Register (Read Access)"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x08 0. " WDTENA ,Watchdog Interrupt (IRQ 0) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 1. 0x04 1. 0x08 1. " IRQ1ENA ,Software Interrupt (IRQ 1) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 2. 0x04 2. 0x08 2. " ARMCOREENA ,Embedded ICE Interrupt (IRQ 2) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x08 3. " ARMCOREENA ,Embedded ICE Interrupt (IRQ 3) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x04 4. 0x08 4. " TIMER0ENA ,Timer 0 Interrupt (IRQ 4) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x08 5. " TIMER1ENA ,Timer 1 Interrupt (IRQ 5) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 6. 0x04 6. 0x08 6. " UART0ENA ,UART 0 Interrupt (IRQ 6) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 7. 0x04 7. 0x08 7. " UART1ENA ,UART 1 Interrupt (IRQ 7) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 8. 0x04 8. 0x08 8. " PWM0ENA ,PWM Interrupt (IRQ 8) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x08 9. " I2CENA ,I2C Interrupt (IRQ 9) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x04 10. 0x08 10. " SPI0ENA ,SPI 0 Interrupt (IRQ 10) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x08 11. " SPI1ENA ,SPI 1 Interrupt (IRQ 11) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 12. 0x04 12. 0x08 12. " PLLENA ,PLL Interrupt (IRQ 12) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 13. 0x04 13. 0x08 13. " RTCENA ,RTC Interrupt (IRQ 13) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 14. 0x04 14. 0x08 14. " EINT0ENA ,External Interrupt 0 (IRQ 14) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x08 15. " EINT1ENA ,External Interrupt 1 (IRQ 15) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x04 16. 0x08 16. " EINT2ENA ,External Interrupt 2 (IRQ 16) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x08 17. " EINT2ENA ,External Interrupt 2 (IRQ 17) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 18. 0x04 18. 0x08 18. " A/DENA ,A/D Converter Interrupt (IRQ 18) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 19. 0x04 19. 0x08 19. " CANENA ,CAN And Acceptance Filter Interrupt (IRQ 19) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 20. 0x04 20. 0x08 20. " CAN12ENA ,CAN1 And CAN2 Interrupt (IRQ 20) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x08 21. " CAN12ENA ,CAN1 And CAN2 Interrupt (IRQ 21) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x04 22. 0x08 22. " CAN12ENA ,CAN1 And CAN2 Interrupt (IRQ 22) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x08 23. " CAN12ENA ,CAN1 And CAN2 Interrupt (IRQ 23) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 24. 0x04 24. 0x08 24. " CAN34ENA ,CAN3 And CAN4 Interrupt (IRQ 24) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 25. 0x04 25. 0x08 25. " CAN34ENA ,CAN3 And CAN4 Interrupt (IRQ 25) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 26. 0x04 26. 0x08 26. " CAN34ENA ,CAN3 And CAN4 Interrupt (IRQ 26) Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x08 27. " CAN34ENA ,CAN3 And CAN4 Interrupt (IRQ 27) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x04 28. 0x08 28. " IRQ28ENA ,Interrupt 28 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x08 29. " IRQ29ENA ,Interrupt 29 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 30. 0x04 30. 0x08 30. " IRQ30ENA ,Interrupt 30 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x08 31. " IRQ31ENA ,Interrupt 31 Enable" "Disabled,Enabled"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "VICSoftInt,Software Interrupt Register"
|
|
setclrfld.long 0x0 0. 0x0 0. 0x4 0. " WDTSE ,Watchdog Software Interrupt (IRQ 0) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 1. 0x0 1. 0x4 1. " IRQ1SE ,Software Interrupt (IRQ 1) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 2. 0x0 2. 0x4 2. " ARMCORESE ,Embedded ICE Software Interrupt (IRQ 2) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 3. 0x0 3. 0x4 3. " ARMCORESE ,Embedded ICE Software Interrupt (IRQ 3) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x0 4. 0x4 4. " TIMER0SE ,Timer 0 Software Interrupt (IRQ 4) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 5. 0x0 5. 0x4 5. " TIMER1SE ,Timer 1 Software Interrupt (IRQ 5) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 6. 0x0 6. 0x4 6. " UART0SE ,UART 0 Software Interrupt (IRQ 6) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 7. 0x0 7. 0x4 7. " UART1SE ,UART 1 Software Interrupt (IRQ 7) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 8. 0x0 8. 0x4 8. " PWM0SE ,PWM Software Interrupt (IRQ 8) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 9. 0x0 9. 0x4 9. " I2CSE ,I2C Software Interrupt (IRQ 9) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 10. 0x0 10. 0x4 10. " SPI0SE ,SPI 0 Software Interrupt (IRQ 10) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 11. 0x0 11. 0x4 11. " SPI1SE ,SPI 1 Software Interrupt (IRQ 11) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 12. 0x0 12. 0x4 12. " PLLSE ,PLL Software Interrupt (IRQ 12) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 13. 0x0 13. 0x4 13. " RTCSE ,RTC Software Interrupt (IRQ 13) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 14. 0x0 14. 0x4 14. " EINT0SE ,External Interrupt 0 Software Interrupt (IRQ 14) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 15. 0x0 15. 0x4 15. " EINT1SE ,External Interrupt 1 Software Interrupt (IRQ 15) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x0 16. 0x4 16. " EINT2SE ,External Interrupt 2 Software Interrupt (IRQ 16) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 17. 0x0 17. 0x4 17. " EINT2SE ,External Interrupt 2 Software Interrupt (IRQ 17) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 18. 0x0 18. 0x4 18. " A/DSE ,A/D Converter Software Interrupt (IRQ 18) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 19. 0x0 19. 0x4 19. " CANSE ,CAN And Acceptance Filter Software Interrupt (IRQ 19) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 20. 0x0 20. 0x4 20. " CAN12SE ,CAN1 And CAN2 Software Interrupt (IRQ 20) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 21. 0x0 21. 0x4 21. " CAN12SE ,CAN1 And CAN2 Software Interrupt (IRQ 21) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x0 22. 0x4 22. " CAN12SE ,CAN1 And CAN2 Software Interrupt (IRQ 22) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 23. 0x0 23. 0x4 23. " CAN12SE ,CAN1 And CAN2 Software Interrupt (IRQ 23) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 24. 0x0 24. 0x4 24. " CAN34SE ,CAN3 And CAN4 Software Interrupt (IRQ 24) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 25. 0x0 25. 0x4 25. " CAN34SE ,CAN3 And CAN4 Software Interrupt (IRQ 25) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 26. 0x0 26. 0x4 26. " CAN34SE ,CAN3 And CAN4 Software Interrupt (IRQ 26) Force Request" "No request,Request"
|
|
setclrfld.long 0x0 27. 0x0 27. 0x4 27. " CAN34SE ,CAN3 And CAN4 Software Interrupt (IRQ 27) Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 28. 0x0 28. 0x4 28. " IRQ28SE ,Software Interrupt 28 Force Request" "No request,Request"
|
|
setclrfld.long 0x0 29. 0x0 29. 0x4 29. " IRQ29SE ,Software Interrupt 29 Force Request" "No request,Request"
|
|
textline " "
|
|
setclrfld.long 0x0 30. 0x0 30. 0x4 30. " IRQ30SE ,Software Interrupt 30 Force Request" "No request,Request"
|
|
setclrfld.long 0x0 31. 0x0 31. 0x4 31. " IRQ31SE ,Software Interrupt 31 Force Request" "No request,Request"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "VICProtection,Protection enable register"
|
|
bitfld.long 0x0 0. " VICPROT ,Protection Enable Register" "User/Privileged,Privileged"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "VICVectAddr,Vector Address Register"
|
|
line.long 0x4 "VICDefVectAddr,Default Vector Address Register"
|
|
group.long 0x200++0x3F
|
|
line.long 0x00 "VICVectCntl0,Vector control 0 register"
|
|
bitfld.long 0x00 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x04 "VICVectCntl1,Vector control 1 register"
|
|
bitfld.long 0x04 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x08 "VICVectCntl2,Vector control 2 register"
|
|
bitfld.long 0x08 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x0C "VICVectCntl3,Vector control 3 register"
|
|
bitfld.long 0x0C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x10 "VICVectCntl4,Vector control 4 register"
|
|
bitfld.long 0x10 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x14 "VICVectCntl5,Vector control 5 register"
|
|
bitfld.long 0x14 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x18 "VICVectCntl6,Vector control 6 register"
|
|
bitfld.long 0x18 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x1C "VICVectCntl7,Vector control 7 register"
|
|
bitfld.long 0x1C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x20 "VICVectCntl8,Vector control 8 register"
|
|
bitfld.long 0x20 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x24 "VICVectCntl9,Vector control 9 register"
|
|
bitfld.long 0x24 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x28 "VICVectCntl10,Vector control 10 register"
|
|
bitfld.long 0x28 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x2C "VICVectCntl11,Vector control 11 register"
|
|
bitfld.long 0x2C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x30 "VICVectCntl12,Vector control 12 register"
|
|
bitfld.long 0x30 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x34 "VICVectCntl13,Vector control 13 register"
|
|
bitfld.long 0x34 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x38 "VICVectCntl14,Vector control 14 register"
|
|
bitfld.long 0x38 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
line.long 0x3C "VICVectCntl15,Vector control 15 register"
|
|
bitfld.long 0x3C 5. " VIRQEN ,Vectored IRQ Slot Enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 0.--4. " INTNO ,Number of Interrupt Request or Software Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x100++0x3F
|
|
line.long 0x00 "VICVectAddr0,Vector address 0 register"
|
|
line.long 0x04 "VICVectAddr1,Vector address 1 register"
|
|
line.long 0x08 "VICVectAddr2,Vector address 2 register"
|
|
line.long 0x0C "VICVectAddr3,Vector address 3 register"
|
|
line.long 0x10 "VICVectAddr4,Vector address 4 register"
|
|
line.long 0x14 "VICVectAddr5,Vector address 5 register"
|
|
line.long 0x18 "VICVectAddr6,Vector address 6 register"
|
|
line.long 0x1C "VICVectAddr7,Vector address 7 register"
|
|
line.long 0x20 "VICVectAddr8,Vector address 8 register"
|
|
line.long 0x24 "VICVectAddr9,Vector address 9 register"
|
|
line.long 0x28 "VICVectAddr10,Vector address 10 register"
|
|
line.long 0x2C "VICVectAddr11,Vector address 11 register"
|
|
line.long 0x30 "VICVectAddr12,Vector address 12 register"
|
|
line.long 0x34 "VICVectAddr13,Vector address 13 register"
|
|
line.long 0x38 "VICVectAddr14,Vector address 14 register"
|
|
line.long 0x3C "VICVectAddr15,Vector address 15 register"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; UARTs
|
|
; --------------------------------------------------------------------------------
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
tree "UART and IrDA"
|
|
base 0x80101000
|
|
width 8.
|
|
if (((d.l(ad:0x8010100C))&0x80)==0x0)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "RBR/THR,Receiver Buffer Register/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RDAIntEn ,Receive Data Available interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIntEn ,THRE interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RLSIntEn ,RX line status interrupts" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MSIntEn ,Interrupt transitions on transitions of the CTS pin" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTSIntEn ,Interrupts on transitions of the CTS pin" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABEOIntEn ,Auto-Baud End Operation interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOIntEn ,Auto-Baud Timeout interrupt" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DLL,Divisor Latch LSB Register"
|
|
hexmask.long 0x00 0.--7. 1. " DLL ,Divisor Latch LSB"
|
|
line.long 0x04 "DLM,Divisor Latch MSB Register"
|
|
hexmask.long 0x04 0.--7. 1. " DLM ,Divisor Latch MSB"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "IIR,Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IntStat ,Interrupt Status" "Pending,Finished"
|
|
bitfld.long 0x00 0.--3. " IntId ,Interrupt Identification" "Lowest,None,Third,Reserved,Second,Reserved,Highest,Reserved,Reserved,Reserved,Reserved,Reserved,Second,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " FIFOEn ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " FIFOEn ,FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ABEOInt ,Auto-baud process complete" "Not completed,Completed"
|
|
bitfld.long 0x00 9. " ABTOInt ,Auto-baud process time out" "No time out,Time out"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FIFOEn ,Rx and Tx FIFO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RxFIFORs ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxFIFORs ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMAMode ,Rx DMA/Tx DMA is requested when" "RxFIFO not emtpy/TxFIFO empty,RxTrigger level reached/TxFIFO not full"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " RxTrLvl ,Rx Trigger Level" "1 character,16 characters,24 characters ,28 characters"
|
|
if (((d.l(sd:0x8010100C))&0x3)==0x0)
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5 bit,6 bit,7 bit,8 bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Send Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ParEn ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " ParSel ,Parity Select" "Odd parity,Even parity,Send '1',Send '0'"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BrkCnt ,Break Transmission Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5 bit,6 bit,7 bit,8 bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Send Select" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ParEn ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " ParSel ,Parity Select" "Odd parity,Even parity,Send '1',Send '0'"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BrkCnt ,Break Transmission Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x0 "MCR,Modem Control Register"
|
|
bitfld.long 0x0 1. " RTS ,RTS pin state" "High,Low"
|
|
bitfld.long 0x0 4. " LMS ,Loopback Testing Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " autoRTS ,Automatic RTS flow control" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " autoCTS ,Automatic CTS flow control" "Disabled,Enabled"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "LSR,Line Status Register"
|
|
in
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "MSR,Modem Status Register"
|
|
in
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SCR,Scratch Pad Register"
|
|
hexmask.long 0x00 0.--7. 1. " Pad ,Readable and writeable byte"
|
|
line.long 0x04 "ACR,Auto-baud Control Register"
|
|
bitfld.long 0x04 0. " ACR_Start ,Auto-baud Measurement Start" "Not started,Started"
|
|
bitfld.long 0x04 1. " ACR_Mode ,Auto-baud Measuring Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AutoRestart ,Auto Restart" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " ABEOIntClr ,End of auto-baud interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ABTOIntClr ,Auto-baud time-out interrupt clear" "No effect,Cleared"
|
|
if (((d.l(sd:0x80101000))&0x4)==0x1)
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "ICR,IrDA Control Register"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IrDAInv ,IrDA Serial Input Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FixPulseEn ,IrDA fixed-pulse-width mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,IrDA transmitter pulse width [us]" "2 * Tpclk,4 * Tpclk,8 * Tpclk,16 * Tpclk,32 * Tpclk,64 * Tpclk,128 * Tpclk,256 * Tpclk"
|
|
else
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "ICR,IrDA Control Register"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IrDAInv ,IrDA Serial Input Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FixPulseEn ,IrDA fixed-pulse-width mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "FDR,Fractional Divider Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. " DIVADDVAL ,Baud rate generation pre-scaler divisor value"
|
|
hexmask.long.byte 0x0 4.--7. 1. " MULVAL ,Baud rate pre-scaler multiplier value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MODE,NHP Mode Register"
|
|
bitfld.long 0x00 0. " NHP ,Nexperia Home Platform Mode" "0,1"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "POP,NHP Pop Register"
|
|
group.long 0xFE0++0x03
|
|
line.long 0x00 "INTS,Interrupt Status Register"
|
|
setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " DCTSInt_set/clr ,CTS pin state change interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " THREInt_set/clr ,Transmit Holding Register Empty interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " RxTOInt_set/clr ,Rx Time Out interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " RxDAInt ,Rx Data Aviable interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " WakeUpInt_set/clr ,Wake Up interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " ABEOInt_set/clr ,Auto-baud End Operation interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " ABTOInt_set/clr ,Auto-baud Time Out interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BreakInt ,Break interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FEInt ,Framing Error interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " PEInt ,Pending Error interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x0C 15. 0x08 15. " OEInt_set/clr ,Overrun Error interrupt" "No interrupt,Interrupt"
|
|
group.long 0xFE4++0x03
|
|
line.long 0x00 "INTE,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " DCTSIE_set/clr ,CTS pin state change interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " THREIE_set/clr ,Transmit Holding Register Empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RxTOIE_set/clr ,Rx Time Out interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RxDAIE_set/clr ,Rx Data Aviable interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WakeUpIE_set/clr ,Wake Up interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABEOIE_set/clr ,Auto-baud End Operation interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOIE_set/clr ,Auto-baud Time Out interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " BreakIE_set/clr ,Break interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FEIE_set/clr ,Framing Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PEIE_set/clr ,Pending Error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " OEIE_set/clr ,Overrun Error interrupt enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
else
|
|
tree "UARTs"
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142")
|
|
tree "UART0"
|
|
width 0xD
|
|
base 0xE000C000
|
|
if ((data.byte(ad:0xE000C00C)&0x80)==0x00)
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U0RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U0IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIE ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABEOIE ,End of Auto-baud Interrupt Enable" "Disable,Enable"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U0DLL,Divisor Latch LSB"
|
|
bitfld.byte 0x00 0. " Bit0 ,UART0 Divisor Latch LSB Bit 0" "Low,High"
|
|
bitfld.byte 0x00 1. " Bit1 ,UART0 Divisor Latch LSB Bit 1" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " Bit2 ,UART0 Divisor Latch LSB Bit 2" "Low,High"
|
|
bitfld.byte 0x00 3. " Bit3 ,UART0 Divisor Latch LSB Bit 3" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " Bit4 ,UART0 Divisor Latch LSB Bit 4" "Low,High"
|
|
bitfld.byte 0x00 5. " Bit5 ,UART0 Divisor Latch LSB Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " Bit6 ,UART0 Divisor Latch LSB Bit 6" "Low,High"
|
|
bitfld.byte 0x00 7. " Bit7 ,UART0 Divisor Latch LSB Bit 7" "Low,High"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U0DLM,Divisor Latch MSB"
|
|
bitfld.byte 0x00 0. " Bit0 ,UART0 Divisor Latch MSB Bit 0" "Low,High"
|
|
bitfld.byte 0x00 1. " Bit1 ,UART0 Divisor Latch MSB Bit 1" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " Bit2 ,UART0 Divisor Latch MSB Bit 2" "Low,High"
|
|
bitfld.byte 0x00 3. " Bit3 ,UART0 Divisor Latch MSB Bit 3" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " Bit4 ,UART0 Divisor Latch MSB Bit 4" "Low,High"
|
|
bitfld.byte 0x00 5. " Bit5 ,UART0 Divisor Latch MSB Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " Bit6 ,UART0 Divisor Latch MSB Bit 6" "Low,High"
|
|
bitfld.byte 0x00 7. " Bit7 ,UART0 Divisor Latch MSB Bit 7" "Low,High"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "U0IIR,Interrupt ID"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
bitfld.long 0x00 8. " ABEOI ,End of Auto-baud Interrupt" "Not finished/Disabled,Finished/Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOI ,Auto-baud Time-out Interrupt" "No timed out/Disabled,Timed out/Enabled"
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U0FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.byte(ad:0xE000C00C)&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U0LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U0LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.byte 0x14++0x00
|
|
line.byte 0x00 "U0LSR,Line Status Register"
|
|
bitfld.byte 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.byte 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U0SCR,Scratch Pad Register"
|
|
hexmask.byte.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Register Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "U0ACR,Auto-baud Control Register"
|
|
bitfld.long 0x00 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x00 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AutoRestart ,Auto Restart" "No restart,Restart"
|
|
bitfld.long 0x00 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U0FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "U0TER,Transmit Enable Register"
|
|
bitfld.byte 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
tree.end
|
|
tree "UART1"
|
|
;This file is only for LPC2141/2
|
|
width 0xD
|
|
base 0xE0010000
|
|
if (((data.byte(ad:0xE001000C))&0x80)==0x00)
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U1RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIE ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABEOIE ,End of Auto-baud Interrupt Enable" "Disable,Enable"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U1DLL,Divisor Latch LSB"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U1DLM,Divisor Latch MSB"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U1IIR,Interrupt ID"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
bitfld.long 0x00 8. " ABEOI ,End of Auto-baud Interrupt" "Not finished/Disabled,Finished/Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOI ,Auto-baud Time-out Interrupt" "No timed out/Disabled,Timed out/Enabled"
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 0. " E ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if (((data.byte(ad:0xE001000C))&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U1LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U1LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.byte 0x14++0x00
|
|
line.byte 0x00 "U1LSR,Line Status Register"
|
|
bitfld.byte 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.byte 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.byte 0x1C++0x0
|
|
line.byte 0x00 "U1SCR,Scratch Pad Register"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "U1ACR,Auto-baud Control Register"
|
|
bitfld.long 0x0 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x0 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x0 2. " AutoRestart ,Auto Restart" "No restart,Restart"
|
|
bitfld.long 0x0 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "U1FDR,Fractional Divider Register"
|
|
bitfld.long 0x0 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "U1TER,Transmit Enable Register"
|
|
bitfld.byte 0x0 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x10
|
|
tree.end
|
|
elif (cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
tree "UART0"
|
|
width 0xD
|
|
base 0xE000C000
|
|
if ((data.byte(ad:0xE000C00C)&0x80)==0x00)
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U0RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U0IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIE ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABEOIE ,End of Auto-baud Interrupt Enable" "Disable,Enable"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U0DLL,Divisor Latch LSB"
|
|
bitfld.byte 0x00 0. " Bit0 ,UART0 Divisor Latch LSB Bit 0" "Low,High"
|
|
bitfld.byte 0x00 1. " Bit1 ,UART0 Divisor Latch LSB Bit 1" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " Bit2 ,UART0 Divisor Latch LSB Bit 2" "Low,High"
|
|
bitfld.byte 0x00 3. " Bit3 ,UART0 Divisor Latch LSB Bit 3" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " Bit4 ,UART0 Divisor Latch LSB Bit 4" "Low,High"
|
|
bitfld.byte 0x00 5. " Bit5 ,UART0 Divisor Latch LSB Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " Bit6 ,UART0 Divisor Latch LSB Bit 6" "Low,High"
|
|
bitfld.byte 0x00 7. " Bit7 ,UART0 Divisor Latch LSB Bit 7" "Low,High"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U0DLM,Divisor Latch MSB"
|
|
bitfld.byte 0x00 0. " Bit0 ,UART0 Divisor Latch MSB Bit 0" "Low,High"
|
|
bitfld.byte 0x00 1. " Bit1 ,UART0 Divisor Latch MSB Bit 1" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " Bit2 ,UART0 Divisor Latch MSB Bit 2" "Low,High"
|
|
bitfld.byte 0x00 3. " Bit3 ,UART0 Divisor Latch MSB Bit 3" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " Bit4 ,UART0 Divisor Latch MSB Bit 4" "Low,High"
|
|
bitfld.byte 0x00 5. " Bit5 ,UART0 Divisor Latch MSB Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " Bit6 ,UART0 Divisor Latch MSB Bit 6" "Low,High"
|
|
bitfld.byte 0x00 7. " Bit7 ,UART0 Divisor Latch MSB Bit 7" "Low,High"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "U0IIR,Interrupt ID"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
bitfld.long 0x00 8. " ABEOI ,End of Auto-baud Interrupt" "Not finished/Disabled,Finished/Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOI ,Auto-baud Time-out Interrupt" "No timed out/Disabled,Timed out/Enabled"
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U0FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.byte(ad:0xE000C00C)&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U0LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U0LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.byte 0x14++0x00
|
|
line.byte 0x00 "U0LSR,Line Status Register"
|
|
bitfld.byte 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.byte 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U0SCR,Scratch Pad Register"
|
|
hexmask.byte.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Register Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "U0ACR,Auto-baud Control Register"
|
|
bitfld.long 0x00 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x00 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AutoRestart ,Auto Restart" "No restart,Restart"
|
|
bitfld.long 0x00 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U0FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "U0TER,Transmit Enable Register"
|
|
bitfld.byte 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
tree.end
|
|
tree "UART1"
|
|
;This file is only for LPC2144/6/8
|
|
width 0xD
|
|
base 0xE0010000
|
|
if ((data.byte(ad:0xE001000C)&0x80)==0x00)
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U1RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTSIE ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIE ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABEOIE ,End of Auto-baud Interrupt Enable" "Disable,Enable"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U1DLL,Divisor Latch LSB"
|
|
hexmask.byte.byte 0x000 0.--7. 1. " DLL ,UART0 Divisor Latch LSB"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U1DLM,Divisor Latch MSB"
|
|
hexmask.byte.byte 0x000 0.--7. 1. " DLM ,UART0 Divisor Latch MSB"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U1IIR,Interrupt ID"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Modem,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
bitfld.long 0x00 8. " ABEOI ,End of Auto-baud Interrupt" "Not finished/Disabled,Finished/Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOI ,Auto-baud Time-out Interrupt" "No timed out/Disabled,Timed out/Enabled"
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 0. " E ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.byte(ad:0xE001000C)&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U1LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,'1' stick,'0' stick"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U1LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,'1' stick,'0' stick"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "U1MCR,Modem Control Register"
|
|
bitfld.byte 0x00 0. " DTRC ,Modem Loopback Mode for Pin DTR" "Activated,Deactivated"
|
|
bitfld.byte 0x00 1. " RTSC ,Modem Loopback Mode for Pin RTS" "Activated,Deactivated"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " LOOPMSE ,Loopback Mode Select Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RTSE ,Auto RTS Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 7. " CTSE ,Auto CTS Enable" "Disabled,Enabled"
|
|
rgroup.byte 0x14++0x0
|
|
line.byte 0x00 "U1LSR,Line Status Register"
|
|
bitfld.byte 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.byte 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
rgroup.byte 0x18++0x0
|
|
line.byte 0x0 "U1MSR,Modem Status Register"
|
|
bitfld.byte 0x0 0. " DELTACTS ,Change Detected on Modem Input CTS" "No detected,Detected"
|
|
bitfld.byte 0x0 1. " DELTADSR ,Change Detected on Modem Input DSR" "No detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " TREDGRI ,Change Detected on Modem Input RI" "No detected,Detected"
|
|
bitfld.byte 0x0 3. " DELTADCD ,Change Detected on Modem Input DCD" "No detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x0 4. " CTS ,Clear To Send State" "No effect,Cleared"
|
|
bitfld.byte 0x0 5. " DSR ,Data Set Ready State" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x0 6. " RI ,Ring Indication State" "Low,High"
|
|
bitfld.byte 0x0 7. " DCD ,Data Carrier Detect State" "Low,High"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U1SCR,Scratch Pad Register"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "U1ACR,Auto-baud Control Register"
|
|
bitfld.long 0x0 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x0 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x0 2. " AutoRestart ,Auto Restart" "No restart,Restart"
|
|
bitfld.long 0x0 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "U1FDR,Fractional Divider Register"
|
|
bitfld.long 0x0 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "U1TER,Transmit Enable Register"
|
|
bitfld.byte 0x0 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x10
|
|
tree.end
|
|
elif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
tree "UART0"
|
|
base 0xE000C000
|
|
width 11.
|
|
if ((data.long(ad:0xE000C00C)&0x80)==0x00)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "U0RBR/THR,Receiver Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U0IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIE ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABEOIE ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "U0DLL,Divisor Latch LSB Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,Divisor Latch LSB"
|
|
line.long 0x04 "U0DLM,Divisor Latch MSB Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLM ,Divisor Latch MSB"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U0FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U0IIR,UART0 Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ABEOI ,End of Auto-baud Interrupt" "Not finished/Disabled,Finished/Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOI ,Auto-baud Time-out Interrupt" "Not timed out/Disabled,Timed out/Enabled"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "U0FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.long(ad:0xE000C00C)&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U0LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U0LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "U0LSR,Line Status Register"
|
|
bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "U0SCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Value"
|
|
line.long 0x04 "U0ACR,Auto-baud Control Register"
|
|
bitfld.long 0x04 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x04 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AutoRestart ,Auto Restart in case of time-out" "No restart,Restart"
|
|
bitfld.long 0x04 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "U0TER,Transmit Enable Register"
|
|
bitfld.long 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "UART1"
|
|
base 0xE0010000
|
|
width 11.
|
|
if (((data.long(ad:0xE001000C))&0x80)==0x00)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "U1RBR/THR,Receiver Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTSIE ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIE ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABEOIE ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "U1DLL,Divisor Latch LSB"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,Divisor Latch LSB"
|
|
line.long 0x04 "U1DLM,Divisor Latch MSB"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLMSB ,Divisor Latch MSB"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U1FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U1IIR,UART1 Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ABEOI ,End of Auto-baud Interrupt" "Not finished/Disabled,Finished/Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOI ,Auto-baud Time-out Interrupt" "Not timed out/Disabled,Timed out/Enabled"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.long(ad:0xE000C00C)&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "U1MCR,Modem Control Register"
|
|
bitfld.long 0x00 0. " DTR ,Source for DTR" "0,1"
|
|
bitfld.long 0x00 1. " RTS ,Source for RTS" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RTSen ,Auto-RTS flow control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTSen ,Auto-CTS flow control enable" "Disabled,Enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "U1LSR,Line Status Register"
|
|
bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "U1MSR,Modem Status Register"
|
|
in
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "U1SCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Value"
|
|
line.long 0x04 "U1ACR,Auto-baud Control Register"
|
|
bitfld.long 0x04 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x04 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AutoRestart ,Auto Restart in case of time-out" "No restart,Restart"
|
|
bitfld.long 0x04 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "U1TER,Transmit Enable Register"
|
|
bitfld.long 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
elif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
tree "UART0"
|
|
width 11.
|
|
base sd:0xe000c000
|
|
if (((d.b(sd:0xe000c00c))&0x80)==0x00)
|
|
hgroup.byte 0x00++0x0
|
|
hide.byte 0x00 "U0RBR/THR,UART0 Receive/Transmit Register"
|
|
in
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "U0IER,UART0 Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,U0IER9 Auto-Baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,U0IER8 Auto0Baud Time-Out Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXLSIE ,RX Line Status Interrupt Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "U0DLL,UART0 Divisor Latch LSB"
|
|
hexmask.byte 0x00 0.--7. 1. " DLL ,Divisor Latch LSB"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "U0DLM,UART0 Divisor Latch MSB"
|
|
hexmask.byte 0x00 0.--7. 1. " DLM ,Divisor Latch MSB"
|
|
endif
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "U0IIR,UART0 Interrupt Identification Register"
|
|
bitfld.long 0x00 9. " ABTOInt ,Auto-Baud Time-Out Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABEOInt ,End Of Auto-Baud Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " FIFO_EN ,FIFO Enable" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " INT_ID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
bitfld.long 0x00 0. " INT_PD ,Interrupt Pending" "Pending,Not pending"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "U0FCR,UART0 FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " RXTL ,RX Trigger Level" "Level 0,Level 1,Level 2,Level 3"
|
|
bitfld.long 0x00 2. " TXFIFORST ,TX FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RXFIFORST ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFO_EN ,FIFO Enable" "Disabled,Enabled"
|
|
if (((d.b(sd:0xe000c00c))&0x8)==0x8)
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "U0LCR,UART0 Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BR_CTL ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PAR_SEL ,Parity Select" "Odd,Even,Forced 1,Forced 0"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PAR_EN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop Bit Select" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bit,6 bit,7 bit,8 bit"
|
|
else
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "U0LCR,UART0 Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BR_CTL ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PAR_EN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop Bit Select" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bit,6 bit,7 bit,8 bit"
|
|
endif
|
|
rgroup.byte 0x14++0x0
|
|
line.byte 0x00 "U0LSR,UART0 Line Status Register"
|
|
bitfld.byte 0x00 7. " RXFE ,Error In RX FIFO" "No error,Error"
|
|
bitfld.byte 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "Inactive,Active"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "Inactive,Active"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "Inactive,Active"
|
|
bitfld.byte 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
group.byte 0x1c++0x0
|
|
line.byte 0x00 "U0SCR,UART0 Scratch Pad Register"
|
|
hexmask.byte 0x00 0.--7. 1. " PAD ,Readable/Writable Byte"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "U0ACR,UART0 Auto-Baud Control Register"
|
|
bitfld.long 0x00 9. " ABTOIntClr ,Auto-Baud Time-Out Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " ABEOIntClr ,End Of Auto-Baud Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " AUTO_RST ,Auto Restart" "Not restarted,Restarted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,Mode" "Mode 0,Mode 1"
|
|
bitfld.long 0x00 0. " START ,Auto-Baud Rate Start" "Stopped,Started"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "U0FDR,UART0 Fractional Divider Register"
|
|
bitfld.long 0x00 4.--7. " MULVAL ,Baudrate Pre-Scaler Multiple Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DIVADDVAL ,Baudrate Generation Pre-Scaler Divisor Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x00 "U0TER,UART0 Transmit Enable Register"
|
|
bitfld.byte 0x00 7. " TXEN ,Transmit Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART1"
|
|
width 11.
|
|
base sd:0xe0010000
|
|
if (((d.b(sd:0xe001000c))&0x80)==0x00)
|
|
hgroup.byte 0x00++0x0
|
|
hide.byte 0x00 "U1RBR/THR,UART1 Receive/Transmit Register"
|
|
in
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "U1IER,UART1 Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,U0IER9 Auto-Baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,U0IER8 Auto0Baud Time-Out Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " CTSIntEn ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXLSIE ,RX Line Status Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "U1DLL,UART1 Divisor Latch LSB"
|
|
hexmask.byte 0x00 0.--7. 1. " DLL ,Divisor Latch LSB"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "U1DLM,UART1 Divisor Latch MSB"
|
|
hexmask.byte 0x00 0.--7. 1. " DLM ,Divisor Latch MSB"
|
|
endif
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "U1IIR,UART1 Interrupt Identification Register"
|
|
bitfld.long 0x00 9. " ABTOIntEn ,Auto-Baud Time-Out Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABEOIntEn ,End Of Auto-Baud Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " FIFO_EN ,FIFO Enable" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " INT_ID ,Interrupt Identification" "Modem,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
bitfld.long 0x00 0. " INT_PD ,Interrupt Pending" "Pending,Not pending"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "U1FCR,UART1 FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " RXTL ,RX Trigger Level" "Level 0,Level 1,Level 2,Level 3"
|
|
bitfld.long 0x00 2. " TXFIFORST ,TX FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RXFIFORST ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFO_EN ,FIFO Enable" "Disabled,Enabled"
|
|
if (((d.b(sd:0xe001000c))&0x8)==0x8)
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "U1LCR,UART1 Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BR_CTL ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " PAR_SEL ,Parity Select" "Odd,Even,Forced 1,Forced 0"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PAR_EN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop Bit Select" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bit,6 bit,7 bit,8 bit"
|
|
else
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "U1LCR,UART1 Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BR_CTL ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PAR_EN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop Bit Select" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bit,6 bit,7 bit,8 bit"
|
|
endif
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "U1MCR,UART1 Modem Control Register"
|
|
bitfld.byte 0x00 7. " CTSen ,Auto-CTS Control Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RTSen ,Auto-RTS Control Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " LOOP_MD_SEL ,Loopback Mode Select" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RTS_CTL ,RTS Control" "Active,Inactive"
|
|
bitfld.byte 0x00 0. " DTR_CTL ,DTR Control" "Active,Inactive"
|
|
rgroup.byte 0x14++0x0
|
|
line.byte 0x00 "U1LSR,UART1 Line Status Register"
|
|
bitfld.byte 0x00 7. " RXFE ,Error In RX FIFO" "No error,Error"
|
|
bitfld.byte 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "Inactive,Active"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "Inactive,Active"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "Inactive,Active"
|
|
bitfld.byte 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
rgroup.byte 0x18++0x0
|
|
line.byte 0x00 "U1MSR,UART1 Modem Status Register"
|
|
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect State" "Low,High"
|
|
bitfld.byte 0x00 6. " RI ,Ring Indicator State" "Low,High"
|
|
bitfld.byte 0x00 5. " DSR ,Data Set Ready State" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CTS ,Clear To Send State" "Low,High"
|
|
bitfld.byte 0x00 3. " DeltaDCD ,DCD Change" "Not changed,Changed"
|
|
bitfld.byte 0x00 2. " TERI ,Trailing Edge RI" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DeltaDSR ,DSR Change" "Not changed,Changed"
|
|
bitfld.byte 0x00 0. " DeltaCTS ,CTS Change" "Not changed,Changed"
|
|
group.byte 0x1c++0x0
|
|
line.byte 0x00 "U1SCR,UART1 Scratch Pad Register"
|
|
hexmask.byte 0x00 0.--7. 1. " PAD ,Readable/Writable Byte"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "U1ACR,UART1 Auto-Baud Control Register"
|
|
bitfld.long 0x00 9. " ABTOIntClr ,Auto-Baud Time-Out Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " ABEOIntClr ,End Of Auto-Baud Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " AUTO_RST ,Auto Restart" "Not restarted,Restarted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,Mode" "Mode 0,Mode 1"
|
|
bitfld.long 0x00 0. " START ,Auto-Baud Rate Start" "Stopped,Started"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "U1FDR,UART1 Fractional Divider Register"
|
|
bitfld.long 0x00 4.--7. " MULVAL ,Baudrate Pre-Scaler Multiple Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DIVADDVAL ,Baudrate Generation Pre-Scaler Divisor Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x00 "U1TER,UART1 Transmit Enable Register"
|
|
bitfld.byte 0x00 7. " TXEN ,Transmit Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
elif (cpu()=="LPC2131"||cpu()=="LPC2132"||cpu()=="LPC2134"||cpu()=="LPC2136"||cpu()=="LPC2138"||cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
tree "UART0"
|
|
base 0xE000C000
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2132"||cpu()=="LPC2134"||cpu()=="LPC2136"||cpu()=="LPC2138")
|
|
width 11.
|
|
if ((data.long(ad:0xE000C00C)&0x80)==0x00)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "U0RBR/THR,Receiver Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U0IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "U0DLL,Divisor Latch LSB Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,Divisor Latch LSB"
|
|
line.long 0x04 "U0DLM,Divisor Latch MSB Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLM ,Divisor Latch MSB"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U0IIR,UART0 Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "U0FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.long(ad:0xE000C00C)&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U0LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U0LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "U0LSR,Line Status Register"
|
|
bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "U0SCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "U0TER,Transmit Enable Register"
|
|
bitfld.long 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x0B
|
|
else
|
|
width 11.
|
|
if ((data.long(ad:0xE000C00C)&0x80)==0x00)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "U0RBR/THR,Receiver Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U0IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIE ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABEOIE ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "U0DLL,Divisor Latch LSB Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,Divisor Latch LSB"
|
|
line.long 0x04 "U0DLM,Divisor Latch MSB Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLM ,Divisor Latch MSB"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U0FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U0IIR,UART0 Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ABEOI ,End of Auto-baud Interrupt" "Not finished/Disabled,Finished/Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOI ,Auto-baud Time-out Interrupt" "Not timed out/Disabled,Timed out/Enabled"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "U0FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.long(ad:0xE000C00C)&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U0LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U0LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "U0LSR,Line Status Register"
|
|
bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "U0SCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Value"
|
|
line.long 0x04 "U0ACR,Auto-baud Control Register"
|
|
bitfld.long 0x04 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x04 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AutoRestart ,Auto Restart in case of time-out" "No restart,Restart"
|
|
bitfld.long 0x04 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "U0TER,Transmit Enable Register"
|
|
bitfld.long 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
tree "UART1"
|
|
base 0xE0010000
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2132")
|
|
width 11.
|
|
if (((data.long(ad:0xE001000C))&0x80)==0x00)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "U1RBR/THR,Receiver Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "U1DLL,Divisor Latch LSB Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,Divisor Latch LSB"
|
|
line.long 0x04 "U1DLM,Divisor Latch MSB Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLMSB ,Divisor Latch MSB"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U1IIR,UART1 Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.long(ad:0xE000C00C)&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "U1LSR,Line Status Register"
|
|
bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "U1SCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "U1TER,Transmit Enable Register"
|
|
bitfld.long 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2131/01"||cpu()=="LPC2132/01")
|
|
width 11.
|
|
if (((data.long(ad:0xE001000C))&0x80)==0x00)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "U1RBR/THR,Receiver Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "U1DLL,Divisor Latch LSB Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,Divisor Latch LSB"
|
|
line.long 0x04 "U1DLM,Divisor Latch MSB Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLMSB ,Divisor Latch MSB"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U1FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U1IIR,UART1 Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.long(ad:0xE000C00C)&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "U1LSR,Line Status Register"
|
|
bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "U1SCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Value"
|
|
line.long 0x04 "U1ACR,Auto-baud Control Register"
|
|
bitfld.long 0x04 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x04 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AutoRestart ,Auto Restart in case of time-out" "No restart,Restart"
|
|
bitfld.long 0x04 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "U1TER,Transmit Enable Register"
|
|
bitfld.long 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2134"||cpu()=="LPC2136"||cpu()=="LPC2138")
|
|
width 11.
|
|
if (((data.long(ad:0xE001000C))&0x80)==0x00)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "U1RBR/THR,Receiver Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTSIE ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "U1DLL,Divisor Latch LSB Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,Divisor Latch LSB"
|
|
line.long 0x04 "U1DLM,Divisor Latch MSB Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLMSB ,Divisor Latch MSB"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U1IIR,UART1 Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Modem,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.long(ad:0xE000C00C)&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "U1MCR,Modem Control Register"
|
|
bitfld.long 0x00 0. " DTR ,Source for DTR" "0,1"
|
|
bitfld.long 0x00 1. " RTS ,Source for RTS" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "U1LSR,Line Status Register"
|
|
bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "U1MSR,Modem Status Register"
|
|
in
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "U1SCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "U1TER,Transmit Enable Register"
|
|
bitfld.long 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
width 11.
|
|
if (((data.long(ad:0xE001000C))&0x80)==0x00)
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "U1RBR/THR,Receiver Buffer/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTSIE ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIE ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABEOIE ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "U1DLL,Divisor Latch LSB"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,Divisor Latch LSB"
|
|
line.long 0x04 "U1DLM,Divisor Latch MSB"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLMSB ,Divisor Latch MSB"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U1FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 0.--3. " DIVVADVAL , Pre-scaler Divisor Value" "No effect,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MULVADVAL , Pre-scaler Multipler Value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "U1IIR,UART1 Interrupt Identification Register"
|
|
bitfld.long 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " IID ,Interrupt Identification" "Modem,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ABEOI ,End of Auto-baud Interrupt" "Not finished/Disabled,Finished/Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ABTOI ,Auto-baud Time-out Interrupt" "Not timed out/Disabled,Timed out/Enabled"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.long 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if ((data.long(ad:0xE000C00C)&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "U1LCR,Line Control Register"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
textline " "
|
|
bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "U1MCR,Modem Control Register"
|
|
bitfld.long 0x00 0. " DTR ,Source for DTR" "0,1"
|
|
bitfld.long 0x00 1. " RTS ,Source for RTS" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RTSen ,Auto-RTS flow control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTSen ,Auto-CTS flow control enable" "Disabled,Enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "U1LSR,Line Status Register"
|
|
bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "U1MSR,Modem Status Register"
|
|
in
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "U1SCR,Scratch Pad Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAD ,Scratch Pad Value"
|
|
line.long 0x04 "U1ACR,Auto-baud Control Register"
|
|
bitfld.long 0x04 0. " START ,Auto-baud Start" "Stopped,Started"
|
|
bitfld.long 0x04 1. " MODE ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AutoRestart ,Auto Restart in case of time-out" "No restart,Restart"
|
|
bitfld.long 0x04 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "U1TER,Transmit Enable Register"
|
|
bitfld.long 0x00 7. " TXEN ,Transmission Enabled" "Disabled,Enabled"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
elif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2420")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
tree "UART0"
|
|
base sd:0xE000C000
|
|
if ((((data.byte(d:(0xE000C000+0xC)))&0x80)==0x00)&&(0.!=1.))
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U0RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U0IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
elif ((((data.byte(d:(0xE000C000+0xC)))&0x80)==0x00)&&(0.==1.))
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U0RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U0IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " CTSIE ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U0DLL,Divisor Latch LSB"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U0DLM,Divisor Latch MSB"
|
|
endif
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "U0IIR,Interrupt ID"
|
|
in
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U0FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 6.--7. " RxTL ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " FIFOEnable ,FIFO Enable" "Disabled,Enabled"
|
|
if ((data.byte(d:(0xE000C000+0xC))&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U0LCR,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U0LCR,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
endif
|
|
if (0.==1.)
|
|
group.byte 0x10++0x0
|
|
line.byte 0x0 "U1MCR,UART1 Modem Control Register"
|
|
bitfld.byte 0x00 7. " CTSen ,CTS enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RTSen ,RTS enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTSControl ,Source for modem output pin RTS" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DTRControl ,Source for modem output pin DTR" "0,1"
|
|
endif
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "U0LSR,Line Status Register"
|
|
in
|
|
if (0.==1.)
|
|
hgroup.byte 0x18++0x0
|
|
hide.byte 0x0 "U1MSR,UART1 Modem Status Register"
|
|
in
|
|
endif
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U0SCR,Scratch Pad Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "U0ACR,Auto-baud Control Register"
|
|
bitfld.long 0x00 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AutoRestart ,Auto Restart" "Not restarted,Restarted"
|
|
bitfld.long 0x00 1. " Mode ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Start ,Auto-baud Start" "Stopped,Started"
|
|
if ((0.==3.)&&(((data.long(sd:(0xE000C000+0x24)))&0x4)==0x0))
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "U3ICR,IrDA Control Register"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,Pulse Configuration" "3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate)"
|
|
bitfld.long 0x00 2. " FixPulseEn ,Enable IrDA fixed pulse width mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IrDAInv ,Serial input invertion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
elif ((0.==3.)&&(((data.long(sd:(0xE000C000+0x24)))&0x4)==0x4))
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "U3ICR,IrDA Control Register"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,Pulse Configuration" "2 x TPCLK,4 x TPCLK,8 x TPCLK,16 x TPCLK,32 x TPCLK,64 x TPCLK,128 x TPCLK,256 x TPCLK"
|
|
bitfld.long 0x00 2. " FixPulseEn ,Enable IrDA fixed pulse width mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IrDAInv ,Serial input invertion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U0FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "U0TER,Transmit Enable Register"
|
|
bitfld.byte 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART1"
|
|
base sd:0xE0010000
|
|
if ((((data.byte(d:(0xE0010000+0xC)))&0x80)==0x00)&&(1.!=1.))
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U1RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
elif ((((data.byte(d:(0xE0010000+0xC)))&0x80)==0x00)&&(1.==1.))
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U1RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " CTSIE ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U1DLL,Divisor Latch LSB"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U1DLM,Divisor Latch MSB"
|
|
endif
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "U1IIR,Interrupt ID"
|
|
in
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 6.--7. " RxTL ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " FIFOEnable ,FIFO Enable" "Disabled,Enabled"
|
|
if ((data.byte(d:(0xE0010000+0xC))&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U1LCR,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U1LCR,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
endif
|
|
if (1.==1.)
|
|
group.byte 0x10++0x0
|
|
line.byte 0x0 "U1MCR,UART1 Modem Control Register"
|
|
bitfld.byte 0x00 7. " CTSen ,CTS enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RTSen ,RTS enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTSControl ,Source for modem output pin RTS" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DTRControl ,Source for modem output pin DTR" "0,1"
|
|
endif
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "U1LSR,Line Status Register"
|
|
in
|
|
if (1.==1.)
|
|
hgroup.byte 0x18++0x0
|
|
hide.byte 0x0 "U1MSR,UART1 Modem Status Register"
|
|
in
|
|
endif
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U1SCR,Scratch Pad Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "U1ACR,Auto-baud Control Register"
|
|
bitfld.long 0x00 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AutoRestart ,Auto Restart" "Not restarted,Restarted"
|
|
bitfld.long 0x00 1. " Mode ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Start ,Auto-baud Start" "Stopped,Started"
|
|
if ((1.==3.)&&(((data.long(sd:(0xE0010000+0x24)))&0x4)==0x0))
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "U3ICR,IrDA Control Register"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,Pulse Configuration" "3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate)"
|
|
bitfld.long 0x00 2. " FixPulseEn ,Enable IrDA fixed pulse width mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IrDAInv ,Serial input invertion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
elif ((1.==3.)&&(((data.long(sd:(0xE0010000+0x24)))&0x4)==0x4))
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "U3ICR,IrDA Control Register"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,Pulse Configuration" "2 x TPCLK,4 x TPCLK,8 x TPCLK,16 x TPCLK,32 x TPCLK,64 x TPCLK,128 x TPCLK,256 x TPCLK"
|
|
bitfld.long 0x00 2. " FixPulseEn ,Enable IrDA fixed pulse width mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IrDAInv ,Serial input invertion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U1FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "U1TER,Transmit Enable Register"
|
|
bitfld.byte 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART2"
|
|
base sd:0xE0078000
|
|
if ((((data.byte(d:(0xE0078000+0xC)))&0x80)==0x00)&&(2.!=1.))
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U2RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U2IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
elif ((((data.byte(d:(0xE0078000+0xC)))&0x80)==0x00)&&(2.==1.))
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U2RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U2IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " CTSIE ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U2DLL,Divisor Latch LSB"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U2DLM,Divisor Latch MSB"
|
|
endif
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "U2IIR,Interrupt ID"
|
|
in
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U2FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 6.--7. " RxTL ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " FIFOEnable ,FIFO Enable" "Disabled,Enabled"
|
|
if ((data.byte(d:(0xE0078000+0xC))&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U2LCR,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U2LCR,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
endif
|
|
if (2.==1.)
|
|
group.byte 0x10++0x0
|
|
line.byte 0x0 "U1MCR,UART1 Modem Control Register"
|
|
bitfld.byte 0x00 7. " CTSen ,CTS enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RTSen ,RTS enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTSControl ,Source for modem output pin RTS" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DTRControl ,Source for modem output pin DTR" "0,1"
|
|
endif
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "U2LSR,Line Status Register"
|
|
in
|
|
if (2.==1.)
|
|
hgroup.byte 0x18++0x0
|
|
hide.byte 0x0 "U1MSR,UART1 Modem Status Register"
|
|
in
|
|
endif
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U2SCR,Scratch Pad Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "U2ACR,Auto-baud Control Register"
|
|
bitfld.long 0x00 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AutoRestart ,Auto Restart" "Not restarted,Restarted"
|
|
bitfld.long 0x00 1. " Mode ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Start ,Auto-baud Start" "Stopped,Started"
|
|
if ((2.==3.)&&(((data.long(sd:(0xE0078000+0x24)))&0x4)==0x0))
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "U3ICR,IrDA Control Register"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,Pulse Configuration" "3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate)"
|
|
bitfld.long 0x00 2. " FixPulseEn ,Enable IrDA fixed pulse width mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IrDAInv ,Serial input invertion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
elif ((2.==3.)&&(((data.long(sd:(0xE0078000+0x24)))&0x4)==0x4))
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "U3ICR,IrDA Control Register"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,Pulse Configuration" "2 x TPCLK,4 x TPCLK,8 x TPCLK,16 x TPCLK,32 x TPCLK,64 x TPCLK,128 x TPCLK,256 x TPCLK"
|
|
bitfld.long 0x00 2. " FixPulseEn ,Enable IrDA fixed pulse width mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IrDAInv ,Serial input invertion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U2FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "U2TER,Transmit Enable Register"
|
|
bitfld.byte 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART3"
|
|
base sd:0xE007C000
|
|
if ((((data.byte(d:(0xE007C000+0xC)))&0x80)==0x00)&&(3.!=1.))
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U3RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U3IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
elif ((((data.byte(d:(0xE007C000+0xC)))&0x80)==0x00)&&(3.==1.))
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U3RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "U3IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " CTSIE ,CTS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U3DLL,Divisor Latch LSB"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U3DLM,Divisor Latch MSB"
|
|
endif
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "U3IIR,Interrupt ID"
|
|
in
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U3FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 6.--7. " RxTL ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " FIFOEnable ,FIFO Enable" "Disabled,Enabled"
|
|
if ((data.byte(d:(0xE007C000+0xC))&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U3LCR,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U3LCR,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
endif
|
|
if (3.==1.)
|
|
group.byte 0x10++0x0
|
|
line.byte 0x0 "U1MCR,UART1 Modem Control Register"
|
|
bitfld.byte 0x00 7. " CTSen ,CTS enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RTSen ,RTS enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTSControl ,Source for modem output pin RTS" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DTRControl ,Source for modem output pin DTR" "0,1"
|
|
endif
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "U3LSR,Line Status Register"
|
|
in
|
|
if (3.==1.)
|
|
hgroup.byte 0x18++0x0
|
|
hide.byte 0x0 "U1MSR,UART1 Modem Status Register"
|
|
in
|
|
endif
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U3SCR,Scratch Pad Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "U3ACR,Auto-baud Control Register"
|
|
bitfld.long 0x00 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AutoRestart ,Auto Restart" "Not restarted,Restarted"
|
|
bitfld.long 0x00 1. " Mode ,Auto-baud Mode Select" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Start ,Auto-baud Start" "Stopped,Started"
|
|
if ((3.==3.)&&(((data.long(sd:(0xE007C000+0x24)))&0x4)==0x0))
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "U3ICR,IrDA Control Register"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,Pulse Configuration" "3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate),3 / (16 x baud rate)"
|
|
bitfld.long 0x00 2. " FixPulseEn ,Enable IrDA fixed pulse width mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IrDAInv ,Serial input invertion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
elif ((3.==3.)&&(((data.long(sd:(0xE007C000+0x24)))&0x4)==0x4))
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "U3ICR,IrDA Control Register"
|
|
bitfld.long 0x00 3.--5. " PulseDiv ,Pulse Configuration" "2 x TPCLK,4 x TPCLK,8 x TPCLK,16 x TPCLK,32 x TPCLK,64 x TPCLK,128 x TPCLK,256 x TPCLK"
|
|
bitfld.long 0x00 2. " FixPulseEn ,Enable IrDA fixed pulse width mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IrDAInv ,Serial input invertion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0. " IrDAEn ,IrDA Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x003
|
|
line.long 0x00 "U3FDR,Fractional Divider Register"
|
|
bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "U3TER,Transmit Enable Register"
|
|
bitfld.byte 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
else
|
|
tree "UART0"
|
|
width 0xD
|
|
base 0xE000C000
|
|
if (((data.byte(ad:0xE000C00C))&0x80)==0x00)
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U0RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U0IER,Interrupt Enable Register"
|
|
bitfld.byte 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U0DLL,Divisor Latch LSB"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U0DLM,Divisor Latch MSB"
|
|
endif
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U0IIR,Interrupt ID"
|
|
bitfld.byte 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
bitfld.byte 0x00 1.--3. " IID ,Interrupt Identification" "Reserved,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
bitfld.byte 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U0FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 0. " E ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if (((data.byte(ad:0xE000C00C))&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U0LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,'1' stick,'0' stick"
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U0LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,'1' stick,'0' stick"
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.byte 0x14++0x00
|
|
line.byte 0x00 "U0LSR,Line Status Register"
|
|
bitfld.byte 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.byte 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.byte 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U0SCR,Scratch Pad Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "UART1"
|
|
width 0x0D
|
|
base 0xE0010000
|
|
if (((data.byte(ad:0xE001000C))&0x80)==0x00)
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "U1RBR/THR,Receiver/Transmit Buffer Register"
|
|
in
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U1IER,Interrupt Enable Register"
|
|
bitfld.byte 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RxIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSIE ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "U1DLL,Divisor Latch LSB"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "U1DLM,Divisor Latch MSB"
|
|
endif
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U1IIR,Interrupt ID"
|
|
bitfld.byte 0x00 0. " IP ,Interrupt Pending" "Pending,Not pending"
|
|
bitfld.byte 0x00 1.--3. " IID ,Interrupt Identification" "Modem,THRE,RDA,RLS,Reserved,Reserved,CTI,?..."
|
|
bitfld.byte 0x00 6.--7. " FIFOE ,FIFO Enable" "00,01,10,11"
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "U1FCR,FIFO Control Register"
|
|
bitfld.byte 0x00 0. " E ,FIFO Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RxRst ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2. " TxRst ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 6.--7. " RxTLS ,Rx Trigger Level Select" "Level 0 (1 char.),Level 1 (4 char.),Level 2 (8 char.),Level 3 (14 char.)"
|
|
if (((data.byte(ad:0xE001000C))&0x03)==0x00)
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U1LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits"
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "U1LCR,Line Control Register"
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits "
|
|
bitfld.byte 0x00 3. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " PS ,Parity Select" "Odd,Even,1 stick,0 stick"
|
|
bitfld.byte 0x00 6. " BC ,Break Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "U1MCR,Modem Control Register"
|
|
bitfld.byte 0x00 0. " DTRC ,DTR Control" "Low,High"
|
|
bitfld.byte 0x00 1. " RTSC ,RTS Control" "Low,High"
|
|
bitfld.byte 0x00 4. " LMS ,Loopback Mode Select" "Disabled,Enabled"
|
|
rgroup.byte 0x14++0x00
|
|
line.byte 0x00 "U1LSR,Line Status Register"
|
|
bitfld.byte 0x00 0. " RDR ,Receiver Data Ready" "Not ready,Ready"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.byte 0x00 4. " BI ,Break Interrupt" "Inactive,Active"
|
|
bitfld.byte 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 7. " RXFE ,Error in Rx FIFO" "No Error,Error"
|
|
hgroup.byte 0x18++0x00
|
|
hide.byte 0x00 "U1MSR,Modem Status Register"
|
|
in
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "U1SCR,Scratch Pad Register"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
endif
|
|
; --------------------------------------------------------------------------------
|
|
; I2C
|
|
; --------------------------------------------------------------------------------
|
|
tree "I2C Interfaces"
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
base 0xE001C000
|
|
width 0xA
|
|
tree "I2C0"
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "I2CONSET,I2C Control Set Register"
|
|
bitfld.byte 0x00 2. " AA ,Assert acknowledge flag" "No acknowledge,Acknowledge"
|
|
bitfld.byte 0x00 3. " SI ,I2C interrupt flag" "Not occured,Occured"
|
|
bitfld.byte 0x00 4. " STO ,STOP flag" "No effect,STOP"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " STA ,START flag" "No effect,START"
|
|
bitfld.byte 0x00 6. " I2EN ,I2C interface enable" "Disabled,Enabled"
|
|
wgroup.byte 0x18++0x00
|
|
line.byte 0x00 "I2CONCLR,I2C Control Clear Register"
|
|
bitfld.byte 0x00 2. " AAC ,Assert Acknowledge Clear bit" "No effect,Cleared"
|
|
bitfld.byte 0x00 3. " SIC ,I2C Interrupt Clear Bit" "No effect,Cleared"
|
|
bitfld.byte 0x00 5. " STAC ,Start flag clear bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " I2ENC ,I2C interface disable" "No effect,Disabled"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "I2C0STAT,I2C0 Status Register"
|
|
bitfld.byte 0x00 3.--7. " STATUS ,Actual Status Information" "Bus error/Undefined state of I2C0 block,START condition transmitted,Repeated START condition transmited,SLA+W transmitted/ACK received,SLA+W transmitted/NACK received,Data I2DAT transmited/ACK received,Data I2DAT transmited/NACK received,Arbitration lost in SLA+R/W or Data,Arbitration lost in NACK,SLA+R transmitted/ACK received,SLA+R transmitted/NACK received,Data received/NACK returned,SLA+W received,ACK returned,General call addr received/ACK returned,Arbitration lost in SLA+RW/General Call addr received/ACK returned,SLV:DATA received/ACK returned,SLA:DATA received/NACK returned,General Call:DATA received/ACK returned,General Call:DATA received/NACK returned,STOP/repeated START condition received,SLA+R received/ACK returned,Arbitration lost in SLA+RW/SLA+R received/ACK returned,Data in I2DAT transmitted/ACK received,Data in I2DAT transmitted/NACK received,AA=0/ACK received,Reserved,Reserved,Reserved,Reserved,Reserved,No information available"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "I2C0DAT,I2C0 Data Register"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "I2C0ADR,I2C0 Slave Address Register"
|
|
bitfld.byte 0x00 0. " GC ,General Call bit" "Disabled,Enabled"
|
|
hexmask.byte 0x00 1.--7. 1. " ADDR ,Slave mode address"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2C0SCLH,SCL Duty Cycle Register HIGH"
|
|
hexmask.long.word 0x00 0.--15. 1. " SCLH ,Count for SCL HIGH Time Period Selection"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "I2C0SCLL,SCL Duty Cycle Register LOW"
|
|
hexmask.long.word 0x00 0.--15. 1. " SCLL ,Count for SCL LOW Time Period Selection"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE005C000
|
|
width 0xA
|
|
tree "I2C1"
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "I2CONSET,I2C Control Set Register"
|
|
bitfld.byte 0x00 2. " AA ,Assert acknowledge flag" "No acknowledge,Acknowledge"
|
|
bitfld.byte 0x00 3. " SI ,I2C interrupt flag" "Not occured,Occured"
|
|
bitfld.byte 0x00 4. " STO ,STOP flag" "No effect,STOP"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " STA ,START flag" "No effect,START"
|
|
bitfld.byte 0x00 6. " I2EN ,I2C interface enable" "Disabled,Enabled"
|
|
wgroup.byte 0x18++0x00
|
|
line.byte 0x00 "I2CONCLR,I2C Control Clear Register"
|
|
bitfld.byte 0x00 2. " AAC ,Assert Acknowledge Clear bit" "No effect,Cleared"
|
|
bitfld.byte 0x00 3. " SIC ,I2C Interrupt Clear Bit" "No effect,Cleared"
|
|
bitfld.byte 0x00 5. " STAC ,Start flag clear bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " I2ENC ,I2C interface disable" "No effect,Disabled"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "I2C1STAT,I2C1 Status Register"
|
|
bitfld.byte 0x00 3.--7. " STATUS ,Actual Status Information" "Bus error/Undefined state of I2C1 block,START condition transmitted,Repeated START condition transmited,SLA+W transmitted/ACK received,SLA+W transmitted/NACK received,Data I2DAT transmited/ACK received,Data I2DAT transmited/NACK received,Arbitration lost in SLA+R/W or Data,Arbitration lost in NACK,SLA+R transmitted/ACK received,SLA+R transmitted/NACK received,Data received/NACK returned,SLA+W received,ACK returned,General call addr received/ACK returned,Arbitration lost in SLA+RW/General Call addr received/ACK returned,SLV:DATA received/ACK returned,SLA:DATA received/NACK returned,General Call:DATA received/ACK returned,General Call:DATA received/NACK returned,STOP/repeated START condition received,SLA+R received/ACK returned,Arbitration lost in SLA+RW/SLA+R received/ACK returned,Data in I2DAT transmitted/ACK received,Data in I2DAT transmitted/NACK received,AA=0/ACK received,Reserved,Reserved,Reserved,Reserved,Reserved,No information available"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "I2C1DAT,I2C1 Data Register"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "I2C1ADR,I2C1 Slave Address Register"
|
|
bitfld.byte 0x00 0. " GC ,General Call bit" "Disabled,Enabled"
|
|
hexmask.byte 0x00 1.--7. 1. " ADDR ,Slave mode address"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2C1SCLH,SCL Duty Cycle Register HIGH"
|
|
hexmask.long.word 0x00 0.--15. 1. " SCLH ,Count for SCL HIGH Time Period Selection"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "I2C1SCLL,SCL Duty Cycle Register LOW"
|
|
hexmask.long.word 0x00 0.--15. 1. " SCLL ,Count for SCL LOW Time Period Selection"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2104"||cpu()=="LPC2105"||cpu()=="LPC2106"||cpu()=="LPC2114"||cpu()=="LPC2119"||cpu()=="LPC2124"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2212"||cpu()=="LPC2214"||cpu()=="LPC2290"||cpu()=="LPC2292"||cpu()=="LPC2294")
|
|
width 0x0A
|
|
base 0xE001C000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "I2CONSET,I2C Control Set Register"
|
|
bitfld.byte 0x00 2. " AA ,Assert acknowledge flag" "No acknowledge,Acknowledge"
|
|
bitfld.byte 0x00 3. " SI ,I2C interrupt flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " STO ,STOP flag" "No effect,STOP"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " STA ,START flag" "No effect,START"
|
|
bitfld.byte 0x00 6. " I2EN ,I2C interface enable" "Disabled,Enabled"
|
|
wgroup.byte 0x18++0x00
|
|
line.byte 0x00 "I2CONCLR,I2C Control Clear Register"
|
|
bitfld.byte 0x00 2. " AAC ,Assert Acknowledge Clear bit" "No effect,Cleared"
|
|
bitfld.byte 0x00 3. " SIC ,I2C Interrupt Clear Bit" "No effect,Cleared"
|
|
bitfld.byte 0x00 5. " STAC ,Start flag clear bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " I2ENC ,I2C interface disable" "No effect,Disabled"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "I2STAT,I2C Status Register"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "I2DAT,I2C Data Register"
|
|
group.byte 0xc++0x0
|
|
line.byte 0x0 "I2ADR,I2C Slave Address Register"
|
|
bitfld.byte 0x0 0. " GC ,General Call bit" "Disabled,Enabled"
|
|
hexmask.byte 0x0 1.--7. 0x2 " ADDR ,Slave mode address"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "I2SCLH,SCL Duty Cycle Register HIGH"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "I2SCLL,SCL Duty Cycle Register LOW"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
base 0xE001C000
|
|
width 0x0A
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2CONTRL,I2C Control Register"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x18 2. " AA_set/clr ,Assert acknowledge flag" "No acknowledge,Acknowledge"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x18 3. " SI_set/clr ,I2C interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " STO ,STOP flag" "No effect,STOP"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x18 5. " STA_set/clr ,START flag" "No effect,START"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x18 6. " I2EN_set/clr ,I2C interface enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "I2STAT,I2C Status Register"
|
|
hexmask.long.byte 0x00 3.--7. 1. " STATUS ,Status information about the I2C interface"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2DAT,I2C Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Recieved data values"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2ADR,I2C Slave Address Register"
|
|
bitfld.long 0x00 0. " GC ,General Call enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 1.--7. 0x20 " ADDR ,Slave mode address"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "I2SCLH,SCL Duty Cycle Register HIGH"
|
|
hexmask.long 0x00 0.--15. 1. " SCLH ,Count for SCL HIGH time period selection"
|
|
line.long 0x04 "I2SCLL,SCL Duty Cycle Register LOW"
|
|
hexmask.long 0x04 0.--15. 1. " SCLL ,Count for SCL LOW time period selection"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2131/01"||cpu()=="LPC2132"||cpu()=="LPC2132/01"||cpu()=="LPC2134"||cpu()=="LPC2134/01"||cpu()=="LPC2136"||cpu()=="LPC2136/01"||cpu()=="LPC2138"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xE001C000
|
|
width 0x0A
|
|
tree "I2C 0"
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C0CON,I2C0 Control Register"
|
|
setclrfld.byte 0x00 2. 0x00 2. 0x18 2. " AA_set/clr ,Assert acknowledge flag" "No acknowledge,Acknowledge"
|
|
setclrfld.byte 0x00 3. 0x00 3. 0x18 3. " SI_set/clr ,I2C interrupt flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STO ,STOP flag" "No effect,STOP"
|
|
setclrfld.byte 0x00 5. 0x00 5. 0x18 5. " STA_set/clr ,START flag" "No effect,START"
|
|
textline " "
|
|
setclrfld.byte 0x00 6. 0x00 6. 0x18 6. " I2EN_set/clr ,I2C interface enable" "Disabled,Enabled"
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C0STAT,I2C0 Status Register"
|
|
hexmask.byte 0x00 3.--7. 1. " STATUS ,Status information about the I2C interface"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "I2C0DAT,I2C0 Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " DATA ,Recieved data values"
|
|
group.byte 0x0C++0x0
|
|
line.byte 0x00 "I2C0ADR,I2C0 Slave Address Register"
|
|
bitfld.byte 0x00 0. " GC ,General Call enable" "Disabled,Enabled"
|
|
hexmask.byte 0x00 1.--7. 0x2 " ADDR ,Slave mode address"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "I2C0SCLH,I2C0 SCL Duty Cycle Register HIGH"
|
|
hexmask.word 0x00 0.--15. 1. " SCLH ,Count for SCL HIGH time period selection"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "I2C0SCLL,I2C0 SCL Duty Cycle Register LOW"
|
|
hexmask.word 0x0 0.--15. 1. " SCLL ,Count for SCL LOW time period selection"
|
|
tree.end
|
|
width 0x0B
|
|
base 0xE005C000
|
|
width 0x0A
|
|
tree "I2C 1"
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C1CON,I2C1 Control Register"
|
|
setclrfld.byte 0x00 2. 0x00 2. 0x18 2. " AA_set/clr ,Assert acknowledge flag" "No acknowledge,Acknowledge"
|
|
setclrfld.byte 0x00 3. 0x00 3. 0x18 3. " SI_set/clr ,I2C interrupt flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STO ,STOP flag" "No effect,STOP"
|
|
setclrfld.byte 0x00 5. 0x00 5. 0x18 5. " STA_set/clr ,START flag" "No effect,START"
|
|
textline " "
|
|
setclrfld.byte 0x00 6. 0x00 6. 0x18 6. " I2EN_set/clr ,I2C interface enable" "Disabled,Enabled"
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C1STAT,I2C1 Status Register"
|
|
hexmask.byte 0x00 3.--7. 1. " STATUS ,Status information about the I2C interface"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "I2C1DAT,I2C1 Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " DATA ,Recieved data values"
|
|
group.byte 0x0C++0x0
|
|
line.byte 0x00 "I2C1ADR,I2C1 Slave Address Register"
|
|
bitfld.byte 0x00 0. " GC ,General Call enable" "Disabled,Enabled"
|
|
hexmask.byte 0x00 1.--7. 0x2 " ADDR ,Slave mode address"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "I2C1SCLH,I2C1 SCL Duty Cycle Register HIGH"
|
|
hexmask.word 0x00 0.--15. 1. " SCLH ,Count for SCL HIGH time period selection"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "I2C1SCLL,I2C1 SCL Duty Cycle Register LOW"
|
|
hexmask.word 0x0 0.--15. 1. " SCLL ,Count for SCL LOW time period selection"
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
tree "I2C0"
|
|
base sd:0xE001C000
|
|
width 12.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C0CONSET,I2C0 Control Set Register"
|
|
bitfld.byte 0x00 6. " I2EN ,I2C Interface Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " STA ,START Flag" "Not transmitted,Transmitted"
|
|
bitfld.byte 0x00 4. " STO ,STOP Flag" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SI ,I2C Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " AA ,Assert Acknowledge Flag" "Not asserted,Asserted"
|
|
wgroup.byte 0x18++0x0
|
|
line.byte 0x00 "I2C0CONCLR,I2C0 Control Clear Register"
|
|
bitfld.byte 0x00 6. " I2ENC ,I2C Interface Disable" "No effect,Disabled"
|
|
bitfld.byte 0x00 5. " STAC ,START Flag Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 3. " SIC ,I2C Interrupt Flag Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " AAC ,Assert Acknowledge Flag Clear" "No effect,Cleared"
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C0STAT,I2C0 Status Register"
|
|
hexmask.byte 0x00 3.--7. 1. " Status ,Actual Status Information About I2C Interface"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "I2C0DAT,I2C0 Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " Data ,Data"
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "I2C0ADR,I2C0 Slave Address Register"
|
|
hexmask.byte 0x00 1.--7. 0x2 " Address ,I2C Device Address For Slave Mode"
|
|
bitfld.byte 0x00 0. " GC ,General Call Enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "I2C0SCLH,I2C0 SCL HIGH Duty Cycle Register"
|
|
hexmask.word 0x00 0.--15. 1. " SCLH ,Count For SCL HIGH Time Period Selection"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "I2C0SCLL,I2C0 SCL LOW Duty Cycle Register"
|
|
hexmask.word 0x00 0.--15. 1. " SCLL ,Count For SCL LOW Time Period Selection"
|
|
width 0xb
|
|
tree.end
|
|
tree "I2C1"
|
|
base sd:0xE005C000
|
|
width 12.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C1CONSET,I2C1 Control Set Register"
|
|
bitfld.byte 0x00 6. " I2EN ,I2C Interface Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " STA ,START Flag" "Not transmitted,Transmitted"
|
|
bitfld.byte 0x00 4. " STO ,STOP Flag" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SI ,I2C Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " AA ,Assert Acknowledge Flag" "Not asserted,Asserted"
|
|
wgroup.byte 0x18++0x0
|
|
line.byte 0x00 "I2C1CONCLR,I2C1 Control Clear Register"
|
|
bitfld.byte 0x00 6. " I2ENC ,I2C Interface Disable" "No effect,Disabled"
|
|
bitfld.byte 0x00 5. " STAC ,START Flag Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 3. " SIC ,I2C Interrupt Flag Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " AAC ,Assert Acknowledge Flag Clear" "No effect,Cleared"
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C1STAT,I2C1 Status Register"
|
|
hexmask.byte 0x00 3.--7. 1. " Status ,Actual Status Information About I2C Interface"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "I2C1DAT,I2C1 Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " Data ,Data"
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "I2C1ADR,I2C1 Slave Address Register"
|
|
hexmask.byte 0x00 1.--7. 0x2 " Address ,I2C Device Address For Slave Mode"
|
|
bitfld.byte 0x00 0. " GC ,General Call Enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "I2C1SCLH,I2C1 SCL HIGH Duty Cycle Register"
|
|
hexmask.word 0x00 0.--15. 1. " SCLH ,Count For SCL HIGH Time Period Selection"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "I2C1SCLL,I2C1 SCL LOW Duty Cycle Register"
|
|
hexmask.word 0x00 0.--15. 1. " SCLL ,Count For SCL LOW Time Period Selection"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2420")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
tree "I2C0"
|
|
base sd:0xE001C000
|
|
width 0xA
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C0CON,I2C0 Control Register"
|
|
setclrfld.byte 0x00 6. 0x0 6. 0x18 6. " I2EN_Clear/Set ,I2C Interface Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x00 5. 0x0 5. 0x18 5. " STA_Clear/Set ,START Flag" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STO ,STOP Flag" "Not transmitted,Transmitted"
|
|
setclrfld.byte 0x00 3. 0x0 3. 0x18 3. " SI_Clear/Set ,I2C Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.byte 0x00 2. 0x0 2. 0x18 2. " AA_Clear/Set ,Assert Acknowledge Flag" "Not asserted,Asserted"
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C0STAT,I2C0 Status Register"
|
|
bitfld.byte 0x00 3.--7. " Status ,Actual Status Information About I2C Interface" "Bus error/undefined,START transmitted,Repeated START transmitted,SLA+W transmitted/ACK,SLA+W transmitted/NOT ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Arbitration lost SLA+R/W/Data/NOT ACK,SLA+R transmitted/ACK,SLA+R transmitted/NOT ACK,Data received/ACK,Data received/NOT ACK,Own SLA+W received/ACK,Arbitration lost SLA+R/W/Own SLA+W received/ACK,GCA (0x00) received/ACK,Arbitration lost SLA+R/W/GCA received/ACK,Own SLV/DATA received/ACK,Own SLA/DATA received/NOT ACK,General Call/DATA received/ACK,General Call/DATA received/NOT ACK,STOP/repeated START received SLV/REC/SLV/TRX,Own SLA+R received/ACK,Arbitration lost SLA+R/W/Own SLA+R received/ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Last I2DAT transmitted/ACK,Reserved,Reserved,Reserved,Reserved,Reserved,No information/SI = 0"
|
|
if (((data.byte(sd:(0xE001C000+0x0)))&0x8)==0x8)
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "I2C0DAT,I2C0 Data Register"
|
|
else
|
|
hgroup.byte 0x08++0x0
|
|
hide.byte 0x00 "I2C0DAT,I2C0 Data Register"
|
|
endif
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "I2C0ADR,I2C0 Slave Address Register"
|
|
hexmask.byte 0x00 1.--7. 0x2 " Address ,I2C Device Address For Slave Mode"
|
|
bitfld.byte 0x00 0. " GC ,General Call Enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "I2C0SCLH,I2C0 SCL HIGH Duty Cycle Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "I2C0SCLL,I2C0 SCL LOW Duty Cycle Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "I2C1"
|
|
base sd:0xE005C000
|
|
width 0xA
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C1CON,I2C1 Control Register"
|
|
setclrfld.byte 0x00 6. 0x0 6. 0x18 6. " I2EN_Clear/Set ,I2C Interface Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x00 5. 0x0 5. 0x18 5. " STA_Clear/Set ,START Flag" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STO ,STOP Flag" "Not transmitted,Transmitted"
|
|
setclrfld.byte 0x00 3. 0x0 3. 0x18 3. " SI_Clear/Set ,I2C Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.byte 0x00 2. 0x0 2. 0x18 2. " AA_Clear/Set ,Assert Acknowledge Flag" "Not asserted,Asserted"
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C1STAT,I2C1 Status Register"
|
|
bitfld.byte 0x00 3.--7. " Status ,Actual Status Information About I2C Interface" "Bus error/undefined,START transmitted,Repeated START transmitted,SLA+W transmitted/ACK,SLA+W transmitted/NOT ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Arbitration lost SLA+R/W/Data/NOT ACK,SLA+R transmitted/ACK,SLA+R transmitted/NOT ACK,Data received/ACK,Data received/NOT ACK,Own SLA+W received/ACK,Arbitration lost SLA+R/W/Own SLA+W received/ACK,GCA (0x00) received/ACK,Arbitration lost SLA+R/W/GCA received/ACK,Own SLV/DATA received/ACK,Own SLA/DATA received/NOT ACK,General Call/DATA received/ACK,General Call/DATA received/NOT ACK,STOP/repeated START received SLV/REC/SLV/TRX,Own SLA+R received/ACK,Arbitration lost SLA+R/W/Own SLA+R received/ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Last I2DAT transmitted/ACK,Reserved,Reserved,Reserved,Reserved,Reserved,No information/SI = 0"
|
|
if (((data.byte(sd:(0xE005C000+0x0)))&0x8)==0x8)
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "I2C1DAT,I2C1 Data Register"
|
|
else
|
|
hgroup.byte 0x08++0x0
|
|
hide.byte 0x00 "I2C1DAT,I2C1 Data Register"
|
|
endif
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "I2C1ADR,I2C1 Slave Address Register"
|
|
hexmask.byte 0x00 1.--7. 0x2 " Address ,I2C Device Address For Slave Mode"
|
|
bitfld.byte 0x00 0. " GC ,General Call Enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "I2C1SCLH,I2C1 SCL HIGH Duty Cycle Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "I2C1SCLL,I2C1 SCL LOW Duty Cycle Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "I2C2"
|
|
base sd:0xE0080000
|
|
width 0xA
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "I2C2CON,I2C2 Control Register"
|
|
setclrfld.byte 0x00 6. 0x0 6. 0x18 6. " I2EN_Clear/Set ,I2C Interface Enable" "Disabled,Enabled"
|
|
setclrfld.byte 0x00 5. 0x0 5. 0x18 5. " STA_Clear/Set ,START Flag" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STO ,STOP Flag" "Not transmitted,Transmitted"
|
|
setclrfld.byte 0x00 3. 0x0 3. 0x18 3. " SI_Clear/Set ,I2C Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.byte 0x00 2. 0x0 2. 0x18 2. " AA_Clear/Set ,Assert Acknowledge Flag" "Not asserted,Asserted"
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "I2C2STAT,I2C2 Status Register"
|
|
bitfld.byte 0x00 3.--7. " Status ,Actual Status Information About I2C Interface" "Bus error/undefined,START transmitted,Repeated START transmitted,SLA+W transmitted/ACK,SLA+W transmitted/NOT ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Arbitration lost SLA+R/W/Data/NOT ACK,SLA+R transmitted/ACK,SLA+R transmitted/NOT ACK,Data received/ACK,Data received/NOT ACK,Own SLA+W received/ACK,Arbitration lost SLA+R/W/Own SLA+W received/ACK,GCA (0x00) received/ACK,Arbitration lost SLA+R/W/GCA received/ACK,Own SLV/DATA received/ACK,Own SLA/DATA received/NOT ACK,General Call/DATA received/ACK,General Call/DATA received/NOT ACK,STOP/repeated START received SLV/REC/SLV/TRX,Own SLA+R received/ACK,Arbitration lost SLA+R/W/Own SLA+R received/ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Last I2DAT transmitted/ACK,Reserved,Reserved,Reserved,Reserved,Reserved,No information/SI = 0"
|
|
if (((data.byte(sd:(0xE0080000+0x0)))&0x8)==0x8)
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "I2C2DAT,I2C2 Data Register"
|
|
else
|
|
hgroup.byte 0x08++0x0
|
|
hide.byte 0x00 "I2C2DAT,I2C2 Data Register"
|
|
endif
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "I2C2ADR,I2C2 Slave Address Register"
|
|
hexmask.byte 0x00 1.--7. 0x2 " Address ,I2C Device Address For Slave Mode"
|
|
bitfld.byte 0x00 0. " GC ,General Call Enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "I2C2SCLH,I2C2 SCL HIGH Duty Cycle Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "I2C2SCLL,I2C2 SCL LOW Duty Cycle Register"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80020800
|
|
width 12.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "I2RX/I2TX,I2C Receive Register/I2C Transmit Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2STS,I2C Status Register"
|
|
eventfld.long 0x00 0. " OCI ,Operation Complete" "Not complete,Complete"
|
|
eventfld.long 0x00 1. " AFI ,Arbitration Failure" "Not failed,Failed"
|
|
bitfld.long 0x00 2. " NAI ,No Acknowledge" "Acknowledge,No acknowledge"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DRMI ,Master Data Request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " DRSI ,Slave Data Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " ACTIVE ,Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SCL ,SCL line reflection" "Low,High"
|
|
bitfld.long 0x00 7. " SDA ,SDA line reflection" "Low,High"
|
|
bitfld.long 0x00 8. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RFE ,Receive FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 10. " TFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 11. " TFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TFFS ,Slave Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 13. " TFES ,Slave Transmit FIFO Empty" "Not empty,Empty"
|
|
group.long 0x08++0x0F
|
|
line.long 0x00 "I2CON,I2C Control Register"
|
|
bitfld.long 0x00 0. " OCIE ,Operation Complete interrupt request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " AFIE ,Arbitration Failure interrupt request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " NAIE ,No Acknowledge interrupt request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DRMIE ,Master Data Request interrupt request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DRSIE ,Slave Data Request interrupt request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RFFE ,Receive FIFO Full interrupt request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFNEE ,Receive FIFO Empty interrupt request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TFNFE ,Transmit FIFO Full interrupt request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " I2RES ,I2C interface reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFNFSE ,Slave Transmit FIFO Full interrupt request enable" "Disabled,Enabled"
|
|
line.long 0x04 "I2CLKHI,I2C Clock Divisor High Register"
|
|
hexmask.long.word 0x04 0.--14. 1. " CDH ,Clock Divisor High"
|
|
line.long 0x08 "I2CLKLO,I2C Clock Divisor Low Register"
|
|
hexmask.long.word 0x08 0.--14. 1. " CDL ,Clock Divisor Low"
|
|
line.long 0x0C "I2ADR,I2C Slave Address Register"
|
|
hexmask.long.byte 0x0C 0.--6. 1. " SlAddr ,Slave Address"
|
|
rgroup.long 0x18++0x0F
|
|
line.long 0x00 "I2RFL,I2C Rx FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--4. 1. " UnReadB ,Number of unread bytes in the Receive FIFO"
|
|
line.long 0x04 "I2TFL,I2C Tx FIFO Level Register"
|
|
hexmask.long.byte 0x04 0.--4. 1. " UnSetB ,Number of unsent bytes in the Transmit FIFO"
|
|
line.long 0x08 "I2RXB,I2C Rx Byte Count Register"
|
|
hexmask.long.byte 0x08 0.--6. 1. " NrRecB ,Number of recieved bytes"
|
|
line.long 0x0C "I2TXB,I2C Tx Byte Count Register"
|
|
hexmask.long.byte 0x0C 0.--6. 1. " NrTranB ,Number of transmitted bytes"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "I2STFL,I2C Slave Tx FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--4. 1. " SUnSetB ,Number of unsent bytes in the Slave Transmit FIFO"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "I2TXS,I2C Slave Transmit Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " STxFIFO ,Slave Transmit FIFO write"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; TIMERs
|
|
; --------------------------------------------------------------------------------
|
|
tree "Timers"
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
base 0xE0004000
|
|
tree "Timer 0"
|
|
width 0x8
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "T0IR,Timer0 Interrupt Register"
|
|
bitfld.byte 0x00 0. " MR0I ,Interrupt flag for match channel 0" "Not occured,Occured"
|
|
bitfld.byte 0x00 1. " MR1I ,Interrupt flag for match channel 1" "Not occured,Occured"
|
|
bitfld.byte 0x00 2. " MR2I ,Interrupt flag for match channel 2" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MR3I ,Interrupt flag for match channel 3" "Not occured,Occured"
|
|
bitfld.byte 0x00 4. " CR0I ,Interrupt flag for capture channel 0 event" "Not occured,Occured"
|
|
bitfld.byte 0x00 5. " CR1I ,Interrupt flag for capture channel 1 event" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " CR2I ,Interrupt flag for capture channel 2 event" "Not occured,Occured"
|
|
bitfld.byte 0x00 7. " CR3I ,Interrupt flag for capture channel 3 event" "Not occured,Occured"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "T0TCR,Timer0 Timer Control Register"
|
|
bitfld.byte 0x00 0. " CE ,Counter Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CR ,Counter Reset" "No reset,Reset"
|
|
if ((data.byte(ad:0xE0004070+(0x00004000*0))&0x3)==0x0)
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T0CTCR,Timer0 Count Control Register"
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
else
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T0CTCR,Timer0 Count Control Register"
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP0.0,CAP0.1,CAP0.2,CAP0.3"
|
|
endif
|
|
group.long 0x08++0xb
|
|
line.long 0x00 "T0TC,Timer0 Timer Counter"
|
|
line.long 0x04 "T0PR,Timer0 Prescale Register"
|
|
line.long 0x08 "T0PC,Timer0 Prescale Counter"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "T0MCR,Timer0 Match Control Register"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
group.long 0x18++0x0f
|
|
line.long 0x00 "T0MR0,Timer0 Match Register 0"
|
|
line.long 0x04 "T0MR1,Timer0 Match Register 1"
|
|
line.long 0x08 "T0MR2,Timer0 Match Register 2"
|
|
line.long 0x0C "T0MR3,Timer0 Match Register 3"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "T0CCR,Timer0 Capture Control Register"
|
|
bitfld.word 0x00 0. " CAP0.0RE ,Capture on CAP0.0 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CAP0.0FE ,Capture on CAP0.0 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CAP0.0E ,Interrupt on CAP0.0 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CAP0.1RE ,Capture on CAP0.1 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CAP0.1FE ,Capture on CAP0.1 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " CAP0.1E ,Interrupt on CAP0.1 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CAP0.2RE ,Capture on CAP0.2 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " CAP0.2FE ,Capture on CAP0.2 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CAP0.2E ,Interrupt on CAP0.2 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CAP0.3RE ,Capture on CAP0.3 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " CAP0.3FE ,Capture on CAP0.3 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " CAP0.3E ,Interrupt on CAP0.3 event" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T0CR0,Timer0 Capture Register 0"
|
|
line.long 0x04 "T0CR1,Timer0 Capture Register 1"
|
|
line.long 0x08 "T0CR2,Timer0 Capture Register 2"
|
|
line.long 0x0C "T0CR3,Timer0 Capture Register 3"
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "T0EMR,Timer0 External Match Register"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Tooggled"
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Tooggled"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Tooggled"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Tooggled"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0008000
|
|
tree "Timer 1"
|
|
width 0x8
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "T1IR,Timer1 Interrupt Register"
|
|
bitfld.byte 0x00 0. " MR0I ,Interrupt flag for match channel 0" "Not occured,Occured"
|
|
bitfld.byte 0x00 1. " MR1I ,Interrupt flag for match channel 1" "Not occured,Occured"
|
|
bitfld.byte 0x00 2. " MR2I ,Interrupt flag for match channel 2" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MR3I ,Interrupt flag for match channel 3" "Not occured,Occured"
|
|
bitfld.byte 0x00 4. " CR0I ,Interrupt flag for capture channel 0 event" "Not occured,Occured"
|
|
bitfld.byte 0x00 5. " CR1I ,Interrupt flag for capture channel 1 event" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " CR2I ,Interrupt flag for capture channel 2 event" "Not occured,Occured"
|
|
bitfld.byte 0x00 7. " CR3I ,Interrupt flag for capture channel 3 event" "Not occured,Occured"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "T1TCR,Timer1 Timer Control Register"
|
|
bitfld.byte 0x00 0. " CE ,Counter Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CR ,Counter Reset" "No reset,Reset"
|
|
if ((data.byte(ad:0xE0004070+(0x00004000*1))&0x3)==0x0)
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T1CTCR,Timer1 Count Control Register"
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
else
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T1CTCR,Timer1 Count Control Register"
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP1.0,CAP1.1,CAP1.2,CAP1.3"
|
|
endif
|
|
group.long 0x08++0xb
|
|
line.long 0x00 "T1TC,Timer1 Timer Counter"
|
|
line.long 0x04 "T1PR,Timer1 Prescale Register"
|
|
line.long 0x08 "T1PC,Timer1 Prescale Counter"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "T1MCR,Timer1 Match Control Register"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
group.long 0x18++0x0f
|
|
line.long 0x00 "T1MR0,Timer1 Match Register 0"
|
|
line.long 0x04 "T1MR1,Timer1 Match Register 1"
|
|
line.long 0x08 "T1MR2,Timer1 Match Register 2"
|
|
line.long 0x0C "T1MR3,Timer1 Match Register 3"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "T1CCR,Timer1 Capture Control Register"
|
|
bitfld.word 0x00 0. " CAP1.0RE ,Capture on CAP1.0 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CAP1.0FE ,Capture on CAP1.0 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CAP1.0E ,Interrupt on CAP1.0 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CAP1.1RE ,Capture on CAP1.1 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CAP1.1FE ,Capture on CAP1.1 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " CAP1.1E ,Interrupt on CAP1.1 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CAP1.2RE ,Capture on CAP1.2 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " CAP1.2FE ,Capture on CAP1.2 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CAP1.2E ,Interrupt on CAP1.2 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CAP1.3RE ,Capture on CAP1.3 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " CAP1.3FE ,Capture on CAP1.3 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " CAP1.3E ,Interrupt on CAP1.3 event" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T1CR0,Timer1 Capture Register 0"
|
|
line.long 0x04 "T1CR1,Timer1 Capture Register 1"
|
|
line.long 0x08 "T1CR2,Timer1 Capture Register 2"
|
|
line.long 0x0C "T1CR3,Timer1 Capture Register 3"
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "T1EMR,Timer1 External Match Register"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Tooggled"
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Tooggled"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Tooggled"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Tooggled"
|
|
width 0x0B
|
|
tree.end
|
|
elif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
tree "TIMER 0"
|
|
base sd:0xe0004000
|
|
width 9.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "T0IR,Interrupt Register"
|
|
bitfld.byte 0x00 7. " CR3INT ,Capture Channel 3 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " CR2INT ,Capture Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " CR1INT ,Capture Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CR0INT ,Capture Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " MR3INT ,Match Channel 3 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " MR2INT ,Match Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MR1INT ,Match Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " MR0INT ,Match Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "T0CR,Timer 0 Control Register"
|
|
bitfld.byte 0x00 1. " CNT_RST ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CNT_EN ,Counter Enable" "Disabled,Enabled"
|
|
width 9.
|
|
if (0.==0.)
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T0TCR,Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CNT_IN_SEL ,Count Input Select" "CAP0.0,CAP0.1,CAP0.2,?..."
|
|
bitfld.byte 0x00 0.--1. " CNT_TIM_MD ,Counter/Timer Mode" "Timer,Counter-rising edge,Counter-falling enge,Counter-both edges"
|
|
elif (0.==1.)
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T0TCR,Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CNT_IN_SEL ,Count Input Select" "CAP0.0,CAP0.1,CAP0.2,CAP0.3"
|
|
bitfld.byte 0x00 0.--1. " CNT_TIM_MD ,Counter/Timer Mode" "Timer,Counter-rising edge,Counter-falling enge,Counter-both edges"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "T0TC,Timer Counter"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "T0PR,Prescale Register"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "T0PC,Prescale Counter Register"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "T0MR0,Match Register 0"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "T0MR1,Match Register 1"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "T0MR2,Match Register 2"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "T0MR3,Match Register 3"
|
|
width 9.
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "T0MCR,Match Control Register"
|
|
bitfld.word 0x00 11. " MR3S ,Stop On MR3" "Not stopped,Stopped"
|
|
bitfld.word 0x00 10. " MR3R ,Reset On MR3" "No reset,Reset"
|
|
bitfld.word 0x00 9. " MR2I ,Interrupt On MR3" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MR2S ,Stop On MR2" "Not stopped,Stopped"
|
|
bitfld.word 0x00 7. " MR2R ,Reset On MR2" "No reset,Reset"
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt On MR2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MR1S ,Stop On MR1" "Not stopped,Stopped"
|
|
bitfld.word 0x00 4. " MR1R ,Reset On MR1" "No reset,Reset"
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt On MR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MR0S ,Stop On MR0" "Not stopped,Stopped"
|
|
bitfld.word 0x00 1. " MR0R ,Reset On MR0" "No reset,Reset"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt On MR0" "No interrupt,Interrupt"
|
|
rgroup.long 0x2c++0x3
|
|
line.long 0x00 "T0CR0,Capture Register 0"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "T0CR1,Capture Register 1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "T0CR2,Capture Register 2"
|
|
if (0.==1.)
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "T0CR3,Capture Register 3"
|
|
endif
|
|
if (0.==0.)
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "T0CCR,Capture Control Register"
|
|
bitfld.word 0x00 8. " CAP2I ,Interrupt On CAP0.2" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " CAP2FE ,Capture On CAP0.2 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 6. " CAP2RE ,Capture On CAP0.2 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt On CAP0.1" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " CAP1FE ,Caputre On CAP0.1 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture On CAP0.1 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt On CAP0.0" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture On CAP0.0 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture On CAP0.0 Rising Edge" "Not captured,Captured"
|
|
elif (0.==1.)
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "T0CCR,Capture Control Register"
|
|
bitfld.word 0x00 11. " CAP3I ,Interrupt On CAP0.3" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 10. " CAP3FE ,Capture On CAP0.3 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 9. " CAP3RE ,Capture On CAP0.3 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP2I ,Interrupt On CAP0.2" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " CAP2FE ,Capture On CAP0.2 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 6. " CAP2RE ,Capture On CAP0.2 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt On CAP0.1" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " CAP1FE ,Caputre On CAP0.1 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture On CAP0.1 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt On CAP0.0" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture On CAP0.0 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture On CAP0.0 Rising Edge" "Not captured,Captured"
|
|
endif
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "T0EMR,External Match Register"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "None,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "PWM0CON,PWM Control Register"
|
|
bitfld.long 0x00 3. " PWM3_EN ,PWM Mode For MAT0.3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PWM2_EN ,PWM Mode For MAT0.2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PWM1_EN ,PWM Mode For MAT0.1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PWM0_EN ,PWM Mode For MAT0.0 Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIMER 1"
|
|
base sd:0xe0008000
|
|
width 9.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "T1IR,Interrupt Register"
|
|
bitfld.byte 0x00 7. " CR3INT ,Capture Channel 3 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " CR2INT ,Capture Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " CR1INT ,Capture Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CR0INT ,Capture Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " MR3INT ,Match Channel 3 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " MR2INT ,Match Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MR1INT ,Match Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " MR0INT ,Match Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "T1CR,Timer 1 Control Register"
|
|
bitfld.byte 0x00 1. " CNT_RST ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CNT_EN ,Counter Enable" "Disabled,Enabled"
|
|
width 9.
|
|
if (1.==0.)
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T1TCR,Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CNT_IN_SEL ,Count Input Select" "CAP1.0,CAP1.1,CAP1.2,?..."
|
|
bitfld.byte 0x00 0.--1. " CNT_TIM_MD ,Counter/Timer Mode" "Timer,Counter-rising edge,Counter-falling enge,Counter-both edges"
|
|
elif (1.==1.)
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T1TCR,Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CNT_IN_SEL ,Count Input Select" "CAP1.0,CAP1.1,CAP1.2,CAP1.3"
|
|
bitfld.byte 0x00 0.--1. " CNT_TIM_MD ,Counter/Timer Mode" "Timer,Counter-rising edge,Counter-falling enge,Counter-both edges"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "T1TC,Timer Counter"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "T1PR,Prescale Register"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "T1PC,Prescale Counter Register"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "T1MR0,Match Register 0"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "T1MR1,Match Register 1"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "T1MR2,Match Register 2"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "T1MR3,Match Register 3"
|
|
width 9.
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "T1MCR,Match Control Register"
|
|
bitfld.word 0x00 11. " MR3S ,Stop On MR3" "Not stopped,Stopped"
|
|
bitfld.word 0x00 10. " MR3R ,Reset On MR3" "No reset,Reset"
|
|
bitfld.word 0x00 9. " MR2I ,Interrupt On MR3" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MR2S ,Stop On MR2" "Not stopped,Stopped"
|
|
bitfld.word 0x00 7. " MR2R ,Reset On MR2" "No reset,Reset"
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt On MR2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MR1S ,Stop On MR1" "Not stopped,Stopped"
|
|
bitfld.word 0x00 4. " MR1R ,Reset On MR1" "No reset,Reset"
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt On MR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MR0S ,Stop On MR0" "Not stopped,Stopped"
|
|
bitfld.word 0x00 1. " MR0R ,Reset On MR0" "No reset,Reset"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt On MR0" "No interrupt,Interrupt"
|
|
rgroup.long 0x2c++0x3
|
|
line.long 0x00 "T1CR0,Capture Register 0"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "T1CR1,Capture Register 1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "T1CR2,Capture Register 2"
|
|
if (1.==1.)
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "T1CR3,Capture Register 3"
|
|
endif
|
|
if (1.==0.)
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "T1CCR,Capture Control Register"
|
|
bitfld.word 0x00 8. " CAP2I ,Interrupt On CAP1.2" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " CAP2FE ,Capture On CAP1.2 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 6. " CAP2RE ,Capture On CAP1.2 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt On CAP1.1" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " CAP1FE ,Caputre On CAP1.1 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture On CAP1.1 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt On CAP1.0" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture On CAP1.0 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture On CAP1.0 Rising Edge" "Not captured,Captured"
|
|
elif (1.==1.)
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "T1CCR,Capture Control Register"
|
|
bitfld.word 0x00 11. " CAP3I ,Interrupt On CAP1.3" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 10. " CAP3FE ,Capture On CAP1.3 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 9. " CAP3RE ,Capture On CAP1.3 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP2I ,Interrupt On CAP1.2" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " CAP2FE ,Capture On CAP1.2 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 6. " CAP2RE ,Capture On CAP1.2 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt On CAP1.1" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " CAP1FE ,Caputre On CAP1.1 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture On CAP1.1 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt On CAP1.0" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture On CAP1.0 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture On CAP1.0 Rising Edge" "Not captured,Captured"
|
|
endif
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "T1EMR,External Match Register"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "None,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "PWM1CON,PWM Control Register"
|
|
bitfld.long 0x00 3. " PWM3_EN ,PWM Mode For MAT1.3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PWM2_EN ,PWM Mode For MAT1.2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PWM1_EN ,PWM Mode For MAT1.1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PWM0_EN ,PWM Mode For MAT1.0 Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIMER 2"
|
|
base sd:0xe0070000
|
|
width 9.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "T2IR,Interrupt Register"
|
|
bitfld.byte 0x00 6. " CR2INT ,Capture Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " CR1INT ,Capture Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " CR0INT ,Capture Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MR3INT ,Match Channel 3 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " MR2INT ,Match Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " MR1INT ,Match Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " MR0INT ,Match Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "T2TCR,Timer Control Register"
|
|
bitfld.byte 0x00 1. " CNT_RST ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CNT_EN ,Counter Enable" "Disabled,Enabled"
|
|
width 9.
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T2CTCR,Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CNT_IN_SEL ,Count Input Select" "CAP2.0,CAP2.1,CAP2.2,?..."
|
|
bitfld.byte 0x00 0.--1. " CNT_TIM_MD ,Counter Timer Mode" "Timer,Counter-rising edge,Counter-faling edge,Counter-both edges"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "T2TC,Timer Counter"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "T2PR,Prescale Register"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "T2PC,Prescale Counter Register"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "MR0,Match Register 0"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "MR1,Match Register 1"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "MR2,Match Register 2"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "MR3,Match Register 3"
|
|
width 9.
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "T2MCR,Match Control Register"
|
|
bitfld.word 0x00 11. " MR3S ,Stop On MR3" "Not stopped,Stopped"
|
|
bitfld.word 0x00 10. " MR3R ,Reset On MR3" "No reset,Reset"
|
|
bitfld.word 0x00 9. " MR3I ,Interrupt On MR3" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MR2S ,Stop On MR2" "Not stopped,Stopped"
|
|
bitfld.word 0x00 7. " MR2R ,Reset On MR2" "No reset,Reset"
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt On MR2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MR1S ,Stop On MR1" "Not stopped,Stopped"
|
|
bitfld.word 0x00 4. " MR1R ,Reset On MR1" "No reset,Reset"
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt On MR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MR0S ,Stop On MR0" "Not stopped,Stopped"
|
|
bitfld.word 0x00 1. " MR0R ,Reset On MR0" "No reset,Reset"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt On MR0" "No interrupt,Interrupt"
|
|
if (2.==2.)
|
|
rgroup.word 0x2c++0x1
|
|
line.word 0x00 "T2CR0,Capture Register 0"
|
|
rgroup.word 0x30++0x1
|
|
line.word 0x00 "T2CR1,Capture Register 1"
|
|
rgroup.word 0x34++0x1
|
|
line.word 0x00 "T2CR2,Capture Register 2"
|
|
endif
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "T2CCR,Capture Control Register"
|
|
bitfld.word 0x00 8. " CAP2I ,Interrupt On CAP2.2" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " CAP2FE ,Capture On CAP2.2 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 6. " CAP2RE ,Capture On CAP2.2 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt On CAP2.1" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " CAP1FE ,Capture On CAP2.1 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture On CAP2.1 Rising Mode" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt On CAP2.0" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture On CAP2.0 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture On CAP2.0 Rising Edge" "Not captured,Captured"
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "T2EMR,External Match Register"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "None,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "PWM2CON,PWM Control Register"
|
|
bitfld.long 0x00 3. " PWM3_EN ,PWM Mode For MAT2.3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PWM2_EN ,PWM Mode For MAT2.2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PWM1_EN ,PWM Mode For MAT2.1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PWM0_EN ,PWM Mode For MAT2.0 Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TIMER 3"
|
|
base sd:0xe0074000
|
|
width 9.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "T3IR,Interrupt Register"
|
|
bitfld.byte 0x00 6. " CR2INT ,Capture Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " CR1INT ,Capture Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " CR0INT ,Capture Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MR3INT ,Match Channel 3 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " MR2INT ,Match Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " MR1INT ,Match Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " MR0INT ,Match Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "T3TCR,Timer Control Register"
|
|
bitfld.byte 0x00 1. " CNT_RST ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CNT_EN ,Counter Enable" "Disabled,Enabled"
|
|
width 9.
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T3CTCR,Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CNT_IN_SEL ,Count Input Select" "CAP3.0,CAP3.1,CAP3.2,?..."
|
|
bitfld.byte 0x00 0.--1. " CNT_TIM_MD ,Counter Timer Mode" "Timer,Counter-rising edge,Counter-faling edge,Counter-both edges"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "T3TC,Timer Counter"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "T3PR,Prescale Register"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "T3PC,Prescale Counter Register"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "MR0,Match Register 0"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "MR1,Match Register 1"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "MR2,Match Register 2"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "MR3,Match Register 3"
|
|
width 9.
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "T3MCR,Match Control Register"
|
|
bitfld.word 0x00 11. " MR3S ,Stop On MR3" "Not stopped,Stopped"
|
|
bitfld.word 0x00 10. " MR3R ,Reset On MR3" "No reset,Reset"
|
|
bitfld.word 0x00 9. " MR3I ,Interrupt On MR3" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MR2S ,Stop On MR2" "Not stopped,Stopped"
|
|
bitfld.word 0x00 7. " MR2R ,Reset On MR2" "No reset,Reset"
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt On MR2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MR1S ,Stop On MR1" "Not stopped,Stopped"
|
|
bitfld.word 0x00 4. " MR1R ,Reset On MR1" "No reset,Reset"
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt On MR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MR0S ,Stop On MR0" "Not stopped,Stopped"
|
|
bitfld.word 0x00 1. " MR0R ,Reset On MR0" "No reset,Reset"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt On MR0" "No interrupt,Interrupt"
|
|
if (3.==2.)
|
|
rgroup.word 0x2c++0x1
|
|
line.word 0x00 "T3CR0,Capture Register 0"
|
|
rgroup.word 0x30++0x1
|
|
line.word 0x00 "T3CR1,Capture Register 1"
|
|
rgroup.word 0x34++0x1
|
|
line.word 0x00 "T3CR2,Capture Register 2"
|
|
endif
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "T3CCR,Capture Control Register"
|
|
bitfld.word 0x00 8. " CAP2I ,Interrupt On CAP3.2" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " CAP2FE ,Capture On CAP3.2 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 6. " CAP2RE ,Capture On CAP3.2 Rising Edge" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt On CAP3.1" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " CAP1FE ,Capture On CAP3.1 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture On CAP3.1 Rising Mode" "Not captured,Captured"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt On CAP3.0" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture On CAP3.0 Falling Edge" "Not captured,Captured"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture On CAP3.0 Rising Edge" "Not captured,Captured"
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "T3EMR,External Match Register"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "None,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "None,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "PWM3CON,PWM Control Register"
|
|
bitfld.long 0x00 3. " PWM3_EN ,PWM Mode For MAT3.3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PWM2_EN ,PWM Mode For MAT3.2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PWM1_EN ,PWM Mode For MAT3.1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PWM0_EN ,PWM Mode For MAT3.0 Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
elif (cpu()=="LPC2131"||cpu()=="LPC2131/01"||cpu()=="LPC2132"||cpu()=="LPC2132/01"||cpu()=="LPC2134"||cpu()=="LPC2134/01"||cpu()=="LPC2136"||cpu()=="LPC2136/01"||cpu()=="LPC2138"||cpu()=="LPC2138/01"||cpu()=="LPC2157"||cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
tree "TIMER/COUNTER 0"
|
|
base 0xE0004000
|
|
width 0x8
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "T0IR,Timer0 Interrupt Register"
|
|
bitfld.long 0x00 0. " MR0I ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " MR1I ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " MR2I ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MR3I ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " CR0I ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CR1I ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CR2I ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " CR3I ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred"
|
|
line.long 0x04 "T0TCR,Timer0 Timer Control Register"
|
|
bitfld.long 0x04 0. " CE ,Counter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CR ,Counter Reset" "No reset,Reset"
|
|
if ((data.long(ad:0xE0004070+(0x00004000*0))&0x3)==0x0)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "T0CTCR,Timer0 Count Control Register"
|
|
bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
else
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "T0CTCR,Timer0 Count Control Register"
|
|
bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP0.0,CAP0.1,CAP0.2,CAP0.3"
|
|
endif
|
|
group.long 0x08++0xB
|
|
line.long 0x00 "T0TC,Timer0 Timer Counter"
|
|
line.long 0x04 "T0PR,Timer0 Prescale Register"
|
|
line.long 0x08 "T0PC,Timer0 Prescale Counter"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "T0MCR,Timer0 Match Control Register"
|
|
bitfld.long 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
group.long 0x18++0x0F
|
|
line.long 0x00 "T0MR0,Timer0 Match Register 0"
|
|
line.long 0x04 "T0MR1,Timer0 Match Register 1"
|
|
line.long 0x08 "T0MR2,Timer0 Match Register 2"
|
|
line.long 0x0C "T0MR3,Timer0 Match Register 3"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "T0CCR,Timer0 Capture Control Register"
|
|
bitfld.long 0x00 0. " CAP0.0RE ,Capture on CAP0.0 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CAP0.0FE ,Capture on CAP0.0 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CAP0.0I ,Interrupt on CAP0.0 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CAP0.1RE ,Capture on CAP0.1 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CAP0.1FE ,Capture on CAP0.1 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CAP0.1I ,Interrupt on CAP0.1 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CAP0.2RE ,Capture on CAP0.2 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " CAP0.2FE ,Capture on CAP0.2 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CAP0.2I ,Interrupt on CAP0.2 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CAP0.3RE ,Capture on CAP0.3 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CAP0.3FE ,Capture on CAP0.3 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " CAP0.3I ,Interrupt on CAP0.3 event" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T0CR0,Timer0 Capture Register 0"
|
|
line.long 0x04 "T0CR1,Timer0 Capture Register 1"
|
|
line.long 0x08 "T0CR2,Timer0 Capture Register 2"
|
|
line.long 0x0C "T0CR3,Timer0 Capture Register 3"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "T0EMR,Timer0 External Match Register"
|
|
bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Tooggled"
|
|
bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Tooggled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Tooggled"
|
|
bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Tooggled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TIMER/COUNTER 1"
|
|
base 0xE0008000
|
|
width 0x8
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "T1IR,Timer1 Interrupt Register"
|
|
bitfld.long 0x00 0. " MR0I ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " MR1I ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " MR2I ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MR3I ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " CR0I ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CR1I ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CR2I ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " CR3I ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred"
|
|
line.long 0x04 "T1TCR,Timer1 Timer Control Register"
|
|
bitfld.long 0x04 0. " CE ,Counter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CR ,Counter Reset" "No reset,Reset"
|
|
if ((data.long(ad:0xE0004070+(0x00004000*1))&0x3)==0x0)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "T1CTCR,Timer1 Count Control Register"
|
|
bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
else
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "T1CTCR,Timer1 Count Control Register"
|
|
bitfld.long 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
bitfld.long 0x00 2.--3. " CIS ,Counter Input Select" "CAP1.0,CAP1.1,CAP1.2,CAP1.3"
|
|
endif
|
|
group.long 0x08++0xB
|
|
line.long 0x00 "T1TC,Timer1 Timer Counter"
|
|
line.long 0x04 "T1PR,Timer1 Prescale Register"
|
|
line.long 0x08 "T1PC,Timer1 Prescale Counter"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "T1MCR,Timer1 Match Control Register"
|
|
bitfld.long 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
group.long 0x18++0x0F
|
|
line.long 0x00 "T1MR0,Timer1 Match Register 0"
|
|
line.long 0x04 "T1MR1,Timer1 Match Register 1"
|
|
line.long 0x08 "T1MR2,Timer1 Match Register 2"
|
|
line.long 0x0C "T1MR3,Timer1 Match Register 3"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "T1CCR,Timer1 Capture Control Register"
|
|
bitfld.long 0x00 0. " CAP1.0RE ,Capture on CAP1.0 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CAP1.0FE ,Capture on CAP1.0 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CAP1.0I ,Interrupt on CAP1.0 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CAP1.1RE ,Capture on CAP1.1 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CAP1.1FE ,Capture on CAP1.1 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CAP1.1I ,Interrupt on CAP1.1 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CAP1.2RE ,Capture on CAP1.2 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " CAP1.2FE ,Capture on CAP1.2 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CAP1.2I ,Interrupt on CAP1.2 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CAP1.3RE ,Capture on CAP1.3 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CAP1.3FE ,Capture on CAP1.3 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " CAP1.3I ,Interrupt on CAP1.3 event" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T1CR0,Timer1 Capture Register 0"
|
|
line.long 0x04 "T1CR1,Timer1 Capture Register 1"
|
|
line.long 0x08 "T1CR2,Timer1 Capture Register 2"
|
|
line.long 0x0C "T1CR3,Timer1 Capture Register 3"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "T1EMR,Timer1 External Match Register"
|
|
bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Tooggled"
|
|
bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Tooggled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Tooggled"
|
|
bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Tooggled"
|
|
width 0x0B
|
|
tree.end
|
|
elif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80020000
|
|
width 9.
|
|
group.long 0x000++0x03 "Timer 0"
|
|
line.long 0x00 "T0LOAD,Timer 0 load register"
|
|
rgroup.long 0x004++0x03
|
|
line.long 0x00 "T0VALUE,Timer 0 value register"
|
|
group.long 0x008++0x03
|
|
line.long 0x00 "T0CTRL,Timer 0 control register"
|
|
bitfld.long 0x00 2.--3. " PRESCALE ,CGU clock prescale" "Clock rate,Clock rate/16,Clock rate/256,Do not write"
|
|
bitfld.long 0x00 6. " TMODE ,Timer mode" "All ones,Reoladed from T0LOAD"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TENAB ,Timer enable" "Disabled,Enabled"
|
|
wgroup.long 0x00C++0x03
|
|
line.long 0x00 "T0CLR,Timer 0 Interrupt Clear Registers"
|
|
group.long 0x400++0x03 "Timer 1"
|
|
line.long 0x00 "T1LOAD,Timer 1 load register"
|
|
rgroup.long 0x404++0x03
|
|
line.long 0x00 "T1VALUE,Timer 1 value register"
|
|
group.long 0x408++0x03
|
|
line.long 0x00 "T1CTRL,Timer 1 control register"
|
|
bitfld.long 0x00 2.--3. " PRESCALE ,CGU clock prescale" "Clock rate,Clock rate/16,Clock rate/256,Do not write"
|
|
bitfld.long 0x00 6. " TMODE ,Timer mode" "All ones,Reoladed from T1LOAD"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TENAB ,Timer enable" "Disabled,Enabled"
|
|
wgroup.long 0x40C++0x03
|
|
line.long 0x00 "T0CLR,Timer 1 Interrupt Clear Registers"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||cpu()=="LPC2420"||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
tree "TIMER 0"
|
|
base sd:0xe0004000
|
|
width 0x8
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "T0IR,Timer0 Interrupt Register"
|
|
sif (cpuis("LPC23*"))
|
|
eventfld.byte 0x00 5. " CR1Interrupt ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 4. " CR0Interrupt ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " MR3Interrupt ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " MR2Interrupt ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " MR1Interrupt ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " MR0Interrupt ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
else
|
|
eventfld.byte 0x00 7. " CR3Interrupt ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 6. " CR2Interrupt ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 5. " CR1Interrupt ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 4. " CR0Interrupt ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " MR3Interrupt ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " MR2Interrupt ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " MR1Interrupt ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " MR0Interrupt ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
endif
|
|
width 8.
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "T0TCR,Timer0 Timer Control Register"
|
|
bitfld.byte 0x00 1. " CounterReset ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CounterEnable ,Counter Enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2468"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T0CTCR,Timer0 Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP0.0,CAP0.1,CAP0.2,CAP0.3"
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
else
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T0CTCR,Timer0 Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP0.0,CAP0.1,?..."
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
endif
|
|
group.long 0x08++0xb
|
|
line.long 0x00 "T0TC,Timer0 Timer Counter"
|
|
line.long 0x04 "T0PR,Timer0 Prescale Register"
|
|
line.long 0x08 "T0PC,Timer0 Prescale Counter"
|
|
width 0x8
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "T0MCR,Timer0 Match Control Register"
|
|
bitfld.word 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
group.long 0x18++0x0f
|
|
line.long 0x00 "T0MR0,Timer0 Match Register 0"
|
|
line.long 0x04 "T0MR1,Timer0 Match Register 1"
|
|
line.long 0x08 "T0MR2,Timer0 Match Register 2"
|
|
line.long 0x0C "T0MR3,Timer0 Match Register 3"
|
|
width 8.
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "T0CCR,Timer0 Capture Control Register"
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt on CAP0.1 event" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CAP1FE ,Capture on CAP0.1 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture on CAP0.1 rising edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt on CAP0.0 event" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture on CAP0.0 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture on CAP0.0 rising edge" "Disabled,Enabled"
|
|
sif (cpuis("LPC23*"))
|
|
rgroup.long 0x2C++0x07
|
|
line.long 0x00 "T0CR0,Timer0 Capture Register 0"
|
|
line.long 0x04 "T0CR1,Timer0 Capture Register 1"
|
|
else
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T0CR0,Timer0 Capture Register 0"
|
|
line.long 0x04 "T0CR1,Timer0 Capture Register 1"
|
|
line.long 0x08 "T0CR2,Timer0 Capture Register 2"
|
|
line.long 0x0C "T0CR3,Timer0 Capture Register 3"
|
|
endif
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "T0EMR,Timer0 External Match Register"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TIMER 1"
|
|
base sd:0xe0008000
|
|
width 0x8
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "T1IR,Timer1 Interrupt Register"
|
|
sif (cpuis("LPC23*"))
|
|
eventfld.byte 0x00 5. " CR1Interrupt ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 4. " CR0Interrupt ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " MR3Interrupt ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " MR2Interrupt ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " MR1Interrupt ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " MR0Interrupt ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
else
|
|
eventfld.byte 0x00 7. " CR3Interrupt ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 6. " CR2Interrupt ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 5. " CR1Interrupt ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 4. " CR0Interrupt ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " MR3Interrupt ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " MR2Interrupt ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " MR1Interrupt ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " MR0Interrupt ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
endif
|
|
width 8.
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "T1TCR,Timer1 Timer Control Register"
|
|
bitfld.byte 0x00 1. " CounterReset ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CounterEnable ,Counter Enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2468"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T1CTCR,Timer1 Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP1.0,CAP1.1,CAP1.2,CAP1.3"
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
else
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T1CTCR,Timer1 Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP1.0,CAP1.1,?..."
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
endif
|
|
group.long 0x08++0xb
|
|
line.long 0x00 "T1TC,Timer1 Timer Counter"
|
|
line.long 0x04 "T1PR,Timer1 Prescale Register"
|
|
line.long 0x08 "T1PC,Timer1 Prescale Counter"
|
|
width 0x8
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "T1MCR,Timer1 Match Control Register"
|
|
bitfld.word 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
group.long 0x18++0x0f
|
|
line.long 0x00 "T1MR0,Timer1 Match Register 0"
|
|
line.long 0x04 "T1MR1,Timer1 Match Register 1"
|
|
line.long 0x08 "T1MR2,Timer1 Match Register 2"
|
|
line.long 0x0C "T1MR3,Timer1 Match Register 3"
|
|
width 8.
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "T1CCR,Timer1 Capture Control Register"
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt on CAP1.1 event" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CAP1FE ,Capture on CAP1.1 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture on CAP1.1 rising edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt on CAP1.0 event" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture on CAP1.0 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture on CAP1.0 rising edge" "Disabled,Enabled"
|
|
sif (cpuis("LPC23*"))
|
|
rgroup.long 0x2C++0x07
|
|
line.long 0x00 "T1CR0,Timer1 Capture Register 0"
|
|
line.long 0x04 "T1CR1,Timer1 Capture Register 1"
|
|
else
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T1CR0,Timer1 Capture Register 0"
|
|
line.long 0x04 "T1CR1,Timer1 Capture Register 1"
|
|
line.long 0x08 "T1CR2,Timer1 Capture Register 2"
|
|
line.long 0x0C "T1CR3,Timer1 Capture Register 3"
|
|
endif
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "T1EMR,Timer1 External Match Register"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TIMER 2"
|
|
base sd:0xe0070000
|
|
width 0x8
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "T2IR,Timer2 Interrupt Register"
|
|
sif (cpuis("LPC23*"))
|
|
eventfld.byte 0x00 5. " CR1Interrupt ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 4. " CR0Interrupt ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " MR3Interrupt ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " MR2Interrupt ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " MR1Interrupt ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " MR0Interrupt ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
else
|
|
eventfld.byte 0x00 7. " CR3Interrupt ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 6. " CR2Interrupt ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 5. " CR1Interrupt ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 4. " CR0Interrupt ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " MR3Interrupt ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " MR2Interrupt ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " MR1Interrupt ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " MR0Interrupt ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
endif
|
|
width 8.
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "T2TCR,Timer2 Timer Control Register"
|
|
bitfld.byte 0x00 1. " CounterReset ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CounterEnable ,Counter Enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2468"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T2CTCR,Timer2 Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP2.0,CAP2.1,CAP2.2,CAP2.3"
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
else
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T2CTCR,Timer2 Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP2.0,CAP2.1,?..."
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
endif
|
|
group.long 0x08++0xb
|
|
line.long 0x00 "T2TC,Timer2 Timer Counter"
|
|
line.long 0x04 "T2PR,Timer2 Prescale Register"
|
|
line.long 0x08 "T2PC,Timer2 Prescale Counter"
|
|
width 0x8
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "T2MCR,Timer2 Match Control Register"
|
|
bitfld.word 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
group.long 0x18++0x0f
|
|
line.long 0x00 "T2MR0,Timer2 Match Register 0"
|
|
line.long 0x04 "T2MR1,Timer2 Match Register 1"
|
|
line.long 0x08 "T2MR2,Timer2 Match Register 2"
|
|
line.long 0x0C "T2MR3,Timer2 Match Register 3"
|
|
width 8.
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "T2CCR,Timer2 Capture Control Register"
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt on CAP2.1 event" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CAP1FE ,Capture on CAP2.1 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture on CAP2.1 rising edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt on CAP2.0 event" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture on CAP2.0 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture on CAP2.0 rising edge" "Disabled,Enabled"
|
|
sif (cpuis("LPC23*"))
|
|
rgroup.long 0x2C++0x07
|
|
line.long 0x00 "T2CR0,Timer2 Capture Register 0"
|
|
line.long 0x04 "T2CR1,Timer2 Capture Register 1"
|
|
else
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T2CR0,Timer2 Capture Register 0"
|
|
line.long 0x04 "T2CR1,Timer2 Capture Register 1"
|
|
line.long 0x08 "T2CR2,Timer2 Capture Register 2"
|
|
line.long 0x0C "T2CR3,Timer2 Capture Register 3"
|
|
endif
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "T2EMR,Timer2 External Match Register"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TIMER 3"
|
|
base sd:0xe0074000
|
|
width 0x8
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "T3IR,Timer3 Interrupt Register"
|
|
sif (cpuis("LPC23*"))
|
|
eventfld.byte 0x00 5. " CR1Interrupt ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 4. " CR0Interrupt ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " MR3Interrupt ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " MR2Interrupt ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " MR1Interrupt ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " MR0Interrupt ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
else
|
|
eventfld.byte 0x00 7. " CR3Interrupt ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 6. " CR2Interrupt ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 5. " CR1Interrupt ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 4. " CR0Interrupt ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " MR3Interrupt ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " MR2Interrupt ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " MR1Interrupt ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " MR0Interrupt ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
endif
|
|
width 8.
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "T3TCR,Timer3 Timer Control Register"
|
|
bitfld.byte 0x00 1. " CounterReset ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CounterEnable ,Counter Enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2468"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T3CTCR,Timer3 Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP3.0,CAP3.1,CAP3.2,CAP3.3"
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
else
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "T3CTCR,Timer3 Count Control Register"
|
|
bitfld.byte 0x00 2.--3. " CIS ,Counter Input Select" "CAP3.0,CAP3.1,?..."
|
|
bitfld.byte 0x00 0.--1. " CTM ,Counter/Timer Mode" "Every rising PCLK edge,Incremented on rising edge,Incremented on falling edge,Incremented on both edges"
|
|
endif
|
|
group.long 0x08++0xb
|
|
line.long 0x00 "T3TC,Timer3 Timer Counter"
|
|
line.long 0x04 "T3PR,Timer3 Prescale Register"
|
|
line.long 0x08 "T3PC,Timer3 Prescale Counter"
|
|
width 0x8
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "T3MCR,Timer3 Match Control Register"
|
|
bitfld.word 0x00 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
group.long 0x18++0x0f
|
|
line.long 0x00 "T3MR0,Timer3 Match Register 0"
|
|
line.long 0x04 "T3MR1,Timer3 Match Register 1"
|
|
line.long 0x08 "T3MR2,Timer3 Match Register 2"
|
|
line.long 0x0C "T3MR3,Timer3 Match Register 3"
|
|
width 8.
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "T3CCR,Timer3 Capture Control Register"
|
|
bitfld.word 0x00 5. " CAP1I ,Interrupt on CAP3.1 event" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CAP1FE ,Capture on CAP3.1 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " CAP1RE ,Capture on CAP3.1 rising edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CAP0I ,Interrupt on CAP3.0 event" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CAP0FE ,Capture on CAP3.0 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " CAP0RE ,Capture on CAP3.0 rising edge" "Disabled,Enabled"
|
|
sif (cpuis("LPC23*"))
|
|
rgroup.long 0x2C++0x07
|
|
line.long 0x00 "T3CR0,Timer3 Capture Register 0"
|
|
line.long 0x04 "T3CR1,Timer3 Capture Register 1"
|
|
else
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T3CR0,Timer3 Capture Register 0"
|
|
line.long 0x04 "T3CR1,Timer3 Capture Register 1"
|
|
line.long 0x08 "T3CR2,Timer3 Capture Register 2"
|
|
line.long 0x0C "T3CR3,Timer3 Capture Register 3"
|
|
endif
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "T3EMR,Timer3 External Match Register"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggled"
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
width 0x0B
|
|
tree.end
|
|
else
|
|
base 0xE0004000
|
|
tree "Timer 0"
|
|
width 0x07
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "T0IR,Timer0 Interrupt Register"
|
|
bitfld.byte 0x00 0. " MR0I ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " MR1I ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 2. " MR2I ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MR3I ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " CR0I ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " CR1I ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " CR2I ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 7. " CR3I ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred"
|
|
group.byte 0x4++0x0
|
|
line.byte 0x0 "T0TCR,Timer0 Timer Control Register"
|
|
bitfld.byte 0x0 0. " CE ,Counter Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " CR ,Counter Reset" "No reset,Reset"
|
|
group.long 0x8++0xb
|
|
line.long 0x0 "T0TC,Timer0 Timer Counter"
|
|
line.long 0x4 "T0PR,Timer0 Prescale Register"
|
|
line.long 0x8 "T0PC,Timer0 Prescale Counter"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "T0MCR,Timer0 Match Control Register"
|
|
bitfld.word 0x0 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x0 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x0 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x0 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
group.long 0x18++0x13
|
|
line.long 0x0 "T0MR0,Timer0 Match Register 0"
|
|
line.long 0x4 "T0MR1,Timer0 Match Register 1"
|
|
line.long 0x8 "T0MR2,Timer0 Match Register 2"
|
|
line.long 0xc "T0MR3,Timer0 Match Register 3"
|
|
line.word 0x10 "T0CCR,Timer0 Capture Control Register"
|
|
bitfld.word 0x10 0. " CAP0.0RE ,Capture on CAP0.0 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 1. " CAP0.0FE ,Capture on CAP0.0 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 2. " CAP0.0E ,Interrupt on CAP0.0 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x10 3. " CAP0.1RE ,Capture on CAP0.1 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 4. " CAP0.1FE ,Capture on CAP0.1 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 5. " CAP0.1E ,Interrupt on CAP0.1 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x10 6. " CAP0.2RE ,Capture on CAP0.2 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 7. " CAP0.2FE ,Capture on CAP0.2 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 8. " CAP0.2E ,Interrupt on CAP0.2 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x10 9. " CAP0.3RE ,Capture on CAP0.3 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 10. " CAP0.3FE ,Capture on CAP0.3 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 11. " CAP0.3E ,Interrupt on CAP0.3 event" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T0CR0,Timer0 Capture Register 0"
|
|
line.long 0x04 "T0CR1,Timer0 Capture Register 1"
|
|
line.long 0x08 "T0CR2,Timer0 Capture Register 2"
|
|
line.long 0x0C "T0CR3,Timer0 Capture Register 3"
|
|
group.long 0x3C++0x01
|
|
line.word 0x00 "T0EMR,Timer0 External Match Register"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggle"
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggle"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggle"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggle"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0008000
|
|
tree "Timer 1"
|
|
width 0x07
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "T1IR,Timer1 Interrupt Register"
|
|
bitfld.byte 0x00 0. " MR0I ,Interrupt flag for match channel 0" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " MR1I ,Interrupt flag for match channel 1" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 2. " MR2I ,Interrupt flag for match channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MR3I ,Interrupt flag for match channel 3" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " CR0I ,Interrupt flag for capture channel 0 event" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " CR1I ,Interrupt flag for capture channel 1 event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " CR2I ,Interrupt flag for capture channel 2 event" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 7. " CR3I ,Interrupt flag for capture channel 3 event" "Not occurred,Occurred"
|
|
group.byte 0x4++0x0
|
|
line.byte 0x0 "T1TCR,Timer1 Timer Control Register"
|
|
bitfld.byte 0x0 0. " CE ,Counter Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " CR ,Counter Reset" "No reset,Reset"
|
|
group.long 0x8++0xb
|
|
line.long 0x0 "T1TC,Timer1 Timer Counter"
|
|
line.long 0x4 "T1PR,Timer1 Prescale Register"
|
|
line.long 0x8 "T1PC,Timer1 Prescale Counter"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "T1MCR,Timer1 Match Control Register"
|
|
bitfld.word 0x0 0. " MR0I ,Interrupt on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x0 1. " MR0R ,Reset on MR0" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " MR0S ,Stop on MR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 3. " MR1I ,Interrupt on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x0 4. " MR1R ,Reset on MR1" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " MR1S ,Stop on MR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 6. " MR2I ,Interrupt on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x0 7. " MR2R ,Reset on MR2" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " MR2S ,Stop on MR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " MR3I ,Interrupt on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " MR3R ,Reset on MR3" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " MR3S ,Stop on MR3" "Disabled,Enabled"
|
|
group.long 0x18++0x13
|
|
line.long 0x0 "T1MR0,Timer1 Match Register 0"
|
|
line.long 0x4 "T1MR1,Timer1 Match Register 1"
|
|
line.long 0x8 "T1MR2,Timer1 Match Register 2"
|
|
line.long 0xc "T1MR3,Timer1 Match Register 3"
|
|
line.word 0x10 "T1CCR,Timer1 Capture Control Register"
|
|
bitfld.word 0x10 0. " CAP1.0RE ,Capture on CAP1.0 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 1. " CAP1.0FE ,Capture on CAP1.0 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 2. " CAP1.0E ,Interrupt on CAP1.0 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x10 3. " CAP1.1RE ,Capture on CAP1.1 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 4. " CAP1.1FE ,Capture on CAP1.1 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 5. " CAP1.1E ,Interrupt on CAP1.1 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x10 6. " CAP1.2RE ,Capture on CAP1.2 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 7. " CAP1.2FE ,Capture on CAP1.2 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 8. " CAP1.2E ,Interrupt on CAP1.2 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x10 9. " CAP1.3RE ,Capture on CAP1.3 rising edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 10. " CAP1.3FE ,Capture on CAP1.3 falling edge" "Disabled,Enabled"
|
|
bitfld.word 0x10 11. " CAP1.3E ,Interrupt on CAP1.3 event" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x00 "T1CR0,Timer1 Capture Register 0"
|
|
line.long 0x04 "T1CR1,Timer1 Capture Register 1"
|
|
line.long 0x08 "T1CR2,Timer1 Capture Register 2"
|
|
line.long 0x0C "T1CR3,Timer1 Capture Register 3"
|
|
group.long 0x3C++0x01
|
|
line.word 0x00 "T1EMR,Timer1 External Match Register"
|
|
bitfld.word 0x00 0. " EM0 ,External Match 0" "Low,High"
|
|
bitfld.word 0x00 1. " EM1 ,External Match 1" "Low,High"
|
|
bitfld.word 0x00 2. " EM2 ,External Match 2" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EM3 ,External Match 3" "Low,High"
|
|
bitfld.word 0x00 4.--5. " EMC0 ,External Match Control 0" "No operation,Cleared,Set,Toggle"
|
|
bitfld.word 0x00 6.--7. " EMC1 ,External Match Control 1" "No operation,Cleared,Set,Toggle"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " EMC2 ,External Match Control 2" "No operation,Cleared,Set,Toggle"
|
|
bitfld.word 0x00 10.--11. " EMC3 ,External Match Control 3" "No operation,Cleared,Set,Toggle"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; PWM
|
|
; --------------------------------------------------------------------------------
|
|
tree "PWM (Pulse Width Modulator)"
|
|
sif (cpuis("LPC23*"))
|
|
base 0xE0018000
|
|
width 0xA
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM1IR,PWM Interrupt Register"
|
|
eventfld.word 0x00 10. " PWMMR6Interrupt ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred"
|
|
eventfld.word 0x00 9. " PWMMR5Interrupt ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 8. " PWMMR4Interrupt ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred"
|
|
eventfld.word 0x00 5. " PWMCAP1Interrupt ,Interrupt flag for capture input 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 4. " PWMCAP0Interrupt ,Interrupt flag for capture input 0" "Not occurred,Occurred"
|
|
eventfld.word 0x00 3. " PWMMR3Interrupt ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 2. " PWMMR2Interrupt ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred"
|
|
eventfld.word 0x00 1. " PWMMR1Interrupt ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 0. " PWMMR0Interrupt ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred"
|
|
width 0xa
|
|
group.byte 0x4++0x0
|
|
line.byte 0x0 "PWM1TCR,PWM Timer Control Register"
|
|
bitfld.byte 0x0 3. " PWMEnable ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " CounterReset ,Counter Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " CounterEnable ,Counter Enable" "Disabled,Enabled"
|
|
width 0xa
|
|
group.long 0x8++0x23
|
|
line.long 0x0 "PWM1TC,PWM Timer Counter"
|
|
line.long 0x4 "PWM1PR,PWM Prescale Register"
|
|
line.long 0x8 "PWM1PC,PWM Prescale Counter"
|
|
line.long 0xC "PWM1MCR,PWM Match Control Register"
|
|
bitfld.long 0xC 20. " PWMMR6S ,Stop on PWMMR6" "Disabled,Enabled"
|
|
bitfld.long 0xC 19. " PWMMR6R ,Reset on PWMMR6" "Disabled,Enabled"
|
|
bitfld.long 0xC 18. " PWMMR6I ,Interrupt on PWMMR6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 17. " PWMMR5S ,Stop on PWMMR5" "Disabled,Enabled"
|
|
bitfld.long 0xC 16. " PWMMR5R ,Reset on PWMMR5" "Disabled,Enabled"
|
|
bitfld.long 0xC 15. " PWMMR5I ,Interrupt on PWMMR5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 14. " PWMMR4S ,Stop on PWMMR4" "Disabled,Enabled"
|
|
bitfld.long 0xC 13. " PWMMR4R ,Reset on PWMMR4" "Disabled,Enabled"
|
|
bitfld.long 0xC 12. " PWMMR4I ,Interrupt on PWMMR4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 11. " PWMMR3S ,Stop on PWMMR3" "Disabled,Enabled"
|
|
bitfld.long 0xC 10. " PWMMR3R ,Reset on PWMMR3" "Disabled,Enabled"
|
|
bitfld.long 0xC 9. " PWMMR3I ,Interrupt on PWMMR3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 8. " PWMMR2S ,Stop on PWMMR2" "Disabled,Enabled"
|
|
bitfld.long 0xC 7. " PWMMR2R ,Reset on PWMMR2" "Disabled,Enabled"
|
|
bitfld.long 0xC 6. " PWMMR2I ,Interrupt on PWMMR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 5. " PWMMR1S ,Stop on PWMMR1" "Disabled,Enabled"
|
|
bitfld.long 0xC 4. " PWMMR1R ,Reset on PWMMR1" "Disabled,Enabled"
|
|
bitfld.long 0xC 3. " PWMMR1I ,Interrupt on PWMMR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 2. " PWMMR0S ,Stop on PWMMR0" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " PWMMR0R ,Reset on PWMMR0" "Disabled,Enabled"
|
|
bitfld.long 0xC 0. " PWMMR0I ,Interrupt on PWMMR0" "Disabled,Enabled"
|
|
line.long 0x10 "PWM1MR0,PWM Match Register 0"
|
|
line.long 0x14 "PWM1MR1,PWM Match Register 1"
|
|
line.long 0x18 "PWM1MR2,PWM Match Register 2"
|
|
line.long 0x1C "PWM1MR3,PWM Match Register 3"
|
|
line.long 0x20 "PWM1CCR,PWM Capture Control Register"
|
|
bitfld.long 0x20 11. " IOCAP1.3E ,Interrupt on CAP1.3 event" "Disabled,Enabled"
|
|
bitfld.long 0x20 10. " COCAP1.3FE ,Capture on CAP1.3 falling edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 9. " COCAP1.3RE ,Capture on CAP1.3 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " IOCAP1.2E ,Interrupt on CAP1.2 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 7. " COCAP1.2FE ,Capture on CAP1.2 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x20 6. " COCAP1.2RE ,Capture on CAP1.2 rising edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 5. " IOCAP1.1E ,Interrupt on CAP1.1 event" "Disabled,Enabled"
|
|
bitfld.long 0x20 4. " COCAP1.1FE ,Capture on CAP1.1 falling edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 3. " COCAP1.1RE ,Capture on CAP1.1 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x20 2. " IOCAP1.0E ,Interrupt on CAP1.0 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 1. " COCAP1.0FE ,Capture on CAP1.0 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " COCAP1.0RE ,Capture on CAP1.0 rising edge" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0xF
|
|
line.long 0x0 "PWM1CR0,Capture Register 0"
|
|
line.long 0x4 "PWM1CR1,Capture Register 1"
|
|
line.long 0x8 "PWM1CR2,Capture Register 2"
|
|
line.long 0xC "PWM1CR3,Capture Register 3"
|
|
group.long 0x40--0x4F
|
|
line.long 0x0 "PWM1MR4,PWM Match Register 4"
|
|
line.long 0x4 "PWM1MR5,PWM Match Register 5"
|
|
line.long 0x8 "PWM1MR6,PWM Match Register 6"
|
|
line.long 0xc "PWM1PCR,PWM Control Register"
|
|
bitfld.long 0xc 14. " PWMENA6 ,PWM6 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 13. " PWMENA5 ,PWM5 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 12. " PWMENA4 ,PWM4 Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xc 11. " PWMENA3 ,PWM3 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 10. " PWMENA2 ,PWM2 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 9. " PWMENA1 ,PWM1 Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xc 6. " PWMSEL6 ,PWM6 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 5. " PWMSEL5 ,PWM5 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 4. " PWMSEL4 ,PWM4 Edge Controlled Mode" "Single,Double"
|
|
textline " "
|
|
bitfld.long 0xc 3. " PWMSEL3 ,PWM3 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 2. " PWMSEL2 ,PWM2 Edge Controlled Mode" "Single,Double"
|
|
group.byte 0x50--0x50
|
|
line.byte 0x0 "PWM1LER,PWM Latch Enable Register"
|
|
bitfld.byte 0x0 6. " PWMMLE6 ,Enable PWM Match 6 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 5. " PWMMLE5 ,Enable PWM Match 5 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " PWMMLE4 ,Enable PWM Match 4 Latch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " PWMMLE3 ,Enable PWM Match 3 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " PWMMLE2 ,Enable PWM Match 2 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " PWMMLE1 ,Enable PWM Match 1 Latch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " PWMMLE0 ,Enable PWM Match 0 Latch" "Disabled,Enabled"
|
|
width 0xa
|
|
group.byte 0x70++0x0
|
|
line.byte 0x0 "PWM1CTCR,PWM Count Control Register"
|
|
bitfld.byte 0x0 2.--3. " CIS ,Count Input Select" "PCAP1.0,CAP1.1,?..."
|
|
bitfld.byte 0x0 0.--1. " CTM ,Counter/Timer Mode" "Timer,Counter/rising,Counter/falling,Counter/both"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2420"||cpu()=="LPC2468"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
tree "PWM 0"
|
|
base 0xE0014000
|
|
width 0xA
|
|
if (0==1)
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM0IR,PWM Interrupt Register"
|
|
eventfld.word 0x00 10. " PWMMR6Interrupt ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred"
|
|
eventfld.word 0x00 9. " PWMMR5Interrupt ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 8. " PWMMR4Interrupt ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred"
|
|
eventfld.word 0x00 5. " PWMCAP1Interrupt ,Interrupt flag for capture input 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 4. " PWMCAP0Interrupt ,Interrupt flag for capture input 0" "Not occurred,Occurred"
|
|
eventfld.word 0x00 3. " PWMMR3Interrupt ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 2. " PWMMR2Interrupt ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred"
|
|
eventfld.word 0x00 1. " PWMMR1Interrupt ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 0. " PWMMR0Interrupt ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred"
|
|
else
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM0IR,PWM Interrupt Register"
|
|
eventfld.word 0x00 10. " PWMMR6Interrupt ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred"
|
|
eventfld.word 0x00 9. " PWMMR5Interrupt ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 8. " PWMMR4Interrupt ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred"
|
|
eventfld.word 0x00 4. " PWMCAP0Interrupt ,Interrupt flag for capture input 0" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 3. " PWMMR3Interrupt ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred"
|
|
eventfld.word 0x00 2. " PWMMR2Interrupt ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 1. " PWMMR1Interrupt ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred"
|
|
eventfld.word 0x00 0. " PWMMR0Interrupt ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred"
|
|
endif
|
|
group.byte 0x4++0x0
|
|
line.byte 0x0 "PWM0TCR,PWM Timer Control Register"
|
|
bitfld.byte 0x0 3. " PWMEnable ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " CounterReset ,Counter Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " CounterEnable ,Counter Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " MasterDisable ,Master Disable" "Enabled,Disabled"
|
|
width 0xa
|
|
group.long 0x8++0x23
|
|
line.long 0x0 "PWM0TC,PWM Timer Counter"
|
|
line.long 0x4 "PWM0PR,PWM Prescale Register"
|
|
line.long 0x8 "PWM0PC,PWM Prescale Counter"
|
|
line.long 0xC "PWM0MCR,PWM Match Control Register"
|
|
bitfld.long 0xC 20. " PWMMR6S ,Stop on PWMMR6" "Disabled,Enabled"
|
|
bitfld.long 0xC 19. " PWMMR6R ,Reset on PWMMR6" "Disabled,Enabled"
|
|
bitfld.long 0xC 18. " PWMMR6I ,Interrupt on PWMMR6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 17. " PWMMR5S ,Stop on PWMMR5" "Disabled,Enabled"
|
|
bitfld.long 0xC 16. " PWMMR5R ,Reset on PWMMR5" "Disabled,Enabled"
|
|
bitfld.long 0xC 15. " PWMMR5I ,Interrupt on PWMMR5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 14. " PWMMR4S ,Stop on PWMMR4" "Disabled,Enabled"
|
|
bitfld.long 0xC 13. " PWMMR4R ,Reset on PWMMR4" "Disabled,Enabled"
|
|
bitfld.long 0xC 12. " PWMMR4I ,Interrupt on PWMMR4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 11. " PWMMR3S ,Stop on PWMMR3" "Disabled,Enabled"
|
|
bitfld.long 0xC 10. " PWMMR3R ,Reset on PWMMR3" "Disabled,Enabled"
|
|
bitfld.long 0xC 9. " PWMMR3I ,Interrupt on PWMMR3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 8. " PWMMR2S ,Stop on PWMMR2" "Disabled,Enabled"
|
|
bitfld.long 0xC 7. " PWMMR2R ,Reset on PWMMR2" "Disabled,Enabled"
|
|
bitfld.long 0xC 6. " PWMMR2I ,Interrupt on PWMMR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 5. " PWMMR1S ,Stop on PWMMR1" "Disabled,Enabled"
|
|
bitfld.long 0xC 4. " PWMMR1R ,Reset on PWMMR1" "Disabled,Enabled"
|
|
bitfld.long 0xC 3. " PWMMR1I ,Interrupt on PWMMR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 2. " PWMMR0S ,Stop on PWMMR0" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " PWMMR0R ,Reset on PWMMR0" "Disabled,Enabled"
|
|
bitfld.long 0xC 0. " PWMMR0I ,Interrupt on PWMMR0" "Disabled,Enabled"
|
|
line.long 0x10 "PWM0MR0,PWM Match Register 0"
|
|
line.long 0x14 "PWM0MR1,PWM Match Register 1"
|
|
line.long 0x18 "PWM0MR2,PWM Match Register 2"
|
|
line.long 0x1C "PWM0MR3,PWM Match Register 3"
|
|
line.long 0x20 "PWM0CCR,PWM Capture Control Register"
|
|
bitfld.long 0x20 2. " IOPCAP0.0E ,Interrupt on PCAP0.0 event" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " COPCAP0.0FE ,Capture on PCAP0.0 falling edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 0. " COPCAP0.0RE ,Capture on PCAP0.0 rising edge" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x00 "PWM0CR0,Capture Register 0"
|
|
line.long 0x04 "PWM0CR1,Capture Register 1"
|
|
group.long 0x40--0x4F
|
|
line.long 0x0 "PWM0MR4,PWM Match Register 4"
|
|
line.long 0x4 "PWM0MR5,PWM Match Register 5"
|
|
line.long 0x8 "PWM0MR6,PWM Match Register 6"
|
|
line.long 0xc "PWM0PCR,PWM Control Register"
|
|
bitfld.long 0xc 14. " PWMENA6 ,PWM6 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 13. " PWMENA5 ,PWM5 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 12. " PWMENA4 ,PWM4 Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xc 11. " PWMENA3 ,PWM3 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 10. " PWMENA2 ,PWM2 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 9. " PWMENA1 ,PWM1 Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xc 6. " PWMSEL6 ,PWM6 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 5. " PWMSEL5 ,PWM5 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 4. " PWMSEL4 ,PWM4 Edge Controlled Mode" "Single,Double"
|
|
textline " "
|
|
bitfld.long 0xc 3. " PWMSEL3 ,PWM3 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 2. " PWMSEL2 ,PWM2 Edge Controlled Mode" "Single,Double"
|
|
group.byte 0x50--0x50
|
|
line.byte 0x0 "PWM0LER,PWM Latch Enable Register"
|
|
bitfld.byte 0x0 6. " PWMMLE6 ,Enable PWM Match 6 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 5. " PWMMLE5 ,Enable PWM Match 5 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " PWMMLE4 ,Enable PWM Match 4 Latch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " PWMMLE3 ,Enable PWM Match 3 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " PWMMLE2 ,Enable PWM Match 2 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " PWMMLE1 ,Enable PWM Match 1 Latch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " PWMMLE0 ,Enable PWM Match 0 Latch" "Disabled,Enabled"
|
|
width 0xa
|
|
group.byte 0x70++0x0
|
|
line.byte 0x0 "PWM0CTCR,PWM Count Control Register"
|
|
bitfld.byte 0x0 2.--3. " CIS ,Count Input Select" "PCAP1.0,?..."
|
|
bitfld.byte 0x0 0.--1. " CTM ,Counter/Timer Mode" "Timer,Counter/rising,Counter/falling,Counter/both"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PWM 1"
|
|
base 0xE0018000
|
|
width 0xA
|
|
if (1==1)
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM1IR,PWM Interrupt Register"
|
|
eventfld.word 0x00 10. " PWMMR6Interrupt ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred"
|
|
eventfld.word 0x00 9. " PWMMR5Interrupt ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 8. " PWMMR4Interrupt ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred"
|
|
eventfld.word 0x00 5. " PWMCAP1Interrupt ,Interrupt flag for capture input 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 4. " PWMCAP0Interrupt ,Interrupt flag for capture input 0" "Not occurred,Occurred"
|
|
eventfld.word 0x00 3. " PWMMR3Interrupt ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 2. " PWMMR2Interrupt ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred"
|
|
eventfld.word 0x00 1. " PWMMR1Interrupt ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 0. " PWMMR0Interrupt ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred"
|
|
else
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWM1IR,PWM Interrupt Register"
|
|
eventfld.word 0x00 10. " PWMMR6Interrupt ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred"
|
|
eventfld.word 0x00 9. " PWMMR5Interrupt ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 8. " PWMMR4Interrupt ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred"
|
|
eventfld.word 0x00 4. " PWMCAP0Interrupt ,Interrupt flag for capture input 0" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 3. " PWMMR3Interrupt ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred"
|
|
eventfld.word 0x00 2. " PWMMR2Interrupt ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x00 1. " PWMMR1Interrupt ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred"
|
|
eventfld.word 0x00 0. " PWMMR0Interrupt ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred"
|
|
endif
|
|
group.byte 0x4++0x0
|
|
line.byte 0x0 "PWM1TCR,PWM Timer Control Register"
|
|
bitfld.byte 0x0 3. " PWMEnable ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " CounterReset ,Counter Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " CounterEnable ,Counter Enable" "Disabled,Enabled"
|
|
width 0xa
|
|
group.long 0x8++0x23
|
|
line.long 0x0 "PWM1TC,PWM Timer Counter"
|
|
line.long 0x4 "PWM1PR,PWM Prescale Register"
|
|
line.long 0x8 "PWM1PC,PWM Prescale Counter"
|
|
line.long 0xC "PWM1MCR,PWM Match Control Register"
|
|
bitfld.long 0xC 20. " PWMMR6S ,Stop on PWMMR6" "Disabled,Enabled"
|
|
bitfld.long 0xC 19. " PWMMR6R ,Reset on PWMMR6" "Disabled,Enabled"
|
|
bitfld.long 0xC 18. " PWMMR6I ,Interrupt on PWMMR6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 17. " PWMMR5S ,Stop on PWMMR5" "Disabled,Enabled"
|
|
bitfld.long 0xC 16. " PWMMR5R ,Reset on PWMMR5" "Disabled,Enabled"
|
|
bitfld.long 0xC 15. " PWMMR5I ,Interrupt on PWMMR5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 14. " PWMMR4S ,Stop on PWMMR4" "Disabled,Enabled"
|
|
bitfld.long 0xC 13. " PWMMR4R ,Reset on PWMMR4" "Disabled,Enabled"
|
|
bitfld.long 0xC 12. " PWMMR4I ,Interrupt on PWMMR4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 11. " PWMMR3S ,Stop on PWMMR3" "Disabled,Enabled"
|
|
bitfld.long 0xC 10. " PWMMR3R ,Reset on PWMMR3" "Disabled,Enabled"
|
|
bitfld.long 0xC 9. " PWMMR3I ,Interrupt on PWMMR3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 8. " PWMMR2S ,Stop on PWMMR2" "Disabled,Enabled"
|
|
bitfld.long 0xC 7. " PWMMR2R ,Reset on PWMMR2" "Disabled,Enabled"
|
|
bitfld.long 0xC 6. " PWMMR2I ,Interrupt on PWMMR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 5. " PWMMR1S ,Stop on PWMMR1" "Disabled,Enabled"
|
|
bitfld.long 0xC 4. " PWMMR1R ,Reset on PWMMR1" "Disabled,Enabled"
|
|
bitfld.long 0xC 3. " PWMMR1I ,Interrupt on PWMMR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 2. " PWMMR0S ,Stop on PWMMR0" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " PWMMR0R ,Reset on PWMMR0" "Disabled,Enabled"
|
|
bitfld.long 0xC 0. " PWMMR0I ,Interrupt on PWMMR0" "Disabled,Enabled"
|
|
line.long 0x10 "PWM1MR0,PWM Match Register 0"
|
|
line.long 0x14 "PWM1MR1,PWM Match Register 1"
|
|
line.long 0x18 "PWM1MR2,PWM Match Register 2"
|
|
line.long 0x1C "PWM1MR3,PWM Match Register 3"
|
|
line.long 0x20 "PWM1CCR,PWM Capture Control Register"
|
|
bitfld.long 0x20 5. " IOPCAP1.1E ,Interrupt on PCAP1.1 event" "Disabled,Enabled"
|
|
bitfld.long 0x20 4. " COPCAP1.1FE ,Capture on PCAP1.1 falling edge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 3. " COPCAP1.1RE ,Capture on PCAP1.1 rising edge" "Disabled,Enabled"
|
|
bitfld.long 0x20 2. " IOPCAP1.0E ,Interrupt on PCAP1.0 event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 1. " COPCAP1.0FE ,Capture on PCAP1.0 falling edge" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " COPCAP1.0RE ,Capture on PCAP1.0 rising edge" "Disabled,Enabled"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "PWM1CR1,Capture Register 1"
|
|
group.long 0x40--0x4F
|
|
line.long 0x0 "PWM1MR4,PWM Match Register 4"
|
|
line.long 0x4 "PWM1MR5,PWM Match Register 5"
|
|
line.long 0x8 "PWM1MR6,PWM Match Register 6"
|
|
line.long 0xc "PWM1PCR,PWM Control Register"
|
|
bitfld.long 0xc 14. " PWMENA6 ,PWM6 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 13. " PWMENA5 ,PWM5 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 12. " PWMENA4 ,PWM4 Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xc 11. " PWMENA3 ,PWM3 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 10. " PWMENA2 ,PWM2 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xc 9. " PWMENA1 ,PWM1 Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xc 6. " PWMSEL6 ,PWM6 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 5. " PWMSEL5 ,PWM5 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 4. " PWMSEL4 ,PWM4 Edge Controlled Mode" "Single,Double"
|
|
textline " "
|
|
bitfld.long 0xc 3. " PWMSEL3 ,PWM3 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xc 2. " PWMSEL2 ,PWM2 Edge Controlled Mode" "Single,Double"
|
|
group.byte 0x50--0x50
|
|
line.byte 0x0 "PWM1LER,PWM Latch Enable Register"
|
|
bitfld.byte 0x0 6. " PWMMLE6 ,Enable PWM Match 6 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 5. " PWMMLE5 ,Enable PWM Match 5 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " PWMMLE4 ,Enable PWM Match 4 Latch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " PWMMLE3 ,Enable PWM Match 3 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " PWMMLE2 ,Enable PWM Match 2 Latch" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " PWMMLE1 ,Enable PWM Match 1 Latch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 0. " PWMMLE0 ,Enable PWM Match 0 Latch" "Disabled,Enabled"
|
|
width 0xa
|
|
group.byte 0x70++0x0
|
|
line.byte 0x0 "PWM1CTCR,PWM Count Control Register"
|
|
bitfld.byte 0x0 2.--3. " CIS ,Count Input Select" "PCAP1.0,PCAP1.1,?..."
|
|
bitfld.byte 0x0 0.--1. " CTM ,Counter/Timer Mode" "Timer,Counter/rising,Counter/falling,Counter/both"
|
|
width 0x0B
|
|
tree.end
|
|
elif (cpu()!="LPC2101"&&cpu()!="LPC2102"&&cpu()!="LPC2103"&&cpu()!="LPC2880"&&cpu()!="LPC2888")
|
|
base 0xE0014000
|
|
width 0x08
|
|
group.long 0x00++0x27
|
|
line.long 0x00 "PWMIR,PWM Interrupt Register"
|
|
bitfld.long 0x00 0. " PWMMR0I ,Interrupt Flag for PWM Match Channel 0" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " PWMMR1I ,Interrupt Flag for PWM Match Channel 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PWMMR2I ,Interrupt Flag for PWM Match Channel 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PWMMR3I ,Interrupt Flag for PWM Match Channel 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " PWMMR4I ,Interrupt Flag for PWM Match Channel 4" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " PWMMR5I ,Interrupt Flag for PWM Match Channel 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PWMMR6I ,Interrupt Flag for PWM Match Channel 6" "Not occurred,Occurred"
|
|
line.long 0x04 "PWMTCR,PWM Timer Control Register"
|
|
bitfld.long 0x04 0. " CE ,Counter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CR ,Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x04 3. " PWME ,PWM Enable" "Disabled,Enabled"
|
|
line.long 0x08 "PWMTC,PWM Timer Counter"
|
|
line.long 0x0C "PWMPR,PWM Prescale Register"
|
|
line.long 0x10 "PWMPC,PWM Prescale Counter"
|
|
line.long 0x14 "PWMMCR,PWM Match Control Register"
|
|
bitfld.long 0x14 0. " PWMMR0I ,Interrupt on PWMMR0" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " PWMMR0R ,Reset on PWMMR0" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " PWMMR0S ,Stop on PWMMR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 3. " PWMMR1I ,Interrupt on PWMMR1" "Disabled,Enabled"
|
|
bitfld.long 0x14 4. " PWMMR1R ,Reset on PWMMR1" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " PWMMR1S ,Stop on PWMMR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 6. " PWMMR2I ,Interrupt on PWMMR2" "Disabled,Enabled"
|
|
bitfld.long 0x14 7. " PWMMR2R ,Reset on PWMMR2" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " PWMMR2S ,Stop on PWMMR2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 9. " PWMMR3I ,Interrupt on PWMMR3" "Disabled,Enabled"
|
|
bitfld.long 0x14 10. " PWMMR3R ,Reset on PWMMR3" "Disabled,Enabled"
|
|
bitfld.long 0x14 11. " PWMMR3S ,Stop on PWMMR3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PWMMR4I ,Interrupt on PWMMR4" "Disabled,Enabled"
|
|
bitfld.long 0x14 13. " PWMMR4R ,Reset on PWMMR4" "Disabled,Enabled"
|
|
bitfld.long 0x14 14. " PWMMR4S ,Stop on PWMMR4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 15. " PWMMR5I ,Interrupt on PWMMR5" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " PWMMR5R ,Reset on PWMMR5" "Disabled,Enabled"
|
|
bitfld.long 0x14 17. " PWMMR5S ,Stop on PWMMR5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 18. " PWMMR6I ,Interrupt on PWMMR6" "Disabled,Enabled"
|
|
bitfld.long 0x14 19. " PWMMR6R ,Reset on PWMMR6" "Disabled,Enabled"
|
|
bitfld.long 0x14 20. " PWMMR6S ,Stop on PWMMR6" "Disabled,Enabled"
|
|
line.long 0x18 "PWMMR0,PWM Match Register 0"
|
|
line.long 0x1C "PWMMR1,PWM Match Register 1"
|
|
line.long 0x20 "PWMMR2,PWM Match Register 2"
|
|
line.long 0x24 "PWMMR3,PWM Match Register 3"
|
|
group.long 0x40++0x13
|
|
line.long 0x0 "PWMMR4,PWM Match Register 4"
|
|
line.long 0x4 "PWMMR5,PWM Match Register 5"
|
|
line.long 0x8 "PWMMR6,PWM Match Register 6"
|
|
line.long 0xC "PWMPCR,PWM Control Register"
|
|
bitfld.long 0xC 2. " PWMSEL2 ,PWM2 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xC 3. " PWMSEL3 ,PWM3 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xC 4. " PWMSEL4 ,PWM4 Edge Controlled Mode" "Single,Double"
|
|
textline " "
|
|
bitfld.long 0xC 5. " PWMSEL5 ,PWM5 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xC 6. " PWMSEL6 ,PWM6 Edge Controlled Mode" "Single,Double"
|
|
bitfld.long 0xC 9. " PWMENA1 ,PWM1 Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 10. " PWMENA2 ,PWM2 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 11. " PWMENA3 ,PWM3 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 12. " PWMENA4 ,PWM4 Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 13. " PWMENA5 ,PWM5 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 14. " PWMENA6 ,PWM6 Output Enable" "Disabled,Enabled"
|
|
line.long 0x10 "PWMLER,PWM Latch Enable Register"
|
|
bitfld.long 0x10 0. " PWMMLE0 ,Enable PWM Match 0 Latch" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " PWMMLE1 ,Enable PWM Match 1 Latch" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " PWMMLE2 ,Enable PWM Match 2 Latch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " PWMMLE3 ,Enable PWM Match 3 Latch" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " PWMMLE4 ,Enable PWM Match 4 Latch" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " PWMMLE5 ,Enable PWM Match 5 Latch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 6. " PWMMLE6 ,Enable PWM Match 6 Latch" "Disabled,Enabled"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; RTC
|
|
; --------------------------------------------------------------------------------
|
|
tree "RTC (Real Time Clock)"
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
width 0x09
|
|
base 0xE0024000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "ILR,Interrupt Location Register"
|
|
bitfld.byte 0x00 0. " RTCCIF ,RTC Counter Increment Interrupt" "Not occured,Occured"
|
|
bitfld.byte 0x00 1. " RTCALF ,RTC Alarm Register Interrupt" "Not occured,Occured"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "CTCR,Clock Tick Counter Register"
|
|
hexmask.word 0x00 0.--14. 1. " CTC ,Clock Tick Counter"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "CCR,Clock Control Register"
|
|
bitfld.byte 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2.--3. " CTTEST ,Test Enable" "00,01,10,11"
|
|
bitfld.byte 0x00 4. " CLKSRC ,Clock Source" "Prescaler,External"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "CIIR,Counter Increment Interrupt Register"
|
|
bitfld.byte 0x00 0. " IMSEC ,Second Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " IMMIN ,Minute Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IMHOUR ,Hour Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IMDOM ,Day of Month Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " IMDOW ,Day of Week Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " IMDOY ,Day of Year Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " IMMON ,Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " IMYEAR ,Year Value Increment Interrupt" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.byte 0x00 "AMR,Alarm Mask Register"
|
|
bitfld.long 0x00 0. " AMRSEC ,Second Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " AMRMIN ,Minutes Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 2. " AMRHOUR ,Hour Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 3. " AMRDOM ,Day of Month Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AMRDOW ,Day of Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 5. " AMRDOY ,Fay of Year Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " AMRMON ,Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 7. " AMRYEAR ,Year Value Alarm Comparison" "Enabled,Disabled"
|
|
if ((data.long(ad:0xE0024018)&0xF00)==0x200)
|
|
rgroup.long 0x14++0x0B
|
|
line.long 0x00 "CTIME0,Consolidated Time Register 0"
|
|
bitfld.long 0x00 24.--26. " DOW ,Day of week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
bitfld.long 0x00 16.--20. " HOUR ,Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
bitfld.long 0x00 8.--13. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
line.long 0x04 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x04 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x04 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x04 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
|
|
line.long 0x08 "CTIME2,Consolidated Time Register 2"
|
|
hexmask.long.word 0x08 0.--11. 1. " DOY ,Day of Year"
|
|
elif (((data.long(ad:0xE0024018)&0xF00)==0x400)||((data.long(ad:0xE0024018)&0xF00)==0x600)||((data.long(ad:0xE0024018)&0xF00)==0x900)||((data.long(ad:0xE0024018)&0xF00)==0xB00))
|
|
rgroup.long 0x14++0x0B
|
|
line.long 0x00 "CTIME0,Consolidated Time Register 0"
|
|
bitfld.long 0x00 24.--26. " DOW ,Day of week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
bitfld.long 0x00 16.--20. " HOUR ,Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
bitfld.long 0x00 8.--13. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
line.long 0x04 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x04 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x04 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x04 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
line.long 0x08 "CTIME2,Consolidated Time Register 2"
|
|
hexmask.long.word 0x08 0.--11. 1. " DOY ,Day of Year"
|
|
else
|
|
rgroup.long 0x14++0x0B
|
|
line.long 0x00 "CTIME0,Consolidated Time Register 0"
|
|
bitfld.long 0x00 24.--26. " DOW ,Day of week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
bitfld.long 0x00 16.--20. " HOUR ,Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
bitfld.long 0x00 8.--13. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
line.long 0x04 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x04 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x04 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x04 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "CTIME2,Consolidated Time Register 2"
|
|
hexmask.long.word 0x08 0.--11. 1. " DOY ,Day of Year"
|
|
endif
|
|
if ((data.long(ad:0xE0024038)&0xF)==0x02)
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "SEC,Seconds Register"
|
|
bitfld.byte 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "MIN,Minutes Register"
|
|
bitfld.byte 0x00 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "HOUR,Hours Register"
|
|
bitfld.byte 0x00 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DOW,Day of Week Register"
|
|
bitfld.byte 0x00 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "DOY,Day of Year Register"
|
|
hexmask.word 0x00 0.--8. 1. " DOY ,Day of Year"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "MONTH,Months Register"
|
|
bitfld.byte 0x00 0.--3. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x3c++0x01
|
|
line.word 0x00 "YEAR,Years Register"
|
|
hexmask.word 0x00 0.--11. 1. " YEAR ,Year"
|
|
elif (((data.long(ad:0xE0024038)&0xF)==0x04)||((data.long(ad:0xE0024038)&0xF)==0x06)||((data.long(ad:0xE0024038)&0xF)==0x09)||((data.long(ad:0xE0024038)&0xF)==0x0B))
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "SEC,Seconds Register"
|
|
bitfld.byte 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "MIN,Minutes Register"
|
|
bitfld.byte 0x00 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "HOUR,Hours Register"
|
|
bitfld.byte 0x00 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DOW,Day of Week Register"
|
|
bitfld.byte 0x00 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "DOY,Day of Year Register"
|
|
hexmask.word 0x00 0.--8. 1. " DOY ,Day of Year"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "MONTH,Months Register"
|
|
bitfld.byte 0x00 0.--3. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x3c++0x01
|
|
line.word 0x00 "YEAR,Years Register"
|
|
hexmask.word 0x00 0.--11. 1. " YEAR ,Year"
|
|
else
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "SEC,Seconds Register"
|
|
bitfld.byte 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "MIN,Minutes Register"
|
|
bitfld.byte 0x00 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "HOUR,Hours Register"
|
|
bitfld.byte 0x00 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DOW,Day of Week Register"
|
|
bitfld.byte 0x00 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "DOY,Day of Year Register"
|
|
hexmask.word 0x00 0.--8. 1. " DOY ,Day of Year"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "MONTH,Months Register"
|
|
bitfld.byte 0x00 0.--3. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x3c++0x01
|
|
line.word 0x00 "YEAR,Years Register"
|
|
hexmask.word 0x00 0.--11. 1. " YEAR ,Year"
|
|
endif
|
|
if ((data.long(ad:0xE0024078)&0xF)==0x02)
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "ALSEC,Alarm value for Seconds"
|
|
bitfld.byte 0x00 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "ALMIN,Alarm value for Minutes"
|
|
bitfld.byte 0x00 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "ALHOUR,Alarm value for Hours"
|
|
bitfld.byte 0x00 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "ALDOW,Alarm value for Day of Week"
|
|
bitfld.byte 0x00 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "ALDOY,Alarm value for Day of Year"
|
|
hexmask.word 0x00 0.--8. 1. " ALDOY ,Alarm Value for Day of Year"
|
|
group.byte 0x78++0x00
|
|
line.byte 0x00 "ALMON,Alarm value for Months"
|
|
bitfld.byte 0x00 0.--3. " ALMONTH ,Alarm Value for Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x7c++0x01
|
|
line.word 0x00 "ALYEAR,Alarm value for Year"
|
|
hexmask.word 0x00 0.--11. 1. " ALYEAR ,Alarm Value for Year"
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "PREINT,Prescale value, integer portion"
|
|
hexmask.word 0x00 0.--12. 1. " PI ,Prescaler Integer"
|
|
group.word 0x84++0x01
|
|
line.word 0x00 "PREFRAC,Prescale value, fractional portion"
|
|
hexmask.word 0x00 0.--14. 1. " PF ,Prescaler Fraction"
|
|
elif (((data.long(ad:0xE0024078)&0xF)==0x04)||((data.long(ad:0xE0024078)&0xF)==0x06)||((data.long(ad:0xE0024078)&0xF)==0x09)||((data.long(ad:0xE0024078)&0xF)==0x0B))
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "ALSEC,Alarm value for Seconds"
|
|
bitfld.byte 0x00 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "ALMIN,Alarm value for Minutes"
|
|
bitfld.byte 0x00 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "ALHOUR,Alarm value for Hours"
|
|
bitfld.byte 0x00 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "ALDOW,Alarm value for Day of Week"
|
|
bitfld.byte 0x00 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "ALDOY,Alarm value for Day of Year"
|
|
hexmask.word 0x00 0.--8. 1. " ALDOY ,Alarm Value for Day of Year"
|
|
group.byte 0x78++0x00
|
|
line.byte 0x00 "ALMON,Alarm value for Months"
|
|
bitfld.byte 0x00 0.--3. " ALMONTH ,Alarm Value for Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x7c++0x01
|
|
line.word 0x00 "ALYEAR,Alarm value for Year"
|
|
hexmask.word 0x00 0.--11. 1. " ALYEAR ,Alarm Value for Year"
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "PREINT,Prescale value, integer portion"
|
|
hexmask.word 0x00 0.--12. 1. " PI ,Prescaler Integer"
|
|
group.word 0x84++0x01
|
|
line.word 0x00 "PREFRAC,Prescale value, fractional portion"
|
|
hexmask.word 0x00 0.--14. 1. " PF ,Prescaler Fraction"
|
|
else
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "ALSEC,Alarm value for Seconds"
|
|
bitfld.byte 0x00 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "ALMIN,Alarm value for Minutes"
|
|
bitfld.byte 0x00 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "ALHOUR,Alarm value for Hours"
|
|
bitfld.byte 0x00 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "ALDOW,Alarm value for Day of Week"
|
|
bitfld.byte 0x00 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "ALDOY,Alarm value for Day of Year"
|
|
hexmask.word 0x00 0.--8. 1. " ALDOY ,Alarm Value for Day of Year"
|
|
group.byte 0x78++0x00
|
|
line.byte 0x00 "ALMON,Alarm value for Months"
|
|
bitfld.byte 0x00 0.--3. " ALMONTH ,Alarm Value for Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x7c++0x01
|
|
line.word 0x00 "ALYEAR,Alarm value for Year"
|
|
hexmask.word 0x00 0.--11. 1. " ALYEAR ,Alarm Value for Year"
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "PREINT,Prescale value, integer portion"
|
|
hexmask.word 0x00 0.--12. 1. " PI ,Prescaler Integer"
|
|
group.word 0x84++0x01
|
|
line.word 0x00 "PREFRAC,Prescale value, fractional portion"
|
|
hexmask.word 0x00 0.--14. 1. " PF ,Prescaler Fraction"
|
|
endif
|
|
width 0x0B
|
|
elif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
width 9.
|
|
base sd:0xe0024000
|
|
group.byte 0x00++0x0 "Miscellaneous Registers"
|
|
line.byte 0x00 "ILR,Interrupt Location Register"
|
|
bitfld.byte 0x00 1. " RTCALF ,Alarm Registers Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " RTCCIF ,Counter Increment Interrupt" "No interrupt,Interrupt"
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "CTC,Clock Tick Counter Register"
|
|
hexmask.word 0x00 0.--14. 1. " CTC ,Clock Tick Counter"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "CCR,Clock Control Register"
|
|
bitfld.byte 0x00 4. " CLKSRC ,Clock Source" "Prescaler,32 kHz oscillator"
|
|
bitfld.byte 0x00 2.--3. " CTTEST ,Test Enable" "00,01,11,11"
|
|
bitfld.byte 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "CIIR,Counter Increment Interrupt Register"
|
|
bitfld.byte 0x00 7. " IMYEAR ,Year Increment Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " IMMON ,Month Increment Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " IMDOY ,Day Of Year Increment Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " IMDOW ,Day Of Week Increment Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " IMDOM ,Day Of Month Increment Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " IMHOUR ,Hour Increment Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IMMIN ,Minutes Increment Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " IMSEC ,Second Increment Interrupt" "No interrupt,Interrupt"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "AMR,Alarm Mask Register"
|
|
bitfld.byte 0x00 7. " AMRYEAR ,Year Value Compared For Alarm" "Compared,Not compared"
|
|
bitfld.byte 0x00 6. " AMRMON ,Month Value Compared For Alarm" "Compared,Not compared"
|
|
bitfld.byte 0x00 5. " AMRDOY ,Day Of Year Value Compared For Alarm" "Compared,Not compared"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " AMRDOW ,Day Of Week Value Compared For Alarm" "Compared,Not compared"
|
|
bitfld.byte 0x00 3. " AMRDOM ,Day Of Month Value Compared For Alarm" "Compared,Not compared"
|
|
bitfld.byte 0x00 2. " AMRHOUR ,Hour Value Compared For Alarm" "Compared,Not compared"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " AMRMIN ,Minutes Value Compared For Alarm" "Compared,Not compared"
|
|
bitfld.byte 0x00 0. " AMRSEC ,Second Value Compared For Alarm" "Compared,Not compared"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "CTIME0,Consolidated Time Register 0"
|
|
bitfld.long 0x00 24.--26. " DOW ,Day Of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
bitfld.long 0x00 16.--20. " HOURS ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 8.--13. " MINUTES ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " SECONDS ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
if ((data.long(sd:0xe0024018)&0xf00)==0x200)
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x00 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x00 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x00 0.--4. " DOM ,Day Of Month" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(sd:0xE0024018)&0xF00)==0x400)||((data.long(sd:0xE0024018)&0xF00)==0x600)||((data.long(sd:0xE0024018)&0xF00)==0x900)||((data.long(sd:0xE0024018)&0xF00)==0xB00))
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x00 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x00 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x00 0.--4. " DOM ,Day Of Month" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x00 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x00 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x00 0.--4. " DOM ,Day Of Month" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "CTIME2,Consolidated Time Register 2"
|
|
hexmask.long.word 0x00 0.--11. 1. " DOY ,Day Of Year"
|
|
width 9.
|
|
group.byte 0x20++0x0 "Time Counters"
|
|
line.byte 0x00 "SEC,Seconds Register"
|
|
bitfld.byte 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x24++0x0
|
|
line.byte 0x0 "MIN,Minutes Register"
|
|
bitfld.byte 0x0 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x28++0x0
|
|
line.byte 0x0 "HOUR,Hours Register"
|
|
bitfld.byte 0x0 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
if ((data.long(sd:0xe0024038)&0xf)==0x02)
|
|
group.byte 0x2c++0x0
|
|
line.byte 0x0 "DOM,Day of Month Register"
|
|
bitfld.byte 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(sd:0xe0024038)&0xf)==0x04)||((data.long(sd:0xe0024038)&0xf)==0x06)||((data.long(sd:0xe0024038)&0xf)==0x09)||((data.long(sd:0xe0024038)&0xf)==0x0B))
|
|
group.byte 0x2c++0x0
|
|
line.byte 0x0 "DOM,Day of Month Register"
|
|
bitfld.byte 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
group.byte 0x2c++0x0
|
|
line.byte 0x0 "DOM,Day of Month Register"
|
|
bitfld.byte 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DOW,Day of Week Register"
|
|
bitfld.byte 0x0 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
group.word 0x34++0x1
|
|
line.word 0x0 "DOY,Day of Year Register"
|
|
hexmask.word 0x0 0.--8. 1. " DOY ,Day of Year"
|
|
group.byte 0x38++0x0
|
|
line.byte 0x0 "MONTH,Months Register"
|
|
bitfld.byte 0x0 0.--3. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "YEAR,Years Register"
|
|
hexmask.word 0x00 0.--11. 1. " YEAR ,Year"
|
|
width 9.
|
|
group.byte 0x60++0x0 "Alarm Registers"
|
|
line.byte 0x0 "ALSEC,Alarm value for Seconds"
|
|
bitfld.byte 0x0 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x64++0x0
|
|
line.byte 0x0 "ALMIN,Alarm value for Minutes"
|
|
bitfld.byte 0x0 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x68++0x0
|
|
line.byte 0x0 "ALHOUR,Alarm value for Hours"
|
|
bitfld.byte 0x0 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
if ((data.long(sd:0xE0024078)&0xF)==0x02)
|
|
group.byte 0x6c++0x0
|
|
line.byte 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(sd:0xE0024078)&0xF)==0x04)||((data.long(sd:0xE0024078)&0xF)==0x06)||((data.long(sd:0xE0024078)&0xF)==0x09)||((data.long(sd:0xE0024078)&0xF)==0x0B))
|
|
group.byte 0x6c++0x0
|
|
line.byte 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
group.byte 0x6c++0x0
|
|
line.byte 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.byte 0x70++0x0
|
|
line.byte 0x0 "ALDOW,Alarm value for Day of Week"
|
|
bitfld.byte 0x0 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
group.word 0x74++0x1
|
|
line.word 0x0 "ALDOY,Alarm value for Day of Year"
|
|
hexmask.word 0x0 0.--8. 1. " ALDOY ,Alarm Value for Day of Year"
|
|
group.word 0x78++0x1
|
|
line.byte 0x0 "ALMON,Alarm value for Months"
|
|
bitfld.byte 0x0 0.--3. " ALMONTH ,Alarm Value for Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x7c++0x1
|
|
line.word 0x0 "ALYEAR,Alarm value for Year"
|
|
hexmask.word 0x0 0.--11. 1. " ALYEAR ,Alarm Value for Year"
|
|
width 9.
|
|
group.word 0x80++0x1 "Reference Clock Divider"
|
|
line.word 0x0 "PREINT,Prescale value, integer portion"
|
|
hexmask.word 0x0 0.--12. 1. " PI ,Prescaler Integer"
|
|
group.word 0x84++0x1
|
|
line.word 0x0 "PREFRAC,Prescale value, fractional portion"
|
|
hexmask.word 0x0 0.--14. 1. " PF ,Prescaler Fraction"
|
|
width 0xb
|
|
elif (cpu()=="LPC2131"||cpu()=="LPC2131/01"||cpu()=="LPC2132"||cpu()=="LPC2132/01"||cpu()=="LPC2134"||cpu()=="LPC2134/01"||cpu()=="LPC2136"||cpu()=="LPC2136/01"||cpu()=="LPC2138"||cpu()=="LPC2138/01"||cpu()=="LPC2157"||cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
base 0xE0024000
|
|
width 0x09
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ILR,Interrupt Location Register"
|
|
bitfld.long 0x00 0. " RTCCIF ,RTC Counter Increment Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " RTCALF ,RTC Alarm Register Interrupt" "Not occurred,Occurred"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "CTC,Clock Tick Counter"
|
|
hexmask.long 0x00 0.--14. 1. " CTC ,Clock Tick Counter"
|
|
group.long 0x08++0x0B
|
|
line.long 0x00 "CCR,Clock Control Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset"
|
|
bitfld.long 0x00 2.--3. " CTTEST ,Test Enable" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLKSRC ,Clock Source" "Prescaler,32kHz oscillator"
|
|
line.long 0x04 "CIIR,Counter Increment Interrupt Register"
|
|
bitfld.long 0x04 0. " IMSEC ,Second Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " IMMIN ,Minute Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " IMHOUR ,Hour Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IMDOM ,Day of Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " IMDOW ,Day of Week Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " IMDOY ,Day of Year Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " IMMON ,Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " IMYEAR ,Year Value Increment Interrupt" "Disabled,Enabled"
|
|
line.long 0x08 "AMR,Alarm Mask Register"
|
|
bitfld.long 0x08 0. " AMRSEC ,Second Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " AMRMIN ,Minutes Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x08 2. " AMRHOUR ,Hour Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " AMRDOM ,Day of Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " AMRDOW ,Day of Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " AMRDOY ,Fay of Year Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " AMRMON ,Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x08 7. " AMRYEAR ,Year Value Alarm Comparison" "Enabled,Disabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "CTIME0,Consolidated Time Register 0"
|
|
bitfld.long 0x00 24.--26. " DOW ,Day of week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
bitfld.long 0x00 16.--20. " HOUR ,Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
bitfld.long 0x00 8.--13. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
if ((data.long(ad:0xE0024018)&0xF00)==0x200)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
|
|
elif (((data.long(ad:0xE0024018)&0xF00)==0x400)||((data.long(ad:0xE0024018)&0xF00)==0x600)||((data.long(ad:0xE0024018)&0xF00)==0x900)||((data.long(ad:0xE0024018)&0xF00)==0xB00))
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
else
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x0 "CTIME2,Consolidated Time Register 2"
|
|
hexmask.long.word 0x0 0.--11. 1. " DOY ,Day of Year"
|
|
group.long 0x20++0xB
|
|
line.long 0x00 "SEC,Seconds Register"
|
|
bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
line.long 0x04 "MIN,Minutes Register"
|
|
bitfld.long 0x04 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
line.long 0x08 "HOUR,Hours Register"
|
|
bitfld.long 0x08 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
if ((data.long(ad:0xE0024038)&0xF)==0x02)
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "DOM,Day of Month Register"
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
|
|
elif (((data.long(ad:0xE0024038)&0xF)==0x04)||((data.long(ad:0xE0024038)&0xF)==0x06)||((data.long(ad:0xE0024038)&0xF)==0x09)||((data.long(ad:0xE0024038)&0xF)==0x0B))
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "DOM,Day of Month Register"
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
else
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "DOM,Day of Month Register"
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "DOW,Day of Week Register"
|
|
bitfld.long 0x0 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
line.long 0x4 "DOY,Day of Year Register"
|
|
hexmask.long.word 0x4 0.--8. 1. " DOY ,Day of Year"
|
|
line.long 0x8 "MONTH,Months Register"
|
|
bitfld.long 0x8 0.--3. " MONTH ,Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
line.long 0xC "YEAR,Years Register"
|
|
hexmask.long.word 0xC 0.--11. 1. " YEAR ,Year"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "ALSEC,Alarm value for Seconds"
|
|
bitfld.long 0x0 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
line.long 0x04 "ALMIN,Alarm value for Minutes"
|
|
bitfld.long 0x04 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,?..."
|
|
line.long 0x08 "ALHOUR,Alarm value for Hours"
|
|
bitfld.long 0x08 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
if ((data.long(ad:0xE0024078)&0xF)==0x02)
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.long 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
|
|
elif (((data.long(ad:0xE0024078)&0xF)==0x04)||((data.long(ad:0xE0024078)&0xF)==0x06)||((data.long(ad:0xE0024078)&0xF)==0x09)||((data.long(ad:0xE0024078)&0xF)==0x0B))
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.long 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
else
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.long 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x70++0x17
|
|
line.long 0x0 "ALDOW,Alarm value for Day of Week"
|
|
bitfld.long 0x0 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,?..."
|
|
line.long 0x4 "ALDOY,Alarm value for Day of Year"
|
|
hexmask.long.word 0x4 0.--8. 1. " ALDOY ,Alarm Value for Day of Year"
|
|
line.long 0x8 "ALMON,Alarm value for Months"
|
|
bitfld.long 0x8 0.--3. " ALMONTH ,Alarm Value for Month" "Reserved,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
line.long 0xC "ALYEAR,Alarm value for Year"
|
|
hexmask.long.word 0xC 0.--11. 1. " ALYEAR ,Alarm Value for Year"
|
|
line.long 0x10 "PREINT,Prescale value, integer portion"
|
|
hexmask.long.word 0x10 0.--12. 1. " PI ,Prescaler Integer"
|
|
line.long 0x14 "PREFRAC,Prescale value, fractional portion"
|
|
hexmask.long.word 0x14 0.--14. 1. " PF ,Prescaler Fraction"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80005024
|
|
width 0x09
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RTC_CFG,RTC Configuration Register"
|
|
bitfld.long 0x00 0. " PWR_UP ,Read and write the RTC registers enable" "Disabled,Enabled"
|
|
base 0x80002000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "ILR,Interrupt Location Register"
|
|
bitfld.byte 0x00 0. " RTCCIF ,RTC Counter Increment Interrupt" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " RTCALF ,RTC Alarm Register Interrupt" "Not occurred,Occurred"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "CTCR,Clock Tick Counter Register"
|
|
hexmask.word 0x00 0.--14. 1. " CTC ,Clock Tick Counter"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "CCR,Clock Control Register"
|
|
bitfld.byte 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2.--3. " CTTEST ,Test Enable" "00,01,10,11"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "CIIR,Counter Increment Interrupt Register"
|
|
bitfld.byte 0x00 0. " IMSEC ,Second Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " IMMIN ,Minute Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IMHOUR ,Hour Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " IMDOM ,Day of Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " IMDOW ,Day of Week Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " IMDOY ,Day of Year Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " IMMON ,Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 7. " IMYEAR ,Year Value Increment Interrupt" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.byte 0x00 "AMR,Alarm Mask Register"
|
|
bitfld.long 0x00 0. " AMRSEC ,Second Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " AMRMIN ,Minutes Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 2. " AMRHOUR ,Hour Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AMRDOM ,Day of Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " AMRDOW ,Day of Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 5. " AMRDOY ,Fay of Year Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AMRMON ,Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x00 7. " AMRYEAR ,Year Value Alarm Comparison" "Enabled,Disabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "CTIME0,Consolidated Time Register 0"
|
|
bitfld.long 0x00 24.--26. " DOW ,Day of week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
bitfld.long 0x00 16.--20. " HOUR ,Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 8.--13. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
if ((data.long(D:(0x80002000+0x18))&0xF00)==0x200)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(D:(0x80002000+0x18))&0xF00)==0x400)||((data.long(D:(0x80002000+0x18))&0xF00)==0x600)||((data.long(D:(0x80002000+0x18))&0xF00)==0x900)||((data.long(D:(0x80002000+0x18))&0xF00)==0xB00))
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x0 "CTIME2,Consolidated Time Register 2"
|
|
hexmask.long.word 0x0 0.--11. 1. " DOY ,Day of Year"
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "SEC,Seconds Register"
|
|
bitfld.byte 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "MIN,Minutes Register"
|
|
bitfld.byte 0x00 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "HOUR,Hours Register"
|
|
bitfld.byte 0x00 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
if ((data.long(D:(0x80002000+0x38))&0xF)==0x02)
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(D:(0x80002000+0x38))&0xF)==0x04)||((data.long(D:(0x80002000+0x38))&0xF)==0x06)||((data.long(D:(0x80002000+0x38))&0xF)==0x09)||((data.long(D:(0x80002000+0x38))&0xF)==0x0B))
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DOW,Day of Week Register"
|
|
bitfld.byte 0x00 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "DOY,Day of Year Register"
|
|
hexmask.word 0x00 0.--8. 1. " DOY ,Day of Year"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "MONTH,Months Register"
|
|
bitfld.byte 0x00 0.--3. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x3c++0x01
|
|
line.word 0x00 "YEAR,Years Register"
|
|
hexmask.word 0x00 0.--11. 1. " YEAR ,Year"
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "ALSEC,Alarm value for Seconds"
|
|
bitfld.byte 0x00 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "ALMIN,Alarm value for Minutes"
|
|
bitfld.byte 0x00 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "ALHOUR,Alarm value for Hours"
|
|
bitfld.byte 0x00 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
if ((data.long(D:(0x80002000+0x78))&0xF)==0x02)
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(D:(0x80002000+0x78))&0xF)==0x04)||((data.long(D:(0x80002000+0x78))&0xF)==0x06)||((data.long(D:(0x80002000+0x78))&0xF)==0x09)||((data.long(D:(0x80002000+0x78))&0xF)==0x0B))
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "ALDOW,Alarm value for Day of Week"
|
|
bitfld.byte 0x00 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "ALDOY,Alarm value for Day of Year"
|
|
hexmask.word 0x00 0.--8. 1. " ALDOY ,Alarm Value for Day of Year"
|
|
group.byte 0x78++0x00
|
|
line.byte 0x00 "ALMON,Alarm value for Months"
|
|
bitfld.byte 0x00 0.--3. " ALMONTH ,Alarm Value for Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x7c++0x01
|
|
line.word 0x00 "ALYEAR,Alarm value for Year"
|
|
hexmask.word 0x00 0.--11. 1. " ALYEAR ,Alarm Value for Year"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||cpu()=="LPC2420"||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
base 0xE0024000
|
|
width 0x09
|
|
group.byte 0x00++0x00 "Miscellaneous Registers"
|
|
line.byte 0x00 "ILR,Interrupt Location Register"
|
|
eventfld.byte 0x0 2. " RTSSF ,Counter Increment Sub-Seconds interrupt is generated" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 1. " RTCALF ,RTC Alarm Register Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 0. " RTCCIF ,RTC Counter Increment Interrupt" "Not occurred,Occurred"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "CTCR,Clock Tick Counter Register"
|
|
hexmask.word 0x00 1.--15. 1. " CTC ,Clock Tick Counter"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "CCR,Clock Control Register"
|
|
sif (cpuis("LPC23*"))
|
|
bitfld.byte 0x00 4. " CLKSRC ,Clock Source" "Prescaler,External"
|
|
bitfld.byte 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.byte 0x00 4. " CLKSRC ,Clock Source" "Prescaler,External"
|
|
bitfld.byte 0x00 2.--3. " CTTEST ,Test Enable" "0,1,2,3"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "CIIR,Counter Increment Interrupt Register"
|
|
bitfld.byte 0x00 7. " IMYEAR ,Year Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " IMMON ,Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " IMDOY ,Day of Year Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " IMDOW ,Day of Week Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IMDOM ,Day of Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IMHOUR ,Hour Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IMMIN ,Minute Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IMSEC ,Second Value Increment Interrupt" "Disabled,Enabled"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "AMR,Alarm Mask Register"
|
|
bitfld.byte 0x00 7. " AMRYEAR ,Year Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.byte 0x00 6. " AMRMON ,Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.byte 0x00 5. " AMRDOY ,Day of Year Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " AMRDOW ,Day of Week Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.byte 0x00 3. " AMRDOM ,Day of Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.byte 0x00 2. " AMRHOUR ,Hour Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " AMRMIN ,Minutes Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.byte 0x00 0. " AMRSEC ,Second Value Alarm Comparison" "Enabled,Disabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "CTIME0,Consolidated Time Register 0"
|
|
bitfld.long 0x00 24.--26. " DOW ,Day of week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
bitfld.long 0x00 16.--20. " HOUR ,Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 8.--13. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
if ((data.long(D:(0xE0024000+0x18))&0xF00)==0x200)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(D:(0xE0024000+0x18))&0xF00)==0x400)||((data.long(D:(0xE0024000+0x18))&0xF00)==0x600)||((data.long(D:(0xE0024000+0x18))&0xF00)==0x900)||((data.long(D:(0xE0024000+0x18))&0xF00)==0xB00))
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x0 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x0 "CTIME2,Consolidated Time Register 2"
|
|
hexmask.long.word 0x0 0.--11. 1. " DOY ,Day of Year"
|
|
group.byte 0x40++0x0
|
|
line.byte 0x0 "CISS,Counter Increment select mask for Sub-Second interrupt Register"
|
|
bitfld.byte 0x0 7. " SubSecEna ,Subsecond interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0.--2. " SubSecSel ,SubSecSelSub-Second Select" "16 counts,32 counts,64 counts,128 counts,256 counts,512 counts,1024 counts,2048 counts"
|
|
group.byte 0x20++0x00 "Time Counter Registers"
|
|
line.byte 0x00 "SEC,Seconds Register"
|
|
bitfld.byte 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "MIN,Minutes Register"
|
|
bitfld.byte 0x00 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "HOUR,Hours Register"
|
|
bitfld.byte 0x00 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
if ((data.long(D:(0xE0024000+0x38))&0xF)==0x02)
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(D:(0xE0024000+0x38))&0xF)==0x04)||((data.long(D:(0xE0024000+0x38))&0xF)==0x06)||((data.long(D:(0xE0024000+0x38))&0xF)==0x09)||((data.long(D:(0xE0024000+0x38))&0xF)==0x0B))
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "DOM,Day of Month Register"
|
|
bitfld.byte 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "DOW,Day of Week Register"
|
|
bitfld.byte 0x00 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "DOY,Day of Year Register"
|
|
hexmask.word 0x00 0.--8. 1. " DOY ,Day of Year"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "MONTH,Months Register"
|
|
bitfld.byte 0x00 0.--3. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x3c++0x01
|
|
line.word 0x00 "YEAR,Years Register"
|
|
hexmask.word 0x00 0.--11. 1. " YEAR ,Year"
|
|
group.byte 0x60++0x00 "Alarm Registers"
|
|
line.byte 0x00 "ALSEC,Alarm value for Seconds"
|
|
bitfld.byte 0x00 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "ALMIN,Alarm value for Minutes"
|
|
bitfld.byte 0x00 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "ALHOUR,Alarm value for Hours"
|
|
bitfld.byte 0x00 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
if ((data.long(D:(0xE0024000+0x78))&0xF)==0x02)
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(D:(0xE0024000+0x78))&0xF)==0x04)||((data.long(D:(0xE0024000+0x78))&0xF)==0x06)||((data.long(D:(0xE0024000+0x78))&0xF)==0x09)||((data.long(D:(0xE0024000+0x78))&0xF)==0x0B))
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
group.byte 0x6c++0x00
|
|
line.byte 0x00 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x00 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "ALDOW,Alarm value for Day of Week"
|
|
bitfld.byte 0x00 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "ALDOY,Alarm value for Day of Year"
|
|
hexmask.word 0x00 0.--8. 1. " ALDOY ,Alarm Value for Day of Year"
|
|
group.byte 0x78++0x00
|
|
line.byte 0x00 "ALMON,Alarm value for Months"
|
|
bitfld.byte 0x00 0.--3. " ALMONTH ,Alarm Value for Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x7c++0x01
|
|
line.word 0x00 "ALYEAR,Alarm value for Year"
|
|
hexmask.word 0x00 0.--11. 1. " ALYEAR ,Alarm Value for Year"
|
|
group.word 0x80++0x01 "Reference Clock Divider Registers"
|
|
line.word 0x00 "PREINT,Prescaler value/integer portion Register"
|
|
hexmask.word 0x00 0.--12. 1. " PrescalerInteger ,Prescaler Integer"
|
|
group.word 0x84++0x01
|
|
line.word 0x00 "PREFRAC,Prescaler value/fractional portion Register"
|
|
hexmask.word 0x00 0.--14. 1. " PrescalerFraction ,Prescaler Fraction"
|
|
width 0x0B
|
|
else
|
|
width 0x09
|
|
base 0xE0024000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "ILR,Interrupt Location Register"
|
|
bitfld.byte 0x00 0. " RTCCIF ,RTC Counter Increment Interrupt" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " RTCALF ,RTC Alarm Register Interrupt" "Not occurred,Occurred"
|
|
sif (cpu()=="LPC2114"||cpu()=="LPC2124"||cpu()=="LPC2212"||cpu()=="LPC2214"||cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2294")
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "CTC,Clock Tick Counter"
|
|
hexmask.word 0x00 1.--15. 1. " CTC ,Clock Tick Counter"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "CCR,Clock Control Register"
|
|
bitfld.byte 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2.--3. " CTTEST ,Test Enable" "00,01,10,11"
|
|
else
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "CTC,Clock Tick Counter"
|
|
hexmask.word 0x00 0.--14. 1. " CTC ,Clock Tick Counter"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "CCR,Clock Control Register"
|
|
bitfld.byte 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CTCRST ,CTC Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2.--3. " CTTEST ,Test Enable" "00,01,10,11"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CLKSRC ,Clock Source" "Prescaler,External"
|
|
endif
|
|
group.byte 0xc++0x0
|
|
line.byte 0x0 "CIIR,Counter Increment Interrupt Register"
|
|
bitfld.byte 0x0 0. " IMSEC ,Second Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x0 1. " IMMIN ,Minute Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " IMHOUR ,Hour Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " IMDOM ,Day of Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " IMDOW ,Day of Week Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x0 5. " IMDOY ,Day of Year Value Increment Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 6. " IMMON ,Month Value Increment Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x0 7. " IMYEAR ,Year Value Increment Interrupt" "Disabled,Enabled"
|
|
group.byte 0x10++0x03
|
|
line.byte 0x0 "AMR,Alarm Mask Register"
|
|
bitfld.long 0x0 0. " AMRSEC ,Second Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x0 1. " AMRMIN ,Minutes Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x0 2. " AMRHOUR ,Hour Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " AMRDOM ,Day of Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x0 4. " AMRDOW ,Day of Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x0 5. " AMRDOY ,Fay of Year Value Alarm Comparison" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " AMRMON ,Month Value Alarm Comparison" "Enabled,Disabled"
|
|
bitfld.long 0x0 7. " AMRYEAR ,Year Value Alarm Comparison" "Enabled,Disabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "CTIME0,Consolidated Time Register 0"
|
|
bitfld.long 0x00 24.--26. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
bitfld.long 0x00 16.--20. " HOUR ,Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 8.--13. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
if ((data.long(ad:0xE0024018)&0xF00)==0x200)
|
|
rgroup.long 0x18++0x0B
|
|
line.long 0x00 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x00 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x00 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(ad:0xE0024018)&0xF00)==0x400)||((data.long(ad:0xE0024018)&0xF00)==0x600)||((data.long(ad:0xE0024018)&0xF00)==0x900)||((data.long(ad:0xE0024018)&0xF00)==0xB00))
|
|
rgroup.long 0x18++0x0B
|
|
line.long 0x00 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x00 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x00 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
rgroup.long 0x18++0x0B
|
|
line.long 0x00 "CTIME1,Consolidated Time Register 1"
|
|
hexmask.long.word 0x00 16.--27. 1. " YEAR ,Year"
|
|
bitfld.long 0x00 8.--11. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
bitfld.long 0x00 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "CTIME2,Consolidated Time Register 2"
|
|
hexmask.long.word 0x00 0.--11. 1. " DOY ,Day of Year"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "SEC,Seconds Register"
|
|
bitfld.byte 0x00 0.--5. " SEC ,Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x24++0x0
|
|
line.byte 0x0 "MIN,Minutes Register"
|
|
bitfld.byte 0x0 0.--5. " MIN ,Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x28++0x0
|
|
line.byte 0x0 "HOUR,Hours Register"
|
|
bitfld.byte 0x0 0.--4. " HOUR ,Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
if ((data.long(ad:0xE0024038)&0xF)==0x02)
|
|
group.byte 0x2c++0x0
|
|
line.byte 0x0 "DOM,Day of Month Register"
|
|
bitfld.byte 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
elif (((data.long(ad:0xE0024038)&0xF)==0x04)||((data.long(ad:0xE0024038)&0xF)==0x06)||((data.long(ad:0xE0024038)&0xF)==0x09)||((data.long(ad:0xE0024038)&0xF)==0x0B))
|
|
group.byte 0x2c++0x0
|
|
line.byte 0x0 "DOM,Day of Month Register"
|
|
bitfld.byte 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
group.byte 0x2c++0x0
|
|
line.byte 0x0 "DOM,Day of Month Register"
|
|
bitfld.byte 0x0 0.--4. " DOM ,Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "DOW,Day of Week Register"
|
|
bitfld.byte 0x0 0.--2. " DOW ,Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
group.word 0x34++0x1
|
|
line.word 0x0 "DOY,Day of Year Register"
|
|
hexmask.word 0x0 0.--8. 1. " DOY ,Day of Year"
|
|
group.byte 0x38++0x0
|
|
line.byte 0x0 "MONTH,Months Register"
|
|
bitfld.byte 0x0 0.--3. " MONTH ,Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "YEAR,Years Register"
|
|
hexmask.word 0x00 0.--11. 1. " YEAR ,Year"
|
|
group.byte 0x60++0x0
|
|
line.byte 0x0 "ALSEC,Alarm value for Seconds"
|
|
bitfld.byte 0x0 0.--5. " ALSEC ,Alarm Value for Seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x64++0x0
|
|
line.byte 0x0 "ALMIN,Alarm value for Minutes"
|
|
bitfld.byte 0x0 0.--5. " ALMIN ,Alarm Value for Minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,?..."
|
|
group.byte 0x68++0x0
|
|
line.byte 0x0 "ALHOUR,Alarm value for Hours"
|
|
bitfld.byte 0x0 0.--4. " ALHOUR ,Alarm Value for Hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,?..."
|
|
group.byte 0x6c++0x0
|
|
line.byte 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
group.byte 0x70++0x0
|
|
line.byte 0x0 "ALDOW,Alarm value for Day of Week"
|
|
bitfld.byte 0x0 0.--2. " ALDOW ,Alarm Value for Day of Week" "Sun,Mon,Tue,Wed,Thu,Fri,Sat,-"
|
|
if ((data.long(ad:0xE0024078)&0xF)==0x02)
|
|
group.word 0x74++0x1
|
|
line.word 0x0 "ALDOY,Alarm value for Day of Year"
|
|
hexmask.word 0x0 0.--8. 1. " ALDOY ,Alarm Value for Day of Year"
|
|
elif (((data.long(ad:0xE0024078)&0xF)==0x04)||((data.long(ad:0xE0024078)&0xF)==0x06)||((data.long(ad:0xE0024078)&0xF)==0x09)||((data.long(ad:0xE0024078)&0xF)==0x0B))
|
|
group.byte 0x68++0x0
|
|
line.byte 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
else
|
|
group.byte 0x6c++0x0
|
|
line.byte 0x0 "ALDOM,Alarm value for Day of Month"
|
|
bitfld.byte 0x0 0.--4. " ALDOM ,Alarm Value for Day of Month" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.word 0x78++0x1
|
|
line.byte 0x0 "ALMON,Alarm value for Months"
|
|
bitfld.byte 0x0 0.--3. " ALMONTH ,Alarm Value for Month" "-,Jan,Feb,Mar,Apr,May,Jun,Jul,Aug,Sep,Oct,Nov,Dec,?..."
|
|
group.word 0x7c++0x1
|
|
line.word 0x0 "ALYEAR,Alarm value for Year"
|
|
hexmask.word 0x0 0.--11. 1. " ALYEAR ,Alarm Value for Year"
|
|
group.word 0x80++0x1
|
|
line.word 0x0 "PREINT,Prescale value, integer portion"
|
|
hexmask.word 0x0 0.--12. 1. " PI ,Prescaler Integer"
|
|
group.word 0x84++0x1
|
|
line.word 0x0 "PREFRAC,Prescale value, fractional portion"
|
|
hexmask.word 0x0 0.--14. 1. " PF ,Prescaler Fraction"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; WATCHDOG
|
|
; --------------------------------------------------------------------------------
|
|
tree "Watchdog"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80002800
|
|
width 9.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "WDT_SR,Watchdog Status Register"
|
|
eventfld.long 0x00 0. " MR0_Match ,Match Register 0 match" "Not matched,Matched"
|
|
eventfld.long 0x00 1. " MR1_Match ,Match Register 1 match" "Not matched,Matched"
|
|
line.long 0x04 "WDT_TCR,Watchdog Timer Control Register"
|
|
bitfld.long 0x04 0. " Counter_En ,Prescale Counter and Timer Counter enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " Counter_Re ,Prescale Counter and Timer Counter clear" "Not Cleared,Cleared"
|
|
line.long 0x08 "WDT_TC,Watchdog Timer Counter Register"
|
|
line.long 0x0C "WDT_PR,Watchdog Prescale Register"
|
|
group.long 0x14++0x0B
|
|
line.long 0x00 "WDT_MCR,Watchdog Match Control Register"
|
|
bitfld.long 0x00 0. " EnMR0St ,Enable MR0 Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ReMR0M ,Reset on MR0 Match" "No reset,Reset"
|
|
bitfld.long 0x00 2. " StMR0M ,Stop on MR0 Match" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EnMR1St ,Enable MR1 Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ReMR1M ,Reset on MR1 Match" "No reset,Reset"
|
|
bitfld.long 0x00 5. " StMR1M ,Stop on MR1 Match" "Disabled,Enabled"
|
|
line.long 0x04 "WDT_MR0,Watchdog Match Register 0"
|
|
line.long 0x08 "WDT_MR1,Watchdog Match Register 1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "WDT_EMR,Watchdog External Match Register"
|
|
bitfld.long 0x00 0. " m0 ,State of the m0 reflection" "0,1"
|
|
bitfld.long 0x00 4.--5. " EnInter ,Enable Watchdog Interrupt function" "Disabled,Disabled,Enabled,?..."
|
|
bitfld.long 0x00 7. " EnReset ,Enable Watchdog Reset function" "Disabled,Enabled"
|
|
width 0x0B
|
|
elif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||cpu()=="LPC2420"||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
base sd:0xe0000000
|
|
width 0xA
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "WDMOD,Watchdog Mode Register"
|
|
bitfld.byte 0x00 3. " WDINT ,Watchdog Interrupt Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 2. " WDTOF ,Watchdog Time-out Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " WDRESET ,Watchdog Reset Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " WDEN ,Watchdog Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "WDTC,Watchdog Timer Constant Register"
|
|
wgroup.byte 0x08++0x0
|
|
line.byte 0x00 "WDFEED,Watchdog Feed Sequence Register"
|
|
rgroup.long 0x0c++0x3
|
|
line.long 0x00 "WDTV,Watchdog Timer Value Register"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "WDCLKSEL,Watchdog Timer clock source selection register"
|
|
bitfld.long 0x0 0.--1. " WDSEL ,Select the clock source for the Watchdog timer" "RC,PCLK,RTC,?..."
|
|
width 0x0B
|
|
elif (cpu()=="LPC2131"||cpu()=="LPC2131/01"||cpu()=="LPC2132"||cpu()=="LPC2132/01"||cpu()=="LPC2134"||cpu()=="LPC2134/01"||cpu()=="LPC2136"||cpu()=="LPC2136/01"||cpu()=="LPC2138"||cpu()=="LPC2138/01"||cpu()=="LPC2157"||(cpu()=="LPC2210")||(cpu()=="LPC2220"))
|
|
base sd:0xE0000000
|
|
width 0x09
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "WDMOD,Watchdog Mode Register"
|
|
bitfld.long 0x00 3. " WDINT ,Watchdog Interrupt Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " WDTOF ,Watchdog Time-out Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " WDRESET ,Watchdog Reset Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDEN ,Watchdog Interrupt Enable" "No effect,Enabled"
|
|
line.long 0x04 "WDTC,Watchdog Timer Constant Register"
|
|
hexmask.long 0x04 0.--31. 1. " COUNT ,Watchdog Time-Out Interval"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "WDFEED,Watchdog Feed Sequence Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FEED ,Feed Value"
|
|
rgroup.long 0x0C++0x3
|
|
line.long 0x00 "WDTV,Watchdog Timer Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter Timer Value"
|
|
width 0x0B
|
|
else
|
|
base sd:0xe0000000
|
|
width 0x09
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "WDMOD,Watchdog Mode Register"
|
|
bitfld.byte 0x00 3. " WDINT ,Watchdog Interrupt Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 2. " WDTOF ,Watchdog Time-out Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " WDRESET ,Watchdog Reset Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " WDEN ,Watchdog Interrupt Enable" "No effect,Enabled"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "WDTC,Watchdog Timer Constant Register"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Watchdog Time-Out Interval"
|
|
wgroup.byte 0x08++0x0
|
|
line.byte 0x00 "WDFEED,Watchdog Feed Sequence Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FEED ,Feed Value"
|
|
rgroup.long 0x0c++0x3
|
|
line.long 0x00 "WDTV,Watchdog Timer Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter Timer Value"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; PCB
|
|
; --------------------------------------------------------------------------------
|
|
tree "PCB (Pin Connect Block)"
|
|
sif (cpu()=="LPC2104"||cpu()=="LPC2105"||cpu()=="LPC2106")
|
|
width 0x09
|
|
base 0xE002C000
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PINSEL0,Pin function select register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TxD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RxD (UART0),PWM3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL0 (I2C),Capture 0.0 (TIMER0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA0 (I2C),Match 0.0 (TIMER0),?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK (SPI0),Capture 0.1 (TIMER0),?..."
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO (SPI0),Match 0.1 (TIMER0),?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI (SPI0),Capture 0.2 (TIMER0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL (SPI0),PWM2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TxD UART 1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RxD (UART1),PWM6,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,CD (UART1),EINT1,?..."
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,?..."
|
|
line.long 0x04 "PINSEL1,Pin function select register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (TIMER0),?..."
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (TIMER1),?..."
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (TIMER1),?..."
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,?..."
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--17. " P0.24 ,Pin 0.24 Function Select" "GPIO Port 0.24,?..."
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,?..."
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " P0.26 ,Pin 0.26 Function Select" "GPIO Port 0.26,?..."
|
|
bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,TRST,?..."
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,TMS,?..."
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,TCK,?..."
|
|
textline " "
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,TDI,?..."
|
|
bitfld.long 0x04 30.--31. " P0.31 ,Pin 0.31 Function Select" "GPIO Port 0.31,TDO,?..."
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2114"||cpu()=="LPC2124"||cpu()=="LPC2212"||cpu()=="LPC2214")
|
|
width 0x09
|
|
base 0xE002C000
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "PINSEL0,Pin function select register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TxD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RxD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL (I2C),Capture 0.0 (TIMER0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA (I2C),Match 0.0 (TIMER0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK (SPI0),Capture 0.1 (TIMER0),?..."
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO (SPI0),Match 0.1 (TIMER0),?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI (SPI0),Capture 0.2 (TIMER0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TxD UART1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RxD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,CD (UART1),EINT1,?..."
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,?..."
|
|
line.long 0x04 "PINSEL1,Pin function select register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (TIMER0),Capture 0.2 (TIMER0)"
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (TIMER1),SCK (SPI1),Match 1.2 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (TIMER1),MISO (SPI1),Match 1.3 (TIMER1)"
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (TIMER1),MOSI (SPI1),Match 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (TIMER1),SSEL (SPI1),EINT3"
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,Reserved,Capture 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,Reserved,Capture 0.0 (TIMER0),Match 0.0 (TIMER0)"
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--17. " P0.24 ,Pin 0.24 Function Select" "GPIO Port 0.24,?..."
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,?..."
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AIN0 (A/D Converter),Capture 0.1 (TIMER0),Match 0.1 (TIMER0)"
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AIN1 (A/D Converter),Capture 0.2 (TIMER0),Match 0.2 (TIMER0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AIN2 (A/D Converter),Capture 0.3 (TIMER0),Match 0.3 (TIMER0)"
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AIN3 (A/D Converter),EINT3,Capture 0.0 (TIMER0)"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PINSEL2,Pin function select register 2"
|
|
bitfld.long 0x00 2. " P1.36:26 ,Pins P1.36:26 Mode" "GPIO,Debug"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Mode" "GPIO,Trace"
|
|
sif (cpu()=="LPC2212"||cpu()=="LPC2214")
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " Bits4:5 ,Pin function select register 2 Bits 4:5" "00,01,10,11"
|
|
bitfld.long 0x00 6. " Bit6 ,Pin function select register 2 Bit 6" "P3.29,AIN6"
|
|
textline " "
|
|
bitfld.long 0x00 7. " Bit7 ,Pin function select register 2 Bit 7" "P3.28,AIN7"
|
|
bitfld.long 0x00 8. " Bit8 ,Pin function select register 2 Bit 8" "P3.27,WE"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Bit11 ,Pin function select register 2 Bit 11" "P3.26,CS1"
|
|
bitfld.long 0x00 13. " Bit13 ,Pin function select register 2 Bit 13" "P3.23,XCLK"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " Bits14:15 ,Pin function select register 2 Bits 14:15" "P3.25,CS2,?..."
|
|
bitfld.long 0x00 16.--17. " Bits16:17 ,Pin function select register 2 Bits 16:17" "P3.24,CS3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20. " Bit20 ,Pin function select register 2 Bit 20" "P2.29:28,?..."
|
|
bitfld.long 0x00 21. " Bit21 ,Pin function select register 2 Bit 21" "P2.30,AIN4"
|
|
textline " "
|
|
bitfld.long 0x00 22. " Bit22 ,Pin function select register 2 Bit 22" "P2.31,AIN5"
|
|
bitfld.long 0x00 23. " Bit23 ,Pin function select register 2 Bit 23" "Port pin,Address line"
|
|
textline " "
|
|
bitfld.long 0x00 24. " Bit24 ,Pin function select register 2 Bit 24" "Port pin,Address line"
|
|
bitfld.long 0x00 25.--27. " Bits25:27 ,Address lines" "None,A3:2 are address lines,A5:2 are address lines,A7:2 are address lines,A11:2 are address lines,A15:2 are address lines,A19:2 are address lines,A23:2 are address lines"
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2290"||cpu()=="LPC2292")
|
|
width 0x09
|
|
base 0xE002C000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TxD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RxD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL (I2C),Capture 0.0 (TIMER0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA (I2C),Match 0.0 (TIMER0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK (SPI0),Capture 0.1 (TIMER0),?..."
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO (SPI0),Match 0.1 (TIMER0),?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI (SPI0),Capture 0.2 (TIMER0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TxD UART1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RxD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,CD (UART1),EINT1,?..."
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x00 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (TIMER0),?..."
|
|
bitfld.long 0x00 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (TIMER1),SCK (SPI1),Match 1.2 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (TIMER1),MISO (SPI1),Match 1.3 (TIMER1)"
|
|
bitfld.long 0x00 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (TIMER1),MOSI (SPI1),Match 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (TIMER1),SSEL (SPI1),EINT3"
|
|
bitfld.long 0x00 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,Reserved,Capture 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,Reserved,Capture 0.0 (TIMER0),Match 0.0 (TIMER0)"
|
|
bitfld.long 0x00 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,RD2 (CAN Controller 2),?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.24 ,Pin 0.24 Function Select" "GPIO Port 0.24,TD2 (CAN Controller 2),?..."
|
|
bitfld.long 0x00 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,RD1 (CAN Controller 1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AIN0 (A/D Converter),Capture 0.1 (TIMER0),Match 0.1 (TIMER0)"
|
|
bitfld.long 0x00 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AIN1 (A/D Converter),Capture 0.2 (TIMER0),Match 0.2 (TIMER0)"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AIN2 (A/D Converter),Capture 0.3 (TIMER0),Match 0.3 (TIMER0)"
|
|
bitfld.long 0x00 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AIN3 (A/D Converter),EINT3,Capture 0.0 (TIMER0)"
|
|
sif (cpu()=="LPC2292")
|
|
group.long ad:0xE002C014++0x3
|
|
line.long 0x00 "PINSEL2,Pin function select register 2"
|
|
bitfld.long 0x00 2. " P1.36:26 ,Pins P1.36:26 Mode" "GPIO,Debug"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Mode" "GPIO,Trace"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " Bits4:5 ,Pin function select register 2 Bits 4:5" "00,01,10,11"
|
|
bitfld.long 0x00 6. " Bit6 ,Pin function select register 2 Bit 6" "P3.29,AIN6"
|
|
textline " "
|
|
bitfld.long 0x00 7. " Bit7 ,Pin function select register 2 Bit 7" "P3.28,AIN7"
|
|
bitfld.long 0x00 8. " Bit8 ,Pin function select register 2 Bit 8" "P3.27,WE"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Bit11 ,Pin function select register 2 Bit 11" "P3.26,CS1"
|
|
bitfld.long 0x00 13. " Bit13 ,Pin function select register 2 Bit 13" "P3.23,XCLK"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " Bits14:15 ,Pin function select register 2 Bits 14:15" "P3.25,CS2,?..."
|
|
bitfld.long 0x00 16.--17. " Bits16:17 ,Pin function select register 2 Bits 16:17" "P3.24,CS3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20. " Bit20 ,Pin function select register 2 Bit 20" "P2.29:28,?..."
|
|
bitfld.long 0x00 21. " Bit21 ,Pin function select register 2 Bit 21" "P2.30,AIN4"
|
|
textline " "
|
|
bitfld.long 0x00 22. " Bit22 ,Pin function select register 2 Bit 22" "P2.31,AIN5"
|
|
bitfld.long 0x00 23. " Bit23 ,Pin function select register 2 Bit 23" "Port pin,Address line"
|
|
textline " "
|
|
bitfld.long 0x00 24. " Bit24 ,Pin function select register 2 Bit 24" "Port pin,Address line"
|
|
bitfld.long 0x00 25.--27. " Bits25:27 ,Address lines" "None,A3:2 are address lines,A5:2 are address lines,A7:2 are address lines,A11:2 are address lines,A15:2 are address lines,A19:2 are address lines,A23:2 are address lines"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PINSEL2,Pin Function Select Register 2"
|
|
bitfld.long 0x00 2. " P1.36:26 ,Pins P1.36:26 Mode" "GPIO,Debug"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Mode" "GPIO,Trace"
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2131/01")
|
|
base 0xE002C000
|
|
width 0x09
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PINSEL0,Pin function select register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TXD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RXD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL0 (I2C0),Capture 0.0 (Timer 0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA0 (I2C0),Match 0.0 (Timer 0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK0 (SPI0),Capture 0.1 (Timer 0),AD0.6"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO0 (SPI0),Match 0.1 (Timer 0),AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI0 (SPI0),Capture 0.2 (Timer 0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL0 (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TXD UART1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RXD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,Reserved,Capture 1.0 (Timer 1),?..."
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,Reserved,Capture 1.1 (Timer 1),SCL1 (I2C1)"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,Reserved,Match 1.0 (Timer 1),?..."
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,Reserved,Match 1.1 (Timer 1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,Reserved,EINT1,SDA1 (I2C1)"
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,Reserved,EINT2,?..."
|
|
line.long 0x04 "PINSEL1,Pin function select register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (Timer 0),Capture 0.2 (Timer 0)"
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (Timer 1),SCK (SSP),Match 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (Timer 1),MISO (SSP),Match 1.3 (Timer 1)"
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (Timer 1),MOSI (SSP),Capture 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (Timer 1),SSEL (SSP),EINT3"
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,Reserved,Capture 1.3 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,Reserved,Capture 0.0 (Timer 0),Match 0.0 (Timer 0)"
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,?..."
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,AD0.4,?..."
|
|
bitfld.long 0x04 20.--21. " P0.26 ,Pin 0.26 Function Select" "GPIO Port 0.26,AD0.5,?..."
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AD0.0,Capture 0.1 (Timer 0),Match 0.1 (Timer 0)"
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AD0.1,Capture 0.2 (Timer 0),Match 0.2 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AD0.2,Capture 0.3 (Timer 0),Match 0.3 (Timer 0)"
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AD0.3,EINT3,Capture 0.0 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 30.--31. " P0.31 ,Pin 0.31 Function Select" "GPIO Port 0.31,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PINSEL2,Pin function select register 2"
|
|
bitfld.long 0x00 2. " P1.31:26 ,Pins P1.31:26 Function Select" "GPIO,Debug port"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Function Select" "GPIO,Trace port"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2132"||cpu()=="LPC2132/01")
|
|
base 0xE002C000
|
|
width 0x09
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PINSEL0,Pin function select register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TXD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RXD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL0 (I2C0),Capture 0.0 (Timer 0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA0 (I2C0),Match 0.0 (Timer 0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK0 (SPI0),Capture 0.1 (Timer 0),AD0.6"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO0 (SPI0),Match 0.1 (Timer 0),AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI0 (SPI0),Capture 0.2 (Timer 0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL0 (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TXD UART1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RXD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,Reserved,Capture 1.0 (Timer 1),?..."
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,Reserved,Capture 1.1 (Timer 1),SCL1 (I2C1)"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,Reserved,Match 1.0 (Timer 1),?..."
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,Reserved,Match 1.1 (Timer 1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,Reserved,EINT1,SDA1 (I2C1)"
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,Reserved,EINT2,?..."
|
|
line.long 0x04 "PINSEL1,Pin function select register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (Timer 0),Capture 0.2 (Timer 0)"
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (Timer 1),SCK (SSP),Match 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (Timer 1),MISO (SSP),Match 1.3 (Timer 1)"
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (Timer 1),MOSI (SSP),Capture 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (Timer 1),SSEL (SSP),EINT3"
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,Reserved,Capture 1.3 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,Reserved,Capture 0.0 (Timer 0),Match 0.0 (Timer 0)"
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,?..."
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,AD0.4,AOUT (DAC),?..."
|
|
bitfld.long 0x04 20.--21. " P0.26 ,Pin 0.26 Function Select" "GPIO Port 0.26,AD0.5,?..."
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AD0.0,Capture 0.1 (Timer 0),Match 0.1 (Timer 0)"
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AD0.1,Capture 0.2 (Timer 0),Match 0.2 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AD0.2,Capture 0.3 (Timer 0),Match 0.3 (Timer 0)"
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AD0.3,EINT3,Capture 0.0 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 30.--31. " P0.31 ,Pin 0.31 Function Select" "GPIO Port 0.31,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PINSEL2,Pin function select register 2"
|
|
bitfld.long 0x00 2. " P1.31:26 ,Pins P1.31:26 Function Select" "GPIO,Debug port"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Function Select" "GPIO,Trace port"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2134"||cpu()=="LPC2134/01"||cpu()=="LPC2136"||cpu()=="LPC2136/01"||cpu()=="LPC2138"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xE002C000
|
|
width 0x09
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PINSEL0,Pin function select register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TXD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RXD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL0 (I2C0),Capture 0.0 (Timer 0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA0 (I2C0),Match 0.0 (Timer 0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK0 (SPI0),Capture 0.1 (Timer 0),AD0.6"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO0 (SPI0),Match 0.1 (Timer 0),AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI0 (SPI0),Capture 0.2 (Timer 0),AD1.0"
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL0 (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TXD UART1,PWM4,AD1.1"
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RXD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (Timer 1),AD1.2"
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (Timer 1),SCL1 (I2C1)"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (Timer 1),AD1.3"
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (Timer 1),AD1.4"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,DCD (UART1),EINT1,SDA1 (I2C1)"
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,AD1.5"
|
|
line.long 0x04 "PINSEL1,Pin function select register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (Timer 0),Capture 0.2 (Timer 0)"
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (Timer 1),SCK (SSP),Match 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (Timer 1),MISO (SSP),Match 1.3 (Timer 1)"
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (Timer 1),MOSI (SSP),Capture 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (Timer 1),SSEL (SSP),EINT3"
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,AD1.6,Capture 1.3 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,AD1.7,Capture 0.0 (Timer 0),Match 0.0 (Timer 0)"
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,?..."
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,AD0.4,AOUT (DAC),?..."
|
|
bitfld.long 0x04 20.--21. " P0.26 ,Pin 0.26 Function Select" "GPIO Port 0.26,AD0.5,?..."
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AD0.0,Capture 0.1 (Timer 0),Match 0.1 (Timer 0)"
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AD0.1,Capture 0.2 (Timer 0),Match 0.2 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AD0.2,Capture 0.3 (Timer 0),Match 0.3 (Timer 0)"
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AD0.3,EINT3,Capture 0.0 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 30.--31. " P0.31 ,Pin 0.31 Function Select" "GPIO Port 0.31,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PINSEL2,Pin function select register 2"
|
|
bitfld.long 0x00 2. " P1.31:26 ,Pins P1.31:26 Function Select" "GPIO,Debug port"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Function Select" "GPIO,Trace port"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2194")
|
|
width 0x09
|
|
base 0xE002C000
|
|
group.long 0x000++0x7
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TxD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RxD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL (I2C),Capture 0.0 (TIMER0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA (I2C),Match 0.0 (TIMER0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK (SPI0),Capture 0.1 (TIMER0),?..."
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO (SPI0),Match 0.1 (TIMER0),?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI (SPI0),Capture 0.2 (TIMER0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TxD UART1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RxD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,CD (UART1),EINT1,?..."
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,?..."
|
|
line.long 0x04 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (TIMER0),Capture 0.2 (TIMER0)"
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (TIMER1),SCK (SPI1),Match 1.2 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (TIMER1),MISO (SPI1),Match 1.3 (TIMER1)"
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (TIMER1),MOSI (SPI1),Match 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (TIMER1),SSEL (SPI1),EINT3"
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,Reserved,Capture 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,Reserved,Capture 0.0 (TIMER0),Match 0.0 (TIMER0)"
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,RD2 (CAN Controller 2),?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--17. " P0.24 ,Pin 0.24 Function Select" "GPIO Port 0.24,TD2 (CAN Controller 2),?..."
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,RD1 (CAN Controller 1),?..."
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AIN0 (A/D Converter),Capture 0.1 (TIMER0),Match 0.1 (TIMER0)"
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AIN1 (A/D Converter),Capture 0.2 (TIMER0),Match 0.2 (TIMER0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AIN2 (A/D Converter),Capture 0.3 (TIMER0),Match 0.3 (TIMER0)"
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AIN3 (A/D Converter),EINT3,Capture 0.0 (TIMER0)"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "PINSEL2,Pin Function Select Register 2"
|
|
bitfld.long 0x0 2. " P1.36:26 ,Pins P1.36:26 Mode" "GPIO,Debug"
|
|
bitfld.long 0x0 3. " P1.25:16 ,Pins P1.25:16 Mode" "GPIO,Trace"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
width 0x09
|
|
group.long ad:0xE002C000++0x7
|
|
line.long 0x00 "PINSEL0,Pin function select register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TxD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RxD (UART0),PWM3,EINT0"
|
|
textline " "
|
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bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL (I2C),Capture 0.0 (TIMER0),?..."
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|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA (I2C),Match 0.0 (TIMER0),EINT1"
|
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textline " "
|
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bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK0 (SPI0),Capture 0.1 (TIMER0),?..."
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bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO0 (SPI0),Match 0.1 (TIMER0),?..."
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|
textline " "
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bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI0 (SPI0),Capture 0.2 (TIMER0),?..."
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bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL0 (SPI0),PWM2,EINT2"
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|
textline " "
|
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bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TxD UART1,PWM4,?..."
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|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RxD (UART1),PWM6,EINT3"
|
|
textline " "
|
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bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (TIMER1),?..."
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bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (TIMER1),?..."
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textline " "
|
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bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (TIMER1),?..."
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|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (TIMER1),?..."
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textline " "
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bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,CD (UART1),EINT1,?..."
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bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,?..."
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|
line.long 0x04 "PINSEL1,Pin function select register 1"
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|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (TIMER0),Capture 0.2 (TIMER0)"
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bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (TIMER1),SCK1 (SPI1),Match 1.2 (TIMER1)"
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textline " "
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bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (TIMER1),MISO1 (SPI1),Match 1.3 (TIMER1)"
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bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (TIMER1),MOSI1 (SPI1),Match 1.3 (TIMER1)"
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textline " "
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bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (TIMER1),SSEL (SPI1),EINT3"
|
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bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,Reserved,Match 1.3 (TIMER1)"
|
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textline " "
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bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,Reserved,Capture 0.0 (TIMER0),Match 0.0 (TIMER0)"
|
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bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,?..."
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textline " "
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bitfld.long 0x04 16.--17. " P0.24 ,Pin 0.24 Function Select" "GPIO Port 0.24,?..."
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bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,?..."
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textline " "
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bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AIN0 (A/D Converter),Capture 0.1 (TIMER0),Match 0.1 (TIMER0)"
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bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AIN1 (A/D Converter),Capture 0.2 (TIMER0),Match 0.2 (TIMER0)"
|
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textline " "
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bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AIN2 (A/D Converter),Capture 0.3 (TIMER0),Match 0.3 (TIMER0)"
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bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AIN3 (A/D Converter),EINT3,Capture 0.0 (TIMER0)"
|
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group.long ad:0xE002C014++0x3
|
|
line.long 0x00 "PINSEL2,Pin function select register 2"
|
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bitfld.long 0x00 2. " GPIO/DEBUG ,Pins P1.36:26 Mode" "GPIO pins,Debug port"
|
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bitfld.long 0x00 3. " GPIO/TRACE ,Pins P1.25:16 Mode" "GPIO pins,Trace port"
|
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textline " "
|
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bitfld.long 0x00 4.--5. " CTRLDBP ,Pin function select register 2 Bits 4:5" "00,01,10,11"
|
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bitfld.long 0x00 6. " CTRLP329 ,Pin 3.29 Function Select" "GPIO pin,ADC input 6"
|
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textline " "
|
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bitfld.long 0x00 7. " CTRLP328 ,Pin 3.28 Function Select" "GPIO pin,ADC input 7"
|
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bitfld.long 0x00 8. " CTRLP327 ,Pin 3.27 Function Select" "GPIO pin,Write enable"
|
|
textline " "
|
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bitfld.long 0x00 11. " CTRLP326 ,Pin 3.26 Function Select" "GPIO pin,CS1"
|
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bitfld.long 0x00 13. " CTRLP323 ,Pin 3.23/A23/XCLK Function Select" "GPIO pin,XCLK output"
|
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textline " "
|
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bitfld.long 0x00 14.--15. " CTRLP325 ,Pin 3.25 Function Select" "GPIO pin,CS2,?..."
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bitfld.long 0x00 16.--17. " CTRLP324 ,Pin 3.24 Function Select" "GPIO pin,CS3,?..."
|
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textline " "
|
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bitfld.long 0x00 20. " CTRLP229_28 ,Pins 2.29 and 2.28 Function Select" "GPIO pins,?..."
|
|
bitfld.long 0x00 21. " CTRLP230 ,Pin 2.30 Function Select" "GPIO pin,ADC input 4"
|
|
textline " "
|
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bitfld.long 0x00 22. " CTRLP231 ,Pin 2.31 Function Select" "GPIO pin,ADC input 5"
|
|
bitfld.long 0x00 23. " CTRLP300 ,Pin 2.30/A0 Function Select" "GPIO pin,Address line"
|
|
textline " "
|
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bitfld.long 0x00 24. " CTRLP301 ,Pin 3.1/A1 Function Select" "GPIO pin,Address line"
|
|
bitfld.long 0x00 25.--27. " CTRLAB ,Pins that are address line" "None,A3:2,A5:2,A7:2,A11:2,A15:2,A19:2,A23:2"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2294")
|
|
width 0x09
|
|
base 0xE002C000
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TxD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RxD (UART0),PWM3,EINT0"
|
|
textline " "
|
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bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL (I2C),Capture 0.0 (TIMER0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA (I2C),Match 0.0 (TIMER0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK (SPI0),Capture 0.1 (TIMER0),?..."
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO (SPI0),Match 0.1 (TIMER0),?..."
|
|
textline " "
|
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bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI (SPI0),Capture 0.2 (TIMER0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TxD UART1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RxD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (TIMER1),?..."
|
|
textline " "
|
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bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (TIMER1),RD4 (CAN Controller 4)"
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (TIMER1),TD4 (CAN Controller 4)"
|
|
textline " "
|
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bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,CD (UART1),EINT1,?..."
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,?..."
|
|
line.long 0x04 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (TIMER0),Capture 0.2 (TIMER0)"
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (TIMER1),SCK (SPI1),Match 1.2 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (TIMER1),MISO (SPI1),Match 1.3 (TIMER1)"
|
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bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (TIMER1),MOSI (SPI1),Match 1.3 (TIMER1)"
|
|
textline " "
|
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bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (TIMER1),SSEL (SPI1),EINT3"
|
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bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,RD3 (CAN Controller 3),Capture 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,TD3 (CAN Controller 3),Capture 0.0 (TIMER0),Match 0.0 (TIMER0)"
|
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bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,RD2 (CAN Controller 2),?..."
|
|
textline " "
|
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bitfld.long 0x04 16.--17. " P0.24 ,Pin 0.24 Function Select" "GPIO Port 0.24,TD2 (CAN Controller 2),?..."
|
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bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,RD1 (CAN Controller 1),?..."
|
|
textline " "
|
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bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AIN0 (A/D Converter),Capture 0.1 (TIMER0),Match 0.1 (TIMER0)"
|
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bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AIN1 (A/D Converter),Capture 0.2 (TIMER0),Match 0.2 (TIMER0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AIN2 (A/D Converter),Capture 0.3 (TIMER0),Match 0.3 (TIMER0)"
|
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bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AIN3 (A/D Converter),EINT3,Capture 0.0 (TIMER0)"
|
|
group.long 0x14++0x3
|
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line.long 0x00 "PINSEL2,Pin function select register 2"
|
|
bitfld.long 0x00 2. " P1.36:26 ,Pins P1.36:26 Mode" "GPIO,Debug"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Mode" "GPIO,Trace"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " Bits4:5 ,Pin function select register 2 Bits 4:5" "00,01,10,11"
|
|
bitfld.long 0x00 6. " Bit6 ,Pin function select register 2 Bit 6" "P3.29,AIN6"
|
|
textline " "
|
|
bitfld.long 0x00 7. " Bit7 ,Pin function select register 2 Bit 7" "P3.28,AIN7"
|
|
bitfld.long 0x00 8. " Bit8 ,Pin function select register 2 Bit 8" "P3.27,WE"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Bit11 ,Pin function select register 2 Bit 11" "P3.26,CS1"
|
|
bitfld.long 0x00 13. " Bit13 ,Pin function select register 2 Bit 13" "P3.23,XCLK"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " Bits14:15 ,Pin function select register 2 Bits 14:15" "P3.25,CS2,?..."
|
|
bitfld.long 0x00 16.--17. " Bits16:17 ,Pin function select register 2 Bits 16:17" "P3.24,CS3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20. " Bit20 ,Pin function select register 2 Bit 20" "P2.29:28,?..."
|
|
bitfld.long 0x00 21. " Bit21 ,Pin function select register 2 Bit 21" "P2.30,AIN4"
|
|
textline " "
|
|
bitfld.long 0x00 22. " Bit22 ,Pin function select register 2 Bit 22" "P2.31,AIN5"
|
|
bitfld.long 0x00 23. " Bit23 ,Pin function select register 2 Bit 23" "Port pin,Address line"
|
|
textline " "
|
|
bitfld.long 0x00 24. " Bit24 ,Pin function select register 2 Bit 24" "Port pin,Address line"
|
|
bitfld.long 0x00 25.--27. " Bits25:27 ,Address lines" "None,A3:2 are address lines,A5:2 are address lines,A7:2 are address lines,A11:2 are address lines,A15:2 are address lines,A19:2 are address lines,A23:2 are address lines"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2141")
|
|
width 0x0A
|
|
base 0xE002C000
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TxD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RxD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL (I2C),Capture 0.0 (TIMER0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA (I2C),Match 0.0 (TIMER0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK (SPI0),Capture 0.1 (TIMER0),?..."
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO (SPI0),Match 0.1 (TIMER0),?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI (SPI0),Capture 0.2 (TIMER0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TxD UART1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RxD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (TIMER1),?..."
|
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bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (TIMER1),?..."
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (TIMER1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,CD (UART1),EINT1,?..."
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,?..."
|
|
line.long 0x04 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (TIMER0),?..."
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (TIMER1),SCK (SPI1),Match 1.2 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (TIMER1),MISO (SPI1),Match 1.3 (TIMER1)"
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (TIMER1),MOSI (SPI1),Match 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (TIMER1),SSEL (SPI1),EINT3"
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,Reserved,Capture 1.3 (TIMER1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,Reserved,Capture 0.0 (TIMER0),Match 0.0 (TIMER0)"
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,RD2 (CAN Controller 2),?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--17. " P0.24 ,Pin 0.24 Function Select" "GPIO Port 0.24,TD2 (CAN Controller 2),?..."
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,RD1 (CAN Controller 1),?..."
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " P0.27 ,Pin 0.27 Function Select" "GPIO Port 0.27,AIN0 (A/D Converter),Capture 0.1 (TIMER0),Match 0.1 (TIMER0)"
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AIN1 (A/D Converter),Capture 0.2 (TIMER0),Match 0.2 (TIMER0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AIN2 (A/D Converter),Capture 0.3 (TIMER0),Match 0.3 (TIMER0)"
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AIN3 (A/D Converter),EINT3,Capture 0.0 (TIMER0)"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "PINSEL2,Pin Function Select Register 2"
|
|
bitfld.long 0x0 2. " P1.36:26 ,Pins P1.36:26 Mode" "GPIO,Debug"
|
|
bitfld.long 0x0 3. " P1.25:16 ,Pins P1.25:16 Mode" "GPIO,Trace"
|
|
textline " "
|
|
bitfld.long 0x0 4.--5. " Bits4:5 ,Pin function select register 2 Bits 4:5" "00,01,10,11"
|
|
bitfld.long 0x0 6. " Bit6 ,Pin function select register 2 Bit 6" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " Bit7 ,Pin function select register 2 Bit 7" "0,1"
|
|
bitfld.long 0x0 8. " Bit8 ,Pin function select register 2 Bit 8" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 11. " Bit11 ,Pin function select register 2 Bit 11" "0,1"
|
|
bitfld.long 0x0 13. " Bit13 ,Pin function select register 2 Bit 13" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " Bits14:15 ,Pin function select register 2 Bits 14:15" "00,01,10,11"
|
|
bitfld.long 0x0 16.--17. " Bits16:17 ,Pin function select register 2 Bits 16:17" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x0 20. " Bit20 ,Pin function select register 2 Bit 20" "0,1"
|
|
bitfld.long 0x0 21. " Bit21 ,Pin function select register 2 Bit 21" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 22. " Bit22 ,Pin function select register 2 Bit 22" "0,1"
|
|
bitfld.long 0x0 23. " Bit23 ,Pin function select register 2 Bit 23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 24. " Bit24 ,Pin function select register 2 Bit 24" "0,1"
|
|
bitfld.long 0x0 25.--27. " Bits25:27 ,Pin function select register 2 Bits 25:27" "000,001,010,011,100,101,110,111"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2142")
|
|
;This file is only for LPC2142
|
|
width 0x9
|
|
base 0xE002C000
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TXD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RXD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL0 (I2C0),Capture 0.0 (Timer 0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA0 (I2C0),Match 0.0 (Timer 0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK0 (SPI0),Capture 0.1 (Timer 0),AD0.6"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO0 (SPI0),Match 0.1 (Timer 0),AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI0 (SPI0),Capture 0.2 (Timer 0),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL0 (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TXD UART1,PWM4,?..."
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RXD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,Reserved,Capture 1.0 (Timer 1),?..."
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,Reserved,Capture 1.1 (Timer 1),SCL1 (I2C1)"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,Reserved,Match 1.0 (Timer 1),?..."
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,Reserved,Match 1.1 (Timer 1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,Reserved,EINT1,SDA1 (I2C1)"
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,Reserved,EINT2,?..."
|
|
line.long 0x04 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (Timer 0),Capture 0.2 (Timer 0)"
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (Timer 1),SCK1 (SSP),Match 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (Timer 1),MISO1 (SSP),Match 1.3 (Timer 1)"
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (Timer 1),MOSI1 (SSP),Capture 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (Timer 1),SSEL1 (SSP),EINT3"
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,Reserved,Capture 1.3 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,Reserved,Capture 0.0 (Timer 0),Match 0.0 (Timer 0)"
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,Vbus,?..."
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,AD0.4,AOUT(DAC),?..."
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AD0.1,Capture 0.2 (Timer 0),Match 0.2 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AD0.2,Capture 0.3 (Timer 0),Match 0.3 (Timer 0)"
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AD0.3,EINT3,Capture 0.0 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 30.--31. " P0.31 ,Pin 0.31 Function Select" "GPO Port only,Up_Led,Connect,?..."
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "PINSEL2,Pin function select register 2"
|
|
bitfld.long 0x00 2. " P1.31:26 ,Pins P1.31:26 Function Select" "GPIO,Debug port"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Function Select" "GPIO,Trace port"
|
|
width 0x10
|
|
endif
|
|
sif (cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
;This file is only for LPC2144/6/8
|
|
width 0x9
|
|
base 0xE002C000
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0.0 Function Select" "GPIO Port 0.0,TXD (UART0),PWM1,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 0.1 Function Select" "GPIO Port 0.1,RXD (UART0),PWM3,EINT0"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 0.2 Function Select" "GPIO Port 0.2,SCL0 (I2C0),Capture 0.0 (Timer 0),?..."
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 0.3 Function Select" "GPIO Port 0.3,SDA0 (I2C0),Match 0.0 (Timer 0),EINT1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 0.4 Function Select" "GPIO Port 0.4,SCK0 (SPI0),Capture 0.1 (Timer 0),AD0.6"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 0.5 Function Select" "GPIO Port 0.5,MISO0 (SPI0),Match 0.1 (Timer 0),AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 0.6 Function Select" "GPIO Port 0.6,MOSI0 (SPI0),Capture 0.2 (Timer 0),AD1.0"
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 0.7 Function Select" "GPIO Port 0.7,SSEL0 (SPI0),PWM2,EINT2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 0.8 Function Select" "GPIO Port 0.8,TXD UART1,PWM4,AD1.1"
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 0.9 Function Select" "GPIO Port 0.9,RXD (UART1),PWM6,EINT3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 0.10 Function Select" "GPIO Port 0.10,RTS (UART1),Capture 1.0 (Timer 1),AD1.2"
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 0.11 Function Select" "GPIO Port 0.11,CTS (UART1),Capture 1.1 (Timer 1),SCL1 (I2C1)"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 0.12 Function Select" "GPIO Port 0.12,DSR (UART1),Match 1.0 (Timer 1),AD1.3"
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 0.13 Function Select" "GPIO Port 0.13,DTR (UART1),Match 1.1 (Timer 1),AD1.4"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 0.14 Function Select" "GPIO Port 0.14,DCD (UART1),EINT1,SDA1 (I2C1)"
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 0.15 Function Select" "GPIO Port 0.15,RI (UART1),EINT2,AD1.5"
|
|
line.long 0x04 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x04 0.--1. " P0.16 ,Pin 0.16 Function Select" "GPIO Port 0.16,EINT0,Match 0.2 (Timer 0),Capture 0.2 (Timer 0)"
|
|
bitfld.long 0x04 2.--3. " P0.17 ,Pin 0.17 Function Select" "GPIO Port 0.17,Capture 1.2 (Timer 1),SCK1 (SSP),Match 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " P0.18 ,Pin 0.18 Function Select" "GPIO Port 0.18,Capture 1.3 (Timer 1),MISO1 (SSP),Match 1.3 (Timer 1)"
|
|
bitfld.long 0x04 6.--7. " P0.19 ,Pin 0.19 Function Select" "GPIO Port 0.19,Match 1.2 (Timer 1),MOSI1 (SSP),Capture 1.2 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " P0.20 ,Pin 0.20 Function Select" "GPIO Port 0.20,Match 1.3 (Timer 1),SSEL1 (SSP),EINT3"
|
|
bitfld.long 0x04 10.--11. " P0.21 ,Pin 0.21 Function Select" "GPIO Port 0.21,PWM5,AD1.6,Capture 1.3 (Timer 1)"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P0.22 ,Pin 0.22 Function Select" "GPIO Port 0.22,AD1.7,Capture 0.0 (Timer 0),Match 0.0 (Timer 0)"
|
|
bitfld.long 0x04 14.--15. " P0.23 ,Pin 0.23 Function Select" "GPIO Port 0.23,Vbus,?..."
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " P0.25 ,Pin 0.25 Function Select" "GPIO Port 0.25,AD0.4,AOUT (DAC),?..."
|
|
bitfld.long 0x04 24.--25. " P0.28 ,Pin 0.28 Function Select" "GPIO Port 0.28,AD0.1,Capture 0.2 (Timer 0),Match 0.2 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " P0.29 ,Pin 0.29 Function Select" "GPIO Port 0.29,AD0.2,Capture 0.3 (Timer 0),Match 0.3 (Timer 0)"
|
|
bitfld.long 0x04 28.--29. " P0.30 ,Pin 0.30 Function Select" "GPIO Port 0.30,AD0.3,EINT3,Capture 0.0 (Timer 0)"
|
|
textline " "
|
|
bitfld.long 0x04 30.--31. " P0.31 ,Pin 0.31 Function Select" "GPO Port only,Up_Led,Connect,?..."
|
|
group.long 0x014++0x03
|
|
line.long 0x00 "PINSEL2,Pin function select register 2"
|
|
bitfld.long 0x00 2. " P1.31:26 ,Pins P1.31:26 Function Select" "GPIO,Debug port"
|
|
bitfld.long 0x00 3. " P1.25:16 ,Pins P1.25:16 Function Select" "GPIO,Trace port"
|
|
width 0x10
|
|
endif
|
|
sif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
width 0x09
|
|
base sd:0xE002C000
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Pin 15 Function" "GPIO0.15,EINT2,Reserved,RI1(UART1)"
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Pin 14 Function" "GPIO0.14,EINT1,SCK1(SSP1),DCD1(UART1)"
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Pin 13 Function" "GPIO0.13,Reserved,MAT1.1(Timer1),DTR1(UART1)"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Pin 12 Function" "GPIO0.12,DSR1(UART1),MAT1.0(Timer0),AD0.5"
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Pin 11 Function" "GPIO0.11,CTS1(UART1),CAP1.1(Timer1),AD0.4"
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Pin 10 Function" "GPIO0.10,RTS1(UART1),CAP1.0(Timer1),AD0.3"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Pin 9 Function" "GPIO0.9,RXD1(UART1),MAT2.2(Timer2),?..."
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Pin 8 Function" "GPIO0.8,TXD1(UART1),MAT2.1(Timer2),?..."
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Pin 7 Function" "GPIO0.7,SSEL0(SPI0),MAT2.0(Timer2),?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Pin 6 Function" "GPIO0.6,MOSI0(SPI0),CAP0.2(Timer0),?..."
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Pin 5 Function" "GPIO0.5,MISO0(SPI0),MAT0.1(Timer0),?..."
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Pin 4 Function" "GPIO0.4,SCK0(SPI0),CAP0.1(Timer0),?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Pin 3 Function" "GPIO0.3,SDA0(I2C0),MAT0.0(Timer0),?..."
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Pin 2 Function" "GPIO0.2,SCL0(I2C0),CAP0.0(Timer0),?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Pin 1 Function" "GPIO0.1,RXD0(UART0),MAT3.2(Timer3),?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Pin 0 Function" "GPIO0.0,TXD0(UART0),MAT3.1(Timer3),?..."
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x00 30.--31. " P0.31 ,Pin 31 Function" "GPIO0.31,TDO(JTAG),?..."
|
|
bitfld.long 0x00 28.--29. " P0.30 ,Pin 30 Function" "GPIO0.30,TDI(JTAG),MAT3.3(Timer3),?..."
|
|
bitfld.long 0x00 26.--27. " P0.29 ,Pin 29 Function" "GPIO0.29,TCK(JTAG),CAP2.2(Timer2),?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.28 ,Pin 28 Function" "GPIO0.28,TMS(JTAG),CAP2.1(Timer2),?..."
|
|
bitfld.long 0x00 22.--23. " P0.27 ,Pin 27 Function" "GPIO0.27,TRST(JTAG),CAP2.0(Timer2),?..."
|
|
bitfld.long 0x00 20.--21. " P0.26 ,Pin 26 Function" "GPIO0.26,Reserved,Reserved,AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " P0.25 ,Pin 25 Function" "GPIO0.25,Reserved,Reserved,AD0.6"
|
|
bitfld.long 0x00 16.--17. " P0.24 ,Pin 24 Function" "GPIO0.24,Reserved,Reserved,AD0.2"
|
|
bitfld.long 0x00 14.--15. " P0.23 ,Pin 23 Function" "GPIO0.23,Reserved,Reserved,AD0.1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.22 ,Pin 22 Function" "GPIO0.22,Reserved,Reserved,AD0.0"
|
|
bitfld.long 0x00 10.--11. " P0.21 ,Pin 21 Function" "GPIO0.21,SSEL1(SPI1),MAT3.0(Timer3),?..."
|
|
bitfld.long 0x00 8.--9. " P0.20 ,Pin 20 Function" "GPIO0.20,MOSI1(SPI1),MAT1.3(Timer1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P0.19 ,Pin 19 Function" "GPIO0.19,MISO1(SPI1),MAT1.2(Timer1),?..."
|
|
bitfld.long 0x00 4.--5. " P0.18 ,Pin 18 Function" "GPIO0.18,SDA1(I2C1),CAP1.3(Timer1),?..."
|
|
bitfld.long 0x00 2.--3. " P0.17 ,Pin 17 Function" "GPIO0.17,SCL1(I2C1),CAP1.2(Timer1),?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P0.16 ,Pin 16 Function" "GPIO0.16,EINT0,MAT0.2(Timer0),?..."
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388"))
|
|
width 0xA
|
|
base sd:0xE002C000
|
|
group.long 0x00++0x7
|
|
sif (cpuis("LPC236*")||cpu()=="LPC2387")
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Port 0 Pin 15 Function" "GPIO0.15,TXD1,SCK0,SCK"
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Port 0 Pin 11 Function" "GPIO0.11,RXD2,SCL2,MAT3.1"
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Port 0 Pin 10 Function" "GPIO0.10,TXD2,SDA2,MAT3.0"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Port 0 Pin 9 Function" "GPIO0.9,I2STX_SDA,MOSI1,MAT2.3"
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Port 0 Pin 8 Function" "GPIO0.8,I2STX_WS,MISO1,MAT2.2"
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Port 0 Pin 7 Function" "GPIO0.7,I2STX_CLK,SCK1,MAT2.1"
|
|
textline " "
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2387")
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Port 0 Pin 6 Function" "GPIO0.6,I2SRX_SDA,SSEL1,MAT2.0"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Port 0 Pin 5 Function" "GPIO0.5,I2SRX_WS,TD2,CAP2.1"
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Port 0 Pin 4 Function" "GPIO0.4,I2SRX_CLK,RD2,CAP2.0"
|
|
else
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Port 0 Pin 6 Function" "GPIO0.6,I2SRX_SDA,SSEL1,MAT2.0"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Port 0 Pin 5 Function" "GPIO0.5,I2SRX_WS,Reserved,CAP2.1"
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Port 0 Pin 4 Function" "GPIO0.4,I2SRX_CLK,Reserved,CAP2.0"
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2387")
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Port 0 Pin 3 Function" "GPIO0.3,RXD0,?..."
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Port 0 Pin 2 Function" "GPIO0.2,TXD0,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Port 0 Pin 1 Function" "GPIO0.1,TD1,RXD3,SCL1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Port 0 Pin 0 Function" "GPIO0.0,RD1,TXD3,SDA1"
|
|
else
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Port 0 Pin 3 Function" "GPIO0.3,RXD0,?..."
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Port 0 Pin 2 Function" "GPIO0.2,TXD0,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Port 0 Pin 1 Function" "GPIO0.1,Reserved,RXD3,SCL1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Port 0 Pin 0 Function" "GPIO0.0,Reserved,TXD3,SDA1"
|
|
endif
|
|
line.long 0x4 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x4 28.--29. " P0.30 ,Port 0 Pin 30 Function" "GPIO0.30,USB_D-1,?..."
|
|
bitfld.long 0x4 26.--27. " P0.29 ,Port 0 Pin 29 Function" "GPIO0.29,USB_D+1,?..."
|
|
bitfld.long 0x4 24.--25. " P0.28 ,Port 0 Pin 28 Function" "GPIO0.28,SCL0,?..."
|
|
textline " "
|
|
bitfld.long 0x4 22.--23. " P0.27 ,Port 0 Pin 27 Function" "GPIO0.27,SDA0,?..."
|
|
bitfld.long 0x4 20.--21. " P0.26 ,Port 0 Pin 26 Function" "GPIO0.26,AD0.3,AOUT,RXD3"
|
|
bitfld.long 0x4 18.--19. " P0.25 ,Port 0 Pin 25 Function" "GPIO0.25,AD0.2,I2SRX_SDA,TXD3"
|
|
textline " "
|
|
bitfld.long 0x4 16.--17. " P0.24 ,Port 0 Pin 24 Function" "GPIO0.24,AD0.1,I2SRX_WS,CAP3.1"
|
|
bitfld.long 0x4 14.--15. " P0.23 ,Port 0 Pin 23 Function" "GPIO0.23,AD0.0,I2SRX_CLK,CAP3.0"
|
|
textline " "
|
|
sif (cpu()=="LPC2368"||cpu()=="LPC2387")
|
|
bitfld.long 0x4 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,MCIDAT0,TD1"
|
|
bitfld.long 0x4 10.--11. " P0.21 ,Port 0 Pin 21 Function" "GPIO0.21,RI1,MCIPWR,RD1"
|
|
elif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366")
|
|
bitfld.long 0x4 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,Reserved,TD1"
|
|
bitfld.long 0x4 10.--11. " P0.21 ,Port 0 Pin 21 Function" "GPIO0.21,RI1,Reserved,RD1"
|
|
elif (cpu()=="LPC2367")
|
|
bitfld.long 0x4 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,MCIDAT0,?..."
|
|
bitfld.long 0x4 10.--11. " P0.21 ,Port 0 Pin 21 Function" "GPIO0.21,RI1,MCIPWR,?..."
|
|
else
|
|
bitfld.long 0x4 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,?..."
|
|
bitfld.long 0x4 10.--11. " P0.21 ,Port 0 Pin 21 Function" "GPIO0.21,RI1,?..."
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2167"||cpu()=="LPC2168"||cpu()=="LPC2187")
|
|
bitfld.long 0x4 8.--9. " P0.20 ,Port 0 Pin 20 Function" "GPIO0.20,DTR1,MCICMD,SCL1"
|
|
bitfld.long 0x4 6.--7. " P0.19 ,Port 0 Pin 19 Function" "GPIO0.19,DSR1,MCICLK,SDA1"
|
|
else
|
|
bitfld.long 0x4 8.--9. " P0.20 ,Port 0 Pin 20 Function" "GPIO0.20,DTR1,Reserved,SCL1"
|
|
bitfld.long 0x4 6.--7. " P0.19 ,Port 0 Pin 19 Function" "GPIO0.19,DSR1,Reserved,SDA1"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x4 4.--5. " P0.18 ,Port 0 Pin 18 Function" "GPIO0.18,DCD1,MOSI0,MOSI"
|
|
bitfld.long 0x4 2.--3. " P0.17 ,Port 0 Pin 17 Function" "GPIO0.17,CTS1,MISO0,MISO"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " P0.16 ,Port 0 Pin 16 Function" "GPIO0.16,RXD1,SSEL0,SSEL"
|
|
else
|
|
line.long 0x00 "PINSEL0,Pin Function Select Register 0"
|
|
sif (cpu()=="LPC2378")
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Port 0 Pin 15 Function" "GPIO0.15,TXD1,SCK0,SCK"
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Port 0 Pin 14 Function" "GPIO0.14,Reserved,USB_CONNECT2,SSEL1"
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Port 0 Pin 13 Function" "GPIO0.13,/U2UP_LED2,MOSI1,AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Port 0 Pin 12 Function" "GPIO0.12,Reserved,MISO1,AD0.6"
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Port 0 Pin 11 Function" "GPIO0.11,RXD2,SCL2,MAT3.1"
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Port 0 Pin 10 Function" "GPIO0.10,TXD2,SDA2,MAT3.0"
|
|
elif (cpu()=="LPC2388")
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Port 0 Pin 15 Function" "GPIO0.15,TXD1,SCK0,SCK"
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Port 0 Pin 14 Function" "GPIO0.14,/USB_HSTEN2,USB_CONNECT2,SSEL1"
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Port 0 Pin 13 Function" "GPIO0.13,/U2UP_LED2,MOSI1,AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Port 0 Pin 12 Function" "GPIO0.12,Reserved,MISO1,AD0.6"
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Port 0 Pin 11 Function" "GPIO0.11,RXD2,SCL2,MAT3.1"
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Port 0 Pin 10 Function" "GPIO0.10,TXD2,SDA2,MAT3.0"
|
|
else
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Port 0 Pin 15 Function" "GPIO0.15,TXD1,SCK0,SCK"
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Port 0 Pin 14 Function" "GPIO0.14,Reserved,Reserved,SSEL1"
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Port 0 Pin 13 Function" "GPIO0.13,Reserved,MOSI1,AD0.7"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Port 0 Pin 12 Function" "GPIO0.12,Reserved,MISO1,AD0.6"
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Port 0 Pin 11 Function" "GPIO0.11,RXD2,SCL2,MAT3.1"
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Port 0 Pin 10 Function" "GPIO0.10,TXD2,SDA2,MAT3.0"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Port 0 Pin 9 Function" "GPIO0.9,I2STX_SDA,MOSI1,MAT2.3"
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Port 0 Pin 8 Function" "GPIO0.8,I2STX_WS,MISO1,MAT2.2"
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Port 0 Pin 7 Function" "GPIO0.7,I2STX_CLK,SCK1,MAT2.1"
|
|
textline " "
|
|
sif (cpu()=="LPC2378"||cpu()=="LPC2388")
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Port 0 Pin 6 Function" "GPIO0.6,I2SRX_SDA,SSEL1,MAT2.0"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Port 0 Pin 5 Function" "GPIO0.5,I2SRX_WS,TD2,CAP2.1"
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Port 0 Pin 4 Function" "GPIO0.4,I2SRX_CLK,RD2,CAP2.0"
|
|
else
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Port 0 Pin 6 Function" "GPIO0.6,I2SRX_SDA,SSEL1,MAT2.0"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Port 0 Pin 5 Function" "GPIO0.5,I2SRX_WS,Reserved,CAP2.1"
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Port 0 Pin 4 Function" "GPIO0.4,I2SRX_CLK,Reserved,CAP2.0"
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2378"||cpu()=="LPC2388")
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Port 0 Pin 3 Function" "GPIO0.3,RXD0,?..."
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Port 0 Pin 2 Function" "GPIO0.2,TXD0,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Port 0 Pin 1 Function" "GPIO0.1,TD1,RXD3,SCL1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Port 0 Pin 0 Function" "GPIO0.0,RD1,TXD3,SDA1"
|
|
else
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Port 0 Pin 3 Function" "GPIO0.3,RXD0,?..."
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Port 0 Pin 2 Function" "GPIO0.2,TXD0,?..."
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Port 0 Pin 1 Function" "GPIO0.1,Reserved,RXD3,SCL1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Port 0 Pin 0 Function" "GPIO0.0,Reserved,TXD3,SDA1"
|
|
endif
|
|
width 0xa
|
|
line.long 0x4 "PINSEL1,Pin Function Select Register 1"
|
|
bitfld.long 0x4 30.--31. " P0.31 ,Port 0 Pin 31 Function" "GPIO0.31,USB_D+2,?..."
|
|
bitfld.long 0x4 28.--29. " P0.30 ,Port 0 Pin 30 Function" "GPIO0.30,USB_D-1,?..."
|
|
bitfld.long 0x4 26.--27. " P0.29 ,Port 0 Pin 29 Function" "GPIO0.29,USB_D+1,?..."
|
|
textline " "
|
|
bitfld.long 0x4 24.--25. " P0.28 ,Port 0 Pin 28 Function" "GPIO0.28,SCL0,?..."
|
|
bitfld.long 0x4 22.--23. " P0.27 ,Port 0 Pin 27 Function" "GPIO0.27,SDA0,?..."
|
|
bitfld.long 0x4 20.--21. " P0.26 ,Port 0 Pin 26 Function" "GPIO0.26,AD0.3,AOUT,RXD3"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " P0.25 ,Port 0 Pin 25 Function" "GPIO0.25,AD0.2,I2SRX_SDA,TXD3"
|
|
bitfld.long 0x4 16.--17. " P0.24 ,Port 0 Pin 24 Function" "GPIO0.24,AD0.1,I2SRX_WS,CAP3.1"
|
|
bitfld.long 0x4 14.--15. " P0.23 ,Port 0 Pin 23 Function" "GPIO0.23,AD0.0,I2SRX_CLK,CAP3.0"
|
|
textline " "
|
|
sif (cpu()=="LPC2378"||cpu()=="LPC2388")
|
|
bitfld.long 0x4 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,MCIDAT0,TD1"
|
|
bitfld.long 0x4 10.--11. " P0.21 ,Port 0 Pin 21 Function" "GPIO0.21,RI1,MCIPWR,RD1"
|
|
bitfld.long 0x4 8.--9. " P0.20 ,Port 0 Pin 20 Function" "GPIO0.20,DTR1,MCICMD,SCL1"
|
|
else
|
|
bitfld.long 0x4 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,MCIDAT0,?..."
|
|
bitfld.long 0x4 10.--11. " P0.21 ,Port 0 Pin 21 Function" "GPIO0.21,RI1,MCIPWR,?..."
|
|
bitfld.long 0x4 8.--9. " P0.20 ,Port 0 Pin 20 Function" "GPIO0.20,DTR1,MCICMD,SCL1"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x4 6.--7. " P0.19 ,Port 0 Pin 19 Function" "GPIO0.19,DSR1,MCICLK,SDA1"
|
|
bitfld.long 0x4 4.--5. " P0.18 ,Port 0 Pin 18 Function" "GPIO0.18,DCD1,MOSI0,MOSI"
|
|
bitfld.long 0x4 2.--3. " P0.17 ,Port 0 Pin 17 Function" "GPIO0.17,CTS1,MISO0,MISO"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " P0.16 ,Port 0 Pin 16 Function" "GPIO0.16,RXD1,SSEL0,SSEL"
|
|
endif
|
|
width 0xa
|
|
sif (cpu()!="LPC2361")
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "PINSEL2,Pin Function Select Register 2"
|
|
bitfld.long 0x0 30.--31. " P1.15 ,Port 1 Pin 15 Function" "GPIO1.15,ENET_REF_CLK,?..."
|
|
bitfld.long 0x0 28.--29. " P1.14 ,Port 1 Pin 14 Function" "GPIO1.14,ENET_RX_ER,?..."
|
|
bitfld.long 0x0 20.--21. " P1.10 ,Port 1 Pin 10 Function" "GPIO1.10,ENET_RXD1,?..."
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P1.9 ,Port 1 Pin 9 Function" "GPIO1.9,ENET_RXD0,?..."
|
|
bitfld.long 0x0 16.--17. " P1.8 ,Port 1 Pin 8 Function" "GPIO1.8,ENET_CRS,?..."
|
|
bitfld.long 0x0 8.--9. " P1.4 ,Port 1 Pin 4 Function" "GPIO1.4,ENET_TX_EN,?..."
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P1.1 ,Port 1 Pin 1 Function" "GPIO1.1,ENET_TXD1,?..."
|
|
bitfld.long 0x0 0.--1. " P1.0 ,Port 1 Pin 0 Function" "GPIO1.0,ENET_TXD0,?..."
|
|
else
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "PINSEL2,Pin Function Select Register 2"
|
|
bitfld.long 0x0 30.--31. " P1.15 ,Port 1 Pin 15 Function" "GPIO1.15,?..."
|
|
bitfld.long 0x0 28.--29. " P1.14 ,Port 1 Pin 14 Function" "GPIO1.14,?..."
|
|
bitfld.long 0x0 20.--21. " P1.10 ,Port 1 Pin 10 Function" "GPIO1.10,?..."
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P1.9 ,Port 1 Pin 9 Function" "GPIO1.9,?..."
|
|
bitfld.long 0x0 16.--17. " P1.8 ,Port 1 Pin 8 Function" "GPIO1.8,?..."
|
|
bitfld.long 0x0 8.--9. " P1.4 ,Port 1 Pin 4 Function" "GPIO1.4,?..."
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P1.1 ,Port 1 Pin 1 Function" "GPIO1.1,?..."
|
|
bitfld.long 0x0 0.--1. " P1.0 ,Port 1 Pin 0 Function" "GPIO1.0,?..."
|
|
endif
|
|
width 0xa
|
|
group.long 0xc++0x3
|
|
sif (cpuis("LPC236*")||cpu()=="LPC2387")
|
|
line.long 0x0 "PINSEL3,Pin Function Select Register 3"
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2387")
|
|
bitfld.long 0x0 30.--31. " P1.31 ,Port 1 Pin 31 Function" "GPIO1.31,Reserved,SCK1,AD0.5"
|
|
bitfld.long 0x0 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,Reserved,VBUS,AD0.4"
|
|
else
|
|
bitfld.long 0x0 30.--31. " P1.31 ,Port 1 Pin 31 Function" "GPIO1.31,Reserved,SCK1,AD0.5"
|
|
bitfld.long 0x0 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,Reserved,Reserved,AD0.4"
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362")
|
|
bitfld.long 0x0 26.--27. " P1.29 ,Port 1 Pin 29 Function" "GPIO1.29,USB_SDA1,PCAP1.1,MAT0.1"
|
|
bitfld.long 0x0 24.--25. " P1.28 ,Port 1 Pin 28 Function" "GPIO1.28,USB_SCL1,PCAP1.0,MAT0.0"
|
|
bitfld.long 0x0 22.--23. " P1.27 ,Port 1 Pin 27 Function" "GPIO1.27,/USB_INT1,/USB_OVRCR1,CAP0.1"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " P1.26 ,Port 1 Pin 26 Function" "GPIO1.26,/USB_SSPND1,PWM1.6,CAP0.0"
|
|
bitfld.long 0x0 18.--19. " P1.25 ,Port 1 Pin 25 Function" "GPIO1.25,/USB_LS1,/USB_HSTEN1,MAT1.1"
|
|
bitfld.long 0x0 16.--17. " P1.24 ,Port 1 Pin 24 Function" "GPIO1.24,USB_RX_DM1,PWM1.5,MOSI0"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P1.23 ,Port 1 Pin 23 Function" "GPIO1.23,USB_RX_DP1,PWM1.4,MISO0"
|
|
bitfld.long 0x0 12.--13. " P1.22 ,Port 1 Pin 22 Function" "GPIO1.22,USB_RCV1,USB_PWRD1,MAT1.0"
|
|
bitfld.long 0x0 10.--11. " P1.21 ,Port 1 Pin 21 Function" "GPIO1.21,USB_TX_DM1,PWM1.3,SSEL0"
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " P1.20 ,Port 1 Pin 20 Function" "GPIO1.20,USB_TX_DP1,PWM1.2,SCK0"
|
|
bitfld.long 0x0 6.--7. " P1.19 ,Port 1 Pin 19 Function" "GPIO1.19,/USB_TX_E1,/USB_PPWR1,CAP1.1"
|
|
else
|
|
bitfld.long 0x0 26.--27. " P1.29 ,Port 1 Pin 29 Function" "GPIO1.29,Reserved,PCAP1.1,MAT0.1"
|
|
bitfld.long 0x0 24.--25. " P1.28 ,Port 1 Pin 28 Function" "GPIO1.28,Reserved,PCAP1.0,MAT0.0"
|
|
bitfld.long 0x0 22.--23. " P1.27 ,Port 1 Pin 27 Function" "GPIO1.27,Reserved,Reserved,CAP0.1"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " P1.26 ,Port 1 Pin 26 Function" "GPIO1.26,Reserved,PWM1.6,CAP0.0"
|
|
bitfld.long 0x0 18.--19. " P1.25 ,Port 1 Pin 25 Function" "GPIO1.25,Reserved,Reserved,MAT1.1"
|
|
bitfld.long 0x0 16.--17. " P1.24 ,Port 1 Pin 24 Function" "GPIO1.24,Reserved,PWM1.5,MOSI0"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P1.23 ,Port 1 Pin 23 Function" "GPIO1.23,Reserved,PWM1.4,MISO0"
|
|
bitfld.long 0x0 12.--13. " P1.22 ,Port 1 Pin 22 Function" "GPIO1.22,Reserved,Reserved,MAT1.0"
|
|
bitfld.long 0x0 10.--11. " P1.21 ,Port 1 Pin 21 Function" "GPIO1.21,Reserved,PWM1.3,SSEL0"
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " P1.20 ,Port 1 Pin 20 Function" "GPIO1.20,Reserved,PWM1.2,SCK0"
|
|
bitfld.long 0x0 6.--7. " P1.19 ,Port 1 Pin 19 Function" "GPIO1.19,Reserved,Reserved,CAP1.1"
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2387")
|
|
bitfld.long 0x0 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,USB_UP_LED1,PWM1.1,CAP1.0"
|
|
bitfld.long 0x0 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,ENET_MDIO,?..."
|
|
bitfld.long 0x0 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,ENET_MDC,?..."
|
|
elif (cpu()!="LPC2361")
|
|
sif (cpu()=="LPC2362")
|
|
bitfld.long 0x0 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,USB_UP_LED1,PWM1.1,CAP1.0"
|
|
bitfld.long 0x0 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,ENET_MDIO,?..."
|
|
bitfld.long 0x0 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,ENET_MDC,?..."
|
|
else
|
|
bitfld.long 0x0 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,Reserved,PWM1.1,CAP1.0"
|
|
bitfld.long 0x0 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,ENET_MDIO,?..."
|
|
bitfld.long 0x0 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,ENET_MDC,?..."
|
|
endif
|
|
else
|
|
bitfld.long 0x0 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,USB_UP_LED1,PWM1.1,CAP1.0"
|
|
bitfld.long 0x0 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,?..."
|
|
bitfld.long 0x0 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,?..."
|
|
endif
|
|
else
|
|
width 0xa
|
|
line.long 0x0 "PINSEL3,Pin Function Select Register 3"
|
|
sif (cpu()=="LPC2388")
|
|
bitfld.long 0x0 30.--31. " P1.31 ,Port 1 Pin 31 Function" "GPIO1.31,/USB_OVRCR2,SCK1,AD0.5"
|
|
else
|
|
bitfld.long 0x0 30.--31. " P1.31 ,Port 1 Pin 31 Function" "GPIO1.31,Reserved,SCK1,AD0.5"
|
|
endif
|
|
sif (cpu()=="LPC2378")
|
|
bitfld.long 0x0 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,Reserved,VBUS,AD0.4"
|
|
elif (cpu()=="LPC2388")
|
|
bitfld.long 0x0 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,USB_PWRD2,VBUS,AD0.4"
|
|
else
|
|
bitfld.long 0x0 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,Reserved,Reserved,AD0.4"
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2388")
|
|
bitfld.long 0x0 26.--27. " P1.29 ,Port 1 Pin 29 Function" "GPIO1.29,USB_SDA1,PCAP1.1,MAT0.1"
|
|
bitfld.long 0x0 24.--25. " P1.28 ,Port 1 Pin 28 Function" "GPIO1.28,USB_SCL1,PCAP1.0,MAT0.0"
|
|
bitfld.long 0x0 22.--23. " P1.27 ,Port 1 Pin 27 Function" "GPIO1.27,/USB_INT1,/USB_OVRCR1,CAP0.1"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " P1.26 ,Port 1 Pin 26 Function" "GPIO1.26,/USB_SSPND1,PWM1.6,CAP0.0"
|
|
bitfld.long 0x0 18.--19. " P1.25 ,Port 1 Pin 25 Function" "GPIO1.25,/USB_LS1,/USB_HSTEN1,MAT1.1"
|
|
bitfld.long 0x0 16.--17. " P1.24 ,Port 1 Pin 24 Function" "GPIO1.24,USB_RX_DM1,PWM1.5,MOSI0"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P1.23 ,Port 1 Pin 23 Function" "GPIO1.23,USB_RX_DP1,PWM1.4,MISO0"
|
|
bitfld.long 0x0 12.--13. " P1.22 ,Port 1 Pin 22 Function" "GPIO1.22,USB_RCV1,USB_PWRD1,MAT1.0"
|
|
bitfld.long 0x0 10.--11. " P1.21 ,Port 1 Pin 21 Function" "GPIO1.21,USB_TX_DM1,PWM1.3,SSEL0"
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " P1.20 ,Port 1 Pin 20 Function" "GPIO1.20,USB_TX_DP1,PWM1.2,SCK0"
|
|
bitfld.long 0x0 6.--7. " P1.19 ,Port 1 Pin 19 Function" "GPIO1.19,/USB_TX_E1,/USB_PPWR1,CAP1.1"
|
|
else
|
|
bitfld.long 0x0 26.--27. " P1.29 ,Port 1 Pin 29 Function" "GPIO1.29,Reserved,PCAP1.1,MAT0.1"
|
|
bitfld.long 0x0 24.--25. " P1.28 ,Port 1 Pin 28 Function" "GPIO1.28,Reserved,PCAP1.0,MAT0.0"
|
|
bitfld.long 0x0 22.--23. " P1.27 ,Port 1 Pin 27 Function" "GPIO1.27,Reserved,Reserved,CAP0.1"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " P1.26 ,Port 1 Pin 26 Function" "GPIO1.26,Reserved,PWM1.6,CAP0.0"
|
|
bitfld.long 0x0 18.--19. " P1.25 ,Port 1 Pin 25 Function" "GPIO1.25,Reserved,Reserved,MAT1.1"
|
|
bitfld.long 0x0 16.--17. " P1.24 ,Port 1 Pin 24 Function" "GPIO1.24,Reserved,PWM1.5,MOSI0"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P1.23 ,Port 1 Pin 23 Function" "GPIO1.23,Reserved,PWM1.4,MISO0"
|
|
bitfld.long 0x0 12.--13. " P1.22 ,Port 1 Pin 22 Function" "GPIO1.22,Reserved,Reserved,MAT1.0"
|
|
bitfld.long 0x0 10.--11. " P1.21 ,Port 1 Pin 21 Function" "GPIO1.21,Reserved,PWM1.3,SSEL0"
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " P1.20 ,Port 1 Pin 20 Function" "GPIO1.20,Reserved,PWM1.2,SCK0"
|
|
bitfld.long 0x0 6.--7. " P1.19 ,Port 1 Pin 19 Function" "GPIO1.19,Reserved,Reserved,CAP1.1"
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2378"||cpu()=="LPC2388")
|
|
bitfld.long 0x0 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,USB_UP_LED1,PWM1.1,CAP1.0"
|
|
bitfld.long 0x0 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,ENET_MDIO,?..."
|
|
bitfld.long 0x0 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,ENET_MDC,?..."
|
|
else
|
|
bitfld.long 0x0 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,Reserved,PWM1.1,CAP1.0"
|
|
bitfld.long 0x0 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,ENET_MDIO,?..."
|
|
bitfld.long 0x0 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,ENET_MDC,?..."
|
|
endif
|
|
endif
|
|
width 0xa
|
|
group.long 0x10++0x3
|
|
sif (cpuis("LPC236*")||cpu()=="LPC2387")
|
|
line.long 0x0 "PINSEL4,Pin Function Select Register 4"
|
|
sif (cpu()=="LPC2167"||cpu()=="LPC2168"||cpu()=="LPC2187")
|
|
bitfld.long 0x0 26.--27. " P2.13 ,Port 2 Pin 13 Function" "GPIO2.13,/EINT3,MCIDAT3,I2STX_SDA"
|
|
bitfld.long 0x0 24.--25. " P2.12 ,Port 2 Pin 12 Function" "GPIO2.12,/EINT2,MCIDAT2,I2STX_WS"
|
|
bitfld.long 0x0 22.--23. " P2.11 ,Port 2 Pin 11 Function" "GPIO2.11,/EINT1,MCIDAT1,I2STX_CLK"
|
|
else
|
|
bitfld.long 0x0 26.--27. " P2.13 ,Port 2 Pin 13 Function" "GPIO2.13,/EINT3,Reserved,I2STX_SDA"
|
|
bitfld.long 0x0 24.--25. " P2.12 ,Port 2 Pin 12 Function" "GPIO2.12,/EINT2,Resreved,I2STX_WS"
|
|
bitfld.long 0x0 22.--23. " P2.11 ,Port 2 Pin 11 Function" "GPIO2.11,/EINT1,Reserved,I2STX_CLK"
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2365"||cpu()=="LPC2367")
|
|
bitfld.long 0x0 20.--21. " P2.10 ,Port 2 Pin 10 Function" "GPIO2.10,/EINT0,?..."
|
|
bitfld.long 0x0 18.--19. " P2.9 ,Port 2 Pin 9 Function" "GPIO2.9,Reserved,RXD2,EXTIN0"
|
|
bitfld.long 0x0 16.--17. " P2.8 ,Port 2 Pin 8 Function" "GPIO2.8,Reserved,TXD2,TRACEPKT3"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P2.7 ,Port 2 Pin 7 Function" "GPIO2.7,Reserved,RTS1,TRACEPKT2"
|
|
bitfld.long 0x0 12.--13. " P2.6 ,Port 2 Pin 6 Function" "GPIO2.6,PCAP1.0,RI1,TRACEPKT1"
|
|
bitfld.long 0x0 10.--11. " P2.5 ,Port 2 Pin 5 Function" "GPIO2.5,PWM1.6,DTR1,TRACEPKT0"
|
|
else
|
|
bitfld.long 0x0 20.--21. " P2.10 ,Port 2 Pin 10 Function" "GPIO2.10,/EINT0,?..."
|
|
bitfld.long 0x0 18.--19. " P2.9 ,Port 2 Pin 9 Function" "GPIO2.9,USB_CONNECT1,RXD2,EXTIN0"
|
|
bitfld.long 0x0 16.--17. " P2.8 ,Port 2 Pin 8 Function" "GPIO2.8,TD2,TXD2,TRACEPKT3"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P2.7 ,Port 2 Pin 7 Function" "GPIO2.7,RD2,RTS1,TRACEPKT2"
|
|
bitfld.long 0x0 12.--13. " P2.6 ,Port 2 Pin 6 Function" "GPIO2.6,PCAP1.0,RI1,TRACEPKT1"
|
|
bitfld.long 0x0 10.--11. " P2.5 ,Port 2 Pin 5 Function" "GPIO2.5,PWM1.6,DTR1,TRACEPKT0"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " P2.4 ,Port 2 Pin 4 Function" "GPIO2.4,PWM1.5,DSR1,TRACESYNC"
|
|
bitfld.long 0x0 6.--7. " P2.3 ,Port 2 Pin 3 Function" "GPIO2.3,PWM1.4,DCD1,PIPESTAT2"
|
|
bitfld.long 0x0 4.--5. " P2.2 ,Port 2 Pin 2 Function" "GPIO2.2,PWM1.3,CTS1,PIPESTAT1"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P2.1 ,Port 2 Pin 1 Function" "GPIO2.1,PWM1.2,RXD1,PIPESTAT0"
|
|
bitfld.long 0x0 0.--1. " P2.0 ,Port 2 Pin 0 Function" "GPIO2.0,PWM1.1,TXD1,TRACECLK"
|
|
else
|
|
width 0xa
|
|
line.long 0x0 "PINSEL4,Pin Function Select Register 4"
|
|
bitfld.long 0x0 26.--27. " P2.13 ,Port 2 Pin 13 Function" "GPIO2.13,/EINT3,MCIDAT3,I2STX_SDA"
|
|
bitfld.long 0x0 24.--25. " P2.12 ,Port 2 Pin 12 Function" "GPIO2.12,/EINT2,MCIDAT2,I2STX_WS"
|
|
bitfld.long 0x0 22.--23. " P2.11 ,Port 2 Pin 11 Function" "GPIO2.11,/EINT1,MCIDAT1,I2STX_CLK"
|
|
textline " "
|
|
sif (cpu()=="LPC2378"||cpu()=="LPC2388")
|
|
bitfld.long 0x0 20.--21. " P2.10 ,Port 2 Pin 10 Function" "GPIO2.10,/EINT0,?..."
|
|
bitfld.long 0x0 18.--19. " P2.9 ,Port 2 Pin 9 Function" "GPIO2.9,USB_CONNECT1,RXD2,EXTIN0"
|
|
bitfld.long 0x0 16.--17. " P2.8 ,Port 2 Pin 8 Function" "GPIO2.8,TD2,TXD2,TRACEPKT3"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P2.7 ,Port 2 Pin 7 Function" "GPIO2.7,RD2,RTS1,TRACEPKT2"
|
|
bitfld.long 0x0 12.--13. " P2.6 ,Port 2 Pin 6 Function" "GPIO2.6,PCAP1.0,RI1,TRACEPKT1"
|
|
bitfld.long 0x0 10.--11. " P2.5 ,Port 2 Pin 5 Function" "GPIO2.5,PWM1.6,DTR1,TRACEPKT0"
|
|
else
|
|
bitfld.long 0x0 20.--21. " P2.10 ,Port 2 Pin 10 Function" "GPIO2.10,/EINT0,?..."
|
|
bitfld.long 0x0 18.--19. " P2.9 ,Port 2 Pin 9 Function" "GPIO2.9,Reserved,RXD2,EXTIN0"
|
|
bitfld.long 0x0 16.--17. " P2.8 ,Port 2 Pin 8 Function" "GPIO2.8,Reserved,TXD2,TRACEPKT3"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P2.7 ,Port 2 Pin 7 Function" "GPIO2.7,Reserved,RTS1,TRACEPKT2"
|
|
bitfld.long 0x0 12.--13. " P2.6 ,Port 2 Pin 6 Function" "GPIO2.6,PCAP1.0,RI1,TRACEPKT1"
|
|
bitfld.long 0x0 10.--11. " P2.5 ,Port 2 Pin 5 Function" "GPIO2.5,PWM1.6,DTR1,TRACEPKT0"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " P2.4 ,Port 2 Pin 4 Function" "GPIO2.4,PWM1.5,DSR1,TRACESYNC"
|
|
bitfld.long 0x0 6.--7. " P2.3 ,Port 2 Pin 3 Function" "GPIO2.3,PWM1.4,DCD1,PIPESTAT2"
|
|
bitfld.long 0x0 4.--5. " P2.2 ,Port 2 Pin 2 Function" "GPIO2.2,PWM1.3,CTS1,PIPESTAT1"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P2.1 ,Port 2 Pin 1 Function" "GPIO2.1,PWM1.2,RXD1,PIPESTAT0"
|
|
bitfld.long 0x0 0.--1. " P2.0 ,Port 2 Pin 0 Function" "GPIO2.0,PWM1.1,TXD1,TRACECLK"
|
|
endif
|
|
width 0xa
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388")
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "PINSEL6,Pin Function Select Register 6"
|
|
bitfld.long 0x0 14.--15. " P3.7 ,Port 3 Pin 7 Function" "GPIO3.7,D7,?..."
|
|
bitfld.long 0x0 12.--13. " P3.6 ,Port 3 Pin 6 Function" "GPIO3.6,D6,?..."
|
|
bitfld.long 0x0 10.--11. " P3.5 ,Port 3 Pin 5 Function" "GPIO3.5,D5,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " P3.4 ,Port 3 Pin 4 Function" "GPIO3.4,D4,?..."
|
|
bitfld.long 0x0 6.--7. " P3.3 ,Port 3 Pin 3 Function" "GPIO3.3,D3,?..."
|
|
bitfld.long 0x0 4.--5. " P3.2 ,Port 3 Pin 2 Function" "GPIO3.2,D2,?..."
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P3.1 ,Port 3 Pin 1 Function" "GPIO3.1,D1,?..."
|
|
bitfld.long 0x0 0.--1. " P3.0 ,Port 3 Pin 0 Function" "GPIO3.0,D0,?..."
|
|
endif
|
|
width 0xa
|
|
group.long 0x1c++0x3
|
|
sif (cpuis("LPC236*")||cpu()=="LPC2387")
|
|
line.long 0x0 "PINSEL7,Pin Function Select Register 7"
|
|
bitfld.long 0x0 20.--21. " P3.26 ,Port 3 Pin 26 Function" "GPIO3.26,Reserved,MAT0.1,PWM1.3"
|
|
bitfld.long 0x0 18.--19. " P3.25 ,Port 3 Pin 25 Function" "GPIO3.25,Reserved,MAT0.0,PWM1.2"
|
|
else
|
|
width 0xa
|
|
line.long 0x0 "PINSEL7,Pin Function Select Register 7"
|
|
bitfld.long 0x0 20.--21. " P3.26 ,Port 3 Pin 26 Function" "GPIO3.26,Reserved,MAT0.1,PWM1.3"
|
|
bitfld.long 0x0 18.--19. " P3.25 ,Port 3 Pin 25 Function" "GPIO3.25,Reserved,MAT0.0,PWM1.2"
|
|
bitfld.long 0x0 16.--17. " P3.24 ,Port 3 Pin 24 Function" "GPIO3.24,Reserved,CAP0.1,PWM1.1"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P3.23 ,Port 3 Pin 23 Function" "GPIO3.23,Reserved,CAP0.0,PCAP1.0"
|
|
endif
|
|
width 0xa
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388")
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "PINSEL8,Pin Function Select Register 8"
|
|
bitfld.long 0x0 30.--31. " P4.15 ,Port 4 Pin 15 Function" "GPIO4.15,A15,?..."
|
|
bitfld.long 0x0 28.--29. " P4.14 ,Port 4 Pin 14 Function" "GPIO4.14,A14,?..."
|
|
bitfld.long 0x0 26.--27. " P4.13 ,Port 4 Pin 13 Function" "GPIO4.13,A13,?..."
|
|
textline " "
|
|
bitfld.long 0x0 24.--25. " P4.12 ,Port 4 Pin 12 Function" "GPIO4.12,A12,?..."
|
|
bitfld.long 0x0 22.--23. " P4.11 ,Port 4 Pin 11 Function" "GPIO4.11,A11,?..."
|
|
bitfld.long 0x0 20.--21. " P4.10 ,Port 4 Pin 10 Function" "GPIO4.10,A10,?..."
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P4.9 ,Port 4 Pin 9 Function" "GPIO4.9,A9,?..."
|
|
bitfld.long 0x0 16.--17. " P4.8 ,Port 4 Pin 8 Function" "GPIO4.8,A8,?..."
|
|
bitfld.long 0x0 14.--15. " P4.7 ,Port 4 Pin 7 Function" "GPIO4.7,A7,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12.--13. " P4.6 ,Port 4 Pin 6 Function" "GPIO4.6,A6,?..."
|
|
bitfld.long 0x0 10.--11. " P4.5 ,Port 4 Pin 5 Function" "GPIO4.5,A5,?..."
|
|
bitfld.long 0x0 8.--9. " P4.4 ,Port 4 Pin 4 Function" "GPIO4.4,A4,?..."
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " P4.3 ,Port 4 Pin 3 Function" "GPIO4.3,A3,?..."
|
|
bitfld.long 0x0 4.--5. " P4.2 ,Port 4 Pin 2 Function" "GPIO4.2,A2,?..."
|
|
bitfld.long 0x0 2.--3. " P4.1 ,Port 4 Pin 1 Function" "GPIO4.1,A1,?..."
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " P4.0 ,Port 4 Pin 0 Function" "GPIO4.0,A0,?..."
|
|
endif
|
|
width 0xa
|
|
group.long 0x24++0x3
|
|
sif (cpuis("LPC236*")||cpu()=="LPC2387")
|
|
line.long 0x0 "PINSEL9,Pin Function Select Register 9"
|
|
bitfld.long 0x0 26.--27. " P4.29 ,Port 4 Pin 29 Function" "GPIO4.29,Reserved,MAT2.1,RXD3"
|
|
bitfld.long 0x0 24.--25. " P4.28 ,Port 4 Pin 28 Function" "GPIO4.28,Reserved,MAT2.0,TXD3"
|
|
else
|
|
width 0xa
|
|
line.long 0x0 "PINSEL9,Pin Function Select Register 9"
|
|
bitfld.long 0x0 30.--31. " P4.31 ,Port 4 Pin 31 Function" "GPIO4.31,/CS1,?..."
|
|
bitfld.long 0x0 28.--29. " P4.30 ,Port 4 Pin 30 Function" "GPIO4.30,/CS0,?..."
|
|
bitfld.long 0x0 26.--27. " P4.29 ,Port 4 Pin 29 Function" "GPIO4.29,Reserved,MAT2.1,RXD3"
|
|
textline " "
|
|
bitfld.long 0x0 24.--25. " P4.28 ,Port 4 Pin 28 Function" "GPIO4.28,Reserved,MAT2.0,TXD3"
|
|
bitfld.long 0x0 18.--19. " P4.25 ,Port 4 Pin 25 Function" "GPIO4.25,Reserved,/BLS0,?..."
|
|
bitfld.long 0x0 16.--17. " P4.24 ,Port 4 Pin 24 Function" "GPIO4.24,/OE,?..."
|
|
endif
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "PINSEL10,Pin Function Select Register 10"
|
|
bitfld.long 0x0 3. " GPIO/TRACE ,ETM interface pins control" "Disabled,Enabled"
|
|
tree.open "Pin mode select registers"
|
|
tree "Pin mode select registers 0-3"
|
|
group.long 0x40++0xF
|
|
line.long 0x0 "PINMODE0,Pin mode select register 0"
|
|
bitfld.long 0x0 30.--31. " P0.15MODE ,PORT0 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 28.--29. " P0.14MODE ,PORT0 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 26.--27. " P0.13MODE ,PORT0 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 24.--25. " P0.12MODE ,PORT0 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " P0.11MODE ,PORT0 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 20.--21. " P0.10MODE ,PORT0 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P0.09MODE ,PORT0 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 16.--17. " P0.08MODE ,PORT0 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P0.07MODE ,PORT0 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 12.--13. " P0.06MODE ,PORT0 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 10.--11. " P0.05MODE ,PORT0 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 8.--9. " P0.04MODE ,PORT0 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " P0.03MODE ,PORT0 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 4.--5. " P0.02MODE ,PORT0 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P0.01MODE ,PORT0 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 0.--1. " P0.00MODE ,PORT0 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x4 "PINMODE1,Pin mode select register 1"
|
|
bitfld.long 0x4 20.--21. " P0.26MODE ,PORT0 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 18.--19. " P0.25MODE ,PORT0 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 16.--17. " P0.24MODE ,PORT0 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 14.--15. " P0.23MODE ,PORT0 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 12.--13. " P0.22MODE ,PORT0 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 10.--11. " P0.21MODE ,PORT0 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 8.--9. " P0.20MODE ,PORT0 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 6.--7. " P0.19MODE ,PORT0 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 4.--5. " P0.18MODE ,PORT0 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 2.--3. " P0.17MODE ,PORT0 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " P0.16MODE ,PORT0 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x8 "PINMODE2,Pin mode select register 2"
|
|
bitfld.long 0x8 30.--31. " P1.15MODE ,PORT1 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 28.--29. " P1.14MODE ,PORT1 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 26.--27. " P1.13MODE ,PORT1 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 24.--25. " P1.12MODE ,PORT1 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 22.--23. " P1.11MODE ,PORT1 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 20.--21. " P1.10MODE ,PORT1 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 18.--19. " P1.09MODE ,PORT1 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 16.--17. " P1.08MODE ,PORT1 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 14.--15. " P1.07MODE ,PORT1 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 12.--13. " P1.06MODE ,PORT1 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 10.--11. " P1.05MODE ,PORT1 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 8.--9. " P1.04MODE ,PORT1 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 6.--7. " P1.03MODE ,PORT1 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 4.--5. " P1.02MODE ,PORT1 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 2.--3. " P1.01MODE ,PORT1 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 0.--1. " P1.00MODE ,PORT1 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0xC "PINMODE3,Pin mode select register 3"
|
|
bitfld.long 0xC 30.--31. " P1.31MODE ,PORT1 pin 31 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 28.--29. " P1.30MODE ,PORT1 pin 30 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 26.--27. " P1.29MODE ,PORT1 pin 29 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 24.--25. " P1.28MODE ,PORT1 pin 28 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 22.--23. " P1.27MODE ,PORT1 pin 27 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 20.--21. " P1.26MODE ,PORT1 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 18.--19. " P1.25MODE ,PORT1 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 16.--17. " P1.24MODE ,PORT1 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 14.--15. " P1.23MODE ,PORT1 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 12.--13. " P1.22MODE ,PORT1 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 10.--11. " P1.21MODE ,PORT1 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 8.--9. " P1.20MODE ,PORT1 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 6.--7. " P1.19MODE ,PORT1 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 4.--5. " P1.18MODE ,PORT1 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 2.--3. " P1.17MODE ,PORT1 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 0.--1. " P1.16MODE ,PORT1 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
tree.end
|
|
tree "Pin mode select registers 4-7"
|
|
group.long 0x50++0xF
|
|
line.long 0x0 "PINMODE4,Pin mode select register 4"
|
|
bitfld.long 0x0 30.--31. " P2.15MODE ,PORT2 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 28.--29. " P2.14MODE ,PORT2 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 26.--27. " P2.13MODE ,PORT2 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 24.--25. " P2.12MODE ,PORT2 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " P2.11MODE ,PORT2 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 20.--21. " P2.10MODE ,PORT2 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P2.09MODE ,PORT2 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 16.--17. " P2.08MODE ,PORT2 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P2.07MODE ,PORT2 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 12.--13. " P2.06MODE ,PORT2 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 10.--11. " P2.05MODE ,PORT2 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 8.--9. " P2.04MODE ,PORT2 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " P2.03MODE ,PORT2 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 4.--5. " P2.02MODE ,PORT2 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P2.01MODE ,PORT2 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 0.--1. " P2.00MODE ,PORT2 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x4 "PINMODE5,Pin mode select register 5"
|
|
bitfld.long 0x4 30.--31. " P2.31MODE ,PORT2 pin 31 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 28.--29. " P2.30MODE ,PORT2 pin 30 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 26.--27. " P2.29MODE ,PORT2 pin 29 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 24.--25. " P2.28MODE ,PORT2 pin 28 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 22.--23. " P2.27MODE ,PORT2 pin 27 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 20.--21. " P2.26MODE ,PORT2 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " P2.25MODE ,PORT2 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 16.--17. " P2.24MODE ,PORT2 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 14.--15. " P2.23MODE ,PORT2 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 12.--13. " P2.22MODE ,PORT2 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 10.--11. " P2.21MODE ,PORT2 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 8.--9. " P2.20MODE ,PORT2 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 6.--7. " P2.19MODE ,PORT2 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 4.--5. " P2.18MODE ,PORT2 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " P2.17MODE ,PORT2 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 0.--1. " P2.16MODE ,PORT2 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x8 "PINMODE6,Pin mode select register 6"
|
|
bitfld.long 0x8 30.--31. " P3.15MODE ,PORT3 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 28.--29. " P3.14MODE ,PORT3 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 26.--27. " P3.13MODE ,PORT3 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 24.--25. " P3.12MODE ,PORT3 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 22.--23. " P3.11MODE ,PORT3 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 20.--21. " P3.10MODE ,PORT3 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 18.--19. " P3.09MODE ,PORT3 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 16.--17. " P3.08MODE ,PORT3 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 14.--15. " P3.07MODE ,PORT3 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 12.--13. " P3.06MODE ,PORT3 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 10.--11. " P3.05MODE ,PORT3 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 8.--9. " P3.04MODE ,PORT3 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 6.--7. " P3.03MODE ,PORT3 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 4.--5. " P3.02MODE ,PORT3 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 2.--3. " P3.01MODE ,PORT3 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 0.--1. " P3.00MODE ,PORT3 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0xC "PINMODE7,Pin mode select register 7"
|
|
bitfld.long 0xC 30.--31. " P3.31MODE ,PORT3 pin 31 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 28.--29. " P3.30MODE ,PORT3 pin 30 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 26.--27. " P3.29MODE ,PORT3 pin 29 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 24.--25. " P3.28MODE ,PORT3 pin 28 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 22.--23. " P3.27MODE ,PORT3 pin 27 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 20.--21. " P3.26MODE ,PORT3 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 18.--19. " P3.25MODE ,PORT3 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 16.--17. " P3.24MODE ,PORT3 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 14.--15. " P3.23MODE ,PORT3 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 12.--13. " P3.22MODE ,PORT3 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 10.--11. " P3.21MODE ,PORT3 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 8.--9. " P3.20MODE ,PORT3 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 6.--7. " P3.19MODE ,PORT3 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 4.--5. " P3.18MODE ,PORT3 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 2.--3. " P3.17MODE ,PORT3 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 0.--1. " P3.16MODE ,PORT3 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
tree.end
|
|
tree "Pin mode select registers 8-9"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "PINMODE8,Pin mode select register 8"
|
|
bitfld.long 0x0 30.--31. " P4.15MODE ,PORT4 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 28.--29. " P4.14MODE ,PORT4 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 26.--27. " P4.13MODE ,PORT4 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 24.--25. " P4.12MODE ,PORT4 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " P4.11MODE ,PORT4 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 20.--21. " P4.10MODE ,PORT4 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P4.09MODE ,PORT4 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 16.--17. " P4.08MODE ,PORT4 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P4.07MODE ,PORT4 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 12.--13. " P4.06MODE ,PORT4 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 10.--11. " P4.05MODE ,PORT4 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 8.--9. " P4.04MODE ,PORT4 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " P4.03MODE ,PORT4 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 4.--5. " P4.02MODE ,PORT4 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P4.01MODE ,PORT4 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 0.--1. " P4.00MODE ,PORT4 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x4 "PINMODE9,Pin mode select register 9"
|
|
bitfld.long 0x4 30.--31. " P4.31MODE ,PORT4 pin 31 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 28.--29. " P4.30MODE ,PORT4 pin 30 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 26.--27. " P4.29MODE ,PORT4 pin 29 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 24.--25. " P4.28MODE ,PORT4 pin 28 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 22.--23. " P4.27MODE ,PORT4 pin 27 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 20.--21. " P4.26MODE ,PORT4 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " P4.25MODE ,PORT4 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 16.--17. " P4.24MODE ,PORT4 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 14.--15. " P4.23MODE ,PORT4 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 12.--13. " P4.22MODE ,PORT4 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 10.--11. " P4.21MODE ,PORT4 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 8.--9. " P4.20MODE ,PORT4 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 6.--7. " P4.19MODE ,PORT4 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 4.--5. " P4.18MODE ,PORT4 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " P4.17MODE ,PORT4 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 0.--1. " P4.16MODE ,PORT4 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2468"||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
width 0xA
|
|
base sd:0xE002C000
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "PINSEL0,Pin function select register 0"
|
|
bitfld.long 0x00 30.--31. " P0.15 ,Port 0 Pin 15 Function" "GPIO0.15,TXD1,SCK0,SCK"
|
|
bitfld.long 0x00 28.--29. " P0.14 ,Port 0 Pin 14 Function" "GPIO0.14,/USB_HSTEN2,/USB_CONNECT2,/ECT2 SSEL1"
|
|
bitfld.long 0x00 26.--27. " P0.13 ,Port 0 Pin 13 Function" "GPIO0.13,USB_UP_LED2,MOSI1,AD0[7]"
|
|
bitfld.long 0x00 24.--25. " P0.12 ,Port 0 Pin 12 Function" "GPIO0.12,/USB_PPWR2,MISO1,AD0[6]"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P0.11 ,Port 0 Pin 11 Function" "GPIO0.11,RXD2,SCL2,MAT3[1]"
|
|
bitfld.long 0x00 20.--21. " P0.10 ,Port 0 Pin 10 Function" "GPIO0.10,TXD2,SDA2,MAT3[0]"
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Port 0 Pin 9 Function" "GPIO0.9,I2STX_SDA/LCDVD[17],MOSI1,MAT2[3]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Port 0 Pin 8 Function" "GPIO0.8,I2STX_WS/LCDVD[16],MISO1,MAT2[2]"
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Port 0 Pin 7 Function" "GPIO0.7,I2STX_CLK/LCDVD[9],SCK1,MAT2[1]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Port 0 Pin 6 Function" "GPIO0.6,I2SRX_SDA/LCDVD[8],SSEL1,MAT2[0]"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Port 0 Pin 5 Function" "GPIO0.5,I2SRX_WS/LCDVD[1],TD2,CAP2[1]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Port 0 Pin 4 Function" "GPIO0.4,I2SRX_CLK/LCDVD[0],RD2,CAP2[0]"
|
|
elif (cpu()=="LPC2420")
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Port 0 Pin 9 Function" "GPIO0.9,I2STX_SDA,MOSI1,MAT2[3]"
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Port 0 Pin 8 Function" "GPIO0.8,I2STX_WS,MISO1,MAT2[2]"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Port 0 Pin 7 Function" "GPIO0.7,I2STX_CLK,SCK1,MAT2[1]"
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Port 0 Pin 6 Function" "GPIO0.6,I2SRX_SDA,SSEL1,MAT2[0]"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Port 0 Pin 5 Function" "GPIO0.5,I2SRX_WS,Reserved,CAP2[1]"
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Port 0 Pin 4 Function" "GPIO0.4,I2SRX_CLK,Reserved,CAP2[0]"
|
|
else
|
|
bitfld.long 0x00 18.--19. " P0.9 ,Port 0 Pin 9 Function" "GPIO0.9,I2STX_SDA,MOSI1,MAT2[3]"
|
|
bitfld.long 0x00 16.--17. " P0.8 ,Port 0 Pin 8 Function" "GPIO0.8,I2STX_WS,MISO1,MAT2[2]"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P0.7 ,Port 0 Pin 7 Function" "GPIO0.7,I2STX_CLK,SCK1,MAT2[1]"
|
|
bitfld.long 0x00 12.--13. " P0.6 ,Port 0 Pin 6 Function" "GPIO0.6,I2SRX_SDA,SSEL1,MAT2[0]"
|
|
bitfld.long 0x00 10.--11. " P0.5 ,Port 0 Pin 5 Function" "GPIO0.5,I2SRX_WS,TD2,CAP2[1]"
|
|
bitfld.long 0x00 8.--9. " P0.4 ,Port 0 Pin 4 Function" "GPIO0.4,I2SRX_CLK,RD2,CAP2[0]"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P0.3 ,Port 0 Pin 3 Function" "GPIO0.3,RXD0,?..."
|
|
bitfld.long 0x00 4.--5. " P0.2 ,Port 0 Pin 2 Function" "GPIO0.2,TXD0,?..."
|
|
sif (cpu()=="LPC2420")
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Port 0 Pin 1 Function" "GPIO0.1,Reserved,RXD3,SCL1"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Port 0 Pin 0 Function" "GPIO0.0,Reserved,TXD3,SDA1"
|
|
else
|
|
bitfld.long 0x00 2.--3. " P0.1 ,Port 0 Pin 1 Function" "GPIO0.1,TD1,RXD3,SCL1"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,Port 0 Pin 0 Function" "GPIO0.0,RD1,TXD3,SDA1"
|
|
endif
|
|
width 0xa
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "PINSEL1,Pin function select register 1"
|
|
bitfld.long 0x00 30.--31. " P0.31 ,Port 0 Pin 31 Function" "GPIO0.31,USB_D+2,?..."
|
|
bitfld.long 0x00 28.--29. " P0.30 ,Port 0 Pin 30 Function" "GPIO0.30,USB_D-1,?..."
|
|
bitfld.long 0x00 26.--27. " P0.29 ,Port 0 Pin 29 Function" "GPIO0.29,USB_D+1,?..."
|
|
bitfld.long 0x00 24.--25. " P0.28 ,Port 0 Pin 28 Function" "GPIO0.28,SCL0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P0.27 ,Port 0 Pin 27 Function" "GPIO0.27,SDA0,?..."
|
|
bitfld.long 0x00 20.--21. " P0.26 ,Port 0 Pin 26 Function" "GPIO0.26,AD0[3],AOUT,RXD3"
|
|
bitfld.long 0x00 18.--19. " P0.25 ,Port 0 Pin 25 Function" "GPIO0.25,AD0[2],I2SRX_SDA,TXD3"
|
|
bitfld.long 0x00 16.--17. " P0.24 ,Port 0 Pin 24 Function" "GPIO0.24,AD0[1],I2SRX_WS,CAP3[1]"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P0.23 ,Port 0 Pin 23 Function" "GPIO0.23,AD0[0],I2SRX_CLK,CAP3[0]"
|
|
bitfld.long 0x00 12.--13. " P0.22 ,Port 0 Pin 22 Function" "GPIO0.22,RTS1,MCIDAT0,TD1"
|
|
bitfld.long 0x00 10.--11. " P0.21 ,Port 0 Pin 21 Function" "GPIO0.21,RI1,MCIPWR,RD1"
|
|
bitfld.long 0x00 8.--9. " P0.20 ,Port 0 Pin 20 Function" "GPIO0.20,DTR1,MCICMD,SCL1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P0.19 ,Port 0 Pin 19 Function" "GPIO0.19,DSR1,MCICLK,SDA1"
|
|
bitfld.long 0x00 4.--5. " P0.18 ,Port 0 Pin 18 Function" "GPIO0.18,DCD1,MOSI0,MOSI"
|
|
bitfld.long 0x00 2.--3. " P0.17 ,Port 0 Pin 17 Function" "GPIO0.17,CTS1,MISO0,MISO"
|
|
bitfld.long 0x00 0.--1. " P0.16 ,Port 0 Pin 16 Function" "GPIO0.16,RXD1,SSEL0,SSEL"
|
|
width 0xa
|
|
line.long 0x04 "PINSEL2,Pin function select register 2"
|
|
sif (cpu()=="LPC2420")
|
|
bitfld.long 0x04 30.--31. " P1.15 ,Port 1 Pin 15 Function" "GPIO1.15,?..."
|
|
bitfld.long 0x04 28.--29. " P1.14 ,Port 1 Pin 14 Function" "GPIO1.14,?..."
|
|
bitfld.long 0x04 26.--27. " P1.13 ,Port 1 Pin 13 Function" "GPIO1.13,?..."
|
|
bitfld.long 0x04 24.--25. " P1.12 ,Port 1 Pin 12 Function" "GPIO1.12,Reserved,MACIDAT3,PCAP0[0]"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " P1.11 ,Port 1 Pin 11 Function" "GPIO1.11,Reserved,MCIDAT2,PWM0[6]"
|
|
bitfld.long 0x04 20.--21. " P1.10 ,Port 1 Pin 10 Function" "GPIO1.10,?..."
|
|
bitfld.long 0x04 18.--19. " P1.9 ,Port 1 Pin 9 Function" "GPIO1.9,?..."
|
|
bitfld.long 0x04 16.--17. " P1.8 ,Port 1 Pin 8 Function" "GPIO1.8,?..."
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " P1.7 ,Port 1 Pin 7 Function" "GPIO1.7,Reserved,MCIDAT1,PWM0[5]"
|
|
bitfld.long 0x04 12.--13. " P1.6 ,Port 1 Pin 6 Function" "GPIO1.6,Reserved,MCIDAT0,PWM0[4]"
|
|
bitfld.long 0x04 10.--11. " P1.5 ,Port 1 Pin 5 Function" "GPIO1.5,Reserved,MCIPWR,PWM0[3]"
|
|
bitfld.long 0x04 8.--9. " P1.4 ,Port 1 Pin 4 Function" "GPIO1.4,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " P1.3 ,Port 1 Pin 3 Function" "GPIO1.3,Reserved,MCICMD,PWM0[2]"
|
|
bitfld.long 0x04 4.--5. " P1.2 ,Port 1 Pin 2 Function" "GPIO1.2,Reserved,MCICLK,PWM0[1]"
|
|
bitfld.long 0x04 2.--3. " P1.1 ,Port 1 Pin 1 Function" "GPIO1.1,?..."
|
|
bitfld.long 0x04 0.--1. " P1.0 ,Port 1 Pin 0 Function" "GPIO1.0,?..."
|
|
else
|
|
bitfld.long 0x04 30.--31. " P1.15 ,Port 1 Pin 15 Function" "GPIO1.15,ENET_ REF/RX _CLK,?..."
|
|
bitfld.long 0x04 28.--29. " P1.14 ,Port 1 Pin 14 Function" "GPIO1.14,ENET_RX_ER,?..."
|
|
bitfld.long 0x04 26.--27. " P1.13 ,Port 1 Pin 13 Function" "GPIO1.13,ENET_RX_DV,?..."
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " P1.12 ,Port 1 Pin 12 Function" "GPIO1.12,ENET_RXD3,MACIDAT3,PCAP0[0]"
|
|
bitfld.long 0x04 22.--23. " P1.11 ,Port 1 Pin 11 Function" "GPIO1.11,ENET_RXD2,MCIDAT2,PWM0[6]"
|
|
bitfld.long 0x04 20.--21. " P1.10 ,Port 1 Pin 10 Function" "GPIO1.10,ENET_RXD1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " P1.9 ,Port 1 Pin 9 Function" "GPIO1.9,ENET_RXD0,?..."
|
|
bitfld.long 0x04 16.--17. " P1.8 ,Port 1 Pin 8 Function" "GPIO1.8,ENET_CRS_DV/ENET_CRS,?..."
|
|
bitfld.long 0x04 14.--15. " P1.7 ,Port 1 Pin 7 Function" "GPIO1.7,ENET_COL,MCIDAT1,PWM0[5]"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " P1.6 ,Port 1 Pin 6 Function" "GPIO1.6,ENET_TX_CLK,MCIDAT0,PWM0[4]"
|
|
bitfld.long 0x04 10.--11. " P1.5 ,Port 1 Pin 5 Function" "GPIO1.5,ENET_TX_ER,MCIPWR,PWM0[3]"
|
|
bitfld.long 0x04 8.--9. " P1.4 ,Port 1 Pin 4 Function" "GPIO1.4,ENET_TX_EN,?..."
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " P1.3 ,Port 1 Pin 3 Function" "GPIO1.3,ENET_TXD3,MCICMD,PWM0[2]"
|
|
bitfld.long 0x04 4.--5. " P1.2 ,Port 1 Pin 2 Function" "GPIO1.2,ENET_TXD2,MCICLK,PWM0[1]"
|
|
bitfld.long 0x04 2.--3. " P1.1 ,Port 1 Pin 1 Function" "GPIO1.1,ENET_TXD1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " P1.0 ,Port 1 Pin 0 Function" "GPIO1.0,ENET_TXD0,?..."
|
|
endif
|
|
width 0xa
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "PINSEL3,Pin function select register 3"
|
|
bitfld.long 0x00 30.--31. " P1.31 ,Port 1 Pin 31 Function" "GPIO1.31,/USB_OVRCR2,SCK1,AD0[5]"
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,USB_PWRD2,VBUS,AD0[4]"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " P1.29 ,Port 1 Pin 29 Function" "GPIO1.29,USB_SDA1/LCDVD[15/23],PCAP1[1],MAT0[1]"
|
|
bitfld.long 0x00 24.--25. " P1.28 ,Port 1 Pin 28 Function" "GPIO1.28,USB_SCL1/LCDVD[14/22],PCAP1[0],MAT0[0]"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P1.27 ,Port 1 Pin 27 Function" "GPIO1.27,/USB_INT1/LCDVD[13/21],/USB_OVRCR1,CAP0[1]"
|
|
bitfld.long 0x00 20.--21. " P1.26 ,Port 1 Pin 26 Function" "GPIO1.26,/USB_SSPND1/LCDVD[12/20],PWM1[6],CAP0[0]"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " P1.25 ,Port 1 Pin 25 Function" "GPIO1.25,/USB_LS1/LCDVD[11/15],/USB_HSTEN1,MAT1[1]"
|
|
bitfld.long 0x00 16.--17. " P1.24 ,Port 1 Pin 24 Function" "GPIO1.24,USB_RX_DM1/LCDVD[10/14],PWM1[5],MOSI0"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P1.23 ,Port 1 Pin 23 Function" "GPIO1.23,USB_RX_DP1/LCDVD[9/13],PWM1[4],MISO0"
|
|
bitfld.long 0x00 12.--13. " P1.22 ,Port 1 Pin 22 Function" "GPIO1.22,USB_RCV1/LCDVD[8/12],USB_PWRD1,MAT1[0]"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " P1.21 ,Port 1 Pin 21 Function" "GPIO1.21,USB_TX_DM1/LCDVD[7/11],PWM1[3],SSEL0"
|
|
bitfld.long 0x00 8.--9. " P1.20 ,Port 1 Pin 20 Function" "GPIO1.20,USB_TX_DP1/LCDVD[6/10],PWM1[2],SCK0"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P1.19 ,Port 1 Pin 19 Function" "GPIO1.19,/USB_TX_E1,/USB_PPWR1,CAP1[1]"
|
|
bitfld.long 0x00 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,USB_UP_LED1,PWM1[1],CAP1[0]"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,ENET_MDIO,?..."
|
|
bitfld.long 0x00 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,ENET_MDC,?..."
|
|
else
|
|
bitfld.long 0x00 28.--29. " P1.30 ,Port 1 Pin 30 Function" "GPIO1.30,USB_PWRD2,VBUS,AD0[4]"
|
|
bitfld.long 0x00 26.--27. " P1.29 ,Port 1 Pin 29 Function" "GPIO1.29,USB_SDA1,PCAP1[1],MAT0[1]"
|
|
bitfld.long 0x00 24.--25. " P1.28 ,Port 1 Pin 28 Function" "GPIO1.28,USB_SCL1,PCAP1[0],MAT0[0]"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P1.27 ,Port 1 Pin 27 Function" "GPIO1.27,/USB_INT1,/USB_OVRCR1,CAP0[1]"
|
|
bitfld.long 0x00 20.--21. " P1.26 ,Port 1 Pin 26 Function" "GPIO1.26,/USB_SSPND1,PWM1[6],CAP0[0]"
|
|
bitfld.long 0x00 18.--19. " P1.25 ,Port 1 Pin 25 Function" "GPIO1.25,/USB_LS1,/USB_HSTEN1,MAT1[1]"
|
|
bitfld.long 0x00 16.--17. " P1.24 ,Port 1 Pin 24 Function" "GPIO1.24,USB_RX_DM1,PWM1[5],MOSI0"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P1.23 ,Port 1 Pin 23 Function" "GPIO1.23,USB_RX_DP1,PWM1[4],MISO0"
|
|
bitfld.long 0x00 12.--13. " P1.22 ,Port 1 Pin 22 Function" "GPIO1.22,USB_RCV1,USB_PWRD1,MAT1[0]"
|
|
bitfld.long 0x00 10.--11. " P1.21 ,Port 1 Pin 21 Function" "GPIO1.21,USB_TX_DM1,PWM1[3],SSEL0"
|
|
bitfld.long 0x00 8.--9. " P1.20 ,Port 1 Pin 20 Function" "GPIO1.20,USB_TX_DP1,PWM1[2],SCK0"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P1.19 ,Port 1 Pin 19 Function" "GPIO1.19,/USB_TX_E1,/USB_PPWR1,CAP1[1]"
|
|
bitfld.long 0x00 4.--5. " P1.18 ,Port 1 Pin 18 Function" "GPIO1.18,USB_UP_LED1,PWM1[1],CAP1[0]"
|
|
bitfld.long 0x00 2.--3. " P1.17 ,Port 1 Pin 17 Function" "GPIO1.17,ENET_MDIO,?..."
|
|
bitfld.long 0x00 0.--1. " P1.16 ,Port 1 Pin 16 Function" "GPIO1.16,ENET_MDC,?..."
|
|
endif
|
|
width 0xa
|
|
sif (cpu()=="LPC2458")
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "PINSEL4,Pin function select register 4"
|
|
bitfld.long 0x00 26.--27. " P2.13 ,Port 2 Pin 13 Function" "GPIO2.13,/EINT3,MCIDAT3,I2STX_SDA"
|
|
bitfld.long 0x00 24.--25. " P2.12 ,Port 2 Pin 12 Function" "GPIO2.12,/EINT2,MCIDAT2,I2STX_WS"
|
|
bitfld.long 0x00 22.--23. " P2.11 ,Port 2 Pin 11 Function" "GPIO2.11,/EINT1,MCIDAT1,I2STX_CLK"
|
|
bitfld.long 0x00 20.--21. " P2.10 ,Port 2 Pin 10 Function" "GPIO2.10,/EINT0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " P2.9 ,Port 2 Pin 9 Function" "GPIO2.9,/USB_CONNECT1,RXD2,EXTIN0"
|
|
bitfld.long 0x00 16.--17. " P2.8 ,Port 2 Pin 8 Function" "GPIO2.8,TD2,TXD2,TRACEPKT3"
|
|
bitfld.long 0x00 14.--15. " P2.7 ,Port 2 Pin 7 Function" "GPIO2.7,RD2,RTS1,TRACEPKT2"
|
|
bitfld.long 0x00 12.--13. " P2.6 ,Port 2 Pin 6 Function" "GPIO2.6,PCAP1[0],RI1,TRACEPKT1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " P2.5 ,Port 2 Pin 5 Function" "GPIO2.5,PWM1[6],DTR1,TRACEPKT0"
|
|
bitfld.long 0x00 8.--9. " P2.4 ,Port 2 Pin 4 Function" "GPIO2.4,PWM1[5],DSR1,TRACESYNC"
|
|
bitfld.long 0x00 6.--7. " P2.3 ,Port 2 Pin 3 Function" "GPIO2.3,PWM1[4],DCD1,PIPESTAT2"
|
|
bitfld.long 0x00 4.--5. " P2.2 ,Port 2 Pin 2 Function" "GPIO2.2,PWM1[3],CTS1,PIPESTAT1"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " P2.1 ,Port 2 Pin 1 Function" "GPIO2.1,PWM1[2],RXD1,PIPESTAT0"
|
|
bitfld.long 0x00 0.--1. " P2.0 ,Port 2 Pin 0 Function" "GPIO2.0,PWM1[1],TXD1,TRACECLK"
|
|
endif
|
|
width 0xa
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "PINSEL4,Pin function select register 4"
|
|
bitfld.long 0x00 30.--31. " P2.15 ,Port 2 Pin 15 Function" "GPIO2.15,/CS3,CAP2[1],SCL1"
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 28.--29. " P2.14 ,Port 2 Pin 14 Function" "GPIO2.14,/CS2,CAP2[0],SDA1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " P2.13 ,Port 2 Pin 13 Function" "GPIO2.13,/EINT3/LCDVD[5/9/19],MCIDAT3,I2STX_SDA"
|
|
bitfld.long 0x00 24.--25. " P2.12 ,Port 2 Pin 12 Function" "GPIO2.12,/EINT2/LCDVD[4/3/8/18],MCIDAT2,I2STX_WS"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P2.11 ,Port 2 Pin 11 Function" "GPIO2.11,/EINT1/LCDCLKIN,MCIDAT1,I2STX_CLK"
|
|
bitfld.long 0x00 20.--21. " P2.10 ,Port 2 Pin 10 Function" "GPIO2.10,/EINT0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " P2.9 ,Port 2 Pin 9 Function" "GPIO2.9,/USB_CONNECT1,RXD2,EXTIN0/LCDVD[3/7]"
|
|
bitfld.long 0x00 16.--17. " P2.8 ,Port 2 Pin 8 Function" "GPIO2.8,TD2,TXD2,TRACEPKT3/LCDVD[2/6]"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P2.7 ,Port 2 Pin 7 Function" "GPIO2.7,RD2,RTS1,TRACEPKT2/LCDVD[1/5]"
|
|
bitfld.long 0x00 12.--13. " P2.6 ,Port 2 Pin 6 Function" "GPIO2.6,PCAP1[0],RI1,TRACEPKT1/LCDVD[0/4]"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " P2.5 ,Port 2 Pin 5 Function" "GPIO2.5,PWM1[6],DTR1,TRACEPKT0/LCDLP"
|
|
bitfld.long 0x00 8.--9. " P2.4 ,Port 2 Pin 4 Function" "GPIO2.4,PWM1[5],DSR1,TRACESYNC/LCDENAB/LCDM"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P2.3 ,Port 2 Pin 3 Function" "GPIO2.3,PWM1[4],DCD1,PIPESTAT2/LCDFP"
|
|
bitfld.long 0x00 4.--5. " P2.2 ,Port 2 Pin 2 Function" "GPIO2.2,PWM1[3],CTS1,PIPESTAT1/LCDDCLK"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " P2.1 ,Port 2 Pin 1 Function" "GPIO2.1,PWM1[2],RXD1,PIPESTAT0/LCDLE"
|
|
bitfld.long 0x00 0.--1. " P2.0 ,Port 2 Pin 0 Function" "GPIO2.0,PWM1[1],TXD1,TRACECLK/LCDPWR"
|
|
else
|
|
bitfld.long 0x00 28.--29. " P2.14 ,Port 2 Pin 14 Function" "GPIO2.14,/CS2,CAP2[0],SDA1"
|
|
bitfld.long 0x00 26.--27. " P2.13 ,Port 2 Pin 13 Function" "GPIO2.13,/EINT3,MCIDAT3,I2STX_SDA"
|
|
bitfld.long 0x00 24.--25. " P2.12 ,Port 2 Pin 12 Function" "GPIO2.12,/EINT2,MCIDAT2,I2STX_WS"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P2.11 ,Port 2 Pin 11 Function" "GPIO2.11,/EINT1,MCIDAT1,I2STX_CLK"
|
|
bitfld.long 0x00 20.--21. " P2.10 ,Port 2 Pin 10 Function" "GPIO2.10,/EINT0,?..."
|
|
bitfld.long 0x00 18.--19. " P2.9 ,Port 2 Pin 9 Function" "GPIO2.9,/USB_CONNECT1,RXD2,EXTIN0"
|
|
sif (cpu()=="LPC2420")
|
|
bitfld.long 0x00 16.--17. " P2.8 ,Port 2 Pin 8 Function" "GPIO2.8,Reserved,TXD2,TRACEPKT3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P2.7 ,Port 2 Pin 7 Function" "GPIO2.7,Reserved,RTS1,TRACEPKT2"
|
|
else
|
|
bitfld.long 0x00 16.--17. " P2.8 ,Port 2 Pin 8 Function" "GPIO2.8,TD2,TXD2,TRACEPKT3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P2.7 ,Port 2 Pin 7 Function" "GPIO2.7,RD2,RTS1,TRACEPKT2"
|
|
endif
|
|
bitfld.long 0x00 12.--13. " P2.6 ,Port 2 Pin 6 Function" "GPIO2.6,PCAP1[0],RI1,TRACEPKT1"
|
|
bitfld.long 0x00 10.--11. " P2.5 ,Port 2 Pin 5 Function" "GPIO2.5,PWM1[6],DTR1,TRACEPKT0"
|
|
bitfld.long 0x00 8.--9. " P2.4 ,Port 2 Pin 4 Function" "GPIO2.4,PWM1[5],DSR1,TRACESYNC"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P2.3 ,Port 2 Pin 3 Function" "GPIO2.3,PWM1[4],DCD1,PIPESTAT2"
|
|
bitfld.long 0x00 4.--5. " P2.2 ,Port 2 Pin 2 Function" "GPIO2.2,PWM1[3],CTS1,PIPESTAT1"
|
|
bitfld.long 0x00 2.--3. " P2.1 ,Port 2 Pin 1 Function" "GPIO2.1,PWM1[2],RXD1,PIPESTAT0"
|
|
bitfld.long 0x00 0.--1. " P2.0 ,Port 2 Pin 0 Function" "GPIO2.0,PWM1[1],TXD1,TRACECLK"
|
|
endif
|
|
endif
|
|
width 0xa
|
|
sif (cpu()=="LPC2458")
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "PINSEL5,Pin function select register 5"
|
|
bitfld.long 0x00 26.--27. " P2.29 ,Port 2 Pin 29 Function" "GPIO2.29,DQMOUT1,?..."
|
|
bitfld.long 0x00 24.--25. " P2.28 ,Port 2 Pin 28 Function" "GPIO2.28,DQMOUT0,?..."
|
|
bitfld.long 0x00 18.--19. " P2.25 ,Port 2 Pin 25 Function" "GPIO2.25,CKEOUT1,?..."
|
|
bitfld.long 0x00 16.--17. " P2.24 ,Port 2 Pin 24 Function" "GPIO2.24,CKEOUT0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " P2.21 ,Port 2 Pin 21 Function" "GPIO2.21,/DYCS1,?..."
|
|
bitfld.long 0x00 8.--9. " P2.20 ,Port 2 Pin 20 Function" "GPIO2.20,/DYCS0,?..."
|
|
bitfld.long 0x00 6.--7. " P2.19 ,Port 2 Pin 19 Function" "GPIO2.19,CLKOUT1,?..."
|
|
bitfld.long 0x00 4.--5. " P2.18 ,Port 2 Pin 18 Function" "GPIO2.18,CLKOUT0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " P2.17 ,Port 2 Pin 17 Function" "GPIO2.17,/RAS,?..."
|
|
bitfld.long 0x00 0.--1. " P2.16 ,Port 2 Pin 16 Function" "GPIO2.16,/CAS,?..."
|
|
endif
|
|
width 0xa
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "PINSEL5,Pin function select register 5"
|
|
bitfld.long 0x00 30.--31. " P2.31 ,Port 2 Pin 31 Function" "GPIO2.31,DQMOUT3,MAT3[3],SCL2"
|
|
bitfld.long 0x00 28.--29. " P2.30 ,Port 2 Pin 30 Function" "GPIO2.30,DQMOUT2,MAT3[2],SDA2"
|
|
bitfld.long 0x00 26.--27. " P2.29 ,Port 2 Pin 29 Function" "GPIO2.29,DQMOUT1,?..."
|
|
bitfld.long 0x00 24.--25. " P2.28 ,Port 2 Pin 28 Function" "GPIO2.28,DQMOUT0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P2.27 ,Port 2 Pin 27 Function" "GPIO2.27,CKEOUT3,MAT3[1],MOSI0"
|
|
bitfld.long 0x00 20.--21. " P2.26 ,Port 2 Pin 26 Function" "GPIO2.26,CKEOUT2,MAT3[0],MISO0"
|
|
bitfld.long 0x00 18.--19. " P2.25 ,Port 2 Pin 25 Function" "GPIO2.25,CKEOUT1,?..."
|
|
bitfld.long 0x00 16.--17. " P2.24 ,Port 2 Pin 24 Function" "GPIO2.24,CKEOUT0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P2.23 ,Port 2 Pin 23 Function" "GPIO2.23,/DYSC3,CAP3[1],SSEL0"
|
|
bitfld.long 0x00 12.--13. " P2.22 ,Port 2 Pin 22 Function" "GPIO2.22,/DYSC2,CAP3[0],SCK0"
|
|
bitfld.long 0x00 10.--11. " P2.21 ,Port 2 Pin 21 Function" "GPIO2.21,/DYCS1,?..."
|
|
bitfld.long 0x00 8.--9. " P2.20 ,Port 2 Pin 20 Function" "GPIO2.20,/DYCS0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P2.19 ,Port 2 Pin 19 Function" "GPIO2.19,CLKOUT1,?..."
|
|
bitfld.long 0x00 4.--5. " P2.18 ,Port 2 Pin 18 Function" "GPIO2.18,CLKOUT0,?..."
|
|
bitfld.long 0x00 2.--3. " P2.17 ,Port 2 Pin 17 Function" "GPIO2.17,/RAS,?..."
|
|
bitfld.long 0x00 0.--1. " P2.16 ,Port 2 Pin 16 Function" "GPIO2.16,/CAS,?..."
|
|
endif
|
|
width 0xa
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PINSEL6,Pin function select register 6"
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2470")
|
|
bitfld.long 0x00 30.--31. " P3.15 ,Port 3 Pin 15 Function" "GPIO3.15,D15,?..."
|
|
bitfld.long 0x00 28.--29. " P3.14 ,Port 3 Pin 14 Function" "GPIO3.14,D14,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 26.--27. " P3.13 ,Port 3 Pin 13 Function" "GPIO3.13,D13,?..."
|
|
bitfld.long 0x00 24.--25. " P3.12 ,Port 3 Pin 12 Function" "GPIO3.12,D12,?..."
|
|
bitfld.long 0x00 22.--23. " P3.11 ,Port 3 Pin 11 Function" "GPIO3.11,D11,?..."
|
|
bitfld.long 0x00 20.--21. " P3.10 ,Port 3 Pin 10 Function" "GPIO3.10,D10,?..."
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " P3.9 ,Port 3 Pin 9 Function" "GPIO3.9,D9,?..."
|
|
bitfld.long 0x00 16.--17. " P3.8 ,Port 3 Pin 8 Function" "GPIO3.8,D8,?..."
|
|
bitfld.long 0x00 14.--15. " P3.7 ,Port 3 Pin 7 Function" "GPIO3.7,D7,?..."
|
|
bitfld.long 0x00 12.--13. " P3.6 ,Port 3 Pin 6 Function" "GPIO3.6,D6,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " P3.5 ,Port 3 Pin 5 Function" "GPIO3.5,D5,?..."
|
|
bitfld.long 0x00 8.--9. " P3.4 ,Port 3 Pin 4 Function" "GPIO3.4,D4,?..."
|
|
bitfld.long 0x00 6.--7. " P3.3 ,Port 3 Pin 3 Function" "GPIO3.3,D3,?..."
|
|
bitfld.long 0x00 4.--5. " P3.2 ,Port 3 Pin 2 Function" "GPIO3.2,D2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " P3.1 ,Port 3 Pin 1 Function" "GPIO3.1,D1,?..."
|
|
bitfld.long 0x00 0.--1. " P3.0 ,Port 3 Pin 0 Function" "GPIO3.0,D0,?..."
|
|
width 0xa
|
|
sif (cpu()=="LPC2458")
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "PINSEL7,Pin function select register 7"
|
|
bitfld.long 0x00 20.--21. " P3.26 ,Port 3 Pin 26 Function" "GPIO3.26,Reserved,MAT0[1],PWM1[3]"
|
|
bitfld.long 0x00 18.--19. " P3.25 ,Port 3 Pin 25 Function" "GPIO3.25,Reserved,MAT0[0],PWM1[2]"
|
|
bitfld.long 0x00 16.--17. " P3.24 ,Port 3 Pin 24 Function" "GPIO3.24,Reserved,CAP0[1],PWM1[1]"
|
|
bitfld.long 0x00 14.--15. " P3.23 ,Port 3 Pin 23 Function" "GPIO3.23,Reserved,CAP0[0],PCAP1[0]"
|
|
endif
|
|
width 0xa
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "PINSEL7,Pin function select register 7"
|
|
bitfld.long 0x00 30.--31. " P3.31 ,Port 3 Pin 31 Function" "GPIO3.31,D31,MAT1[2],?..."
|
|
bitfld.long 0x00 28.--29. " P3.30 ,Port 3 Pin 30 Function" "GPIO3.30,D30,MAT1[1],RTS1"
|
|
bitfld.long 0x00 26.--27. " P3.29 ,Port 3 Pin 29 Function" "GPIO3.29,D29,MAT1[0],PWM1[6]"
|
|
bitfld.long 0x00 24.--25. " P3.28 ,Port 3 Pin 28 Function" "GPIO3.28,D28,CAP1[1],PWM1[5]"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P3.27 ,Port 3 Pin 27 Function" "GPIO3.27,D27,CAP1[0],PWM1[4]"
|
|
bitfld.long 0x00 20.--21. " P3.26 ,Port 3 Pin 26 Function" "GPIO3.26,D26,MAT0[1],PWM1[3]"
|
|
bitfld.long 0x00 18.--19. " P3.25 ,Port 3 Pin 25 Function" "GPIO3.25,D25,MAT0[0],PWM1[2]"
|
|
bitfld.long 0x00 16.--17. " P3.24 ,Port 3 Pin 24 Function" "GPIO3.24,D24,CAP0[1],PWM1[1]"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P3.23 ,Port 3 Pin 23 Function" "GPIO3.23,D23,CAP0[0],PCAP1[0]"
|
|
bitfld.long 0x00 12.--13. " P3.22 ,Port 3 Pin 22 Function" "GPIO3.22,D22,PCAP0[0],RI1"
|
|
bitfld.long 0x00 10.--11. " P3.21 ,Port 3 Pin 21 Function" "GPIO3.21,D21,PWM0[6],DR1"
|
|
bitfld.long 0x00 8.--9. " P3.20 ,Port 3 Pin 20 Function" "GPIO3.20,D20,PWM0[5],DSR1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P3.19 ,Port 3 Pin 19 Function" "GPIO3.19,D19,PWM0[4],DCD1"
|
|
bitfld.long 0x00 4.--5. " P3.18 ,Port 3 Pin 18 Function" "GPIO3.18,D18,PWM0[3],CTS1"
|
|
bitfld.long 0x00 2.--3. " P3.17 ,Port 3 Pin 17 Function" "GPIO3.17,D17,PWM0[2],RXD1"
|
|
bitfld.long 0x00 0.--1. " P3.16 ,Port 3 Pin 16 Function" "GPIO3.16,D16,PWM0[1],TXD1"
|
|
endif
|
|
width 0xa
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "PINSEL8,Pin function select register 8"
|
|
bitfld.long 0x00 30.--31. " P4.15 ,Port 4 Pin 15 Function" "GPIO4.15,A15,?..."
|
|
bitfld.long 0x00 28.--29. " P4.14 ,Port 4 Pin 14 Function" "GPIO4.14,A14,?..."
|
|
bitfld.long 0x00 26.--27. " P4.13 ,Port 4 Pin 13 Function" "GPIO4.13,A13,?..."
|
|
bitfld.long 0x00 24.--25. " P4.12 ,Port 4 Pin 12 Function" "GPIO4.12,A12,?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P4.11 ,Port 4 Pin 11 Function" "GPIO4.11,A11,?..."
|
|
bitfld.long 0x00 20.--21. " P4.10 ,Port 4 Pin 10 Function" "GPIO4.10,A10,?..."
|
|
bitfld.long 0x00 18.--19. " P4.9 ,Port 4 Pin 9 Function" "GPIO4.9,A9,?..."
|
|
bitfld.long 0x00 16.--17. " P4.8 ,Port 4 Pin 8 Function" "GPIO4.8,A8,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P4.7 ,Port 4 Pin 7 Function" "GPIO4.7,A7,?..."
|
|
bitfld.long 0x00 12.--13. " P4.6 ,Port 4 Pin 6 Function" "GPIO4.6,A6,?..."
|
|
bitfld.long 0x00 10.--11. " P4.5 ,Port 4 Pin 5 Function" "GPIO4.5,A5,?..."
|
|
bitfld.long 0x00 8.--9. " P4.4 ,Port 4 Pin 4 Function" "GPIO4.4,A4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P4.3 ,Port 4 Pin 3 Function" "GPIO4.3,A3,?..."
|
|
bitfld.long 0x00 4.--5. " P4.2 ,Port 4 Pin 2 Function" "GPIO4.2,A2,?..."
|
|
bitfld.long 0x00 2.--3. " P4.1 ,Port 4 Pin 1 Function" "GPIO4.1,A1,?..."
|
|
bitfld.long 0x00 0.--1. " P4.0 ,Port 4 Pin 0 Function" "GPIO4.0,A0,?..."
|
|
width 0xa
|
|
sif (cpu()=="LPC2458")
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PINSEL9,Pin function select register 9"
|
|
bitfld.long 0x00 30.--31. " P4.31 ,Port 4 Pin 31 Function" "GPIO4.31,/CS1,?..."
|
|
bitfld.long 0x00 28.--29. " P4.30 ,Port 4 Pin 30 Function" "GPIO4.30,/CS0,?..."
|
|
bitfld.long 0x00 26.--27. " P4.29 ,Port 4 Pin 29 Function" "GPIO4.29,Reserved,MAT2[1],RXD3"
|
|
bitfld.long 0x00 24.--25. " P4.28 ,Port 4 Pin 28 Function" "GPIO4.28,Reserved,MAT2[0],TXD3"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P4.27 ,Port 4 Pin 27 Function" "GPIO4.27,BLS1,?..."
|
|
bitfld.long 0x00 20.--21. " P4.26 ,Port 4 Pin 26 Function" "GPIO4.26,BLS0,?..."
|
|
bitfld.long 0x00 18.--19. " P4.25 ,Port 4 Pin 25 Function" "GPIO4.25,/WE,?..."
|
|
bitfld.long 0x00 16.--17. " P4.24 ,Port 4 Pin 24 Function" "GPIO4.24,/OE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P4.20 ,Port 4 Pin 20 Function" "GPIO4.20,A20,SDA2,SCK1"
|
|
bitfld.long 0x00 6.--7. " P4.19 ,Port 4 Pin 19 Function" "GPIO4.19,A19,?..."
|
|
bitfld.long 0x00 4.--5. " P4.18 ,Port 4 Pin 18 Function" "GPIO4.18,A18,?..."
|
|
bitfld.long 0x00 2.--3. " P4.17 ,Port 4 Pin 17 Function" "GPIO4.17,A17,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P4.16 ,Port 4 Pin 16 Function" "GPIO4.16,A16,?..."
|
|
endif
|
|
width 0xa
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PINSEL9,Pin function select register 9"
|
|
bitfld.long 0x00 30.--31. " P4.31 ,Port 4 Pin 31 Function" "GPIO4.31,/CS1,?..."
|
|
bitfld.long 0x00 28.--29. " P4.30 ,Port 4 Pin 30 Function" "GPIO4.30,/CS0,?..."
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " P4.29 ,Port 4 Pin 29 Function" "GPIO4.29,BLS3,MAT2[1]/LCDVD[7/11/3],RXD3"
|
|
bitfld.long 0x00 24.--25. " P4.28 ,Port 4 Pin 28 Function" "GPIO4.28,BLS2,MAT2[0]/LCDVD[6/10/2],TXD3"
|
|
else
|
|
bitfld.long 0x00 26.--27. " P4.29 ,Port 4 Pin 29 Function" "GPIO4.29,BLS3,MAT2[1],RXD3"
|
|
bitfld.long 0x00 24.--25. " P4.28 ,Port 4 Pin 28 Function" "GPIO4.28,BLS2,MAT2[0],TXD3"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " P4.27 ,Port 4 Pin 27 Function" "GPIO4.27,BLS1,?..."
|
|
bitfld.long 0x00 20.--21. " P4.26 ,Port 4 Pin 26 Function" "GPIO4.26,BLS0,?..."
|
|
bitfld.long 0x00 18.--19. " P4.25 ,Port 4 Pin 25 Function" "GPIO4.25,/WE,?..."
|
|
bitfld.long 0x00 16.--17. " P4.24 ,Port 4 Pin 24 Function" "GPIO4.24,/OE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " P4.23 ,Port 4 Pin 23 Function" "GPIO4.23,A23,RXD2,MOSI1"
|
|
bitfld.long 0x00 12.--13. " P4.22 ,Port 4 Pin 22 Function" "GPIO4.22,A22,TXD2,MISO1"
|
|
bitfld.long 0x00 10.--11. " P4.21 ,Port 4 Pin 21 Function" "GPIO4.21,A21,SCL2,SSEL1"
|
|
bitfld.long 0x00 8.--9. " P4.20 ,Port 4 Pin 20 Function" "GPIO4.20,A20,SDA2,SCK1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P4.19 ,Port 4 Pin 19 Function" "GPIO4.19,A19,?..."
|
|
bitfld.long 0x00 4.--5. " P4.18 ,Port 4 Pin 18 Function" "GPIO4.18,A18,?..."
|
|
bitfld.long 0x00 2.--3. " P4.17 ,Port 4 Pin 17 Function" "GPIO4.17,A17,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P4.16 ,Port 4 Pin 16 Function" "GPIO4.16,A16,?..."
|
|
endif
|
|
width 0xa
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PINSEL10,Pin function select register 10"
|
|
bitfld.long 0x00 3. " GPIO/TRACE ,ETM interface pins control" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "PINSEL11,Pin function select register 11"
|
|
bitfld.long 0x00 1.--3. " LCDM[2:0] ,LCD Mode" "4-bit mono STN single,8-bit mono STN single/color STN single,4-bit mono STN dual,Color STN dual/8-bit mono STN dual,TFT 12-bit (4:4:4),TFT 16-bit (5:6:5),TFT 16-bit (1:5:5:5),TFT 24-bit"
|
|
bitfld.long 0x00 0. " LCDPE ,LCD Port Enable" "Disabled,Enabled"
|
|
endif
|
|
width 0xA
|
|
tree.open "Pin mode select registers"
|
|
tree "Pin mode select registers 0-3"
|
|
group.long 0x40++0xF
|
|
line.long 0x0 "PINMODE0,Pin mode select register 0"
|
|
bitfld.long 0x0 30.--31. " P0.15MODE ,PORT0 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 28.--29. " P0.14MODE ,PORT0 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 26.--27. " P0.13MODE ,PORT0 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 24.--25. " P0.12MODE ,PORT0 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " P0.11MODE ,PORT0 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 20.--21. " P0.10MODE ,PORT0 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P0.09MODE ,PORT0 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 16.--17. " P0.08MODE ,PORT0 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P0.07MODE ,PORT0 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 12.--13. " P0.06MODE ,PORT0 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 10.--11. " P0.05MODE ,PORT0 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 8.--9. " P0.04MODE ,PORT0 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " P0.03MODE ,PORT0 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 4.--5. " P0.02MODE ,PORT0 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P0.01MODE ,PORT0 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 0.--1. " P0.00MODE ,PORT0 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x4 "PINMODE1,Pin mode select register 1"
|
|
bitfld.long 0x4 20.--21. " P0.26MODE ,PORT0 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 18.--19. " P0.25MODE ,PORT0 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 16.--17. " P0.24MODE ,PORT0 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 14.--15. " P0.23MODE ,PORT0 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 12.--13. " P0.22MODE ,PORT0 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 10.--11. " P0.21MODE ,PORT0 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 8.--9. " P0.20MODE ,PORT0 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 6.--7. " P0.19MODE ,PORT0 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 4.--5. " P0.18MODE ,PORT0 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 2.--3. " P0.17MODE ,PORT0 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " P0.16MODE ,PORT0 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x8 "PINMODE2,Pin mode select register 2"
|
|
bitfld.long 0x8 30.--31. " P1.15MODE ,PORT1 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 28.--29. " P1.14MODE ,PORT1 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 26.--27. " P1.13MODE ,PORT1 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 24.--25. " P1.12MODE ,PORT1 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 22.--23. " P1.11MODE ,PORT1 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 20.--21. " P1.10MODE ,PORT1 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 18.--19. " P1.09MODE ,PORT1 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 16.--17. " P1.08MODE ,PORT1 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 14.--15. " P1.07MODE ,PORT1 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 12.--13. " P1.06MODE ,PORT1 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 10.--11. " P1.05MODE ,PORT1 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 8.--9. " P1.04MODE ,PORT1 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 6.--7. " P1.03MODE ,PORT1 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 4.--5. " P1.02MODE ,PORT1 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 2.--3. " P1.01MODE ,PORT1 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 0.--1. " P1.00MODE ,PORT1 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0xC "PINMODE3,Pin mode select register 3"
|
|
bitfld.long 0xC 30.--31. " P1.31MODE ,PORT1 pin 31 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 28.--29. " P1.30MODE ,PORT1 pin 30 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 26.--27. " P1.29MODE ,PORT1 pin 29 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 24.--25. " P1.28MODE ,PORT1 pin 28 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 22.--23. " P1.27MODE ,PORT1 pin 27 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 20.--21. " P1.26MODE ,PORT1 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 18.--19. " P1.25MODE ,PORT1 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 16.--17. " P1.24MODE ,PORT1 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 14.--15. " P1.23MODE ,PORT1 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 12.--13. " P1.22MODE ,PORT1 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 10.--11. " P1.21MODE ,PORT1 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 8.--9. " P1.20MODE ,PORT1 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 6.--7. " P1.19MODE ,PORT1 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 4.--5. " P1.18MODE ,PORT1 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 2.--3. " P1.17MODE ,PORT1 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 0.--1. " P1.16MODE ,PORT1 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
tree.end
|
|
tree "Pin mode select registers 4-7"
|
|
group.long 0x50++0xF
|
|
line.long 0x0 "PINMODE4,Pin mode select register 4"
|
|
bitfld.long 0x0 30.--31. " P2.15MODE ,PORT2 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 28.--29. " P2.14MODE ,PORT2 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 26.--27. " P2.13MODE ,PORT2 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 24.--25. " P2.12MODE ,PORT2 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " P2.11MODE ,PORT2 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 20.--21. " P2.10MODE ,PORT2 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P2.09MODE ,PORT2 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 16.--17. " P2.08MODE ,PORT2 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P2.07MODE ,PORT2 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 12.--13. " P2.06MODE ,PORT2 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 10.--11. " P2.05MODE ,PORT2 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 8.--9. " P2.04MODE ,PORT2 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " P2.03MODE ,PORT2 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 4.--5. " P2.02MODE ,PORT2 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P2.01MODE ,PORT2 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 0.--1. " P2.00MODE ,PORT2 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x4 "PINMODE5,Pin mode select register 5"
|
|
bitfld.long 0x4 30.--31. " P2.31MODE ,PORT2 pin 31 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 28.--29. " P2.30MODE ,PORT2 pin 30 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 26.--27. " P2.29MODE ,PORT2 pin 29 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 24.--25. " P2.28MODE ,PORT2 pin 28 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 22.--23. " P2.27MODE ,PORT2 pin 27 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 20.--21. " P2.26MODE ,PORT2 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " P2.25MODE ,PORT2 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 16.--17. " P2.24MODE ,PORT2 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 14.--15. " P2.23MODE ,PORT2 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 12.--13. " P2.22MODE ,PORT2 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 10.--11. " P2.21MODE ,PORT2 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 8.--9. " P2.20MODE ,PORT2 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 6.--7. " P2.19MODE ,PORT2 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 4.--5. " P2.18MODE ,PORT2 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " P2.17MODE ,PORT2 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 0.--1. " P2.16MODE ,PORT2 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x8 "PINMODE6,Pin mode select register 6"
|
|
bitfld.long 0x8 30.--31. " P3.15MODE ,PORT3 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 28.--29. " P3.14MODE ,PORT3 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 26.--27. " P3.13MODE ,PORT3 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 24.--25. " P3.12MODE ,PORT3 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 22.--23. " P3.11MODE ,PORT3 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 20.--21. " P3.10MODE ,PORT3 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 18.--19. " P3.09MODE ,PORT3 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 16.--17. " P3.08MODE ,PORT3 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 14.--15. " P3.07MODE ,PORT3 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 12.--13. " P3.06MODE ,PORT3 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 10.--11. " P3.05MODE ,PORT3 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 8.--9. " P3.04MODE ,PORT3 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 6.--7. " P3.03MODE ,PORT3 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 4.--5. " P3.02MODE ,PORT3 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x8 2.--3. " P3.01MODE ,PORT3 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x8 0.--1. " P3.00MODE ,PORT3 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0xC "PINMODE7,Pin mode select register 7"
|
|
bitfld.long 0xC 30.--31. " P3.31MODE ,PORT3 pin 31 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 28.--29. " P3.30MODE ,PORT3 pin 30 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 26.--27. " P3.29MODE ,PORT3 pin 29 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 24.--25. " P3.28MODE ,PORT3 pin 28 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 22.--23. " P3.27MODE ,PORT3 pin 27 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 20.--21. " P3.26MODE ,PORT3 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 18.--19. " P3.25MODE ,PORT3 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 16.--17. " P3.24MODE ,PORT3 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 14.--15. " P3.23MODE ,PORT3 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 12.--13. " P3.22MODE ,PORT3 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 10.--11. " P3.21MODE ,PORT3 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 8.--9. " P3.20MODE ,PORT3 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 6.--7. " P3.19MODE ,PORT3 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 4.--5. " P3.18MODE ,PORT3 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0xC 2.--3. " P3.17MODE ,PORT3 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0xC 0.--1. " P3.16MODE ,PORT3 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
tree.end
|
|
tree "Pin mode select registers 8-9"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "PINMODE8,Pin mode select register 8"
|
|
bitfld.long 0x0 30.--31. " P4.15MODE ,PORT4 pin 15 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 28.--29. " P4.14MODE ,PORT4 pin 14 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 26.--27. " P4.13MODE ,PORT4 pin 13 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 24.--25. " P4.12MODE ,PORT4 pin 12 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " P4.11MODE ,PORT4 pin 11 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 20.--21. " P4.10MODE ,PORT4 pin 10 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " P4.09MODE ,PORT4 pin 9 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 16.--17. " P4.08MODE ,PORT4 pin 8 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " P4.07MODE ,PORT4 pin 7 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 12.--13. " P4.06MODE ,PORT4 pin 6 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 10.--11. " P4.05MODE ,PORT4 pin 5 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 8.--9. " P4.04MODE ,PORT4 pin 4 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " P4.03MODE ,PORT4 pin 3 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 4.--5. " P4.02MODE ,PORT4 pin 2 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " P4.01MODE ,PORT4 pin 1 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x0 0.--1. " P4.00MODE ,PORT4 pin 0 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
line.long 0x4 "PINMODE9,Pin mode select register 9"
|
|
bitfld.long 0x4 30.--31. " P4.31MODE ,PORT4 pin 31 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 28.--29. " P4.30MODE ,PORT4 pin 30 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 26.--27. " P4.29MODE ,PORT4 pin 29 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 24.--25. " P4.28MODE ,PORT4 pin 28 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 22.--23. " P4.27MODE ,PORT4 pin 27 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 20.--21. " P4.26MODE ,PORT4 pin 26 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " P4.25MODE ,PORT4 pin 25 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 16.--17. " P4.24MODE ,PORT4 pin 24 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 14.--15. " P4.23MODE ,PORT4 pin 23 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 12.--13. " P4.22MODE ,PORT4 pin 22 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 10.--11. " P4.21MODE ,PORT4 pin 21 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 8.--9. " P4.20MODE ,PORT4 pin 20 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 6.--7. " P4.19MODE ,PORT4 pin 19 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 4.--5. " P4.18MODE ,PORT4 pin 18 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " P4.17MODE ,PORT4 pin 17 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
bitfld.long 0x4 0.--1. " P4.16MODE ,PORT4 pin 16 on-chip pull-up/down resistor control" "Pull-up,Reserved,No pull resistor,Pull-down"
|
|
tree.end
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; SCB
|
|
; --------------------------------------------------------------------------------
|
|
tree "SCB (System Control Block)"
|
|
sif (cpu()=="LPC2104"||cpu()=="LPC2105"||cpu()=="LPC2106")
|
|
width 0x09
|
|
base 0xE01FC000
|
|
group.byte 0x140++0x00
|
|
line.byte 0x00 "EXTINT,External Interrupt Flag Register"
|
|
bitfld.byte 0x00 0. " EINT0 ,External Interrupt 0" "Not occured,Occured"
|
|
bitfld.byte 0x00 1. " EINT1 ,External Interrupt 1" "Not occured,Occured"
|
|
bitfld.byte 0x00 2. " EINT2 ,External Interrupt 2" "Not occured,Occured"
|
|
group.byte 0x144++0x0
|
|
line.byte 0x0 "EXTWAKE,External Interrupt Wakeup Register"
|
|
bitfld.byte 0x0 0. " EXTWAKE0 ,EINT0 wakes up processor" "No wake,Wake"
|
|
bitfld.byte 0x0 1. " EXTWAKE1 ,EINT1 wakes up processor" "No wake,Wake"
|
|
bitfld.byte 0x0 2. " EXTWAKE2 ,EINT2 wakes up processor" "No wake,Wake"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "MEMMAP,Memory Mapping Control"
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot Loader,Flash,RAM,Ext.mem."
|
|
group.byte 0x80++0x0
|
|
line.byte 0x00 "PLLCON,PLL Control Register"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "OSC,PLL"
|
|
group.byte 0x84++0x0
|
|
line.byte 0x0 "PLLCFG,PLL Configuration Register"
|
|
bitfld.byte 0x0 0.--4. " MSEL ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.byte 0x0 5.--6. " PSEL ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
rgroup.word 0x88++0x01
|
|
line.word 0x00 "PLLSTAT,PLL Status Register"
|
|
bitfld.word 0x00 0.--4. " MSEL ,Read Back PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.word 0x00 5.--6. " PSEL ,Read Back PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
bitfld.word 0x00 8. " PLLE ,Read Back PLL Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " PLLC ,Read Back PLL Connect Bit" "OSC,PLL"
|
|
bitfld.word 0x00 10. " PLOCK ,PLL Locked Bit" "Not locked,Locked"
|
|
wgroup.byte 0x8C++0x00
|
|
line.byte 0x00 "PLLFEED,PLL Feed Register"
|
|
group.byte 0xC0++0x0
|
|
line.byte 0x00 "PCON,Power Control Register"
|
|
bitfld.byte 0x00 0. " IDL ,Idle Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PD ,Power Down Mode" "Disabled,Enabled"
|
|
group.long 0xc4++0x03
|
|
line.long 0x0 "PCONP,Power Control for Peripherals"
|
|
bitfld.long 0x0 1. " PCTIM0 ,Timer 0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " PCTIM1 ,Timer 1 Power" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " PCURT0 ,UART 0 Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PCURT1 ,UART 1 Power" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " PCPWM0 ,PWM0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " PCI2C ,I2C Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 8. " PCSPI ,SPI Power" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " PCRTC ,RTC Power" "Disabled,Enabled"
|
|
group.long 0x100++0x00
|
|
line.byte 0x00 "VPBDIV,VPB Divider Control Register"
|
|
bitfld.byte 0x00 0.--1. " VPBDIV ,VPB Clock Divider Value" "One fourth,The same,One half,?..."
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2114"||cpu()=="LPC2124"||cpu()=="LPC2212"||cpu()=="LPC2214")
|
|
width 0x0A
|
|
base 0xE01FC000
|
|
group.byte 0x140++0x0
|
|
line.byte 0x00 "EXTINT,External Interrupt Flag Register"
|
|
eventfld.byte 0x00 0. " EINT0 ,External Interrupt 0" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 1. " EINT1 ,External Interrupt 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 2. " EINT2 ,External Interrupt 2" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 3. " EINT3 ,External Interrupt 3" "Not occurred,Occurred"
|
|
group.byte 0x144++0x0
|
|
line.byte 0x00 "EXTWAKE,External Interrupt Wakeup Register"
|
|
bitfld.byte 0x00 0. " EXTWAKE0 ,EINT0 wakes up processor" "No wake,Wake"
|
|
bitfld.byte 0x00 1. " EXTWAKE1 ,EINT1 wakes up processor" "No wake,Wake"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EXTWAKE2 ,EINT2 wakes up processor" "No wake,Wake"
|
|
bitfld.byte 0x00 3. " EXTWAKE3 ,EINT3 wakes up processor" "No wake,Wake"
|
|
group.byte 0x148++0x0
|
|
line.byte 0x00 "EXTMODE,External Interrupt Mode Register"
|
|
bitfld.byte 0x00 0. " EXTMODE0 ,External Interrupt 0 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 1. " EXTMODE1 ,External Interrupt 1 Mode" "Level,Edge"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EXTMODE2 ,External Interrupt 2 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 3. " EXTMODE3 ,External Interrupt 3 Mode" "Level,Edge"
|
|
group.byte 0x14c++0x0
|
|
line.byte 0x00 "EXTPOLAR,External Interrupt Polarity Register"
|
|
bitfld.byte 0x00 0. " EXTPOLAR0 ,External Interrupt 0 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 1. " EXTPOLAR1 ,External Interrupt 1 Polarity" "Low/Falling,High/Rising"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EXTPOLAR2 ,External Interrupt 2 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 3. " EXTPOLAR3 ,External Interrupt 3 Polarity" "Low/Falling,High/Rising"
|
|
group.byte 0x040++0x00
|
|
line.byte 0x00 "MEMMAP,Memory Mapping Control"
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot Loader,Flash,RAM,Ext.mem."
|
|
group.byte 0x080++0x0
|
|
line.byte 0x00 "PLLCON,PLL Control Register"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "OSC,PLL"
|
|
group.byte 0x84++0x0
|
|
line.byte 0x00 "PLLCFG,PLL Configuration Register"
|
|
bitfld.byte 0x00 0.--4. " MSEL ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.byte 0x00 5.--6. " PSEL ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
rgroup.word 0x088++0x01
|
|
line.word 0x00 "PLLSTAT,PLL Status Register"
|
|
bitfld.word 0x00 0.--4. " MSEL ,Read Back PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.word 0x00 5.--6. " PSEL ,Read Back PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PLLE ,Read Back PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " PLLC ,Read Back PLL Connect Bit" "OSC,PLL"
|
|
textline " "
|
|
bitfld.word 0x00 10. " PLOCK ,PLL Locked Bit" "Not locked,Locked"
|
|
wgroup.byte 0x08C++0x00
|
|
line.byte 0x00 "PLLFEED,PLL Feed Register"
|
|
group.byte 0x0C0++0x00
|
|
line.byte 0x00 "PCON,Power Control Register"
|
|
bitfld.byte 0x00 0. " IDL ,Idle Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PD ,Power Down Mode" "Disabled,Enabled"
|
|
group.long 0xc4++0x3
|
|
line.long 0x00 "PCONP,Power Control for Peripherals"
|
|
bitfld.long 0x00 1. " PCTIM0 ,Timer 0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PCTIM1 ,Timer 1 Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PCURT0 ,UART 0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PCURT1 ,UART 1 Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PCPWM0 ,PWM0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PCI2C ,I2C Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PCSPI0 ,SPI0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PCRTC ,RTC Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PCSPI1 ,SPI1 Power" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2212"||cpu()=="LPC2214")
|
|
bitfld.long 0x00 11. " PCEMC ,EMC Power" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 12. " PCAD ,A/D Power" "Disabled,Enabled"
|
|
group.byte 0x100++0x00
|
|
line.byte 0x00 "VPBDIV,VPB Divider Control Register"
|
|
bitfld.byte 0x00 0.--1. " VPBDIV ,VPB Clock Divider Value" "One fourth,The same,One half,?..."
|
|
sif (cpu()=="LPC2212"||cpu()=="LPC2214")
|
|
bitfld.byte 0x00 4.--5. " XCLKDIV ,A23/XCLK Clock Divider Value" "One fourth,The same,One half,?..."
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2290"||cpu()=="LPC2292"||cpu()=="LPC2194"||cpu()=="LPC2294")
|
|
width 0x0A
|
|
base 0xE01FC000
|
|
group.byte 0x140++0x00
|
|
line.byte 0x00 "EXTINT,External Interrupt Flag Register"
|
|
bitfld.byte 0x00 0. " EINT0 ,External Interrupt 0" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " EINT1 ,External Interrupt 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EINT2 ,External Interrupt 2" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " EINT3 ,External Interrupt 3" "Not occurred,Occurred"
|
|
group.byte 0x144++0x00
|
|
line.byte 0x00 "EXTWAKE,External Interrupt Wakeup Register"
|
|
bitfld.byte 0x00 0. " EXTWAKE0 ,EINT0 wakes up processor" "No wake,Wake"
|
|
bitfld.byte 0x00 1. " EXTWAKE1 ,EINT1 wakes up processor" "No wake,Wake"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EXTWAKE2 ,EINT2 wakes up processor" "No wake,Wake"
|
|
bitfld.byte 0x00 3. " EXTWAKE3 ,EINT3 wakes up processor" "No wake,Wake"
|
|
group.byte 0x148++0x00
|
|
line.byte 0x00 "EXTMODE,External Interrupt Mode Register"
|
|
bitfld.byte 0x00 0. " EXTMODE0 ,External Interrupt 0 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 1. " EXTMODE1 ,External Interrupt 1 Mode" "Level,Edge"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EXTMODE2 ,External Interrupt 2 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 3. " EXTMODE3 ,External Interrupt 3 Mode" "Level,Edge"
|
|
group.byte 0x14c++0x00
|
|
line.byte 0x00 "EXTPOLAR,External Interrupt Polarity Register"
|
|
bitfld.byte 0x00 0. " EXTPOLAR0 ,External Interrupt 0 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 1. " EXTPOLAR1 ,External Interrupt 1 Polarity" "Low/Falling,High/Rising"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EXTPOLAR2 ,External Interrupt 2 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 3. " EXTPOLAR3 ,External Interrupt 3 Polarity" "Low/Falling,High/Rising"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "MEMMAP,Memory Mapping Control"
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot Loader,Flash,RAM,Ext.mem."
|
|
group.byte 0x80++0x00
|
|
line.byte 0x00 "PLLCON,PLL Control Register"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "OSC,PLL"
|
|
group.byte 0x84++0x00
|
|
line.byte 0x00 "PLLCFG,PLL Configuration Register"
|
|
bitfld.byte 0x00 0.--4. " MSEL ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.byte 0x00 5.--6. " PSEL ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
rgroup.word 0x88++0x01
|
|
line.word 0x00 "PLLSTAT,PLL Status Register"
|
|
bitfld.word 0x00 0.--4. " MSEL ,Read Back PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.word 0x00 5.--6. " PSEL ,Read Back PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PLLE ,Read Back PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " PLLC ,Read Back PLL Connect Bit" "OSC,PLL"
|
|
textline " "
|
|
bitfld.word 0x00 10. " PLOCK ,PLL Locked Bit" "Not locked,Locked"
|
|
wgroup.byte 0x8C++0x00
|
|
line.byte 0x00 "PLLFEED,PLL Feed Register"
|
|
group.byte 0xC0++0x00
|
|
line.byte 0x00 "PCON,Power Control Register"
|
|
bitfld.byte 0x00 0. " IDL ,Idle Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PD ,Power Down Mode" "Disabled,Enabled"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCONP,Power Control for Peripherals"
|
|
bitfld.long 0x00 1. " PCTIM0 ,Timer 0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PCTIM1 ,Timer 1 Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PCURT0 ,UART 0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PCURT1 ,UART 1 Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PCPWM0 ,PWM0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PCI2C ,I2C Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PCSPI0 ,SPI0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PCRTC ,RTC Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PCSPI1 ,SPI1 Power" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2294")
|
|
textline " "
|
|
bitfld.long 0x00 11. " PCEMC ,EMC Power" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCAD ,A/D Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PCCAN1 ,CAN1 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PCCAN2 ,CAN2 Power" "Disabled,Enabled"
|
|
group.byte 0x100++0x00
|
|
line.byte 0x00 "VPBDIV,VPB Divider Control Register"
|
|
bitfld.byte 0x00 0.--1. " VPBDIV ,VPB Clock Divider Value" "One fourth,The same,One half,?..."
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2294")
|
|
bitfld.byte 0x00 4.--5. " XCLKDIV ,A23/XCLK Clock Divider Value" "One fourth,The same,One half,?..."
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
width 0x0A
|
|
group.byte ad:0xE01FC140++0x0
|
|
line.byte 0x00 "EXTINT,External Interrupt Flag Register"
|
|
bitfld.byte 0x00 0. " EINT0 ,External Interrupt 0" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " EINT1 ,External Interrupt 1" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 2. " EINT2 ,External Interrupt 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EINT3 ,External Interrupt 3" "Not occurred,Occurred"
|
|
group.byte ad:0xE01FC144++0x0
|
|
line.byte 0x00 "EXTWAKE,External Interrupt Wakeup Register"
|
|
bitfld.byte 0x00 0. " EXTWAKE0 ,EINT0 wakes up processor" "No wake,Wake"
|
|
bitfld.byte 0x00 1. " EXTWAKE1 ,EINT1 wakes up processor" "No wake,Wake"
|
|
bitfld.byte 0x00 2. " EXTWAKE2 ,EINT2 wakes up processor" "No wake,Wake"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EXTWAKE3 ,EINT3 wakes up processor" "No wake,Wake"
|
|
group.byte ad:0xE01FC148++0x0
|
|
line.byte 0x00 "EXTMODE,External Interrupt Mode Register"
|
|
bitfld.byte 0x00 0. " EXTMODE0 ,External Interrupt 0 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 1. " EXTMODE1 ,External Interrupt 1 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 2. " EXTMODE2 ,External Interrupt 2 Mode" "Level,Edge"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EXTMODE3 ,External Interrupt 3 Mode" "Level,Edge"
|
|
group.byte ad:0xE01FC14c++0x0
|
|
line.byte 0x00 "EXTPOLAR,External Interrupt Polarity Register"
|
|
bitfld.byte 0x00 0. " EXTPOLAR0 ,External Interrupt 0 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 1. " EXTPOLAR1 ,External Interrupt 1 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 2. " EXTPOLAR2 ,External Interrupt 2 Polarity" "Low/Falling,High/Rising"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EXTPOLAR3 ,External Interrupt 3 Polarity" "Low/Falling,High/Rising"
|
|
group.byte ad:0xE01FC1A0++0x0
|
|
line.byte 0x00 "SCS,System Control and Status flags register"
|
|
bitfld.byte 0x00 0. " GPIO0M ,GPIO port 0 mode selection" "Normal,High speed"
|
|
bitfld.byte 0x00 0. " GPIO1M ,GPIO port 1 mode selection" "Normal,High speed"
|
|
group.byte ad:0xE01FC040++0x0
|
|
line.byte 0x00 "MEMMAP,Memory Mapping Control"
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot Loader,Reserved,RAM,Ext.mem."
|
|
group.byte ad:0xE01FC080++0x0
|
|
line.byte 0x00 "PLLCON,PLL Control Register"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "OSC,PLL"
|
|
group.byte ad:0xE01FC084++0x0
|
|
line.byte 0x00 "PLLCFG,PLL Configuration Register"
|
|
bitfld.byte 0x00 0.--4. " MSEL ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.byte 0x00 5.--6. " PSEL ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
rgroup.word ad:0xE01FC088++0x1
|
|
line.word 0x00 "PLLSTAT,PLL Status Register"
|
|
bitfld.word 0x00 0.--4. " MSEL ,Read Back PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.word 0x00 5.--6. " PSEL ,Read Back PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
bitfld.word 0x00 8. " PLLE ,Read Back PLL Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " PLLC ,Read Back PLL Connect Bit" "OSC,PLL"
|
|
bitfld.word 0x00 10. " PLOCK ,PLL Locked Bit" "Not locked,Locked"
|
|
wgroup.byte ad:0xE01FC08C++0x0
|
|
line.byte 0x00 "PLLFEED,PLL Feed Register"
|
|
group.byte ad:0xE01FC0C0++0x0
|
|
line.byte 0x00 "PCON,Power Control Register"
|
|
bitfld.byte 0x00 0. " IDL ,Idle Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PD ,Power Down Mode" "Disabled,Enabled"
|
|
group.long ad:0xE01FC0C4++0x3
|
|
line.long 0x00 "PCONP,Power Control for Peripherals"
|
|
bitfld.long 0x00 1. " PCTIM0 ,Timer 0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PCTIM1 ,Timer 1 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PCURT0 ,UART 0 Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PCURT1 ,UART 1 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PCPWM0 ,PWM0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PCI2C ,I2C Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PCSPI0 ,SPI0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PCRTC ,RTC Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PCSPI1 ,SPI1 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PCEMC ,EMC Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PCAD ,A/D Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PCSSP ,The SSP power/clock control" "Disabled,Enabled"
|
|
group.byte ad:0xE01FC100++0x0
|
|
line.byte 0x00 "VPBDIV,VPB Divider Control Register"
|
|
bitfld.byte 0x00 0.--1. " VPBDIV ,VPB Clock Divider Value" "One fourth,The same,One half,?..."
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2132"||cpu()=="LPC2134"||cpu()=="LPC2136"||cpu()=="LPC2138"||cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xE01FC000
|
|
width 0x0A
|
|
group.byte 0x140++0x0
|
|
line.byte 0x00 "EXTINT,External Interrupt Flag Register"
|
|
bitfld.byte 0x00 0. " EINT0 ,External Interrupt 0" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " EINT1 ,External Interrupt 1" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 2. " EINT2 ,External Interrupt 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EINT3 ,External Interrupt 3" "Not occurred,Occurred"
|
|
group.word 0x144++0x1
|
|
line.word 0x00 "EXTWAKE,External Interrupt Wakeup Register"
|
|
bitfld.word 0x00 0. " EXTWAKE0 ,EINT0 wakes up processor" "No wake,Wake"
|
|
bitfld.word 0x00 1. " EXTWAKE1 ,EINT1 wakes up processor" "No wake,Wake"
|
|
bitfld.word 0x00 2. " EXTWAKE2 ,EINT2 wakes up processor" "No wake,Wake"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EXTWAKE3 ,EINT3 wakes up processor" "No wake,Wake"
|
|
bitfld.word 0x00 14. " BODWAKE ,BOD interrupt wake up processor" "No wake,Wake"
|
|
bitfld.word 0x00 15. " RTCWAKE ,RTC interrupt wake up processor" "No wake,Wake"
|
|
group.byte 0x148++0x0
|
|
line.byte 0x00 "EXTMODE,External Interrupt Mode Register"
|
|
bitfld.byte 0x00 0. " EXTMODE0 ,External Interrupt 0 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 1. " EXTMODE1 ,External Interrupt 1 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 2. " EXTMODE2 ,External Interrupt 2 Mode" "Level,Edge"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EXTMODE3 ,External Interrupt 3 Mode" "Level,Edge"
|
|
group.byte 0x14c++0x0
|
|
line.byte 0x00 "EXTPOLAR,External Interrupt Polarity Register"
|
|
bitfld.byte 0x00 0. " EXTPOLAR0 ,External Interrupt 0 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 1. " EXTPOLAR1 ,External Interrupt 1 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 2. " EXTPOLAR2 ,External Interrupt 2 Polarity" "Low/Falling,High/Rising"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EXTPOLAR3 ,External Interrupt 3 Polarity" "Low/Falling,High/Rising"
|
|
group.byte 0x40++0x0
|
|
line.byte 0x00 "MEMMAP,Memory Mapping Control"
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot Loader,Flash,RAM,?..."
|
|
group.byte 0x80++0x0
|
|
line.byte 0x00 "PLLCON,PLL Control Register"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "OSC,PLL"
|
|
group.byte 0x84++0x0
|
|
line.byte 0x00 "PLLCFG,PLL Configuration Register"
|
|
bitfld.byte 0x00 0.--4. " MSEL ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.byte 0x00 5.--6. " PSEL ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
rgroup.word 0x88++0x01
|
|
line.word 0x00 "PLLSTAT,PLL Status Register"
|
|
bitfld.word 0x00 0.--4. " MSEL ,Read Back PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.word 0x00 5.--6. " PSEL ,Read Back PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
bitfld.word 0x00 8. " PLLE ,Read Back PLL Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " PLLC ,Read Back PLL Connect Bit" "OSC,PLL"
|
|
bitfld.word 0x00 10. " PLOCK ,PLL Locked Bit" "Not locked,Locked"
|
|
wgroup.byte 0x8C++0x0
|
|
line.byte 0x00 "PLLFEED,PLL Feed Register"
|
|
group.byte 0xC0++0x0
|
|
line.byte 0x00 "PCON,Power Control Register"
|
|
bitfld.byte 0x00 0. " IDL ,Idle Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PD ,Power Down Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " BODPDM ,Brown Out Detection Power-down Mode" "Power-up,Power-down"
|
|
sif (cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
textline " "
|
|
bitfld.byte 0x00 3. " BOGD ,Brown Out Global Disable" "Enabled,Disabled"
|
|
bitfld.byte 0x00 4. " BORD ,Brown Out Reset Disable" "Enabled,Disabled"
|
|
endif
|
|
group.long 0xc4++0x3
|
|
line.long 0x00 "PCONP,Power Control for Peripherals"
|
|
bitfld.long 0x00 1. " PCTIM0 ,Timer 0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PCTIM1 ,Timer 1 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PCUART0 ,UART 0 Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PCUART1 ,UART 1 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PCPWM0 ,PWM0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PCI2C0 ,I2C Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PCSPI0 ,SPI0 Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PCRTC ,RTC Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PCSPI1 ,SPI1 Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCAD0 ,A/D Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " PCI2C1 ,I2C Power" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PCAD1 ,ADC 1 Power" "Disabled,Enabled"
|
|
group.byte 0x180++0x0
|
|
line.byte 0x00 "RSIR,Reset Source Identification Register"
|
|
bitfld.byte 0x00 0. " POR ,POR signal" "Low,High"
|
|
bitfld.byte 0x00 1. " EXTR ,/RESET signal" "Low,High"
|
|
bitfld.byte 0x00 2. " WDTR ,Watchdog Times out" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " BODR ,Brown Out Detection signal" "Low,High"
|
|
group.byte 0x100++0x0
|
|
line.byte 0x00 "APBDIV,APB Divider Control Register"
|
|
bitfld.byte 0x00 0.--1. " APBDIV ,APB Clock Divider Value" "One fourth,The same,One half,?..."
|
|
rgroup.byte 0x184++0x0
|
|
line.byte 0x00 "CSPR,Code Security Protection Register"
|
|
sif (cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "SCS,System Control and Status flags register"
|
|
bitfld.long 0x00 0. " GPIO0M ,GPIO port 0 mode selection" "Normal,High speed"
|
|
bitfld.long 0x00 1. " GPIO1M ,GPIO port 1 mode selection" "Normal,High speed"
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
width 0x0A
|
|
base 0xE01FC140
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "EXTINT,External Interrupt Flag Register"
|
|
bitfld.byte 0x00 0. " EINT0 ,External Interrupt 0" "Not occured,Occured"
|
|
bitfld.byte 0x00 1. " EINT1 ,External Interrupt 1" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EINT2 ,External Interrupt 2" "Not occured,Occured"
|
|
bitfld.byte 0x00 3. " EINT3 ,External Interrupt 3" "Not occured,Occured"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "EXTWAKE,External Interrupt Wakeup Register"
|
|
bitfld.word 0x00 0. " EXTWAKE0 ,EINT0 Wakes Up Processor" "No wake,Wake"
|
|
bitfld.word 0x00 1. " EXTWAKE1 ,EINT1 Wakes Up Processor" "No wake,Wake"
|
|
textline " "
|
|
bitfld.word 0x00 2. " EXTWAKE2 ,EINT2 Wakes Up Processor" "No wake,Wake"
|
|
bitfld.word 0x00 3. " EXTWAKE3 ,EINT3 Wakes Up Processor" "No wake,Wake"
|
|
textline " "
|
|
bitfld.word 0x00 5. " USBWAKE ,USB Wakes Up Processor" "No wake,Wake"
|
|
bitfld.word 0x00 14. " BODWAKE ,BOD interrupt wake up processor" "No wake,Wake"
|
|
textline " "
|
|
bitfld.word 0x00 15. " RTCWAKE ,RTC interrupt wake up processor" "No wake,Wake"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "EXTMODE,External Interrupt Mode Register"
|
|
bitfld.byte 0x00 0. " EXTMODE0 ,External Interrupt 0 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 1. " EXTMODE1 ,External Interrupt 1 Mode" "Level,Edge"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EXTMODE2 ,External Interrupt 2 Mode" "Level,Edge"
|
|
bitfld.byte 0x00 3. " EXTMODE3 ,External Interrupt 3 Mode" "Level,Edge"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "EXTPOLAR,External Interrupt Polarity Register"
|
|
bitfld.byte 0x00 0. " EXTPOLAR0 ,External Interrupt 0 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 1. " EXTPOLAR1 ,External Interrupt 1 Polarity" "Low/Falling,High/Rising"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EXTPOLAR2 ,External Interrupt 2 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 3. " EXTPOLAR3 ,External Interrupt 3 Polarity" "Low/Falling,High/Rising"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SCS,System Control and Status Flags Register"
|
|
bitfld.long 0x00 1. " GPIO1M ,GPIO Port 1 Mode Selection" "VPB addresses,Memory range"
|
|
bitfld.long 0x00 0. " GPIO0M ,GPIO Port 0 Mode Selection" "VPB addresses,Memory range"
|
|
base 0xE01FC040
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "MEMMAP,Memory Mapping Control"
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot Loader,Flash,RAM,?..."
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "PLL0CON,Phase Locked Loop Control Register 0"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "OSC,PLL"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "PLL0CFG,PLL Configuration Register 0"
|
|
bitfld.byte 0x00 0.--4. " MSEL ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.byte 0x00 5.--6. " PSEL ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
rgroup.word 0x48++0x01
|
|
line.word 0x00 "PLL0STAT,PLL Status Register 0"
|
|
bitfld.word 0x00 0.--4. " MSEL ,Read Back PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.word 0x00 5.--6. " PSEL ,Read Back PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PLLE ,Read Back PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " PLLC ,Read Back PLL Connect Bit" "OSC,PLL"
|
|
textline " "
|
|
bitfld.word 0x00 10. " PLOCK ,PLL Locked Bit" "Not locked,Locked"
|
|
wgroup.byte 0x4C++0x00
|
|
line.byte 0x00 "PLL0FEED,PLL Feed Register 0"
|
|
hexmask.byte.byte 0x00 0.--7. 1. " PLLFEED ,PLL's Feed Value"
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "PLL1CON,Phase Locked Loop Control Register 1"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "OSC,PLL"
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "PLL1CFG,PLL Configuration Register 1"
|
|
bitfld.byte 0x00 0.--4. " MSEL ,PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.byte 0x00 5.--6. " PSEL ,PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
rgroup.word 0x68++0x01
|
|
line.word 0x00 "PLL1STAT,PLL Status Register 1"
|
|
bitfld.word 0x00 0.--4. " MSEL ,Read Back PLL Multiplier Value" "Mul by 1,Mul by 2,Mul by 3,Mul by 4,Mul by 5,Mul by 6,Mul by 7,Mul by 8,Mul by 9,Mul by 10,Mul by 11,Mul by 12,Mul by 13,Mul by 14,Mul by 15,Mul by 16,Mul by 17,Mul by 18,Mul by 19,Mul by 20,Mul by 21,Mul by 22,Mul by 23,Mul by 24,Mul by 25,Mul by 26,Mul by 27,Mul by 28,Mul by 29,Mul by 30,Mul by 31,Mul by 32"
|
|
bitfld.word 0x00 5.--6. " PSEL ,Read Back PLL Divider Value" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PLLE ,Read Back PLL Enable Bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " PLLC ,Read Back PLL Connect Bit" "OSC,PLL"
|
|
textline " "
|
|
bitfld.word 0x00 10. " PLOCK ,PLL Locked Bit" "Not locked,Locked"
|
|
wgroup.byte 0x6C++0x00
|
|
line.byte 0x00 "PLL1FEED,PLL Feed Register 1"
|
|
hexmask.byte.byte 0x00 0.--7. 1. " PLLFEED ,PLL's Feed Value"
|
|
group.byte 0x80++0x00
|
|
line.byte 0x00 "PCON,Power Control Register"
|
|
bitfld.byte 0x00 0. " IDL ,Idle Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PD ,Power Down Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " /PDBOD ,Brown Out Detection" "Low,High"
|
|
bitfld.byte 0x00 3. " BODPDM , Brown Out Detection Power Down Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BOGD ,Brown Out Global Disable" "Enabled,Disabled"
|
|
bitfld.byte 0x00 5. " BORD ,Brown Out Reset Disable" "Enabled,Disabled"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PCONP,Power Control for Peripherals Register"
|
|
bitfld.long 0x00 31. " PUSB ,USB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PCAD1 ,A/D Converter 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PCI2C1 ,I2C1 Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PCAD0 ,A/D Converter 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PCSPI1 ,SSP Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PCRTC ,RTC Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PCSPI0 ,SPI0 Interface Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PCI1C0 ,I2C0 Interface Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PCPWM0 ,PWM0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PCUART1 ,UART1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PCUART0 ,UART0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PCTIM1 ,Timer/Counter 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PCTIM0 ,Timer/Counter 0 Enable" "Disabled,Enabled"
|
|
base 0xE01FC100
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "VPBDIV,VPB Divider Control Register"
|
|
bitfld.byte 0x00 0.--1. " VPBDIV ,VPB Clock Divider Value" "One fourth,The same,One half,?..."
|
|
group.byte 0x80++0x00
|
|
line.byte 0x00 "RSID,Reset Source Identification Register"
|
|
bitfld.byte 0x00 0. " POR ,POR signal" "Low,High"
|
|
bitfld.byte 0x00 1. " EXTR ,/RESET signal" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " WDTR ,Watchdog Times Out" "Low,High"
|
|
bitfld.byte 0x00 3. " BODR ,Brown Out DEtection Reset" "Low,High"
|
|
rgroup.byte 0x84++0x00
|
|
line.byte 0x00 "CSPR,Code Security Protection Register"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
width 10.
|
|
base sd:0xE01FC000
|
|
group.byte 0x140++0x00 "External Interrupts"
|
|
line.byte 0x00 "EXTINT,External Interrupt Flag Register"
|
|
eventfld.byte 0x00 2. " EINT2 ,External Interrupt 2" "Not occured,Occured"
|
|
eventfld.byte 0x00 1. " EINT1 ,External Interrupt 1" "Not occured,Occured"
|
|
eventfld.byte 0x00 0. " EINT0 ,External Interrupt 0" "Not occured,Occured"
|
|
group.word 0x144++0x01
|
|
line.word 0x00 "EXTWAKE,Interrupt Wake-up Register"
|
|
bitfld.word 0x00 15. " RTCWAKE ,RTC wakes up processor" "No wake-up,Wake-up"
|
|
textline " "
|
|
bitfld.word 0x00 2. " EXTWAKE2 ,EINT2 wakes up processor" "No wake-up,Wake-up"
|
|
bitfld.word 0x00 1. " EXTWAKE1 ,EINT1 wakes up processor" "No wake-up,Wake-up"
|
|
bitfld.word 0x00 0. " EXTWAKE0 ,EINT0 wakes up processor" "No wake-up,Wake-up"
|
|
group.byte 0x148++0x00
|
|
line.byte 0x00 "EXTMODE,External Interrupt Mode Register"
|
|
bitfld.byte 0x00 2. " EXTMODE2 ,External Interrupt 2 Sensitive Mode" "Level,Edge"
|
|
bitfld.byte 0x00 1. " EXTMODE1 ,External Interrupt 1 Sensitive Mode" "Level,Edge"
|
|
bitfld.byte 0x00 0. " EXTMODE0 ,External Interrupt 0 Sensitive Mode" "Level,Edge"
|
|
group.byte 0x14c++0x00
|
|
line.byte 0x00 "EXTPOLAR,External Interrupt Polarity Register"
|
|
bitfld.byte 0x00 2. " EXTPOLAR2 ,External Interrupt 2 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 1. " EXTPOLAR1 ,External Interrupt 1 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 0. " EXTPOLAR0 ,External Interrupt 0 Polarity" "Low/Falling,High/Rising"
|
|
width 10.
|
|
group.byte 0x40++0x00 "Memory Mapping Control"
|
|
line.byte 0x00 "MEMMAP,Memory Mapping Control"
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot loader,User flash,User RAM,?..."
|
|
width 10.
|
|
group.byte 0x80++0x00 "Phase Locked Loop"
|
|
line.byte 0x00 "PLLCON,PLL Control Register"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "OSC,PLL"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
group.byte 0x84++0x00
|
|
line.byte 0x00 "PLLCFG,PLL Configuration Register"
|
|
bitfld.byte 0x00 5.--6. " PSEL ,PLL Divider Value" "1,2,3,4"
|
|
bitfld.byte 0x00 0.--4. " MSEL ,PLL Multiplier Value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
rgroup.word 0x88++0x01
|
|
line.word 0x00 "PLLSTAT,PLL Status Register"
|
|
bitfld.word 0x00 10. " PLOCK ,PLL Locked Bit" "Not locked,Locked"
|
|
bitfld.word 0x00 9. " PLLC ,Read Back PLL Connect Bit" "OSC,PLL"
|
|
bitfld.word 0x00 8. " PLLE ,Read Back PLL Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " PSEL ,Read Back PLL Divider Value" "1,2,3,4"
|
|
bitfld.word 0x00 0.--4. " MSEL ,Read Back PLL Multiplier Value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
wgroup.byte 0x8C++0x00
|
|
line.byte 0x00 "PLLFEED,PLL Feed Register"
|
|
width 10.
|
|
group.byte 0xC0++0x00 "Power Control"
|
|
line.byte 0x00 "PCON,Power Control Register"
|
|
bitfld.byte 0x00 0. " IDL ,Idle Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PD ,Power Down Mode" "Disabled,Enabled"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCONP,Power Control for Peripherals"
|
|
bitfld.long 0x00 29. " PCTIM3 ,Timer/Counter 3 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PCTIM2 ,Timer/Counter 2 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " PCI2C1 ,I2C Interface Power/Clock Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCAD ,A/D Converter 0 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PCSPI1 ,SPI1 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PCRTC ,RTC Power/Clock Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PCSPI0 ,SPI0 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PCI2C0 ,I2C0 Interface Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PCUART1 ,UART 1 Power/Clock Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PCUART0 ,UART 0 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PCTIM1 ,Timer 1 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PCTIM0 ,Timer 0 Power/Clock Control" "Disabled,Enabled"
|
|
width 10.
|
|
group.byte 0x100++0x00 "APB Divider"
|
|
line.byte 0x00 "APBDIV,APB Divider Control Register"
|
|
bitfld.byte 0x00 0.--1. " APBDIV ,APB Clock Divider Value" "1/4,Same,1/2,?..."
|
|
width 10.
|
|
group.byte 0x180++0x0 "Reset"
|
|
line.byte 0x00 "RSIR,Reset Source Identification Register"
|
|
bitfld.byte 0x00 2. " WDTR ,Watchdog Timer Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " EXTR ,External Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " POR ,Power-On Reset" "No reset,Reset"
|
|
width 10.
|
|
rgroup.byte 0x184++0x0 "Code Security/Debugging"
|
|
line.byte 0x00 "CSPR,Code Security Protection Register"
|
|
width 10.
|
|
group.long 0x1a0++0x3 "Syscon Miscellaneous Registers"
|
|
line.long 0x00 "SCS,System Control And Status Register"
|
|
bitfld.long 0x00 0. " GPIO0M ,GPIO Port 0 Mode Selection" "APB address,On-chip memory range"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80005070
|
|
width 14.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "SYS_BOOTMAP,Boot Map register"
|
|
bitfld.long 0x00 0. " MAP ,Boot select" "ROM,RAM"
|
|
line.long 0x04 "SYS_BOOTADDR,Boot Address register"
|
|
hexmask.long.tbyte 0x04 10.--31. 1. " BOOTADDR ,Specific address for warm boot select"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SYS_PARTID,Part Identification register"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||cpu()=="LPC2458"||cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
width 10.
|
|
base sd:0xE01FC000
|
|
group.byte 0x140++0x00 "External Interrupts"
|
|
line.byte 0x00 "EXTINT,External Interrupt Flag Register"
|
|
eventfld.byte 0x00 3. " EINT3 ,External Interrupt 3" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 2. " EINT2 ,External Interrupt 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.byte 0x00 1. " EINT1 ,External Interrupt 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 0. " EINT0 ,External Interrupt 0" "Not occurred,Occurred"
|
|
group.byte 0x148++0x00
|
|
line.byte 0x00 "EXTMODE,External Interrupt Mode Register"
|
|
bitfld.byte 0x00 3. " EXTMODE3 ,External Interrupt 3 Sensitive Mode" "Level,Edge"
|
|
bitfld.byte 0x00 2. " EXTMODE2 ,External Interrupt 2 Sensitive Mode" "Level,Edge"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " EXTMODE1 ,External Interrupt 1 Sensitive Mode" "Level,Edge"
|
|
bitfld.byte 0x00 0. " EXTMODE0 ,External Interrupt 0 Sensitive Mode" "Level,Edge"
|
|
group.byte 0x14c++0x00
|
|
line.byte 0x00 "EXTPOLAR,External Interrupt Polarity Register"
|
|
bitfld.byte 0x00 3. " EXTPOLAR3 ,External Interrupt 3 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 2. " EXTPOLAR2 ,External Interrupt 2 Polarity" "Low/Falling,High/Rising"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " EXTPOLAR1 ,External Interrupt 1 Polarity" "Low/Falling,High/Rising"
|
|
bitfld.byte 0x00 0. " EXTPOLAR0 ,External Interrupt 0 Polarity" "Low/Falling,High/Rising"
|
|
width 0x8
|
|
group.byte 0x40++0x00 "Memory Mapping Control"
|
|
line.byte 0x00 "MEMMAP,Memory Mapping Control"
|
|
sif ((cpu()=="LPC2377")||cpu()=="LPC2378"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2468"||cpu()=="LPC2478")
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot loader,User flash,User RAM,User External Memory"
|
|
elif (cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2470")
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot loader,Reserved,User RAM,User External Memory"
|
|
else
|
|
bitfld.byte 0x00 0.--1. " MAP ,Memory Map Mode" "Boot loader,User flash,User RAM,?..."
|
|
endif
|
|
width 0x9
|
|
group.byte 0x80++0x00 "Phase Locked Loop"
|
|
line.byte 0x00 "PLLCON,PLL Control Register"
|
|
bitfld.byte 0x00 1. " PLLC ,PLL Connect" "Bypassed,Connected"
|
|
bitfld.byte 0x00 0. " PLLE ,PLL Enable Bit" "Disabled,Enabled"
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "PLLCFG,PLL Configuration Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. " NSEL ,PLL Pre-Divider value"
|
|
hexmask.long.word 0x0 0.--14. 1. " MSEL ,PLL Multiplier value"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "PLLSTAT,PLL Status Register"
|
|
bitfld.long 0x0 26. " PLOCK ,PLL Lock status" "Not locked,Locked"
|
|
bitfld.long 0x0 25. " PLLC ,Read-back for the PLL Connect bit" "Bypassed,Connected"
|
|
bitfld.long 0x0 24. " PLLE ,Read-back for the PLL Enable bit" "Turned off,Activated"
|
|
textline " "
|
|
hexmask.long.byte 0x0 16.--23. 1. " NSEL ,Read-back for the PLL Pre-Divider value"
|
|
hexmask.long.word 0x0 0.--14. 1. " MSEL ,Read-back for the PLL Multiplier value"
|
|
wgroup.byte 0x8C++0x00
|
|
line.byte 0x00 "PLLFEED,PLL Feed Register"
|
|
width 9.
|
|
group.byte 0xC0++0x00 "Power Control"
|
|
line.byte 0x00 "PCON,Power Mode Control Register"
|
|
bitfld.byte 0x00 0.--1. 7. " PM[2:0] ,Power mode control bits 0-2" "Normal,Idle,Power Down,Reserved,Reserved,Sleep,?..."
|
|
bitfld.byte 0x0 4. " BORD ,Brown-Out Reset Disable" "No,Yes"
|
|
bitfld.byte 0x0 3. " BOGD ,Brown-Out Global Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.byte 0x0 2. " BODPDM ,Brown-Out Power Down Mode" "Active,Turned off"
|
|
group.word 0x144++0x01
|
|
line.word 0x00 "INTWAKE,Interrupt Wakeup Register"
|
|
bitfld.word 0x00 15. " RTCWAKE ,RTC interrupt processor wake up enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " BODWAKE ,BOD interrupt processor wake up enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " GPIO2WAKE ,Specified activity on GPIO2 pins enabled for wakeup processor wake up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " GPIOWAKE ,Specified activity on GPIO pins enabled for wakeup processor wake up enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.word 0x00 6. " CANWAKE ,Activity of the CAN bus processor wake up enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " USBWAKE ,USB Processor Wake Up enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
sif (cpu()!="LPC2361")
|
|
bitfld.word 0x00 4. " ETHWAKE ,Wake-up on LAN interrupt (WakeupInt) of the Ethernet block processor wake up enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " EXTWAKE3 ,/EINT3 Processor Wake Up enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " EXTWAKE2 ,/EINT2 Processor Wake Up enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.word 0x00 3. " EXTWAKE3 ,/EINT3 Processor Wake Up enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " EXTWAKE2 ,/EINT2 Processor Wake Up enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 1. " EXTWAKE1 ,/EINT1 Processor Wake Up enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " EXTWAKE0 ,/EINT0 Processor Wake Up enable" "Disabled,Enabled"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PCONP,Power Control for Peripherals Register"
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 31. " PCUSB ,USB interface power/clock control bit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="LPC2361")
|
|
bitfld.long 0x0 30. " PCENET ,Ethernet block power/clock control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PCGPDMA ,GP DMA function power/clock control bit" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 29. " PCGPDMA ,GP DMA function power/clock control bit" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 28. " PCSDC ,SD card interface power/clock control bit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 27. " PCI2S ,I2S interface power/clock control bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " PCI2C2 ,I2S interface 2 power/clock control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PCUART3 ,UART 3 power/clock control bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PCUART2 ,UART 2 power/clock control bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 23. " PCTIM3 ,Timer 3 power/clock control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 22. " PCTIM2 ,Timer 2 power/clock control bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 21. " PCSSP0 ,The SSP0 interface power/clock control bit" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 20. " PCLCD ,LCD controller power control bit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " PCI2C1 ,The I2C1 Interface Power/Clock Control" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2358"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 14. " PCAN2 ,CAN Controller 2 power/clock control bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " PCAN1 ,CAN Controller 1 power/clock control bit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 12. " PCAD ,A/D Converter (ADC) Power/Clock Control" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 11. " PCEMC ,External Memory Controller" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 10. " PCSSP1 ,The SSP 1 interface Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PCRTC ,The RTC Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PCSPI ,The SPI interface Power/Clock Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PCI2C0 ,The I2C0 Interface Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " PCPWM1 ,PWM1 power/clock control bit" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 5. " PCPWM0 ,PWM0 power/clock control bit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 4. " PCUART1 ,UART 1 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PCUART0 ,UART 0 Power/Clock Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PCTIM1 ,Timer/Counter 1 Power/Clock Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PCTIM0 ,Timer/Counter 0 Power/Clock Control" "Disabled,Enabled"
|
|
width 0xB
|
|
group.byte 0x104++0x0 "Clock dividers"
|
|
line.byte 0x0 "CCLKCFG,CPU Clock Configuration Register"
|
|
group.byte 0x108++0x0
|
|
line.byte 0x0 "USBCLKCFG,USB Clock Configuration Register"
|
|
bitfld.byte 0x0 0.--3. " USBSEL ,Divide value for creating the USB clock from the PLL output selection" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
group.word 0x1A4++0x1
|
|
line.word 0x0 "IRCTRIM,IRC Trim Register"
|
|
hexmask.word.byte 0x0 0.--7. 1. " IRCtrim ,IRC trim value"
|
|
group.long 0x1A8++0x7
|
|
line.long 0x0 "PCLKSEL0,Peripheral Clock Selection register 0"
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2366"||cpu()=="LPC2368"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 30.--31. " PCLK_ACF ,Peripheral clock selection for CAN filtering" "CCLK/4,CCLK,CCLK/2,CCLK/6"
|
|
bitfld.long 0x00 28.--29. " PCLK_CAN2 ,Peripheral clock selection for CAN2" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x00 26.--27. " PCLK_CAN1 ,Peripheral clock selection for CAN1" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 24.--25. " PCLK_ADC ,Peripheral clock selection for ADC" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x00 22.--23. " PCLK_DAC ,Peripheral clock selection for DAC" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x00 20.--21. " PCLK_SSP1 ,Peripheral clock selection for SSP1" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " PCLK_RTC ,Peripheral clock selection for RTC" "CCLK/4,Reserved,CCLK/2,CCLK/8"
|
|
bitfld.long 0x00 16.--17. " PCLK_SPI ,Peripheral clock selection for SPI" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x00 14.--15. " PCLK_I2C0 ,Peripheral clock selection for I2C0" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " PCLK_PWM1 ,Peripheral clock selection for PWM1" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2420"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 10.--11. " PCLK_PWM0 ,Peripheral clock selection for PWM0" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
else
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x00 8.--9. " PCLK_UART1 ,Peripheral clock selection for UART1" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " PCLK_UART0 ,Peripheral clock selection for UART0" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x00 4.--5. " PCLK_TIMER1 ,Peripheral clock selection for TIMER1" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " PCLK_TIMER0 ,Peripheral clock selection for TIMER0" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x00 0.--1. " PCLK_WDT ,Peripheral clock selection for WDT" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
line.long 0x4 "PCLKSEL1,Peripheral Clock Selection register 1"
|
|
bitfld.long 0x04 28.--29. " PCLK_SYSCON ,Peripheral clock selection for the System Control block" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x04 24.--25. " PCLK_MCI ,Peripheral clock selection for MCI" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x04 22.--23. " PCLK_I2S ,Peripheral clock selection for I2S" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " PCLK_I2C2 ,Peripheral clock selection for I2C2" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x04 18.--19. " PCLK_UART3 ,Peripheral clock selection for UART3" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x04 16.--17. " PCLK_UART2 ,Peripheral clock selection for UART2" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " PCLK_TIMER3 ,Peripheral clock selection for TIMER3" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x04 12.--13. " PCLK_TIMER2 ,Peripheral clock selection for TIMER2" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x04 10.--11. " PCLK_SSP0 ,Peripheral clock selection for SSP0" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " PCLK_I2C1 ,Peripheral clock selection for I2C1" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x04 4.--5. " PCLK_PCB ,Peripheral clock selection for the Pin Connect block" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
bitfld.long 0x04 2.--3. " PCLK_GPIO ,Peripheral clock selection for GPIOs" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " PCLK_BAT_RAM ,Peripheral clock selection for the battery supported RAM" "CCLK/4,CCLK,CCLK/2,CCLK/8"
|
|
width 0x6
|
|
group.byte 0x180++0x0 "Reset"
|
|
line.byte 0x00 "RSID,Reset Source Identification Register"
|
|
eventfld.byte 0x0 3. " BODR ,Brown-Out Detector Reset" "No reset,Reset"
|
|
eventfld.byte 0x00 2. " WDTR ,Watchdog Timer Reset" "No reset,Reset"
|
|
eventfld.byte 0x00 1. " EXTR ,External Reset" "No reset,Reset"
|
|
eventfld.byte 0x00 0. " POR ,Power-On Reset" "No reset,Reset"
|
|
width 0x5
|
|
group.long 0x1a0++0x3 "Syscon Miscellaneous Registers"
|
|
line.long 0x00 "SCS,System Controls And Status Register"
|
|
bitfld.long 0x0 6. " OSCSTAT ,Main oscillator status" "Not ready,Ready"
|
|
bitfld.long 0x0 5. " OSCEN ,Main oscillator enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " OSCRANGE ,Main oscillator range select" "1 MHz to 20 MHz,15 MHz to 24 MHz"
|
|
textline " "
|
|
bitfld.long 0x00 0. " GPIOM ,GPIO access Mode Selection" "APB address,On-chip memory range"
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2387"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 3. " MCIPWRAL ,MCIPWR Active Level" "Low,High"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 1. " EMCRD ,EMC Reset Disable" "No,Yes"
|
|
endif
|
|
width 0xB
|
|
group.byte 0x10C++0x0
|
|
line.byte 0x0 "CLKSRCSEL,Clock Source Select Register"
|
|
bitfld.byte 0x0 0.--1. " CLKSRC ,clock source for the PLL selection" "RC,Main,RTC,?..."
|
|
group.long 0x188++0x7
|
|
line.long 0x00 "AHBCFG1,AHB Arbiter Configuration register 1"
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 28.--30. " EP5 ,External priority for master 5 (LCD)(highest = 5, lowest = 1)" "Reserved,1,2,3,4,5,?..."
|
|
bitfld.long 0x00 24.--26. " EP4 ,External priority for master 4 (USB)(highest = 5, lowest = 1)" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
elif (cpu()!="LPC2365"&&cpu()!="LPC2367"&&cpu()!="LPC2377")
|
|
bitfld.long 0x00 24.--26. " EP4 ,External priority for master 4 (USB)(highest = 5, lowest = 1)" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 20.--22. " EP3 ,External priority for master 3 (AHB1)(highest = 5, lowest = 1)" "Reserved,1,2,3,4,5,?..."
|
|
bitfld.long 0x00 16.--18. " EP2 ,External priority for master 2 (GPDMA)(highest = 5, lowest = 1)" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " EP1 ,External priority for master 1 (CPU)(highest = 5, lowest = 1)" "Reserved,1,2,3,4,5,?..."
|
|
bitfld.long 0x00 8.--10. " DEFAULT_MASTER ,Master 1 (CPU) is the default master (highest = 5, lowest = 1)" "Reserved,1,2,3,4,5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " QUANTUM_SIZE ,Controls the type of arbitration and the number of quanta before re-arbiration occurs" "Preemptive/1 AHB,Preemptive/2 AHB,Preemptive/4 AHB,Preemptive/8 AHB,Preemptive/16 AHB,Preemptive/32 AHB,Preemptive/64 AHB,Preemptive/128 AHB,Preemptive/256 AHB,Preemptive/512 AHB,Preemptive/1024 AHB,Preemptive/2048 AHB,Preemptive/4096 AHB,Preemptive/8192 AHB,Preemptive/16384 AHB,Non-preempt./infinite AHB"
|
|
textline " "
|
|
bitfld.long 0x00 3. " QUANTUM_TYPE ,Quantum type" "AHB clock,AHB bus cycle"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " BREAK_BURST ,Controls when defined length bursts break" "All bursts break,Bursts > 4-beat,Bursts > 8-beat,Never break"
|
|
bitfld.long 0x00 0. " SCHEDULER ,Scheduler mode" "Priority,Round-robin"
|
|
line.long 0x04 "AHBCFG2,AHB Arbiter Configuration register 2"
|
|
sif (cpu()!="LPC2420"&&cpu()!="LPC2361")
|
|
bitfld.long 0x04 16.--17. " EP2 ,External priority for master 2 (Ethernet)" "Reserved,Low,High,?..."
|
|
bitfld.long 0x04 12.--13. " EP1 ,External priority for master 1 (CPU)" "Reserved,Low,High,?..."
|
|
else
|
|
bitfld.long 0x04 12.--13. " EP1 ,External priority for master 1 (CPU)" "Reserved,Low,High,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " DEFAULT_MASTER ,Master 2 (Ethernet) is the default master." "Reserved,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " QUANTUM_SIZE ,Controls the type of arbitration and the number of quanta before re-arbiration occurs" "Preemptive/1 AHB,Preemptive/2 AHB,Preemptive/4 AHB,Preemptive/8 AHB,Preemptive/16 AHB,Preemptive/32 AHB,Preemptive/64 AHB,Preemptive/128 AHB,Preemptive/256 AHB,Preemptive/512 AHB,Preemptive/1024 AHB,Preemptive/2048 AHB,Preemptive/4096 AHB,Preemptive/8192 AHB,Preemptive/16384 AHB,Non-preempt./infinite AHB"
|
|
textline " "
|
|
bitfld.long 0x04 3. " QUANTUM_TYPE ,Quantum type" "AHB clock,AHB bus cycle"
|
|
bitfld.long 0x04 1.--2. " BREAK_BURST ,Controls when defined length bursts break" "All bursts break,Bursts > 4-beat,Bursts > 8-beat,Never break"
|
|
textline " "
|
|
bitfld.long 0x04 0. " SCHEDULER ,Scheduler mode" "Priority,Round-robin"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; GPIO
|
|
; --------------------------------------------------------------------------------
|
|
tree "GPIO (General Purpose Input/Output)"
|
|
sif (cpu()=="LPC2104"||cpu()=="LPC2105"||cpu()=="LPC2106")
|
|
width 0x10
|
|
base 0xE0028000
|
|
group.long 0x00++0x0f
|
|
line.long 0x00 "IOPIN_SET/CLR,GPIO Port Pin value register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0c 31. " P0.31 ,Pin 0.31 value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0c 30. " P0.30 ,Pin 0.30 value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0c 29. " P0.29 ,Pin 0.29 value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0c 28. " P0.28 ,Pin 0.28 value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0c 27. " P0.27 ,Pin 0.27 value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0c 26. " P0.26 ,Pin 0.26 value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0c 25. " P0.25 ,Pin 0.25 value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0c 24. " P0.24 ,Pin 0.24 value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0c 23. " P0.23 ,Pin 0.23 value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0c 22. " P0.22 ,Pin 0.22 value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0c 21. " P0.21 ,Pin 0.21 value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0c 20. " P0.20 ,Pin 0.20 value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0c 19. " P0.19 ,Pin 0.19 value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0c 18. " P0.18 ,Pin 0.18 value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0c 17. " P0.17 ,Pin 0.17 value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0c 16. " P0.16 ,Pin 0.16 value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0c 15. " P0.15 ,Pin 0.15 value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0c 14. " P0.14 ,Pin 0.14 value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0c 13. " P0.13 ,Pin 0.13 value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0c 12. " P0.12 ,Pin 0.12 value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0c 11. " P0.11 ,Pin 0.11 value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0c 10. " P0.10 ,Pin 0.10 value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0c 9. " P0.9 ,Pin 0.9 value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0c 8. " P0.8 ,Pin 0.8 value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0c 7. " P0.7 ,Pin 0.7 value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0c 6. " P0.6 ,Pin 0.6 value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0c 5. " P0.5 ,Pin 0.5 value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0c 4. " P0.4 ,Pin 0.4 value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0c 3. " P0.3 ,Pin 0.3 value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0c 2. " P0.2 ,Pin 0.2 value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0c 1. " P0.1 ,Pin 0.1 value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0c 0. " P0.0 ,Pin 0.0 value" "Low,High"
|
|
line.long 0x08 "IODIR,GPIO Port Direction control register"
|
|
bitfld.long 0x08 31. " P0.31 ,Pin 0.31 direction" "Input,Output"
|
|
bitfld.long 0x08 30. " P0.30 ,Pin 0.30 direction" "Input,Output"
|
|
bitfld.long 0x08 29. " P0.29 ,Pin 0.29 direction" "Input,Output"
|
|
bitfld.long 0x08 28. " P0.28 ,Pin 0.28 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 27. " P0.27 ,Pin 0.27 direction" "Input,Output"
|
|
bitfld.long 0x08 26. " P0.26 ,Pin 0.26 direction" "Input,Output"
|
|
bitfld.long 0x08 25. " P0.25 ,Pin 0.25 direction" "Input,Output"
|
|
bitfld.long 0x08 24. " P0.24 ,Pin 0.24 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 23. " P0.23 ,Pin 0.23 direction" "Input,Output"
|
|
bitfld.long 0x08 22. " P0.22 ,Pin 0.22 direction" "Input,Output"
|
|
bitfld.long 0x08 21. " P0.21 ,Pin 0.21 direction" "Input,Output"
|
|
bitfld.long 0x08 20. " P0.20 ,Pin 0.20 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 19. " P0.19 ,Pin 0.19 direction" "Input,Output"
|
|
bitfld.long 0x08 18. " P0.18 ,Pin 0.18 direction" "Input,Output"
|
|
bitfld.long 0x08 17. " P0.17 ,Pin 0.17 direction" "Input,Output"
|
|
bitfld.long 0x08 16. " P0.16 ,Pin 0.16 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 15. " P0.15 ,Pin 0.15 direction" "Input,Output"
|
|
bitfld.long 0x08 14. " P0.14 ,Pin 0.14 direction" "Input,Output"
|
|
bitfld.long 0x08 13. " P0.13 ,Pin 0.13 direction" "Input,Output"
|
|
bitfld.long 0x08 12. " P0.12 ,Pin 0.12 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 11. " P0.11 ,Pin 0.11 direction" "Input,Output"
|
|
bitfld.long 0x08 10. " P0.10 ,Pin 0.10 direction" "Input,Output"
|
|
bitfld.long 0x08 9. " P0.9 ,Pin 0.9 direction" "Input,Output"
|
|
bitfld.long 0x08 8. " P0.8 ,Pin 0.8 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 7. " P0.7 ,Pin 0.7 direction" "Input,Output"
|
|
bitfld.long 0x08 6. " P0.6 ,Pin 0.6 direction" "Input,Output"
|
|
bitfld.long 0x08 5. " P0.5 ,Pin 0.5 direction" "Input,Output"
|
|
bitfld.long 0x08 4. " P0.4 ,Pin 0.4 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 3. " P0.3 ,Pin 0.3 direction" "Input,Output"
|
|
bitfld.long 0x08 2. " P0.2 ,Pin 0.2 direction" "Input,Output"
|
|
bitfld.long 0x08 1. " P0.1 ,Pin 0.1 direction" "Input,Output"
|
|
bitfld.long 0x08 0. " P0.0 ,Pin 0.0 direction" "Input,Output"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2292"||cpu()=="LPC2294")
|
|
;This file is only for LPC2292 LPC2294
|
|
width 0x12
|
|
base 0xE0028000
|
|
tree "GPIO Port 0"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IO0PIN_SET/CLEAR,Set/Clear GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P0.31 ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P0.30 ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P0.29 ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P0.28 ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P0.27 ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P0.26 ,Pin 0.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P0.25 ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P0.24 ,Pin 0.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P0.23 ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P0.22 ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P0.21 ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P0.20 ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P0.19 ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P0.18 ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P0.17 ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P0.16 ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P0.15 ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P0.14 ,Pin 0.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P0.13 ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P0.12 ,Pin 0.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P0.11 ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P0.10 ,Pin 0.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P0.9 ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P0.8 ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P0.7 ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P0.6 ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P0.5 ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P0.4 ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P0.3 ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P0.2 ,Pin 0.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P0.1 ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P0.0 ,Pin 0.0 Value" "Low,High"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "IO0DIR,GPIO Port 0 Direction Control Register"
|
|
bitfld.long 0x00 31. " P0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P0.27 ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.26 ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.24 ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
group.long 0x10++0x0F
|
|
line.long 0x00 "IO1PIN_SET/CLEAR,Set/Clear GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P1.31 ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P1.30 ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P1.29 ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P1.28 ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P1.27 ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P1.26 ,Pin 1.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P1.25 ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P1.24 ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P1.23 ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P1.22 ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P1.21 ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P1.20 ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P1.19 ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P1.18 ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P1.17 ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P1.16 ,Pin 1.16 Value" "Low,High"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IO1DIR,Slow GPIO Port 1 Direction Control Register"
|
|
bitfld.long 0x00 31. " P1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
tree.end
|
|
tree "GPIO Port 2"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "IO2PIN_SET/CLEAR,Set/Clear GPIO Port 2 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P2.31 ,Pin 2.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P2.30 ,Pin 2.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P2.29 ,Pin 2.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P2.28 ,Pin 2.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P2.27 ,Pin 2.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P2.26 ,Pin 2.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P2.25 ,Pin 2.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P2.24 ,Pin 2.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P2.23 ,Pin 2.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P2.22 ,Pin 2.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P2.21 ,Pin 2.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P2.20 ,Pin 2.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P2.19 ,Pin 2.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P2.18 ,Pin 2.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P2.17 ,Pin 2.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P2.16 ,Pin 2.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P2.15 ,Pin 2.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P2.14 ,Pin 2.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P2.13 ,Pin 2.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P2.12 ,Pin 2.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P2.11 ,Pin 2.21 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P2.10 ,Pin 2.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P2.9 ,Pin 2.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P2.8 ,Pin 2.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P2.7 ,Pin 2.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P2.6 ,Pin 2.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P2.5 ,Pin 2.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P2.4 ,Pin 2.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P2.3 ,Pin 2.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P2.2 ,Pin 2.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P2.1 ,Pin 2.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P2.0 ,Pin 2.0 Value" "Low,High"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "IO2DIR,GPIO Port 2 Direction Control Register"
|
|
bitfld.long 0x00 31. " P2.31 ,Pin 2.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P2.30 ,Pin 2.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P2.29 ,Pin 2.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P2.28 ,Pin 2.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P2.27 ,Pin 2.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.26 ,Pin 2.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P2.25 ,Pin 2.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.24 ,Pin 2.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P2.23 ,Pin 2.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P2.22 ,Pin 2.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P2.21 ,Pin 2.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P2.20 ,Pin 2.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P2.19 ,Pin 2.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P2.18 ,Pin 2.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P2.17 ,Pin 2.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P2.16 ,Pin 2.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P2.15 ,Pin 2.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P2.14 ,Pin 2.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P2.13 ,Pin 2.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P2.12 ,Pin 2.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P2.11 ,Pin 2.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P2.10 ,Pin 2.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P2.9 ,Pin 2.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P2.8 ,Pin 2.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P2.7 ,Pin 2.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P2.6 ,Pin 2.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P2.5 ,Pin 2.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P2.4 ,Pin 2.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P2.3 ,Pin 2.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P2.2 ,Pin 2.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P2.1 ,Pin 2.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P2.0 ,Pin 2.0 Direction" "Input,Output"
|
|
tree.end
|
|
tree "GPIO Port 3"
|
|
group.long 0x30++0x0F
|
|
line.long 0x00 "IO3PIN_SET/CLEAR,Set/Clear GPIO Port 3 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P3.31 ,Pin 3.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P3.30 ,Pin 3.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P3.29 ,Pin 3.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P3.28 ,Pin 3.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P3.27 ,Pin 3.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P3.26 ,Pin 3.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P3.25 ,Pin 3.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P3.24 ,Pin 3.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P3.23 ,Pin 3.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P3.22 ,Pin 3.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P3.21 ,Pin 3.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P3.20 ,Pin 3.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P3.19 ,Pin 3.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P3.18 ,Pin 3.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P3.17 ,Pin 3.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P3.16 ,Pin 3.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P3.15 ,Pin 3.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P3.14 ,Pin 3.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P3.13 ,Pin 3.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P3.12 ,Pin 3.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P3.11 ,Pin 3.21 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P3.10 ,Pin 3.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P3.9 ,Pin 3.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P3.8 ,Pin 3.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P3.7 ,Pin 3.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P3.6 ,Pin 3.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P3.5 ,Pin 3.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P3.4 ,Pin 3.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P3.3 ,Pin 3.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P3.2 ,Pin 3.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P3.1 ,Pin 3.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P3.0 ,Pin 3.0 Value" "Low,High"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IO3DIR,GPIO Port 3 Direction Control Register"
|
|
bitfld.long 0x00 31. " P3.31 ,Pin 3.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.30 ,Pin 3.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.29 ,Pin 3.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P3.28 ,Pin 3.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P3.27 ,Pin 3.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.26 ,Pin 3.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P3.25 ,Pin 3.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.24 ,Pin 3.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P3.23 ,Pin 3.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P3.22 ,Pin 3.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P3.21 ,Pin 3.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P3.20 ,Pin 3.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.19 ,Pin 3.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P3.18 ,Pin 3.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P3.17 ,Pin 3.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P3.16 ,Pin 3.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P3.15 ,Pin 3.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P3.14 ,Pin 3.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P3.13 ,Pin 3.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P3.12 ,Pin 3.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P3.11 ,Pin 3.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P3.10 ,Pin 3.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P3.9 ,Pin 3.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P3.8 ,Pin 3.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7 ,Pin 3.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P3.6 ,Pin 3.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P3.5 ,Pin 3.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P3.4 ,Pin 3.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3.3 ,Pin 3.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P3.2 ,Pin 3.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P3.1 ,Pin 3.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P3.0 ,Pin 3.0 Direction" "Input,Output"
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2131/01"||cpu()=="LPC2132"||cpu()=="LPC2132/01"||cpu()=="LPC2134"||cpu()=="LPC2134/01"||cpu()=="LPC2136"||cpu()=="LPC2136/01"||cpu()=="LPC2138"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xE0028000
|
|
width 10.
|
|
tree "Port 0"
|
|
sif (cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xE0028000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x01)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "IO0DIR,GPIO Port 0 Direction Control Register"
|
|
bitfld.long 0x00 31. " P0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P0.27 ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.26 ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
bitfld.long 0x00 19. " P0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " P0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x00 15. " P0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 14. " P0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " P0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 7. " P0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 6. " P0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " P0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
else
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "IO0DIR,GPIO Port 0 Direction Control Register"
|
|
endif
|
|
base usr:0x3FFFC000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x01)==0x01)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FIO0DIR,Fast GPIO port 0 Direction register"
|
|
bitfld.long 0x00 31. " FP0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP0.27 ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP0.26 ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " FP0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
bitfld.long 0x00 19. " FP0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " FP0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x00 15. " FP0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 14. " FP0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " FP0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 7. " FP0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FP0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " FP0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FP0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FIO0MASK,Fast GPIO port 0 Mask register"
|
|
bitfld.long 0x00 31. " FP0.31 ,Pin 0.31 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " FP0.30 ,Pin 0.30 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " FP0.29 ,Pin 0.29 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP0.28 ,Pin 0.28 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " FP0.27 ,Pin 0.27 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " FP0.26 ,Pin 0.26 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP0.25 ,Pin 0.25 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " FP0.23 ,Pin 0.23 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " FP0.22 ,Pin 0.22 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FP0.21 ,Pin 0.21 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " FP0.20 ,Pin 0.20 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " FP0.19 ,Pin 0.19 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " FP0.18 ,Pin 0.18 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " FP0.17 ,Pin 0.17 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " FP0.16 ,Pin 0.16 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP0.15 ,Pin 0.15 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " FP0.14 ,Pin 0.14 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " FP0.13 ,Pin 0.13 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FP0.12 ,Pin 0.12 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " FP0.11 ,Pin 0.11 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " FP0.10 ,Pin 0.10 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FP0.9 ,Pin 0.9 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " FP0.8 ,Pin 0.8 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " FP0.7 ,Pin 0.7 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FP0.6 ,Pin 0.6 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " FP0.5 ,Pin 0.5 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " FP0.4 ,Pin 0.5 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP0.3 ,Pin 0.3 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " FP0.2 ,Pin 0.2 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " FP0.1 ,Pin 0.1 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FP0.0 ,Pin 0.0 Access Control" "Not masked,Masked"
|
|
else
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIO0DIR,Fast GPIO port 0 Direction register"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "FIO0MASK,Fast GPIO port 0 Mask register"
|
|
endif
|
|
else
|
|
base 0xE0028000
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "IO0DIR,GPIO Port 0 Direction Control Register"
|
|
bitfld.long 0x00 31. " P0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P0.27 ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.26 ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
bitfld.long 0x00 19. " P0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " P0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x00 15. " P0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 14. " P0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " P0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 7. " P0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 6. " P0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " P0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
endif
|
|
sif (cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xE0028000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IO0PIN,GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P0.31_set/clr ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P0.30_set/clr ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P0.29_set/clr ,Pin 0.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P0.28_set/clr ,Pin 0.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P0.27_set/clr ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P0.26_set/clr ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P0.25_set/clr ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P0.23_set/clr ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P0.22_set/clr ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P0.21_set/clr ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P0.20_set/clr ,Pin 0.20 Value" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P0.19_set/clr ,Pin 0.19 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P0.18_set/clr ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P0.17_set/clr ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P0.16_set/clr ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P0.15_set/clr ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P0.14_set/clr ,Pin 0.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P0.13_set/clr ,Pin 0.13 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P0.12_set/clr ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P0.11_set/clr ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P0.10_set/clr ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P0.9_set/clr ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P0.8_set/clr ,Pin 0.8 Value" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P0.7_set/clr ,Pin 0.7 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P0.6_set/clr ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P0.5_set/clr ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P0.4_set/clr ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P0.3_set/clr ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P0.2_set/clr ,Pin 0.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P0.1_set/clr ,Pin 0.1 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P0.0_set/clr ,Pin 0.0 Value" "Low,High"
|
|
else
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "IO0PIN,GPIO Port 0 Pin Value Register"
|
|
endif
|
|
base usr:0x3FFFC000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x01)==0x01)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FIO0PIN,Fast GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " FP0.31_set/clr ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " FP0.30_set/clr ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " FP0.29_set/clr ,Pin 0.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " FP0.28_set/clr ,Pin 0.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " FP0.27_set/clr ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " FP0.26_set/clr ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FP0.25_set/clr ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " FP0.23_set/clr ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " FP0.22_set/clr ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " FP0.21_set/clr ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " FP0.20_set/clr ,Pin 0.20 Value" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " FP0.19_set/clr ,Pin 0.19 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " FP0.18_set/clr ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " FP0.17_set/clr ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " FP0.16_set/clr ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " FP0.15_set/clr ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " FP0.14_set/clr ,Pin 0.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " FP0.13_set/clr ,Pin 0.13 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " FP0.12_set/clr ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " FP0.11_set/clr ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " FP0.10_set/clr ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FP0.9_set/clr ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FP0.8_set/clr ,Pin 0.8 Value" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " FP0.7_set/clr ,Pin 0.7 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " FP0.6_set/clr ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " FP0.5_set/clr ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " FP0.4_set/clr ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " FP0.3_set/clr ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " FP0.2_set/clr ,Pin 0.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " FP0.1_set/clr ,Pin 0.1 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " FP0.0_set/clr ,Pin 0.0 Value" "Low,High"
|
|
else
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "FIO0PIN,Fast GPIO Port 0 Pin Value Register"
|
|
endif
|
|
else
|
|
base 0xE0028000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IO0PIN,GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P0.31_set/clr ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P0.30_set/clr ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P0.29_set/clr ,Pin 0.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P0.28_set/clr ,Pin 0.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P0.27_set/clr ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P0.26_set/clr ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P0.25_set/clr ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P0.23_set/clr ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P0.22_set/clr ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P0.21_set/clr ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P0.20_set/clr ,Pin 0.20 Value" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P0.19_set/clr ,Pin 0.19 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P0.18_set/clr ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P0.17_set/clr ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P0.16_set/clr ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P0.15_set/clr ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P0.14_set/clr ,Pin 0.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P0.13_set/clr ,Pin 0.13 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P0.12_set/clr ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P0.11_set/clr ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P0.10_set/clr ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P0.9_set/clr ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P0.8_set/clr ,Pin 0.8 Value" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P0.7_set/clr ,Pin 0.7 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P0.6_set/clr ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P0.5_set/clr ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P0.4_set/clr ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P0.3_set/clr ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P0.2_set/clr ,Pin 0.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P0.1_set/clr ,Pin 0.1 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P0.0_set/clr ,Pin 0.0 Value" "Low,High"
|
|
endif
|
|
tree.end
|
|
tree "Port 1"
|
|
sif (cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xE0028000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x02)==0x00)
|
|
group.long 0x018++0x03
|
|
line.long 0x00 "IO1DIR,GPIO Port 1 Direction Control Register"
|
|
bitfld.long 0x00 31. " P1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
else
|
|
hgroup.long 0x018++0x03
|
|
hide.long 0x00 "IO1DIR,GPIO Port 1 Direction Control Register"
|
|
endif
|
|
base usr:0x3FFFC000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x02)==0x02)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FIO1DIR,Fast GPIO port 1 Direction register"
|
|
bitfld.long 0x00 31. " FP1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "FIO1MASK,Fast GPIO Port 1 Mask Register"
|
|
bitfld.long 0x00 31. " FP1.31 ,Pin 1.31 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " FP1.30 ,Pin 1.30 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " FP1.29 ,Pin 1.29 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP1.28 ,Pin 1.28 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " FP1.27 ,Pin 1.27 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " FP1.26 ,Pin 1.26 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP1.25 ,Pin 1.25 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " FP1.24 ,Pin 1.24 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " FP1.23 ,Pin 1.23 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP1.22 ,Pin 1.22 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " FP1.21 ,Pin 1.21 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " FP1.20 ,Pin 1.20 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP1.19 ,Pin 1.19 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " FP1.18 ,Pin 1.18 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " FP1.17 ,Pin 1.17 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP1.16 ,Pin 1.16 Access Control" "Not masked,Masked"
|
|
else
|
|
hgroup.long 0x20++0x03
|
|
hide.long 0x00 "FIO1DIR,Fast GPIO port 1 Direction register"
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "FIO1MASK,Fast GPIO Port 1 Mask Register"
|
|
endif
|
|
else
|
|
base 0xE0028000
|
|
group.long 0x018++0x03
|
|
line.long 0x00 "IO1DIR,GPIO Port 1 Direction Control Register"
|
|
bitfld.long 0x00 31. " P1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
endif
|
|
sif (cpu()=="LPC2131/01"||cpu()=="LPC2132/01"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
base 0xE0028000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x02)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IO1PIN,GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P1.31_set/clr ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P1.30_set/clr ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P1.29_set/clr ,Pin 1.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P1.28_set/clr ,Pin 1.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P1.27_set/clr ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P1.26_set/clr ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P1.25_set/clr ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P1.24_set/clr ,Pin 1.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P1.23_set/clr ,Pin 1.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P1.22_set/clr ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P1.21_set/clr ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P1.20_set/clr ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P1.19_set/clr ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P1.18_set/clr ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P1.17_set/clr ,Pin 1.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P1.16_set/clr ,Pin 1.16 Value" "Low,High"
|
|
else
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "IO1PIN,GPIO Port 1 Pin Value Register"
|
|
endif
|
|
base usr:0x3FFFC000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x02)==0x02)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "FIO1PIN,Fast GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " FP1.31_set/clr ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " FP1.30_set/clr ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " FP1.29_set/clr ,Pin 1.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " FP1.28_set/clr ,Pin 1.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " FP1.27_set/clr ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " FP1.26_set/clr ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FP1.25_set/clr ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " FP1.24_set/clr ,Pin 1.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " FP1.23_set/clr ,Pin 1.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " FP1.22_set/clr ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " FP1.21_set/clr ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " FP1.20_set/clr ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " FP1.19_set/clr ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " FP1.18_set/clr ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " FP1.17_set/clr ,Pin 1.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " FP1.16_set/clr ,Pin 1.16 Value" "Low,High"
|
|
else
|
|
hgroup.long 0x34++0x03
|
|
hide.long 0x00 "FIO1PIN,Fast GPIO Port 1 Pin Value Register"
|
|
endif
|
|
else
|
|
base 0xE0028000
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IO1PIN,GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P1.31_set/clr ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P1.30_set/clr ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P1.29_set/clr ,Pin 1.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P1.28_set/clr ,Pin 1.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P1.27_set/clr ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P1.26_set/clr ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P1.25_set/clr ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P1.24_set/clr ,Pin 1.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P1.23_set/clr ,Pin 1.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P1.22_set/clr ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P1.21_set/clr ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P1.20_set/clr ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P1.19_set/clr ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P1.18_set/clr ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P1.17_set/clr ,Pin 1.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P1.16_set/clr ,Pin 1.16 Value" "Low,High"
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2114"||cpu()=="LPC2124"||cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2290"||cpu()=="LPC2212"||cpu()=="LPC2214")
|
|
width 0x012
|
|
tree "GPIO Port 0"
|
|
base 0xE0028000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IO0PIN_SET/CLEAR,Set/Clear GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P0.31 ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P0.30 ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P0.29 ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P0.28 ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P0.27 ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P0.26 ,Pin 0.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P0.25 ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P0.24 ,Pin 0.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P0.23 ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P0.22 ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P0.21 ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P0.20 ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P0.19 ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P0.18 ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P0.17 ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P0.16 ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P0.15 ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P0.14 ,Pin 0.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P0.13 ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P0.12 ,Pin 0.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P0.11 ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P0.10 ,Pin 0.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P0.9 ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P0.8 ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P0.7 ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P0.6 ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P0.5 ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P0.4 ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P0.3 ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P0.2 ,Pin 0.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P0.1 ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P0.0 ,Pin 0.0 Value" "Low,High"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "IO0DIR,GPIO Port 0 Direction Control Register"
|
|
bitfld.long 0x00 31. " P0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P0.27 ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.26 ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.24 ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IO1PIN_SET/CLEAR,Set/Clear GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P1.31 ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P1.30 ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P1.29 ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P1.28 ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P1.27 ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P1.26 ,Pin 1.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P1.25 ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P1.24 ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P1.23 ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P1.22 ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P1.21 ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P1.20 ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P1.19 ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P1.18 ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P1.17 ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P1.16 ,Pin 1.16 Value" "Low,High"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IO1DIR,GPIO Port 1 Direction Control Register"
|
|
bitfld.long 0x00 31. " P1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
tree.end
|
|
sif (cpu()=="LPC2212"||cpu()=="LPC2214")
|
|
tree "GPIO Port 2"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IO2PIN_SET/CLEAR,Set/Clear GPIO Port 2 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P2.31 ,Pin 2.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P2.30 ,Pin 2.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P2.29 ,Pin 2.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P2.28 ,Pin 2.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P2.27 ,Pin 2.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P2.26 ,Pin 2.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P2.25 ,Pin 2.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P2.24 ,Pin 2.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P2.23 ,Pin 2.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P2.22 ,Pin 2.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P2.21 ,Pin 2.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P2.20 ,Pin 2.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P2.19 ,Pin 2.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P2.18 ,Pin 2.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P2.17 ,Pin 2.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P2.16 ,Pin 2.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P2.15 ,Pin 2.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P2.14 ,Pin 2.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P2.13 ,Pin 2.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P2.12 ,Pin 2.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P2.11 ,Pin 2.21 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P2.10 ,Pin 2.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P2.9 ,Pin 2.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P2.8 ,Pin 2.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P2.7 ,Pin 2.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P2.6 ,Pin 2.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P2.5 ,Pin 2.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P2.4 ,Pin 2.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P2.3 ,Pin 2.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P2.2 ,Pin 2.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P2.1 ,Pin 2.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P2.0 ,Pin 2.0 Value" "Low,High"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "IO2DIR,GPIO Port 2 Direction Control Register"
|
|
bitfld.long 0x00 31. " P2.31 ,Pin 2.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P2.30 ,Pin 2.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P2.29 ,Pin 2.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P2.28 ,Pin 2.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P2.27 ,Pin 2.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.26 ,Pin 2.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P2.25 ,Pin 2.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.24 ,Pin 2.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P2.23 ,Pin 2.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P2.22 ,Pin 2.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P2.21 ,Pin 2.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P2.20 ,Pin 2.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P2.19 ,Pin 2.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P2.18 ,Pin 2.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P2.17 ,Pin 2.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P2.16 ,Pin 2.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P2.15 ,Pin 2.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P2.14 ,Pin 2.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P2.13 ,Pin 2.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P2.12 ,Pin 2.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P2.11 ,Pin 2.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P2.10 ,Pin 2.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P2.9 ,Pin 2.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P2.8 ,Pin 2.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P2.7 ,Pin 2.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P2.6 ,Pin 2.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P2.5 ,Pin 2.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P2.4 ,Pin 2.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P2.3 ,Pin 2.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P2.2 ,Pin 2.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P2.1 ,Pin 2.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P2.0 ,Pin 2.0 Direction" "Input,Output"
|
|
tree.end
|
|
tree "GPIO Port 3"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IO3PIN_SET/CLEAR,Set/Clear GPIO Port 3 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P3.31 ,Pin 3.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P3.30 ,Pin 3.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P3.29 ,Pin 3.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P3.28 ,Pin 3.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P3.27 ,Pin 3.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P3.26 ,Pin 3.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P3.25 ,Pin 3.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P3.24 ,Pin 3.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P3.23 ,Pin 3.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P3.22 ,Pin 3.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P3.21 ,Pin 3.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P3.20 ,Pin 3.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P3.19 ,Pin 3.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P3.18 ,Pin 3.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P3.17 ,Pin 3.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P3.16 ,Pin 3.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P3.15 ,Pin 3.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P3.14 ,Pin 3.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P3.13 ,Pin 3.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P3.12 ,Pin 3.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P3.11 ,Pin 3.21 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P3.10 ,Pin 3.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P3.9 ,Pin 3.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P3.8 ,Pin 3.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P3.7 ,Pin 3.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P3.6 ,Pin 3.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P3.5 ,Pin 3.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P3.4 ,Pin 3.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P3.3 ,Pin 3.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P3.2 ,Pin 3.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P3.1 ,Pin 3.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P3.0 ,Pin 3.0 Value" "Low,High"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IO3DIR,GPIO Port 3 Direction Control Register"
|
|
bitfld.long 0x00 31. " P3.31 ,Pin 3.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.30 ,Pin 3.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.29 ,Pin 3.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P3.28 ,Pin 3.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P3.27 ,Pin 3.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.26 ,Pin 3.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P3.25 ,Pin 3.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.24 ,Pin 3.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P3.23 ,Pin 3.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P3.22 ,Pin 3.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P3.21 ,Pin 3.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P3.20 ,Pin 3.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.19 ,Pin 3.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P3.18 ,Pin 3.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P3.17 ,Pin 3.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P3.16 ,Pin 3.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P3.15 ,Pin 3.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P3.14 ,Pin 3.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P3.13 ,Pin 3.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P3.12 ,Pin 3.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P3.11 ,Pin 3.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P3.10 ,Pin 3.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P3.9 ,Pin 3.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P3.8 ,Pin 3.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7 ,Pin 3.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P3.6 ,Pin 3.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P3.5 ,Pin 3.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P3.4 ,Pin 3.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3.3 ,Pin 3.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P3.2 ,Pin 3.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P3.1 ,Pin 3.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P3.0 ,Pin 3.0 Direction" "Input,Output"
|
|
tree.end
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
base 0xE0028000
|
|
width 10.
|
|
tree "Port 0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "IO0DIR,GPIO Port 0 Direction Control Register"
|
|
bitfld.long 0x00 31. " P0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P0.27 ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.26 ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.24 ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
base 0x3FFFC000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FIO0DIR,Fast GPIO port 0 Direction register"
|
|
bitfld.long 0x00 31. " FP0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP0.27 ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP0.26 ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP0.24 ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
base 0xE0028000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IO0PIN,GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P0.31_set/clr ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P0.30_set/clr ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P0.29_set/clr ,Pin 0.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P0.28_set/clr ,Pin 0.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P0.27_set/clr ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P0.26_set/clr ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P0.25_set/clr ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P0.24_set/clr ,Pin 0.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P0.23_set/clr ,Pin 0.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P0.22_set/clr ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P0.21_set/clr ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P0.20_set/clr ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P0.19_set/clr ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P0.18_set/clr ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P0.17_set/clr ,Pin 0.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P0.16_set/clr ,Pin 0.16 Value" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P0.15_set/clr ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P0.14_set/clr ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P0.13_set/clr ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P0.12_set/clr ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P0.11_set/clr ,Pin 0.11 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P0.10_set/clr ,Pin 0.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P0.9_set/clr ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P0.8_set/clr ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P0.7_set/clr ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P0.6_set/clr ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P0.5_set/clr ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P0.4_set/clr ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P0.3_set/clr ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P0.2_set/clr ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P0.1_set/clr ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P0.0_set/clr ,Pin 0.0 Value" "Low,High"
|
|
base 0x3FFFC000
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FIO0PIN,Fast GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " FP0.31_set/clr ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " FP0.30_set/clr ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " FP0.29_set/clr ,Pin 0.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " FP0.28_set/clr ,Pin 0.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " FP0.27_set/clr ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " FP0.26_set/clr ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FP0.25_set/clr ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " FP0.24_set/clr ,Pin 0.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " FP0.23_set/clr ,Pin 0.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " FP0.22_set/clr ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " FP0.21_set/clr ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " FP0.20_set/clr ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " FP0.19_set/clr ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " FP0.18_set/clr ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " FP0.17_set/clr ,Pin 0.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " FP0.16_set/clr ,Pin 0.16 Value" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " FP0.15_set/clr ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " FP0.14_set/clr ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " FP0.13_set/clr ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " FP0.12_set/clr ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " FP0.11_set/clr ,Pin 0.11 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " FP0.10_set/clr ,Pin 0.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FP0.9_set/clr ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FP0.8_set/clr ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " FP0.7_set/clr ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " FP0.6_set/clr ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " FP0.5_set/clr ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " FP0.4_set/clr ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " FP0.3_set/clr ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " FP0.2_set/clr ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " FP0.1_set/clr ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " FP0.0_set/clr ,Pin 0.0 Value" "Low,High"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FIO0MASK,Fast GPIO port 0 Mask register"
|
|
bitfld.long 0x00 31. " FP0.31 ,Pin 0.31 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " FP0.30 ,Pin 0.30 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " FP0.29 ,Pin 0.29 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP0.28 ,Pin 0.28 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " FP0.27 ,Pin 0.27 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " FP0.26 ,Pin 0.26 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP0.25 ,Pin 0.25 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " FP0.24 ,Pin 0.24 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " FP0.23 ,Pin 0.23 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP0.22 ,Pin 0.22 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " FP0.21 ,Pin 0.21 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " FP0.20 ,Pin 0.20 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP0.19 ,Pin 0.19 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " FP0.18 ,Pin 0.18 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " FP0.17 ,Pin 0.17 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP0.16 ,Pin 0.16 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " FP0.15 ,Pin 0.15 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " FP0.14 ,Pin 0.14 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP0.13 ,Pin 0.13 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " FP0.12 ,Pin 0.12 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " FP0.11 ,Pin 0.11 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP0.10 ,Pin 0.10 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " FP0.9 ,Pin 0.9 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " FP0.8 ,Pin 0.8 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP0.7 ,Pin 0.7 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " FP0.6 ,Pin 0.6 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " FP0.5 ,Pin 0.5 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP0.4 ,Pin 0.5 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " FP0.3 ,Pin 0.3 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " FP0.2 ,Pin 0.2 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP0.1 ,Pin 0.1 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " FP0.0 ,Pin 0.0 Access Control" "Not masked,Masked"
|
|
tree.end
|
|
base 0xE0028000
|
|
tree "Port 1"
|
|
group.long 0x018++0x03
|
|
line.long 0x00 "IO1DIR,GPIO Port 1 Direction Control Register"
|
|
bitfld.long 0x00 31. " P1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
base 0x3FFFC000
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FIO1DIR,Fast GPIO port 1 Direction register"
|
|
bitfld.long 0x00 31. " FP1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
base 0xE0028000
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IO1PIN,GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P1.31_set/clr ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P1.30_set/clr ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P1.29_set/clr ,Pin 1.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P1.28_set/clr ,Pin 1.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P1.27_set/clr ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P1.26_set/clr ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P1.25_set/clr ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P1.24_set/clr ,Pin 1.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P1.23_set/clr ,Pin 1.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P1.22_set/clr ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P1.21_set/clr ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P1.20_set/clr ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P1.19_set/clr ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P1.18_set/clr ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P1.17_set/clr ,Pin 1.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P1.16_set/clr ,Pin 1.16 Value" "Low,High"
|
|
base 0x3FFFC000
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "FIO1PIN,Fast GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " FP1.31_set/clr ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " FP1.30_set/clr ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " FP1.29_set/clr ,Pin 1.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " FP1.28_set/clr ,Pin 1.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " FP1.27_set/clr ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " FP1.26_set/clr ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FP1.25_set/clr ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " FP1.24_set/clr ,Pin 1.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " FP1.23_set/clr ,Pin 1.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " FP1.22_set/clr ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " FP1.21_set/clr ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " FP1.20_set/clr ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " FP1.19_set/clr ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " FP1.18_set/clr ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " FP1.17_set/clr ,Pin 1.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " FP1.16_set/clr ,Pin 1.16 Value" "Low,High"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "FIO1MASK,Fast GPIO Port 1 Mask Register"
|
|
bitfld.long 0x00 31. " FP1.31 ,Pin 1.31 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " FP1.30 ,Pin 1.30 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " FP1.29 ,Pin 1.29 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP1.28 ,Pin 1.28 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " FP1.27 ,Pin 1.27 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " FP1.26 ,Pin 1.26 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP1.25 ,Pin 1.25 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " FP1.24 ,Pin 1.24 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " FP1.23 ,Pin 1.23 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP1.22 ,Pin 1.22 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " FP1.21 ,Pin 1.21 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " FP1.20 ,Pin 1.20 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP1.19 ,Pin 1.19 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " FP1.18 ,Pin 1.18 Access Control" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " FP1.17 ,Pin 1.17 Access Control" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP1.16 ,Pin 1.16 Access Control" "Not masked,Masked"
|
|
tree.end
|
|
base 0xE0028000
|
|
tree "Port 2"
|
|
group.long 0x028++0x03
|
|
line.long 0x00 "IO2DIR,GPIO Port 2 Direction Control Register"
|
|
bitfld.long 0x00 31. " P2.31 ,Pin 2.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P2.30 ,Pin 2.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P2.29 ,Pin 2.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P2.28 ,Pin 2.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P2.27 ,Pin 2.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.26 ,Pin 2.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P2.25 ,Pin 2.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.24 ,Pin 2.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P2.23 ,Pin 2.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P2.22 ,Pin 2.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P2.21 ,Pin 2.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P2.20 ,Pin 2.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P2.19 ,Pin 2.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P2.18 ,Pin 2.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P2.17 ,Pin 2.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P2.16 ,Pin 2.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P2.15 ,Pin 2.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P2.14 ,Pin 2.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P2.13 ,Pin 2.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P2.12 ,Pin 2.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P2.11 ,Pin 2.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P2.10 ,Pin 2.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P2.9 ,Pin 2.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P2.8 ,Pin 2.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P2.7 ,Pin 2.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P2.6 ,Pin 2.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P2.5 ,Pin 2.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P2.4 ,Pin 2.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P2.3 ,Pin 2.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P2.2 ,Pin 2.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P2.1 ,Pin 2.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P2.0 ,Pin 2.0 Direction" "Input,Output"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IO2PIN,GPIO Port 2 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P2.31_set/clr ,Pin 2.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P2.30_set/clr ,Pin 2.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P2.29_set/clr ,Pin 2.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P2.28_set/clr ,Pin 2.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P2.27_set/clr ,Pin 2.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P2.26_set/clr ,Pin 2.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P2.25_set/clr ,Pin 2.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P2.24_set/clr ,Pin 2.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P2.23_set/clr ,Pin 2.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P2.22_set/clr ,Pin 2.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P2.21_set/clr ,Pin 2.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P2.20_set/clr ,Pin 2.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P2.19_set/clr ,Pin 2.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P2.18_set/clr ,Pin 2.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P2.17_set/clr ,Pin 2.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P2.16_set/clr ,Pin 2.16 Value" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P2.15_set/clr ,Pin 2.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P2.14_set/clr ,Pin 2.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P2.13_set/clr ,Pin 2.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P2.12_set/clr ,Pin 2.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P2.11_set/clr ,Pin 2.21 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P2.10_set/clr ,Pin 2.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P2.9_set/clr ,Pin 2.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P2.8_set/clr ,Pin 2.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P2.7_set/clr ,Pin 2.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P2.6_set/clr ,Pin 2.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P2.5_set/clr ,Pin 2.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P2.4_set/clr ,Pin 2.5 Value" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P2.3_set/clr ,Pin 2.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P2.2_set/clr ,Pin 2.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P2.1_set/clr ,Pin 2.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P2.0_set/clr ,Pin 2.0 Value" "Low,High"
|
|
tree.end
|
|
tree "Port 3"
|
|
group.long 0x038++0x03
|
|
line.long 0x00 "IO3DIR,GPIO Port 3 Direction Control Register"
|
|
bitfld.long 0x00 31. " P3.31 ,Pin 3.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.30 ,Pin 3.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.29 ,Pin 3.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P3.28 ,Pin 3.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P3.27 ,Pin 3.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.26 ,Pin 3.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P3.25 ,Pin 3.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.24 ,Pin 3.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P3.23 ,Pin 3.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P3.22 ,Pin 3.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P3.21 ,Pin 3.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P3.20 ,Pin 3.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.19 ,Pin 3.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P3.18 ,Pin 3.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P3.17 ,Pin 3.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P3.16 ,Pin 3.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P3.15 ,Pin 3.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P3.14 ,Pin 3.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " P3.13 ,Pin 3.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P3.12 ,Pin 3.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P3.11 ,Pin 3.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " P3.10 ,Pin 3.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P3.9 ,Pin 3.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P3.8 ,Pin 3.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7 ,Pin 3.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P3.6 ,Pin 3.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P3.5 ,Pin 3.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " P3.4 ,Pin 3.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3.3 ,Pin 3.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P3.2 ,Pin 3.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " P3.1 ,Pin 3.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P3.0 ,Pin 3.0 Direction" "Input,Output"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IO3PIN,GPIO Port 3 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P3.31_set/clr ,Pin 3.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P3.30_set/clr ,Pin 3.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P3.29_set/clr ,Pin 3.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P3.28_set/clr ,Pin 3.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P3.27_set/clr ,Pin 3.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P3.26_set/clr ,Pin 3.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P3.25_set/clr ,Pin 3.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P3.24_set/clr ,Pin 3.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P3.23_set/clr ,Pin 3.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P3.22_set/clr ,Pin 3.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P3.21_set/clr ,Pin 3.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P3.20_set/clr ,Pin 3.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P3.19_set/clr ,Pin 3.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P3.18_set/clr ,Pin 3.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P3.17_set/clr ,Pin 3.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P3.16_set/clr ,Pin 3.16 Value" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P3.15_set/clr ,Pin 3.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P3.14_set/clr ,Pin 3.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P3.13_set/clr ,Pin 3.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P3.12_set/clr ,Pin 3.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P3.11_set/clr ,Pin 3.21 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P3.10_set/clr ,Pin 3.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P3.9_set/clr ,Pin 3.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P3.8_set/clr ,Pin 3.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P3.7_set/clr ,Pin 3.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P3.6_set/clr ,Pin 3.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P3.5_set/clr ,Pin 3.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P3.4_set/clr ,Pin 3.5 Value" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P3.3_set/clr ,Pin 3.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P3.2_set/clr ,Pin 3.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P3.1_set/clr ,Pin 3.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P3.0_set/clr ,Pin 3.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
;This file is only for LPC214x
|
|
width 0x10
|
|
base 0xE0028000
|
|
tree "GPIO Port 0"
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x01)==0x00)
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "IO0PIN_SET/CLR,Set/Clear GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P0.31 ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P0.30 ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P0.29 ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P0.28 ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P0.25 ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P0.23 ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P0.22 ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P0.21 ,Pin 0.21 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P0.20 ,Pin 0.20 Value" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P0.19 ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P0.18 ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P0.17 ,Pin 0.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P0.16 ,Pin 0.16 Value" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P0.15 ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P0.14 ,Pin 0.14 Value" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P0.13 ,Pin 0.13 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P0.12 ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P0.11 ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P0.10 ,Pin 0.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P0.9 ,Pin 0.9 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P0.8 ,Pin 0.8 Value" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P0.7 ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P0.6 ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P0.5 ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P0.4 ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P0.3 ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P0.2 ,Pin 0.2 Value" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P0.1 ,Pin 0.1 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P0.0 ,Pin 0.0 Value" "Low,High"
|
|
line.long 0x08 "IO0DIR,Slow GPIO Port 0 Direction Control Register"
|
|
bitfld.long 0x08 31. " P0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x08 30. " P0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x08 29. " P0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x08 28. " P0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 25. " P0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x08 23. " P0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x08 22. " P0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x08 21. " P0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 20. " P0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
bitfld.long 0x08 19. " P0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x08 18. " P0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x08 17. " P0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 16. " P0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x08 15. " P0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x08 14. " P0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x08 13. " P0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 12. " P0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
bitfld.long 0x08 11. " P0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x08 10. " P0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x08 9. " P0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 8. " P0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
bitfld.long 0x08 7. " P0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x08 6. " P0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x08 5. " P0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 4. " P0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x08 3. " P0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x08 2. " P0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x08 1. " P0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 0. " P0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
else
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "IO0PIN_SET/CLR,Set/Clear GPIO Port 0 Pin Value Register"
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "IO0DIR,Slow GPIO Port 0 Direction Control Register"
|
|
endif
|
|
base usr:0x3FFFC000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x01)==0x01)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FIO0DIR,Fast GPIO Port 0 Direction Control Register"
|
|
bitfld.long 0x00 31. " FP0.31 ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP0.30 ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP0.29 ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP0.28 ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP0.25 ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " FP0.23 ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP0.22 ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP0.21 ,Pin 0.21 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FP0.20 ,Pin 0.20 Direction" "Input,Output"
|
|
bitfld.long 0x00 19. " FP0.19 ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP0.18 ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP0.17 ,Pin 0.17 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP0.16 ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x00 15. " FP0.15 ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP0.14 ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP0.13 ,Pin 0.13 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FP0.12 ,Pin 0.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " FP0.11 ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP0.10 ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP0.9 ,Pin 0.9 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FP0.8 ,Pin 0.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 7. " FP0.7 ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP0.6 ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP0.5 ,Pin 0.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP0.4 ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " FP0.3 ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP0.2 ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP0.1 ,Pin 0.1 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FP0.0 ,Pin 0.0 Direction" "Input,Output"
|
|
group.long 0x10++0x0F
|
|
line.long 0x00 "FIO0MASK,Fast GPIO Port 0 Mask Control Register"
|
|
bitfld.long 0x00 31. " FP0.31 ,Pin 0.31 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP0.30 ,Pin 0.30 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP0.29 ,Pin 0.29 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 28. " FP0.28 ,Pin 0.28 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP0.25 ,Pin 0.25 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP0.23 ,Pin 0.23 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 22. " FP0.22 ,Pin 0.22 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP0.21 ,Pin 0.21 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FP0.20 ,Pin 0.20 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 19. " FP0.19 ,Pin 0.19 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP0.18 ,Pin 0.18 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP0.17 ,Pin 0.17 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP0.16 ,Pin 0.16 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP0.15 ,Pin 0.15 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP0.14 ,Pin 0.14 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 13. " FP0.13 ,Pin 0.13 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FP0.12 ,Pin 0.12 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP0.11 ,Pin 0.11 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 10. " FP0.10 ,Pin 0.10 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP0.9 ,Pin 0.9 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FP0.8 ,Pin 0.8 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 7. " FP0.7 ,Pin 0.7 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP0.6 ,Pin 0.6 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP0.5 ,Pin 0.5 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP0.4 ,Pin 0.4 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP0.3 ,Pin 0.3 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP0.2 ,Pin 0.2 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 1. " FP0.1 ,Pin 0.1 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FP0.0 ,Pin 0.0 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
line.long 0x04 "FIO0PIN,Fast GPIO Port 0 Pin Value Register"
|
|
setclrfld.long 0x04 31. 0x08 31. 0x0C 31. " FP0.31 ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x04 30. 0x08 30. 0x0C 30. " FP0.30 ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x04 29. 0x08 29. 0x0C 29. " FP0.29 ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x04 28. 0x08 28. 0x0C 28. " FP0.28 ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x08 25. 0x0C 25. " FP0.25 ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x04 23. 0x08 23. 0x0C 23. " FP0.23 ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x04 22. 0x08 22. 0x0C 22. " FP0.22 ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x04 21. 0x08 21. 0x0C 21. " FP0.21 ,Pin 0.21 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 20. 0x08 20. 0x0C 20. " FP0.20 ,Pin 0.20 Value" "Low,High"
|
|
setclrfld.long 0x04 19. 0x08 19. 0x0C 19. " FP0.19 ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x04 18. 0x08 18. 0x0C 18. " FP0.18 ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x04 17. 0x08 17. 0x0C 17. " FP0.17 ,Pin 0.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x08 16. 0x0C 16. " FP0.16 ,Pin 0.16 Value" "Low,High"
|
|
setclrfld.long 0x04 15. 0x08 15. 0x0C 15. " FP0.15 ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x04 14. 0x08 14. 0x0C 14. " FP0.14 ,Pin 0.14 Value" "Low,High"
|
|
setclrfld.long 0x04 13. 0x08 13. 0x0C 13. " FP0.13 ,Pin 0.13 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 12. 0x08 12. 0x0C 12. " FP0.12 ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x04 11. 0x08 11. 0x0C 11. " FP0.11 ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x04 10. 0x08 10. 0x0C 10. " FP0.10 ,Pin 0.10 Value" "Low,High"
|
|
setclrfld.long 0x04 9. 0x08 9. 0x0C 9. " FP0.9 ,Pin 0.9 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 8. 0x08 8. 0x0C 8. " FP0.8 ,Pin 0.8 Value" "Low,High"
|
|
setclrfld.long 0x04 7. 0x08 7. 0x0C 7. " FP0.7 ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x04 6. 0x08 6. 0x0C 6. " FP0.6 ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x04 5. 0x08 5. 0x0C 5. " FP0.5 ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0C 4. " FP0.4 ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x04 3. 0x08 3. 0x0C 3. " FP0.3 ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x04 2. 0x08 2. 0x0C 2. " FP0.2 ,Pin 0.2 Value" "Low,High"
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0C 1. " FP0.1 ,Pin 0.1 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0C 0. " FP0.0 ,Pin 0.0 Value" "Low,High"
|
|
else
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIO0DIR,Fast GPIO Port 0 Direction Control Register"
|
|
hgroup.long 0x10++0x07
|
|
hide.long 0x00 "FIO0MASK,Fast GPIO Port 0 Mask Control Register"
|
|
hide.long 0x04 "FIO0PIN,Fast GPIO Port 0 Pin Value Register"
|
|
endif
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
base 0xE0028010
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x02)==0x00)
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "IO1PIN_SET/CLR,Set/Clear GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P1.31 ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P1.30 ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P1.29 ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P1.28 ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P1.27 ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P1.26 ,Pin 1.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P1.25 ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P1.24 ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P1.23 ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P1.22 ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P1.21 ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P1.20 ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P1.19 ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P1.18 ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P1.17 ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P1.16 ,Pin 1.16 Value" "Low,High"
|
|
line.long 0x08 "IO1DIR,Slow GPIO Port 1 Direction Control Register"
|
|
bitfld.long 0x08 31. " P1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x08 30. " P1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x08 29. " P1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x08 28. " P1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 27. " P1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x08 26. " P1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x08 25. " P1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x08 24. " P1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 23. " P1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x08 22. " P1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x08 21. " P1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x08 20. " P1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 19. " P1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x08 18. " P1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x08 17. " P1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x08 16. " P1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
else
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "IO1PIN_SET/CLR,Set/Clear GPIO Port 1 Pin Value Register"
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "IO1DIR,Slow GPIO Port 1 Direction Control Register"
|
|
endif
|
|
base usr:0x3FFFC020
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x02)==0x02)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FIO1DIR,Fast GPIO Port 1 Direction Control Register"
|
|
bitfld.long 0x00 31. " FP1.31 ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP1.30 ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP1.29 ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP1.28 ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP1.27 ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP1.26 ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP1.25 ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP1.24 ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP1.23 ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP1.22 ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP1.21 ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP1.20 ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP1.19 ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP1.18 ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP1.17 ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP1.16 ,Pin 1.16 Direction" "Input,Output"
|
|
group.long 0x10++0x0F
|
|
line.long 0x00 "FIO1MASK,Fast GPIO Port 1 Mask Control Register"
|
|
bitfld.long 0x00 31. " FP1.31 ,Pin 1.31 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP1.30 ,Pin 1.30 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP1.29 ,Pin 1.29 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 28. " FP1.28 ,Pin 1.28 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP1.27 ,Pin 1.27 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP1.26 ,Pin 1.26 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 25. " FP1.25 ,Pin 1.25 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP1.24 ,Pin 1.24 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP1.23 ,Pin 1.23 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 22. " FP1.22 ,Pin 1.22 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP1.21 ,Pin 1.21 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP1.20 ,Pin 1.20 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP1.19 ,Pin 1.19 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP1.18 ,Pin 1.18 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP1.17 ,Pin 1.17 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 16. " FP1.16 ,Pin 1.16 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
line.long 0x04 "FIO1PIN,Fast GPIO Port 1 Pin Value Register"
|
|
setclrfld.long 0x04 31. 0x08 31. 0x0C 31. " FP1.31 ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x04 30. 0x08 30. 0x0C 30. " FP1.30 ,Pin 1.30 Value" "Low,High"
|
|
setclrfld.long 0x04 29. 0x08 29. 0x0C 29. " FP1.29 ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x04 28. 0x08 28. 0x0C 28. " FP1.28 ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x08 27. 0x0C 27. " FP1.27 ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x04 26. 0x08 26. 0x0C 26. " FP1.26 ,Pin 1.26 Value" "Low,High"
|
|
setclrfld.long 0x04 25. 0x08 25. 0x0C 25. " FP1.25 ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x04 24. 0x08 24. 0x0C 24. " FP1.24 ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x08 23. 0x0C 23. " FP1.23 ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x04 22. 0x08 22. 0x0C 22. " FP1.22 ,Pin 1.22 Value" "Low,High"
|
|
setclrfld.long 0x04 21. 0x08 21. 0x0C 21. " FP1.21 ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x04 20. 0x08 20. 0x0C 20. " FP1.20 ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x08 19. 0x0C 19. " FP1.19 ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x04 18. 0x08 18. 0x0C 18. " FP1.18 ,Pin 1.18 Value" "Low,High"
|
|
setclrfld.long 0x04 17. 0x08 17. 0x0C 17. " FP1.17 ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x04 16. 0x08 16. 0x0C 16. " FP1.16 ,Pin 1.16 Value" "Low,High"
|
|
else
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIO1DIR,Fast GPIO Port 1 Direction Control Register"
|
|
hgroup.long 0x10++0x07
|
|
hide.long 0x00 "FIO1MASK,Fast GPIO Port 1 Mask Control Register"
|
|
hide.long 0x04 "FIO1PIN,Fast GPIO Port 1 Pin Value Register"
|
|
endif
|
|
tree.end
|
|
width 0x10
|
|
endif
|
|
sif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
width 18.
|
|
base sd:0xe0028000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x01)==0x00)
|
|
group.long 0x08++0x3 "APB"
|
|
line.long 0x00 "IODIR,GPIO Port Direction Control Register"
|
|
bitfld.long 0x00 31. " P0.31DIR ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.30DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.29DIR ,Pin 0.29 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.28DIR ,Pin 0.28 Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.27DIR ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.26DIR ,Pin 0.26 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P0.25DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.24DIR ,Pin 0.24 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.23DIR ,Pin 0.23 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P0.22DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " P0.21DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " P0.20DIR ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.19DIR ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P0.18DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " P0.17DIR ,Pin 0.17 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P0.16DIR ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x00 15. " P0.15DIR ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " P0.14DIR ,Pin 0.14 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.13DIR ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " P0.12DIR ,Pin 0.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " P0.11DIR ,Pin 0.11 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P0.10DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " P0.9DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " P0.8DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " P0.6DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " P0.5DIR ,Pin 0.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P0.4DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " P0.3DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " P0.2DIR ,Pin 0.2 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P0.1DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " P0.0DIR ,Pin 0.0 Direction" "Input,Output"
|
|
group.long 0x00++0x0f
|
|
line.long 0x00 "IOPIN_SET/CLEAR,Set/Clear GPIO Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P0.31VAL ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P0.30VAL ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P0.29VAL ,Pin 0.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P0.28VAL ,Pin 0.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P0.27VAL ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P0.26VAL ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P0.25VAL ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P0.24VAL ,Pin 0.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P0.23VAL ,Pin 0.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P0.22VAL ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P0.21VAL ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P0.20VAL ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P0.19VAL ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P0.18VAL ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P0.17VAL ,Pin 0.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P0.16VAL ,Pin 0.16 Value" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P0.15VAL ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P0.14VAL ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P0.13VAL ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P0.12VAL ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P0.11VAL ,Pin 0.11 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P0.10VAL ,Pin 0.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P0.9VAL ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P0.8VAL ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P0.7VAL ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P0.6VAL ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P0.5VAL ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P0.4VAL ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P0.3VAL ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P0.2VAL ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P0.1VAL ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P0.0VAL ,Pin 0.0 Value" "Low,High"
|
|
else
|
|
hgroup.long 0x08++0x3 "APB"
|
|
hide.long 0x00 "IODIR,GPIO Port Direction Control Register"
|
|
hgroup.long 0x00++0x0f
|
|
hide.long 0x00 "IOPIN_SET/CLEAR,Set/Clear GPIO Port Pin Value Register"
|
|
endif
|
|
width 18.
|
|
base usr:0x3FFFC000
|
|
if (((d.l(sd:0xE01FC000+0x1A0))&0x01)==0x01)
|
|
group.long 0x00++0x03 "Local Bus"
|
|
line.long 0x00 "FIODIR,Fast GPIO Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP0.31DIR ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP0.30DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP0.29DIR ,Pin 0.29 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP0.28DIR ,Pin 0.28 Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " FP0.27DIR ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP0.26DIR ,Pin 0.26 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP0.25DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP0.24DIR ,Pin 0.24 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " FP0.23DIR ,Pin 0.23 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP0.22DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP0.21DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP0.20DIR ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP0.19DIR ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP0.18DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP0.17DIR ,Pin 0.17 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP0.16DIR ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x00 15. " FP0.15DIR ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP0.14DIR ,Pin 0.14 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP0.13DIR ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP0.12DIR ,Pin 0.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " FP0.11DIR ,Pin 0.11 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP0.10DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP0.9DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP0.8DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP0.7DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP0.6DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP0.5DIR ,Pin 0.5 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP0.4DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " FP0.3DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP0.2DIR ,Pin 0.2 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP0.1DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP0.0DIR ,Pin 0.0 Direction" "Input,Output"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FIOMASK,Fast GPIO Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP0.31MASK ,Pin 0.31 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP0.30MASK ,Pin 0.30 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP0.29MASK ,Pin 0.29 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP0.28MASK ,Pin 0.28 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP0.27MASK ,Pin 0.27 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP0.26MASK ,Pin 0.26 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP0.25MASK ,Pin 0.25 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP0.24MASK ,Pin 0.24 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP0.23MASK ,Pin 0.23 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP0.22MASK ,Pin 0.22 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP0.21MASK ,Pin 0.21 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP0.20MASK ,Pin 0.20 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP0.19MASK ,Pin 0.19 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP0.18MASK ,Pin 0.18 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP0.17MASK ,Pin 0.17 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP0.16MASK ,Pin 0.16 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP0.15MASK ,Pin 0.15 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP0.14MASK ,Pin 0.14 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP0.13MASK ,Pin 0.13 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP0.12MASK ,Pin 0.12 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP0.11MASK ,Pin 0.11 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP0.10MASK ,Pin 0.10 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP0.9MASK ,Pin 0.9 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP0.8MASK ,Pin 0.8 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP0.7MASK ,Pin 0.7 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP0.6MASK ,Pin 0.6 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP0.5MASK ,Pin 0.5 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP0.4MASK ,Pin 0.4 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP0.3MASK ,Pin 0.3 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP0.2MASK ,Pin 0.2 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP0.1MASK ,Pin 0.1 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP0.0MASK ,Pin 0.0 Affected Writes to FIOSET,FIOCLR,FIOPIN" "Affected,Unaffected"
|
|
group.long 0x14++0x0f
|
|
line.long 0x00 "FIOPIN_SET/CLEAR,Set/Clear GPIO Fast Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " FP0.31VAL ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " FP0.30VAL ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " FP0.29VAL ,Pin 0.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " FP0.28VAL ,Pin 0.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " FP0.27VAL ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " FP0.26VAL ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FP0.25VAL ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " FP0.24VAL ,Pin 0.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " FP0.23VAL ,Pin 0.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " FP0.22VAL ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " FP0.21VAL ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " FP0.20VAL ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " FP0.19VAL ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " FP0.18VAL ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " FP0.17VAL ,Pin 0.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " FP0.16VAL ,Pin 0.16 Value" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " FP0.15VAL ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " FP0.14VAL ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " FP0.13VAL ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " FP0.12VAL ,Pin 0.12 Value" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " FP0.11VAL ,Pin 0.11 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " FP0.10VAL ,Pin 0.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FP0.9VAL ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FP0.8VAL ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " FP0.7VAL ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " FP0.6VAL ,Pin 0.6 Value" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " FP0.5VAL ,Pin 0.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " FP0.4VAL ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " FP0.3VAL ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " FP0.2VAL ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " FP0.1VAL ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " FP0.0VAL ,Pin 0.0 Value" "Low,High"
|
|
else
|
|
hgroup.long 0x00++0x03 "Local Bus"
|
|
hide.long 0x00 "FIODIR,Fast GPIO Port Direction Control Register"
|
|
hgroup.long 0x10++0x07
|
|
hide.long 0x00 "FIOMASK,Fast GPIO Port Mask Control Register"
|
|
hide.long 0x04 "FIOPIN_SET/CLEAR,Set/Clear GPIO Fast Port Pin Value Register"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2365")||(cpu()=="LPC2366")||(cpu()=="LPC2367")||(cpu()=="LPC2368")||(cpu()=="LPC2387"))
|
|
; LPC2364, LPC2365, LPC2366, LPC2367, LPC2368, LPC2387
|
|
width 0xD
|
|
base sd:0xe0028000
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x0 "IOIntStatus,GPIO overall Interrupt Status"
|
|
bitfld.long 0x0 2. " P2Int ,PORT2 GPIO interrupt pending" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P0Int ,PORT0 GPIO interrupt pending" "No interrupt,Interrupt"
|
|
width 0x8
|
|
tree "GPIO0 (General Purpose Input/Output port 0)"
|
|
group.long 0x8++0x3 "APB"
|
|
line.long 0x0 "IO0DIR,GPIO 0 Port Direction Control Register"
|
|
bitfld.long 0x0 30. " P030DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x0 29. " P029DIR ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x0 28. " P028DIR ,Pin 0.28 Direction" "Input,Output"
|
|
bitfld.long 0x0 27. " P027DIR ,Pin 0.27 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 26. " P026DIR ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x0 25. " P025DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x0 24. " P024DIR ,Pin 0.24 Direction" "Input,Output"
|
|
bitfld.long 0x0 23. " P023DIR ,Pin 0.23 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P022DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x0 21. " P021DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x0 20. " P020DIR ,Pin 0.20 Direction" "Input,Output"
|
|
bitfld.long 0x0 19. " P019DIR ,Pin 0.19 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 18. " P018DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x0 17. " P017DIR ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x0 16. " P016DIR ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x0 15. " P015DIR ,Pin 0.15 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P011DIR ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x0 10. " P010DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x0 9. " P09DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x0 8. " P08DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x0 6. " P06DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x0 5. " P05DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x0 4. " P04DIR ,Pin 0.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x0 2. " P02DIR ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x0 1. " P01DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x0 0. " P00DIR ,Pin 0.0 Direction" "Input,Output"
|
|
width 0x8
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "IO0PIN,GPIO 0 Port Pin Value Register"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P030VAL_Clear/Set ,Pin 0.30 Value" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P029VAL_Clear/Set ,Pin 0.29 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P028VAL_Clear/Set ,Pin 0.28 Value" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P027VAL_Clear/Set ,Pin 0.27 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P026VAL_Clear/Set ,Pin 0.26 Value" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P025VAL_Clear/Set ,Pin 0.25 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P024VAL_Clear/Set ,Pin 0.24 Value" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P023VAL_Clear/Set ,Pin 0.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P022VAL_Clear/Set ,Pin 0.22 Value" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P021VAL_Clear/Set ,Pin 0.21 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P020VAL_Clear/Set ,Pin 0.20 Value" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P019VAL_Clear/Set ,Pin 0.19 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P018VAL_Clear/Set ,Pin 0.18 Value" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P017VAL_Clear/Set ,Pin 0.17 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P016VAL_Clear/Set ,Pin 0.16 Value" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P015VAL_Clear/Set ,Pin 0.15 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P011VAL_Clear/Set ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P010VAL_Clear/Set ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P09VAL_Clear/Set ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P08VAL_Clear/Set ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P07VAL_Clear/Set ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P06VAL_Clear/Set ,Pin 0.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P05VAL_Clear/Set ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P04VAL_Clear/Set ,Pin 0.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P03VAL_Clear/Set ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P02VAL_Clear/Set ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P01VAL_Clear/Set ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P00VAL_Clear/Set ,Pin 0.0 Value" "Low,High"
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
group.long 0x00++0x03 "Local Bus"
|
|
line.long 0x00 "FIO0DIR,Fast GPIO 0 Port Direction Control Register"
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bitfld.long 0x00 30. " FP030DIR ,Pin 0.30 Direction" "Input,Output"
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bitfld.long 0x00 29. " FP029DIR ,Pin 0.29 Direction" "Input,Output"
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|
bitfld.long 0x00 28. " FP028DIR ,Pin 0.28 Direction" "Input,Output"
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|
bitfld.long 0x00 27. " FP027DIR ,Pin 0.27 Direction" "Input,Output"
|
|
textline " "
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|
bitfld.long 0x00 26. " FP026DIR ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP025DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP024DIR ,Pin 0.24 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " FP023DIR ,Pin 0.23 Direction" "Input,Output"
|
|
textline " "
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bitfld.long 0x00 22. " FP022DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP021DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP020DIR ,Pin 0.20 Direction" "Input,Output"
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bitfld.long 0x00 19. " FP019DIR ,Pin 0.19 Direction" "Input,Output"
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|
textline " "
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bitfld.long 0x00 18. " FP018DIR ,Pin 0.18 Direction" "Input,Output"
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|
bitfld.long 0x00 17. " FP017DIR ,Pin 0.17 Direction" "Input,Output"
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|
bitfld.long 0x00 16. " FP016DIR ,Pin 0.16 Direction" "Input,Output"
|
|
bitfld.long 0x00 15. " FP015DIR ,Pin 0.15 Direction" "Input,Output"
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textline " "
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bitfld.long 0x00 11. " FP011DIR ,Pin 0.11 Direction" "Input,Output"
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bitfld.long 0x00 10. " FP010DIR ,Pin 0.10 Direction" "Input,Output"
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bitfld.long 0x00 9. " FP09DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP08DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
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bitfld.long 0x00 7. " FP07DIR ,Pin 0.7 Direction" "Input,Output"
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|
bitfld.long 0x00 6. " FP06DIR ,Pin 0.6 Direction" "Input,Output"
|
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bitfld.long 0x00 5. " FP05DIR ,Pin 0.5 Direction" "Input,Output"
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bitfld.long 0x00 4. " FP04DIR ,Pin 0.4 Direction" "Input,Output"
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textline " "
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bitfld.long 0x00 3. " FP03DIR ,Pin 0.3 Direction" "Input,Output"
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bitfld.long 0x00 2. " FP02DIR ,Pin 0.2 Direction" "Input,Output"
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bitfld.long 0x00 1. " FP01DIR ,Pin 0.1 Direction" "Input,Output"
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bitfld.long 0x00 0. " FP00DIR ,Pin 0.0 Direction" "Input,Output"
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width 0xa
|
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group.long 0x10++0x7
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line.long 0x00 "FIO0MASK,Fast GPIO 0 Port Mask Control Register"
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bitfld.long 0x00 30. " FP030MASK ,Pin 0.30 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 29. " FP029MASK ,Pin 0.29 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 28. " FP028MASK ,Pin 0.28 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 27. " FP027MASK ,Pin 0.27 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 26. " FP026MASK ,Pin 0.26 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 25. " FP025MASK ,Pin 0.25 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 24. " FP024MASK ,Pin 0.24 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 23. " FP023MASK ,Pin 0.23 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 22. " FP022MASK ,Pin 0.22 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 21. " FP021MASK ,Pin 0.21 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 20. " FP020MASK ,Pin 0.20 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 19. " FP019MASK ,Pin 0.19 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 18. " FP018MASK ,Pin 0.18 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 17. " FP017MASK ,Pin 0.17 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 16. " FP016MASK ,Pin 0.16 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 15. " FP015MASK ,Pin 0.15 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 11. " FP011MASK ,Pin 0.11 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 10. " FP010MASK ,Pin 0.10 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 9. " FP09MASK ,Pin 0.9 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 8. " FP08MASK ,Pin 0.8 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 7. " FP07MASK ,Pin 0.7 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 6. " FP06MASK ,Pin 0.6 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 5. " FP05MASK ,Pin 0.5 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 4. " FP04MASK ,Pin 0.4 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 3. " FP03MASK ,Pin 0.3 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 2. " FP02MASK ,Pin 0.2 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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bitfld.long 0x00 1. " FP01MASK ,Pin 0.1 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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textline " "
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bitfld.long 0x00 0. " FP00MASK ,Pin 0.0 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
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width 0xa
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line.long 0x4 "FIO0PIN,GPIO 0 Fast Port Pin Value Register"
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setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP030VAL_Clear/Set ,Pin 0.30 Value" "Low,High"
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setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP029VAL_Clear/Set ,Pin 0.29 Value" "Low,High"
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|
textline " "
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setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP028VAL_Clear/Set ,Pin 0.28 Value" "Low,High"
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setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP027VAL_Clear/Set ,Pin 0.27 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP026VAL_Clear/Set ,Pin 0.26 Value" "Low,High"
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setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP025VAL_Clear/Set ,Pin 0.25 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP024VAL_Clear/Set ,Pin 0.24 Value" "Low,High"
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setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP023VAL_Clear/Set ,Pin 0.23 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP022VAL_Clear/Set ,Pin 0.22 Value" "Low,High"
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setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP021VAL_Clear/Set ,Pin 0.21 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP020VAL_Clear/Set ,Pin 0.20 Value" "Low,High"
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setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP019VAL_Clear/Set ,Pin 0.19 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP018VAL_Clear/Set ,Pin 0.18 Value" "Low,High"
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setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP017VAL_Clear/Set ,Pin 0.17 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP016VAL_Clear/Set ,Pin 0.16 Value" "Low,High"
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setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP015VAL_Clear/Set ,Pin 0.15 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP011VAL_Clear/Set ,Pin 0.11 Value" "Low,High"
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setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP010VAL_Clear/Set ,Pin 0.10 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP09VAL_Clear/Set ,Pin 0.9 Value" "Low,High"
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setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP08VAL_Clear/Set ,Pin 0.8 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP07VAL_Clear/Set ,Pin 0.7 Value" "Low,High"
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setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP06VAL_Clear/Set ,Pin 0.6 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP05VAL_Clear/Set ,Pin 0.5 Value" "Low,High"
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setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP04VAL_Clear/Set ,Pin 0.4 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP03VAL_Clear/Set ,Pin 0.3 Value" "Low,High"
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setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP02VAL_Clear/Set ,Pin 0.2 Value" "Low,High"
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textline " "
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setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP01VAL_Clear/Set ,Pin 0.1 Value" "Low,High"
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setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP00VAL_Clear/Set ,Pin 0.0 Value" "Low,High"
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width 0xB
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base sd:0xE0028000
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tree "GPIO 0 interrupt registers"
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group.long 0x90++0x7
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line.long 0x0 "IO0IntEnR,GPIO 0 Interrupt Enable for Rising edge register"
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bitfld.long 0x0 30. " P030ER ,Enable Rising edge P0.30" "Disabled,Enabled"
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bitfld.long 0x0 29. " P029ER ,Enable Rising edge P0.29" "Disabled,Enabled"
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bitfld.long 0x0 28. " P028ER ,Enable Rising edge P0.28" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 27. " P027ER ,Enable Rising edge P0.27" "Disabled,Enabled"
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bitfld.long 0x0 26. " P026ER ,Enable Rising edge P0.26" "Disabled,Enabled"
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bitfld.long 0x0 25. " P025ER ,Enable Rising edge P0.25" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 24. " P024ER ,Enable Rising edge P0.24" "Disabled,Enabled"
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bitfld.long 0x0 23. " P023ER ,Enable Rising edge P0.23" "Disabled,Enabled"
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bitfld.long 0x0 22. " P022ER ,Enable Rising edge P0.22" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 21. " P021ER ,Enable Rising edge P0.21" "Disabled,Enabled"
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bitfld.long 0x0 20. " P020ER ,Enable Rising edge P0.20" "Disabled,Enabled"
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bitfld.long 0x0 19. " P019ER ,Enable Rising edge P0.19" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 18. " P018ER ,Enable Rising edge P0.18" "Disabled,Enabled"
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bitfld.long 0x0 17. " P017ER ,Enable Rising edge P0.17" "Disabled,Enabled"
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bitfld.long 0x0 16. " P016ER ,Enable Rising edge P0.16" "Disabled,Enabled"
|
|
textline " "
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bitfld.long 0x0 15. " P015ER ,Enable Rising edge P0.15" "Disabled,Enabled"
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bitfld.long 0x0 11. " P011ER ,Enable Rising edge P0.11" "Disabled,Enabled"
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bitfld.long 0x0 10. " P010ER ,Enable Rising edge P0.10" "Disabled,Enabled"
|
|
textline " "
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bitfld.long 0x0 9. " P09ER ,Enable Rising edge P0.9" "Disabled,Enabled"
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bitfld.long 0x0 8. " P08ER ,Enable Rising edge P0.8" "Disabled,Enabled"
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bitfld.long 0x0 7. " P07ER ,Enable Rising edge P0.7" "Disabled,Enabled"
|
|
textline " "
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bitfld.long 0x0 6. " P06ER ,Enable Rising edge P0.6" "Disabled,Enabled"
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bitfld.long 0x0 5. " P05ER ,Enable Rising edge P0.5" "Disabled,Enabled"
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bitfld.long 0x0 4. " P04ER ,Enable Rising edge P0.4" "Disabled,Enabled"
|
|
textline " "
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bitfld.long 0x0 3. " P03ER ,Enable Rising edge P0.3" "Disabled,Enabled"
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bitfld.long 0x0 2. " P02ER ,Enable Rising edge P0.2" "Disabled,Enabled"
|
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bitfld.long 0x0 1. " P01ER ,Enable Rising edge P0.1" "Disabled,Enabled"
|
|
textline " "
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bitfld.long 0x0 0. " P00ER ,Enable Rising edge P0.0" "Disabled,Enabled"
|
|
line.long 0x4 "IO0IntEnF,GPIO 0 Interrupt Enable for Falling edge register"
|
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bitfld.long 0x4 30. " P030EF ,Enable Falling edge P0.30" "Disabled,Enabled"
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bitfld.long 0x4 29. " P029EF ,Enable Falling edge P0.29" "Disabled,Enabled"
|
|
bitfld.long 0x4 28. " P028EF ,Enable Falling edge P0.28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 27. " P027EF ,Enable Falling edge P0.27" "Disabled,Enabled"
|
|
bitfld.long 0x4 26. " P026EF ,Enable Falling edge P0.26" "Disabled,Enabled"
|
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bitfld.long 0x4 25. " P025EF ,Enable Falling edge P0.25" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 24. " P024EF ,Enable Falling edge P0.24" "Disabled,Enabled"
|
|
bitfld.long 0x4 23. " P023EF ,Enable Falling edge P0.23" "Disabled,Enabled"
|
|
bitfld.long 0x4 22. " P022EF ,Enable Falling edge P0.22" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 21. " P021EF ,Enable Falling edge P0.21" "Disabled,Enabled"
|
|
bitfld.long 0x4 20. " P020EF ,Enable Falling edge P0.20" "Disabled,Enabled"
|
|
bitfld.long 0x4 19. " P019EF ,Enable Falling edge P0.19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 18. " P018EF ,Enable Falling edge P0.18" "Disabled,Enabled"
|
|
bitfld.long 0x4 17. " P017EF ,Enable Falling edge P0.17" "Disabled,Enabled"
|
|
bitfld.long 0x4 16. " P016EF ,Enable Falling edge P0.16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 15. " P015EF ,Enable Falling edge P0.15" "Disabled,Enabled"
|
|
bitfld.long 0x4 11. " P011EF ,Enable Falling edge P0.11" "Disabled,Enabled"
|
|
bitfld.long 0x4 10. " P010EF ,Enable Falling edge P0.10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P09EF ,Enable Falling edge P0.9" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " P08EF ,Enable Falling edge P0.8" "Disabled,Enabled"
|
|
bitfld.long 0x4 7. " P07EF ,Enable Falling edge P0.7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 6. " P06EF ,Enable Falling edge P0.6" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " P05EF ,Enable Falling edge P0.5" "Disabled,Enabled"
|
|
bitfld.long 0x4 4. " P04EF ,Enable Falling edge P0.4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P03EF ,Enable Falling edge P0.3" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " P02EF ,Enable Falling edge P0.2" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " P01EF ,Enable Falling edge P0.1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " P00EF ,Enable Falling edge P0.0" "Disabled,Enabled"
|
|
width 0xD
|
|
tree "GPIO 0 Interrupt Status for edge registers"
|
|
textline " "
|
|
rgroup.long 0x84++0x7
|
|
line.long 0x0 "IO0IntStatR,GPIO 0 Interrupt Status for Rising edge register"
|
|
bitfld.long 0x0 30. " P030REI ,Rising Edge Interrupt status P0.30" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 29. " P029REI ,Rising Edge Interrupt status P0.29" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P028REI ,Rising Edge Interrupt status P0.28" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 27. " P027REI ,Rising Edge Interrupt status P0.27" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 26. " P026REI ,Rising Edge Interrupt status P0.26" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 25. " P025REI ,Rising Edge Interrupt status P0.25" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 24. " P024REI ,Rising Edge Interrupt status P0.24" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 23. " P023REI ,Rising Edge Interrupt status P0.23" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P022REI ,Rising Edge Interrupt status P0.22" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 21. " P021REI ,Rising Edge Interrupt status P0.21" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 20. " P020REI ,Rising Edge Interrupt status P0.20" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 19. " P019REI ,Rising Edge Interrupt status P0.19" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 18. " P018REI ,Rising Edge Interrupt status P0.18" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 17. " P017REI ,Rising Edge Interrupt status P0.17" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P016REI ,Rising Edge Interrupt status P0.16" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 15. " P015REI ,Rising Edge Interrupt status P0.15" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P011REI ,Rising Edge Interrupt status P0.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " P010REI ,Rising Edge Interrupt status P0.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P09REI ,Rising Edge Interrupt status P0.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " P08REI ,Rising Edge Interrupt status P0.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07REI ,Rising Edge Interrupt status P0.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " P06REI ,Rising Edge Interrupt status P0.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P05REI ,Rising Edge Interrupt status P0.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " P04REI ,Rising Edge Interrupt status P0.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03REI ,Rising Edge Interrupt status P0.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " P02REI ,Rising Edge Interrupt status P0.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01REI ,Rising Edge Interrupt status P0.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P00REI ,Rising Edge Interrupt status P0.0" "No interrupt,Interrupt"
|
|
line.long 0x4 "IO0IntStatF,GPIO 0 Interrupt Status for Falling edge register"
|
|
bitfld.long 0x4 30. " P030FEI ,Falling Edge Interrupt status P0.30" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 29. " P029FEI ,Falling Edge Interrupt status P0.29" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 28. " P028FEI ,Falling Edge Interrupt status P0.28" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 27. " P027FEI ,Falling Edge Interrupt status P0.27" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 26. " P026FEI ,Falling Edge Interrupt status P0.26" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 25. " P025FEI ,Falling Edge Interrupt status P0.25" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 24. " P024FEI ,Falling Edge Interrupt status P0.24" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 23. " P023FEI ,Falling Edge Interrupt status P0.23" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 22. " P022FEI ,Falling Edge Interrupt status P0.22" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 21. " P021FEI ,Falling Edge Interrupt status P0.21" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 20. " P020FEI ,Falling Edge Interrupt status P0.20" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 19. " P019FEI ,Falling Edge Interrupt status P0.19" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 18. " P018FEI ,Falling Edge Interrupt status P0.18" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 17. " P017FEI ,Falling Edge Interrupt status P0.17" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 16. " P016FEI ,Falling Edge Interrupt status P0.16" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 15. " P015FEI ,Falling Edge Interrupt status P0.15" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P011FEI ,Falling Edge Interrupt status P0.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " P010FEI ,Falling Edge Interrupt status P0.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P09FEI ,Falling Edge Interrupt status P0.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " P08FEI ,Falling Edge Interrupt status P0.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P07FEI ,Falling Edge Interrupt status P0.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " P06FEI ,Falling Edge Interrupt status P0.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P05FEI ,Falling Edge Interrupt status P0.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " P04FEI ,Falling Edge Interrupt status P0.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P03FEI ,Falling Edge Interrupt status P0.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " P02FEI ,Falling Edge Interrupt status P0.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P01FEI ,Falling Edge Interrupt status P0.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " P00FEI ,Falling Edge Interrupt status P0.0" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xB
|
|
textline " "
|
|
wgroup.long 0x8C++0x3
|
|
line.long 0x0 "IO0IntClr,GPIO 0 Interrupt Clear register"
|
|
bitfld.long 0x0 30. " P030CI ,Clear GPIO port Interrupt P0.30" "Unchanged,Cleared"
|
|
bitfld.long 0x0 29. " P029CI ,Clear GPIO port Interrupt P0.29" "Unchanged,Cleared"
|
|
bitfld.long 0x0 28. " P028CI ,Clear GPIO port Interrupt P0.28" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P027CI ,Clear GPIO port Interrupt P0.27" "Unchanged,Cleared"
|
|
bitfld.long 0x0 26. " P026CI ,Clear GPIO port Interrupt P0.26" "Unchanged,Cleared"
|
|
bitfld.long 0x0 25. " P025CI ,Clear GPIO port Interrupt P0.25" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 24. " P024CI ,Clear GPIO port Interrupt P0.24" "Unchanged,Cleared"
|
|
bitfld.long 0x0 23. " P023CI ,Clear GPIO port Interrupt P0.23" "Unchanged,Cleared"
|
|
bitfld.long 0x0 22. " P022CI ,Clear GPIO port Interrupt P0.22" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 21. " P021CI ,Clear GPIO port Interrupt P0.21" "Unchanged,Cleared"
|
|
bitfld.long 0x0 20. " P020CI ,Clear GPIO port Interrupt P0.20" "Unchanged,Cleared"
|
|
bitfld.long 0x0 19. " P019CI ,Clear GPIO port Interrupt P0.19" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 18. " P018CI ,Clear GPIO port Interrupt P0.18" "Unchanged,Cleared"
|
|
bitfld.long 0x0 17. " P017CI ,Clear GPIO port Interrupt P0.17" "Unchanged,Cleared"
|
|
bitfld.long 0x0 16. " P016CI ,Clear GPIO port Interrupt P0.16" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P015CI ,Clear GPIO port Interrupt P0.15" "Unchanged,Cleared"
|
|
bitfld.long 0x0 11. " P011CI ,Clear GPIO port Interrupt P0.11" "Unchanged,Cleared"
|
|
bitfld.long 0x0 10. " P010CI ,Clear GPIO port Interrupt P0.10" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P09CI ,Clear GPIO port Interrupt P0.9" "Unchanged,Cleared"
|
|
bitfld.long 0x0 8. " P08CI ,Clear GPIO port Interrupt P0.8" "Unchanged,Cleared"
|
|
bitfld.long 0x0 7. " P07CI ,Clear GPIO port Interrupt P0.7" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 6. " P06CI ,Clear GPIO port Interrupt P0.6" "Unchanged,Cleared"
|
|
bitfld.long 0x0 5. " P05CI ,Clear GPIO port Interrupt P0.5" "Unchanged,Cleared"
|
|
bitfld.long 0x0 4. " P04CI ,Clear GPIO port Interrupt P0.4" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03CI ,Clear GPIO port Interrupt P0.3" "Unchanged,Cleared"
|
|
bitfld.long 0x0 2. " P02CI ,Clear GPIO port Interrupt P0.2" "Unchanged,Cleared"
|
|
bitfld.long 0x0 1. " P01CI ,Clear GPIO port Interrupt P0.1" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 0. " P00CI ,Clear GPIO port Interrupt P0.0" "Unchanged,Cleared"
|
|
tree.end
|
|
tree.end
|
|
width 0x8
|
|
tree "GPIO1 (General Purpose Input/Output port 1)"
|
|
group.long 0x18++0x3 "APB"
|
|
line.long 0x0 "IO1DIR,GPIO 1 Port Direction Control Register"
|
|
bitfld.long 0x0 31. " P131DIR ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x0 30. " P130DIR ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x0 29. " P129DIR ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x0 28. " P128DIR ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P127DIR ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x0 26. " P126DIR ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x0 25. " P125DIR ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x0 24. " P124DIR ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P123DIR ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x0 22. " P122DIR ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x0 21. " P121DIR ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x0 20. " P120DIR ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P119DIR ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x0 18. " P118DIR ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x0 17. " P117DIR ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x0 16. " P116DIR ,Pin 1.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P115DIR ,Pin 1.15 Direction" "Input,Output"
|
|
bitfld.long 0x0 14. " P114DIR ,Pin 1.14 Direction" "Input,Output"
|
|
bitfld.long 0x0 10. " P110DIR ,Pin 1.10 Direction" "Input,Output"
|
|
bitfld.long 0x0 9. " P19DIR ,Pin 1.9 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 8. " P18DIR ,Pin 1.8 Direction" "Input,Output"
|
|
bitfld.long 0x0 4. " P14DIR ,Pin 1.4 Direction" "Input,Output"
|
|
bitfld.long 0x0 1. " P11DIR ,Pin 1.1 Direction" "Input,Output"
|
|
bitfld.long 0x0 0. " P10DIR ,Pin 1.0 Direction" "Input,Output"
|
|
width 0x8
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "IO1PIN,GPIO 1 Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P131VAL_Clear/Set ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P130VAL_Clear/Set ,Pin 1.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P129VAL_Clear/Set ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P128VAL_Clear/Set ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P127VAL_Clear/Set ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P126VAL_Clear/Set ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P125VAL_Clear/Set ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P124VAL_Clear/Set ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P123VAL_Clear/Set ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P122VAL_Clear/Set ,Pin 1.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P121VAL_Clear/Set ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P120VAL_Clear/Set ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P119VAL_Clear/Set ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P118VAL_Clear/Set ,Pin 1.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P117VAL_Clear/Set ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P116VAL_Clear/Set ,Pin 1.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P115VAL_Clear/Set ,Pin 1.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P114VAL_Clear/Set ,Pin 1.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P110VAL_Clear/Set ,Pin 1.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P19VAL_Clear/Set ,Pin 1.9 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P18VAL_Clear/Set ,Pin 1.8 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P14VAL_Clear/Set ,Pin 1.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P11VAL_Clear/Set ,Pin 1.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P10VAL_Clear/Set ,Pin 1.0 Value" "Low,High"
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
group.long 0x20++0x03 "Local Bus"
|
|
line.long 0x00 "FIO1DIR,Fast GPIO 1 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP131DIR ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP130DIR ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP129DIR ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP128DIR ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP127DIR ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP126DIR ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP125DIR ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP124DIR ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP123DIR ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP122DIR ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP121DIR ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP120DIR ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP119DIR ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP118DIR ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP117DIR ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP116DIR ,Pin 1.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP115DIR ,Pin 1.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP114DIR ,Pin 1.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP110DIR ,Pin 1.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP19DIR ,Pin 1.9 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FP18DIR ,Pin 1.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP14DIR ,Pin 1.4 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP11DIR ,Pin 1.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP10DIR ,Pin 1.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x30++0x7
|
|
line.long 0x00 "FIO1MASK,Fast GPIO 1 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP131MASK ,Pin 1.31 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP130MASK ,Pin 1.30 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP129MASK ,Pin 1.29 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP128MASK ,Pin 1.28 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP127MASK ,Pin 1.27 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP126MASK ,Pin 1.26 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP125MASK ,Pin 1.25 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP124MASK ,Pin 1.24 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP123MASK ,Pin 1.23 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP122MASK ,Pin 1.22 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP121MASK ,Pin 1.21 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP120MASK ,Pin 1.20 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP119MASK ,Pin 1.19 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP118MASK ,Pin 1.18 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP117MASK ,Pin 1.17 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP116MASK ,Pin 1.16 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP115MASK ,Pin 1.15 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP114MASK ,Pin 1.14 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP110MASK ,Pin 1.10 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP19MASK ,Pin 1.9 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP18MASK ,Pin 1.8 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP14MASK ,Pin 1.4 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 1. " FP11MASK ,Pin 1.1 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP10MASK ,Pin 1.0 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO1PIN,GPIO 1 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP131VAL_Clear/Set ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP130VAL_Clear/Set ,Pin 1.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP129VAL_Clear/Set ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP128VAL_Clear/Set ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP127VAL_Clear/Set ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP126VAL_Clear/Set ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP125VAL_Clear/Set ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP124VAL_Clear/Set ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP123VAL_Clear/Set ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP122VAL_Clear/Set ,Pin 1.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP121VAL_Clear/Set ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP120VAL_Clear/Set ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP119VAL_Clear/Set ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP118VAL_Clear/Set ,Pin 1.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP117VAL_Clear/Set ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP116VAL_Clear/Set ,Pin 1.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP115VAL_Clear/Set ,Pin 1.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP114VAL_Clear/Set ,Pin 1.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP110VAL_Clear/Set ,Pin 1.10 Value" "Low,High"
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP19VAL_Clear/Set ,Pin 1.9 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP18VAL_Clear/Set ,Pin 1.8 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP14VAL_Clear/Set ,Pin 1.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP11VAL_Clear/Set ,Pin 1.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP10VAL_Clear/Set ,Pin 1.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xa
|
|
tree "GPIO2 (General Purpose Input/Output port 2)"
|
|
group.long 0x40++0x03 "Local Bus"
|
|
line.long 0x00 "FIO2DIR,Fast GPIO 2 Port Direction Control Register"
|
|
bitfld.long 0x00 13. " FP213DIR ,Pin 2.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP212DIR ,Pin 2.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " FP211DIR ,Pin 2.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP210DIR ,Pin 2.10 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FP29DIR ,Pin 2.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP28DIR ,Pin 2.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 7. " FP27DIR ,Pin 2.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP26DIR ,Pin 2.6 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FP25DIR ,Pin 2.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP24DIR ,Pin 2.4 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " FP23DIR ,Pin 2.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP22DIR ,Pin 2.2 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP21DIR ,Pin 2.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP20DIR ,Pin 2.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "FIO2MASK,Fast GPIO 2 Port Mask Control Register"
|
|
bitfld.long 0x00 13. " FP213MASK ,Pin 2.13 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP212MASK ,Pin 2.12 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP211MASK ,Pin 2.11 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP210MASK ,Pin 2.10 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP29MASK ,Pin 2.9 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP28MASK ,Pin 2.8 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP27MASK ,Pin 2.7 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP26MASK ,Pin 2.6 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP25MASK ,Pin 2.5 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP24MASK ,Pin 2.4 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP23MASK ,Pin 2.3 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP22MASK ,Pin 2.2 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 1. " FP21MASK ,Pin 2.1 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FP20MASK ,Pin 2.0 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO2PIN,GPIO 2 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP213VAL_Clear/Set ,Pin 2.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP212VAL_Clear/Set ,Pin 2.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP211VAL_Clear/Set ,Pin 2.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP210VAL_Clear/Set ,Pin 2.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP29VAL_Clear/Set ,Pin 2.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP28VAL_Clear/Set ,Pin 2.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP27VAL_Clear/Set ,Pin 2.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP26VAL_Clear/Set ,Pin 2.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP25VAL_Clear/Set ,Pin 2.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP24VAL_Clear/Set ,Pin 2.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP23VAL_Clear/Set ,Pin 2.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP22VAL_Clear/Set ,Pin 2.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP21VAL_Clear/Set ,Pin 2.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP20VAL_Clear/Set ,Pin 2.0 Value" "Low,High"
|
|
width 0xB
|
|
base sd:0xE0028000
|
|
tree "GPIO 2 interrupt registers"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "IO2IntEnR,GPIO 2 Interrupt Enable for Rising edge register"
|
|
bitfld.long 0x0 13. " P213ER ,Enable Rising edge P2.13" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " P212ER ,Enable Rising edge P2.12" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " P211ER ,Enable Rising edge P2.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P210ER ,Enable Rising edge P2.10" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " P29ER ,Enable Rising edge P2.9" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " P28ER ,Enable Rising edge P2.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27ER ,Enable Rising edge P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " P26ER ,Enable Rising edge P2.6" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " P25ER ,Enable Rising edge P2.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P24ER ,Enable Rising edge P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " P23ER ,Enable Rising edge P2.3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " P22ER ,Enable Rising edge P2.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21ER ,Enable Rising edge P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " P20ER ,Enable Rising edge P2.0" "Disabled,Enabled"
|
|
line.long 0x4 "IO2IntEnF,GPIO 2 Interrupt Enable for Falling edge register"
|
|
bitfld.long 0x4 13. " P213EF ,Enable Falling edge P2.13" "Disabled,Enabled"
|
|
bitfld.long 0x4 12. " P212EF ,Enable Falling edge P2.12" "Disabled,Enabled"
|
|
bitfld.long 0x4 11. " P211EF ,Enable Falling edge P2.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 10. " P210EF ,Enable Falling edge P2.10" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " P29EF ,Enable Falling edge P2.9" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " P28EF ,Enable Falling edge P2.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P27EF ,Enable Falling edge P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " P26EF ,Enable Falling edge P2.6" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " P25EF ,Enable Falling edge P2.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 4. " P24EF ,Enable Falling edge P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x4 3. " P23EF ,Enable Falling edge P2.3" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " P22EF ,Enable Falling edge P2.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P21EF ,Enable Falling edge P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x4 0. " P20EF ,Enable Falling edge P2.0" "Disabled,Enabled"
|
|
width 0xD
|
|
tree "GPIO 2 Interrupt Status for edge registers"
|
|
textline " "
|
|
rgroup.long 0xA4++0x7
|
|
line.long 0x0 "IO2IntStatR,GPIO 2 Interrupt Status for Rising edge register"
|
|
bitfld.long 0x0 13. " P213REI ,Rising Edge Interrupt status P2.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " P212REI ,Rising Edge Interrupt status P2.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P211REI ,Rising Edge Interrupt status P2.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " P210REI ,Rising Edge Interrupt status P2.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P29REI ,Rising Edge Interrupt status P2.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " P28REI ,Rising Edge Interrupt status P2.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27REI ,Rising Edge Interrupt status P2.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " P26REI ,Rising Edge Interrupt status P2.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P25REI ,Rising Edge Interrupt status P2.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " P24REI ,Rising Edge Interrupt status P2.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P23REI ,Rising Edge Interrupt status P2.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " P22REI ,Rising Edge Interrupt status P2.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21REI ,Rising Edge Interrupt status P2.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P20REI ,Rising Edge Interrupt status P2.0" "No interrupt,Interrupt"
|
|
line.long 0x4 "IO2IntStatF,GPIO 2 Interrupt Status for Falling edge register"
|
|
bitfld.long 0x4 13. " P213FEI ,Falling Edge Interrupt status P2.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " P212FEI ,Falling Edge Interrupt status P2.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P211FEI ,Falling Edge Interrupt status P2.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " P210FEI ,Falling Edge Interrupt status P2.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P29FEI ,Falling Edge Interrupt status P2.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " P28FEI ,Falling Edge Interrupt status P2.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P27FEI ,Falling Edge Interrupt status P2.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " P26FEI ,Falling Edge Interrupt status P2.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P25FEI ,Falling Edge Interrupt status P2.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " P24FEI ,Falling Edge Interrupt status P2.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P23FEI ,Falling Edge Interrupt status P2.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " P22FEI ,Falling Edge Interrupt status P2.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P21FEI ,Falling Edge Interrupt status P2.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " P20FEI ,Falling Edge Interrupt status P2.0" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xB
|
|
textline " "
|
|
wgroup.long 0xAC++0x3
|
|
line.long 0x0 "IO2IntClr,GPIO 2 Interrupt Clear register"
|
|
bitfld.long 0x0 13. " P213CI ,Clear GPIO port Interrupt P2.13" "Unchanged,Cleared"
|
|
bitfld.long 0x0 12. " P212CI ,Clear GPIO port Interrupt P2.12" "Unchanged,Cleared"
|
|
bitfld.long 0x0 11. " P211CI ,Clear GPIO port Interrupt P2.11" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P210CI ,Clear GPIO port Interrupt P2.10" "Unchanged,Cleared"
|
|
bitfld.long 0x0 9. " P29CI ,Clear GPIO port Interrupt P2.9" "Unchanged,Cleared"
|
|
bitfld.long 0x0 8. " P28CI ,Clear GPIO port Interrupt P2.8" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27CI ,Clear GPIO port Interrupt P2.7" "Unchanged,Cleared"
|
|
bitfld.long 0x0 6. " P26CI ,Clear GPIO port Interrupt P2.6" "Unchanged,Cleared"
|
|
bitfld.long 0x0 5. " P25CI ,Clear GPIO port Interrupt P2.5" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P24CI ,Clear GPIO port Interrupt P2.4" "Unchanged,Cleared"
|
|
bitfld.long 0x0 3. " P23CI ,Clear GPIO port Interrupt P2.3" "Unchanged,Cleared"
|
|
bitfld.long 0x0 2. " P22CI ,Clear GPIO port Interrupt P2.2" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21CI ,Clear GPIO port Interrupt P2.1" "Unchanged,Cleared"
|
|
bitfld.long 0x0 0. " P20CI ,Clear GPIO port Interrupt P2.0" "Unchanged,Cleared"
|
|
tree.end
|
|
tree.end
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
tree "GPIO3 (General Purpose Input/Output port 3)"
|
|
group.long 0x60++0x03 "Local Bus"
|
|
line.long 0x00 "FIO3DIR,Fast GPIO 3 Port Direction Control Register"
|
|
bitfld.long 0x00 26. " FP326DIR ,Pin 3.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP325DIR ,Pin 3.25 Direction" "Input,Output"
|
|
group.long 0x70++0x7
|
|
line.long 0x00 "FIO3MASK,Fast GPIO 3 Port Mask Control Register"
|
|
bitfld.long 0x00 26. " FP326MASK ,Pin 3.26 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 25. " FP325MASK ,Pin 3.25 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
line.long 0x4 "FIO3PIN,GPIO 3 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP326VAL_Clear/Set ,Pin 3.26 Value" "Low,High"
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP325VAL_Clear/Set ,Pin 3.25 Value" "Low,High"
|
|
tree.end
|
|
tree "GPIO4 (General Purpose Input/Output port 4)"
|
|
group.long 0x80++0x03 "Local Bus"
|
|
line.long 0x00 "FIO4DIR,Fast GPIO 4 Port Direction Control Register"
|
|
bitfld.long 0x00 29. " FP429DIR ,Pin 4.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP428DIR ,Pin 4.28 Direction" "Input,Output"
|
|
group.long 0x90++0x7
|
|
line.long 0x00 "FIO4MASK,Fast GPIO 4 Port Mask Control Register"
|
|
bitfld.long 0x00 29. " FP429MASK ,Pin 4.29 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 28. " FP428MASK ,Pin 4.28 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
line.long 0x4 "FIO4PIN,GPIO 4 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP429VAL_Clear/Set ,Pin 4.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP428VAL_Clear/Set ,Pin 4.28 Value" "Low,High"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388")
|
|
; LPC2377, LPC2378, LPC2388
|
|
width 0xD
|
|
base sd:0xe0028000
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x0 "IOIntStatus,GPIO overall Interrupt Status"
|
|
bitfld.long 0x0 2. " P2Int ,PORT2 GPIO interrupt pending" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P0Int ,PORT0 GPIO interrupt pending" "No interrupt,Interrupt"
|
|
width 0x8
|
|
tree "GPIO0 (General Purpose Input/Output port 0)"
|
|
group.long 0x8++0x3 "APB"
|
|
line.long 0x0 "IO0DIR,GPIO 0 Port Direction Control Register"
|
|
bitfld.long 0x0 31. " P031DIR ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x0 30. " P030DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x0 29. " P029DIR ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x0 28. " P028DIR ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P027DIR ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x0 26. " P026DIR ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x0 25. " P025DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x0 24. " P024DIR ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P023DIR ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x0 22. " P022DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x0 21. " P021DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x0 20. " P020DIR ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019DIR ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x0 18. " P018DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x0 17. " P017DIR ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x0 16. " P016DIR ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P015DIR ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x0 14. " P014DIR ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x0 13. " P013DIR ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x0 12. " P012DIR ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P011DIR ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x0 10. " P010DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x0 9. " P09DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x0 8. " P08DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x0 6. " P06DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x0 5. " P05DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x0 4. " P04DIR ,Pin 0.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x0 2. " P02DIR ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x0 1. " P01DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x0 0. " P00DIR ,Pin 0.0 Direction" "Input,Output"
|
|
width 0x8
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "IO0PIN,GPIO 0 Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P031VAL_Clear/Set ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P030VAL_Clear/Set ,Pin 0.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P029VAL_Clear/Set ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P028VAL_Clear/Set ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P027VAL_Clear/Set ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P026VAL_Clear/Set ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P025VAL_Clear/Set ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P024VAL_Clear/Set ,Pin 0.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P023VAL_Clear/Set ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P022VAL_Clear/Set ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P021VAL_Clear/Set ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P020VAL_Clear/Set ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P019VAL_Clear/Set ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P018VAL_Clear/Set ,Pin 0.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P017VAL_Clear/Set ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P016VAL_Clear/Set ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P015VAL_Clear/Set ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P014VAL_Clear/Set ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P013VAL_Clear/Set ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P012VAL_Clear/Set ,Pin 0.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P011VAL_Clear/Set ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P010VAL_Clear/Set ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P09VAL_Clear/Set ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P08VAL_Clear/Set ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P07VAL_Clear/Set ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P06VAL_Clear/Set ,Pin 0.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P05VAL_Clear/Set ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P04VAL_Clear/Set ,Pin 0.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P03VAL_Clear/Set ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P02VAL_Clear/Set ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P01VAL_Clear/Set ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P00VAL_Clear/Set ,Pin 0.0 Value" "Low,High"
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
group.long 0x00++0x03 "Local Bus"
|
|
line.long 0x00 "FIO0DIR,Fast GPIO 0 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP031DIR ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP030DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP029DIR ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP028DIR ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP027DIR ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP026DIR ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP025DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP024DIR ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP023DIR ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP022DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP021DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP020DIR ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP019DIR ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP018DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP017DIR ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP016DIR ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP015DIR ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP014DIR ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP013DIR ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP012DIR ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP011DIR ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP010DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP09DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP08DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP07DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP06DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP05DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP04DIR ,Pin 0.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP03DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP02DIR ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP01DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP00DIR ,Pin 0.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "FIO0MASK,Fast GPIO 0 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP031MASK ,Pin 0.31 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP030MASK ,Pin 0.30 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP029MASK ,Pin 0.29 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP028MASK ,Pin 0.28 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP027MASK ,Pin 0.27 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP026MASK ,Pin 0.26 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP025MASK ,Pin 0.25 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP024MASK ,Pin 0.24 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP023MASK ,Pin 0.23 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP022MASK ,Pin 0.22 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP021MASK ,Pin 0.21 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP020MASK ,Pin 0.20 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP019MASK ,Pin 0.19 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP018MASK ,Pin 0.18 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP017MASK ,Pin 0.17 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP016MASK ,Pin 0.16 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP015MASK ,Pin 0.15 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP014MASK ,Pin 0.14 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP013MASK ,Pin 0.13 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP012MASK ,Pin 0.12 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP011MASK ,Pin 0.11 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP010MASK ,Pin 0.10 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP09MASK ,Pin 0.9 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP08MASK ,Pin 0.8 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP07MASK ,Pin 0.7 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP06MASK ,Pin 0.6 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP05MASK ,Pin 0.5 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP04MASK ,Pin 0.4 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP03MASK ,Pin 0.3 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP02MASK ,Pin 0.2 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP01MASK ,Pin 0.1 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP00MASK ,Pin 0.0 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO0PIN,GPIO 0 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP031VAL_Clear/Set ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP030VAL_Clear/Set ,Pin 0.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP029VAL_Clear/Set ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP028VAL_Clear/Set ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP027VAL_Clear/Set ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP026VAL_Clear/Set ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP025VAL_Clear/Set ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP024VAL_Clear/Set ,Pin 0.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP023VAL_Clear/Set ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP022VAL_Clear/Set ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP021VAL_Clear/Set ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP020VAL_Clear/Set ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP019VAL_Clear/Set ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP018VAL_Clear/Set ,Pin 0.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP017VAL_Clear/Set ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP016VAL_Clear/Set ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP015VAL_Clear/Set ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP014VAL_Clear/Set ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP013VAL_Clear/Set ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP012VAL_Clear/Set ,Pin 0.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP011VAL_Clear/Set ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP010VAL_Clear/Set ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP09VAL_Clear/Set ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP08VAL_Clear/Set ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP07VAL_Clear/Set ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP06VAL_Clear/Set ,Pin 0.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP05VAL_Clear/Set ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP04VAL_Clear/Set ,Pin 0.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP03VAL_Clear/Set ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP02VAL_Clear/Set ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP01VAL_Clear/Set ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP00VAL_Clear/Set ,Pin 0.0 Value" "Low,High"
|
|
width 0xB
|
|
base sd:0xE0028000
|
|
tree "GPIO 0 interrupt registers"
|
|
group.long 0x90++0x7
|
|
line.long 0x0 "IO0IntEnR,GPIO 0 Interrupt Enable for Rising edge register"
|
|
bitfld.long 0x0 31. " P031ER ,Enable Rising edge P0.31" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " P030ER ,Enable Rising edge P0.30" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " P029ER ,Enable Rising edge P0.29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P028ER ,Enable Rising edge P0.28" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " P027ER ,Enable Rising edge P0.27" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " P026ER ,Enable Rising edge P0.26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025ER ,Enable Rising edge P0.25" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " P024ER ,Enable Rising edge P0.24" "Disabled,Enabled"
|
|
bitfld.long 0x0 23. " P023ER ,Enable Rising edge P0.23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P022ER ,Enable Rising edge P0.22" "Disabled,Enabled"
|
|
bitfld.long 0x0 21. " P021ER ,Enable Rising edge P0.21" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " P020ER ,Enable Rising edge P0.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019ER ,Enable Rising edge P0.19" "Disabled,Enabled"
|
|
bitfld.long 0x0 18. " P018ER ,Enable Rising edge P0.18" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " P017ER ,Enable Rising edge P0.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P016ER ,Enable Rising edge P0.16" "Disabled,Enabled"
|
|
bitfld.long 0x0 15. " P015ER ,Enable Rising edge P0.15" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " P014ER ,Enable Rising edge P0.14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013ER ,Enable Rising edge P0.13" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " P012ER ,Enable Rising edge P0.12" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " P011ER ,Enable Rising edge P0.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P010ER ,Enable Rising edge P0.10" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " P09ER ,Enable Rising edge P0.9" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " P08ER ,Enable Rising edge P0.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07ER ,Enable Rising edge P0.7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " P06ER ,Enable Rising edge P0.6" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " P05ER ,Enable Rising edge P0.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P04ER ,Enable Rising edge P0.4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " P03ER ,Enable Rising edge P0.3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " P02ER ,Enable Rising edge P0.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01ER ,Enable Rising edge P0.1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " P00ER ,Enable Rising edge P0.0" "Disabled,Enabled"
|
|
line.long 0x4 "IO0IntEnF,GPIO 0 Interrupt Enable for Falling edge register"
|
|
bitfld.long 0x4 31. " P031EF ,Enable Falling edge P0.31" "Disabled,Enabled"
|
|
bitfld.long 0x4 30. " P030EF ,Enable Falling edge P0.30" "Disabled,Enabled"
|
|
bitfld.long 0x4 29. " P029EF ,Enable Falling edge P0.29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 28. " P028EF ,Enable Falling edge P0.28" "Disabled,Enabled"
|
|
bitfld.long 0x4 27. " P027EF ,Enable Falling edge P0.27" "Disabled,Enabled"
|
|
bitfld.long 0x4 26. " P026EF ,Enable Falling edge P0.26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P025EF ,Enable Falling edge P0.25" "Disabled,Enabled"
|
|
bitfld.long 0x4 24. " P024EF ,Enable Falling edge P0.24" "Disabled,Enabled"
|
|
bitfld.long 0x4 23. " P023EF ,Enable Falling edge P0.23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 22. " P022EF ,Enable Falling edge P0.22" "Disabled,Enabled"
|
|
bitfld.long 0x4 21. " P021EF ,Enable Falling edge P0.21" "Disabled,Enabled"
|
|
bitfld.long 0x4 20. " P020EF ,Enable Falling edge P0.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P019EF ,Enable Falling edge P0.19" "Disabled,Enabled"
|
|
bitfld.long 0x4 18. " P018EF ,Enable Falling edge P0.18" "Disabled,Enabled"
|
|
bitfld.long 0x4 17. " P017EF ,Enable Falling edge P0.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 16. " P016EF ,Enable Falling edge P0.16" "Disabled,Enabled"
|
|
bitfld.long 0x4 15. " P015EF ,Enable Falling edge P0.15" "Disabled,Enabled"
|
|
bitfld.long 0x4 14. " P014EF ,Enable Falling edge P0.14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P013EF ,Enable Falling edge P0.13" "Disabled,Enabled"
|
|
bitfld.long 0x4 12. " P012EF ,Enable Falling edge P0.12" "Disabled,Enabled"
|
|
bitfld.long 0x4 11. " P011EF ,Enable Falling edge P0.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 10. " P010EF ,Enable Falling edge P0.10" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " P09EF ,Enable Falling edge P0.9" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " P08EF ,Enable Falling edge P0.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P07EF ,Enable Falling edge P0.7" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " P06EF ,Enable Falling edge P0.6" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " P05EF ,Enable Falling edge P0.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 4. " P04EF ,Enable Falling edge P0.4" "Disabled,Enabled"
|
|
bitfld.long 0x4 3. " P03EF ,Enable Falling edge P0.3" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " P02EF ,Enable Falling edge P0.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P01EF ,Enable Falling edge P0.1" "Disabled,Enabled"
|
|
bitfld.long 0x4 0. " P00EF ,Enable Falling edge P0.0" "Disabled,Enabled"
|
|
width 0xD
|
|
tree "GPIO 0 Interrupt Status for edge registers"
|
|
textline " "
|
|
rgroup.long 0x84++0x7
|
|
line.long 0x0 "IO0IntStatR,GPIO 0 Interrupt Status for Rising edge register"
|
|
bitfld.long 0x0 31. " P031REI ,Rising Edge Interrupt status P0.31" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 30. " P030REI ,Rising Edge Interrupt status P0.30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 29. " P029REI ,Rising Edge Interrupt status P0.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 28. " P028REI ,Rising Edge Interrupt status P0.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P027REI ,Rising Edge Interrupt status P0.27" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 26. " P026REI ,Rising Edge Interrupt status P0.26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025REI ,Rising Edge Interrupt status P0.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 24. " P024REI ,Rising Edge Interrupt status P0.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P023REI ,Rising Edge Interrupt status P0.23" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 22. " P022REI ,Rising Edge Interrupt status P0.22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 21. " P021REI ,Rising Edge Interrupt status P0.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 20. " P020REI ,Rising Edge Interrupt status P0.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019REI ,Rising Edge Interrupt status P0.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 18. " P018REI ,Rising Edge Interrupt status P0.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 17. " P017REI ,Rising Edge Interrupt status P0.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 16. " P016REI ,Rising Edge Interrupt status P0.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P015REI ,Rising Edge Interrupt status P0.15" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 14. " P014REI ,Rising Edge Interrupt status P0.14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013REI ,Rising Edge Interrupt status P0.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " P012REI ,Rising Edge Interrupt status P0.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P011REI ,Rising Edge Interrupt status P0.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " P010REI ,Rising Edge Interrupt status P0.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P09REI ,Rising Edge Interrupt status P0.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " P08REI ,Rising Edge Interrupt status P0.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07REI ,Rising Edge Interrupt status P0.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " P06REI ,Rising Edge Interrupt status P0.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P05REI ,Rising Edge Interrupt status P0.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " P04REI ,Rising Edge Interrupt status P0.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03REI ,Rising Edge Interrupt status P0.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " P02REI ,Rising Edge Interrupt status P0.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01REI ,Rising Edge Interrupt status P0.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P00REI ,Rising Edge Interrupt status P0.0" "No interrupt,Interrupt"
|
|
line.long 0x4 "IO0IntStatF,GPIO 0 Interrupt Status for Falling edge register"
|
|
bitfld.long 0x4 31. " P031FEI ,Falling Edge Interrupt status P0.31" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 30. " P030FEI ,Falling Edge Interrupt status P0.30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 29. " P029FEI ,Falling Edge Interrupt status P0.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 28. " P028FEI ,Falling Edge Interrupt status P0.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 27. " P027FEI ,Falling Edge Interrupt status P0.27" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 26. " P026FEI ,Falling Edge Interrupt status P0.26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P025FEI ,Falling Edge Interrupt status P0.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 24. " P024FEI ,Falling Edge Interrupt status P0.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 23. " P023FEI ,Falling Edge Interrupt status P0.23" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 22. " P022FEI ,Falling Edge Interrupt status P0.22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 21. " P021FEI ,Falling Edge Interrupt status P0.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 20. " P020FEI ,Falling Edge Interrupt status P0.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P019FEI ,Falling Edge Interrupt status P0.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 18. " P018FEI ,Falling Edge Interrupt status P0.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 17. " P017FEI ,Falling Edge Interrupt status P0.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 16. " P016FEI ,Falling Edge Interrupt status P0.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 15. " P015FEI ,Falling Edge Interrupt status P0.15" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 14. " P014FEI ,Falling Edge Interrupt status P0.14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P013FEI ,Falling Edge Interrupt status P0.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " P012FEI ,Falling Edge Interrupt status P0.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P011FEI ,Falling Edge Interrupt status P0.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " P010FEI ,Falling Edge Interrupt status P0.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P09FEI ,Falling Edge Interrupt status P0.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " P08FEI ,Falling Edge Interrupt status P0.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P07FEI ,Falling Edge Interrupt status P0.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " P06FEI ,Falling Edge Interrupt status P0.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P05FEI ,Falling Edge Interrupt status P0.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " P04FEI ,Falling Edge Interrupt status P0.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P03FEI ,Falling Edge Interrupt status P0.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " P02FEI ,Falling Edge Interrupt status P0.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P01FEI ,Falling Edge Interrupt status P0.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " P00FEI ,Falling Edge Interrupt status P0.0" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xB
|
|
textline " "
|
|
wgroup.long 0x8C++0x3
|
|
line.long 0x0 "IO0IntClr,GPIO 0 Interrupt Clear register"
|
|
bitfld.long 0x0 31. " P031CI ,Clear GPIO port Interrupt P0.31" "Unchanged,Cleared"
|
|
bitfld.long 0x0 30. " P030CI ,Clear GPIO port Interrupt P0.30" "Unchanged,Cleared"
|
|
bitfld.long 0x0 29. " P029CI ,Clear GPIO port Interrupt P0.29" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P028CI ,Clear GPIO port Interrupt P0.28" "Unchanged,Cleared"
|
|
bitfld.long 0x0 27. " P027CI ,Clear GPIO port Interrupt P0.27" "Unchanged,Cleared"
|
|
bitfld.long 0x0 26. " P026CI ,Clear GPIO port Interrupt P0.26" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025CI ,Clear GPIO port Interrupt P0.25" "Unchanged,Cleared"
|
|
bitfld.long 0x0 24. " P024CI ,Clear GPIO port Interrupt P0.24" "Unchanged,Cleared"
|
|
bitfld.long 0x0 23. " P023CI ,Clear GPIO port Interrupt P0.23" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P022CI ,Clear GPIO port Interrupt P0.22" "Unchanged,Cleared"
|
|
bitfld.long 0x0 21. " P021CI ,Clear GPIO port Interrupt P0.21" "Unchanged,Cleared"
|
|
bitfld.long 0x0 20. " P020CI ,Clear GPIO port Interrupt P0.20" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019CI ,Clear GPIO port Interrupt P0.19" "Unchanged,Cleared"
|
|
bitfld.long 0x0 18. " P018CI ,Clear GPIO port Interrupt P0.18" "Unchanged,Cleared"
|
|
bitfld.long 0x0 17. " P017CI ,Clear GPIO port Interrupt P0.17" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P016CI ,Clear GPIO port Interrupt P0.16" "Unchanged,Cleared"
|
|
bitfld.long 0x0 15. " P015CI ,Clear GPIO port Interrupt P0.15" "Unchanged,Cleared"
|
|
bitfld.long 0x0 14. " P014CI ,Clear GPIO port Interrupt P0.14" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013CI ,Clear GPIO port Interrupt P0.13" "Unchanged,Cleared"
|
|
bitfld.long 0x0 12. " P012CI ,Clear GPIO port Interrupt P0.12" "Unchanged,Cleared"
|
|
bitfld.long 0x0 11. " P011CI ,Clear GPIO port Interrupt P0.11" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P010CI ,Clear GPIO port Interrupt P0.10" "Unchanged,Cleared"
|
|
bitfld.long 0x0 9. " P09CI ,Clear GPIO port Interrupt P0.9" "Unchanged,Cleared"
|
|
bitfld.long 0x0 8. " P08CI ,Clear GPIO port Interrupt P0.8" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07CI ,Clear GPIO port Interrupt P0.7" "Unchanged,Cleared"
|
|
bitfld.long 0x0 6. " P06CI ,Clear GPIO port Interrupt P0.6" "Unchanged,Cleared"
|
|
bitfld.long 0x0 5. " P05CI ,Clear GPIO port Interrupt P0.5" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P04CI ,Clear GPIO port Interrupt P0.4" "Unchanged,Cleared"
|
|
bitfld.long 0x0 3. " P03CI ,Clear GPIO port Interrupt P0.3" "Unchanged,Cleared"
|
|
bitfld.long 0x0 2. " P02CI ,Clear GPIO port Interrupt P0.2" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01CI ,Clear GPIO port Interrupt P0.1" "Unchanged,Cleared"
|
|
bitfld.long 0x0 0. " P00CI ,Clear GPIO port Interrupt P0.0" "Unchanged,Cleared"
|
|
tree.end
|
|
tree.end
|
|
width 0x8
|
|
tree "GPIO1 (General Purpose Input/Output port 1)"
|
|
group.long 0x18++0x3 "APB"
|
|
line.long 0x0 "IO1DIR,GPIO 1 Port Direction Control Register"
|
|
bitfld.long 0x0 31. " P131DIR ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x0 30. " P130DIR ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x0 29. " P129DIR ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x0 28. " P128DIR ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P127DIR ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x0 26. " P126DIR ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x0 25. " P125DIR ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x0 24. " P124DIR ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P123DIR ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x0 22. " P122DIR ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x0 21. " P121DIR ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x0 20. " P120DIR ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P119DIR ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x0 18. " P118DIR ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x0 17. " P117DIR ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x0 16. " P116DIR ,Pin 1.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P115DIR ,Pin 1.15 Direction" "Input,Output"
|
|
bitfld.long 0x0 14. " P114DIR ,Pin 1.14 Direction" "Input,Output"
|
|
bitfld.long 0x0 10. " P110DIR ,Pin 1.10 Direction" "Input,Output"
|
|
bitfld.long 0x0 9. " P19DIR ,Pin 1.9 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 8. " P18DIR ,Pin 1.8 Direction" "Input,Output"
|
|
bitfld.long 0x0 4. " P14DIR ,Pin 1.4 Direction" "Input,Output"
|
|
bitfld.long 0x0 1. " P11DIR ,Pin 1.1 Direction" "Input,Output"
|
|
bitfld.long 0x0 0. " P10DIR ,Pin 1.0 Direction" "Input,Output"
|
|
width 0x8
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "IO1PIN,GPIO 1 Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P131VAL_Clear/Set ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P130VAL_Clear/Set ,Pin 1.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P129VAL_Clear/Set ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P128VAL_Clear/Set ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P127VAL_Clear/Set ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P126VAL_Clear/Set ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P125VAL_Clear/Set ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P124VAL_Clear/Set ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P123VAL_Clear/Set ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P122VAL_Clear/Set ,Pin 1.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P121VAL_Clear/Set ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P120VAL_Clear/Set ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P119VAL_Clear/Set ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P118VAL_Clear/Set ,Pin 1.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P117VAL_Clear/Set ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P116VAL_Clear/Set ,Pin 1.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P115VAL_Clear/Set ,Pin 1.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P114VAL_Clear/Set ,Pin 1.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P110VAL_Clear/Set ,Pin 1.10 Value" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P19VAL_Clear/Set ,Pin 1.9 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P18VAL_Clear/Set ,Pin 1.8 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P14VAL_Clear/Set ,Pin 1.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P11VAL_Clear/Set ,Pin 1.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P10VAL_Clear/Set ,Pin 1.0 Value" "Low,High"
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
group.long 0x20++0x03 "Local Bus"
|
|
line.long 0x00 "FIO1DIR,Fast GPIO 1 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP131DIR ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP130DIR ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP129DIR ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP128DIR ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP127DIR ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP126DIR ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP125DIR ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP124DIR ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP123DIR ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP122DIR ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP121DIR ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP120DIR ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP119DIR ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP118DIR ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP117DIR ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP116DIR ,Pin 1.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP115DIR ,Pin 1.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP114DIR ,Pin 1.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP110DIR ,Pin 1.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP19DIR ,Pin 1.9 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FP18DIR ,Pin 1.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP14DIR ,Pin 1.4 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP11DIR ,Pin 1.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP10DIR ,Pin 1.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x30++0x7
|
|
line.long 0x00 "FIO1MASK,Fast GPIO 1 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP131MASK ,Pin 1.31 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP130MASK ,Pin 1.30 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP129MASK ,Pin 1.29 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP128MASK ,Pin 1.28 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP127MASK ,Pin 1.27 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP126MASK ,Pin 1.26 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP125MASK ,Pin 1.25 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP124MASK ,Pin 1.24 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP123MASK ,Pin 1.23 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP122MASK ,Pin 1.22 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP121MASK ,Pin 1.21 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP120MASK ,Pin 1.20 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP119MASK ,Pin 1.19 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP118MASK ,Pin 1.18 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP117MASK ,Pin 1.17 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP116MASK ,Pin 1.16 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP115MASK ,Pin 1.15 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP114MASK ,Pin 1.14 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP110MASK ,Pin 1.10 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP19MASK ,Pin 1.9 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP18MASK ,Pin 1.8 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP14MASK ,Pin 1.4 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 1. " FP11MASK ,Pin 1.1 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP10MASK ,Pin 1.0 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
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|
width 0xa
|
|
line.long 0x4 "FIO1PIN,GPIO 1 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP131VAL_Clear/Set ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP130VAL_Clear/Set ,Pin 1.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP129VAL_Clear/Set ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP128VAL_Clear/Set ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP127VAL_Clear/Set ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP126VAL_Clear/Set ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP125VAL_Clear/Set ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP124VAL_Clear/Set ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP123VAL_Clear/Set ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP122VAL_Clear/Set ,Pin 1.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP121VAL_Clear/Set ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP120VAL_Clear/Set ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP119VAL_Clear/Set ,Pin 1.19 Value" "Low,High"
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|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP118VAL_Clear/Set ,Pin 1.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP117VAL_Clear/Set ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP116VAL_Clear/Set ,Pin 1.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP115VAL_Clear/Set ,Pin 1.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP114VAL_Clear/Set ,Pin 1.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP110VAL_Clear/Set ,Pin 1.10 Value" "Low,High"
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP19VAL_Clear/Set ,Pin 1.9 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP18VAL_Clear/Set ,Pin 1.8 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP14VAL_Clear/Set ,Pin 1.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP11VAL_Clear/Set ,Pin 1.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP10VAL_Clear/Set ,Pin 1.0 Value" "Low,High"
|
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tree.end
|
|
width 0xa
|
|
tree "GPIO2 (General Purpose Input/Output port 2)"
|
|
group.long 0x40++0x03 "Local Bus"
|
|
line.long 0x00 "FIO2DIR,Fast GPIO 2 Port Direction Control Register"
|
|
bitfld.long 0x00 13. " FP213DIR ,Pin 2.13 Direction" "Input,Output"
|
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bitfld.long 0x00 12. " FP212DIR ,Pin 2.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " FP211DIR ,Pin 2.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP210DIR ,Pin 2.10 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FP29DIR ,Pin 2.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP28DIR ,Pin 2.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 7. " FP27DIR ,Pin 2.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP26DIR ,Pin 2.6 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FP25DIR ,Pin 2.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP24DIR ,Pin 2.4 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " FP23DIR ,Pin 2.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP22DIR ,Pin 2.2 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP21DIR ,Pin 2.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP20DIR ,Pin 2.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "FIO2MASK,Fast GPIO 2 Port Mask Control Register"
|
|
bitfld.long 0x00 13. " FP213MASK ,Pin 2.13 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP212MASK ,Pin 2.12 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP211MASK ,Pin 2.11 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP210MASK ,Pin 2.10 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP29MASK ,Pin 2.9 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP28MASK ,Pin 2.8 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP27MASK ,Pin 2.7 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP26MASK ,Pin 2.6 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP25MASK ,Pin 2.5 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP24MASK ,Pin 2.4 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP23MASK ,Pin 2.3 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP22MASK ,Pin 2.2 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP21MASK ,Pin 2.1 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP20MASK ,Pin 2.0 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO2PIN,GPIO 2 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP213VAL_Clear/Set ,Pin 2.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP212VAL_Clear/Set ,Pin 2.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP211VAL_Clear/Set ,Pin 2.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP210VAL_Clear/Set ,Pin 2.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP29VAL_Clear/Set ,Pin 2.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP28VAL_Clear/Set ,Pin 2.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP27VAL_Clear/Set ,Pin 2.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP26VAL_Clear/Set ,Pin 2.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP25VAL_Clear/Set ,Pin 2.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP24VAL_Clear/Set ,Pin 2.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP23VAL_Clear/Set ,Pin 2.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP22VAL_Clear/Set ,Pin 2.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP21VAL_Clear/Set ,Pin 2.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP20VAL_Clear/Set ,Pin 2.0 Value" "Low,High"
|
|
width 0xB
|
|
base sd:0xE0028000
|
|
tree "GPIO 2 interrupt registers"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "IO2IntEnR,GPIO 2 Interrupt Enable for Rising edge register"
|
|
bitfld.long 0x0 13. " P213ER ,Enable Rising edge P2.13" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " P212ER ,Enable Rising edge P2.12" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " P211ER ,Enable Rising edge P2.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P210ER ,Enable Rising edge P2.10" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " P29ER ,Enable Rising edge P2.9" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " P28ER ,Enable Rising edge P2.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27ER ,Enable Rising edge P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " P26ER ,Enable Rising edge P2.6" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " P25ER ,Enable Rising edge P2.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P24ER ,Enable Rising edge P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " P23ER ,Enable Rising edge P2.3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " P22ER ,Enable Rising edge P2.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21ER ,Enable Rising edge P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " P20ER ,Enable Rising edge P2.0" "Disabled,Enabled"
|
|
line.long 0x4 "IO2IntEnF,GPIO 2 Interrupt Enable for Falling edge register"
|
|
bitfld.long 0x4 13. " P213EF ,Enable Falling edge P2.13" "Disabled,Enabled"
|
|
bitfld.long 0x4 12. " P212EF ,Enable Falling edge P2.12" "Disabled,Enabled"
|
|
bitfld.long 0x4 11. " P211EF ,Enable Falling edge P2.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 10. " P210EF ,Enable Falling edge P2.10" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " P29EF ,Enable Falling edge P2.9" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " P28EF ,Enable Falling edge P2.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P27EF ,Enable Falling edge P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " P26EF ,Enable Falling edge P2.6" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " P25EF ,Enable Falling edge P2.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 4. " P24EF ,Enable Falling edge P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x4 3. " P23EF ,Enable Falling edge P2.3" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " P22EF ,Enable Falling edge P2.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P21EF ,Enable Falling edge P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x4 0. " P20EF ,Enable Falling edge P2.0" "Disabled,Enabled"
|
|
width 0xD
|
|
tree "GPIO 2 Interrupt Status for edge registers"
|
|
textline " "
|
|
rgroup.long 0xA4++0x7
|
|
line.long 0x0 "IO2IntStatR,GPIO 2 Interrupt Status for Rising edge register"
|
|
bitfld.long 0x0 13. " P213REI ,Rising Edge Interrupt status P2.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " P212REI ,Rising Edge Interrupt status P2.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P211REI ,Rising Edge Interrupt status P2.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " P210REI ,Rising Edge Interrupt status P2.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P29REI ,Rising Edge Interrupt status P2.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " P28REI ,Rising Edge Interrupt status P2.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27REI ,Rising Edge Interrupt status P2.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " P26REI ,Rising Edge Interrupt status P2.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P25REI ,Rising Edge Interrupt status P2.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " P24REI ,Rising Edge Interrupt status P2.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P23REI ,Rising Edge Interrupt status P2.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " P22REI ,Rising Edge Interrupt status P2.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21REI ,Rising Edge Interrupt status P2.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P20REI ,Rising Edge Interrupt status P2.0" "No interrupt,Interrupt"
|
|
line.long 0x4 "IO2IntStatF,GPIO 2 Interrupt Status for Falling edge register"
|
|
bitfld.long 0x4 13. " P213FEI ,Falling Edge Interrupt status P2.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " P212FEI ,Falling Edge Interrupt status P2.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P211FEI ,Falling Edge Interrupt status P2.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " P210FEI ,Falling Edge Interrupt status P2.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P29FEI ,Falling Edge Interrupt status P2.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " P28FEI ,Falling Edge Interrupt status P2.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P27FEI ,Falling Edge Interrupt status P2.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " P26FEI ,Falling Edge Interrupt status P2.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P25FEI ,Falling Edge Interrupt status P2.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " P24FEI ,Falling Edge Interrupt status P2.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P23FEI ,Falling Edge Interrupt status P2.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " P22FEI ,Falling Edge Interrupt status P2.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P21FEI ,Falling Edge Interrupt status P2.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " P20FEI ,Falling Edge Interrupt status P2.0" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xB
|
|
textline " "
|
|
wgroup.long 0xAC++0x3
|
|
line.long 0x0 "IO2IntClr,GPIO 2 Interrupt Clear register"
|
|
bitfld.long 0x0 13. " P213CI ,Clear GPIO port Interrupt P2.13" "Unchanged,Cleared"
|
|
bitfld.long 0x0 12. " P212CI ,Clear GPIO port Interrupt P2.12" "Unchanged,Cleared"
|
|
bitfld.long 0x0 11. " P211CI ,Clear GPIO port Interrupt P2.11" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P210CI ,Clear GPIO port Interrupt P2.10" "Unchanged,Cleared"
|
|
bitfld.long 0x0 9. " P29CI ,Clear GPIO port Interrupt P2.9" "Unchanged,Cleared"
|
|
bitfld.long 0x0 8. " P28CI ,Clear GPIO port Interrupt P2.8" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27CI ,Clear GPIO port Interrupt P2.7" "Unchanged,Cleared"
|
|
bitfld.long 0x0 6. " P26CI ,Clear GPIO port Interrupt P2.6" "Unchanged,Cleared"
|
|
bitfld.long 0x0 5. " P25CI ,Clear GPIO port Interrupt P2.5" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P24CI ,Clear GPIO port Interrupt P2.4" "Unchanged,Cleared"
|
|
bitfld.long 0x0 3. " P23CI ,Clear GPIO port Interrupt P2.3" "Unchanged,Cleared"
|
|
bitfld.long 0x0 2. " P22CI ,Clear GPIO port Interrupt P2.2" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21CI ,Clear GPIO port Interrupt P2.1" "Unchanged,Cleared"
|
|
bitfld.long 0x0 0. " P20CI ,Clear GPIO port Interrupt P2.0" "Unchanged,Cleared"
|
|
tree.end
|
|
tree.end
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
tree "GPIO3 (General Purpose Input/Output port 3)"
|
|
group.long 0x60++0x03 "Local Bus"
|
|
line.long 0x00 "FIO3DIR,Fast GPIO 3 Port Direction Control Register"
|
|
bitfld.long 0x00 26. " FP326DIR ,Pin 3.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP325DIR ,Pin 3.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP324DIR ,Pin 3.24 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " FP323DIR ,Pin 3.23 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP37DIR ,Pin 3.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP36DIR ,Pin 3.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP35DIR ,Pin 3.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP34DIR ,Pin 3.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP33DIR ,Pin 3.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP32DIR ,Pin 3.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP31DIR ,Pin 3.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP30DIR ,Pin 3.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x70++0x7
|
|
line.long 0x00 "FIO3MASK,Fast GPIO 3 Port Mask Control Register"
|
|
bitfld.long 0x00 26. " FP326MASK ,Pin 3.26 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 25. " FP325MASK ,Pin 3.25 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP324MASK ,Pin 3.24 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP323MASK ,Pin 3.23 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 7. " FP37MASK ,Pin 3.7 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP36MASK ,Pin 3.6 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FP35MASK ,Pin 3.5 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 4. " FP34MASK ,Pin 3.4 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP33MASK ,Pin 3.3 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FP32MASK ,Pin 3.2 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 1. " FP31MASK ,Pin 3.1 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP30MASK ,Pin 3.0 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO3PIN,GPIO 3 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP326VAL_Clear/Set ,Pin 3.26 Value" "Low,High"
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP325VAL_Clear/Set ,Pin 3.25 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP324VAL_Clear/Set ,Pin 3.24 Value" "Low,High"
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP323VAL_Clear/Set ,Pin 3.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP38VAL_Clear/Set ,Pin 3.8 Value" "Low,High"
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP37VAL_Clear/Set ,Pin 3.7 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP36VAL_Clear/Set ,Pin 3.6 Value" "Low,High"
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP35VAL_Clear/Set ,Pin 3.5 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP34VAL_Clear/Set ,Pin 3.4 Value" "Low,High"
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP33VAL_Clear/Set ,Pin 3.3 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP32VAL_Clear/Set ,Pin 3.2 Value" "Low,High"
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP31VAL_Clear/Set ,Pin 3.1 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP30VAL_Clear/Set ,Pin 3.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xa
|
|
tree "GPIO4 (General Purpose Input/Output port 4)"
|
|
group.long 0x80++0x03 "Local Bus"
|
|
line.long 0x00 "FIO4DIR,Fast GPIO 4 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP431DIR ,Pin 4.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP430DIR ,Pin 4.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP429DIR ,Pin 4.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP428DIR ,Pin 4.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP425DIR ,Pin 4.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP424DIR ,Pin 4.24 Direction" "Input,Output"
|
|
bitfld.long 0x00 15. " FP415DIR ,Pin 4.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP414DIR ,Pin 4.14 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP413DIR ,Pin 4.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP412DIR ,Pin 4.12 Direction" "Input,Output"
|
|
bitfld.long 0x00 11. " FP411DIR ,Pin 4.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP410DIR ,Pin 4.10 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FP49DIR ,Pin 4.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP48DIR ,Pin 4.8 Direction" "Input,Output"
|
|
bitfld.long 0x00 7. " FP47DIR ,Pin 4.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP46DIR ,Pin 4.6 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FP45DIR ,Pin 4.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP44DIR ,Pin 4.4 Direction" "Input,Output"
|
|
bitfld.long 0x00 3. " FP43DIR ,Pin 4.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP42DIR ,Pin 4.2 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP41DIR ,Pin 4.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP40DIR ,Pin 4.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x90++0x7
|
|
line.long 0x00 "FIO4MASK,Fast GPIO 4 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP431MASK ,Pin 4.31 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP430MASK ,Pin 4.30 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP429MASK ,Pin 4.29 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP428MASK ,Pin 4.28 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 25. " FP425MASK ,Pin 4.25 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP424MASK ,Pin 4.24 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP415MASK ,Pin 4.15 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP414MASK ,Pin 4.14 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 13. " FP413MASK ,Pin 4.13 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FP412MASK ,Pin 4.12 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP411MASK ,Pin 4.11 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 10. " FP410MASK ,Pin 4.10 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FP49MASK ,Pin 4.9 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP48MASK ,Pin 4.8 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 7. " FP47MASK ,Pin 4.7 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FP46MASK ,Pin 4.6 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP45MASK ,Pin 4.5 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 4. " FP44MASK ,Pin 4.4 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP43MASK ,Pin 4.3 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP42MASK ,Pin 4.2 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 1. " FP41MASK ,Pin 4.1 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FP40MASK ,Pin 4.0 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO4PIN,GPIO 4 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP431VAL_Clear/Set ,Pin 4.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP430VAL_Clear/Set ,Pin 4.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP429VAL_Clear/Set ,Pin 4.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP428VAL_Clear/Set ,Pin 4.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP425VAL_Clear/Set ,Pin 4.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP424VAL_Clear/Set ,Pin 4.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP415VAL_Clear/Set ,Pin 4.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP414VAL_Clear/Set ,Pin 4.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP413VAL_Clear/Set ,Pin 4.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP412VAL_Clear/Set ,Pin 4.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP411VAL_Clear/Set ,Pin 4.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP410VAL_Clear/Set ,Pin 4.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP49VAL_Clear/Set ,Pin 4.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP48VAL_Clear/Set ,Pin 4.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP47VAL_Clear/Set ,Pin 4.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP46VAL_Clear/Set ,Pin 4.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP45VAL_Clear/Set ,Pin 4.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP44VAL_Clear/Set ,Pin 4.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP43VAL_Clear/Set ,Pin 4.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP42VAL_Clear/Set ,Pin 4.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP41VAL_Clear/Set ,Pin 4.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP40VAL_Clear/Set ,Pin 4.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="LPC2458")
|
|
; LPC2458
|
|
width 0xD
|
|
base sd:0xe0028000
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x0 "IOIntStatus,GPIO overall Interrupt Status"
|
|
bitfld.long 0x0 2. " P2Int ,PORT2 GPIO interrupt pending" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P0Int ,PORT0 GPIO interrupt pending" "No interrupt,Interrupt"
|
|
width 0x8
|
|
tree "GPIO0 (General Purpose Input/Output port 0)"
|
|
group.long 0x8++0x3 "APB"
|
|
line.long 0x0 "IO0DIR,GPIO 0 Port Direction Control Register"
|
|
bitfld.long 0x0 31. " P031DIR ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x0 30. " P030DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x0 29. " P029DIR ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x0 28. " P028DIR ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P027DIR ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x0 26. " P026DIR ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x0 25. " P025DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x0 24. " P024DIR ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P023DIR ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x0 22. " P022DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x0 21. " P021DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x0 20. " P020DIR ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019DIR ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x0 18. " P018DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x0 17. " P017DIR ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x0 16. " P016DIR ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P015DIR ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x0 14. " P014DIR ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x0 13. " P013DIR ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x0 12. " P012DIR ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P011DIR ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x0 10. " P010DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x0 9. " P09DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x0 8. " P08DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x0 6. " P06DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x0 5. " P05DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x0 4. " P04DIR ,Pin 0.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x0 2. " P02DIR ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x0 1. " P01DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x0 0. " P00DIR ,Pin 0.0 Direction" "Input,Output"
|
|
width 0x8
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "IO0PIN,GPIO 0 Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P031VAL_Clear/Set ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P030VAL_Clear/Set ,Pin 0.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P029VAL_Clear/Set ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P028VAL_Clear/Set ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P027VAL_Clear/Set ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P026VAL_Clear/Set ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P025VAL_Clear/Set ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P024VAL_Clear/Set ,Pin 0.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P023VAL_Clear/Set ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P022VAL_Clear/Set ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P021VAL_Clear/Set ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P020VAL_Clear/Set ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P019VAL_Clear/Set ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P018VAL_Clear/Set ,Pin 0.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P017VAL_Clear/Set ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P016VAL_Clear/Set ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P015VAL_Clear/Set ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P014VAL_Clear/Set ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P013VAL_Clear/Set ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P012VAL_Clear/Set ,Pin 0.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P011VAL_Clear/Set ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P010VAL_Clear/Set ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P09VAL_Clear/Set ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P08VAL_Clear/Set ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P07VAL_Clear/Set ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P06VAL_Clear/Set ,Pin 0.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P05VAL_Clear/Set ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P04VAL_Clear/Set ,Pin 0.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P03VAL_Clear/Set ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P02VAL_Clear/Set ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P01VAL_Clear/Set ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P00VAL_Clear/Set ,Pin 0.0 Value" "Low,High"
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
group.long 0x00++0x03 "Local Bus"
|
|
line.long 0x00 "FIO0DIR,Fast GPIO 0 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP031DIR ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP030DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP029DIR ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP028DIR ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP027DIR ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP026DIR ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP025DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP024DIR ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP023DIR ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP022DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP021DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP020DIR ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP019DIR ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP018DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP017DIR ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP016DIR ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP015DIR ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP014DIR ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP013DIR ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP012DIR ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP011DIR ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP010DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP09DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP08DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP07DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP06DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP05DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP04DIR ,Pin 0.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP03DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP02DIR ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP01DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP00DIR ,Pin 0.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "FIO0MASK,Fast GPIO 0 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP031MASK ,Pin 0.31 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP030MASK ,Pin 0.30 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP029MASK ,Pin 0.29 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP028MASK ,Pin 0.28 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP027MASK ,Pin 0.27 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP026MASK ,Pin 0.26 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP025MASK ,Pin 0.25 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP024MASK ,Pin 0.24 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP023MASK ,Pin 0.23 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP022MASK ,Pin 0.22 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP021MASK ,Pin 0.21 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP020MASK ,Pin 0.20 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP019MASK ,Pin 0.19 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP018MASK ,Pin 0.18 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP017MASK ,Pin 0.17 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP016MASK ,Pin 0.16 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP015MASK ,Pin 0.15 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP014MASK ,Pin 0.14 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP013MASK ,Pin 0.13 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP012MASK ,Pin 0.12 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP011MASK ,Pin 0.11 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP010MASK ,Pin 0.10 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP09MASK ,Pin 0.9 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP08MASK ,Pin 0.8 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP07MASK ,Pin 0.7 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP06MASK ,Pin 0.6 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP05MASK ,Pin 0.5 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP04MASK ,Pin 0.4 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP03MASK ,Pin 0.3 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP02MASK ,Pin 0.2 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP01MASK ,Pin 0.1 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP00MASK ,Pin 0.0 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO0PIN,GPIO 0 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP031VAL_Clear/Set ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP030VAL_Clear/Set ,Pin 0.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP029VAL_Clear/Set ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP028VAL_Clear/Set ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP027VAL_Clear/Set ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP026VAL_Clear/Set ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP025VAL_Clear/Set ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP024VAL_Clear/Set ,Pin 0.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP023VAL_Clear/Set ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP022VAL_Clear/Set ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP021VAL_Clear/Set ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP020VAL_Clear/Set ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP019VAL_Clear/Set ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP018VAL_Clear/Set ,Pin 0.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP017VAL_Clear/Set ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP016VAL_Clear/Set ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP015VAL_Clear/Set ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP014VAL_Clear/Set ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP013VAL_Clear/Set ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP012VAL_Clear/Set ,Pin 0.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP011VAL_Clear/Set ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP010VAL_Clear/Set ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP09VAL_Clear/Set ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP08VAL_Clear/Set ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP07VAL_Clear/Set ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP06VAL_Clear/Set ,Pin 0.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP05VAL_Clear/Set ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP04VAL_Clear/Set ,Pin 0.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP03VAL_Clear/Set ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP02VAL_Clear/Set ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP01VAL_Clear/Set ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP00VAL_Clear/Set ,Pin 0.0 Value" "Low,High"
|
|
width 0xB
|
|
base sd:0xE0028000
|
|
tree "GPIO 0 interrupt registers"
|
|
group.long 0x90++0x7
|
|
line.long 0x0 "IO0IntEnR,GPIO 0 Interrupt Enable for Rising edge register"
|
|
bitfld.long 0x0 31. " P031ER ,Enable Rising edge P0.31" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " P030ER ,Enable Rising edge P0.30" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " P029ER ,Enable Rising edge P0.29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P028ER ,Enable Rising edge P0.28" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " P027ER ,Enable Rising edge P0.27" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " P026ER ,Enable Rising edge P0.26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025ER ,Enable Rising edge P0.25" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " P024ER ,Enable Rising edge P0.24" "Disabled,Enabled"
|
|
bitfld.long 0x0 23. " P023ER ,Enable Rising edge P0.23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P022ER ,Enable Rising edge P0.22" "Disabled,Enabled"
|
|
bitfld.long 0x0 21. " P021ER ,Enable Rising edge P0.21" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " P020ER ,Enable Rising edge P0.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019ER ,Enable Rising edge P0.19" "Disabled,Enabled"
|
|
bitfld.long 0x0 18. " P018ER ,Enable Rising edge P0.18" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " P017ER ,Enable Rising edge P0.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P016ER ,Enable Rising edge P0.16" "Disabled,Enabled"
|
|
bitfld.long 0x0 15. " P015ER ,Enable Rising edge P0.15" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " P014ER ,Enable Rising edge P0.14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013ER ,Enable Rising edge P0.13" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " P012ER ,Enable Rising edge P0.12" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " P011ER ,Enable Rising edge P0.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P010ER ,Enable Rising edge P0.10" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " P09ER ,Enable Rising edge P0.9" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " P08ER ,Enable Rising edge P0.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07ER ,Enable Rising edge P0.7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " P06ER ,Enable Rising edge P0.6" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " P05ER ,Enable Rising edge P0.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P04ER ,Enable Rising edge P0.4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " P03ER ,Enable Rising edge P0.3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " P02ER ,Enable Rising edge P0.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01ER ,Enable Rising edge P0.1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " P00ER ,Enable Rising edge P0.0" "Disabled,Enabled"
|
|
line.long 0x4 "IO0IntEnF,GPIO 0 Interrupt Enable for Falling edge register"
|
|
bitfld.long 0x4 31. " P031EF ,Enable Falling edge P0.31" "Disabled,Enabled"
|
|
bitfld.long 0x4 30. " P030EF ,Enable Falling edge P0.30" "Disabled,Enabled"
|
|
bitfld.long 0x4 29. " P029EF ,Enable Falling edge P0.29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 28. " P028EF ,Enable Falling edge P0.28" "Disabled,Enabled"
|
|
bitfld.long 0x4 27. " P027EF ,Enable Falling edge P0.27" "Disabled,Enabled"
|
|
bitfld.long 0x4 26. " P026EF ,Enable Falling edge P0.26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P025EF ,Enable Falling edge P0.25" "Disabled,Enabled"
|
|
bitfld.long 0x4 24. " P024EF ,Enable Falling edge P0.24" "Disabled,Enabled"
|
|
bitfld.long 0x4 23. " P023EF ,Enable Falling edge P0.23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 22. " P022EF ,Enable Falling edge P0.22" "Disabled,Enabled"
|
|
bitfld.long 0x4 21. " P021EF ,Enable Falling edge P0.21" "Disabled,Enabled"
|
|
bitfld.long 0x4 20. " P020EF ,Enable Falling edge P0.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P019EF ,Enable Falling edge P0.19" "Disabled,Enabled"
|
|
bitfld.long 0x4 18. " P018EF ,Enable Falling edge P0.18" "Disabled,Enabled"
|
|
bitfld.long 0x4 17. " P017EF ,Enable Falling edge P0.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 16. " P016EF ,Enable Falling edge P0.16" "Disabled,Enabled"
|
|
bitfld.long 0x4 15. " P015EF ,Enable Falling edge P0.15" "Disabled,Enabled"
|
|
bitfld.long 0x4 14. " P014EF ,Enable Falling edge P0.14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P013EF ,Enable Falling edge P0.13" "Disabled,Enabled"
|
|
bitfld.long 0x4 12. " P012EF ,Enable Falling edge P0.12" "Disabled,Enabled"
|
|
bitfld.long 0x4 11. " P011EF ,Enable Falling edge P0.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 10. " P010EF ,Enable Falling edge P0.10" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " P09EF ,Enable Falling edge P0.9" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " P08EF ,Enable Falling edge P0.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P07EF ,Enable Falling edge P0.7" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " P06EF ,Enable Falling edge P0.6" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " P05EF ,Enable Falling edge P0.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 4. " P04EF ,Enable Falling edge P0.4" "Disabled,Enabled"
|
|
bitfld.long 0x4 3. " P03EF ,Enable Falling edge P0.3" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " P02EF ,Enable Falling edge P0.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P01EF ,Enable Falling edge P0.1" "Disabled,Enabled"
|
|
bitfld.long 0x4 0. " P00EF ,Enable Falling edge P0.0" "Disabled,Enabled"
|
|
width 0xD
|
|
tree "GPIO 0 Interrupt Status for edge registers"
|
|
textline " "
|
|
rgroup.long 0x84++0x7
|
|
line.long 0x0 "IO0IntStatR,GPIO 0 Interrupt Status for Rising edge register"
|
|
bitfld.long 0x0 31. " P031REI ,Rising Edge Interrupt status P0.31" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 30. " P030REI ,Rising Edge Interrupt status P0.30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 29. " P029REI ,Rising Edge Interrupt status P0.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 28. " P028REI ,Rising Edge Interrupt status P0.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P027REI ,Rising Edge Interrupt status P0.27" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 26. " P026REI ,Rising Edge Interrupt status P0.26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025REI ,Rising Edge Interrupt status P0.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 24. " P024REI ,Rising Edge Interrupt status P0.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P023REI ,Rising Edge Interrupt status P0.23" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 22. " P022REI ,Rising Edge Interrupt status P0.22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 21. " P021REI ,Rising Edge Interrupt status P0.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 20. " P020REI ,Rising Edge Interrupt status P0.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019REI ,Rising Edge Interrupt status P0.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 18. " P018REI ,Rising Edge Interrupt status P0.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 17. " P017REI ,Rising Edge Interrupt status P0.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 16. " P016REI ,Rising Edge Interrupt status P0.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P015REI ,Rising Edge Interrupt status P0.15" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 14. " P014REI ,Rising Edge Interrupt status P0.14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013REI ,Rising Edge Interrupt status P0.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " P012REI ,Rising Edge Interrupt status P0.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P011REI ,Rising Edge Interrupt status P0.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " P010REI ,Rising Edge Interrupt status P0.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P09REI ,Rising Edge Interrupt status P0.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " P08REI ,Rising Edge Interrupt status P0.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07REI ,Rising Edge Interrupt status P0.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " P06REI ,Rising Edge Interrupt status P0.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P05REI ,Rising Edge Interrupt status P0.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " P04REI ,Rising Edge Interrupt status P0.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03REI ,Rising Edge Interrupt status P0.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " P02REI ,Rising Edge Interrupt status P0.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01REI ,Rising Edge Interrupt status P0.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P00REI ,Rising Edge Interrupt status P0.0" "No interrupt,Interrupt"
|
|
line.long 0x4 "IO0IntStatF,GPIO 0 Interrupt Status for Falling edge register"
|
|
bitfld.long 0x4 31. " P031FEI ,Falling Edge Interrupt status P0.31" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 30. " P030FEI ,Falling Edge Interrupt status P0.30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 29. " P029FEI ,Falling Edge Interrupt status P0.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 28. " P028FEI ,Falling Edge Interrupt status P0.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 27. " P027FEI ,Falling Edge Interrupt status P0.27" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 26. " P026FEI ,Falling Edge Interrupt status P0.26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P025FEI ,Falling Edge Interrupt status P0.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 24. " P024FEI ,Falling Edge Interrupt status P0.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 23. " P023FEI ,Falling Edge Interrupt status P0.23" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 22. " P022FEI ,Falling Edge Interrupt status P0.22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 21. " P021FEI ,Falling Edge Interrupt status P0.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 20. " P020FEI ,Falling Edge Interrupt status P0.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P019FEI ,Falling Edge Interrupt status P0.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 18. " P018FEI ,Falling Edge Interrupt status P0.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 17. " P017FEI ,Falling Edge Interrupt status P0.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 16. " P016FEI ,Falling Edge Interrupt status P0.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 15. " P015FEI ,Falling Edge Interrupt status P0.15" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 14. " P014FEI ,Falling Edge Interrupt status P0.14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P013FEI ,Falling Edge Interrupt status P0.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " P012FEI ,Falling Edge Interrupt status P0.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P011FEI ,Falling Edge Interrupt status P0.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " P010FEI ,Falling Edge Interrupt status P0.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P09FEI ,Falling Edge Interrupt status P0.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " P08FEI ,Falling Edge Interrupt status P0.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P07FEI ,Falling Edge Interrupt status P0.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " P06FEI ,Falling Edge Interrupt status P0.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P05FEI ,Falling Edge Interrupt status P0.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " P04FEI ,Falling Edge Interrupt status P0.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P03FEI ,Falling Edge Interrupt status P0.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " P02FEI ,Falling Edge Interrupt status P0.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P01FEI ,Falling Edge Interrupt status P0.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " P00FEI ,Falling Edge Interrupt status P0.0" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xB
|
|
textline " "
|
|
wgroup.long 0x8C++0x3
|
|
line.long 0x0 "IO0IntClr,GPIO 0 Interrupt Clear register"
|
|
bitfld.long 0x0 31. " P031CI ,Clear GPIO port Interrupt P0.31" "Unchanged,Cleared"
|
|
bitfld.long 0x0 30. " P030CI ,Clear GPIO port Interrupt P0.30" "Unchanged,Cleared"
|
|
bitfld.long 0x0 29. " P029CI ,Clear GPIO port Interrupt P0.29" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P028CI ,Clear GPIO port Interrupt P0.28" "Unchanged,Cleared"
|
|
bitfld.long 0x0 27. " P027CI ,Clear GPIO port Interrupt P0.27" "Unchanged,Cleared"
|
|
bitfld.long 0x0 26. " P026CI ,Clear GPIO port Interrupt P0.26" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025CI ,Clear GPIO port Interrupt P0.25" "Unchanged,Cleared"
|
|
bitfld.long 0x0 24. " P024CI ,Clear GPIO port Interrupt P0.24" "Unchanged,Cleared"
|
|
bitfld.long 0x0 23. " P023CI ,Clear GPIO port Interrupt P0.23" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P022CI ,Clear GPIO port Interrupt P0.22" "Unchanged,Cleared"
|
|
bitfld.long 0x0 21. " P021CI ,Clear GPIO port Interrupt P0.21" "Unchanged,Cleared"
|
|
bitfld.long 0x0 20. " P020CI ,Clear GPIO port Interrupt P0.20" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019CI ,Clear GPIO port Interrupt P0.19" "Unchanged,Cleared"
|
|
bitfld.long 0x0 18. " P018CI ,Clear GPIO port Interrupt P0.18" "Unchanged,Cleared"
|
|
bitfld.long 0x0 17. " P017CI ,Clear GPIO port Interrupt P0.17" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P016CI ,Clear GPIO port Interrupt P0.16" "Unchanged,Cleared"
|
|
bitfld.long 0x0 15. " P015CI ,Clear GPIO port Interrupt P0.15" "Unchanged,Cleared"
|
|
bitfld.long 0x0 14. " P014CI ,Clear GPIO port Interrupt P0.14" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013CI ,Clear GPIO port Interrupt P0.13" "Unchanged,Cleared"
|
|
bitfld.long 0x0 12. " P012CI ,Clear GPIO port Interrupt P0.12" "Unchanged,Cleared"
|
|
bitfld.long 0x0 11. " P011CI ,Clear GPIO port Interrupt P0.11" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P010CI ,Clear GPIO port Interrupt P0.10" "Unchanged,Cleared"
|
|
bitfld.long 0x0 9. " P09CI ,Clear GPIO port Interrupt P0.9" "Unchanged,Cleared"
|
|
bitfld.long 0x0 8. " P08CI ,Clear GPIO port Interrupt P0.8" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07CI ,Clear GPIO port Interrupt P0.7" "Unchanged,Cleared"
|
|
bitfld.long 0x0 6. " P06CI ,Clear GPIO port Interrupt P0.6" "Unchanged,Cleared"
|
|
bitfld.long 0x0 5. " P05CI ,Clear GPIO port Interrupt P0.5" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P04CI ,Clear GPIO port Interrupt P0.4" "Unchanged,Cleared"
|
|
bitfld.long 0x0 3. " P03CI ,Clear GPIO port Interrupt P0.3" "Unchanged,Cleared"
|
|
bitfld.long 0x0 2. " P02CI ,Clear GPIO port Interrupt P0.2" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01CI ,Clear GPIO port Interrupt P0.1" "Unchanged,Cleared"
|
|
bitfld.long 0x0 0. " P00CI ,Clear GPIO port Interrupt P0.0" "Unchanged,Cleared"
|
|
tree.end
|
|
tree.end
|
|
width 0x8
|
|
tree "GPIO1 (General Purpose Input/Output port 1)"
|
|
group.long 0x18++0x3 "APB"
|
|
line.long 0x0 "IO1DIR,GPIO 1 Port Direction Control Register"
|
|
bitfld.long 0x0 31. " P131DIR ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x0 30. " P130DIR ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x0 29. " P129DIR ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x0 28. " P128DIR ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P127DIR ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x0 26. " P126DIR ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x0 25. " P125DIR ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x0 24. " P124DIR ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P123DIR ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x0 22. " P122DIR ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x0 21. " P121DIR ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x0 20. " P120DIR ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P119DIR ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x0 18. " P118DIR ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x0 17. " P117DIR ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x0 16. " P116DIR ,Pin 1.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P115DIR ,Pin 1.15 Direction" "Input,Output"
|
|
bitfld.long 0x0 14. " P114DIR ,Pin 1.14 Direction" "Input,Output"
|
|
bitfld.long 0x0 13. " P113DIR ,Pin 1.13 Direction" "Input,Output"
|
|
bitfld.long 0x0 12. " P112DIR ,Pin 1.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P111DIR ,Pin 1.11 Direction" "Input,Output"
|
|
bitfld.long 0x0 10. " P110DIR ,Pin 1.10 Direction" "Input,Output"
|
|
bitfld.long 0x0 9. " P19DIR ,Pin 1.9 Direction" "Input,Output"
|
|
bitfld.long 0x0 8. " P18DIR ,Pin 1.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P17DIR ,Pin 1.7 Direction" "Input,Output"
|
|
bitfld.long 0x0 6. " P16DIR ,Pin 1.6 Direction" "Input,Output"
|
|
bitfld.long 0x0 5. " P15DIR ,Pin 1.5 Direction" "Input,Output"
|
|
bitfld.long 0x0 4. " P14DIR ,Pin 1.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P13DIR ,Pin 1.3 Direction" "Input,Output"
|
|
bitfld.long 0x0 2. " P12DIR ,Pin 1.2 Direction" "Input,Output"
|
|
bitfld.long 0x0 1. " P11DIR ,Pin 1.1 Direction" "Input,Output"
|
|
bitfld.long 0x0 0. " P10DIR ,Pin 1.0 Direction" "Input,Output"
|
|
width 0x8
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "IO1PIN,GPIO 1 Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P131VAL_Clear/Set ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P130VAL_Clear/Set ,Pin 1.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P129VAL_Clear/Set ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P128VAL_Clear/Set ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P127VAL_Clear/Set ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P126VAL_Clear/Set ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P125VAL_Clear/Set ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P124VAL_Clear/Set ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P123VAL_Clear/Set ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P122VAL_Clear/Set ,Pin 1.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P121VAL_Clear/Set ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P120VAL_Clear/Set ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P119VAL_Clear/Set ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P118VAL_Clear/Set ,Pin 1.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P117VAL_Clear/Set ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P116VAL_Clear/Set ,Pin 1.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P115VAL_Clear/Set ,Pin 1.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P114VAL_Clear/Set ,Pin 1.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P113VAL_Clear/Set ,Pin 1.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P112VAL_Clear/Set ,Pin 1.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P111VAL_Clear/Set ,Pin 1.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P110VAL_Clear/Set ,Pin 1.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P19VAL_Clear/Set ,Pin 1.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P18VAL_Clear/Set ,Pin 1.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P17VAL_Clear/Set ,Pin 1.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P16VAL_Clear/Set ,Pin 1.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P15VAL_Clear/Set ,Pin 1.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P14VAL_Clear/Set ,Pin 1.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P13VAL_Clear/Set ,Pin 1.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P12VAL_Clear/Set ,Pin 1.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P11VAL_Clear/Set ,Pin 1.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P10VAL_Clear/Set ,Pin 1.0 Value" "Low,High"
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
group.long 0x20++0x03 "Local Bus"
|
|
line.long 0x00 "FIO1DIR,Fast GPIO 1 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP131DIR ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP130DIR ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP129DIR ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP128DIR ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP127DIR ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP126DIR ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP125DIR ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP124DIR ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP123DIR ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP122DIR ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP121DIR ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP120DIR ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP119DIR ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP118DIR ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP117DIR ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP116DIR ,Pin 1.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP115DIR ,Pin 1.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP114DIR ,Pin 1.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP113DIR ,Pin 1.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP112DIR ,Pin 1.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP111DIR ,Pin 1.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP110DIR ,Pin 1.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP19DIR ,Pin 1.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP18DIR ,Pin 1.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP17DIR ,Pin 1.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP16DIR ,Pin 1.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP15DIR ,Pin 1.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP14DIR ,Pin 1.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP13DIR ,Pin 1.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP12DIR ,Pin 1.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP11DIR ,Pin 1.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP10DIR ,Pin 1.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x30++0x7
|
|
line.long 0x00 "FIO1MASK,Fast GPIO 1 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP131MASK ,Pin 1.31 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP130MASK ,Pin 1.30 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP129MASK ,Pin 1.29 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP128MASK ,Pin 1.28 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP127MASK ,Pin 1.27 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP126MASK ,Pin 1.26 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP125MASK ,Pin 1.25 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP124MASK ,Pin 1.24 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP123MASK ,Pin 1.23 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP122MASK ,Pin 1.22 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP121MASK ,Pin 1.21 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP120MASK ,Pin 1.20 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP119MASK ,Pin 1.19 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP118MASK ,Pin 1.18 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP117MASK ,Pin 1.17 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP116MASK ,Pin 1.16 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP115MASK ,Pin 1.15 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP114MASK ,Pin 1.14 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP113MASK ,Pin 1.13 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP112MASK ,Pin 1.12 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP111MASK ,Pin 1.11 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP110MASK ,Pin 1.10 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP19MASK ,Pin 1.9 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP18MASK ,Pin 1.8 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP17MASK ,Pin 1.7 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP16MASK ,Pin 1.6 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP15MASK ,Pin 1.5 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP14MASK ,Pin 1.4 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP13MASK ,Pin 1.3 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP12MASK ,Pin 1.2 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP11MASK ,Pin 1.1 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP10MASK ,Pin 1.0 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO1PIN,GPIO 1 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP131VAL_Clear/Set ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP130VAL_Clear/Set ,Pin 1.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP129VAL_Clear/Set ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP128VAL_Clear/Set ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP127VAL_Clear/Set ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP126VAL_Clear/Set ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP125VAL_Clear/Set ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP124VAL_Clear/Set ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP123VAL_Clear/Set ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP122VAL_Clear/Set ,Pin 1.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP121VAL_Clear/Set ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP120VAL_Clear/Set ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP119VAL_Clear/Set ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP118VAL_Clear/Set ,Pin 1.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP117VAL_Clear/Set ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP116VAL_Clear/Set ,Pin 1.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP115VAL_Clear/Set ,Pin 1.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP114VAL_Clear/Set ,Pin 1.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP113VAL_Clear/Set ,Pin 1.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP112VAL_Clear/Set ,Pin 1.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP111VAL_Clear/Set ,Pin 1.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP110VAL_Clear/Set ,Pin 1.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP19VAL_Clear/Set ,Pin 1.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP18VAL_Clear/Set ,Pin 1.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP17VAL_Clear/Set ,Pin 1.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP16VAL_Clear/Set ,Pin 1.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP15VAL_Clear/Set ,Pin 1.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP14VAL_Clear/Set ,Pin 1.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP13VAL_Clear/Set ,Pin 1.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP12VAL_Clear/Set ,Pin 1.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP11VAL_Clear/Set ,Pin 1.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP10VAL_Clear/Set ,Pin 1.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xa
|
|
tree "GPIO2 (General Purpose Input/Output port 2)"
|
|
group.long 0x40++0x03 "Local Bus"
|
|
line.long 0x00 "FIO2DIR,Fast GPIO 2 Port Direction Control Register"
|
|
bitfld.long 0x00 29. " FP229DIR ,Pin 2.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP228DIR ,Pin 2.28 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP225DIR ,Pin 2.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP224DIR ,Pin 2.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FP221DIR ,Pin 2.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP220DIR ,Pin 2.20 Direction" "Input,Output"
|
|
bitfld.long 0x00 19. " FP219DIR ,Pin 2.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP218DIR ,Pin 2.18 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 17. " FP217DIR ,Pin 2.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP216DIR ,Pin 2.16 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP213DIR ,Pin 2.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP212DIR ,Pin 2.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP211DIR ,Pin 2.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP210DIR ,Pin 2.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP29DIR ,Pin 2.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP28DIR ,Pin 2.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP27DIR ,Pin 2.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP26DIR ,Pin 2.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP25DIR ,Pin 2.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP24DIR ,Pin 2.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP23DIR ,Pin 2.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP22DIR ,Pin 2.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP21DIR ,Pin 2.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP20DIR ,Pin 2.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "FIO2MASK,Fast GPIO 2 Port Mask Control Register"
|
|
bitfld.long 0x00 29. " FP229MASK ,Pin 2.29 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 28. " FP228MASK ,Pin 2.28 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 25. " FP225MASK ,Pin 2.25 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 24. " FP224MASK ,Pin 2.24 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP221MASK ,Pin 2.21 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP220MASK ,Pin 2.20 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP219MASK ,Pin 2.19 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP218MASK ,Pin 2.18 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP217MASK ,Pin 2.17 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP216MASK ,Pin 2.16 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 13. " FP213MASK ,Pin 2.13 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP212MASK ,Pin 2.12 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP211MASK ,Pin 2.11 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 10. " FP210MASK ,Pin 2.10 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP29MASK ,Pin 2.9 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FP28MASK ,Pin 2.8 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 7. " FP27MASK ,Pin 2.7 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP26MASK ,Pin 2.6 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FP25MASK ,Pin 2.5 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 4. " FP24MASK ,Pin 2.4 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP23MASK ,Pin 2.3 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FP22MASK ,Pin 2.2 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 1. " FP21MASK ,Pin 2.1 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP20MASK ,Pin 2.0 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO2PIN,GPIO 2 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP229VAL_Clear/Set ,Pin 2.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP228VAL_Clear/Set ,Pin 2.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP225VAL_Clear/Set ,Pin 2.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP224VAL_Clear/Set ,Pin 2.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP221VAL_Clear/Set ,Pin 2.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP220VAL_Clear/Set ,Pin 2.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP219VAL_Clear/Set ,Pin 2.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP218VAL_Clear/Set ,Pin 2.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP217VAL_Clear/Set ,Pin 2.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP216VAL_Clear/Set ,Pin 2.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP213VAL_Clear/Set ,Pin 2.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP212VAL_Clear/Set ,Pin 2.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP211VAL_Clear/Set ,Pin 2.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP210VAL_Clear/Set ,Pin 2.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP29VAL_Clear/Set ,Pin 2.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP28VAL_Clear/Set ,Pin 2.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP27VAL_Clear/Set ,Pin 2.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP26VAL_Clear/Set ,Pin 2.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP25VAL_Clear/Set ,Pin 2.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP24VAL_Clear/Set ,Pin 2.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP23VAL_Clear/Set ,Pin 2.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP22VAL_Clear/Set ,Pin 2.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP21VAL_Clear/Set ,Pin 2.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP20VAL_Clear/Set ,Pin 2.0 Value" "Low,High"
|
|
width 0xB
|
|
base sd:0xE0028000
|
|
tree "GPIO 2 interrupt registers"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "IO2IntEnR,GPIO 2 Interrupt Enable for Rising edge register"
|
|
bitfld.long 0x0 29. " P229ER ,Enable Rising edge P2.29" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " P228ER ,Enable Rising edge P2.28" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " P225ER ,Enable Rising edge P2.25" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 24. " P224ER ,Enable Rising edge P2.24" "Disabled,Enabled"
|
|
bitfld.long 0x0 21. " P221ER ,Enable Rising edge P2.21" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " P220ER ,Enable Rising edge P2.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P219ER ,Enable Rising edge P2.19" "Disabled,Enabled"
|
|
bitfld.long 0x0 18. " P218ER ,Enable Rising edge P2.18" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " P217ER ,Enable Rising edge P2.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P216ER ,Enable Rising edge P2.16" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " P213ER ,Enable Rising edge P2.13" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " P212ER ,Enable Rising edge P2.12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P211ER ,Enable Rising edge P2.11" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " P210ER ,Enable Rising edge P2.10" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " P29ER ,Enable Rising edge P2.9" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 8. " P28ER ,Enable Rising edge P2.8" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " P27ER ,Enable Rising edge P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " P26ER ,Enable Rising edge P2.6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P25ER ,Enable Rising edge P2.5" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " P24ER ,Enable Rising edge P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " P23ER ,Enable Rising edge P2.3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " P22ER ,Enable Rising edge P2.2" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " P21ER ,Enable Rising edge P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " P20ER ,Enable Rising edge P2.0" "Disabled,Enabled"
|
|
line.long 0x4 "IO2IntEnF,GPIO 2 Interrupt Enable for Falling edge register"
|
|
bitfld.long 0x4 29. " P229EF ,Enable Falling edge P2.29" "Disabled,Enabled"
|
|
bitfld.long 0x4 28. " P228EF ,Enable Falling edge P2.28" "Disabled,Enabled"
|
|
bitfld.long 0x4 25. " P225EF ,Enable Falling edge P2.25" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 24. " P224EF ,Enable Falling edge P2.24" "Disabled,Enabled"
|
|
bitfld.long 0x4 21. " P221EF ,Enable Falling edge P2.21" "Disabled,Enabled"
|
|
bitfld.long 0x4 20. " P220EF ,Enable Falling edge P2.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P219EF ,Enable Falling edge P2.19" "Disabled,Enabled"
|
|
bitfld.long 0x4 18. " P218EF ,Enable Falling edge P2.18" "Disabled,Enabled"
|
|
bitfld.long 0x4 17. " P217EF ,Enable Falling edge P2.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 16. " P216EF ,Enable Falling edge P2.16" "Disabled,Enabled"
|
|
bitfld.long 0x4 13. " P213EF ,Enable Falling edge P2.13" "Disabled,Enabled"
|
|
bitfld.long 0x4 12. " P212EF ,Enable Falling edge P2.12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P211EF ,Enable Falling edge P2.11" "Disabled,Enabled"
|
|
bitfld.long 0x4 10. " P210EF ,Enable Falling edge P2.10" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " P29EF ,Enable Falling edge P2.9" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 8. " P28EF ,Enable Falling edge P2.8" "Disabled,Enabled"
|
|
bitfld.long 0x4 7. " P27EF ,Enable Falling edge P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " P26EF ,Enable Falling edge P2.6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P25EF ,Enable Falling edge P2.5" "Disabled,Enabled"
|
|
bitfld.long 0x4 4. " P24EF ,Enable Falling edge P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x4 3. " P23EF ,Enable Falling edge P2.3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 2. " P22EF ,Enable Falling edge P2.2" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " P21EF ,Enable Falling edge P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x4 0. " P20EF ,Enable Falling edge P2.0" "Disabled,Enabled"
|
|
width 0xD
|
|
tree "GPIO 2 Interrupt Status for edge registers"
|
|
textline " "
|
|
rgroup.long 0xA4++0x7
|
|
line.long 0x0 "IO2IntStatR,GPIO 2 Interrupt Status for Rising edge register"
|
|
bitfld.long 0x0 29. " P229REI ,Rising Edge Interrupt status P2.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 28. " P228REI ,Rising Edge Interrupt status P2.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P225REI ,Rising Edge Interrupt status P2.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 24. " P224REI ,Rising Edge Interrupt status P2.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 21. " P221REI ,Rising Edge Interrupt status P2.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 20. " P220REI ,Rising Edge Interrupt status P2.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P219REI ,Rising Edge Interrupt status P2.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 18. " P218REI ,Rising Edge Interrupt status P2.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 17. " P217REI ,Rising Edge Interrupt status P2.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 16. " P216REI ,Rising Edge Interrupt status P2.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P213REI ,Rising Edge Interrupt status P2.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " P212REI ,Rising Edge Interrupt status P2.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P211REI ,Rising Edge Interrupt status P2.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " P210REI ,Rising Edge Interrupt status P2.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P29REI ,Rising Edge Interrupt status P2.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " P28REI ,Rising Edge Interrupt status P2.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27REI ,Rising Edge Interrupt status P2.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " P26REI ,Rising Edge Interrupt status P2.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P25REI ,Rising Edge Interrupt status P2.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " P24REI ,Rising Edge Interrupt status P2.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P23REI ,Rising Edge Interrupt status P2.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " P22REI ,Rising Edge Interrupt status P2.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21REI ,Rising Edge Interrupt status P2.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P20REI ,Rising Edge Interrupt status P2.0" "No interrupt,Interrupt"
|
|
line.long 0x4 "IO2IntStatF,GPIO 2 Interrupt Status for Falling edge register"
|
|
bitfld.long 0x4 29. " P229FEI ,Falling Edge Interrupt status P2.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 28. " P228FEI ,Falling Edge Interrupt status P2.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P225FEI ,Falling Edge Interrupt status P2.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 24. " P224FEI ,Falling Edge Interrupt status P2.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 21. " P221FEI ,Falling Edge Interrupt status P2.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 20. " P220FEI ,Falling Edge Interrupt status P2.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P219FEI ,Falling Edge Interrupt status P2.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 18. " P218FEI ,Falling Edge Interrupt status P2.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 17. " P217FEI ,Falling Edge Interrupt status P2.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 16. " P216FEI ,Falling Edge Interrupt status P2.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P213FEI ,Falling Edge Interrupt status P2.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " P212FEI ,Falling Edge Interrupt status P2.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P211FEI ,Falling Edge Interrupt status P2.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " P210FEI ,Falling Edge Interrupt status P2.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P29FEI ,Falling Edge Interrupt status P2.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " P28FEI ,Falling Edge Interrupt status P2.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P27FEI ,Falling Edge Interrupt status P2.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " P26FEI ,Falling Edge Interrupt status P2.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P25FEI ,Falling Edge Interrupt status P2.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " P24FEI ,Falling Edge Interrupt status P2.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P23FEI ,Falling Edge Interrupt status P2.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " P22FEI ,Falling Edge Interrupt status P2.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P21FEI ,Falling Edge Interrupt status P2.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " P20FEI ,Falling Edge Interrupt status P2.0" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xB
|
|
textline " "
|
|
wgroup.long 0xAC++0x3
|
|
line.long 0x0 "IO2IntClr,GPIO 2 Interrupt Clear register"
|
|
bitfld.long 0x0 29. " P229CI ,Clear GPIO port Interrupt P2.29" "Unchanged,Cleared"
|
|
bitfld.long 0x0 28. " P228CI ,Clear GPIO port Interrupt P2.28" "Unchanged,Cleared"
|
|
bitfld.long 0x0 25. " P225CI ,Clear GPIO port Interrupt P2.25" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 24. " P224CI ,Clear GPIO port Interrupt P2.24" "Unchanged,Cleared"
|
|
bitfld.long 0x0 21. " P221CI ,Clear GPIO port Interrupt P2.21" "Unchanged,Cleared"
|
|
bitfld.long 0x0 20. " P220CI ,Clear GPIO port Interrupt P2.20" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P219CI ,Clear GPIO port Interrupt P2.19" "Unchanged,Cleared"
|
|
bitfld.long 0x0 18. " P218CI ,Clear GPIO port Interrupt P2.18" "Unchanged,Cleared"
|
|
bitfld.long 0x0 17. " P217CI ,Clear GPIO port Interrupt P2.17" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P216CI ,Clear GPIO port Interrupt P2.16" "Unchanged,Cleared"
|
|
bitfld.long 0x0 13. " P213CI ,Clear GPIO port Interrupt P2.13" "Unchanged,Cleared"
|
|
bitfld.long 0x0 12. " P212CI ,Clear GPIO port Interrupt P2.12" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P211CI ,Clear GPIO port Interrupt P2.11" "Unchanged,Cleared"
|
|
bitfld.long 0x0 10. " P210CI ,Clear GPIO port Interrupt P2.10" "Unchanged,Cleared"
|
|
bitfld.long 0x0 9. " P29CI ,Clear GPIO port Interrupt P2.9" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 8. " P28CI ,Clear GPIO port Interrupt P2.8" "Unchanged,Cleared"
|
|
bitfld.long 0x0 7. " P27CI ,Clear GPIO port Interrupt P2.7" "Unchanged,Cleared"
|
|
bitfld.long 0x0 6. " P26CI ,Clear GPIO port Interrupt P2.6" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P25CI ,Clear GPIO port Interrupt P2.5" "Unchanged,Cleared"
|
|
bitfld.long 0x0 4. " P24CI ,Clear GPIO port Interrupt P2.4" "Unchanged,Cleared"
|
|
bitfld.long 0x0 3. " P23CI ,Clear GPIO port Interrupt P2.3" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 2. " P22CI ,Clear GPIO port Interrupt P2.2" "Unchanged,Cleared"
|
|
bitfld.long 0x0 1. " P21CI ,Clear GPIO port Interrupt P2.1" "Unchanged,Cleared"
|
|
bitfld.long 0x0 0. " P20CI ,Clear GPIO port Interrupt P2.0" "Unchanged,Cleared"
|
|
tree.end
|
|
tree.end
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
tree "GPIO3 (General Purpose Input/Output port 3)"
|
|
group.long 0x60++0x03 "Local Bus"
|
|
line.long 0x00 "FIO3DIR,Fast GPIO 3 Port Direction Control Register"
|
|
bitfld.long 0x00 26. " FP326DIR ,Pin 3.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP325DIR ,Pin 3.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP324DIR ,Pin 3.24 Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " FP323DIR ,Pin 3.23 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP315DIR ,Pin 3.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP314DIR ,Pin 3.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP313DIR ,Pin 3.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP312DIR ,Pin 3.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP311DIR ,Pin 3.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP310DIR ,Pin 3.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP39DIR ,Pin 3.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP38DIR ,Pin 3.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP37DIR ,Pin 3.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP36DIR ,Pin 3.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP35DIR ,Pin 3.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP34DIR ,Pin 3.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP33DIR ,Pin 3.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP32DIR ,Pin 3.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP31DIR ,Pin 3.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP30DIR ,Pin 3.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x70++0x7
|
|
line.long 0x00 "FIO3MASK,Fast GPIO 3 Port Mask Control Register"
|
|
bitfld.long 0x00 26. " FP326MASK ,Pin 3.26 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 25. " FP325MASK ,Pin 3.25 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP324MASK ,Pin 3.24 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP323MASK ,Pin 3.23 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP315MASK ,Pin 3.15 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP314MASK ,Pin 3.14 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP313MASK ,Pin 3.13 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP312MASK ,Pin 3.12 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP311MASK ,Pin 3.11 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP310MASK ,Pin 3.10 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP39MASK ,Pin 3.9 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP38MASK ,Pin 3.8 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP37MASK ,Pin 3.7 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP36MASK ,Pin 3.6 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP35MASK ,Pin 3.5 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP34MASK ,Pin 3.4 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP33MASK ,Pin 3.3 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP32MASK ,Pin 3.2 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP31MASK ,Pin 3.1 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP30MASK ,Pin 3.0 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO3PIN,GPIO 3 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP326VAL_Clear/Set ,Pin 3.26 Value" "Low,High"
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP325VAL_Clear/Set ,Pin 3.25 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP324VAL_Clear/Set ,Pin 3.24 Value" "Low,High"
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP323VAL_Clear/Set ,Pin 3.23 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP315VAL_Clear/Set ,Pin 3.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP314VAL_Clear/Set ,Pin 3.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP313VAL_Clear/Set ,Pin 3.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP312VAL_Clear/Set ,Pin 3.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP311VAL_Clear/Set ,Pin 3.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP310VAL_Clear/Set ,Pin 3.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP39VAL_Clear/Set ,Pin 3.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP38VAL_Clear/Set ,Pin 3.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP37VAL_Clear/Set ,Pin 3.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP36VAL_Clear/Set ,Pin 3.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP35VAL_Clear/Set ,Pin 3.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP34VAL_Clear/Set ,Pin 3.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP33VAL_Clear/Set ,Pin 3.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP32VAL_Clear/Set ,Pin 3.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP31VAL_Clear/Set ,Pin 3.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP30VAL_Clear/Set ,Pin 3.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xa
|
|
tree "GPIO4 (General Purpose Input/Output port 4)"
|
|
group.long 0x80++0x03 "Local Bus"
|
|
line.long 0x00 "FIO4DIR,Fast GPIO 4 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP431DIR ,Pin 4.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP430DIR ,Pin 4.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP429DIR ,Pin 4.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP428DIR ,Pin 4.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP427DIR ,Pin 4.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP426DIR ,Pin 4.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP425DIR ,Pin 4.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP424DIR ,Pin 4.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP419DIR ,Pin 4.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP418DIR ,Pin 4.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP417DIR ,Pin 4.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP416DIR ,Pin 4.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP415DIR ,Pin 4.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP414DIR ,Pin 4.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP413DIR ,Pin 4.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP412DIR ,Pin 4.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP411DIR ,Pin 4.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP410DIR ,Pin 4.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP49DIR ,Pin 4.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP48DIR ,Pin 4.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP47DIR ,Pin 4.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP46DIR ,Pin 4.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP45DIR ,Pin 4.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP44DIR ,Pin 4.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP43DIR ,Pin 4.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP42DIR ,Pin 4.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP41DIR ,Pin 4.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP40DIR ,Pin 4.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x90++0x7
|
|
line.long 0x00 "FIO4MASK,Fast GPIO 4 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP431MASK ,Pin 4.31 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP430MASK ,Pin 4.30 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP429MASK ,Pin 4.29 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP428MASK ,Pin 4.28 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP427MASK ,Pin 4.27 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP426MASK ,Pin 4.26 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP425MASK ,Pin 4.25 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP424MASK ,Pin 4.24 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 19. " FP419MASK ,Pin 4.19 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 18. " FP418MASK ,Pin 4.18 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP417MASK ,Pin 4.17 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 16. " FP416MASK ,Pin 4.16 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP415MASK ,Pin 4.15 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP414MASK ,Pin 4.14 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 13. " FP413MASK ,Pin 4.13 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FP412MASK ,Pin 4.12 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP411MASK ,Pin 4.11 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 10. " FP410MASK ,Pin 4.10 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP49MASK ,Pin 4.9 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FP48MASK ,Pin 4.8 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 7. " FP47MASK ,Pin 4.7 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP46MASK ,Pin 4.6 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FP45MASK ,Pin 4.5 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 4. " FP44MASK ,Pin 4.4 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP43MASK ,Pin 4.3 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FP42MASK ,Pin 4.2 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 1. " FP41MASK ,Pin 4.1 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP40MASK ,Pin 4.0 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO4PIN,GPIO 4 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP431VAL_Clear/Set ,Pin 4.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP430VAL_Clear/Set ,Pin 4.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP429VAL_Clear/Set ,Pin 4.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP428VAL_Clear/Set ,Pin 4.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP427VAL_Clear/Set ,Pin 4.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP426VAL_Clear/Set ,Pin 4.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP425VAL_Clear/Set ,Pin 4.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP424VAL_Clear/Set ,Pin 4.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP419VAL_Clear/Set ,Pin 4.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP418VAL_Clear/Set ,Pin 4.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP417VAL_Clear/Set ,Pin 4.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP416VAL_Clear/Set ,Pin 4.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP415VAL_Clear/Set ,Pin 4.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP414VAL_Clear/Set ,Pin 4.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP413VAL_Clear/Set ,Pin 4.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP412VAL_Clear/Set ,Pin 4.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP411VAL_Clear/Set ,Pin 4.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP410VAL_Clear/Set ,Pin 4.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP49VAL_Clear/Set ,Pin 4.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP48VAL_Clear/Set ,Pin 4.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP47VAL_Clear/Set ,Pin 4.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP46VAL_Clear/Set ,Pin 4.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP45VAL_Clear/Set ,Pin 4.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP44VAL_Clear/Set ,Pin 4.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP43VAL_Clear/Set ,Pin 4.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP42VAL_Clear/Set ,Pin 4.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP41VAL_Clear/Set ,Pin 4.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP40VAL_Clear/Set ,Pin 4.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
; LPC2460, LPC2468, LPC2470, LPC2478
|
|
width 0xD
|
|
base sd:0xe0028000
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x0 "IOIntStatus,GPIO overall Interrupt Status"
|
|
bitfld.long 0x0 2. " P2Int ,PORT2 GPIO interrupt pending" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P0Int ,PORT0 GPIO interrupt pending" "No interrupt,Interrupt"
|
|
width 0x8
|
|
tree "GPIO0 (General Purpose Input/Output port 0)"
|
|
group.long 0x8++0x3 "APB"
|
|
line.long 0x0 "IO0DIR,GPIO 0 Port Direction Control Register"
|
|
bitfld.long 0x0 31. " P031DIR ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x0 30. " P030DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x0 29. " P029DIR ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x0 28. " P028DIR ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P027DIR ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x0 26. " P026DIR ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x0 25. " P025DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x0 24. " P024DIR ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P023DIR ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x0 22. " P022DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x0 21. " P021DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x0 20. " P020DIR ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019DIR ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x0 18. " P018DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x0 17. " P017DIR ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x0 16. " P016DIR ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P015DIR ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x0 14. " P014DIR ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x0 13. " P013DIR ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x0 12. " P012DIR ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P011DIR ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x0 10. " P010DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x0 9. " P09DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x0 8. " P08DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x0 6. " P06DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x0 5. " P05DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x0 4. " P04DIR ,Pin 0.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x0 2. " P02DIR ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x0 1. " P01DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x0 0. " P00DIR ,Pin 0.0 Direction" "Input,Output"
|
|
width 0x8
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "IO0PIN,GPIO 0 Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P031VAL_Clear/Set ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P030VAL_Clear/Set ,Pin 0.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P029VAL_Clear/Set ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P028VAL_Clear/Set ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P027VAL_Clear/Set ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P026VAL_Clear/Set ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P025VAL_Clear/Set ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P024VAL_Clear/Set ,Pin 0.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P023VAL_Clear/Set ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P022VAL_Clear/Set ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P021VAL_Clear/Set ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P020VAL_Clear/Set ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P019VAL_Clear/Set ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P018VAL_Clear/Set ,Pin 0.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P017VAL_Clear/Set ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P016VAL_Clear/Set ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P015VAL_Clear/Set ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P014VAL_Clear/Set ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P013VAL_Clear/Set ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P012VAL_Clear/Set ,Pin 0.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P011VAL_Clear/Set ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P010VAL_Clear/Set ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P09VAL_Clear/Set ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P08VAL_Clear/Set ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P07VAL_Clear/Set ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P06VAL_Clear/Set ,Pin 0.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P05VAL_Clear/Set ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P04VAL_Clear/Set ,Pin 0.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P03VAL_Clear/Set ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P02VAL_Clear/Set ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P01VAL_Clear/Set ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P00VAL_Clear/Set ,Pin 0.0 Value" "Low,High"
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
group.long 0x00++0x03 "Local Bus"
|
|
line.long 0x00 "FIO0DIR,Fast GPIO 0 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP031DIR ,Pin 0.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP030DIR ,Pin 0.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP029DIR ,Pin 0.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP028DIR ,Pin 0.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP027DIR ,Pin 0.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP026DIR ,Pin 0.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP025DIR ,Pin 0.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP024DIR ,Pin 0.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP023DIR ,Pin 0.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP022DIR ,Pin 0.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP021DIR ,Pin 0.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP020DIR ,Pin 0.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP019DIR ,Pin 0.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP018DIR ,Pin 0.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP017DIR ,Pin 0.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP016DIR ,Pin 0.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP015DIR ,Pin 0.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP014DIR ,Pin 0.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP013DIR ,Pin 0.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP012DIR ,Pin 0.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP011DIR ,Pin 0.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP010DIR ,Pin 0.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP09DIR ,Pin 0.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP08DIR ,Pin 0.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP07DIR ,Pin 0.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP06DIR ,Pin 0.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP05DIR ,Pin 0.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP04DIR ,Pin 0.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP03DIR ,Pin 0.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP02DIR ,Pin 0.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP01DIR ,Pin 0.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP00DIR ,Pin 0.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "FIO0MASK,Fast GPIO 0 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP031MASK ,Pin 0.31 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP030MASK ,Pin 0.30 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP029MASK ,Pin 0.29 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP028MASK ,Pin 0.28 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP027MASK ,Pin 0.27 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP026MASK ,Pin 0.26 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP025MASK ,Pin 0.25 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP024MASK ,Pin 0.24 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP023MASK ,Pin 0.23 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP022MASK ,Pin 0.22 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP021MASK ,Pin 0.21 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP020MASK ,Pin 0.20 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP019MASK ,Pin 0.19 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP018MASK ,Pin 0.18 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP017MASK ,Pin 0.17 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP016MASK ,Pin 0.16 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP015MASK ,Pin 0.15 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP014MASK ,Pin 0.14 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP013MASK ,Pin 0.13 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP012MASK ,Pin 0.12 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP011MASK ,Pin 0.11 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP010MASK ,Pin 0.10 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP09MASK ,Pin 0.9 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP08MASK ,Pin 0.8 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP07MASK ,Pin 0.7 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP06MASK ,Pin 0.6 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP05MASK ,Pin 0.5 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP04MASK ,Pin 0.4 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP03MASK ,Pin 0.3 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP02MASK ,Pin 0.2 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP01MASK ,Pin 0.1 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP00MASK ,Pin 0.0 Affected Writes to FIO0SET,FIO0CLR,FIO0PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO0PIN,GPIO 0 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP031VAL_Clear/Set ,Pin 0.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP030VAL_Clear/Set ,Pin 0.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP029VAL_Clear/Set ,Pin 0.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP028VAL_Clear/Set ,Pin 0.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP027VAL_Clear/Set ,Pin 0.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP026VAL_Clear/Set ,Pin 0.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP025VAL_Clear/Set ,Pin 0.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP024VAL_Clear/Set ,Pin 0.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP023VAL_Clear/Set ,Pin 0.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP022VAL_Clear/Set ,Pin 0.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP021VAL_Clear/Set ,Pin 0.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP020VAL_Clear/Set ,Pin 0.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP019VAL_Clear/Set ,Pin 0.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP018VAL_Clear/Set ,Pin 0.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP017VAL_Clear/Set ,Pin 0.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP016VAL_Clear/Set ,Pin 0.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP015VAL_Clear/Set ,Pin 0.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP014VAL_Clear/Set ,Pin 0.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP013VAL_Clear/Set ,Pin 0.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP012VAL_Clear/Set ,Pin 0.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP011VAL_Clear/Set ,Pin 0.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP010VAL_Clear/Set ,Pin 0.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP09VAL_Clear/Set ,Pin 0.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP08VAL_Clear/Set ,Pin 0.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP07VAL_Clear/Set ,Pin 0.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP06VAL_Clear/Set ,Pin 0.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP05VAL_Clear/Set ,Pin 0.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP04VAL_Clear/Set ,Pin 0.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP03VAL_Clear/Set ,Pin 0.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP02VAL_Clear/Set ,Pin 0.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP01VAL_Clear/Set ,Pin 0.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP00VAL_Clear/Set ,Pin 0.0 Value" "Low,High"
|
|
width 0xB
|
|
base sd:0xE0028000
|
|
tree "GPIO 0 interrupt registers"
|
|
group.long 0x90++0x7
|
|
line.long 0x0 "IO0IntEnR,GPIO 0 Interrupt Enable for Rising edge register"
|
|
bitfld.long 0x0 31. " P031ER ,Enable Rising edge P0.31" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " P030ER ,Enable Rising edge P0.30" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " P029ER ,Enable Rising edge P0.29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P028ER ,Enable Rising edge P0.28" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " P027ER ,Enable Rising edge P0.27" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " P026ER ,Enable Rising edge P0.26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025ER ,Enable Rising edge P0.25" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " P024ER ,Enable Rising edge P0.24" "Disabled,Enabled"
|
|
bitfld.long 0x0 23. " P023ER ,Enable Rising edge P0.23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P022ER ,Enable Rising edge P0.22" "Disabled,Enabled"
|
|
bitfld.long 0x0 21. " P021ER ,Enable Rising edge P0.21" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " P020ER ,Enable Rising edge P0.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019ER ,Enable Rising edge P0.19" "Disabled,Enabled"
|
|
bitfld.long 0x0 18. " P018ER ,Enable Rising edge P0.18" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " P017ER ,Enable Rising edge P0.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P016ER ,Enable Rising edge P0.16" "Disabled,Enabled"
|
|
bitfld.long 0x0 15. " P015ER ,Enable Rising edge P0.15" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " P014ER ,Enable Rising edge P0.14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013ER ,Enable Rising edge P0.13" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " P012ER ,Enable Rising edge P0.12" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " P011ER ,Enable Rising edge P0.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P010ER ,Enable Rising edge P0.10" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " P09ER ,Enable Rising edge P0.9" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " P08ER ,Enable Rising edge P0.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07ER ,Enable Rising edge P0.7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " P06ER ,Enable Rising edge P0.6" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " P05ER ,Enable Rising edge P0.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P04ER ,Enable Rising edge P0.4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " P03ER ,Enable Rising edge P0.3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " P02ER ,Enable Rising edge P0.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01ER ,Enable Rising edge P0.1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " P00ER ,Enable Rising edge P0.0" "Disabled,Enabled"
|
|
line.long 0x4 "IO0IntEnF,GPIO 0 Interrupt Enable for Falling edge register"
|
|
bitfld.long 0x4 31. " P031EF ,Enable Falling edge P0.31" "Disabled,Enabled"
|
|
bitfld.long 0x4 30. " P030EF ,Enable Falling edge P0.30" "Disabled,Enabled"
|
|
bitfld.long 0x4 29. " P029EF ,Enable Falling edge P0.29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 28. " P028EF ,Enable Falling edge P0.28" "Disabled,Enabled"
|
|
bitfld.long 0x4 27. " P027EF ,Enable Falling edge P0.27" "Disabled,Enabled"
|
|
bitfld.long 0x4 26. " P026EF ,Enable Falling edge P0.26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P025EF ,Enable Falling edge P0.25" "Disabled,Enabled"
|
|
bitfld.long 0x4 24. " P024EF ,Enable Falling edge P0.24" "Disabled,Enabled"
|
|
bitfld.long 0x4 23. " P023EF ,Enable Falling edge P0.23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 22. " P022EF ,Enable Falling edge P0.22" "Disabled,Enabled"
|
|
bitfld.long 0x4 21. " P021EF ,Enable Falling edge P0.21" "Disabled,Enabled"
|
|
bitfld.long 0x4 20. " P020EF ,Enable Falling edge P0.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P019EF ,Enable Falling edge P0.19" "Disabled,Enabled"
|
|
bitfld.long 0x4 18. " P018EF ,Enable Falling edge P0.18" "Disabled,Enabled"
|
|
bitfld.long 0x4 17. " P017EF ,Enable Falling edge P0.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 16. " P016EF ,Enable Falling edge P0.16" "Disabled,Enabled"
|
|
bitfld.long 0x4 15. " P015EF ,Enable Falling edge P0.15" "Disabled,Enabled"
|
|
bitfld.long 0x4 14. " P014EF ,Enable Falling edge P0.14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P013EF ,Enable Falling edge P0.13" "Disabled,Enabled"
|
|
bitfld.long 0x4 12. " P012EF ,Enable Falling edge P0.12" "Disabled,Enabled"
|
|
bitfld.long 0x4 11. " P011EF ,Enable Falling edge P0.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 10. " P010EF ,Enable Falling edge P0.10" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " P09EF ,Enable Falling edge P0.9" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " P08EF ,Enable Falling edge P0.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P07EF ,Enable Falling edge P0.7" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " P06EF ,Enable Falling edge P0.6" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " P05EF ,Enable Falling edge P0.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 4. " P04EF ,Enable Falling edge P0.4" "Disabled,Enabled"
|
|
bitfld.long 0x4 3. " P03EF ,Enable Falling edge P0.3" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " P02EF ,Enable Falling edge P0.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P01EF ,Enable Falling edge P0.1" "Disabled,Enabled"
|
|
bitfld.long 0x4 0. " P00EF ,Enable Falling edge P0.0" "Disabled,Enabled"
|
|
width 0xD
|
|
tree "GPIO 0 Interrupt Status for edge registers"
|
|
textline " "
|
|
rgroup.long 0x84++0x7
|
|
line.long 0x0 "IO0IntStatR,GPIO 0 Interrupt Status for Rising edge register"
|
|
bitfld.long 0x0 31. " P031REI ,Rising Edge Interrupt status P0.31" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 30. " P030REI ,Rising Edge Interrupt status P0.30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 29. " P029REI ,Rising Edge Interrupt status P0.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 28. " P028REI ,Rising Edge Interrupt status P0.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P027REI ,Rising Edge Interrupt status P0.27" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 26. " P026REI ,Rising Edge Interrupt status P0.26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025REI ,Rising Edge Interrupt status P0.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 24. " P024REI ,Rising Edge Interrupt status P0.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P023REI ,Rising Edge Interrupt status P0.23" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 22. " P022REI ,Rising Edge Interrupt status P0.22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 21. " P021REI ,Rising Edge Interrupt status P0.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 20. " P020REI ,Rising Edge Interrupt status P0.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019REI ,Rising Edge Interrupt status P0.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 18. " P018REI ,Rising Edge Interrupt status P0.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 17. " P017REI ,Rising Edge Interrupt status P0.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 16. " P016REI ,Rising Edge Interrupt status P0.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P015REI ,Rising Edge Interrupt status P0.15" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 14. " P014REI ,Rising Edge Interrupt status P0.14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013REI ,Rising Edge Interrupt status P0.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " P012REI ,Rising Edge Interrupt status P0.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P011REI ,Rising Edge Interrupt status P0.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " P010REI ,Rising Edge Interrupt status P0.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P09REI ,Rising Edge Interrupt status P0.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " P08REI ,Rising Edge Interrupt status P0.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07REI ,Rising Edge Interrupt status P0.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " P06REI ,Rising Edge Interrupt status P0.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P05REI ,Rising Edge Interrupt status P0.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " P04REI ,Rising Edge Interrupt status P0.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P03REI ,Rising Edge Interrupt status P0.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " P02REI ,Rising Edge Interrupt status P0.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01REI ,Rising Edge Interrupt status P0.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P00REI ,Rising Edge Interrupt status P0.0" "No interrupt,Interrupt"
|
|
line.long 0x4 "IO0IntStatF,GPIO 0 Interrupt Status for Falling edge register"
|
|
bitfld.long 0x4 31. " P031FEI ,Falling Edge Interrupt status P0.31" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 30. " P030FEI ,Falling Edge Interrupt status P0.30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 29. " P029FEI ,Falling Edge Interrupt status P0.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 28. " P028FEI ,Falling Edge Interrupt status P0.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 27. " P027FEI ,Falling Edge Interrupt status P0.27" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 26. " P026FEI ,Falling Edge Interrupt status P0.26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P025FEI ,Falling Edge Interrupt status P0.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 24. " P024FEI ,Falling Edge Interrupt status P0.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 23. " P023FEI ,Falling Edge Interrupt status P0.23" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 22. " P022FEI ,Falling Edge Interrupt status P0.22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 21. " P021FEI ,Falling Edge Interrupt status P0.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 20. " P020FEI ,Falling Edge Interrupt status P0.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P019FEI ,Falling Edge Interrupt status P0.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 18. " P018FEI ,Falling Edge Interrupt status P0.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 17. " P017FEI ,Falling Edge Interrupt status P0.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 16. " P016FEI ,Falling Edge Interrupt status P0.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 15. " P015FEI ,Falling Edge Interrupt status P0.15" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 14. " P014FEI ,Falling Edge Interrupt status P0.14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P013FEI ,Falling Edge Interrupt status P0.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " P012FEI ,Falling Edge Interrupt status P0.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P011FEI ,Falling Edge Interrupt status P0.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " P010FEI ,Falling Edge Interrupt status P0.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P09FEI ,Falling Edge Interrupt status P0.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " P08FEI ,Falling Edge Interrupt status P0.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P07FEI ,Falling Edge Interrupt status P0.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " P06FEI ,Falling Edge Interrupt status P0.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P05FEI ,Falling Edge Interrupt status P0.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " P04FEI ,Falling Edge Interrupt status P0.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P03FEI ,Falling Edge Interrupt status P0.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " P02FEI ,Falling Edge Interrupt status P0.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P01FEI ,Falling Edge Interrupt status P0.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " P00FEI ,Falling Edge Interrupt status P0.0" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xB
|
|
textline " "
|
|
wgroup.long 0x8C++0x3
|
|
line.long 0x0 "IO0IntClr,GPIO 0 Interrupt Clear register"
|
|
bitfld.long 0x0 31. " P031CI ,Clear GPIO port Interrupt P0.31" "Unchanged,Cleared"
|
|
bitfld.long 0x0 30. " P030CI ,Clear GPIO port Interrupt P0.30" "Unchanged,Cleared"
|
|
bitfld.long 0x0 29. " P029CI ,Clear GPIO port Interrupt P0.29" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P028CI ,Clear GPIO port Interrupt P0.28" "Unchanged,Cleared"
|
|
bitfld.long 0x0 27. " P027CI ,Clear GPIO port Interrupt P0.27" "Unchanged,Cleared"
|
|
bitfld.long 0x0 26. " P026CI ,Clear GPIO port Interrupt P0.26" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P025CI ,Clear GPIO port Interrupt P0.25" "Unchanged,Cleared"
|
|
bitfld.long 0x0 24. " P024CI ,Clear GPIO port Interrupt P0.24" "Unchanged,Cleared"
|
|
bitfld.long 0x0 23. " P023CI ,Clear GPIO port Interrupt P0.23" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P022CI ,Clear GPIO port Interrupt P0.22" "Unchanged,Cleared"
|
|
bitfld.long 0x0 21. " P021CI ,Clear GPIO port Interrupt P0.21" "Unchanged,Cleared"
|
|
bitfld.long 0x0 20. " P020CI ,Clear GPIO port Interrupt P0.20" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P019CI ,Clear GPIO port Interrupt P0.19" "Unchanged,Cleared"
|
|
bitfld.long 0x0 18. " P018CI ,Clear GPIO port Interrupt P0.18" "Unchanged,Cleared"
|
|
bitfld.long 0x0 17. " P017CI ,Clear GPIO port Interrupt P0.17" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P016CI ,Clear GPIO port Interrupt P0.16" "Unchanged,Cleared"
|
|
bitfld.long 0x0 15. " P015CI ,Clear GPIO port Interrupt P0.15" "Unchanged,Cleared"
|
|
bitfld.long 0x0 14. " P014CI ,Clear GPIO port Interrupt P0.14" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P013CI ,Clear GPIO port Interrupt P0.13" "Unchanged,Cleared"
|
|
bitfld.long 0x0 12. " P012CI ,Clear GPIO port Interrupt P0.12" "Unchanged,Cleared"
|
|
bitfld.long 0x0 11. " P011CI ,Clear GPIO port Interrupt P0.11" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P010CI ,Clear GPIO port Interrupt P0.10" "Unchanged,Cleared"
|
|
bitfld.long 0x0 9. " P09CI ,Clear GPIO port Interrupt P0.9" "Unchanged,Cleared"
|
|
bitfld.long 0x0 8. " P08CI ,Clear GPIO port Interrupt P0.8" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P07CI ,Clear GPIO port Interrupt P0.7" "Unchanged,Cleared"
|
|
bitfld.long 0x0 6. " P06CI ,Clear GPIO port Interrupt P0.6" "Unchanged,Cleared"
|
|
bitfld.long 0x0 5. " P05CI ,Clear GPIO port Interrupt P0.5" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P04CI ,Clear GPIO port Interrupt P0.4" "Unchanged,Cleared"
|
|
bitfld.long 0x0 3. " P03CI ,Clear GPIO port Interrupt P0.3" "Unchanged,Cleared"
|
|
bitfld.long 0x0 2. " P02CI ,Clear GPIO port Interrupt P0.2" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P01CI ,Clear GPIO port Interrupt P0.1" "Unchanged,Cleared"
|
|
bitfld.long 0x0 0. " P00CI ,Clear GPIO port Interrupt P0.0" "Unchanged,Cleared"
|
|
tree.end
|
|
tree.end
|
|
width 0x8
|
|
tree "GPIO1 (General Purpose Input/Output port 1)"
|
|
group.long 0x18++0x3 "APB"
|
|
line.long 0x0 "IO1DIR,GPIO 1 Port Direction Control Register"
|
|
bitfld.long 0x0 31. " P131DIR ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x0 30. " P130DIR ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x0 29. " P129DIR ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x0 28. " P128DIR ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P127DIR ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x0 26. " P126DIR ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x0 25. " P125DIR ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x0 24. " P124DIR ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P123DIR ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x0 22. " P122DIR ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x0 21. " P121DIR ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x0 20. " P120DIR ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P119DIR ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x0 18. " P118DIR ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x0 17. " P117DIR ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x0 16. " P116DIR ,Pin 1.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P115DIR ,Pin 1.15 Direction" "Input,Output"
|
|
bitfld.long 0x0 14. " P114DIR ,Pin 1.14 Direction" "Input,Output"
|
|
bitfld.long 0x0 13. " P113DIR ,Pin 1.13 Direction" "Input,Output"
|
|
bitfld.long 0x0 12. " P112DIR ,Pin 1.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P111DIR ,Pin 1.11 Direction" "Input,Output"
|
|
bitfld.long 0x0 10. " P110DIR ,Pin 1.10 Direction" "Input,Output"
|
|
bitfld.long 0x0 9. " P19DIR ,Pin 1.9 Direction" "Input,Output"
|
|
bitfld.long 0x0 8. " P18DIR ,Pin 1.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P17DIR ,Pin 1.7 Direction" "Input,Output"
|
|
bitfld.long 0x0 6. " P16DIR ,Pin 1.6 Direction" "Input,Output"
|
|
bitfld.long 0x0 5. " P15DIR ,Pin 1.5 Direction" "Input,Output"
|
|
bitfld.long 0x0 4. " P14DIR ,Pin 1.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P13DIR ,Pin 1.3 Direction" "Input,Output"
|
|
bitfld.long 0x0 2. " P12DIR ,Pin 1.2 Direction" "Input,Output"
|
|
bitfld.long 0x0 1. " P11DIR ,Pin 1.1 Direction" "Input,Output"
|
|
bitfld.long 0x0 0. " P10DIR ,Pin 1.0 Direction" "Input,Output"
|
|
width 0x8
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "IO1PIN,GPIO 1 Port Pin Value Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x0C 31. " P131VAL_Clear/Set ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x0C 30. " P130VAL_Clear/Set ,Pin 1.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x0C 29. " P129VAL_Clear/Set ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x0C 28. " P128VAL_Clear/Set ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x0C 27. " P127VAL_Clear/Set ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x0C 26. " P126VAL_Clear/Set ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x0C 25. " P125VAL_Clear/Set ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x0C 24. " P124VAL_Clear/Set ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x0C 23. " P123VAL_Clear/Set ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x0C 22. " P122VAL_Clear/Set ,Pin 1.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x0C 21. " P121VAL_Clear/Set ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x0C 20. " P120VAL_Clear/Set ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x0C 19. " P119VAL_Clear/Set ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x0C 18. " P118VAL_Clear/Set ,Pin 1.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x0C 17. " P117VAL_Clear/Set ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x0C 16. " P116VAL_Clear/Set ,Pin 1.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x0C 15. " P115VAL_Clear/Set ,Pin 1.15 Value" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x0C 14. " P114VAL_Clear/Set ,Pin 1.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x0C 13. " P113VAL_Clear/Set ,Pin 1.13 Value" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x0C 12. " P112VAL_Clear/Set ,Pin 1.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x0C 11. " P111VAL_Clear/Set ,Pin 1.11 Value" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x0C 10. " P110VAL_Clear/Set ,Pin 1.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x0C 9. " P19VAL_Clear/Set ,Pin 1.9 Value" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x0C 8. " P18VAL_Clear/Set ,Pin 1.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x0C 7. " P17VAL_Clear/Set ,Pin 1.7 Value" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x0C 6. " P16VAL_Clear/Set ,Pin 1.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x0C 5. " P15VAL_Clear/Set ,Pin 1.5 Value" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x0C 4. " P14VAL_Clear/Set ,Pin 1.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x0C 3. " P13VAL_Clear/Set ,Pin 1.3 Value" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x0C 2. " P12VAL_Clear/Set ,Pin 1.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x0C 1. " P11VAL_Clear/Set ,Pin 1.1 Value" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x0C 0. " P10VAL_Clear/Set ,Pin 1.0 Value" "Low,High"
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
group.long 0x20++0x03 "Local Bus"
|
|
line.long 0x00 "FIO1DIR,Fast GPIO 1 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP131DIR ,Pin 1.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP130DIR ,Pin 1.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP129DIR ,Pin 1.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP128DIR ,Pin 1.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP127DIR ,Pin 1.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP126DIR ,Pin 1.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP125DIR ,Pin 1.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP124DIR ,Pin 1.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP123DIR ,Pin 1.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP122DIR ,Pin 1.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP121DIR ,Pin 1.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP120DIR ,Pin 1.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP119DIR ,Pin 1.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP118DIR ,Pin 1.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP117DIR ,Pin 1.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP116DIR ,Pin 1.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP115DIR ,Pin 1.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP114DIR ,Pin 1.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP113DIR ,Pin 1.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP112DIR ,Pin 1.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP111DIR ,Pin 1.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP110DIR ,Pin 1.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP19DIR ,Pin 1.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP18DIR ,Pin 1.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP17DIR ,Pin 1.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP16DIR ,Pin 1.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP15DIR ,Pin 1.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP14DIR ,Pin 1.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP13DIR ,Pin 1.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP12DIR ,Pin 1.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP11DIR ,Pin 1.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP10DIR ,Pin 1.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x30++0x7
|
|
line.long 0x00 "FIO1MASK,Fast GPIO 1 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP131MASK ,Pin 1.31 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP130MASK ,Pin 1.30 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP129MASK ,Pin 1.29 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP128MASK ,Pin 1.28 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP127MASK ,Pin 1.27 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP126MASK ,Pin 1.26 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP125MASK ,Pin 1.25 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP124MASK ,Pin 1.24 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP123MASK ,Pin 1.23 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP122MASK ,Pin 1.22 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP121MASK ,Pin 1.21 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP120MASK ,Pin 1.20 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP119MASK ,Pin 1.19 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP118MASK ,Pin 1.18 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP117MASK ,Pin 1.17 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP116MASK ,Pin 1.16 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP115MASK ,Pin 1.15 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP114MASK ,Pin 1.14 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP113MASK ,Pin 1.13 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP112MASK ,Pin 1.12 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP111MASK ,Pin 1.11 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP110MASK ,Pin 1.10 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP19MASK ,Pin 1.9 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP18MASK ,Pin 1.8 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP17MASK ,Pin 1.7 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP16MASK ,Pin 1.6 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP15MASK ,Pin 1.5 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP14MASK ,Pin 1.4 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP13MASK ,Pin 1.3 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP12MASK ,Pin 1.2 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP11MASK ,Pin 1.1 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP10MASK ,Pin 1.0 Affected Writes to FIO1SET,FIO1CLR,FIO1PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO1PIN,GPIO 1 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP131VAL_Clear/Set ,Pin 1.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP130VAL_Clear/Set ,Pin 1.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP129VAL_Clear/Set ,Pin 1.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP128VAL_Clear/Set ,Pin 1.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP127VAL_Clear/Set ,Pin 1.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP126VAL_Clear/Set ,Pin 1.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP125VAL_Clear/Set ,Pin 1.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP124VAL_Clear/Set ,Pin 1.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP123VAL_Clear/Set ,Pin 1.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP122VAL_Clear/Set ,Pin 1.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP121VAL_Clear/Set ,Pin 1.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP120VAL_Clear/Set ,Pin 1.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP119VAL_Clear/Set ,Pin 1.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP118VAL_Clear/Set ,Pin 1.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP117VAL_Clear/Set ,Pin 1.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP116VAL_Clear/Set ,Pin 1.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP115VAL_Clear/Set ,Pin 1.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP114VAL_Clear/Set ,Pin 1.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP113VAL_Clear/Set ,Pin 1.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP112VAL_Clear/Set ,Pin 1.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP111VAL_Clear/Set ,Pin 1.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP110VAL_Clear/Set ,Pin 1.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP19VAL_Clear/Set ,Pin 1.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP18VAL_Clear/Set ,Pin 1.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP17VAL_Clear/Set ,Pin 1.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP16VAL_Clear/Set ,Pin 1.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP15VAL_Clear/Set ,Pin 1.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP14VAL_Clear/Set ,Pin 1.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP13VAL_Clear/Set ,Pin 1.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP12VAL_Clear/Set ,Pin 1.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP11VAL_Clear/Set ,Pin 1.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP10VAL_Clear/Set ,Pin 1.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xa
|
|
tree "GPIO2 (General Purpose Input/Output port 2)"
|
|
group.long 0x40++0x03 "Local Bus"
|
|
line.long 0x00 "FIO2DIR,Fast GPIO 2 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP231DIR ,Pin 2.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP230DIR ,Pin 2.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP229DIR ,Pin 2.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP228DIR ,Pin 2.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP227DIR ,Pin 2.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP226DIR ,Pin 2.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP225DIR ,Pin 2.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP224DIR ,Pin 2.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP223DIR ,Pin 2.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP222DIR ,Pin 2.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP221DIR ,Pin 2.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP220DIR ,Pin 2.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP219DIR ,Pin 2.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP218DIR ,Pin 2.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP217DIR ,Pin 2.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP216DIR ,Pin 2.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP215DIR ,Pin 2.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP214DIR ,Pin 2.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP213DIR ,Pin 2.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP212DIR ,Pin 2.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP211DIR ,Pin 2.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP210DIR ,Pin 2.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP29DIR ,Pin 2.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP28DIR ,Pin 2.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP27DIR ,Pin 2.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP26DIR ,Pin 2.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP25DIR ,Pin 2.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP24DIR ,Pin 2.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP23DIR ,Pin 2.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP22DIR ,Pin 2.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP21DIR ,Pin 2.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP20DIR ,Pin 2.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "FIO2MASK,Fast GPIO 2 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP231MASK ,Pin 2.31 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP230MASK ,Pin 2.30 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP229MASK ,Pin 2.29 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP228MASK ,Pin 2.28 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP227MASK ,Pin 2.27 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP226MASK ,Pin 2.26 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP225MASK ,Pin 2.25 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP224MASK ,Pin 2.24 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP223MASK ,Pin 2.23 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP222MASK ,Pin 2.22 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP221MASK ,Pin 2.21 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP220MASK ,Pin 2.20 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP219MASK ,Pin 2.19 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP218MASK ,Pin 2.18 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP217MASK ,Pin 2.17 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP216MASK ,Pin 2.16 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP215MASK ,Pin 2.15 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP214MASK ,Pin 2.14 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP213MASK ,Pin 2.13 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP212MASK ,Pin 2.12 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP211MASK ,Pin 2.11 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP210MASK ,Pin 2.10 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP29MASK ,Pin 2.9 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP28MASK ,Pin 2.8 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP27MASK ,Pin 2.7 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP26MASK ,Pin 2.6 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP25MASK ,Pin 2.5 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP24MASK ,Pin 2.4 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP23MASK ,Pin 2.3 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP22MASK ,Pin 2.2 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP21MASK ,Pin 2.1 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP20MASK ,Pin 2.0 Affected Writes to FIO2SET,FIO2CLR,FIO2PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO2PIN,GPIO 2 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP231VAL_Clear/Set ,Pin 2.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP230VAL_Clear/Set ,Pin 2.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP229VAL_Clear/Set ,Pin 2.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP228VAL_Clear/Set ,Pin 2.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP227VAL_Clear/Set ,Pin 2.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP226VAL_Clear/Set ,Pin 2.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP225VAL_Clear/Set ,Pin 2.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP224VAL_Clear/Set ,Pin 2.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP223VAL_Clear/Set ,Pin 2.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP222VAL_Clear/Set ,Pin 2.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP221VAL_Clear/Set ,Pin 2.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP220VAL_Clear/Set ,Pin 2.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP219VAL_Clear/Set ,Pin 2.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP218VAL_Clear/Set ,Pin 2.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP217VAL_Clear/Set ,Pin 2.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP216VAL_Clear/Set ,Pin 2.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP215VAL_Clear/Set ,Pin 2.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP214VAL_Clear/Set ,Pin 2.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP213VAL_Clear/Set ,Pin 2.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP212VAL_Clear/Set ,Pin 2.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP211VAL_Clear/Set ,Pin 2.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP210VAL_Clear/Set ,Pin 2.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP29VAL_Clear/Set ,Pin 2.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP28VAL_Clear/Set ,Pin 2.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP27VAL_Clear/Set ,Pin 2.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP26VAL_Clear/Set ,Pin 2.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP25VAL_Clear/Set ,Pin 2.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP24VAL_Clear/Set ,Pin 2.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP23VAL_Clear/Set ,Pin 2.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP22VAL_Clear/Set ,Pin 2.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP21VAL_Clear/Set ,Pin 2.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP20VAL_Clear/Set ,Pin 2.0 Value" "Low,High"
|
|
width 0xB
|
|
base sd:0xE0028000
|
|
tree "GPIO 2 interrupt registers"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "IO2IntEnR,GPIO 2 Interrupt Enable for Rising edge register"
|
|
bitfld.long 0x0 31. " P231ER ,Enable Rising edge P2.31" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " P230ER ,Enable Rising edge P2.30" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " P229ER ,Enable Rising edge P2.29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P228ER ,Enable Rising edge P2.28" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " P227ER ,Enable Rising edge P2.27" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " P226ER ,Enable Rising edge P2.26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P225ER ,Enable Rising edge P2.25" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " P224ER ,Enable Rising edge P2.24" "Disabled,Enabled"
|
|
bitfld.long 0x0 23. " P223ER ,Enable Rising edge P2.23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P222ER ,Enable Rising edge P2.22" "Disabled,Enabled"
|
|
bitfld.long 0x0 21. " P221ER ,Enable Rising edge P2.21" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " P220ER ,Enable Rising edge P2.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P219ER ,Enable Rising edge P2.19" "Disabled,Enabled"
|
|
bitfld.long 0x0 18. " P218ER ,Enable Rising edge P2.18" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " P217ER ,Enable Rising edge P2.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P216ER ,Enable Rising edge P2.16" "Disabled,Enabled"
|
|
bitfld.long 0x0 15. " P215ER ,Enable Rising edge P2.15" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " P214ER ,Enable Rising edge P2.14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P213ER ,Enable Rising edge P2.13" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " P212ER ,Enable Rising edge P2.12" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " P211ER ,Enable Rising edge P2.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P210ER ,Enable Rising edge P2.10" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " P29ER ,Enable Rising edge P2.9" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " P28ER ,Enable Rising edge P2.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27ER ,Enable Rising edge P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " P26ER ,Enable Rising edge P2.6" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " P25ER ,Enable Rising edge P2.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P24ER ,Enable Rising edge P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " P23ER ,Enable Rising edge P2.3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " P22ER ,Enable Rising edge P2.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21ER ,Enable Rising edge P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " P20ER ,Enable Rising edge P2.0" "Disabled,Enabled"
|
|
line.long 0x4 "IO2IntEnF,GPIO 2 Interrupt Enable for Falling edge register"
|
|
bitfld.long 0x4 31. " P231EF ,Enable Falling edge P2.31" "Disabled,Enabled"
|
|
bitfld.long 0x4 30. " P230EF ,Enable Falling edge P2.30" "Disabled,Enabled"
|
|
bitfld.long 0x4 29. " P229EF ,Enable Falling edge P2.29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 28. " P228EF ,Enable Falling edge P2.28" "Disabled,Enabled"
|
|
bitfld.long 0x4 27. " P227EF ,Enable Falling edge P2.27" "Disabled,Enabled"
|
|
bitfld.long 0x4 26. " P226EF ,Enable Falling edge P2.26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P225EF ,Enable Falling edge P2.25" "Disabled,Enabled"
|
|
bitfld.long 0x4 24. " P224EF ,Enable Falling edge P2.24" "Disabled,Enabled"
|
|
bitfld.long 0x4 23. " P223EF ,Enable Falling edge P2.23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 22. " P222EF ,Enable Falling edge P2.22" "Disabled,Enabled"
|
|
bitfld.long 0x4 21. " P221EF ,Enable Falling edge P2.21" "Disabled,Enabled"
|
|
bitfld.long 0x4 20. " P220EF ,Enable Falling edge P2.20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P219EF ,Enable Falling edge P2.19" "Disabled,Enabled"
|
|
bitfld.long 0x4 18. " P218EF ,Enable Falling edge P2.18" "Disabled,Enabled"
|
|
bitfld.long 0x4 17. " P217EF ,Enable Falling edge P2.17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 16. " P216EF ,Enable Falling edge P2.16" "Disabled,Enabled"
|
|
bitfld.long 0x4 15. " P215EF ,Enable Falling edge P2.15" "Disabled,Enabled"
|
|
bitfld.long 0x4 14. " P214EF ,Enable Falling edge P2.14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P213EF ,Enable Falling edge P2.13" "Disabled,Enabled"
|
|
bitfld.long 0x4 12. " P212EF ,Enable Falling edge P2.12" "Disabled,Enabled"
|
|
bitfld.long 0x4 11. " P211EF ,Enable Falling edge P2.11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 10. " P210EF ,Enable Falling edge P2.10" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " P29EF ,Enable Falling edge P2.9" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " P28EF ,Enable Falling edge P2.8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P27EF ,Enable Falling edge P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " P26EF ,Enable Falling edge P2.6" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " P25EF ,Enable Falling edge P2.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 4. " P24EF ,Enable Falling edge P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x4 3. " P23EF ,Enable Falling edge P2.3" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " P22EF ,Enable Falling edge P2.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P21EF ,Enable Falling edge P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x4 0. " P20EF ,Enable Falling edge P2.0" "Disabled,Enabled"
|
|
width 0xD
|
|
tree "GPIO 2 Interrupt Status for edge registers"
|
|
textline " "
|
|
rgroup.long 0xA4++0x7
|
|
line.long 0x0 "IO2IntStatR,GPIO 2 Interrupt Status for Rising edge register"
|
|
bitfld.long 0x0 31. " P231REI ,Rising Edge Interrupt status P2.31" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 30. " P230REI ,Rising Edge Interrupt status P2.30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 29. " P229REI ,Rising Edge Interrupt status P2.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 28. " P228REI ,Rising Edge Interrupt status P2.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 27. " P227REI ,Rising Edge Interrupt status P2.27" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 26. " P226REI ,Rising Edge Interrupt status P2.26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P225REI ,Rising Edge Interrupt status P2.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 24. " P224REI ,Rising Edge Interrupt status P2.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P223REI ,Rising Edge Interrupt status P2.23" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 22. " P222REI ,Rising Edge Interrupt status P2.22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 21. " P221REI ,Rising Edge Interrupt status P2.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 20. " P220REI ,Rising Edge Interrupt status P2.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P219REI ,Rising Edge Interrupt status P2.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 18. " P218REI ,Rising Edge Interrupt status P2.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 17. " P217REI ,Rising Edge Interrupt status P2.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 16. " P216REI ,Rising Edge Interrupt status P2.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 15. " P215REI ,Rising Edge Interrupt status P2.15" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 14. " P214REI ,Rising Edge Interrupt status P2.14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P213REI ,Rising Edge Interrupt status P2.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " P212REI ,Rising Edge Interrupt status P2.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P211REI ,Rising Edge Interrupt status P2.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 10. " P210REI ,Rising Edge Interrupt status P2.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 9. " P29REI ,Rising Edge Interrupt status P2.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " P28REI ,Rising Edge Interrupt status P2.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27REI ,Rising Edge Interrupt status P2.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " P26REI ,Rising Edge Interrupt status P2.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 5. " P25REI ,Rising Edge Interrupt status P2.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 4. " P24REI ,Rising Edge Interrupt status P2.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P23REI ,Rising Edge Interrupt status P2.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " P22REI ,Rising Edge Interrupt status P2.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21REI ,Rising Edge Interrupt status P2.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " P20REI ,Rising Edge Interrupt status P2.0" "No interrupt,Interrupt"
|
|
line.long 0x4 "IO2IntStatF,GPIO 2 Interrupt Status for Falling edge register"
|
|
bitfld.long 0x4 31. " P231FEI ,Falling Edge Interrupt status P2.31" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 30. " P230FEI ,Falling Edge Interrupt status P2.30" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 29. " P229FEI ,Falling Edge Interrupt status P2.29" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 28. " P228FEI ,Falling Edge Interrupt status P2.28" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 27. " P227FEI ,Falling Edge Interrupt status P2.27" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 26. " P226FEI ,Falling Edge Interrupt status P2.26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 25. " P225FEI ,Falling Edge Interrupt status P2.25" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 24. " P224FEI ,Falling Edge Interrupt status P2.24" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 23. " P223FEI ,Falling Edge Interrupt status P2.23" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 22. " P222FEI ,Falling Edge Interrupt status P2.22" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 21. " P221FEI ,Falling Edge Interrupt status P2.21" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 20. " P220FEI ,Falling Edge Interrupt status P2.20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P219FEI ,Falling Edge Interrupt status P2.19" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 18. " P218FEI ,Falling Edge Interrupt status P2.18" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 17. " P217FEI ,Falling Edge Interrupt status P2.17" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 16. " P216FEI ,Falling Edge Interrupt status P2.16" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 15. " P215FEI ,Falling Edge Interrupt status P2.15" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 14. " P214FEI ,Falling Edge Interrupt status P2.14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 13. " P213FEI ,Falling Edge Interrupt status P2.13" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " P212FEI ,Falling Edge Interrupt status P2.12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P211FEI ,Falling Edge Interrupt status P2.11" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 10. " P210FEI ,Falling Edge Interrupt status P2.10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 9. " P29FEI ,Falling Edge Interrupt status P2.9" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " P28FEI ,Falling Edge Interrupt status P2.8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P27FEI ,Falling Edge Interrupt status P2.7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " P26FEI ,Falling Edge Interrupt status P2.6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 5. " P25FEI ,Falling Edge Interrupt status P2.5" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 4. " P24FEI ,Falling Edge Interrupt status P2.4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P23FEI ,Falling Edge Interrupt status P2.3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " P22FEI ,Falling Edge Interrupt status P2.2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " P21FEI ,Falling Edge Interrupt status P2.1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " P20FEI ,Falling Edge Interrupt status P2.0" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xB
|
|
textline " "
|
|
wgroup.long 0xAC++0x3
|
|
line.long 0x0 "IO2IntClr,GPIO 2 Interrupt Clear register"
|
|
bitfld.long 0x0 31. " P231CI ,Clear GPIO port Interrupt P2.31" "Unchanged,Cleared"
|
|
bitfld.long 0x0 30. " P230CI ,Clear GPIO port Interrupt P2.30" "Unchanged,Cleared"
|
|
bitfld.long 0x0 29. " P229CI ,Clear GPIO port Interrupt P2.29" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 28. " P228CI ,Clear GPIO port Interrupt P2.28" "Unchanged,Cleared"
|
|
bitfld.long 0x0 27. " P227CI ,Clear GPIO port Interrupt P2.27" "Unchanged,Cleared"
|
|
bitfld.long 0x0 26. " P226CI ,Clear GPIO port Interrupt P2.26" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 25. " P225CI ,Clear GPIO port Interrupt P2.25" "Unchanged,Cleared"
|
|
bitfld.long 0x0 24. " P224CI ,Clear GPIO port Interrupt P2.24" "Unchanged,Cleared"
|
|
bitfld.long 0x0 23. " P223CI ,Clear GPIO port Interrupt P2.23" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 22. " P222CI ,Clear GPIO port Interrupt P2.22" "Unchanged,Cleared"
|
|
bitfld.long 0x0 21. " P221CI ,Clear GPIO port Interrupt P2.21" "Unchanged,Cleared"
|
|
bitfld.long 0x0 20. " P220CI ,Clear GPIO port Interrupt P2.20" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P219CI ,Clear GPIO port Interrupt P2.19" "Unchanged,Cleared"
|
|
bitfld.long 0x0 18. " P218CI ,Clear GPIO port Interrupt P2.18" "Unchanged,Cleared"
|
|
bitfld.long 0x0 17. " P217CI ,Clear GPIO port Interrupt P2.17" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 16. " P216CI ,Clear GPIO port Interrupt P2.16" "Unchanged,Cleared"
|
|
bitfld.long 0x0 15. " P215CI ,Clear GPIO port Interrupt P2.15" "Unchanged,Cleared"
|
|
bitfld.long 0x0 14. " P214CI ,Clear GPIO port Interrupt P2.14" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 13. " P213CI ,Clear GPIO port Interrupt P2.13" "Unchanged,Cleared"
|
|
bitfld.long 0x0 12. " P212CI ,Clear GPIO port Interrupt P2.12" "Unchanged,Cleared"
|
|
bitfld.long 0x0 11. " P211CI ,Clear GPIO port Interrupt P2.11" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 10. " P210CI ,Clear GPIO port Interrupt P2.10" "Unchanged,Cleared"
|
|
bitfld.long 0x0 9. " P29CI ,Clear GPIO port Interrupt P2.9" "Unchanged,Cleared"
|
|
bitfld.long 0x0 8. " P28CI ,Clear GPIO port Interrupt P2.8" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P27CI ,Clear GPIO port Interrupt P2.7" "Unchanged,Cleared"
|
|
bitfld.long 0x0 6. " P26CI ,Clear GPIO port Interrupt P2.6" "Unchanged,Cleared"
|
|
bitfld.long 0x0 5. " P25CI ,Clear GPIO port Interrupt P2.5" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 4. " P24CI ,Clear GPIO port Interrupt P2.4" "Unchanged,Cleared"
|
|
bitfld.long 0x0 3. " P23CI ,Clear GPIO port Interrupt P2.3" "Unchanged,Cleared"
|
|
bitfld.long 0x0 2. " P22CI ,Clear GPIO port Interrupt P2.2" "Unchanged,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " P21CI ,Clear GPIO port Interrupt P2.1" "Unchanged,Cleared"
|
|
bitfld.long 0x0 0. " P20CI ,Clear GPIO port Interrupt P2.0" "Unchanged,Cleared"
|
|
tree.end
|
|
tree.end
|
|
width 0xA
|
|
base usr:0x3FFFC000
|
|
tree "GPIO3 (General Purpose Input/Output port 3)"
|
|
group.long 0x60++0x03 "Local Bus"
|
|
line.long 0x00 "FIO3DIR,Fast GPIO 3 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP331DIR ,Pin 3.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP330DIR ,Pin 3.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP329DIR ,Pin 3.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP328DIR ,Pin 3.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP327DIR ,Pin 3.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP326DIR ,Pin 3.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP325DIR ,Pin 3.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP324DIR ,Pin 3.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP323DIR ,Pin 3.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP322DIR ,Pin 3.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP321DIR ,Pin 3.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP320DIR ,Pin 3.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP319DIR ,Pin 3.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP318DIR ,Pin 3.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP317DIR ,Pin 3.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP316DIR ,Pin 3.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP315DIR ,Pin 3.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP314DIR ,Pin 3.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP313DIR ,Pin 3.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP312DIR ,Pin 3.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP311DIR ,Pin 3.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP310DIR ,Pin 3.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP39DIR ,Pin 3.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP38DIR ,Pin 3.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP37DIR ,Pin 3.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP36DIR ,Pin 3.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP35DIR ,Pin 3.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP34DIR ,Pin 3.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP33DIR ,Pin 3.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP32DIR ,Pin 3.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP31DIR ,Pin 3.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP30DIR ,Pin 3.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x70++0x7
|
|
line.long 0x00 "FIO3MASK,Fast GPIO 3 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP331MASK ,Pin 3.31 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP330MASK ,Pin 3.30 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP329MASK ,Pin 3.29 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP328MASK ,Pin 3.28 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP327MASK ,Pin 3.27 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP326MASK ,Pin 3.26 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP325MASK ,Pin 3.25 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP324MASK ,Pin 3.24 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP323MASK ,Pin 3.23 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP322MASK ,Pin 3.22 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP321MASK ,Pin 3.21 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP320MASK ,Pin 3.20 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP319MASK ,Pin 3.19 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP318MASK ,Pin 3.18 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP317MASK ,Pin 3.17 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP316MASK ,Pin 3.16 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP315MASK ,Pin 3.15 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP314MASK ,Pin 3.14 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP313MASK ,Pin 3.13 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP312MASK ,Pin 3.12 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP311MASK ,Pin 3.11 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP310MASK ,Pin 3.10 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP39MASK ,Pin 3.9 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP38MASK ,Pin 3.8 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP37MASK ,Pin 3.7 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP36MASK ,Pin 3.6 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP35MASK ,Pin 3.5 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP34MASK ,Pin 3.4 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP33MASK ,Pin 3.3 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP32MASK ,Pin 3.2 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP31MASK ,Pin 3.1 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP30MASK ,Pin 3.0 Affected Writes to FIO3SET,FIO3CLR,FIO3PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO3PIN,GPIO 3 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP331VAL_Clear/Set ,Pin 3.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP330VAL_Clear/Set ,Pin 3.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP329VAL_Clear/Set ,Pin 3.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP328VAL_Clear/Set ,Pin 3.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP327VAL_Clear/Set ,Pin 3.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP326VAL_Clear/Set ,Pin 3.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP325VAL_Clear/Set ,Pin 3.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP324VAL_Clear/Set ,Pin 3.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP323VAL_Clear/Set ,Pin 3.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP322VAL_Clear/Set ,Pin 3.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP321VAL_Clear/Set ,Pin 3.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP320VAL_Clear/Set ,Pin 3.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP319VAL_Clear/Set ,Pin 3.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP318VAL_Clear/Set ,Pin 3.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP317VAL_Clear/Set ,Pin 3.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP316VAL_Clear/Set ,Pin 3.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP315VAL_Clear/Set ,Pin 3.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP314VAL_Clear/Set ,Pin 3.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP313VAL_Clear/Set ,Pin 3.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP312VAL_Clear/Set ,Pin 3.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP311VAL_Clear/Set ,Pin 3.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP310VAL_Clear/Set ,Pin 3.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP39VAL_Clear/Set ,Pin 3.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP38VAL_Clear/Set ,Pin 3.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP37VAL_Clear/Set ,Pin 3.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP36VAL_Clear/Set ,Pin 3.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP35VAL_Clear/Set ,Pin 3.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP34VAL_Clear/Set ,Pin 3.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP33VAL_Clear/Set ,Pin 3.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP32VAL_Clear/Set ,Pin 3.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP31VAL_Clear/Set ,Pin 3.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP30VAL_Clear/Set ,Pin 3.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xa
|
|
tree "GPIO4 (General Purpose Input/Output port 4)"
|
|
group.long 0x80++0x03 "Local Bus"
|
|
line.long 0x00 "FIO4DIR,Fast GPIO 4 Port Direction Control Register"
|
|
bitfld.long 0x00 31. " FP431DIR ,Pin 4.31 Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " FP430DIR ,Pin 4.30 Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " FP429DIR ,Pin 4.29 Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " FP428DIR ,Pin 4.28 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FP427DIR ,Pin 4.27 Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " FP426DIR ,Pin 4.26 Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " FP425DIR ,Pin 4.25 Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " FP424DIR ,Pin 4.24 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FP423DIR ,Pin 4.23 Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " FP422DIR ,Pin 4.22 Direction" "Input,Output"
|
|
bitfld.long 0x00 21. " FP421DIR ,Pin 4.21 Direction" "Input,Output"
|
|
bitfld.long 0x00 20. " FP420DIR ,Pin 4.20 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP419DIR ,Pin 4.19 Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " FP418DIR ,Pin 4.18 Direction" "Input,Output"
|
|
bitfld.long 0x00 17. " FP417DIR ,Pin 4.17 Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " FP416DIR ,Pin 4.16 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FP415DIR ,Pin 4.15 Direction" "Input,Output"
|
|
bitfld.long 0x00 14. " FP414DIR ,Pin 4.14 Direction" "Input,Output"
|
|
bitfld.long 0x00 13. " FP413DIR ,Pin 4.13 Direction" "Input,Output"
|
|
bitfld.long 0x00 12. " FP412DIR ,Pin 4.12 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FP411DIR ,Pin 4.11 Direction" "Input,Output"
|
|
bitfld.long 0x00 10. " FP410DIR ,Pin 4.10 Direction" "Input,Output"
|
|
bitfld.long 0x00 9. " FP49DIR ,Pin 4.9 Direction" "Input,Output"
|
|
bitfld.long 0x00 8. " FP48DIR ,Pin 4.8 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP47DIR ,Pin 4.7 Direction" "Input,Output"
|
|
bitfld.long 0x00 6. " FP46DIR ,Pin 4.6 Direction" "Input,Output"
|
|
bitfld.long 0x00 5. " FP45DIR ,Pin 4.5 Direction" "Input,Output"
|
|
bitfld.long 0x00 4. " FP44DIR ,Pin 4.4 Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FP43DIR ,Pin 4.3 Direction" "Input,Output"
|
|
bitfld.long 0x00 2. " FP42DIR ,Pin 4.2 Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " FP41DIR ,Pin 4.1 Direction" "Input,Output"
|
|
bitfld.long 0x00 0. " FP40DIR ,Pin 4.0 Direction" "Input,Output"
|
|
width 0xa
|
|
group.long 0x90++0x7
|
|
line.long 0x00 "FIO4MASK,Fast GPIO 4 Port Mask Control Register"
|
|
bitfld.long 0x00 31. " FP431MASK ,Pin 4.31 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 30. " FP430MASK ,Pin 4.30 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 29. " FP429MASK ,Pin 4.29 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FP428MASK ,Pin 4.28 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 27. " FP427MASK ,Pin 4.27 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 26. " FP426MASK ,Pin 4.26 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FP425MASK ,Pin 4.25 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 24. " FP424MASK ,Pin 4.24 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 23. " FP423MASK ,Pin 4.23 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FP422MASK ,Pin 4.22 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 21. " FP421MASK ,Pin 4.21 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 20. " FP420MASK ,Pin 4.20 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FP419MASK ,Pin 4.19 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 18. " FP418MASK ,Pin 4.18 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 17. " FP417MASK ,Pin 4.17 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FP416MASK ,Pin 4.16 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 15. " FP415MASK ,Pin 4.15 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 14. " FP414MASK ,Pin 4.14 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FP413MASK ,Pin 4.13 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 12. " FP412MASK ,Pin 4.12 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 11. " FP411MASK ,Pin 4.11 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FP410MASK ,Pin 4.10 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 9. " FP49MASK ,Pin 4.9 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 8. " FP48MASK ,Pin 4.8 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FP47MASK ,Pin 4.7 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 6. " FP46MASK ,Pin 4.6 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 5. " FP45MASK ,Pin 4.5 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FP44MASK ,Pin 4.4 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 3. " FP43MASK ,Pin 4.3 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 2. " FP42MASK ,Pin 4.2 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FP41MASK ,Pin 4.1 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
bitfld.long 0x00 0. " FP40MASK ,Pin 4.0 Affected Writes to FIO4SET,FIO4CLR,FIO4PIN" "Affected,Unaffected"
|
|
width 0xa
|
|
line.long 0x4 "FIO4PIN,GPIO 4 Fast Port Pin Value Register"
|
|
setclrfld.long 0x4 31. 0x8 31. 0xC 31. " FP431VAL_Clear/Set ,Pin 4.31 Value" "Low,High"
|
|
setclrfld.long 0x4 30. 0x8 30. 0xC 30. " FP430VAL_Clear/Set ,Pin 4.30 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x8 29. 0xC 29. " FP429VAL_Clear/Set ,Pin 4.29 Value" "Low,High"
|
|
setclrfld.long 0x4 28. 0x8 28. 0xC 28. " FP428VAL_Clear/Set ,Pin 4.28 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x8 27. 0xC 27. " FP427VAL_Clear/Set ,Pin 4.27 Value" "Low,High"
|
|
setclrfld.long 0x4 26. 0x8 26. 0xC 26. " FP426VAL_Clear/Set ,Pin 4.26 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x8 25. 0xC 25. " FP425VAL_Clear/Set ,Pin 4.25 Value" "Low,High"
|
|
setclrfld.long 0x4 24. 0x8 24. 0xC 24. " FP424VAL_Clear/Set ,Pin 4.24 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x8 23. 0xC 23. " FP423VAL_Clear/Set ,Pin 4.23 Value" "Low,High"
|
|
setclrfld.long 0x4 22. 0x8 22. 0xC 22. " FP422VAL_Clear/Set ,Pin 4.22 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x8 21. 0xC 21. " FP421VAL_Clear/Set ,Pin 4.21 Value" "Low,High"
|
|
setclrfld.long 0x4 20. 0x8 20. 0xC 20. " FP420VAL_Clear/Set ,Pin 4.20 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x8 19. 0xC 19. " FP419VAL_Clear/Set ,Pin 4.19 Value" "Low,High"
|
|
setclrfld.long 0x4 18. 0x8 18. 0xC 18. " FP418VAL_Clear/Set ,Pin 4.18 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x8 17. 0xC 17. " FP417VAL_Clear/Set ,Pin 4.17 Value" "Low,High"
|
|
setclrfld.long 0x4 16. 0x8 16. 0xC 16. " FP416VAL_Clear/Set ,Pin 4.16 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x8 15. 0xC 15. " FP415VAL_Clear/Set ,Pin 4.15 Value" "Low,High"
|
|
setclrfld.long 0x4 14. 0x8 14. 0xC 14. " FP414VAL_Clear/Set ,Pin 4.14 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x8 13. 0xC 13. " FP413VAL_Clear/Set ,Pin 4.13 Value" "Low,High"
|
|
setclrfld.long 0x4 12. 0x8 12. 0xC 12. " FP412VAL_Clear/Set ,Pin 4.12 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x8 11. 0xC 11. " FP411VAL_Clear/Set ,Pin 4.11 Value" "Low,High"
|
|
setclrfld.long 0x4 10. 0x8 10. 0xC 10. " FP410VAL_Clear/Set ,Pin 4.10 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x8 9. 0xC 9. " FP49VAL_Clear/Set ,Pin 4.9 Value" "Low,High"
|
|
setclrfld.long 0x4 8. 0x8 8. 0xC 8. " FP48VAL_Clear/Set ,Pin 4.8 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x8 7. 0xC 7. " FP47VAL_Clear/Set ,Pin 4.7 Value" "Low,High"
|
|
setclrfld.long 0x4 6. 0x8 6. 0xC 6. " FP46VAL_Clear/Set ,Pin 4.6 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x8 5. 0xC 5. " FP45VAL_Clear/Set ,Pin 4.5 Value" "Low,High"
|
|
setclrfld.long 0x4 4. 0x8 4. 0xC 4. " FP44VAL_Clear/Set ,Pin 4.4 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x8 3. 0xC 3. " FP43VAL_Clear/Set ,Pin 4.3 Value" "Low,High"
|
|
setclrfld.long 0x4 2. 0x8 2. 0xC 2. " FP42VAL_Clear/Set ,Pin 4.2 Value" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0xC 1. " FP41VAL_Clear/Set ,Pin 4.1 Value" "Low,High"
|
|
setclrfld.long 0x4 0. 0x8 0. 0xC 0. " FP40VAL_Clear/Set ,Pin 4.0 Value" "Low,High"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; A/D
|
|
; --------------------------------------------------------------------------------
|
|
tree "A/D Converter"
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
base 0xE0034000
|
|
width 0xA
|
|
tree "Analog/Digital Converter 0 (ADC0)"
|
|
if ((data.long(d:0xE0034000)&0x08000000)==0x08000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AD0CR,A/D Control Register 0"
|
|
bitfld.long 0x00 0. " AD0.0 ,AD0.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD0.1 ,AD0.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD0.2 ,AD0.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD0.3 ,AD0.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD0.4 ,AD0.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD0.5 ,AD0.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD0.6 ,AD0.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD0.7 ,AD0.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/TD3/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AD0CR,A/D Control Register 0"
|
|
bitfld.long 0x00 0. " AD0.0 ,AD0.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD0.1 ,AD0.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD0.2 ,AD0.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD0.3 ,AD0.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD0.4 ,AD0.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD0.5 ,AD0.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD0.6 ,AD0.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD0.7 ,AD0.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "AD0DR,A/D Global Data Register 0"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " CHN ,Channel from which the RESULTS Bits were converted" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 6.--15. 1. " RESULT ,Binary Fraction"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "AD0STAT,A/D Status Register 0"
|
|
bitfld.long 0x00 16. " ADINT ,A/D Interrupt Flag" "Low,High"
|
|
bitfld.long 0x00 15. " OVERRUN7 ,Mirrors OVERRUN Status Flag for Channel 7" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 14. " OVERRUN6 ,Mirrors OVERRUN Status Flag for Channel 6" "Not occured,Occured"
|
|
bitfld.long 0x00 13. " OVERRUN5 ,Mirrors OVERRUN Status Flag for Channel 5" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 12. " OVERRUN4 ,Mirrors OVERRUN Status Flag for Channel 4" "Not occured,Occured"
|
|
bitfld.long 0x00 11. " OVERRUN3 ,Mirrors OVERRUN Status Flag for Channel 3" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OVERRUN2 ,Mirrors OVERRUN Status Flag for Channel 2" "Not occured,Occured"
|
|
bitfld.long 0x00 9. " OVERRUN1 ,Mirrors OVERRUN Status Flag for Channel 1" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 8. " OVERRUN0 ,Mirrors OVERRUN Status Flag for Channel 0" "Not occured,Occured"
|
|
bitfld.long 0x00 7. " DONE7 ,Mirrors DONE Status Flag for Channel 7" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DONE6 ,Mirrors DONE Status Flag for Channel 6" "Not done,Done"
|
|
bitfld.long 0x00 5. " DONE5 ,Mirrors DONE Status Flag for Channel 5" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DONE4 ,Mirrors DONE Status Flag for Channel 4" "Not done,Done"
|
|
bitfld.long 0x00 3. " DONE3 ,Mirrors DONE Status Flag for Channel 3" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DONE2 ,Mirrors DONE Status Flag for Channel 2" "Not done,Done"
|
|
bitfld.long 0x00 1. " DONE1 ,Mirrors DONE Status Flag for Channel 1" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DONE0 ,Mirrors DONE Status Flag for Channel 0" "Not done,Done"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "AD0INTEN,A/D Interrupt Enable Register 0"
|
|
bitfld.long 0x00 8. " ADGINTEN ,Source of Generate Interrupt" "Only channels,Only DONE flag"
|
|
bitfld.long 0x00 7. " ADINTEN0 ,Interrupt when Conversion on Channel 0 Completed" "Not interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ADINTEN1 ,Interrupt when Conversion on Channel 1 Completed" "Not interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ADINTEN2 ,Interrupt when Conversion on Channel 2 Completed" "Not interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADINTEN3 ,Interrupt when Conversion on Channel 3 Completed" "Not interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " ADINTEN4 ,Interrupt when Conversion on Channel 4 Completed" "Not interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADINTEN5 ,Interrupt when Conversion on Channel 5 Completed" "Not interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " ADINTEN6 ,Interrupt when Conversion on Channel 6 Completed" "Not interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ADINTEN7 ,Interrupt when Conversion on Channel 7 Completed" "Not interrupt,Interrupt"
|
|
rgroup.long 0x10++0x1F
|
|
line.long 0x00 "ADD0DR0,A/D Data Register"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x00 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x04 "ADD0DR1,A/D Data Register"
|
|
bitfld.long 0x04 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x04 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x04 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x08 "ADD0DR2,A/D Data Register"
|
|
bitfld.long 0x08 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x08 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x08 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x0C "ADD0DR3,A/D Data Register"
|
|
bitfld.long 0x0C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x0C 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x0C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x10 "ADD0DR4,A/D Data Register"
|
|
bitfld.long 0x10 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x10 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x10 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x14 "ADD0DR5,A/D Data Register"
|
|
bitfld.long 0x14 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x14 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x14 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x18 "ADD0DR6,A/D Data Register"
|
|
bitfld.long 0x18 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x18 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x18 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x1C "ADD0DR7,A/D Data Register"
|
|
bitfld.long 0x1C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x1C 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x1C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
width 0x0B
|
|
tree.end
|
|
sif (cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
base 0xE0060000
|
|
width 0xA
|
|
tree "Analog/Digital Converter 1 (ADC1)"
|
|
if ((data.long(d:0xE0060000)&0x08000000)==0x08000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AD1CR,A/D Control Register 1"
|
|
bitfld.long 0x00 0. " AD1.0 ,AD1.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD1.1 ,AD1.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD1.2 ,AD1.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD1.3 ,AD1.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD1.4 ,AD1.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD1.5 ,AD1.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD1.6 ,AD1.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD1.7 ,AD1.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/TD3/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AD1CR,A/D Control Register 1"
|
|
bitfld.long 0x00 0. " AD1.0 ,AD1.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD1.1 ,AD1.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD1.2 ,AD1.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD1.3 ,AD1.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD1.4 ,AD1.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD1.5 ,AD1.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD1.6 ,AD1.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD1.7 ,AD1.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "AD1DR,A/D Global Data Register 1"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " CHN ,Channel from which the RESULTS Bits were converted" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 6.--15. 1. " RESULT ,Binary Fraction"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "AD1STAT,A/D Status Register 1"
|
|
bitfld.long 0x00 16. " ADINT ,A/D Interrupt Flag" "Low,High"
|
|
bitfld.long 0x00 15. " OVERRUN7 ,Mirrors OVERRUN Status Flag for Channel 7" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 14. " OVERRUN6 ,Mirrors OVERRUN Status Flag for Channel 6" "Not occured,Occured"
|
|
bitfld.long 0x00 13. " OVERRUN5 ,Mirrors OVERRUN Status Flag for Channel 5" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 12. " OVERRUN4 ,Mirrors OVERRUN Status Flag for Channel 4" "Not occured,Occured"
|
|
bitfld.long 0x00 11. " OVERRUN3 ,Mirrors OVERRUN Status Flag for Channel 3" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OVERRUN2 ,Mirrors OVERRUN Status Flag for Channel 2" "Not occured,Occured"
|
|
bitfld.long 0x00 9. " OVERRUN1 ,Mirrors OVERRUN Status Flag for Channel 1" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 8. " OVERRUN0 ,Mirrors OVERRUN Status Flag for Channel 0" "Not occured,Occured"
|
|
bitfld.long 0x00 7. " DONE7 ,Mirrors DONE Status Flag for Channel 7" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DONE6 ,Mirrors DONE Status Flag for Channel 6" "Not done,Done"
|
|
bitfld.long 0x00 5. " DONE5 ,Mirrors DONE Status Flag for Channel 5" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DONE4 ,Mirrors DONE Status Flag for Channel 4" "Not done,Done"
|
|
bitfld.long 0x00 3. " DONE3 ,Mirrors DONE Status Flag for Channel 3" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DONE2 ,Mirrors DONE Status Flag for Channel 2" "Not done,Done"
|
|
bitfld.long 0x00 1. " DONE1 ,Mirrors DONE Status Flag for Channel 1" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DONE0 ,Mirrors DONE Status Flag for Channel 0" "Not done,Done"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "AD1INTEN,A/D Interrupt Enable Register 1"
|
|
bitfld.long 0x00 8. " ADGINTEN ,Source of Generate Interrupt" "Only channels,Only DONE flag"
|
|
bitfld.long 0x00 7. " ADINTEN0 ,Interrupt when Conversion on Channel 0 Completed" "Not interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ADINTEN1 ,Interrupt when Conversion on Channel 1 Completed" "Not interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ADINTEN2 ,Interrupt when Conversion on Channel 2 Completed" "Not interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADINTEN3 ,Interrupt when Conversion on Channel 3 Completed" "Not interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " ADINTEN4 ,Interrupt when Conversion on Channel 4 Completed" "Not interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADINTEN5 ,Interrupt when Conversion on Channel 5 Completed" "Not interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " ADINTEN6 ,Interrupt when Conversion on Channel 6 Completed" "Not interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ADINTEN7 ,Interrupt when Conversion on Channel 7 Completed" "Not interrupt,Interrupt"
|
|
rgroup.long 0x10++0x1F
|
|
line.long 0x00 "ADD1DR0,A/D Data Register"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x00 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x04 "ADD1DR1,A/D Data Register"
|
|
bitfld.long 0x04 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x04 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x04 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x08 "ADD1DR2,A/D Data Register"
|
|
bitfld.long 0x08 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x08 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x08 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x0C "ADD1DR3,A/D Data Register"
|
|
bitfld.long 0x0C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x0C 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x0C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x10 "ADD1DR4,A/D Data Register"
|
|
bitfld.long 0x10 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x10 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x10 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x14 "ADD1DR5,A/D Data Register"
|
|
bitfld.long 0x14 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x14 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x14 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x18 "ADD1DR6,A/D Data Register"
|
|
bitfld.long 0x18 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x18 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x18 6.--15. 1. " RESULT ,Binary Fraction"
|
|
line.long 0x1C "ADD1DR7,A/D Data Register"
|
|
bitfld.long 0x1C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x1C 30. " OVERRUN ,Overrun Indicator" "Not occured,Occured"
|
|
textline " "
|
|
hexmask.long.word 0x1C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
width 0x7
|
|
base 0xE0034008
|
|
wgroup.long 0x00++0x03 "ADGSR Register"
|
|
line.long 0x00 "ADGSR,A/D Global Start Register"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling/Rising edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling/Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Falling/Rising edge on MAT0.1,Falling/Rising edge on MAT0.3,Falling/Rising edge on MAT1.0,Falling/Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
endif
|
|
sif (cpu()=="LPC2114"||cpu()=="LPC2124"||cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194")
|
|
width 0x06
|
|
base 0xE0034000
|
|
if ((data.long(ad:0xE0034000)&0x08000000)==0x00000000)
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " Ain0 ,Ain0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " Ain1 ,Ain1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Ain2 ,Ain2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " Ain3 ,Ain3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TEST1:0 ,Device Testing Mode" "No test,Digital,DAC,Simple"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/TD3/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Falling,Rising"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " Ain0 ,Ain0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " Ain1 ,Ain1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Ain2 ,Ain2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " Ain3 ,Ain3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TEST1:0 ,Device Testing Mode" "No test,Digital,DAC,Simple"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Falling,Rising"
|
|
endif
|
|
else
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " Ain0 ,Ain0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " Ain1 ,Ain1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Ain2 ,Ain2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " Ain3 ,Ain3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TEST1:0 ,Device Testing Mode" "No test,Digital,DAC,Simple"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Falling,Rising"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " Ain0 ,Ain0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " Ain1 ,Ain1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Ain2 ,Ain2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " Ain3 ,Ain3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TEST1:0 ,Device Testing Mode" "No test,Digital,DAC,Simple"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Falling,Rising"
|
|
endif
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ADDR,A/D Data Register"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " CHN ,Channel from which the LS bits were converted" "0,1,2,3,?..."
|
|
hexmask.long.word 0x00 6.--15. 1. " V/V3 ,Binary Fraction"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2212"||cpu()=="LPC2214"||cpu()=="LPC2290"||cpu()=="LPC2292"||cpu()=="LPC2294")
|
|
width 0x06
|
|
base 0xE0034000
|
|
if ((data.long(ad:0xE0034000)&0x08000000)==0x00000000)
|
|
sif (cpu()=="LPC2292"||cpu()=="LPC2294")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " Ain0 ,Ain0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " Ain1 ,Ain1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Ain2 ,Ain2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " Ain3 ,Ain3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Ain4 ,Ain4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " Ain5 ,Ain5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " Ain6 ,Ain6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " Ain7 ,Ain7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TEST1:0 ,Device Testing Mode" "No test,Digital,DAC,Simple"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/TD3/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Falling,Rising"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " Ain0 ,Ain0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " Ain1 ,Ain1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Ain2 ,Ain2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " Ain3 ,Ain3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Ain4 ,Ain4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " Ain5 ,Ain5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " Ain6 ,Ain6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " Ain7 ,Ain7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TEST1:0 ,Device Testing Mode" "No test,Digital,DAC,Simple"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Falling,Rising"
|
|
endif
|
|
else
|
|
sif (cpu()=="LPC2292"||cpu()=="LPC2294")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " Ain0 ,Ain0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " Ain1 ,Ain1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Ain2 ,Ain2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " Ain3 ,Ain3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Ain4 ,Ain4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " Ain5 ,Ain5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " Ain6 ,Ain6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " Ain7 ,Ain7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TEST1:0 ,Device Testing Mode" "No test,Digital,DAC,Simple"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Falling,Rising"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " Ain0 ,Ain0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " Ain1 ,Ain1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Ain2 ,Ain2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " Ain3 ,Ain3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Ain4 ,Ain4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " Ain5 ,Ain5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " Ain6 ,Ain6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " Ain7 ,Ain7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TEST1:0 ,Device Testing Mode" "No test,Digital,DAC,Simple"
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Falling,Rising"
|
|
endif
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ADDR,A/D Data Register"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " CHN ,Channel from which the LS bits were converted" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 6.--15. 1. " V/V3A ,Binary Fraction"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
base 0xE0034000
|
|
width 0x9
|
|
if ((data.long(ad:0xE0034000)&0x08000000)==0x08000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " AD.0 ,AD.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD.1 ,AD.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD.2 ,AD.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD.3 ,AD.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD.4 ,AD.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD.5 ,AD.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD.6 ,AD.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD.7 ,AD.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P.022/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " AD.0 ,AD.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD.1 ,AD.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD.2 ,AD.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD.3 ,AD.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD.4 ,AD.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD.5 ,AD.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD.6 ,AD.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD.7 ,AD.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P.022/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
endif
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "ADDR,A/D Global Data Register"
|
|
in
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "ADSTAT,A/D Status Register"
|
|
bitfld.long 0x00 0. " DONE0 ,Mirrors DONE Status Flag for Channel 0" "Not done,Done"
|
|
bitfld.long 0x00 1. " DONE1 ,Mirrors DONE Status Flag for Channel 1" "Not done,Done"
|
|
bitfld.long 0x00 2. " DONE2 ,Mirrors DONE Status Flag for Channel 2" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DONE3 ,Mirrors DONE Status Flag for Channel 3" "Not done,Done"
|
|
bitfld.long 0x00 4. " DONE4 ,Mirrors DONE Status Flag for Channel 4" "Not done,Done"
|
|
bitfld.long 0x00 5. " DONE5 ,Mirrors DONE Status Flag for Channel 5" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DONE6 ,Mirrors DONE Status Flag for Channel 6" "Not done,Done"
|
|
bitfld.long 0x00 7. " DONE7 ,Mirrors DONE Status Flag for Channel 7" "Not done,Done"
|
|
bitfld.long 0x00 8. " OVERRUN0 ,Mirrors OVERRUN Status Flag for Channel 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OVERRUN1 ,Mirrors OVERRUN Status Flag for Channel 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " OVERRUN2 ,Mirrors OVERRUN Status Flag for Channel 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " OVERRUN3 ,Mirrors OVERRUN Status Flag for Channel 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 12. " OVERRUN4 ,Mirrors OVERRUN Status Flag for Channel 4" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " OVERRUN5 ,Mirrors OVERRUN Status Flag for Channel 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " OVERRUN6 ,Mirrors OVERRUN Status Flag for Channel 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " OVERRUN7 ,Mirrors OVERRUN Status Flag for Channel 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " ADINT ,A/D Interrupt Flag" "Low,High"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ADINTEN,A/D Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " ADINTEN0 ,Interrupt when Conversion on Channel 0 Completed" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " ADINTEN1 ,Interrupt when Conversion on Channel 1 Completed" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " ADINTEN2 ,Interrupt when Conversion on Channel 2 Completed" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ADINTEN3 ,Interrupt when Conversion on Channel 3 Completed" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " ADINTEN4 ,Interrupt when Conversion on Channel 4 Completed" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ADINTEN5 ,Interrupt when Conversion on Channel 5 Completed" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ADINTEN6 ,Interrupt when Conversion on Channel 6 Completed" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " ADINTEN7 ,Interrupt when Conversion on Channel 7 Completed" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " ADGINTEN ,Source of Generate Interrupt" "Individual,Global"
|
|
rgroup.long 0x10++0x1F
|
|
line.long 0x00 "ADDDR0,A/D Data Register"
|
|
hexmask.long.word 0x00 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x04 "ADDDR1,A/D Data Register"
|
|
hexmask.long.word 0x04 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x04 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x04 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x08 "ADDDR2,A/D Data Register"
|
|
hexmask.long.word 0x08 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x08 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x08 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x0C "ADDDR3,A/D Data Register"
|
|
hexmask.long.word 0x0C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x0C 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x10 "ADDDR4,A/D Data Register"
|
|
hexmask.long.word 0x10 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x10 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x10 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x14 "ADDDR5,A/D Data Register"
|
|
hexmask.long.word 0x14 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x14 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x14 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x18 "ADDDR6,A/D Data Register"
|
|
hexmask.long.word 0x18 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x18 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x18 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x1C "ADDDR7,A/D Data Register"
|
|
hexmask.long.word 0x1C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x1C 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2132"||cpu()=="LPC2131/01"||cpu()=="LPC2132/01")
|
|
base 0xE0034000
|
|
width 0xA
|
|
if ((data.long(ad:0xE0034000)&0x08000000)==0x08000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " AD.0 ,AD.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD.1 ,AD.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD.2 ,AD.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD.3 ,AD.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD.4 ,AD.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD.5 ,AD.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD.6 ,AD.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD.7 ,AD.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/TD3/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCR,A/D Control Register"
|
|
bitfld.long 0x00 0. " AD.0 ,AD.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD.1 ,AD.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD.2 ,AD.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD.3 ,AD.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD.4 ,AD.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD.5 ,AD.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD.6 ,AD.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD.7 ,AD.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
endif
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "ADGDR,A/D Global Data Register"
|
|
in
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2134"||cpu()=="LPC2136"||cpu()=="LPC2138"||cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
tree "ADC0"
|
|
base 0xE0034000
|
|
width 0xA
|
|
if ((data.long(d:0xE0034000)&0x08000000)==0x08000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AD0CR,A/D 0 Control Register"
|
|
bitfld.long 0x00 0. " AD0.0 ,AD0.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD0.1 ,AD.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD0.2 ,AD0.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD0.3 ,AD0.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD0.4 ,AD0.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD0.5 ,AD0.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD0.6 ,AD0.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD0.7 ,AD0.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/TD3/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AD0CR,A/D 0 Control Register"
|
|
bitfld.long 0x00 0. " AD0.0 ,AD0.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD0.1 ,AD0.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD0.2 ,AD0.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD0.3 ,AD0.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD0.4 ,AD0.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD0.5 ,AD0.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD0.6 ,AD0.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD0.7 ,AD0.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
endif
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "ADGDR,A/D Global Data Register"
|
|
in
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "ADGSR,A/D Global Start Register"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling/Rising edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling/Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Falling/Rising edge on MAT0.1,Falling/Rising edge on MAT0.3,Falling/Rising edge on MAT1.0,Falling/Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
sif (cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "AD0STAT,A/D 0 Status Register"
|
|
bitfld.long 0x00 0. " DONE0 ,Mirrors DONE Status Flag for Channel 0" "Not done,Done"
|
|
bitfld.long 0x00 1. " DONE1 ,Mirrors DONE Status Flag for Channel 1" "Not done,Done"
|
|
bitfld.long 0x00 2. " DONE2 ,Mirrors DONE Status Flag for Channel 2" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DONE3 ,Mirrors DONE Status Flag for Channel 3" "Not done,Done"
|
|
bitfld.long 0x00 4. " DONE4 ,Mirrors DONE Status Flag for Channel 4" "Not done,Done"
|
|
bitfld.long 0x00 5. " DONE5 ,Mirrors DONE Status Flag for Channel 5" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DONE6 ,Mirrors DONE Status Flag for Channel 6" "Not done,Done"
|
|
bitfld.long 0x00 7. " DONE7 ,Mirrors DONE Status Flag for Channel 7" "Not done,Done"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "AD0INTEN,A/D 0 Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " ADINTEN0 ,Interrupt when Conversion on Channel 0 Completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADINTEN1 ,Interrupt when Conversion on Channel 1 Completed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADINTEN2 ,Interrupt when Conversion on Channel 2 Completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADINTEN3 ,Interrupt when Conversion on Channel 3 Completed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADINTEN4 ,Interrupt when Conversion on Channel 4 Completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADINTEN5 ,Interrupt when Conversion on Channel 5 Completed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ADINTEN6 ,Interrupt when Conversion on Channel 6 Completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ADINTEN7 ,Interrupt when Conversion on Channel 7 Completed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADGINTEN ,Source of Generate Interrupt" "Only channels,Only DONE flag"
|
|
rgroup.long 0x10++0x1F
|
|
line.long 0x00 "AD0DDR0,A/D 0 Data Register 0"
|
|
hexmask.long.word 0x00 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x04 "AD0DDR1,A/D 0 Data Register 1"
|
|
hexmask.long.word 0x04 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x04 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x04 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x08 "AD0DDR2,A/D 0 Data Register 2"
|
|
hexmask.long.word 0x08 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x08 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x08 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x0C "AD0DDR3,A/D 0 Data Register 3"
|
|
hexmask.long.word 0x0C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x0C 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x10 "AD0DDR4,A/D 0 Data Register 4"
|
|
hexmask.long.word 0x10 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x10 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x10 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x14 "AD0DDR5,A/D 0 Data Register 5"
|
|
hexmask.long.word 0x14 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x14 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x14 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x18 "AD0DDR6,A/D 0 Data Register 6"
|
|
hexmask.long.word 0x18 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x18 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x18 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x1C "AD0DDR7,A/D 0 Data Register 7"
|
|
hexmask.long.word 0x1C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x1C 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "ADC1"
|
|
base 0xE0036000
|
|
width 0xA
|
|
if ((data.long(d:0xE0036000)&0x08000000)==0x08000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AD1CR,A/D 1 Control Register"
|
|
bitfld.long 0x00 0. " AD1.0 ,AD1.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD1.1 ,AD.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD1.2 ,AD1.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD1.3 ,AD1.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD1.4 ,AD1.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD1.5 ,AD1.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD1.6 ,AD1.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD1.7 ,AD1.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Falling edge on P0.16/EINT0/MAT0.2/CAP0.2,Falling edge on P0.22/TD3/CAP0.0/MAT0.0,Falling edge on MAT0.1,Falling edge on MAT0.3,Falling edge on MAT1.0,Falling edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AD1CR,A/D 1 Control Register"
|
|
bitfld.long 0x00 0. " AD1.0 ,AD1.0 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " AD1.1 ,AD1.1 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AD1.2 ,AD1.2 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " AD1.3 ,AD1.3 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AD1.4 ,AD1.4 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " AD1.5 ,AD1.5 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AD1.6 ,AD1.6 Sampling and Conversion" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " AD1.7 ,AD1.7 Sampling and Conversion" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider"
|
|
bitfld.long 0x00 16. " BURST ,Conversion Control Mode" "Software,Repeated"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number of clocks for each conversion in Burst mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
bitfld.long 0x00 21. " PDN ,A/D Power" "Power-down,Operational"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " START ,Start Conversion Control" "No start,Start now,Rising edge on P0.16/EINT0/MAT0.2/CAP0.2 ,Rising edge on P0.22/TD3/CAP0.0/MAT0.0,Rising edge on MAT0.1,Rising edge on MAT0.3,Rising edge on MAT1.0,Rising edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EDGE ,Start Conversion Edge" "Rising,Falling"
|
|
endif
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "ADGDR,A/D Global Data Register"
|
|
in
|
|
sif (cpu()=="LPC2134/01"||cpu()=="LPC2136/01"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "AD1STAT,A/D 1 Status Register"
|
|
bitfld.long 0x00 0. " DONE0 ,Mirrors DONE Status Flag for Channel 0" "Not done,Done"
|
|
bitfld.long 0x00 1. " DONE1 ,Mirrors DONE Status Flag for Channel 1" "Not done,Done"
|
|
bitfld.long 0x00 2. " DONE2 ,Mirrors DONE Status Flag for Channel 2" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DONE3 ,Mirrors DONE Status Flag for Channel 3" "Not done,Done"
|
|
bitfld.long 0x00 4. " DONE4 ,Mirrors DONE Status Flag for Channel 4" "Not done,Done"
|
|
bitfld.long 0x00 5. " DONE5 ,Mirrors DONE Status Flag for Channel 5" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DONE6 ,Mirrors DONE Status Flag for Channel 6" "Not done,Done"
|
|
bitfld.long 0x00 7. " DONE7 ,Mirrors DONE Status Flag for Channel 7" "Not done,Done"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "AD1INTEN,A/D 1 Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " ADINTEN0 ,Interrupt when Conversion on Channel 0 Completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADINTEN1 ,Interrupt when Conversion on Channel 1 Completed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADINTEN2 ,Interrupt when Conversion on Channel 2 Completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADINTEN3 ,Interrupt when Conversion on Channel 3 Completed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADINTEN4 ,Interrupt when Conversion on Channel 4 Completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADINTEN5 ,Interrupt when Conversion on Channel 5 Completed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ADINTEN6 ,Interrupt when Conversion on Channel 6 Completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ADINTEN7 ,Interrupt when Conversion on Channel 7 Completed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADGINTEN ,Source of Generate Interrupt" "Only channels,Only DONE flag"
|
|
rgroup.long 0x10++0x1F
|
|
line.long 0x00 "AD1DDR0,A/D 1 Data Register 0"
|
|
hexmask.long.word 0x00 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x00 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x04 "AD1DDR1,A/D 1 Data Register 1"
|
|
hexmask.long.word 0x04 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x04 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x04 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x08 "AD1DDR2,A/D 1 Data Register 2"
|
|
hexmask.long.word 0x08 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x08 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x08 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x0C "AD1DDR3,A/D 1 Data Register 3"
|
|
hexmask.long.word 0x0C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x0C 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x10 "AD1DDR4,A/D 1 Data Register 4"
|
|
hexmask.long.word 0x10 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x10 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x10 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x14 "AD1DDR5,A/D 1 Data Register 5"
|
|
hexmask.long.word 0x14 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x14 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x14 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x18 "AD1DDR6,A/D 1 Data Register 6"
|
|
hexmask.long.word 0x18 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x18 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x18 31. " DONE ,Conversion Done" "Not done,Done"
|
|
line.long 0x1C "AD1DDR7,A/D 1 Data Register 7"
|
|
hexmask.long.word 0x1C 6.--15. 1. " RESULT ,Binary Fraction"
|
|
bitfld.long 0x1C 30. " OVERRUN ,Overrun Indicator" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 31. " DONE ,Conversion Done" "Not done,Done"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
width 9.
|
|
base sd:0xe0034000
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "AD0CR,A/D Control Register"
|
|
bitfld.long 0x00 27. " EDGE ,Edge Selection" "Falling,Rising"
|
|
bitfld.long 0x00 24.--26. " START ,Conversion Start" "Not started,Immediately,Edge on P0.16/EINT0/MAT0.2,Edge on P0.22,Edge on MAT0.1,Edge on MAT0.3,Edge on MAT1.0,Edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PDN ,A/D Converter Mode" "Operational,Power-down"
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number Of Clocks Used For Conversion In Burst Mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BURST1 ,Burst mode" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider Value"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Select Pins To Be Sampled And Converted"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "AD0GDR,A/D Global Data Register"
|
|
bitfld.long 0x00 31. " DONE ,Conversion Done" "Not done,Done"
|
|
bitfld.long 0x00 30. " OVERUN ,Conversion Lost" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.long 0x00 24.--26. " CHN ,Channel Number" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7"
|
|
hexmask.long.word 0x00 6.--15. 1. " RESULT ,Voltage Value"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "AD0STAT,A/D Status Register"
|
|
bitfld.long 0x00 16. " ADINT ,A/D Interrupt Flag" "Not asserted,Asserted"
|
|
bitfld.long 0x00 15. " OVERRUN7 ,Overrun Status Flag For Result Register For A/D Channel 7" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 14. " OVERRUN6 ,Overrun Status Flag For Result Register For A/D Channel 6" "No overrun,Overrun"
|
|
bitfld.long 0x00 13. " OVERRUN5 ,Overrun Status Flag For Result Register For A/D Channel 5" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 12. " OVERRUN4 ,Overrun Status Flag For Result Register For A/D Channel 4" "No overrun,Overrun"
|
|
bitfld.long 0x00 11. " OVERRUN3 ,Overrun Status Flag For Result Register For A/D Channel 3" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OVERRUN2 ,Overrun Status Flag For Result Register For A/D Channel 2" "No overrun,Overrun"
|
|
bitfld.long 0x00 9. " OVERRUN1 ,Overrun Status Flag For Result Register For A/D Channel 1" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 8. " OVERRUN0 ,Overrun Status Flag For Result Register For A/D Channel 0" "No overrun,Overrun"
|
|
bitfld.long 0x00 7. " DONE7 ,DONE Status Flag For Result Register For A/D Channel 7" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DONE6 ,DONE Status Flag For Result Register For A/D Channel 6" "Not done,Done"
|
|
bitfld.long 0x00 5. " DONE5 ,DONE Status Flag For Result Register For A/D Channel 5" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DONE4 ,DONE Status Flag For Result Register For A/D Channel 4" "Not done,Done"
|
|
bitfld.long 0x00 3. " DONE3 ,DONE Status Flag For Result Register For A/D Channel 3" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DONE2 ,DONE Status Flag For Result Register For A/D Channel 2" "Not done,Done"
|
|
bitfld.long 0x00 1. " DONE1 ,DONE Status Flag For Result Register For A/D Channel 1" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DONE0 ,DONE Status Flag For Result Register For A/D Channel 0" "Not done,Done"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "AD0INTEN,A/D Interrupt Enable Register"
|
|
bitfld.long 0x00 8. " ADGINTEN ,Interrupt Generation Mode" "Individual,Global"
|
|
bitfld.long 0x00 7. " ADINTEN7 ,A/D Channel 7 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ADINTEN6 ,A/D Channel 6 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADINTEN5 ,A/D Channel 5 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADINTEN4 ,A/D Channel 4 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADINTEN3 ,A/D Channel 3 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADINTEN2 ,A/D Channel 2 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADINTEN1 ,A/D Channel 1 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ADINTEN0 ,A/D Channel 0 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x10++0x1f
|
|
line.long 0x0 "ADR0,A/D Channel 0 Data Register"
|
|
bitfld.long 0x0 31. " DONE ,A/D Conversion Completed" "Not completed,Completed"
|
|
bitfld.long 0x0 30. " OVERRUN ,Overrun Occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0x0 6.--15. 1. " RESULT ,Voltage Value"
|
|
line.long 0x4 "ADR1,A/D Channel 1 Data Register"
|
|
bitfld.long 0x4 31. " DONE ,A/D Conversion Completed" "Not completed,Completed"
|
|
bitfld.long 0x4 30. " OVERRUN ,Overrun Occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0x4 6.--15. 1. " RESULT ,Voltage Value"
|
|
line.long 0x8 "ADR2,A/D Channel 2 Data Register"
|
|
bitfld.long 0x8 31. " DONE ,A/D Conversion Completed" "Not completed,Completed"
|
|
bitfld.long 0x8 30. " OVERRUN ,Overrun Occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0x8 6.--15. 1. " RESULT ,Voltage Value"
|
|
line.long 0xC "ADR3,A/D Channel 3 Data Register"
|
|
bitfld.long 0xC 31. " DONE ,A/D Conversion Completed" "Not completed,Completed"
|
|
bitfld.long 0xC 30. " OVERRUN ,Overrun Occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0xC 6.--15. 1. " RESULT ,Voltage Value"
|
|
line.long 0x10 "ADR4,A/D Channel 4 Data Register"
|
|
bitfld.long 0x10 31. " DONE ,A/D Conversion Completed" "Not completed,Completed"
|
|
bitfld.long 0x10 30. " OVERRUN ,Overrun Occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0x10 6.--15. 1. " RESULT ,Voltage Value"
|
|
line.long 0x14 "ADR5,A/D Channel 5 Data Register"
|
|
bitfld.long 0x14 31. " DONE ,A/D Conversion Completed" "Not completed,Completed"
|
|
bitfld.long 0x14 30. " OVERRUN ,Overrun Occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0x14 6.--15. 1. " RESULT ,Voltage Value"
|
|
line.long 0x18 "ADR6,A/D Channel 6 Data Register"
|
|
bitfld.long 0x18 31. " DONE ,A/D Conversion Completed" "Not completed,Completed"
|
|
bitfld.long 0x18 30. " OVERRUN ,Overrun Occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0x18 6.--15. 1. " RESULT ,Voltage Value"
|
|
line.long 0x1C "ADR7,A/D Channel 7 Data Register"
|
|
bitfld.long 0x1C 31. " DONE ,A/D Conversion Completed" "Not completed,Completed"
|
|
bitfld.long 0x1C 30. " OVERRUN ,Overrun Occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0x1C 6.--15. 1. " RESULT ,Voltage Value"
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80002400
|
|
width 9.
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "ADCCON,A/D Control Register"
|
|
bitfld.long 0x00 0. " SELVREF ,SELV Refresh; Always write a 1 to this bit" "0,1"
|
|
bitfld.long 0x00 1. " ADCENAB ,A/D Conversion Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CSCAN ,Conversion Mode" "Single,Continuous"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ADCSTRT ,A/D Conversion Start" "Not started,Started"
|
|
bitfld.long 0x00 4. " ADCBUSY ,ADC Busy" "Not busy,Busy"
|
|
line.long 0x04 "ADCSEL,A/D Select Register"
|
|
bitfld.long 0x04 0.--3. " SEL0 ,Number of ADC_AIN0 Conversion result bits" "No conversion,Reserved,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,?..."
|
|
bitfld.long 0x04 4.--7. " SEL1 ,Number of ADC_AIN1 Conversion result bits" "No conversion,Reserved,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,?..."
|
|
bitfld.long 0x04 8.--11. " SEL2 ,Number of ADC_AIN2 Conversion result bits" "No conversion,Reserved,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " SEL3 ,Number of ADC_AIN3 Conversion result bits" "No conversion,Reserved,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,?..."
|
|
bitfld.long 0x04 16.--19. " SEL4 ,Number of ADC_AIN4 Conversion result bits" "No conversion,Reserved,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,?..."
|
|
bitfld.long 0x04 20.--23. " SEL5 ,Number of ADC_AIN5 Conversion result bits" "No conversion,Reserved,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,?..."
|
|
rgroup.long 0x00++0x17
|
|
line.long 0x0 "ADCR0,A/D Result Register 0"
|
|
hexmask.long.word 0x0 0.--9. 1. " ADCR0 ,Voltage on ADC_VDD0"
|
|
line.long 0x4 "ADCR1,A/D Result Register 1"
|
|
hexmask.long.word 0x4 0.--9. 1. " ADCR1 ,Voltage on ADC_VDD1"
|
|
line.long 0x8 "ADCR2,A/D Result Register 2"
|
|
hexmask.long.word 0x8 0.--9. 1. " ADCR2 ,Voltage on ADC_VDD2"
|
|
line.long 0xC "ADCR3,A/D Result Register 3"
|
|
hexmask.long.word 0xC 0.--9. 1. " ADCR3 ,Voltage on ADC_VDD3"
|
|
line.long 0x10 "ADCR4,A/D Result Register 4"
|
|
hexmask.long.word 0x10 0.--9. 1. " ADCR4 ,Voltage on ADC_VDD4"
|
|
line.long 0x14 "ADCR5,A/D Result Register 5"
|
|
hexmask.long.word 0x14 0.--9. 1. " ADCR5 ,Voltage on ADC_VDD5"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "ADCINTE,A/D Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " INTENAB ,A/D Converter Interrupt Request Enable" "Disabled,Enabled"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "ADCINTS,A/D Interrupt Status Register"
|
|
bitfld.long 0x00 0. " INTSTAT ,A/D Converter Interrupt Status" "No interrupt,Interrupt"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "ADCINTC,A/D Converter Interrupt Clear Register"
|
|
bitfld.long 0x00 0. " INTCLR ,A/D Converter Interrupt Clear" "No effect,Clear"
|
|
base 0x80005028
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCPD,A/D Power Down Register"
|
|
bitfld.long 0x00 0. " ADCPD ,A/D Converter Power Down" "Powered up,Powered down"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2420")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
width 9.
|
|
base sd:0xe0034000
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "AD0CR,A/D Control Register"
|
|
bitfld.long 0x00 27. " EDGE ,Edge Selection" "Rising,Falling"
|
|
bitfld.long 0x00 24.--26. " START ,Conversion Start" "Not started,Immediately,Edge on P2.10/EINT0,Edge on P1.27/CAP0.1,Edge on MAT0.1,Edge on MAT0.3,Edge on MAT1.0,Edge on MAT1.1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PDN ,A/D Converter Mode" "Operational,Power-down"
|
|
bitfld.long 0x00 17.--19. " CLKS ,Number Of Clocks Used For Conversion In Burst Mode" "11 clocks/10 bits,10 clocks/9 bits,9 clocks/8 bits,8 clocks/7 bits,7 clocks/6 bits,6 clocks/5 bits,5 clocks/4 bits,4 clocks/3 bits"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BURST ,Burst mode" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLKDIV ,Clock Divider Value"
|
|
textline " "
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2420"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 7. " SEL7 ,Select Pin AD0.7 To Be Sampled And Converted" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEL6 ,Select Pin AD0.6 To Be Sampled And Converted" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " SEL5 ,Select Pin AD0.5 To Be Sampled And Converted" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SEL4 ,Select Pin AD0.4 To Be Sampled And Converted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SEL3 ,Select Pin AD0.3 To Be Sampled And Converted" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEL2 ,Select Pin AD0.2 To Be Sampled And Converted" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEL1 ,Select Pin AD0.1 To Be Sampled And Converted" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEL0 ,Select Pin AD0.0 To Be Sampled And Converted" "Disabled,Enabled"
|
|
width 9.
|
|
hgroup.long 0x4++0x3
|
|
hide.long 0x0 "AD0GDR,A/D Global Data Register"
|
|
in
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "ADOSTAT,A/D Status Register"
|
|
bitfld.long 0x00 16. " ADINT ,A/D Interrupt Flag" "Not asserted,Asserted"
|
|
textline " "
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 15. " Overrun7 ,Overrun Status Flag For Result Register For A/D Channel 7" "No overrun,Overrun"
|
|
bitfld.long 0x00 14. " Overrun6 ,Overrun Status Flag For Result Register For A/D Channel 6" "No overrun,Overrun"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 13. " Overrun5 ,Overrun Status Flag For Result Register For A/D Channel 5" "No overrun,Overrun"
|
|
bitfld.long 0x00 12. " Overrun4 ,Overrun Status Flag For Result Register For A/D Channel 4" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 11. " Overrun3 ,Overrun Status Flag For Result Register For A/D Channel 3" "No overrun,Overrun"
|
|
bitfld.long 0x00 10. " Overrun2 ,Overrun Status Flag For Result Register For A/D Channel 2" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 9. " Overrun1 ,Overrun Status Flag For Result Register For A/D Channel 1" "No overrun,Overrun"
|
|
bitfld.long 0x00 8. " Overrun0 ,Overrun Status Flag For Result Register For A/D Channel 0" "No overrun,Overrun"
|
|
textline " "
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 7. " Done7 ,DONE Status Flag For Result Register For A/D Channel 7" "Not done,Done"
|
|
bitfld.long 0x00 6. " Done6 ,DONE Status Flag For Result Register For A/D Channel 6" "Not done,Done"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " Done5 ,DONE Status Flag For Result Register For A/D Channel 5" "Not done,Done"
|
|
bitfld.long 0x00 4. " Done4 ,DONE Status Flag For Result Register For A/D Channel 4" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Done3 ,DONE Status Flag For Result Register For A/D Channel 3" "Not done,Done"
|
|
bitfld.long 0x00 2. " Done2 ,DONE Status Flag For Result Register For A/D Channel 2" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Done1 ,DONE Status Flag For Result Register For A/D Channel 1" "Not done,Done"
|
|
bitfld.long 0x00 0. " Done0 ,DONE Status Flag For Result Register For A/D Channel 0" "Not done,Done"
|
|
width 9.
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "ADOINTEN,A/D Interrupt Enable Register"
|
|
bitfld.long 0x00 8. " ADGINTEN ,Interrupt Generation Mode" "Individual,Global"
|
|
textline " "
|
|
sif (cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x00 7. " ADINTEN7 ,A/D Channel 7 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ADINTEN6 ,A/D Channel 6 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " ADINTEN5 ,A/D Channel 5 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ADINTEN4 ,A/D Channel 4 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ADINTEN3 ,A/D Channel 3 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ADINTEN2 ,A/D Channel 2 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADINTEN1 ,A/D Channel 1 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADINTEN0 ,A/D Channel 0 Completion Of Conversion Interrupt Enable" "Disabled,Enabled"
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2365"||cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2387"||cpu()=="LPC2366")
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x0 "ADDR0,A/D Channel 0 Data Register"
|
|
in
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x0 "ADDR1,A/D Channel 1 Data Register"
|
|
in
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x0 "ADDR2,A/D Channel 2 Data Register"
|
|
in
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x0 "ADDR3,A/D Channel 3 Data Register"
|
|
in
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x0 "ADDR4,A/D Channel 4 Data Register"
|
|
in
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x0 "ADDR5,A/D Channel 5 Data Register"
|
|
in
|
|
else
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x0 "ADDR0,A/D Channel 0 Data Register"
|
|
in
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x0 "ADDR1,A/D Channel 1 Data Register"
|
|
in
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x0 "ADDR2,A/D Channel 2 Data Register"
|
|
in
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x0 "ADDR3,A/D Channel 3 Data Register"
|
|
in
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x0 "ADDR4,A/D Channel 4 Data Register"
|
|
in
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x0 "ADDR5,A/D Channel 5 Data Register"
|
|
in
|
|
hgroup.long 0x28++0x3
|
|
hide.long 0x0 "ADDR6,A/D Channel 6 Data Register"
|
|
in
|
|
hgroup.long 0x2C++0x3
|
|
hide.long 0x0 "ADDR7,A/D Channel 7 Data Register"
|
|
in
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; D/A
|
|
; --------------------------------------------------------------------------------
|
|
tree "D/A Converter"
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158"||cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||cpu()=="LPC2131"||cpu()=="LPC2131/01"||cpu()=="LPC2132"||cpu()=="LPC2132/01"||cpu()=="LPC2134"||cpu()=="LPC2134/01"||cpu()=="LPC2136"||cpu()=="LPC2136/01"||cpu()=="LPC2138"||cpu()=="LPC2138/01"||cpu()=="LPC2157"||cpu()=="LPC2420"||cpu()=="LPC2468"||cpu()=="LPC2365"||cpu()=="LPC2367"||cpu()=="LPC2377"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
base 0xE006C000
|
|
width 6.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DACR,D/A Converter Register"
|
|
bitfld.long 0x00 16. " BIAS ,Settling Time of the DAC/Maximum Current" "1us/700uA,2.5us/350uA"
|
|
hexmask.long.word 0x00 6.--15. 1. " VALUE ,Value"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; SPI
|
|
; --------------------------------------------------------------------------------
|
|
tree "SPI Interface"
|
|
sif (cpu()=="LPC2104"||cpu()=="LPC2105"||cpu()=="LPC2106")
|
|
width 0x07
|
|
base 0xE0020000
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SPCR,SPI Control Register"
|
|
bitfld.byte 0x00 3. " CPHA ,SPI Clock Phase" "First edge,Second edge"
|
|
bitfld.byte 0x00 4. " CPOL ,SPI Clock Polarity" "Active low,Active high"
|
|
bitfld.byte 0x00 5. " MSTR ,SPI Master Mode Select" "Slave,Master"
|
|
bitfld.byte 0x00 6. " LSBF ,SPI LSB First" "MSB first,LSB first"
|
|
textline " "
|
|
bitfld.byte 0x00 7. " SPIE ,SPI Serial Peripheral Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "SPSR,SPI Status Register"
|
|
bitfld.byte 0x00 3. " ABRT ,SPI Slave abort" "Not occured,Occured"
|
|
bitfld.byte 0x00 4. " MODF ,SPI Mode fault" "Not occured,Occured"
|
|
bitfld.byte 0x00 5. " ROVR ,SPI Read overrun" "Not occured,Occured"
|
|
bitfld.byte 0x00 6. " WCOL ,SPI Write collision" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 7. " SPIF ,SPI transfer complete flag" "Not complete,Complete"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "SPDR,SPI Data Register"
|
|
bitfld.byte 0x00 0. " Bit0 ,SPI Data Register Bit0" "Low,High"
|
|
bitfld.byte 0x00 1. " Bit1 ,SPI Data Register Bit1" "Low,High"
|
|
bitfld.byte 0x00 2. " Bit2 ,SPI Data Register Bit2" "Low,High"
|
|
bitfld.byte 0x00 3. " Bit3 ,SPI Data Register Bit3" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " Bit4 ,SPI Data Register Bit4" "Low,High"
|
|
bitfld.byte 0x00 5. " Bit5 ,SPI Data Register Bit5" "Low,High"
|
|
bitfld.byte 0x00 6. " Bit6 ,SPI Data Register Bit6" "Low,High"
|
|
bitfld.byte 0x00 7. " Bit7 ,SPI Data Register Bit7" "Low,High"
|
|
group.byte 0xc++0x0
|
|
line.byte 0x0 "SPCCR,SPI Clock Counter Register"
|
|
group.byte 0x1c++0x0
|
|
line.byte 0x0 "SPINT,SPI Interrupt Flag"
|
|
bitfld.byte 0x0 0. " SPII ,SPI Interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2131"||cpu()=="LPC2131/01"||cpu()=="LPC2132"||cpu()=="LPC2132/01"||cpu()=="LPC2134"||cpu()=="LPC2134/01"||cpu()=="LPC2136"||cpu()=="LPC2136/01"||cpu()=="LPC2138"||cpu()=="LPC2138/01"||cpu()=="LPC2157")
|
|
tree "SPI 0"
|
|
base 0xE0020000
|
|
width 0x07
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "S0SPCR,SPI 0 Control Register"
|
|
bitfld.word 0x00 2. " BITEN ,Bit Enable" "8 bits,Selected"
|
|
bitfld.word 0x00 3. " CPHA ,SPI Clock Phase" "First edge,Second edge"
|
|
bitfld.word 0x00 4. " CPOL ,SPI Clock Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MSTR ,SPI Master Mode Select" "Slave,Master"
|
|
bitfld.word 0x00 6. " LSBF ,SPI LSB First" "MSB first,LSB first"
|
|
bitfld.word 0x00 7. " SPIE ,SPI Serial Peripheral Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8.--11. " BITS ,Number of bits per transfer" "16 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits"
|
|
hgroup.byte 0x04++0x0
|
|
hide.byte 0x00 "S0SPSR,SPI 0 Status Register"
|
|
in
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "S0SPDR,SPI 0 Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " Data ,SPI 0 Bi-directional data port"
|
|
group.byte 0x0C++0x0
|
|
line.byte 0x0 "S0SPCCR,SPI 0 Clock Counter Register"
|
|
hexmask.byte 0x0 0.--7. 1. " Counter ,SPI Clock counter setting"
|
|
group.byte 0x1C++0x0
|
|
line.byte 0x00 "S0SPINT,SPI 0 Interrupt Flag"
|
|
eventfld.byte 0x00 7. " SPII ,SPI Interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SPI 1 (SSP)"
|
|
base 0xE0068000
|
|
width 0x09
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SSPCR0,SSP Control Register 0"
|
|
bitfld.word 0x00 0.--3. " DSS ,Data Size" "Reserved,Reserved,Reserved,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 4.--5. " FRF ,Frame Format" "SPI,SSI,Microwire,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6. " CPOL ,SPP Clock Out Polarity" "Bus clock low,Bus clock high"
|
|
bitfld.word 0x00 7. " CPHA ,SPP Clock Out Phase" "First clock transition,Second clock transition"
|
|
textline " "
|
|
hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate"
|
|
if ((data.byte(ad:0xE0068004)&0x4)==0x4)
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSPCR1,SSP Control Register 1"
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop Back"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.byte 0x00 3. " SOD ,Slave Output Disable" "Enabled,Disabled"
|
|
else
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSPCR1,SSP Control Register"
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop Back"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
endif
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SSPDR,SPP Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " DATA ,Data Tx FIFO/Rx FIFO"
|
|
rgroup.byte 0x0C++0x0
|
|
line.byte 0x00 "SSPSR,SSP Data Status Register"
|
|
bitfld.byte 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty, Empty"
|
|
bitfld.byte 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.byte 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BSY ,Busy" "Idle,Busy"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "SSPCPSR,SSP Clock Prescale Register"
|
|
hexmask.byte 0x00 0.--7. 1. " CPSDVSR ,Divider's Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "SSPIMSC,SSP Interrupt Mask Set/Clear Register"
|
|
bitfld.byte 0x00 0. " RORIM ,Receive Overrun" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTIM ,Receive Timeout" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RXIM ,Enable Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TXIM ,Enable Interrupt" "Disabled,Enabled"
|
|
rgroup.byte 0x18++0x0
|
|
line.byte 0x00 "SSPRIS,SSP Raw Interrupt Status Register"
|
|
bitfld.byte 0x00 0. " RORRIS ,Frame received" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " RTRIS ,Receive Timeout" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RXRIS ,Enable Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " TXRIS ,Enable Interrupt" "No interrupt,Interrupt"
|
|
rgroup.byte 0x1C++0x0
|
|
line.byte 0x00 "SSPMIS,SSP Masked Interrupt Register"
|
|
bitfld.byte 0x00 0. " RORMIS ,Frame received" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " RTMIS ,Receive Timeout" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RXMIS ,Enable Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " TXMIS ,Enable Interrupt" "No interrupt,Interrupt"
|
|
wgroup.byte 0x20++0x0
|
|
line.byte 0x00 "SSPICR,SSP Interrupt Clear Register"
|
|
bitfld.byte 0x00 0. " RORIC ,Clear Frame Received Interrupt" "Not effect,Clear"
|
|
bitfld.byte 0x00 1. " RTIC ,Clear Receive Timeout Interrupt" "Not effect,Clear"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
tree "SPI0"
|
|
width 0x09
|
|
base 0xE0020000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "S0SPCR,SPI Control Register"
|
|
bitfld.word 0x00 2. " BITEN ,Number of Bits Per Transfer" "8 bit,Value in BITS"
|
|
bitfld.word 0x00 3. " CPHA ,SPI Clock Phase" "First edge,Second edge"
|
|
bitfld.word 0x00 4. " CPOL ,SPI Clock Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MSTR ,SPI Master Mode Select" "Slave,Master"
|
|
bitfld.word 0x00 6. " LSBF ,SPI LSB First" "MSB first,LSB first"
|
|
bitfld.word 0x00 7. " SPIE ,SPI Serial Peripheral Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8.--11. " BITS ,Number of Bits Per Transfer" "16,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "S0SPSR,SPI Status Register"
|
|
bitfld.byte 0x00 3. " ABRT ,SPI Slave Abort" "Not occured,Occured"
|
|
bitfld.byte 0x00 4. " MODF ,SPI Mode Fault" "Not occured,Occured"
|
|
bitfld.byte 0x00 5. " ROVR ,SPI Read Overrun" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " WCOL ,SPI Write Collision" "Not occured,Occured"
|
|
bitfld.byte 0x00 7. " SPIF ,SPI Transfer Complete Flag" "Not complete,Complete"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "S0SPDR,SPI Data Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATAL ,SPI Bi-directional Data Port (Data Low)"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATAH ,SPI Bi-directional Data Port (Data High)"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "S0SPCCR,SPI Clock Counter Register"
|
|
group.byte 0x1C++0x0
|
|
line.byte 0x0 "S0SPINT,SPI Interrupt Flag"
|
|
eventfld.byte 0x0 0. " SPIIF ,SPI Interrupt Flag" "No generate,Generate"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SPP (SPI1)"
|
|
width 0x09
|
|
base ad:0xE0068000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SSPCR0,SSP Control Register 0"
|
|
bitfld.word 0x00 0.--3. " DSS ,Data Size" "Reserved,Reserved,Reserved,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 4.--5. " FRF ,Frame Format" "SPI,SSI,Microwire,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6. " CPOL ,SPP Clock Out Polarity" "Bus clock low,Bus clock high"
|
|
bitfld.word 0x00 7. " CPHA ,SPP Clock Out Phase" "First clock transition,Second clock transition"
|
|
textline " "
|
|
hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate"
|
|
if ((data.byte(ad:0xE0068004)&0x4)==0x4)
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSPCR1,SSP Control Register 1"
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop Back"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.byte 0x00 3. " SOD ,Slave Output Disable" "Enabled,Disabled"
|
|
else
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSPCR1,SSP Control Register"
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop Back"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.byte 0x00 3. " SOD ,Slave Output Disable" "Reserved,?..."
|
|
endif
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SSPDR,SPP Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " DATA ,Data Tx FIFO/Rx FIFO"
|
|
rgroup.byte 0x0C++0x0
|
|
line.byte 0x00 "SSPSR,SSP Data Status Register"
|
|
bitfld.byte 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty, Empty"
|
|
bitfld.byte 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.byte 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BSY ,Busy" "Idle,Busy"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "SSPCPSR,SSP Clock Prescale Register"
|
|
hexmask.byte 0x00 0.--7. 1. " CPSDVSR ,Divider's Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "SSPIMSC,SSP Interrupt Mask Set/Clear Register"
|
|
bitfld.byte 0x00 0. " RORIM ,Receive Overrun" "Not occured,Occured"
|
|
bitfld.byte 0x00 1. " RTIM ,Receive Timeout" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RXIM ,Enable Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TXIM ,Enable Interrupt" "Disabled,Enabled"
|
|
rgroup.byte 0x18++0x0
|
|
line.byte 0x00 "SSPRIS,SSP Raw Interrupt Status Register"
|
|
bitfld.byte 0x00 0. " RORRIS ,Frame received" "Not received,Received"
|
|
bitfld.byte 0x00 1. " RTRIS ,Receive Timeout" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RXRIS ,Enable Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TXRIS ,Enable Interrupt" "Disabled,Enabled"
|
|
rgroup.byte 0x1C++0x0
|
|
line.byte 0x00 "SSPMIS,SSP Masked Interrupt Register"
|
|
bitfld.byte 0x00 0. " RORMIS ,Frame received" "Not received,Received"
|
|
bitfld.byte 0x00 1. " RTMIS ,Receive Timeout" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RXMIS ,Enable Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TXMIS ,Enable Interrupt" "Disabled,Enabled"
|
|
wgroup.byte 0x20++0x0
|
|
line.byte 0x00 "SSPICR,SSP Interrupt Clear Register"
|
|
bitfld.byte 0x00 0. " RORIC ,Clear Frame Received Interrupt" "Not effect,Clear"
|
|
bitfld.byte 0x00 1. " RTIC ,Clear Receive Timeout Interrupt" "Not effect,Clear"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2101"||cpu()=="LPC2102"||cpu()=="LPC2103")
|
|
tree "SPI0"
|
|
width 9.
|
|
base sd:0xe0020000
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "S0SPCR,SPI Control Register"
|
|
bitfld.word 0x00 8.--11. " BITS ,Number Of Bits Per Transfer" "16 bits/transfer,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits/transfer,9 bits/transfer,10 bits/transfer,11 bits/transfer,12 bits/transfer,13 bits/transfer,14 bits/transfer,15 bits/transfer"
|
|
bitfld.word 0x00 7. " SPIE ,Serial Peripheral Interrupt Enable" "Inhibited,Enabled"
|
|
bitfld.word 0x00 6. " LSBF ,LSB First" "MSB first,LSB first"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MSTR ,Master Mode Select" "Slave,Master"
|
|
bitfld.word 0x00 4. " CPOL ,Clock Polarity Control" "HIGH,LOW"
|
|
bitfld.word 0x00 3. " CPHA ,Clock Phase Control" "First clock,Second clock"
|
|
textline " "
|
|
bitfld.word 0x00 2. " BitEnable ,Enable" "Disabled,Enabled"
|
|
hgroup.byte 0x04++0x0
|
|
hide.byte 0x00 "S0SPSR,SPI Status Register"
|
|
in
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "S0SPDR,SPI Data Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DataHigh ,Data"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DataLow ,Data"
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "S0SPCCR,SPI Clock Counter Register"
|
|
hexmask.byte 0x00 0.--7. 1. " Counter ,SPI0 Clock Counter Setting"
|
|
group.byte 0x1c++0x0
|
|
line.byte 0x00 "S0SPINT,SPI Interrupt Register"
|
|
eventfld.byte 0x00 0. " SPIINTF ,SPI Interrupt Flag" "No interrupt,Interrupt"
|
|
width 0xb
|
|
tree.end
|
|
tree "SSP (SPI1)"
|
|
width 9.
|
|
base sd:0xe0068000
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "SSPCR0,SSP Control Register 0"
|
|
bitfld.word 0x00 7. " CPHA ,Clock Out Phase" "First clock,Second clock"
|
|
bitfld.word 0x00 6. " CPOL ,Clock Out Polarity" "Low,High"
|
|
bitfld.word 0x00 4.--5. " FRF ,Frame Format" "SPI,SSI,Microwire,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSPCR1,SSP Control Register 1"
|
|
bitfld.byte 0x00 3. " SOD ,Slave Output Disable" "Enabled,Disabled"
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SSPDR,SSP Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " DATA ,Data"
|
|
rgroup.byte 0x0c++0x0
|
|
line.byte 0x00 "SSPSR,SSP Status Register"
|
|
bitfld.byte 0x00 4. " BSY ,Busy" "Idle,Busy"
|
|
bitfld.byte 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.byte 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not Full"
|
|
bitfld.byte 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "SSPCPSR,SSP Clock Prescale Register"
|
|
hexmask.byte 0x00 0.--7. 1. " CPSDVSR ,Prescaler Value"
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "SSPIMSC,SSP Interrupt Mask Set/Clear Register"
|
|
bitfld.byte 0x00 3. " TXIM ,Tx FIFO Half Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " RXIM ,Rx FIFO Half Full Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " RTIM ,Receive Timeout Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORIM ,Receive Overrun Interrupt" "No interrupt,Interrupt"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x00 "SSPRIS,SSP Raw Interrupt Status Register"
|
|
bitfld.byte 0x00 3. " TXRIS ,Tx FIFO Half Empty" "Not half empty,Half empty"
|
|
bitfld.byte 0x00 2. " RXRIS ,Rx FIFO Half Full" "Not half full,Half full"
|
|
bitfld.byte 0x00 1. " RTRIS ,Receive Timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORRIS ,Frame Received When RxFIFO Full" "Not received,Received"
|
|
rgroup.byte 0x1c++0x0
|
|
line.byte 0x00 "SSPMIS,SSP Masked Interrupt Status Register"
|
|
bitfld.byte 0x00 3. " TXMIS ,Tx FIFO Half Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RXMIS ,Rx FIFO Half Full Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTMIS ,Receive Timeout Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORMIS ,Frame Received When RxFIFO Full Interrupt" "Disabled,Enabled"
|
|
wgroup.byte 0x20++0x0
|
|
line.byte 0x00 "SSPICR,SSP Interrupt Clear Register"
|
|
bitfld.byte 0x00 1. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 0. " RORIC ,Frame Received When RxFIFO Full Interrupt Clear" "No effect,Cleared"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
base 0xE0020000
|
|
width 0x07
|
|
group.long 0x00++0x03 "SPI 0"
|
|
line.long 0x00 "S0SPCR,SPI 0 Control Register"
|
|
bitfld.long 0x00 2. " BITEN ,Bit Enable" "8 bits,Selected"
|
|
bitfld.long 0x00 3. " CPHA ,SPI Clock Phase" "First edge,Second edge"
|
|
bitfld.long 0x00 4. " CPOL ,SPI Clock Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSTR ,SPI Master Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 6. " LSBF ,SPI LSB First" "MSB first,LSB first"
|
|
bitfld.long 0x00 7. " SPIE ,SPI Serial Peripheral Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BITS ,Number of bits per transfer" "16 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "S0SPSR,SPI 0 Status Register"
|
|
bitfld.long 0x00 3. " ABRT ,SPI Slave abort" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MODF ,SPI Mode fault" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " ROVR ,SPI Read overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WCOL ,SPI Write collision" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " SPIF ,SPI transfer complete flag" "Not complete,Complete"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "S0SPDR,SPI 0 Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " Data ,SPI 0 Bi-directional data port"
|
|
line.long 0x04 "S0SPCCR,SPI 0 Clock Counter Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Counter ,SPI Clock counter setting"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "S0SPINT,SPI 0 Interrupt Flag"
|
|
eventfld.long 0x00 7. " SPII ,SPI Interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
base 0xE0030000
|
|
width 0x07
|
|
group.long 0x00++0x03 "SPI 1"
|
|
line.long 0x00 "S1SPCR,SPI 1 Control Register"
|
|
bitfld.long 0x00 2. " BITEN ,Bit Enable" "8 bits,Selected"
|
|
bitfld.long 0x00 3. " CPHA ,SPI Clock Phase" "First edge,Second edge"
|
|
bitfld.long 0x00 4. " CPOL ,SPI Clock Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSTR ,SPI Master Mode Select" "Slave,Master"
|
|
bitfld.long 0x00 6. " LSBF ,SPI LSB First" "MSB first,LSB first"
|
|
bitfld.long 0x00 7. " SPIE ,SPI Serial Peripheral Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BITS ,Number of bits per transfer" "16 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "S1SPSR,SPI 1 Status Register"
|
|
bitfld.long 0x00 3. " ABRT ,SPI Slave abort" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MODF ,SPI Mode fault" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " ROVR ,SPI Read overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WCOL ,SPI Write collision" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " SPIF ,SPI transfer complete flag" "Not complete,Complete"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "S1SPDR,SPI 1 Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " Data ,SPI 1 Bi-directional data port"
|
|
line.long 0x04 "S1SPCCR,SPI 1 Clock Counter Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Counter ,SPI Clock counter setting"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "S1SPINT,SPI 1 Interrupt Flag"
|
|
eventfld.long 0x00 7. " SPII ,SPI Interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2420")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
tree "SPI0"
|
|
width 9.
|
|
base sd:0xe0020000
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "S0SPCR,SPI Control Register"
|
|
bitfld.word 0x00 8.--11. " BITS ,Number Of Bits Per Transfer" "16 bits/transfer,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits/transfer,9 bits/transfer,10 bits/transfer,11 bits/transfer,12 bits/transfer,13 bits/transfer,14 bits/transfer,15 bits/transfer"
|
|
bitfld.word 0x00 7. " SPIE ,Serial Peripheral Interrupt Enable" "Inhibited,Enabled"
|
|
bitfld.word 0x00 6. " LSBF ,LSB First" "MSB first,LSB first"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MSTR ,Master Mode Select" "Slave,Master"
|
|
bitfld.word 0x00 4. " CPOL ,Clock Polarity Control" "HIGH,LOW"
|
|
bitfld.word 0x00 3. " CPHA ,Clock Phase Control" "First clock,Second clock"
|
|
textline " "
|
|
bitfld.word 0x00 2. " BitEnable ,Bit Enable" "8 bits,S0SPCR[BITS]"
|
|
hgroup.byte 0x04++0x0
|
|
hide.byte 0x00 "S0SPSR,SPI Status Register"
|
|
in
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "S0SPDR,SPI Data Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DataHigh ,Data"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DataLow ,Data"
|
|
group.byte 0x0c++0x0
|
|
line.byte 0x00 "S0SPCCR,SPI Clock Counter Register"
|
|
hgroup.byte 0x10++0x0
|
|
hide.byte 0x0 "SPTCR,SPI Test Control Register"
|
|
in
|
|
group.byte 0x14++0x0
|
|
line.byte 0x0 "SPTSR,SPI Test Status Register"
|
|
bitfld.byte 0x00 7. " SPIF ,SPI transfer complete flag" "Not completed,Completed"
|
|
bitfld.byte 0x00 6. " WCOL ,Write collision" "No collision,Collision"
|
|
bitfld.byte 0x00 5. " ROVR ,Read overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MODF ,Mode fault" "No error,Error"
|
|
bitfld.byte 0x00 3. " ABRT ,Slave abort" "Not aborted,Aborted"
|
|
group.byte 0x1c++0x0
|
|
line.byte 0x00 "S0SPINT,SPI Interrupt Register"
|
|
eventfld.byte 0x00 0. " SPIINTF ,SPI Interrupt Flag" "No interrupt,Interrupt"
|
|
width 0xb
|
|
tree.end
|
|
tree "SSP0 (SPI)"
|
|
base sd:0xE0068000
|
|
width 11.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "SSP0CR0,SSP0 Control Register 0"
|
|
hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.word 0x00 7. " CPHA ,Clock Out Phase" "First clock,Second clock"
|
|
bitfld.word 0x00 6. " CPOL ,Clock Out Polarity" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " FRF ,Frame Format" "SPI,TI,Microwire,?..."
|
|
bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit"
|
|
if ((d.b(sd:0xE0068000+0x04)&0x4)==0x4)
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSP0CR1,SSP0 Control Register 1"
|
|
bitfld.byte 0x00 3. " SOD ,Slave Output Disable" "Enabled,Disabled"
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback"
|
|
else
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSP0CR1,SSP0 Control Register 1"
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback"
|
|
endif
|
|
hgroup.word 0x08++0x1
|
|
hide.word 0x00 "SSP0DR,SSP0 Data Register"
|
|
in
|
|
rgroup.byte 0x0c++0x0
|
|
line.byte 0x00 "SSP0SR,SSP0 Status Register"
|
|
bitfld.byte 0x00 4. " BSY ,Busy" "Idle,Busy"
|
|
bitfld.byte 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.byte 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not Full"
|
|
bitfld.byte 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "SSP0CPSR,SSP0 Clock Prescale Register"
|
|
width 11.
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "SSP0IMSC,SSP0 Interrupt Mask Set/Clear Register"
|
|
bitfld.byte 0x00 3. " TXIM ,Tx FIFO Half Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RXIM ,Rx FIFO Half Full Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTIM ,Receive Timeout Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORIM ,Receive Overrun Interrupt" "Disabled,Enabled"
|
|
rgroup.byte 0x18++0x0
|
|
line.byte 0x00 "SSP0RIS,SSP0 Raw Interrupt Status Register"
|
|
bitfld.byte 0x00 3. " TXRIS ,Tx FIFO Half Empty" "Not half empty,Half empty"
|
|
bitfld.byte 0x00 2. " RXRIS ,Rx FIFO Half Full" "Not half full,Half full"
|
|
bitfld.byte 0x00 1. " RTRIS ,Receive Timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORRIS ,Frame Received When RxFIFO Full" "Not received,Received"
|
|
rgroup.byte 0x1c++0x0
|
|
line.byte 0x00 "SSP0MIS,SSP0 Masked Interrupt Status Register"
|
|
bitfld.byte 0x00 3. " TXMIS ,Tx FIFO Half Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " RXMIS ,Rx FIFO Half Full Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " RTMIS ,Receive Timeout Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORMIS ,Frame Received When RxFIFO Full Interrupt" "No interrupt,Interrupt"
|
|
group.byte 0x20++0x1
|
|
line.byte 0x0 "SSP0ICR,SSP0 Interrupt Clear Register"
|
|
bitfld.byte 0x0 1. " RTIC ,Receive Timeout Clear" "No effect,Clear"
|
|
bitfld.byte 0x0 0. " RORIC ,Clear Frame Received When RxFIFO Full" "No effect,Clear"
|
|
group.word 0x24++0x1
|
|
line.word 0x0 "SSP0DMACR,SSP0 DMA Control Register"
|
|
bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "SSP1 (SPI)"
|
|
base sd:0xE0030000
|
|
width 11.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "SSP1CR0,SSP1 Control Register 0"
|
|
hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.word 0x00 7. " CPHA ,Clock Out Phase" "First clock,Second clock"
|
|
bitfld.word 0x00 6. " CPOL ,Clock Out Polarity" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " FRF ,Frame Format" "SPI,TI,Microwire,?..."
|
|
bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit"
|
|
if ((d.b(sd:0xE0030000+0x04)&0x4)==0x4)
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSP1CR1,SSP1 Control Register 1"
|
|
bitfld.byte 0x00 3. " SOD ,Slave Output Disable" "Enabled,Disabled"
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback"
|
|
else
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSP1CR1,SSP1 Control Register 1"
|
|
bitfld.byte 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.byte 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " LBM ,Loop Back Mode" "Normal,Loopback"
|
|
endif
|
|
hgroup.word 0x08++0x1
|
|
hide.word 0x00 "SSP1DR,SSP1 Data Register"
|
|
in
|
|
rgroup.byte 0x0c++0x0
|
|
line.byte 0x00 "SSP1SR,SSP1 Status Register"
|
|
bitfld.byte 0x00 4. " BSY ,Busy" "Idle,Busy"
|
|
bitfld.byte 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.byte 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not Full"
|
|
bitfld.byte 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "SSP1CPSR,SSP1 Clock Prescale Register"
|
|
width 11.
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "SSP1IMSC,SSP1 Interrupt Mask Set/Clear Register"
|
|
bitfld.byte 0x00 3. " TXIM ,Tx FIFO Half Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RXIM ,Rx FIFO Half Full Interrupt" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTIM ,Receive Timeout Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORIM ,Receive Overrun Interrupt" "Disabled,Enabled"
|
|
rgroup.byte 0x18++0x0
|
|
line.byte 0x00 "SSP1RIS,SSP1 Raw Interrupt Status Register"
|
|
bitfld.byte 0x00 3. " TXRIS ,Tx FIFO Half Empty" "Not half empty,Half empty"
|
|
bitfld.byte 0x00 2. " RXRIS ,Rx FIFO Half Full" "Not half full,Half full"
|
|
bitfld.byte 0x00 1. " RTRIS ,Receive Timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORRIS ,Frame Received When RxFIFO Full" "Not received,Received"
|
|
rgroup.byte 0x1c++0x0
|
|
line.byte 0x00 "SSP1MIS,SSP1 Masked Interrupt Status Register"
|
|
bitfld.byte 0x00 3. " TXMIS ,Tx FIFO Half Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " RXMIS ,Rx FIFO Half Full Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " RTMIS ,Receive Timeout Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RORMIS ,Frame Received When RxFIFO Full Interrupt" "No interrupt,Interrupt"
|
|
group.byte 0x20++0x1
|
|
line.byte 0x0 "SSP1ICR,SSP1 Interrupt Clear Register"
|
|
bitfld.byte 0x0 1. " RTIC ,Receive Timeout Clear" "No effect,Clear"
|
|
bitfld.byte 0x0 0. " RORIC ,Clear Frame Received When RxFIFO Full" "No effect,Clear"
|
|
group.word 0x24++0x1
|
|
line.word 0x0 "SSP1DMACR,SSP1 DMA Control Register"
|
|
bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2114"||cpu()=="LPC2124"||cpu()=="LPC2212"||cpu()=="LPC2214"||cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2194"||cpu()=="LPC2292"||cpu()=="LPC2294")
|
|
tree "SPI0"
|
|
base 0xE0020000
|
|
width 0x7
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "S0SPCR,SPI 0 Control Register"
|
|
bitfld.byte 0x00 3. " CPHA ,SPI Clock Phase" "First edge,Second edge"
|
|
bitfld.byte 0x00 4. " CPOL ,SPI Clock Polarity" "Active high,Active low"
|
|
bitfld.byte 0x00 5. " MSTR ,SPI Master Mode Select" "Slave,Master"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " LSBF ,SPI LSB First" "MSB first,LSB first"
|
|
bitfld.byte 0x00 7. " SPIE ,SPI Serial Peripheral Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "S0SPSR,SPI 0 Status Register"
|
|
bitfld.byte 0x00 3. " ABRT ,SPI Slave abort" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " MODF ,SPI Mode fault" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " ROVR ,SPI Read overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " WCOL ,SPI Write collision" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 7. " SPIF ,SPI transfer complete flag" "Not complete,Complete"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "S0SPDR,SPI 0 Data Register"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "S0SPCCR,SPI 0 Clock Counter Register"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "S0SPINT,SPI 0 Interrupt Flag"
|
|
eventfld.byte 0x00 0. " SPII ,SPI Interrupt" "No interrupt,Interrupt"
|
|
width 0xb
|
|
tree.end
|
|
tree "SPI1"
|
|
base 0xE0030000
|
|
width 0x7
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "S1SPCR,SPI 1 Control Register"
|
|
bitfld.byte 0x00 3. " CPHA ,SPI Clock Phase" "First edge,Second edge"
|
|
bitfld.byte 0x00 4. " CPOL ,SPI Clock Polarity" "Active high,Active low"
|
|
bitfld.byte 0x00 5. " MSTR ,SPI Master Mode Select" "Slave,Master"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " LSBF ,SPI LSB First" "MSB first,LSB first"
|
|
bitfld.byte 0x00 7. " SPIE ,SPI Serial Peripheral Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "S1SPSR,SPI 1 Status Register"
|
|
bitfld.byte 0x00 3. " ABRT ,SPI Slave abort" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " MODF ,SPI Mode fault" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " ROVR ,SPI Read overrun" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 6. " WCOL ,SPI Write collision" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 7. " SPIF ,SPI transfer complete flag" "Not complete,Complete"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "S1SPDR,SPI 1 Data Register"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "S1SPCCR,SPI 1 Clock Counter Register"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "S1SPINT,SPI 1 Interrupt Flag"
|
|
eventfld.byte 0x00 0. " SPII ,SPI Interrupt" "No interrupt,Interrupt"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; SSP
|
|
; --------------------------------------------------------------------------------
|
|
tree "SSP Controller"
|
|
sif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
base 0xE005C000
|
|
width 0x09
|
|
if ((data.byte(ad:0xE005C000)&0x30)==0x0)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SSPCR0,SSP Control Register 0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate"
|
|
bitfld.long 0x00 7. " CPHA ,SSP Clock Out Phase" "First clock transition,Second clock transition"
|
|
bitfld.long 0x00 6. " CPOL ,SSP Clock Out Polarity" "Bus clock low,Bus clock high"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "SPI,SSI,Microwire,?..."
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size" "Reserved,Reserved,Reserved,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SSPCR0,SSP Control Register 0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format" "SPI,SSI,Microwire,?..."
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size" "Reserved,Reserved,Reserved,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
endif
|
|
if ((data.byte(ad:0xE005C004)&0x4)==0x4)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSPCR1,SSP Control Register 1"
|
|
bitfld.long 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.long 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop Back"
|
|
bitfld.long 0x00 3. " SOD ,Slave Output Disable" "Enabled,Disabled"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSPCR1,SSP Control Register 1"
|
|
bitfld.long 0x00 2. " MS ,Master/Slave Mode" "Master,Slave"
|
|
bitfld.long 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop Back"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SSPDR,SSP Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DATA ,Data Tx FIFO/Rx FIFO"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "SSPSR,SSP Data Status Register"
|
|
bitfld.long 0x00 4. " BSY ,Busy" "Idle,Busy"
|
|
bitfld.long 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full"
|
|
bitfld.long 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty, Empty"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "SSPCPSR,SSP Clock Prescale Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,Divider's Value"
|
|
line.long 0x04 "SSPIMSC,SSP Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x04 3. " TXIM ,Enable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RXIM ,Enable Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RTIM ,Receive Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " RORIM ,Receive Overrun" "Not occurred,Occurred"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "SSPRIS,SSP Raw Interrupt Status Register"
|
|
bitfld.long 0x00 3. " TXRIS ,Enable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXRIS ,Enable Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTRIS ,Receive Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " RORRIS ,Frame received" "Not received,Received"
|
|
line.long 0x04 "SSPMIS,SSP Masked Interrupt Register"
|
|
bitfld.long 0x04 3. " TXMIS ,Enable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RXMIS ,Enable Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RTMIS ,Receive Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " RORMIS ,Frame received" "Not received,Received"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "SSPICR,SSP Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " RTIC ,Clear Receive Timeout Interrupt" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " RORIC ,Clear Frame Received Interrupt" "No effect,Cleared"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; EMC
|
|
; --------------------------------------------------------------------------------
|
|
tree "EMC (External Memory Controller)"
|
|
sif (cpu()=="LPC2294"||cpu()=="LPC2290"||cpu()=="LPC2292")
|
|
width 0x07
|
|
base 0xFFE00000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BCFG0,Configuration register for memory bank 0"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of write/subsequent accesses" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
if (((data.long(ad:0xFFE00004))&0x08000000)==0x00000000)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BCFG1,Configuration register for memory bank 1"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--15. 1. " WST2 ,Length of write accesses"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BCFG1,Configuration register for memory bank 1"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of subsequent accesses" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
endif
|
|
if (((data.long(ad:0xFFE00008))&0x08000000)==0x00000000)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "BCFG2,Configuration register for memory bank 2"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--15. 1. " WST2 ,Length of write accesses"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "BCFG2,Configuration register for memory bank 2"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of subsequent accesses" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
endif
|
|
if (((data.long(ad:0xFFE0000C))&0x08000000)==0x00000000)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BCFG3,Configuration register for memory bank 3"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--15. 1. " WST2 ,Length of write accesses"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BCFG3,Configuration register for memory bank 3"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of subsequent accesses" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2212"||cpu()=="LPC2214")
|
|
width 0x07
|
|
group.long sd:0xFFE00000++0x03
|
|
line.long 0x00 "BCFG0,Configuration register for memory bank 0"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of write/subsequent accesses" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
if (((data.long(ad:0xFFE00004))&0x08000000)==0x00000000)
|
|
group.long sd:0xFFE00004++0x03
|
|
line.long 0x00 "BCFG1,Configuration register for memory bank 1"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--15. 1. " WST2 ,Length of write accesses"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
else
|
|
group.long sd:0xFFE00004++0x03
|
|
line.long 0x00 "BCFG1,Configuration register for memory bank 1"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of subsequent accesses" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
endif
|
|
if (((data.long(ad:0xFFE00008))&0x08000000)==0x00000000)
|
|
group.long sd:0xFFE00008++0x03
|
|
line.long 0x00 "BCFG2,Configuration register for memory bank 2"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--15. 1. " WST2 ,Length of write accesses"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
else
|
|
group.long sd:0xFFE00008++0x03
|
|
line.long 0x00 "BCFG2,Configuration register for memory bank 2"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of subsequent accesses" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
endif
|
|
if (((data.long(ad:0xFFE0000C))&0x08000000)==0x00000000)
|
|
group.long sd:0xFFE0000C++0x03
|
|
line.long 0x00 "BCFG3,Configuration register for memory bank 3"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--15. 1. " WST2 ,Length of write accesses"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
else
|
|
group.long sd:0xFFE0000C++0x03
|
|
line.long 0x00 "BCFG3,Configuration register for memory bank 3"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of subsequent accesses" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
eventfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2210"||cpu()=="LPC2220")
|
|
base 0xFFE00000
|
|
width 0x07
|
|
group.long 0x00++0x0f
|
|
line.long 0x00 "BCFG0,Configuration register for memory bank 0"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x00 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
bitfld.long 0x00 11.--15. " WST2 ,Length of subsequent/write accesses (in clock cycles)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x00 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
bitfld.long 0x00 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
bitfld.long 0x00 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x00 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
bitfld.long 0x00 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
line.long 0x04 "BCFG1,Configuration register for memory bank 1"
|
|
bitfld.long 0x04 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x04 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x04 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
bitfld.long 0x04 11.--15. " WST2 ,Length of subsequent/write accesses (in clock cycles)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x04 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
bitfld.long 0x04 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
bitfld.long 0x04 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x04 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
textline " "
|
|
bitfld.long 0x04 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
bitfld.long 0x04 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
line.long 0x08 "BCFG2,Configuration register for memory bank 2"
|
|
bitfld.long 0x08 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x08 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
bitfld.long 0x08 11.--15. " WST2 ,Length of subsequent/write accesses (in clock cycles)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x08 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
bitfld.long 0x08 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
bitfld.long 0x08 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x08 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
textline " "
|
|
bitfld.long 0x08 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
bitfld.long 0x08 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
line.long 0x0C "BCFG3,Configuration register for memory bank 3"
|
|
bitfld.long 0x0C 0.--3. " IDCY ,Number of idle CCLK cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0C 5.--9. " WST1 ,Length of read accesses" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34"
|
|
bitfld.long 0x0C 10. " RBLE ,BLS3:0 lines state from EMC" "Drove low,Drove high"
|
|
bitfld.long 0x0C 11.--15. " WST2 ,Length of subsequent/write accesses (in clock cycles)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " BUSERR ,AMBA request for more than 32 bits of data" "No error,Error"
|
|
bitfld.long 0x0C 25. " WPERR ,Write Protecion Bank Error" "No Error,Error"
|
|
bitfld.long 0x0C 26. " WP ,Bank Write Protection" "Not protected,Protected"
|
|
bitfld.long 0x0C 27. " BM ,Sort of bank" "SRAM,Burst ROM"
|
|
textline " "
|
|
bitfld.long 0x0C 28.--29. " MW ,Width of data bus" "8 bit,16 bit,32 bit,?..."
|
|
bitfld.long 0x0C 30.--31. " AT ,Always write 00 to this field" "00,01,10,11"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80008000
|
|
width 23.
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "EMCControl,EMC Control Register"
|
|
bitfld.long 0x00 0. " MPMCEn ,EMC enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " AdMirr ,Address Mirror" "Independent,Mirror"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LPM ,Low Power Mode" "Disabled,Enabled"
|
|
rgroup.long 0x004++0x03
|
|
line.long 0x00 "EMCStatus,EMC Status Register"
|
|
bitfld.long 0x00 0. " Busy ,EMC busy" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " WrBS ,Write Buffer Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRAck ,Self-Refresh mode" "Disabled,Enabled"
|
|
group.long 0x008++0x03
|
|
line.long 0x00 "EMCConfig,EMC Configuration Register"
|
|
bitfld.long 0x00 0. " BEM ,Big-endian mode" "Not selected,Selected"
|
|
bitfld.long 0x00 8. " CLKOUTdiv2 ,CLKOUT divide by 2" "Divided,Prohibited"
|
|
group.long 0x020++0x0B
|
|
line.long 0x00 "EMCDynamicControl,Dynamic Control Register"
|
|
bitfld.long 0x00 0. " FCKE ,Force CKE" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " FCLKOUT ,Force CLKOUT" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRReq ,Self-refresh Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " MMC ,CLKOUT signal" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " SDRAMIn ,SDRAM initialization code command" "NORMAL,MODE,PALL,NOP"
|
|
bitfld.long 0x00 13. " DP ,SDRAM deep power down mode" "Not entered,Entered"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " RPOUTC ,RPOUT Signal Control" "0 V,0 V,3 V,?..."
|
|
line.long 0x04 "EMCDynamicRefresh,Dynamic Memory Refresh Timer Register"
|
|
hexmask.long.word 0x04 0.--10. 1. " REFRESH ,Refresh period"
|
|
line.long 0x08 "EMCDynamicReadConfig,Dynamic Memory Read Configuration Register"
|
|
bitfld.long 0x08 0.--1. " RDS ,Read data delay strategy" "Clock out,Command,Command + 1clk,Command + 2clk"
|
|
group.long 0x030++0x2B
|
|
line.long 0x00 "EMCDynamictRP,Dynamic Memory Percentage Command Period Register"
|
|
bitfld.long 0x00 0.--3. " PCP ,Precharge Command Period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x04 "EMCDynamictRAS,Dynamic Memory Active to Precharge Command Period Register"
|
|
bitfld.long 0x04 0.--3. " AtPCP ,Active-to-Precharge Command Period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x08 "EMCDynamictSREX,Dynamic Memory Self-refresh Exit Time Register"
|
|
bitfld.long 0x08 0.--3. " SRET ,Self-refresh exit time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x0C "EMCDynamictAPR,Memory Last Data Out to Active Time Register"
|
|
bitfld.long 0x0C 0.--3. " LDOtACT ,Last-data-out to active command time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x10 "EMCDynamictDAL,Dynamic Memory Data-in to Active Command Time Register"
|
|
bitfld.long 0x10 0.--3. " DItAC ,Data-in to active command time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x14 "EMCDynamictWR,Dynamic Memory Write recover Time Register"
|
|
bitfld.long 0x14 0.--3. " WRT ,Write recovery time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x18 "EMCDynamictRC,Dynamic Memory Active to Active Command Period Register"
|
|
bitfld.long 0x18 0.--4. " AtACP ,Active-to-activecommand period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x1C "EMCDynamictRFC,Dynamic Memory Auto-refresh Period Register"
|
|
bitfld.long 0x1C 0.--4. " ARP ,0 Auto-refresh period and auto-refresh to active command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x20 "EMCDynamictXSR,Dynamic Memory Exit Self-refresh Register"
|
|
bitfld.long 0x20 0.--4. " ESRtACT ,Exit self-refresh to active command time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x24 "EMCDynamictRRD,Dynamic Memory Active Bank A to Active Bank B Time Register"
|
|
bitfld.long 0x24 0.--3. " ABAtABB ,Active bank A to active bank B latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x28 "EMCDynamictMRD,Dynamic Memory Load Mode Register to Active Command Time"
|
|
bitfld.long 0x28 0.--3. " LMRtACT ,Load mode register to active command time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "EMCDynamicConfig,Dynamic Memory Configuration Register"
|
|
bitfld.long 0x00 3.--4. " MemDev ,Memory device type" "SDRAM,Low Power SDRAM,Micron SyncFlash,?..."
|
|
hexmask.long.byte 0x00 7.--12. 1. " AddrMap ,Address mapping control"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AddrMap ,Address mapping control" "0,1"
|
|
bitfld.long 0x00 19. " BufEn ,Write buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WrProt ,Memory write protect" "Not protected,Protected"
|
|
line.long 0x04 "EMCDynamicRasCas,Dynamic Memory RAS/CAS Delay Register"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency cycles" "Reserved,One AHB HCLK,Two AHB HCLK,Three AHB HCLK"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS latency cycles" "Reserved,One AHB HCLK,Two AHB HCLK,Three AHB HCLK"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "EMCStaticConfig0,Static Memory Configuration Register 0"
|
|
bitfld.long 0x00 0.--1. " MemWd ,Memory Width" "8 bits,16 bits,?..."
|
|
bitfld.long 0x00 3. " PagMod ,Page mode device indication" "Not indicated,Indicated"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CSPol ,Chip select polarity" "Active-low,Active-high"
|
|
bitfld.long 0x00 7. " BLS ,BLS state for reads" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ExtWait ,Static Extended Wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WrBufEn ,Write buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WrProt ,Write protect" "Not protected,Protected"
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EMCStaticConfig1,Static Memory Configuration Register 1"
|
|
bitfld.long 0x00 0.--1. " MemWd ,Memory Width" "8 bits,16 bits,?..."
|
|
bitfld.long 0x00 3. " PagMod ,Page mode device indication" "Not indicated,Indicated"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CSPol ,Chip select polarity" "Active-low,Active-high"
|
|
bitfld.long 0x00 7. " BLS ,BLS state for reads" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ExtWait ,Static Extended Wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WrBufEn ,Write buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WrProt ,Write protect" "Not protected,Protected"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "EMCStaticConfig2,Static Memory Configuration Register 2"
|
|
bitfld.long 0x00 0.--1. " MemWd ,Memory Width" "8 bits,16 bits,?..."
|
|
bitfld.long 0x00 3. " PagMod ,Page mode device indication" "Not indicated,Indicated"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CSPol ,Chip select polarity" "Active-low,Active-high"
|
|
bitfld.long 0x00 7. " BLS ,BLS state for reads" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ExtWait ,Static Extended Wait" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " WrBufEn ,Write buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WrProt ,Write protect" "Not protected,Protected"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "EMCStaticWaitWen0,Static Memory Write Enable Delay Register 0"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITWEN ,Delay control from chip select assertion to write enable assertion"
|
|
group.long 0x224++0x03
|
|
line.long 0x00 "EMCStaticWaitWen1,Static Memory Write Enable Delay Register 1"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITWEN ,Delay control from chip select assertion to write enable assertion"
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "EMCStaticWaitWen2,Static Memory Write Enable Delay Register 2"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITWEN ,Delay control from chip select assertion to write enable assertion"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "EMCStaticWaitOen0,Static Memory Output Enable Delay Registers"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITOEN ,Delay control from chip select assertion to output enable assertion"
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "EMCStaticWaitOen1,Static Memory Output Enable Delay Registers"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITOEN ,Delay control from chip select assertion to output enable assertion"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "EMCStaticWaitOen2,Static Memory Output Enable Delay Registers"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITOEN ,Delay control from chip select assertion to output enable assertion"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "EMCStaticWaitRd0,Static Memory Read Delay Registers 0"
|
|
bitfld.long 0x00 0.--4. " WAITRD ,Static memory read delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x22C++0x03
|
|
line.long 0x00 "EMCStaticWaitRd1,Static Memory Read Delay Registers 1"
|
|
bitfld.long 0x00 0.--4. " WAITRD ,Static memory read delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "EMCStaticWaitRd2,Static Memory Read Delay Registers 2"
|
|
bitfld.long 0x00 0.--4. " WAITRD ,Static memory read delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "EMCStaticWaitPage0,Static Memory Page Mode Read Delay Registers 0"
|
|
bitfld.long 0x00 0.--4. " WAITPAGE ,Static memory page mode read delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "EMCStaticWaitPage1,Static Memory Page Mode Read Delay Registers 1"
|
|
bitfld.long 0x00 0.--4. " WAITPAGE ,Static memory page mode read delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "EMCStaticWaitPage2,Static Memory Page Mode Read Delay Registers 2"
|
|
bitfld.long 0x00 0.--4. " WAITPAGE ,Static memory page mode read delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "EMCStaticWaitWr0,Static Memory Write Delay Registers 0"
|
|
bitfld.long 0x00 0.--4. " WAITWR ,Static memory write delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x234++0x03
|
|
line.long 0x00 "EMCStaticWaitWr1,Static Memory Write Delay Registers 1"
|
|
bitfld.long 0x00 0.--4. " WAITWR ,Static memory write delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x254++0x03
|
|
line.long 0x00 "EMCStaticWaitWr2,Static Memory Write Delay Registers 2"
|
|
bitfld.long 0x00 0.--4. " WAITWR ,Static memory write delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "EMCStaticWaitTurn0,Static Memory Turnaound Delay Registers 0"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITTURN ,Bus turnaround cycles in AHB HCLK cycles"
|
|
group.long 0x238++0x03
|
|
line.long 0x00 "EMCStaticWaitTurn1,Static Memory Turnaound Delay Registers 1"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITTURN ,Bus turnaround cycles in AHB HCLK cycles"
|
|
group.long 0x258++0x03
|
|
line.long 0x00 "EMCStaticWaitTurn2,Static Memory Turnaound Delay Registers 2"
|
|
hexmask.long.byte 0x00 0.--3. 1. " WAITTURN ,Bus turnaround cycles in AHB HCLK cycles"
|
|
group.long 0x080++0x03
|
|
line.long 0x00 "EMCStaticExtendedWait,Static Memory Extended Wait Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " EXTENDEDWAIT ,Length control of the assertion"
|
|
base 0x80005000
|
|
group.long 0x05C++0x03
|
|
line.long 0x00 "EMCMisc,EMC Miscellaneous Control Register"
|
|
bitfld.long 0x00 0. " SRefReq ,SDRAM self-refresh mode request" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " Rel1Config ,Static memmory address configuration" "Shift Down,Not shift down"
|
|
width 0x0B
|
|
endif
|
|
sif ((cpu()=="LPC2378")||(cpu()=="LPC2377")||(cpu()=="LPC2388"))
|
|
base sd:0xFFE08000
|
|
width 0x17
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "EMCControl,EMC Control Register"
|
|
bitfld.long 0x0 2. " L ,Low-power mode control" "Normal,Low-power"
|
|
bitfld.long 0x0 1. " M ,Address mirror control" "Normal,Reset"
|
|
bitfld.long 0x0 0. " E ,EMC Enable control" "Disabled,Enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "EMCStatus,EMC Status Register"
|
|
bitfld.long 0x0 2. " SA ,Self-refresh acknowledge" "Normal,Self-refresh"
|
|
bitfld.long 0x0 1. " S ,Write buffer status" "Empty,Not empty"
|
|
bitfld.long 0x0 0. " B ,Busy" "Idle,Busy"
|
|
width 0x17
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "EMCConfig,EMC Configuration Register"
|
|
bitfld.long 0x0 0. " Endian_mode ,Endian mode" "Little-endian,Big-endian"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "EMCStaticExtendedWait,Static Memory Extended Wait Register"
|
|
hexmask.long.word 0x0 0.--9. 1. 1. " EXTENDEDWAIT ,External wait time out"
|
|
width 0x17
|
|
group.long 0x200++0x1B
|
|
line.long 0x0 "EMCStaticConfig0,Static Memory Configuration Register 0"
|
|
bitfld.long 0x00 20. " P ,Write protect control" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "LOW,HIGH"
|
|
bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,?..."
|
|
width 0x17
|
|
line.long 0x4 "EMCStaticWaitWen0,Static Memory Write Enable Delay Register 0"
|
|
bitfld.long 0x4 0.--3. " WAITWEN ,Wait write enable" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x8 "EMCStaticWaitOen0,Static Memory Output Enable Delay Register 0"
|
|
bitfld.long 0x8 0.--3. " WAITOEN ,Wait output enable" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0xC "EMCStaticWaitRd0,Static Memory Read Delay Register 0"
|
|
bitfld.long 0xC 0.--4. " WAITRD ,Non-page mode read wait states or asynchronous page mode readfirst access wait state" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x10 "EMCStaticWaitPage0,Static Memory Page Mode Read Delay Register 0"
|
|
bitfld.long 0x10 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1 cycle,2 cycle,3 cycle,4 cycle,5 cycle,6 cycle,7 cycle,8 cycle,9 cycle,10 cycle,11 cycle,12 cycle,13 cycle,14 cycle,15 cycle,16 cycle,17 cycle,18 cycle,19 cycle,20 cycle,21 cycle,22 cycle,23 cycle,24 cycle,25 cycle,26 cycle,27 cycle,28 cycle,29 cycle,30 cycle,31 cycle,32 cycle"
|
|
line.long 0x14 "EMCStaticWaitWr0,Static Memory Write Delay Register 0"
|
|
bitfld.long 0x14 0.--4. " WAITWR ,SRAM Write wait states" "2 cycle,3 cycle,4 cycle,5 cycle,6 cycle,7 cycle,8 cycle,9 cycle,10 cycle,11 cycle,12 cycle,13 cycle,14 cycle,15 cycle,16 cycle,17 cycle,18 cycle,19 cycle,20 cycle,21 cycle,22 cycle,23 cycle,24 cycle,25 cycle,26 cycle,27 cycle,28 cycle,29 cycle,30 cycle,31 cycle,32 cycle,33 cycle"
|
|
line.long 0x18 "EMCStaticWaitTurn0,Static Memory Turn Round Delay Register 0"
|
|
bitfld.long 0x18 0.--3. " WAITTURN ,Bus turnaround cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
width 0x17
|
|
group.long 0x220++0x1B
|
|
line.long 0x0 "EMCStaticConfig1,Static Memory Configuration Register 1"
|
|
bitfld.long 0x00 20. " P ,Write protect control" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "LOW,HIGH"
|
|
bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,?..."
|
|
width 0x17
|
|
line.long 0x4 "EMCStaticWaitWen1,Static Memory Write Enable Delay Register 1"
|
|
bitfld.long 0x4 0.--3. " WAITWEN ,Wait write enable" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x8 "EMCStaticWaitOen1,Static Memory Output Enable Delay Register 1"
|
|
bitfld.long 0x8 0.--3. " WAITOEN ,Wait output enable" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0xC "EMCStaticWaitRd1,Static Memory Read Delay Register 1"
|
|
bitfld.long 0xC 0.--4. " WAITRD ,Non-page mode read wait states or asynchronous page mode readfirst access wait state" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x10 "EMCStaticWaitPage1,Static Memory Page Mode Read Delay Register 1"
|
|
bitfld.long 0x10 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1 cycle,2 cycle,3 cycle,4 cycle,5 cycle,6 cycle,7 cycle,8 cycle,9 cycle,10 cycle,11 cycle,12 cycle,13 cycle,14 cycle,15 cycle,16 cycle,17 cycle,18 cycle,19 cycle,20 cycle,21 cycle,22 cycle,23 cycle,24 cycle,25 cycle,26 cycle,27 cycle,28 cycle,29 cycle,30 cycle,31 cycle,32 cycle"
|
|
line.long 0x14 "EMCStaticWaitWr1,Static Memory Write Delay Register 1"
|
|
bitfld.long 0x14 0.--4. " WAITWR ,SRAM Write wait states" "2 cycle,3 cycle,4 cycle,5 cycle,6 cycle,7 cycle,8 cycle,9 cycle,10 cycle,11 cycle,12 cycle,13 cycle,14 cycle,15 cycle,16 cycle,17 cycle,18 cycle,19 cycle,20 cycle,21 cycle,22 cycle,23 cycle,24 cycle,25 cycle,26 cycle,27 cycle,28 cycle,29 cycle,30 cycle,31 cycle,32 cycle,33 cycle"
|
|
line.long 0x18 "EMCStaticWaitTurn1,Static Memory Turn Round Delay Register 1"
|
|
bitfld.long 0x18 0.--3. " WAITTURN ,Bus turnaround cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
width 0xB
|
|
endif
|
|
sif (cpu()=="LPC2420"||cpu()=="LPC2468"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
base sd:0xFFE08000
|
|
width 0x17
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "EMCControl,EMC Control Register"
|
|
bitfld.long 0x0 2. " L ,Low-power mode control" "Normal,Low-power"
|
|
bitfld.long 0x0 1. " M ,Address mirror control" "Normal,Reset"
|
|
bitfld.long 0x0 0. " E ,EMC Enable control" "Disabled,Enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "EMCStatus,EMC Status Register"
|
|
bitfld.long 0x0 2. " SA ,Self-refresh acknowledge" "Normal,Self-refresh"
|
|
bitfld.long 0x0 1. " S ,Write buffer status" "Empty,Not empty"
|
|
bitfld.long 0x0 0. " B ,Busy" "Idle,Busy"
|
|
width 0x17
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "EMCConfig,EMC Configuration Register"
|
|
bitfld.long 0x0 8. " CCLK:CLKOUT[3:0] ,CCLK : CLKOUT[3:0] ratio" "1:1,1:2"
|
|
bitfld.long 0x0 0. " Endian_mode ,Endian mode" "Little-endian,Big-endian"
|
|
width 0x17
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "EMCDynamicControl,Dynamic Memory Control"
|
|
bitfld.long 0x0 13. " DP ,Low-power SDRAM deep-sleep mode" "Normal,Deep power down"
|
|
bitfld.long 0x0 7.--8. " I ,SDRAM initialization" "NORMAL,MODE,PALL,NOP"
|
|
textline " "
|
|
bitfld.long 0x0 5. " MMC ,Memory clock control" "Enabled,Disabled"
|
|
bitfld.long 0x0 2. " SR ,Self-refresh request,EMCSREFREQ" "Normal,Self-refresh"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CS ,Dynamic memory clock control" "Stops,Runs continouosly"
|
|
bitfld.long 0x0 0. " CE ,Dynamic memory clock enable" "Deasserted,Driven high"
|
|
width 0x17
|
|
line.long 0x4 "EMCDynamicRefresh,Dynamic Memory Refresh Timer"
|
|
hexmask.long.word 0x4 0.--10. 1. " REFRESH ,Refresh timer"
|
|
line.long 0x8 "EMCDynamicReadConfig,Dynamic Memory Read Configuration"
|
|
bitfld.long 0x8 0.--1. " RD ,Read data strategy" "CLKOUT,EMCCLKDELAY,EMCCLKDELAY+1,EMCCLKDELAY+2"
|
|
group.long 0x30--0x5B
|
|
line.long 0x0 "EMCDynamictRP,Dynamic Memory Percentage Command Period"
|
|
bitfld.long 0x0 0.--3. " tRP ,Precharge command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x4 "EMCDynamictRAS,Dynamic Memory Active to Precharge Command Period"
|
|
bitfld.long 0x4 0.--3. " tRAS ,Active to precharge command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x8 "EMCDynamictSREX,Dynamic Memory Self-refresh Exit Time"
|
|
bitfld.long 0x8 0.--3. " tSREX ,Self-refresh exit time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0xC "EMCDynamictAPR,Dynamic Memory Last Data Out to Active Time"
|
|
bitfld.long 0xC 0.--3. " tAPR ,Last-data-out to active command time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x10 "EMCDynamictDAL,Dynamic Memory Data-in to Active Command Time"
|
|
bitfld.long 0x10 0.--3. " tDAL ,Data-in to active command" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x14 "EMCDynamictWR,Dynamic Memory Write Recovery Time"
|
|
bitfld.long 0x14 0.--3. " tWR ,Write recovery time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x18 "EMCDynamictRC,Dynamic Memory Active to Active Command Period"
|
|
bitfld.long 0x18 0.--4. " tRC ,Active to active command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x1C "EMCDynamictRFC,Dynamic Memory Auto-refresh Period"
|
|
bitfld.long 0x1C 0.--4. " tRFC ,Auto-refresh period and auto-refresh to active command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x20 "EMCDynamictXSR,Dynamic Memory Exit Self-refresh"
|
|
bitfld.long 0x20 0.--4. " tXSR ,Exit self-refresh to active command time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x24 "EMCDynamictRRD,Dynamic Memory Active Bank A to Active Bank B Time"
|
|
bitfld.long 0x24 0.--3. " tRRD ,Active bank A to active bank B latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x28 "EMCDynamictMRD,Dynamic Memory Load Mode register to Active Command Time"
|
|
bitfld.long 0x28 0.--3. " tMRD ,Load mode register to active command time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "EMCStaticExtendedWait,Static Memory Extended Wait"
|
|
hexmask.long.word 0x00 0.--9. 1. " EXTENDEDWAIT ,External wait time out"
|
|
width 0x17
|
|
tree "Bank 0"
|
|
width 0x14
|
|
group.long (0x100+0x0)++0x7
|
|
line.long 0x00 "EMCDynamicConfig0,Dynamic Memory Configuration"
|
|
bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AM[14] ,Address Mapping[14]" "0,1"
|
|
bitfld.long 0x00 12. " AM[12] ,Address Mapping[12]" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AM[11:9] ,Address Mapping[11:9]" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x00 7.--8. " AM[8:7] ,Address Mapping[8:7]" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " MD ,Memory Device" "SDRAM,Low-Power SDRAM,Micron SyncFlash,?..."
|
|
line.long 0x04 "EMCDynamicRASCAS0,Dynamic Memory RAS & CAS"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS Latency" "Reserved,1 CCLK cycle,2 CCLK cycles,3 CCLK cycles"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency (active to read/write delay)" "Reserved,1 CCLK cycle,2 CCLK cycles,3 CCLK cycles"
|
|
width 0x14
|
|
group.long (0x200+0x0)--(0x21B+0x0)
|
|
line.long 0x00 "EMCStaticConfig0,Static Memory Configuration"
|
|
bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PB ,Byte lane state" "R-HIGH/W-LOW,R-LOW/W-LOW"
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active LOW,Active HIGH"
|
|
bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
width 0x14
|
|
line.long 0x04 "EMCStaticWaitWen0,Static Memory Write Enable Delay"
|
|
bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x08 "EMCStaticWaitOen0,Static Memory Output Enable Delay"
|
|
bitfld.long 0x08 0.--3. " WAITOEN ,Wait Output Enable" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0C "EMCStaticWaitRd0,Static Memory Read Delay"
|
|
bitfld.long 0x0C 0.--4. " WAITRD ,Non-page mode read wait states or asynchronous page mode readfirst access wait state" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x10 "EMCStaticwaitPage0,Static Memory Page Mode Read Delay"
|
|
bitfld.long 0x10 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x14 "EMCStaticWaitwr0,Static Memory Write Delay"
|
|
bitfld.long 0x14 0.--4. " WAITWR ,Write wait states" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles"
|
|
line.long 0x18 "EMCStaticWaitTurn0,Static Memory Turn Round Delay"
|
|
bitfld.long 0x18 0.--3. " WAITTURN ,Bus turnaround cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
tree.end
|
|
tree "Bank 1"
|
|
width 0x14
|
|
group.long (0x100+0x20)++0x7
|
|
line.long 0x00 "EMCDynamicConfig1,Dynamic Memory Configuration"
|
|
bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AM[14] ,Address Mapping[14]" "0,1"
|
|
bitfld.long 0x00 12. " AM[12] ,Address Mapping[12]" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AM[11:9] ,Address Mapping[11:9]" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x00 7.--8. " AM[8:7] ,Address Mapping[8:7]" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " MD ,Memory Device" "SDRAM,Low-Power SDRAM,Micron SyncFlash,?..."
|
|
line.long 0x04 "EMCDynamicRASCAS1,Dynamic Memory RAS & CAS"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS Latency" "Reserved,1 CCLK cycle,2 CCLK cycles,3 CCLK cycles"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency (active to read/write delay)" "Reserved,1 CCLK cycle,2 CCLK cycles,3 CCLK cycles"
|
|
width 0x14
|
|
group.long (0x200+0x20)--(0x21B+0x20)
|
|
line.long 0x00 "EMCStaticConfig1,Static Memory Configuration"
|
|
bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PB ,Byte lane state" "R-HIGH/W-LOW,R-LOW/W-LOW"
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active LOW,Active HIGH"
|
|
bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
width 0x14
|
|
line.long 0x04 "EMCStaticWaitWen1,Static Memory Write Enable Delay"
|
|
bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x08 "EMCStaticWaitOen1,Static Memory Output Enable Delay"
|
|
bitfld.long 0x08 0.--3. " WAITOEN ,Wait Output Enable" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0C "EMCStaticWaitRd1,Static Memory Read Delay"
|
|
bitfld.long 0x0C 0.--4. " WAITRD ,Non-page mode read wait states or asynchronous page mode readfirst access wait state" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x10 "EMCStaticwaitPage1,Static Memory Page Mode Read Delay"
|
|
bitfld.long 0x10 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x14 "EMCStaticWaitwr1,Static Memory Write Delay"
|
|
bitfld.long 0x14 0.--4. " WAITWR ,Write wait states" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles"
|
|
line.long 0x18 "EMCStaticWaitTurn1,Static Memory Turn Round Delay"
|
|
bitfld.long 0x18 0.--3. " WAITTURN ,Bus turnaround cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
tree.end
|
|
tree "Bank 2"
|
|
width 0x14
|
|
group.long (0x100+0x40)++0x7
|
|
line.long 0x00 "EMCDynamicConfig2,Dynamic Memory Configuration"
|
|
bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AM[14] ,Address Mapping[14]" "0,1"
|
|
bitfld.long 0x00 12. " AM[12] ,Address Mapping[12]" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AM[11:9] ,Address Mapping[11:9]" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x00 7.--8. " AM[8:7] ,Address Mapping[8:7]" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " MD ,Memory Device" "SDRAM,Low-Power SDRAM,Micron SyncFlash,?..."
|
|
line.long 0x04 "EMCDynamicRASCAS2,Dynamic Memory RAS & CAS"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS Latency" "Reserved,1 CCLK cycle,2 CCLK cycles,3 CCLK cycles"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency (active to read/write delay)" "Reserved,1 CCLK cycle,2 CCLK cycles,3 CCLK cycles"
|
|
width 0x14
|
|
group.long (0x200+0x40)--(0x21B+0x40)
|
|
line.long 0x00 "EMCStaticConfig2,Static Memory Configuration"
|
|
bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PB ,Byte lane state" "R-HIGH/W-LOW,R-LOW/W-LOW"
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active LOW,Active HIGH"
|
|
bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
width 0x14
|
|
line.long 0x04 "EMCStaticWaitWen2,Static Memory Write Enable Delay"
|
|
bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x08 "EMCStaticWaitOen2,Static Memory Output Enable Delay"
|
|
bitfld.long 0x08 0.--3. " WAITOEN ,Wait Output Enable" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0C "EMCStaticWaitRd2,Static Memory Read Delay"
|
|
bitfld.long 0x0C 0.--4. " WAITRD ,Non-page mode read wait states or asynchronous page mode readfirst access wait state" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x10 "EMCStaticwaitPage2,Static Memory Page Mode Read Delay"
|
|
bitfld.long 0x10 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x14 "EMCStaticWaitwr2,Static Memory Write Delay"
|
|
bitfld.long 0x14 0.--4. " WAITWR ,Write wait states" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles"
|
|
line.long 0x18 "EMCStaticWaitTurn2,Static Memory Turn Round Delay"
|
|
bitfld.long 0x18 0.--3. " WAITTURN ,Bus turnaround cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
tree.end
|
|
tree "Bank 3"
|
|
width 0x14
|
|
group.long (0x100+0x60)++0x7
|
|
line.long 0x00 "EMCDynamicConfig3,Dynamic Memory Configuration"
|
|
bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " AM[14] ,Address Mapping[14]" "0,1"
|
|
bitfld.long 0x00 12. " AM[12] ,Address Mapping[12]" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AM[11:9] ,Address Mapping[11:9]" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x00 7.--8. " AM[8:7] ,Address Mapping[8:7]" "00,01,10,11"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " MD ,Memory Device" "SDRAM,Low-Power SDRAM,Micron SyncFlash,?..."
|
|
line.long 0x04 "EMCDynamicRASCAS3,Dynamic Memory RAS & CAS"
|
|
bitfld.long 0x04 8.--9. " CAS ,CAS Latency" "Reserved,1 CCLK cycle,2 CCLK cycles,3 CCLK cycles"
|
|
bitfld.long 0x04 0.--1. " RAS ,RAS latency (active to read/write delay)" "Reserved,1 CCLK cycle,2 CCLK cycles,3 CCLK cycles"
|
|
width 0x14
|
|
group.long (0x200+0x60)--(0x21B+0x60)
|
|
line.long 0x00 "EMCStaticConfig3,Static Memory Configuration"
|
|
bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PB ,Byte lane state" "R-HIGH/W-LOW,R-LOW/W-LOW"
|
|
bitfld.long 0x00 6. " PC ,Chip select polarity" "Active LOW,Active HIGH"
|
|
bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..."
|
|
width 0x14
|
|
line.long 0x04 "EMCStaticWaitWen3,Static Memory Write Enable Delay"
|
|
bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
line.long 0x08 "EMCStaticWaitOen3,Static Memory Output Enable Delay"
|
|
bitfld.long 0x08 0.--3. " WAITOEN ,Wait Output Enable" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
line.long 0x0C "EMCStaticWaitRd3,Static Memory Read Delay"
|
|
bitfld.long 0x0C 0.--4. " WAITRD ,Non-page mode read wait states or asynchronous page mode readfirst access wait state" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x10 "EMCStaticwaitPage3,Static Memory Page Mode Read Delay"
|
|
bitfld.long 0x10 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
line.long 0x14 "EMCStaticWaitwr3,Static Memory Write Delay"
|
|
bitfld.long 0x14 0.--4. " WAITWR ,Write wait states" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles"
|
|
line.long 0x18 "EMCStaticWaitTurn3,Static Memory Turn Round Delay"
|
|
bitfld.long 0x18 0.--3. " WAITTURN ,Bus turnaround cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; CAN
|
|
; --------------------------------------------------------------------------------
|
|
tree "CAN Controllers and Acceptance Filter"
|
|
sif (cpu()=="LPC2119"||cpu()=="LPC2129"||cpu()=="LPC2290"||cpu()=="LPC2292")
|
|
base 0xE0040000
|
|
tree "Centralized CAN"
|
|
width 0x09
|
|
rgroup.long 0x00++0x0B
|
|
line.long 0x00 "CANTxSR,CAN Central Transmit Status Register"
|
|
bitfld.long 0x00 0. " TS1 ,CAN1 Transmit Status" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " TS2 ,CAN2 Transmit Status" "Not busy,Busy"
|
|
bitfld.long 0x00 8. " TBS1 ,CAN1 Transmit Buffers Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TBS2 ,CAN2 Transmit Buffers Status" "Not ready,Ready"
|
|
bitfld.long 0x00 16. " TCS1 ,CAN1 Transmit Complete Status" "Not completed,Completed"
|
|
bitfld.long 0x00 17. " TCS2 ,CAN2 Transmit Complete Status" "Not completed,Completed"
|
|
line.long 0x04 "CANRxSR,CAN Central Receive Status Register"
|
|
bitfld.long 0x04 0. " RS1 ,CAN1 Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x04 1. " RS2 ,CAN2 Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x04 8. " RBS1 ,CAN1 Receive Buffer Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 9. " RBS2 ,CAN2 Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x04 16. " DOS1 ,CAN1 Data Overrun Status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 17. " DOS2 ,CAN2 Data Overrun Status" "Not occurred,Occurred"
|
|
line.long 0x08 "CANMSR,CAN Central Miscellaneous Register"
|
|
bitfld.long 0x08 0. " ES1 ,CAN1 Error Status" "No error,Error"
|
|
bitfld.long 0x08 1. " ES2 ,CAN2 Error Status" "No error,Error"
|
|
bitfld.long 0x08 8. " BS1 ,CAN1 Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x08 9. " BS2 ,CAN2 Bus Status" "Normal,Prohibited"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0044000
|
|
tree "CAN1"
|
|
width 0x08
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "C1MOD,CAN1 Mode"
|
|
bitfld.long 0x00 0. " RM ,Reset Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN IDs,Tx Priority"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TM ,Test Mode" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "C1CMR,CAN1 Command"
|
|
bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released"
|
|
bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "C1GSR,CAN1 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "C1GSR,CAN1 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
endif
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "C1ICR,CAN1 Interrupt status, Arbitration Lost Capture, Error Code Capture"
|
|
in
|
|
group.long 0x10++0x01
|
|
line.word 0x00 "C1IER,CAN1 Interrupt Enable"
|
|
bitfld.word 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "C1BTR,CAN1 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "C1BTR,CAN1 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
endif
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "C1EWL,CAN1 Error Warning Limit"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "C1EWL,CAN1 Error Warning Limit"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "C1SR,CAN1 Status"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 15. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 23. " BS ,Bus Status" "Normal,Prohibited"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "C1RFS,CAN1 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "C1RDA,CAN1 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C1RDB,CAN1 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "C1RFS,CAN1 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "C1RDA,CAN1 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C1RDB,CAN1 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
endif
|
|
if ((((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x00000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C1RID,CAN1 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x80000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C1RID,CAN1 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x00000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C1RID,CAN1 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x80000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C1RID,CAN1 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "C1TFI1,CAN1 Transmit frame info (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040030+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C1TID1,CAN1 Transmit Identifier (1)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C1TID1,CAN1 Transmit Identifier (1)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "C1TDA1,CAN1 Transmit data bytes 1-4 (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C1TDB1,CAN1 Transmit data bytes 5-8 (1)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "C1TFI2,CAN1 Transmit frame info (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040040+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C1TID2,CAN1 Transmit Identifier (2)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C1TID2,CAN1 Transmit Identifier (2)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "C1TDA2,CAN1 Transmit data bytes 1-4 (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C1TDB2,CAN1 Transmit data bytes 5-8 (2)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "C1TFI3,CAN1 Transmit frame info (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040050+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C1TID3,CAN1 Transmit Identifier (3)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C1TID3,CAN1 Transmit Identifier (3)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "C1TDA3,CAN1 Transmit data bytes 1-4 (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C1TDB3,CAN1 Transmit data bytes 5-8 (3)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0048000
|
|
tree "CAN2"
|
|
width 0x08
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "C2MOD,CAN2 Mode"
|
|
bitfld.long 0x00 0. " RM ,Reset Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN IDs,Tx Priority"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TM ,Test Mode" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "C2CMR,CAN2 Command"
|
|
bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released"
|
|
bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "C2GSR,CAN2 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "C2GSR,CAN2 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
endif
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "C2ICR,CAN2 Interrupt status, Arbitration Lost Capture, Error Code Capture"
|
|
in
|
|
group.long 0x10++0x01
|
|
line.word 0x00 "C2IER,CAN2 Interrupt Enable"
|
|
bitfld.word 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "C2BTR,CAN2 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "C2BTR,CAN2 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
endif
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "C2EWL,CAN2 Error Warning Limit"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "C2EWL,CAN2 Error Warning Limit"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "C2SR,CAN2 Status"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 15. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 23. " BS ,Bus Status" "Normal,Prohibited"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "C2RFS,CAN2 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "C2RDA,CAN2 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C2RDB,CAN2 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "C2RFS,CAN2 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "C2RDA,CAN2 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C2RDB,CAN2 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
endif
|
|
if ((((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x00000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C2RID,CAN2 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x80000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C2RID,CAN2 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x00000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C2RID,CAN2 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x80000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C2RID,CAN2 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "C2TFI1,CAN2 Transmit frame info (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040030+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C2TID1,CAN2 Transmit Identifier (1)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C2TID1,CAN2 Transmit Identifier (1)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "C2TDA1,CAN2 Transmit data bytes 1-4 (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C2TDB1,CAN2 Transmit data bytes 5-8 (1)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "C2TFI2,CAN2 Transmit frame info (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040040+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C2TID2,CAN2 Transmit Identifier (2)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C2TID2,CAN2 Transmit Identifier (2)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "C2TDA2,CAN2 Transmit data bytes 1-4 (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C2TDB2,CAN2 Transmit data bytes 5-8 (2)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "C2TFI3,CAN2 Transmit frame info (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040050+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C2TID3,CAN2 Transmit Identifier (3)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C2TID3,CAN2 Transmit Identifier (3)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "C2TDA3,CAN2 Transmit data bytes 1-4 (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C2TDB3,CAN2 Transmit data bytes 5-8 (3)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE003C000
|
|
tree "Acceptance Filter"
|
|
width 0x0C
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "AFMR,Acceptance Filter Register"
|
|
bitfld.byte 0x00 0. " AccOff ,Acceptance Filter Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " AccBP ,All Rx messages Acception on enabled CAN controllers" "Not accepted,Accepted"
|
|
bitfld.byte 0x00 2. " eFCAN ,Software/Acceptance Filter Read all Messages from CAN Receivers" "Software,AF"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "SFF_sa,Standard Frame Individual Start Address Register"
|
|
hexmask.word.byte 0x00 2.--10. 4. " SFIADDR ,The start address of the table of individual Standard Identifiers in AF Lookup"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SFF_GRP_sa,Standard Frame Group Start Address Register"
|
|
hexmask.word 0x00 2.--11. 4. " SFGADDR ,The start address of the table of grouped Standard Identifiers in AF Lookup RAM"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "EFF_sa,Extended Frame Start Address Register"
|
|
hexmask.word.byte 0x00 2.--10. 4. " EFADDR ,The start address of the table of individual Extended Identifiers in AF Lookup RAM"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "EFF_GRP_sa,Extended Frame Group Start Address Register"
|
|
hexmask.word 0x00 2.--11. 4. " EFGADDR ,The start address of the table of grouped Extended Identifiers in AF Lookup RAM"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "ENDofTable,End of AF Tables Register"
|
|
hexmask.word 0x00 2.--11. 4. " ABVADDR ,The address above the last active address in the last active AF table"
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "LUTerrAd,LUT Error Address Register"
|
|
hexmask.word.byte 0x00 2.--10. 4. " ERRADDR ,Error address in AF Lookup Table RAM"
|
|
rgroup.byte 0x1c++0x00
|
|
line.byte 0x00 "LUTerr,LUT Error Register"
|
|
bitfld.byte 0x00 0. " ERR ,Acceptance Filter encountered an error in content of tables in AF RAM" "No Error,Error"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2194"||cpu()=="LPC2294")
|
|
tree "Centralized CAN"
|
|
width 0x09
|
|
base 0xE0040000
|
|
rgroup.long 0x00++0x0B
|
|
line.long 0x00 "CANTxSR,CAN Central Transmit Status Register"
|
|
bitfld.long 0x00 0. " TS1 ,CAN1 Transmit Status" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " TS2 ,CAN2 Transmit Status" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " TS3 ,CAN3 Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TS4 ,CAN4 Transmit Status" "Not busy,Busy"
|
|
bitfld.long 0x00 8. " TBS1 ,CAN1 Transmit Buffers Status" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " TBS2 ,CAN2 Transmit Buffers Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TBS3 ,CAN3 Transmit Buffers Status" "Not ready,Ready"
|
|
bitfld.long 0x00 11. " TBS4 ,CAN4 Transmit Buffers Status" "Not ready,Ready"
|
|
bitfld.long 0x00 16. " TCS1 ,CAN1 Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TCS2 ,CAN2 Transmit Complete Status" "Not completed,Completed"
|
|
bitfld.long 0x00 18. " TCS3 ,CAN3 Transmit Complete Status" "Not completed,Completed"
|
|
bitfld.long 0x00 19. " TCS4 ,CAN4 Transmit Complete Status" "Not completed,Completed"
|
|
line.long 0x04 "CANRxSR,CAN Central Receive Status Register"
|
|
bitfld.long 0x04 0. " RS1 ,CAN1 Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x04 1. " RS2 ,CAN2 Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x04 2. " RS3 ,CAN3 Receive Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RS4 ,CAN4 Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x04 8. " RBS1 ,CAN1 Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x04 9. " RBS2 ,CAN2 Receive Buffer Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RBS3 ,CAN3 Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x04 11. " RBS4 ,CAN4 Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x04 16. " DOS1 ,CAN1 Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 17. " DOS2 ,CAN2 Data Overrun Status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 18. " DOS3 ,CAN3 Data Overrun Status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 19. " DOS4 ,CAN4 Data Overrun Status" "Not occurred,Occurred"
|
|
line.long 0x08 "CANMSR,CAN Central Miscellaneous Register"
|
|
bitfld.long 0x08 0. " ES1 ,CAN1 Error Status" "No error,Error"
|
|
bitfld.long 0x08 1. " ES2 ,CAN2 Error Status" "No error,Error"
|
|
bitfld.long 0x08 2. " ES3 ,CAN3 Error Status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 3. " ES4 ,CAN4 Error Status" "No error,Error"
|
|
bitfld.long 0x08 8. " BS1 ,CAN1 Bus Status" "Normal,Prohibited"
|
|
bitfld.long 0x08 9. " BS2 ,CAN2 Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x08 10. " BS3 ,CAN3 Bus Status" "Normal,Prohibited"
|
|
bitfld.long 0x08 11. " BS4 ,CAN4 Bus Status" "Normal,Prohibited"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0044000
|
|
tree "CAN1"
|
|
width 0x08
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "C1MOD,CAN1 Mode"
|
|
bitfld.long 0x00 0. " RM ,Reset Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN IDs,Tx Priority"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TM ,Test Mode" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "C1CMR,CAN1 Command"
|
|
bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released"
|
|
bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "C1GSR,CAN1 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "C1GSR,CAN1 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
endif
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "C1ICR,CAN1 Interrupt status, Arbitration Lost Capture, Error Code Capture"
|
|
in
|
|
group.long 0x10++0x01
|
|
line.word 0x00 "C1IER,CAN1 Interrupt Enable"
|
|
bitfld.word 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "C1BTR,CAN1 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "C1BTR,CAN1 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
endif
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "C1EWL,CAN1 Error Warning Limit"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "C1EWL,CAN1 Error Warning Limit"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "C1SR,CAN1 Status"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 15. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 23. " BS ,Bus Status" "Normal,Prohibited"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "C1RFS,CAN1 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "C1RDA,CAN1 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C1RDB,CAN1 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "C1RFS,CAN1 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "C1RDA,CAN1 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C1RDB,CAN1 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
endif
|
|
if ((((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x00000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C1RID,CAN1 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x80000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C1RID,CAN1 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x00000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C1RID,CAN1 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*1))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x80000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C1RID,CAN1 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "C1TFI1,CAN1 Transmit frame info (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040030+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C1TID1,CAN1 Transmit Identifier (1)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C1TID1,CAN1 Transmit Identifier (1)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "C1TDA1,CAN1 Transmit data bytes 1-4 (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C1TDB1,CAN1 Transmit data bytes 5-8 (1)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "C1TFI2,CAN1 Transmit frame info (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040040+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C1TID2,CAN1 Transmit Identifier (2)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C1TID2,CAN1 Transmit Identifier (2)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "C1TDA2,CAN1 Transmit data bytes 1-4 (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C1TDB2,CAN1 Transmit data bytes 5-8 (2)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "C1TFI3,CAN1 Transmit frame info (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040050+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C1TID3,CAN1 Transmit Identifier (3)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C1TID3,CAN1 Transmit Identifier (3)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "C1TDA3,CAN1 Transmit data bytes 1-4 (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C1TDB3,CAN1 Transmit data bytes 5-8 (3)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0048000
|
|
tree "CAN2"
|
|
width 0x08
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "C2MOD,CAN2 Mode"
|
|
bitfld.long 0x00 0. " RM ,Reset Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN IDs,Tx Priority"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TM ,Test Mode" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "C2CMR,CAN2 Command"
|
|
bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released"
|
|
bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "C2GSR,CAN2 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "C2GSR,CAN2 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
endif
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "C2ICR,CAN2 Interrupt status, Arbitration Lost Capture, Error Code Capture"
|
|
in
|
|
group.long 0x10++0x01
|
|
line.word 0x00 "C2IER,CAN2 Interrupt Enable"
|
|
bitfld.word 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "C2BTR,CAN2 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "C2BTR,CAN2 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
endif
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "C2EWL,CAN2 Error Warning Limit"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "C2EWL,CAN2 Error Warning Limit"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "C2SR,CAN2 Status"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 15. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 23. " BS ,Bus Status" "Normal,Prohibited"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "C2RFS,CAN2 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "C2RDA,CAN2 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C2RDB,CAN2 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "C2RFS,CAN2 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "C2RDA,CAN2 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C2RDB,CAN2 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
endif
|
|
if ((((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x00000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C2RID,CAN2 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x80000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C2RID,CAN2 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x00000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C2RID,CAN2 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*2))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x80000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C2RID,CAN2 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "C2TFI1,CAN2 Transmit frame info (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040030+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C2TID1,CAN2 Transmit Identifier (1)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C2TID1,CAN2 Transmit Identifier (1)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "C2TDA1,CAN2 Transmit data bytes 1-4 (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C2TDB1,CAN2 Transmit data bytes 5-8 (1)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "C2TFI2,CAN2 Transmit frame info (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040040+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C2TID2,CAN2 Transmit Identifier (2)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C2TID2,CAN2 Transmit Identifier (2)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "C2TDA2,CAN2 Transmit data bytes 1-4 (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C2TDB2,CAN2 Transmit data bytes 5-8 (2)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "C2TFI3,CAN2 Transmit frame info (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040050+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C2TID3,CAN2 Transmit Identifier (3)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C2TID3,CAN2 Transmit Identifier (3)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "C2TDA3,CAN2 Transmit data bytes 1-4 (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C2TDB3,CAN2 Transmit data bytes 5-8 (3)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE004C000
|
|
tree "CAN3"
|
|
width 0x08
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "C3MOD,CAN3 Mode"
|
|
bitfld.long 0x00 0. " RM ,Reset Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN IDs,Tx Priority"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TM ,Test Mode" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "C3CMR,CAN3 Command"
|
|
bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released"
|
|
bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*3))))&0x01)==0x00)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "C3GSR,CAN3 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "C3GSR,CAN3 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
endif
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "C3ICR,CAN3 Interrupt status, Arbitration Lost Capture, Error Code Capture"
|
|
in
|
|
group.long 0x10++0x01
|
|
line.word 0x00 "C3IER,CAN3 Interrupt Enable"
|
|
bitfld.word 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*3))))&0x01)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "C3BTR,CAN3 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "C3BTR,CAN3 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
endif
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*3))))&0x01)==0x00)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "C3EWL,CAN3 Error Warning Limit"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "C3EWL,CAN3 Error Warning Limit"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "C3SR,CAN3 Status"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 15. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 23. " BS ,Bus Status" "Normal,Prohibited"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*3))))&0x01)==0x00)
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "C3RFS,CAN3 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "C3RDA,CAN3 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C3RDB,CAN3 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "C3RFS,CAN3 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "C3RDA,CAN3 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C3RDB,CAN3 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
endif
|
|
if ((((data.byte(d:(0xE0040000+(0x00004000*3))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*3))))&0x80000000)==0x00000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C3RID,CAN3 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*3))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*3))))&0x80000000)==0x80000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C3RID,CAN3 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*3))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*3))))&0x80000000)==0x00000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C3RID,CAN3 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*3))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*3))))&0x80000000)==0x80000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C3RID,CAN3 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "C3TFI1,CAN3 Transmit frame info (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040030+(0x00004000*3))))&0x80000000)==0x00000000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C3TID1,CAN3 Transmit Identifier (1)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C3TID1,CAN3 Transmit Identifier (1)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "C3TDA1,CAN3 Transmit data bytes 1-4 (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C3TDB1,CAN3 Transmit data bytes 5-8 (1)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "C3TFI2,CAN3 Transmit frame info (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040040+(0x00004000*3))))&0x80000000)==0x00000000)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C3TID2,CAN3 Transmit Identifier (2)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C3TID2,CAN3 Transmit Identifier (2)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "C3TDA2,CAN3 Transmit data bytes 1-4 (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C3TDB2,CAN3 Transmit data bytes 5-8 (2)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "C3TFI3,CAN3 Transmit frame info (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040050+(0x00004000*3))))&0x80000000)==0x00000000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C3TID3,CAN3 Transmit Identifier (3)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C3TID3,CAN3 Transmit Identifier (3)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "C3TDA3,CAN3 Transmit data bytes 1-4 (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C3TDB3,CAN3 Transmit data bytes 5-8 (3)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0050000
|
|
tree "CAN4"
|
|
width 0x08
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "C4MOD,CAN4 Mode"
|
|
bitfld.long 0x00 0. " RM ,Reset Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN IDs,Tx Priority"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TM ,Test Mode" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "C4CMR,CAN4 Command"
|
|
bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released"
|
|
bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*4))))&0x01)==0x00)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "C4GSR,CAN4 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "C4GSR,CAN4 Global Controller Status and Error Counter"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
endif
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "C4ICR,CAN4 Interrupt status, Arbitration Lost Capture, Error Code Capture"
|
|
in
|
|
group.long 0x10++0x01
|
|
line.word 0x00 "C4IER,CAN4 Interrupt Enable"
|
|
bitfld.word 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*4))))&0x01)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "C4BTR,CAN4 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "C4BTR,CAN4 Bus Timing"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler"
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Delay from the nominal Sync point to the sample point" "1,2,3,4,?..."
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "3 times,Once"
|
|
endif
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*4))))&0x01)==0x00)
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "C4EWL,CAN4 Error Warning Limit"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "C4EWL,CAN4 Error Warning Limit"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "C4SR,CAN4 Status"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 15. " BS ,Bus Status" "Normal,Prohibited"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CANTFI, CANTID, CANTDA, and CANTDB Write Permission for Software" "Not permitted,Permitted"
|
|
bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RS ,Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ES ,Error Status" "No error,Error"
|
|
bitfld.long 0x00 23. " BS ,Bus Status" "Normal,Prohibited"
|
|
if (((data.byte(d:(0xE0040000+(0x00004000*4))))&0x01)==0x00)
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "C4RFS,CAN4 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "C4RDA,CAN4 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C4RDB,CAN4 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "C4RFS,CAN4 Receive frame status"
|
|
hexmask.long.word 0x00 0.--9. 1. " ID ,Zero-based number of the Lookup Table RAM entry"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "No meaning,AF Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "C4RDA,CAN4 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the current received message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the current received message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the current received message"
|
|
line.long 0x04 "C4RDB,CAN4 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the current received message"
|
|
endif
|
|
if ((((data.byte(d:(0xE0040000+(0x00004000*4))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*4))))&0x80000000)==0x00000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C4RID,CAN4 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*4))))&0x01)==0x00)&&(((data.long(d:(0xE0040020+(0x00004000*4))))&0x80000000)==0x80000000))
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "C4RID,CAN4 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*4))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*4))))&0x80000000)==0x00000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C4RID,CAN4 Received Identifier"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
elif ((((data.byte(d:(0xE0040000+(0x00004000*4))))&0x01)==0x01)&&(((data.long(d:(0xE0040020+(0x00004000*4))))&0x80000000)==0x80000000))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "C4RID,CAN4 Received Identifier"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "C4TFI1,CAN4 Transmit frame info (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040030+(0x00004000*4))))&0x80000000)==0x00000000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C4TID1,CAN4 Transmit Identifier (1)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "C4TID1,CAN4 Transmit Identifier (1)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "C4TDA1,CAN4 Transmit data bytes 1-4 (1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C4TDB1,CAN4 Transmit data bytes 5-8 (1)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "C4TFI2,CAN4 Transmit frame info (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040040+(0x00004000*4))))&0x80000000)==0x00000000)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C4TID2,CAN4 Transmit Identifier (2)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "C4TID2,CAN4 Transmit Identifier (2)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "C4TDA2,CAN4 Transmit data bytes 1-4 (2)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C4TDB2,CAN4 Transmit data bytes 5-8 (2)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "C4TFI3,CAN4 Transmit frame info (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,PRIO"
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 30. " RTR ,RTR" "0,1"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
if (((data.long(d:(0xE0040050+(0x00004000*4))))&0x80000000)==0x00000000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C4TID3,CAN4 Transmit Identifier (3)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "C4TID3,CAN4 Transmit Identifier (3)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "C4TDA3,CAN4 Transmit data bytes 1-4 (3)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data[1] ,First Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data[2] ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data[3] ,Third Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data[4] ,Fourth Data byte of the next transmit message"
|
|
line.long 0x04 "C4TDB3,CAN4 Transmit data bytes 5-8 (3)"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data[5] ,5th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data[6] ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data[7] ,7th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data[8] ,8th Data byte of the next transmit message"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Acceptance Filter"
|
|
width 0x0C
|
|
base 0xE003C000
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "AFMR,Acceptance Filter Register"
|
|
bitfld.byte 0x00 0. " AccOff ,Acceptance Filter Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " AccBP ,All Rx messages Acception on enabled CAN controllers" "Not accepted,Accepted"
|
|
bitfld.byte 0x00 2. " eFCAN ,Software/Acceptance Filter Read all Messages from CAN Receivers" "Software,AF"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SFF_sa,Standard Frame Individual Start Address Register"
|
|
hexmask.word.byte 0x00 2.--10. 4. " SFIADDR ,The start address of the table of individual Standard Identifiers in AF Lookup"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SFF_GRP_sa,Standard Frame Group Start Address Register"
|
|
hexmask.word 0x00 2.--11. 4. " SFGADDR ,The start address of the table of grouped Standard Identifiers in AF Lookup RAM"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "EFF_sa,Extended Frame Start Address Register"
|
|
hexmask.word.byte 0x00 2.--10. 4. " EFADDR ,The start address of the table of individual Extended Identifiers in AF Lookup RAM"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "EFF_GRP_sa,Extended Frame Group Start Address Register"
|
|
hexmask.word 0x00 2.--11. 4. " EFGADDR ,The start address of the table of grouped Extended Identifiers in AF Lookup RAM"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "ENDofTable,End of AF Tables Register"
|
|
hexmask.word 0x00 2.--11. 4. " ABVADDR ,The address above the last active address in the last active AF table"
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "LUTerrAd,LUT Error Address Register"
|
|
hexmask.word.byte 0x00 2.--10. 4. " ERRADDR ,Error address in AF Lookup Table RAM"
|
|
rgroup.byte 0x1c++0x0
|
|
line.byte 0x00 "LUTerr,LUT Error Register"
|
|
bitfld.byte 0x00 0. " ERR ,Acceptance Filter encountered an error in content of tables in AF RAM" "No Error,Error"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2468")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpU()=="LPC2470")||(cpU()=="LPC2478"))
|
|
base 0xE0040000
|
|
tree "Centralized CAN"
|
|
width 0x09
|
|
rgroup.long 0x00++0x0B
|
|
line.long 0x00 "CANTxSR,CAN Central Transmit Status Register"
|
|
bitfld.long 0x00 17. " TCS2 ,CAN2 Transmit Complete Status" "Not completed,Completed"
|
|
bitfld.long 0x00 16. " TCS1 ,CAN1 Transmit Complete Status" "Not completed,Completed"
|
|
bitfld.long 0x00 9. " TBS2 ,CAN2 Transmit Buffers Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TBS1 ,CAN1 Transmit Buffers Status" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " TS2 ,CAN2 Transmit Status" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " TS1 ,CAN1 Transmit Status" "Not busy,Busy"
|
|
line.long 0x04 "CANRxSR,CAN Central Receive Status Register"
|
|
bitfld.long 0x04 17. " DOS2 ,CAN2 Data Overrun Status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 16. " DOS1 ,CAN1 Data Overrun Status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 9. " RB2 ,CAN2 Receive Buffer Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 8. " RB1 ,CAN1 Receive Buffer Status" "Not ready,Ready"
|
|
bitfld.long 0x04 1. " RS2 ,CAN2 Receive Status" "Not busy,Busy"
|
|
bitfld.long 0x04 0. " RS1 ,CAN1 Receive Status" "Not busy,Busy"
|
|
line.long 0x08 "CANMSR,CAN Central Miscellaneous Register"
|
|
bitfld.long 0x08 9. " BS2 ,CAN2 Bus Status" "Normal,Bus-Off"
|
|
bitfld.long 0x08 8. " BS1 ,CAN1 Bus Status" "Normal,Bus-Off"
|
|
bitfld.long 0x08 1. " E2 ,CAN2 Error Status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 0. " E1 ,CAN1 Error Status" "No error,Error"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0044000
|
|
tree "CAN1"
|
|
width 0xA
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CAN1MOD,CAN1 Mode Register"
|
|
bitfld.byte 0x00 7. " TM ,Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TPM ,Transmit Priority Mode" "CAN ID,Tx Priority"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RM ,Reset Mode" "No reset,Reset"
|
|
wgroup.byte 0x04++0x00
|
|
line.byte 0x00 "CAN1CMR,CAN1 Command Register"
|
|
bitfld.byte 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted"
|
|
bitfld.byte 0x00 0. " TR ,Transmission Request" "Not requested,Requested"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CAN1GSR,CAN1 Global Controller Status and Error Counters"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Bus-On,Bus-Off"
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "CAN1ICR,CAN1 Interrupt status/Arbitration Lost Capture/Error Code Capture Register"
|
|
in
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "CAN1IER,CAN1 Interrupt Enable Register"
|
|
bitfld.long 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CAN1BTR,CAN1 Bus Timing Register"
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "Once,3 times"
|
|
bitfld.long 0x00 20.--22. " TESG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TESG1 ,Delay from the nominal Sync point to the sample point" "1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16."
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. 1. " BRP ,Baud Rate Prescaler"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "CAN1EWL,CAN1 Error Warning Limit Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "CAN1SR,CAN1 Status Register"
|
|
bitfld.long 0x00 23. " BS3 ,Bus Status 3" "Normal,Bus-Off"
|
|
bitfld.long 0x00 22. " ES3 ,Error Status 3" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress"
|
|
bitfld.long 0x00 20. " RS3 ,Receive Status 3" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed"
|
|
bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CAN1TFI/CAN1TID/CAN1TDA and CAN1TDB Write Permission for Software" "Locked,May write"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DOS3 ,Data Overrun Status 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " RBS3 ,Receive Buffer Status 3" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BS2 ,Bus Status 2" "Normal,Bus-Off"
|
|
bitfld.long 0x00 14. " ES2 ,Error Status 2" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress"
|
|
bitfld.long 0x00 12. " RS2 ,Receive Status 2" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed"
|
|
bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CAN1TFI/CAN1TID/CAN1TDA and CAN1TDB Write Permission for Software" "Locked,May write"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DOS2 ,Data Overrun Status 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " RBS2 ,Receive Buffer Status 2" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BS1 ,Bus Status 1" "Normal,Bus-Off"
|
|
bitfld.long 0x00 6. " ES1 ,Error Status 1" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress"
|
|
bitfld.long 0x00 4. " RS1 ,Receive Status 1" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed"
|
|
bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CAN1TFI/CAN1TID/CAN1TDA and CAN1TDB Write Permission for Software" "Locked,May write"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DOS1 ,Data Overrun Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " RBS1 ,Receive Buffer Status 1" "Not ready,Ready"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CAN1RFS,CAN1 Receive frame status Register"
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "Not AF Bypass,AF Bypass"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " IDIndex ,Zero-based number of the Lookup Table RAM entry"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "CAN1RDA,CAN1 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the current received message"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the current received message"
|
|
line.long 0x04 "CAN1RDB,CAN1 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the current received message"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the current received message"
|
|
if (((data.long(d:(0xE0040020+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CAN1RID,CAN1 Received Identifier Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CAN1RID,CAN1 Received Identifier Register"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CAN1TFI1,CAN1 Transmit frame Information Register (1)"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN1TDA/CAN1TDB,Remote Frame"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority"
|
|
if (((data.long(d:(0xE0040030+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CAN1TID1,CAN1 Transmit Identifier Register (1)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CAN1TID1,CAN1 Transmit Identifier Register (1)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "CAN1TDA1,CAN1 Transmit data bytes 1-4 (1)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message"
|
|
line.long 0x04 "CAN1TDB1,CAN1 Transmit data bytes 5-8 (1)"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAN1TFI2,CAN1 Transmit frame Information Register (2)"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN1TDA/CAN1TDB,Remote Frame"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority"
|
|
if (((data.long(d:(0xE0040040+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAN1TID2,CAN1 Transmit Identifier Register (2)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAN1TID2,CAN1 Transmit Identifier Register (2)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "CAN1TDA2,CAN1 Transmit data bytes 1-4 (2)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message"
|
|
line.long 0x04 "CAN1TDB2,CAN1 Transmit data bytes 5-8 (2)"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CAN1TFI3,CAN1 Transmit frame Information Register (3)"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN1TDA/CAN1TDB,Remote Frame"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority"
|
|
if (((data.long(d:(0xE0040050+(0x00004000*1))))&0x80000000)==0x00000000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CAN1TID3,CAN1 Transmit Identifier Register (3)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CAN1TID3,CAN1 Transmit Identifier Register (3)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "CAN1TDA3,CAN1 Transmit data bytes 1-4 (3)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message"
|
|
line.long 0x04 "CAN1TDB3,CAN1 Transmit data bytes 5-8 (3)"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE0048000
|
|
tree "CAN2"
|
|
width 0xA
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CAN2MOD,CAN2 Mode Register"
|
|
bitfld.byte 0x00 7. " TM ,Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " RPM ,Reverse Polarity Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SM ,Sleep Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TPM ,Transmit Priority Mode" "CAN ID,Tx Priority"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RM ,Reset Mode" "No reset,Reset"
|
|
wgroup.byte 0x04++0x00
|
|
line.byte 0x00 "CAN2CMR,CAN2 Command Register"
|
|
bitfld.byte 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted"
|
|
bitfld.byte 0x00 0. " TR ,Transmission Request" "Not requested,Requested"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CAN2GSR,CAN2 Global Controller Status and Error Counters"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BS ,Bus Status" "Bus-On,Bus-Off"
|
|
bitfld.long 0x00 6. " ES ,Error Status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy"
|
|
bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed"
|
|
bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready"
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "CAN2ICR,CAN2 Interrupt status/Arbitration Lost Capture/Error Code Capture Register"
|
|
in
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "CAN2IER,CAN2 Interrupt Enable Register"
|
|
bitfld.long 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WUIE ,Wake-Up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EIE ,Error Warning Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CAN2BTR,CAN2 Bus Timing Register"
|
|
bitfld.long 0x00 23. " SAM ,Bus Sampling" "Once,3 times"
|
|
bitfld.long 0x00 20.--22. " TESG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TESG1 ,Delay from the nominal Sync point to the sample point" "1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16."
|
|
bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. 1. " BRP ,Baud Rate Prescaler"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "CAN2EWL,CAN2 Error Warning Limit Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "CAN2SR,CAN2 Status Register"
|
|
bitfld.long 0x00 23. " BS3 ,Bus Status 3" "Normal,Bus-Off"
|
|
bitfld.long 0x00 22. " ES3 ,Error Status 3" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TS3 ,Tx Buffer 3 Transmission" "Not in progress,In progress"
|
|
bitfld.long 0x00 20. " RS3 ,Receive Status 3" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCS3 ,Tx Buffer 3 Previously Requested Transmission" "Not completed,Completed"
|
|
bitfld.long 0x00 18. " TBS3 ,Tx Buffer 3: CAN2TFI/CAN2TID/CAN2TDA and CAN2TDB Write Permission for Software" "Locked,May write"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DOS3 ,Data Overrun Status 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " RBS3 ,Receive Buffer Status 3" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BS2 ,Bus Status 2" "Normal,Bus-Off"
|
|
bitfld.long 0x00 14. " ES2 ,Error Status 2" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TS2 ,Tx Buffer 2 Transmission" "Not in progress,In progress"
|
|
bitfld.long 0x00 12. " RS2 ,Receive Status 2" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCS2 ,Tx Buffer 2 Previously Requested Transmission" "Not completed,Completed"
|
|
bitfld.long 0x00 10. " TBS2 ,Tx Buffer 2: CAN2TFI/CAN2TID/CAN2TDA and CAN2TDB Write Permission for Software" "Locked,May write"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DOS2 ,Data Overrun Status 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " RBS2 ,Receive Buffer Status 2" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BS1 ,Bus Status 1" "Normal,Bus-Off"
|
|
bitfld.long 0x00 6. " ES1 ,Error Status 1" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TS1 ,Tx Buffer 1 Transmission" "Not in progress,In progress"
|
|
bitfld.long 0x00 4. " RS1 ,Receive Status 1" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TCS1 ,Tx Buffer 1 Previously Requested Transmission" "Not completed,Completed"
|
|
bitfld.long 0x00 2. " TBS1 ,Tx Buffer 1: CAN2TFI/CAN2TID/CAN2TDA and CAN2TDB Write Permission for Software" "Locked,May write"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DOS1 ,Data Overrun Status 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " RBS1 ,Receive Buffer Status 1" "Not ready,Ready"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CAN2RFS,CAN2 Receive frame status Register"
|
|
bitfld.long 0x00 31. " FF ,current Received Message Identifier Width" "11-bit,29-bit"
|
|
bitfld.long 0x00 30. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
bitfld.long 0x00 10. " BP ,Current Message Received Mode" "Not AF Bypass,AF Bypass"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " IDIndex ,Zero-based number of the Lookup Table RAM entry"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "CAN2RDA,CAN2 Received data bytes 1-4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the current received message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the current received message"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the current received message"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the current received message"
|
|
line.long 0x04 "CAN2RDB,CAN2 Received data bytes 5-8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the current received message"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the current received message"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the current received message"
|
|
if (((data.long(d:(0xE0040020+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CAN2RID,CAN2 Received Identifier Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Received Identifier"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CAN2RID,CAN2 Received Identifier Register"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Received Identifier"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CAN2TFI1,CAN2 Transmit frame Information Register (1)"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN2TDA/CAN2TDB,Remote Frame"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority"
|
|
if (((data.long(d:(0xE0040030+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CAN2TID1,CAN2 Transmit Identifier Register (1)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CAN2TID1,CAN2 Transmit Identifier Register (1)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "CAN2TDA1,CAN2 Transmit data bytes 1-4 (1)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message"
|
|
line.long 0x04 "CAN2TDB1,CAN2 Transmit data bytes 5-8 (1)"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAN2TFI2,CAN2 Transmit frame Information Register (2)"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN2TDA/CAN2TDB,Remote Frame"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority"
|
|
if (((data.long(d:(0xE0040040+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAN2TID2,CAN2 Transmit Identifier Register (2)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAN2TID2,CAN2 Transmit Identifier Register (2)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "CAN2TDA2,CAN2 Transmit data bytes 1-4 (2)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message"
|
|
line.long 0x04 "CAN2TDB2,CAN2 Transmit data bytes 5-8 (2)"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CAN2TFI3,CAN2 Transmit frame Information Register (3)"
|
|
bitfld.long 0x00 31. " FF ,Next Transmit Message Identifier Width" "11-bit,29-bit"
|
|
bitfld.long 0x00 30. " RTR ,This value is sent in the RTR bit of the next transmit message" "CAN2TDA/CAN2TDB,Remote Frame"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIO ,Priority"
|
|
if (((data.long(d:(0xE0040050+(0x00004000*2))))&0x80000000)==0x00000000)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CAN2TID3,CAN2 Transmit Identifier Register (3)"
|
|
hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CAN2TID3,CAN2 Transmit Identifier Register (3)"
|
|
hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier"
|
|
endif
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "CAN2TDA3,CAN2 Transmit data bytes 1-4 (3)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Data_4 ,Fourth Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 16.--23. 1. " Data_3 ,Third Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " Data_2 ,Second Data byte of the next transmit message"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Data_1 ,First Data byte of the next transmit message"
|
|
line.long 0x04 "CAN2TDB3,CAN2 Transmit data bytes 5-8 (3)"
|
|
hexmask.long.byte 0x04 24.--31. 1. " Data_8 ,8th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 16.--23. 1. " Data_7 ,7th Data byte of the next transmit message"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " Data_6 ,6th Data byte of the next transmit message"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Data_5 ,5th Data byte of the next transmit message"
|
|
width 0x0B
|
|
tree.end
|
|
base 0xE003C000
|
|
tree "Acceptance Filter"
|
|
width 0x0C
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "AFMR,Acceptance Filter Mode Register"
|
|
bitfld.long 0x00 2. " eFCAN ,Software/Acceptance Filter Read all Messages from CAN Receivers" "Software,AF"
|
|
bitfld.long 0x00 1. " AccBP ,All Rx messages Acception on enabled CAN controllers" "Not accepted,Accepted"
|
|
bitfld.long 0x00 0. " AccOff ,Acceptance Filter Enable" "Disabled,Enabled"
|
|
line.long 0x4 "SFF_sa,Standard Frame Individual Start Address Register"
|
|
hexmask.long 0x4 2.--10. 4. " SFF_sa ,The start address of the table of individual Standard Identifiers in AF Lookup"
|
|
line.long 0x8 "SFF_GRP_sa,Standard Frame Group Start Address Register"
|
|
hexmask.long 0x8 2.--11. 4. " SFF_GRP_sa ,The start address of the table of grouped Standard Identifiers in AF Lookup RAM"
|
|
line.long 0xC "EFF_sa,Extended Frame Start Address Register"
|
|
hexmask.long 0xC 2.--10. 4. " EFF_sa ,The start address of the table of individual Extended Identifiers in AF Lookup RAM"
|
|
line.long 0x10 "EFF_GRP_sa,Extended Frame Group Start Address Register"
|
|
hexmask.long 0x10 2.--11. 4. " Eff_GRP_sa ,The start address of the table of grouped Extended Identifiers in AF Lookup RAM"
|
|
line.long 0x14 "ENDofTable,End of AF Tables Register"
|
|
hexmask.long 0x14 2.--11. 4. " EndofTable ,The address above the last active address in the last active AF table"
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x00 "LUTerrAd,LUT Error Address Register"
|
|
in
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LUTerr,LUT Error Register"
|
|
bitfld.long 0x0 0. " LUTerr ,Acceptance Filter encountered an error in content of tables in AF RAM" "No Error,Error"
|
|
width 0x9
|
|
tree "FullCAN Interrupt and Capture registers"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "FCANIE,Global FullCANInterrupt Enable register"
|
|
bitfld.long 0x0 0. " FCANIE ,Global FullCAN Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "FCANIC0,FullCAN Interrupt and Capture register 0"
|
|
bitfld.long 0x0 31. " IntPnd31 ,FullCan Interrupt Pending bit 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 30. " IntPnd30 ,FullCan Interrupt Pending bit 30" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 29. " IntPnd29 ,FullCan Interrupt Pending bit 29" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 28. " IntPnd28 ,FullCan Interrupt Pending bit 28" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 27. " IntPnd27 ,FullCan Interrupt Pending bit 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 26. " IntPnd26 ,FullCan Interrupt Pending bit 26" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 25. " IntPnd25 ,FullCan Interrupt Pending bit 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 24. " IntPnd24 ,FullCan Interrupt Pending bit 24" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 23. " IntPnd23 ,FullCan Interrupt Pending bit 23" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 22. " IntPnd22 ,FullCan Interrupt Pending bit 22" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 21. " IntPnd21 ,FullCan Interrupt Pending bit 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 20. " IntPnd20 ,FullCan Interrupt Pending bit 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 19. " IntPnd19 ,FullCan Interrupt Pending bit 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 18. " IntPnd18 ,FullCan Interrupt Pending bit 18" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 17. " IntPnd17 ,FullCan Interrupt Pending bit 17" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 16. " IntPnd16 ,FullCan Interrupt Pending bit 16" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 15. " IntPnd15 ,FullCan Interrupt Pending bit 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 14. " IntPnd14 ,FullCan Interrupt Pending bit 14" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 13. " IntPnd13 ,FullCan Interrupt Pending bit 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 12. " IntPnd12 ,FullCan Interrupt Pending bit 12" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 11. " IntPnd11 ,FullCan Interrupt Pending bit 11" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 10. " IntPnd10 ,FullCan Interrupt Pending bit 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 9. " IntPnd9 ,FullCan Interrupt Pending bit 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 8. " IntPnd8 ,FullCan Interrupt Pending bit 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 7. " IntPnd7 ,FullCan Interrupt Pending bit 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " IntPnd6 ,FullCan Interrupt Pending bit 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 5. " IntPnd5 ,FullCan Interrupt Pending bit 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 4. " IntPnd4 ,FullCan Interrupt Pending bit 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " IntPnd3 ,FullCan Interrupt Pending bit 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " IntPnd2 ,FullCan Interrupt Pending bit 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IntPnd1 ,FullCan Interrupt Pending bit 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " IntPnd0 ,FullCan Interrupt Pending bit 0" "No interrupt,Interrupt"
|
|
line.long 0x4 "FCANIC1,FullCAN Interrupt and Capture register 1"
|
|
bitfld.long 0x4 31. " IntPnd63 ,FullCan Interrupt Pending bit 63" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 30. " IntPnd62 ,FullCan Interrupt Pending bit 62" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 29. " IntPnd61 ,FullCan Interrupt Pending bit 61" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 28. " IntPnd60 ,FullCan Interrupt Pending bit 60" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 27. " IntPnd59 ,FullCan Interrupt Pending bit 59" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 26. " IntPnd58 ,FullCan Interrupt Pending bit 58" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 25. " IntPnd57 ,FullCan Interrupt Pending bit 57" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 24. " IntPnd56 ,FullCan Interrupt Pending bit 56" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 23. " IntPnd55 ,FullCan Interrupt Pending bit 55" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 22. " IntPnd54 ,FullCan Interrupt Pending bit 54" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 21. " IntPnd53 ,FullCan Interrupt Pending bit 53" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 20. " IntPnd52 ,FullCan Interrupt Pending bit 52" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 19. " IntPnd51 ,FullCan Interrupt Pending bit 51" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 18. " IntPnd50 ,FullCan Interrupt Pending bit 50" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 17. " IntPnd49 ,FullCan Interrupt Pending bit 49" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 16. " IntPnd48 ,FullCan Interrupt Pending bit 48" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 15. " IntPnd47 ,FullCan Interrupt Pending bit 47" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 14. " IntPnd46 ,FullCan Interrupt Pending bit 46" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 13. " IntPnd45 ,FullCan Interrupt Pending bit 45" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 12. " IntPnd44 ,FullCan Interrupt Pending bit 44" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 11. " IntPnd43 ,FullCan Interrupt Pending bit 43" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 10. " IntPnd42 ,FullCan Interrupt Pending bit 42" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 9. " IntPnd41 ,FullCan Interrupt Pending bit 41" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 8. " IntPnd40 ,FullCan Interrupt Pending bit 40" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 7. " IntPnd39 ,FullCan Interrupt Pending bit 39" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " IntPnd38 ,FullCan Interrupt Pending bit 38" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 5. " IntPnd37 ,FullCan Interrupt Pending bit 37" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 4. " IntPnd36 ,FullCan Interrupt Pending bit 36" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 3. " IntPnd35 ,FullCan Interrupt Pending bit 35" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " IntPnd34 ,FullCan Interrupt Pending bit 34" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " IntPnd33 ,FullCan Interrupt Pending bit 33" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " IntPnd32 ,FullCan Interrupt Pending bit 32" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; USB
|
|
; --------------------------------------------------------------------------------
|
|
tree "USB Device Controller"
|
|
sif (cpu()=="LPC2141"||cpu()=="LPC2142"||cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
width 19.
|
|
tree "Device Interrupt Registers"
|
|
base 0xE01FC1C0
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "USBINTST,USB Interrupt Status Register"
|
|
bitfld.long 0x00 31. " EN_USB_INTS ,Enable USB Interrupts" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " USB_NEED_CLK ,USB Need Clock Indicator" "Not needed,Needed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " USB_INT_REQ_DMA ,DMA Interrupt Line Status" "Not reqeuested,Requested"
|
|
bitfld.long 0x00 1. " USB_INT_REQ_HP ,High Priority Interrupt Line Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " USB_INT_REQ_LP ,Low Priority Interrupt Line Status" "Not requested,Requested"
|
|
base 0xE0090000
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "USBDEVINT_SET/CLR,Set/Clear USB Device Interrupt Register"
|
|
setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " ERR_INT ,Error Interrupt" "No error,Error"
|
|
setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " EP_RLZED ,Endpoints Realized" "Not realized,Realized"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " TX_ENDPKT ,Number of Bytes Transferred to FIFO Equals TxPacket Lenght" "Not equal,Equal"
|
|
setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " RXENDPKT ,Packet in FIFO Transfered to the CPU" "Not transferred,Transferred"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " CDFULL ,Command Data Register Full" "Not full,Full"
|
|
setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " CCEMPTY ,Command Code Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " DEV_STAT ,USB Bus Reset or Suspend or Connect Change Event" "Not occured,Occured"
|
|
setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " EP_SLOW ,Slow Interrupt Transfer for the Endpoint" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " EP_FAST ,Fast Interrupt Transfer for the Endpoint" "Not occured,Occured"
|
|
setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " FRAME ,Frame Interrupt" "Not occured,Occured"
|
|
line.long 0x04 "USBDEVINTEN,USB Device Interrupt Enable Register"
|
|
bitfld.long 0x04 9. " ERR_INT ,Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " EP_RLZED ,Endpoints Realized" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TX_ENDPKT ,Number of Bytes Transferred to FIFO Equals TxPacket Lenght" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " RXENDPKT ,Packet in FIFO Transfered to the CPU" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " CDFULL ,Command Data Register Full" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " CCEMPTY ,Command Code Register Empty" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DEV_STAT ,USB Bus Reset or Suspend or Connect Change Event" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " EP_SLOW ,Slow Interrupt Transfer for the Endpoint" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EP_FAST ,Fast Interrupt Transfer for the Endpoint" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " FRAME ,Frame Interrupt" "Disabled,Enabled"
|
|
if ((data.byte(ad:0xE009002C)&0x3)==0x1)
|
|
wgroup.byte 0x2C++0x0
|
|
line.byte 0x00 "USBDEVINTPRI,USB Device Interrupt Priority Register"
|
|
bitfld.byte 0x00 1. " EP_FAST ,EP_FAST Interrupt Priority" "Low,?..."
|
|
bitfld.byte 0x00 0. " FRAME ,FRAME Interrupt Priority" "Low,High"
|
|
elif ((data.byte(ad:0xE009002C)&0x3)==0x2)
|
|
wgroup.byte 0x2C++0x0
|
|
line.byte 0x00 "USBDEVINTPRI,USB Device Interrupt Priority Register"
|
|
bitfld.byte 0x00 1. " EP_FAST ,EP_FAST Interrupt Priority" "Low,High"
|
|
bitfld.byte 0x00 0. " FRAME ,FRAME Interrupt Priority" "Low,?..."
|
|
elif ((data.byte(ad:0xE009002C)&0x3)==0x3)
|
|
wgroup.byte 0x2C++0x0
|
|
line.byte 0x00 "USBDEVINTPRI,USB Device Interrupt Priority Register"
|
|
bitfld.byte 0x00 1. " EP_FAST ,EP_FAST Interrupt Priority" "Low,?..."
|
|
bitfld.byte 0x00 0. " FRAME ,FRAME Interrupt Priority" "Low,?..."
|
|
else
|
|
wgroup.byte 0x2C++0x0
|
|
line.byte 0x00 "USBDEVINTPRI,USB Device Interrupt Priority Register"
|
|
bitfld.byte 0x00 1. " EP_FAST ,EP_FAST Interrupt Priority" "Low,High"
|
|
bitfld.byte 0x00 0. " FRAME ,FRAME Interrupt Priority" "Low,High"
|
|
endif
|
|
tree.end
|
|
width 18.
|
|
tree "Endpoint Interrupt Registers"
|
|
group.long 0x30++0x0F
|
|
line.long 0x00 "USBEPINT_SET/CLR,SET/CLEAR USB Endpoint Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x0C 31. 0x08 31. " EP15TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 15)" "Not occured,Occured"
|
|
setclrfld.long 0x00 30. 0x0C 30. 0x08 30. " EP15RX ,Data Received Interrupt (Endpoint 15)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x0C 29. 0x08 29. " EP14TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 14)" "Not occured,Occured"
|
|
setclrfld.long 0x00 28. 0x0C 28. 0x08 28. " EP14RX ,Data Received Interrupt (Endpoint 14)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x0C 27. 0x08 27. " EP13TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 13)" "Not occured,Occured"
|
|
setclrfld.long 0x00 26. 0x0C 26. 0x08 26. " EP13RX ,Data Received Interrupt (Endpoint 13)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x0C 25. 0x08 25. " EP12TX ,Isochronous Endpoint (Endpoint 12)" "Not occured,Occured"
|
|
setclrfld.long 0x00 24. 0x0C 24. 0x08 24. " EP12RX ,Isochronous Endpoint (Endpoint 12)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x0C 23. 0x08 23. " EP11TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 11)" "Not occured,Occured"
|
|
setclrfld.long 0x00 22. 0x0C 22. 0x08 22. " EP11RX ,Data Received Interrupt (Endpoint 11)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x0C 21. 0x08 21. " EP10TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 10)" "Not occured,Occured"
|
|
setclrfld.long 0x00 20. 0x0C 20. 0x08 20. " EP10RX ,Data Received Interrupt (Endpoint 10)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x0C 19. 0x08 19. " EP9TX ,Isochronous Endpoint (Endpoint 9)" "Not occured,Occured"
|
|
setclrfld.long 0x00 18. 0x0C 18. 0x08 18. " EP9RX ,Isochronous Endpoint (Endpoint 9)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x0C 17. 0x08 17. " EP8TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 8)" "Not occured,Occured"
|
|
setclrfld.long 0x00 16. 0x0C 16. 0x08 16. " EP8RX ,Data Received Interrupt (Endpoint 8)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x0C 15. 0x08 15. " EP7TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 7)" "Not occured,Occured"
|
|
setclrfld.long 0x00 14. 0x0C 14. 0x08 14. " EP7RX ,Data Received Interrupt (Endpoint 7)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x0C 13. 0x08 13. " EP6TX ,Isochronous Endpoint (Endpoint 6)" "Not occured,Occured"
|
|
setclrfld.long 0x00 12. 0x0C 12. 0x08 12. " EP6RX ,Isochronous Endpoint (Endpoint 6)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " EP5TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 5)" "Not occured,Occured"
|
|
setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " EP5RX ,Data Received Interrupt (Endpoint 5)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " EP4TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 4)" "Not occured,Occured"
|
|
setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " EP4RX ,Data Received Interrupt (Endpoint 4)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " EP3TX ,Isochronous Endpoint (Endpoint 3)" "Not occured,Occured"
|
|
setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " EP3RX ,Isochronous Endpoint (Endpoint 3)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " EP2TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 2)" "Not occured,Occured"
|
|
setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " EP2RX ,Data Received Interrupt (Endpoint 2)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " EP1TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 1)" "Not occured,Occured"
|
|
setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " EP1RX ,Data Received Interrupt (Endpoint 1)" "Not occured,Occured"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " EP0TX ,Data Transmitted Interrupt/Sent NAK (Endpoint 0)" "Not occured,Occured"
|
|
setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " EP0RX ,Data Received Interrupt (Endpoint 0)" "Not occured,Occured"
|
|
line.long 0x04 "USBEPINTEN,USB Endpoint Interrupt Enable Register"
|
|
bitfld.long 0x04 31. " EP15TX ,USBEPINTST[31] Status Transfers to the USBDEVINTST[31]" "No effect,Trasferred"
|
|
bitfld.long 0x04 30. " EP15RX ,USBEPINTST[30] Status Transfers to the USBDEVINTST[30]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 29. " EP14TX ,USBEPINTST[29] Status Transfers to the USBDEVINTST[29]" "No effect,Trasferred"
|
|
bitfld.long 0x04 28. " EP14RX ,USBEPINTST[28] Status Transfers to the USBDEVINTST[28]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 27. " EP13TX ,USBEPINTST[27] Status Transfers to the USBDEVINTST[27]" "No effect,Trasferred"
|
|
bitfld.long 0x04 26. " EP13RX ,USBEPINTST[26] Status Transfers to the USBDEVINTST[26]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 25. " EP12TX ,USBEPINTST[25] Status Transfers to the USBDEVINTST[25]" "No effect,Trasferred"
|
|
bitfld.long 0x04 24. " EP12RX ,USBEPINTST[24] Status Transfers to the USBDEVINTST[24]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 23. " EP11TX ,USBEPINTST[23] Status Transfers to the USBDEVINTST[23]" "No effect,Trasferred"
|
|
bitfld.long 0x04 22. " EP11RX ,USBEPINTST[22] Status Transfers to the USBDEVINTST[22]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 21. " EP10TX ,USBEPINTST[21] Status Transfers to the USBDEVINTST[21]" "No effect,Trasferred"
|
|
bitfld.long 0x04 20. " EP10RX ,USBEPINTST[20] Status Transfers to the USBDEVINTST[20]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 19. " EP9TX ,USBEPINTST[19] Status Transfers to the USBDEVINTST[19]" "No effect,Trasferred"
|
|
bitfld.long 0x04 18. " EP9RX ,USBEPINTST[18] Status Transfers to the USBDEVINTST[18]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 17. " EP8TX ,USBEPINTST[17] Status Transfers to the USBDEVINTST[17]" "No effect,Trasferred"
|
|
bitfld.long 0x04 16. " EP8RX ,USBEPINTST[16] Status Transfers to the USBDEVINTST[16]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 15. " EP7TX ,USBEPINTST[15] Status Transfers to the USBDEVINTST[15]" "No effect,Trasferred"
|
|
bitfld.long 0x04 14. " EP7RX ,USBEPINTST[14] Status Transfers to the USBDEVINTST[14]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 13. " EP6TX ,USBEPINTST[13] Status Transfers to the USBDEVINTST[13]" "No effect,Trasferred"
|
|
bitfld.long 0x04 12. " EP6RX ,USBEPINTST[12] Status Transfers to the USBDEVINTST[12]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 11. " EP5TX ,USBEPINTST[11] Status Transfers to the USBDEVINTST[11]" "No effect,Trasferred"
|
|
bitfld.long 0x04 10. " EP5RX ,USBEPINTST[10] Status Transfers to the USBDEVINTST[10]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 9. " EP4TX ,USBEPINTST[9] Status Transfers to the USBDEVINTST[9]" "No effect,Trasferred"
|
|
bitfld.long 0x04 8. " EP4RX ,USBEPINTST[8] Status Transfers to the USBDEVINTST[8]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 7. " EP3TX ,USBEPINTST[7] Status Transfers to the USBDEVINTST[7]" "No effect,Trasferred"
|
|
bitfld.long 0x04 6. " EP3RX ,USBEPINTST[6] Status Transfers to the USBDEVINTST[6]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 5. " EP2TX ,USBEPINTST[5] Status Transfers to the USBDEVINTST[5]" "No effect,Trasferred"
|
|
bitfld.long 0x04 4. " EP2RX ,USBEPINTST[4] Status Transfers to the USBDEVINTST[4]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " EP1TX ,USBEPINTST[3] Status Transfers to the USBDEVINTST[3]" "No effect,Trasferred"
|
|
bitfld.long 0x04 2. " EP1RX ,USBEPINTST[2] Status Transfers to the USBDEVINTST[2]" "No effect,Trasferred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EP0TX ,USBEPINTST[1] Status Transfers to the USBDEVINTST[1]" "No effect,Trasferred"
|
|
bitfld.long 0x04 0. " EP0RX ,USBEPINTST[0] Status Transfers to the USBDEVINTST[0]" "No effect,Trasferred"
|
|
wgroup.long 0x40++0x3
|
|
line.long 0x00 "USBEPINTPRI,USB Endpoint Interrupt Priority Register"
|
|
bitfld.long 0x00 31. " EP15TX ,EP15TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 30. " EP15RX ,EP15RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EP14TX ,EP14TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 28. " EP14RX ,EP14RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EP13TX ,EP13TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 26. " EP13RX ,EP13RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EP12TX ,EP12TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 24. " EP12RX ,EP12RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EP11TX ,EP11TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 22. " EP11RX ,EP11RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EP10TX ,EP10TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 20. " EP10RX ,EP10RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EP9TX ,EP9TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 18. " EP9RX ,EP9RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EP8TX ,EP8TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 16. " EP8RX ,EP8RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EP7TX ,EP7TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 14. " EP7RX ,EP7RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EP6TX ,EP6TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 12. " EP6RX ,EP6RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EP5TX ,EP5TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 10. " EP5RX ,EP5RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EP4TX ,EP4TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 8. " EP4RX ,EP4RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EP3TX ,EP3TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 6. " EP3RX ,EP3RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EP2TX ,EP2TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 4. " EP2RX ,EP2RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EP1TX ,EP1TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 2. " EP1RX ,EP1RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EP0TX ,EP0TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 0. " EP0RX ,EP0RX Interrupt Priority" "Slow,Fast"
|
|
tree.end
|
|
width 13.
|
|
tree "Endpoint Realization Registers"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "USBREEP,USB Realize Endpoint Register"
|
|
bitfld.long 0x00 31. " EP31 ,Control Endpoint EP31" "Not realized,Realized"
|
|
bitfld.long 0x00 30. " EP30 ,Control Endpoint EP30" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EP29 ,Control Endpoint EP29" "Not realized,Realized"
|
|
bitfld.long 0x00 28. " EP28 ,Control Endpoint EP28" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EP27 ,Control Endpoint EP27" "Not realized,Realized"
|
|
bitfld.long 0x00 26. " EP26 ,Control Endpoint EP26" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EP25 ,Control Endpoint EP25" "Not realized,Realized"
|
|
bitfld.long 0x00 24. " EP24 ,Control Endpoint EP24" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EP23 ,Control Endpoint EP23" "Not realized,Realized"
|
|
bitfld.long 0x00 22. " EP22 ,Control Endpoint EP22" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EP21 ,Control Endpoint EP21" "Not realized,Realized"
|
|
bitfld.long 0x00 20. " EP20 ,Control Endpoint EP20" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EP19 ,Control Endpoint EP19" "Not realized,Realized"
|
|
bitfld.long 0x00 18. " EP18 ,Control Endpoint EP18" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EP17 ,Control Endpoint EP17" "Not realized,Realized"
|
|
bitfld.long 0x00 16. " EP16 ,Control Endpoint EP16" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EP15 ,Control Endpoint EP15" "Not realized,Realized"
|
|
bitfld.long 0x00 14. " EP14 ,Control Endpoint EP14" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EP13 ,Control Endpoint EP13" "Not realized,Realized"
|
|
bitfld.long 0x00 12. " EP12 ,Control Endpoint EP12" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EP11 ,Control Endpoint EP11" "Not realized,Realized"
|
|
bitfld.long 0x00 10. " EP10 ,Control Endpoint EP10" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 9. " E9 ,Control Endpoint EP9" "Not realized,Realized"
|
|
bitfld.long 0x00 8. " EP8 ,Control Endpoint EP8" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EP7 ,Control Endpoint EP7" "Not realized,Realized"
|
|
bitfld.long 0x00 6. " EP6 ,Control Endpoint EP6" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EP5 ,Control Endpoint EP5" "Not realized,Realized"
|
|
bitfld.long 0x00 4. " EP4 ,Control Endpoint EP4" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EP3 ,Control Endpoint EP3" "Not realized,Realized"
|
|
bitfld.long 0x00 2. " EP2 ,Control Endpoint EP2" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EP1 ,Control Endpoint EP1" "Not realized,Realized"
|
|
bitfld.long 0x00 0. " EP0 ,Control Endpoint EP0" "Not realized,Realized"
|
|
wgroup.long 0x48++0x03
|
|
line.long 0x00 "USBEPIN,USB Endpoint Index Register"
|
|
bitfld.long 0x00 0.--4. " PHY_ENDP ,Physical Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "USBMAXPSIZE,USB MaxPacketSize Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " MAXPACKETSIZE ,The Maximum Packet Size Value"
|
|
tree.end
|
|
tree "USB Transfer Registers"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "USBRXDATA,USB Receive Data Register"
|
|
hexmask.long.long 0x00 0.--31. 1. " RECEIVEDATA ,Data Received"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "USB,Receive Packet Length Register"
|
|
bitfld.long 0x00 11. " PKT_RDY ,Packet is Ready for Reading" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " DV ,Data Validate" "Invalid,Valid"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " PKT_LNGTH ,Remaining Amount of Data in Bytes Still to be Read from RAM"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "USBTXDATA,USB Transmit Data Register"
|
|
hexmask.long.long 0x00 0.--31. 1. " TXDATA ,Transmit Data"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "USBTXPLEN,USB Transmit Packet Length Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " PKT_LNGTH ,Remaining Amount of Data in Bytes Still to be Written to EP_RAM"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "USBCTRL,USB Control Register"
|
|
bitfld.long 0x00 2.--5. " LOG_ENDPOINT ,Logical Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " WR_EN ,Write Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RD_EN ,Read Mode Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree "Command Registers"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "USBCMDCODE,USB Command Code Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMD_PHASE , Command Phase"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CMD_CODE ,Code for Command"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "USBCMDDATA,USB Command Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " COMMANDDATA ,Command Data"
|
|
tree.end
|
|
sif (cpu()=="LPC2144"||cpu()=="LPC2146"||cpu()=="LPC2148"||cpu()=="LPC2158")
|
|
width 22.
|
|
base 0xE0090000
|
|
tree "DMA Registers"
|
|
group.long 0x50++0x0B
|
|
line.long 0x00 "USBDMARST_SET/CLR,Set/Clear USB DMA Request"
|
|
setclrfld.long 0x00 31. 0x08 31. 0x04 31. " EP31 ,Endpoint 31 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 30. 0x08 30. 0x04 30. " EP30 ,Endpoint 30 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x08 29. 0x04 29. " EP29 ,Endpoint 29 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 28. 0x08 28. 0x04 28. " EP28 ,Endpoint 28 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x08 27. 0x04 27. " EP27 ,Endpoint 27 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 26. 0x08 26. 0x04 26. " EP26 ,Endpoint 26 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x08 25. 0x04 25. " EP25 ,Endpoint 25 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 24. 0x08 24. 0x04 24. " EP24 ,Endpoint 24 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x08 23. 0x04 23. " EP23 ,Endpoint 23 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 22. 0x08 22. 0x04 22. " EP22 ,Endpoint 22 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x08 21. 0x04 21. " EP21 ,Endpoint 21 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 20. 0x08 20. 0x04 20. " EP10 ,Endpoint 20 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x08 19. 0x04 19. " EP19 ,Endpoint 19 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 18. 0x08 18. 0x04 18. " EP18 ,Endpoint 18 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x08 17. 0x04 17. " EP17 ,Endpoint 17 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x04 16. " EP16 ,Endpoint 16 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " EP15 ,Endpoint 15 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " EP14 ,Endpoint 14 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " EP13 ,Endpoint 13 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " EP12 ,Endpoint 12 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " EP11 ,Endpoint 11 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " EP10 ,Endpoint 10 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " EP9 ,Endpoint 9 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " EP8 ,Endpoint 8 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " EP7 ,Endpoint 7 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " EP6 ,Endpoint 6 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " EP5 ,Endpoint 5 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " EP4 ,Endpoint 4 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " EP3 ,Endpoint 3 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " EP2 ,Endpoint 2 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " EP1 ,Control Endpoint IN" "Low,High"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " EP0 ,Control Endpoint OUT" "Low,High"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "USBUDCAH,USB UDCA Head"
|
|
hexmask.long 0x00 7.--31. 1. " UDCA_HEADER ,Start Address of the UDCA Header"
|
|
hexmask.long 0x00 0.--6. 1. " ALIGN128 ,UDCA Header is Aligned in 128-byte Boundaries"
|
|
group.long 0x84++0x0B
|
|
line.long 0x00 "USBEPDMA_SET/CLR,Set/Clear USB Endpoint DMA"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EP31DMAEN ,Endpoint 31 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " EP30DMAEN ,Endpoint 30 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " EP29DMAEN ,Endpoint 29 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EP28DMAEN ,Endpoint 28 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " EP27DMAEN ,Endpoint 27 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " EP26DMAEN ,Endpoint 26 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " EP25DMAEN ,Endpoint 25 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " EP24DMAEN ,Endpoint 24 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " EP23DMAEN ,Endpoint 23 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " EP22DMAEN ,Endpoint 22 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " EP21DMAEN ,Endpoint 21 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " EP10DMAEN ,Endpoint 20 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EP19DMAEN ,Endpoint 19 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " EP18DMAEN ,Endpoint 18 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " EP17DMAEN ,Endpoint 17 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " EP16DMAEN ,Endpoint 16 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EP15DMAEN ,Endpoint 15 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EP14DMAEN ,Endpoint 14 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " EP13DMAEN ,Endpoint 13 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " EP12DMAEN ,Endpoint 12 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " EP11DMAEN ,Endpoint 11 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " EP10DMAEN ,Endpoint 10 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " EP9DMAEN ,Endpoint 9 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " EP8DMAEN ,Endpoint 8 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " EP7DMAEN ,Endpoint 7 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " EP6DMAEN ,Endpoint 6 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " EP5DMAEN ,Endpoint 5 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EP4DMAEN ,Endpoint 4 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EP3DMAEN ,Endpoint 3 DMA Request" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EP2DMAEN ,Endpoint 2 DMA Request" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " EP1DMAEN ,Control Endpoint IN" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EP0DMAEN ,Control Endpoint OUT" "Low,High"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "USBDMAINTST,USB DMA Interrupt Status Register"
|
|
bitfld.long 0x00 2. " EOTINT ,End of Transfer Interrupt" "Not occured,Occured"
|
|
bitfld.long 0x00 1. " NEWDDREQINT ,New DD Request Interrupt" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYSERRINT ,System Error Interrupt" "Not occured,Occured"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "USBDMAINTEN,USB DMA Interrupt Enable Register"
|
|
bitfld.long 0x00 2. " EOTINT ,End of Transfer Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " NEWDDREQINT ,New DD Request Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYSERRINT ,System Error Interrupt" "Disabled,Enabled"
|
|
group.long 0xA0++0x23
|
|
line.long 0x00 "USBEOTINT_SET/CLR,Set/Clear USB End of Transfer Interrupt"
|
|
setclrfld.long 0x00 31. 0x08 31. 0x04 31. " EP31 ,End of Transfer Interrupt Request for Endpoint 31" "No requested,Requested"
|
|
setclrfld.long 0x00 30. 0x08 30. 0x04 30. " EP30 ,End of Transfer Interrupt Request for Endpoint 30" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x08 29. 0x04 29. " EP29 ,End of Transfer Interrupt Request for Endpoint 29" "No requested,Requested"
|
|
setclrfld.long 0x00 28. 0x08 28. 0x04 28. " EP28 ,End of Transfer Interrupt Request for Endpoint 28" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x08 27. 0x04 27. " EP27 ,End of Transfer Interrupt Request for Endpoint 27" "No requested,Requested"
|
|
setclrfld.long 0x00 26. 0x08 26. 0x04 26. " EP26 ,End of Transfer Interrupt Request for Endpoint 26" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x08 25. 0x04 25. " EP25 ,End of Transfer Interrupt Request for Endpoint 25" "No requested,Requested"
|
|
setclrfld.long 0x00 24. 0x08 24. 0x04 24. " EP24 ,End of Transfer Interrupt Request for Endpoint 24" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x08 23. 0x04 23. " EP23 ,End of Transfer Interrupt Request for Endpoint 23" "No requested,Requested"
|
|
setclrfld.long 0x00 22. 0x08 22. 0x04 22. " EP22 ,End of Transfer Interrupt Request for Endpoint 22" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x08 21. 0x04 21. " EP21 ,End of Transfer Interrupt Request for Endpoint 21" "No requested,Requested"
|
|
setclrfld.long 0x00 20. 0x08 20. 0x04 20. " EP20 ,End of Transfer Interrupt Request for Endpoint 20" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x08 19. 0x04 19. " EP19 ,End of Transfer Interrupt Request for Endpoint 19" "No requested,Requested"
|
|
setclrfld.long 0x00 18. 0x08 18. 0x04 18. " EP18 ,End of Transfer Interrupt Request for Endpoint 18" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x08 17. 0x04 17. " EP17 ,End of Transfer Interrupt Request for Endpoint 17" "No requested,Requested"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x04 16. " EP16 ,End of Transfer Interrupt Request for Endpoint 16" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " EP15 ,End of Transfer Interrupt Request for Endpoint 15" "No requested,Requested"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " EP14 ,End of Transfer Interrupt Request for Endpoint 14" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " EP13 ,End of Transfer Interrupt Request for Endpoint 13" "No requested,Requested"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " EP12 ,End of Transfer Interrupt Request for Endpoint 12" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " EP11 ,End of Transfer Interrupt Request for Endpoint 11" "No requested,Requested"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " EP10 ,End of Transfer Interrupt Request for Endpoint 10" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " EP9 ,End of Transfer Interrupt Request for Endpoint 9" "No requested,Requested"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " EP8 ,End of Transfer Interrupt Request for Endpoint 8" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " EP7 ,End of Transfer Interrupt Request for Endpoint 7" "No requested,Requested"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " EP6 ,End of Transfer Interrupt Request for Endpoint 6" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " EP5 ,End of Transfer Interrupt Request for Endpoint 5" "No requested,Requested"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " EP4 ,End of Transfer Interrupt Request for Endpoint 4" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " EP3 ,End of Transfer Interrupt Request for Endpoint 3" "No requested,Requested"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " EP2 ,End of Transfer Interrupt Request for Endpoint 2" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " EP1 ,End of Transfer Interrupt Request for Endpoint 1" "No requested,Requested"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " EP0 ,End of Transfer Interrupt Request for Endpoint 0" "No requested,Requested"
|
|
line.long 0x0C "USBNDDRINT_SET/CLR,Set/Clear USB New DD Request Interrupt"
|
|
setclrfld.long 0xC 31. 0x14 31. 0x10 31. " EP31 ,New DD Interrupt Request for Endpoint 31" "No requested,Requested"
|
|
setclrfld.long 0xC 30. 0x14 30. 0x10 30. " EP30 ,New DD Interrupt Request for Endpoint 30" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 29. 0x14 29. 0x10 29. " EP29 ,New DD Interrupt Request for Endpoint 29" "No requested,Requested"
|
|
setclrfld.long 0xC 28. 0x14 28. 0x10 28. " EP28 ,New DD Interrupt Request for Endpoint 28" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 27. 0x14 27. 0x10 27. " EP27 ,New DD Interrupt Request for Endpoint 27" "No requested,Requested"
|
|
setclrfld.long 0xC 26. 0x14 26. 0x10 26. " EP26 ,New DD Interrupt Request for Endpoint 26" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 25. 0x14 25. 0x10 25. " EP25 ,New DD Interrupt Request for Endpoint 25" "No requested,Requested"
|
|
setclrfld.long 0xC 24. 0x14 24. 0x10 24. " EP24 ,New DD Interrupt Request for Endpoint 24" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 23. 0x14 23. 0x10 23. " EP23 ,New DD Interrupt Request for Endpoint 23" "No requested,Requested"
|
|
setclrfld.long 0xC 22. 0x14 22. 0x10 22. " EP22 ,New DD Interrupt Request for Endpoint 22" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 21. 0x14 21. 0x10 21. " EP21 ,New DD Interrupt Request for Endpoint 21" "No requested,Requested"
|
|
setclrfld.long 0xC 20. 0x14 20. 0x10 20. " EP20 ,New DD Interrupt Request for Endpoint 20" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 19. 0x14 19. 0x10 19. " EP19 ,New DD Interrupt Request for Endpoint 19" "No requested,Requested"
|
|
setclrfld.long 0xC 18. 0x14 18. 0x10 18. " EP18 ,New DD Interrupt Request for Endpoint 18" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 17. 0x14 17. 0x10 17. " EP17 ,New DD Interrupt Request for Endpoint 17" "No requested,Requested"
|
|
setclrfld.long 0xC 16. 0x14 16. 0x10 16. " EP16 ,New DD Interrupt Request for Endpoint 16" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 15. 0x14 15. 0x10 15. " EP15 ,New DD Interrupt Request for Endpoint 15" "No requested,Requested"
|
|
setclrfld.long 0xC 14. 0x14 14. 0x10 14. " EP14 ,New DD Interrupt Request for Endpoint 14" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 13. 0x14 13. 0x10 13. " EP13 ,New DD Interrupt Request for Endpoint 13" "No requested,Requested"
|
|
setclrfld.long 0xC 12. 0x14 12. 0x10 12. " EP12 ,New DD Interrupt Request for Endpoint 12" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 11. 0x14 11. 0x10 11. " EP11 ,New DD Interrupt Request for Endpoint 11" "No requested,Requested"
|
|
setclrfld.long 0xC 10. 0x14 10. 0x10 10. " EP10 ,New DD Interrupt Request for Endpoint 10" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 9. 0x14 9. 0x10 9. " EP9 ,New DD Interrupt Request for Endpoint 9" "No requested,Requested"
|
|
setclrfld.long 0xC 8. 0x14 8. 0x10 8. " EP8 ,New DD Interrupt Request for Endpoint 8" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 7. 0x14 7. 0x10 7. " EP7 ,New DD Interrupt Request for Endpoint 7" "No requested,Requested"
|
|
setclrfld.long 0xC 6. 0x14 6. 0x10 6. " EP6 ,New DD Interrupt Request for Endpoint 6" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 5. 0x14 5. 0x10 5. " EP5 ,New DD Interrupt Request for Endpoint 5" "No requested,Requested"
|
|
setclrfld.long 0xC 4. 0x14 4. 0x10 4. " EP4 ,New DD Interrupt Request for Endpoint 4" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 3. 0x14 3. 0x10 3. " EP3 ,New DD Interrupt Request for Endpoint 3" "No requested,Requested"
|
|
setclrfld.long 0xC 2. 0x14 2. 0x10 2. " EP2 ,New DD Interrupt Request for Endpoint 2" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0xC 1. 0x14 1. 0x10 1. " EP1 ,New DD Interrupt Request for Endpoint 1" "No requested,Requested"
|
|
setclrfld.long 0xC 0. 0x14 0. 0x10 0. " EP0 ,New DD Interrupt Request for Endpoint 0" "No requested,Requested"
|
|
line.long 0x18 "USBSYSERRINT_SET/CLR,Set/Clear USB System Error Interrupt"
|
|
setclrfld.long 0x18 31. 0x20 31. 0x1C 31. " EP31 ,System Error Interrupt Request for Endpoint 31" "No requested,Requested"
|
|
setclrfld.long 0x18 30. 0x20 30. 0x1C 30. " EP30 ,System Error Interrupt Request for Endpoint 30" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 29. 0x20 29. 0x1C 29. " EP29 ,System Error Interrupt Request for Endpoint 29" "No requested,Requested"
|
|
setclrfld.long 0x18 28. 0x20 28. 0x1C 28. " EP28 ,System Error Interrupt Request for Endpoint 28" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 27. 0x20 27. 0x1C 27. " EP27 ,System Error Interrupt Request for Endpoint 27" "No requested,Requested"
|
|
setclrfld.long 0x18 26. 0x20 26. 0x1C 26. " EP26 ,System Error Interrupt Request for Endpoint 26" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x20 25. 0x1C 25. " EP25 ,System Error Interrupt Request for Endpoint 25" "No requested,Requested"
|
|
setclrfld.long 0x18 24. 0x20 24. 0x1C 24. " EP24 ,System Error Interrupt Request for Endpoint 24" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 23. 0x20 23. 0x1C 23. " EP23 ,System Error Interrupt Request for Endpoint 23" "No requested,Requested"
|
|
setclrfld.long 0x18 22. 0x20 22. 0x1C 22. " EP22 ,System Error Interrupt Request for Endpoint 22" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 21. 0x20 21. 0x1C 21. " EP21 ,System Error Interrupt Request for Endpoint 21" "No requested,Requested"
|
|
setclrfld.long 0x18 20. 0x20 20. 0x1C 20. " EP20 ,System Error Interrupt Request for Endpoint 20" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x20 19. 0x1C 19. " EP19 ,System Error Interrupt Request for Endpoint 19" "No requested,Requested"
|
|
setclrfld.long 0x18 18. 0x20 18. 0x1C 18. " EP18 ,System Error Interrupt Request for Endpoint 18" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 17. 0x20 17. 0x1C 17. " EP17 ,System Error Interrupt Request for Endpoint 17" "No requested,Requested"
|
|
setclrfld.long 0x18 16. 0x20 16. 0x1C 16. " EP16 ,System Error Interrupt Request for Endpoint 16" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 15. 0x20 15. 0x1C 15. " EP15 ,System Error Interrupt Request for Endpoint 15" "No requested,Requested"
|
|
setclrfld.long 0x18 14. 0x20 14. 0x1C 14. " EP14 ,System Error Interrupt Request for Endpoint 14" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x20 13. 0x1C 13. " EP13 ,System Error Interrupt Request for Endpoint 13" "No requested,Requested"
|
|
setclrfld.long 0x18 12. 0x20 12. 0x1C 12. " EP12 ,System Error Interrupt Request for Endpoint 12" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 11. 0x20 11. 0x1C 11. " EP11 ,System Error Interrupt Request for Endpoint 11" "No requested,Requested"
|
|
setclrfld.long 0x18 10. 0x20 10. 0x1C 10. " EP10 ,System Error Interrupt Request for Endpoint 10" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 9. 0x20 9. 0x1C 9. " EP9 ,System Error Interrupt Request for Endpoint 9" "No requested,Requested"
|
|
setclrfld.long 0x18 8. 0x20 8. 0x1C 8. " EP8 ,System Error Interrupt Request for Endpoint 8" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x20 7. 0x1C 7. " EP7 ,System Error Interrupt Request for Endpoint 7" "No requested,Requested"
|
|
setclrfld.long 0x18 6. 0x20 6. 0x1C 6. " EP6 ,System Error Interrupt Request for Endpoint 6" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 5. 0x20 5. 0x1C 5. " EP5 ,System Error Interrupt Request for Endpoint 5" "No requested,Requested"
|
|
setclrfld.long 0x18 4. 0x20 4. 0x1C 4. " EP4 ,System Error Interrupt Request for Endpoint 4" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 3. 0x20 3. 0x1C 3. " EP3 ,System Error Interrupt Request for Endpoint 3" "No requested,Requested"
|
|
setclrfld.long 0x18 2. 0x20 2. 0x1C 2. " EP2 ,System Error Interrupt Request for Endpoint 2" "No requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x20 1. 0x1C 1. " EP1 ,System Error Interrupt Request for Endpoint 1" "No requested,Requested"
|
|
setclrfld.long 0x18 0. 0x20 0. 0x1C 0. " EP0 ,System Error Interrupt Request for Endpoint 0" "No requested,Requested"
|
|
tree.end
|
|
endif
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||cpu()=="LPC2420"||(cpu()=="LPC2468")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
width 0xC
|
|
base sd:0xFFE0C000
|
|
sif ((cpu()=="LPC2378")||(cpu()=="LPC2420")||(cpu()=="LPC2468")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
group.long 0x110++0x3 "Port select register"
|
|
line.long 0x0 "USBPortSel,USB Port Select Register"
|
|
bitfld.long 0x0 0.--1. " PORTSEL ,Port Select" "U1,Reserved,Reserved,U2"
|
|
endif
|
|
tree "Clock control registers"
|
|
sif ((cpu()=="LPC2378")||(cpu()=="LPC2420")||(cpu()=="LPC2468")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
group.long 0xFF4++0x3
|
|
line.long 0x0 "USBClkCtrl,USB Clock Control register"
|
|
bitfld.long 0x0 4. " AHB_CLK_EN ,AHB clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " PORTSEL_CLK_EN ,Port select register clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " DEV_CLK_EN ,Device clock enable" "Disabled,Enabled"
|
|
rgroup.long 0xFF8++0x3
|
|
line.long 0x0 "USBClkSt,USB Clock Status register"
|
|
bitfld.long 0x0 4. " AHB_CLK_ON ,AHB clock on" "Not active,Active"
|
|
bitfld.long 0x0 3. " PORTSEL_CLK_ON ,Port select register clock" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0 1. " DEV_CLK_ON ,Device clock on" "Not active,Active"
|
|
else
|
|
group.long 0xFF4++0x3
|
|
line.long 0x0 "USBClkCtrl,USB Clock Control register"
|
|
bitfld.long 0x0 4. " AHB_CLK_EN ,AHB clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " DEV_CLK_EN ,Device clock enable" "Disabled,Enabled"
|
|
rgroup.long 0xFF8++0x3
|
|
line.long 0x0 "USBClkSt,USB Clock Status register"
|
|
bitfld.long 0x0 4. " AHB_CLK_ON ,AHB clock on" "Not active,Active"
|
|
bitfld.long 0x0 1. " DEV_CLK_ON ,Device clock on" "Not active,Active"
|
|
endif
|
|
tree.end
|
|
width 0xE
|
|
tree "Device Interrupt Registers"
|
|
base 0xE01FC1C0
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "USBIntSt,USB Interrupt Status Register"
|
|
bitfld.long 0x00 31. " EN_USB_INTS ,Enable USB Interrupts" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " USB_NEED_CLK ,USB Need Clock Indicator" "Not needed,Needed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " USB_INT_REQ_DMA ,DMA Interrupt Line Status" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " USB_INT_REQ_HP ,High Priority Interrupt Line Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " USB_INT_REQ_LP ,Low Priority Interrupt Line Status" "Not requested,Requested"
|
|
base sd:0xFFE0C000
|
|
group.long 0x200++0x7
|
|
line.long 0x00 "USBDevIntSt,USB Device Interrupt Register"
|
|
setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " ERR_INT_Clear/Set ,Error Interrupt" "No error,Error"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " EP_RLZED_Clear/Set ,Endpoints Realized" "Not realized,Realized"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " TxENDPKT_Clear/Set ,Number of Bytes Transferred to FIFO Equals TxPacket Length" "Not equal,Equal"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " RxENDPKT_Clear/Set ,Packet in FIFO Transfered to the CPU" "Not transferred,Transferred"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " CDFULL_Clear/Set ,Command Data Register Full" "Not full,Full"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " CCEMPTY_Clear/Set ,Command Code Register Empty" "Not empty,Empty"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " DEV_STAT_Clear/Set ,USB Bus Reset or Suspend or Connect Change Event" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " EP_SLOW_Clear/Set ,Slow Interrupt Transfer for the Endpoint" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " EP_FAST_Clear/Set ,Fast Interrupt Transfer for the Endpoint" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " FRAME_Clear/Set ,Frame Interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "USBDevIntEn,USB Device Interrupt Enable Register"
|
|
bitfld.long 0x04 9. " ERR_INT ,Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " EP_RLZED ,Endpoints Realized" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TxENDPKT ,Number of Bytes Transferred to FIFO Equals TxPacket Length" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " RxENDPKT ,Packet in FIFO Transfered to the CPU" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " CDFULL ,Command Data Register Full" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " CCEMPTY ,Command Code Register Empty" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DEV_STAT ,USB Bus Reset or Suspend or Connect Change Event" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " EP_SLOW ,Slow Interrupt Transfer for the Endpoint" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EP_FAST ,Fast Interrupt Transfer for the Endpoint" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " FRAME ,Frame Interrupt" "Disabled,Enabled"
|
|
wgroup.byte 0x22C++0x0
|
|
line.byte 0x00 "USBDevIntPri,USB Device Interrupt Priority Register"
|
|
bitfld.byte 0x00 1. " EP_FAST ,EP_FAST Interrupt Priority" "USB_INT_REQ_LP,USB_INT_REQ_HP"
|
|
bitfld.byte 0x00 0. " FRAME ,FRAME Interrupt Priority" "USB_INT_REQ_LP,USB_INT_REQ_HP"
|
|
tree.end
|
|
width 0xD
|
|
tree "Endpoint Interrupt Registers"
|
|
group.long 0x230++0x7
|
|
line.long 0x00 "USBEpIntSt,USB Endpoint Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x0C 31. 0x08 31. " EP15TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 15)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 30. 0x0C 30. 0x08 30. " EP15RX_Clear/Set ,Data Received Interrupt (Endpoint 15)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x0C 29. 0x08 29. " EP14TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 14)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 28. 0x0C 28. 0x08 28. " EP14RX_Clear/Set ,Data Received Interrupt (Endpoint 14)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x0C 27. 0x08 27. " EP13TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 13)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 26. 0x0C 26. 0x08 26. " EP13RX_Clear/Set ,Data Received Interrupt (Endpoint 13)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x0C 25. 0x08 25. " EP12TX_Clear/Set ,Isochronous Endpoint (Endpoint 12)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 24. 0x0C 24. 0x08 24. " EP12RX_Clear/Set ,Isochronous Endpoint (Endpoint 12)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x0C 23. 0x08 23. " EP11TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 11)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 22. 0x0C 22. 0x08 22. " EP11RX_Clear/Set ,Data Received Interrupt (Endpoint 11)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x0C 21. 0x08 21. " EP10TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 10)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 20. 0x0C 20. 0x08 20. " EP10RX_Clear/Set ,Data Received Interrupt (Endpoint 10)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x0C 19. 0x08 19. " EP9TX_Clear/Set ,Isochronous Endpoint (Endpoint 9)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 18. 0x0C 18. 0x08 18. " EP9RX_Clear/Set ,Isochronous Endpoint (Endpoint 9)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x0C 17. 0x08 17. " EP8TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 8)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 16. 0x0C 16. 0x08 16. " EP8RX_Clear/Set ,Data Received Interrupt (Endpoint 8)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x0C 15. 0x08 15. " EP7TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 7)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 14. 0x0C 14. 0x08 14. " EP7RX_Clear/Set ,Data Received Interrupt (Endpoint 7)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x0C 13. 0x08 13. " EP6TX_Clear/Set ,Isochronous Endpoint (Endpoint 6)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 12. 0x0C 12. 0x08 12. " EP6RX_Clear/Set ,Isochronous Endpoint (Endpoint 6)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " EP5TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 5)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " EP5RX_Clear/Set ,Data Received Interrupt (Endpoint 5)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " EP4TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 4)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " EP4RX_Clear/Set ,Data Received Interrupt (Endpoint 4)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " EP3TX_Clear/Set ,Isochronous Endpoint (Endpoint 3)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " EP3RX_Clear/Set ,Isochronous Endpoint (Endpoint 3)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " EP2TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 2)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " EP2RX_Clear/Set ,Data Received Interrupt (Endpoint 2)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " EP1TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 1)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " EP1RX_Clear/Set ,Data Received Interrupt (Endpoint 1)" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " EP0TX_Clear/Set ,Data Transmitted Interrupt/Sent NAK (Endpoint 0)" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " EP0RX_Clear/Set ,Data Received Interrupt (Endpoint 0)" "Not occurred,Occurred"
|
|
line.long 0x04 "USBEpIntEn,USB Endpoint Interrupt Enable Register"
|
|
bitfld.long 0x04 31. " EP15TX ,USB Tx Endpoint 15 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 30. " EP15RX ,USB Rx Endpoint 15 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 29. " EP14TX ,USB Tx Endpoint 14 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 28. " EP14RX ,USB Rx Endpoint 14 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 27. " EP13TX ,USB Tx Endpoint 13 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 26. " EP13RX ,USB Rx Endpoint 13 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " EP12TX ,USB Tx Endpoint 12 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 24. " EP12RX ,USB Rx Endpoint 12 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 23. " EP11TX ,USB Tx Endpoint 11 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 22. " EP11RX ,USB Rx Endpoint 11 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " EP10TX ,USB Tx Endpoint 10 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 20. " EP10RX ,USB Rx Endpoint 10 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " EP9TX ,USB Tx Endpoint 9 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 18. " EP9RX ,USB Rx Endpoint 9 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 17. " EP8TX ,USB Tx Endpoint 8 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 16. " EP8RX ,USB Rx Endpoint 8 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 15. " EP7TX ,USB Tx Endpoint 7 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 14. " EP7RX ,USB Rx Endpoint 7 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 13. " EP6TX ,USB Tx Endpoint 6 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 12. " EP6RX ,USB Rx Endpoint 6 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " EP5TX ,USB Tx Endpoint 5 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 10. " EP5RX ,USB Rx Endpoint 5 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " EP4TX ,USB Tx Endpoint 4 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 8. " EP4RX ,USB Rx Endpoint 4 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " EP3TX ,USB Tx Endpoint 3 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 6. " EP3RX ,USB Rx Endpoint 3 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " EP2TX ,USB Tx Endpoint 2 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 4. " EP2RX ,USB Rx Endpoint 2 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " EP1TX ,USB Tx Endpoint 1 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 2. " EP1RX ,USB Rx Endpoint 1 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EP0TX ,USB Tx Endpoint 0 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
bitfld.long 0x04 0. " EP0RX ,USB Rx Endpoint 0 Interrupt Enable" "USBDMARSt,USBEpIntSt"
|
|
wgroup.long 0x240++0x3
|
|
line.long 0x00 "USBEpIntPri,USB Endpoint Interrupt Priority Register"
|
|
bitfld.long 0x00 31. " EP15TX ,EP15TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 30. " EP15RX ,EP15RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EP14TX ,EP14TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 28. " EP14RX ,EP14RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EP13TX ,EP13TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 26. " EP13RX ,EP13RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EP12TX ,EP12TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 24. " EP12RX ,EP12RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EP11TX ,EP11TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 22. " EP11RX ,EP11RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EP10TX ,EP10TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 20. " EP10RX ,EP10RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EP9TX ,EP9TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 18. " EP9RX ,EP9RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EP8TX ,EP8TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 16. " EP8RX ,EP8RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EP7TX ,EP7TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 14. " EP7RX ,EP7RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EP6TX ,EP6TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 12. " EP6RX ,EP6RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EP5TX ,EP5TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 10. " EP5RX ,EP5RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EP4TX ,EP4TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 8. " EP4RX ,EP4RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EP3TX ,EP3TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 6. " EP3RX ,EP3RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EP2TX ,EP2TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 4. " EP2RX ,EP2RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EP1TX ,EP1TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 2. " EP1RX ,EP1RX Interrupt Priority" "Slow,Fast"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EP0TX ,EP0TX Interrupt Priority" "Slow,Fast"
|
|
bitfld.long 0x00 0. " EP0RX ,EP0RX Interrupt Priority" "Slow,Fast"
|
|
tree.end
|
|
tree "Endpoint Realization Registers"
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "USBReEp,USB Realize Endpoint Register"
|
|
bitfld.long 0x00 31. " EP31 ,Control Endpoint EP31" "Not realized,Realized"
|
|
bitfld.long 0x00 30. " EP30 ,Control Endpoint EP30" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EP29 ,Control Endpoint EP29" "Not realized,Realized"
|
|
bitfld.long 0x00 28. " EP28 ,Control Endpoint EP28" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EP27 ,Control Endpoint EP27" "Not realized,Realized"
|
|
bitfld.long 0x00 26. " EP26 ,Control Endpoint EP26" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EP25 ,Control Endpoint EP25" "Not realized,Realized"
|
|
bitfld.long 0x00 24. " EP24 ,Control Endpoint EP24" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EP23 ,Control Endpoint EP23" "Not realized,Realized"
|
|
bitfld.long 0x00 22. " EP22 ,Control Endpoint EP22" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EP21 ,Control Endpoint EP21" "Not realized,Realized"
|
|
bitfld.long 0x00 20. " EP20 ,Control Endpoint EP20" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EP19 ,Control Endpoint EP19" "Not realized,Realized"
|
|
bitfld.long 0x00 18. " EP18 ,Control Endpoint EP18" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EP17 ,Control Endpoint EP17" "Not realized,Realized"
|
|
bitfld.long 0x00 16. " EP16 ,Control Endpoint EP16" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EP15 ,Control Endpoint EP15" "Not realized,Realized"
|
|
bitfld.long 0x00 14. " EP14 ,Control Endpoint EP14" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EP13 ,Control Endpoint EP13" "Not realized,Realized"
|
|
bitfld.long 0x00 12. " EP12 ,Control Endpoint EP12" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EP11 ,Control Endpoint EP11" "Not realized,Realized"
|
|
bitfld.long 0x00 10. " EP10 ,Control Endpoint EP10" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EP9 ,Control Endpoint EP9" "Not realized,Realized"
|
|
bitfld.long 0x00 8. " EP8 ,Control Endpoint EP8" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EP7 ,Control Endpoint EP7" "Not realized,Realized"
|
|
bitfld.long 0x00 6. " EP6 ,Control Endpoint EP6" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EP5 ,Control Endpoint EP5" "Not realized,Realized"
|
|
bitfld.long 0x00 4. " EP4 ,Control Endpoint EP4" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EP3 ,Control Endpoint EP3" "Not realized,Realized"
|
|
bitfld.long 0x00 2. " EP2 ,Control Endpoint EP2" "Not realized,Realized"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EP1 ,Control Endpoint EP1" "Not realized,Realized"
|
|
bitfld.long 0x00 0. " EP0 ,Control Endpoint EP0" "Not realized,Realized"
|
|
wgroup.long 0x248++0x03
|
|
line.long 0x00 "USBEpInd,USB Endpoint Index Register"
|
|
bitfld.long 0x00 0.--4. " PHY_EP ,Physical Endpoint Number" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31."
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "USBMaxPSize,USB MaxPacketSize Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " MPS ,The Maximum Packet Size Value"
|
|
tree.end
|
|
width 0xB
|
|
tree "USB Transfer Registers"
|
|
hgroup.long 0x218++0x03
|
|
hide.long 0x00 "USBRxData,USB Receive Data Register"
|
|
in
|
|
rgroup.long 0x220++0x03
|
|
line.long 0x00 "USBRxPLen,USB Receive Packet Length Register"
|
|
bitfld.long 0x00 11. " PKT_RDY ,Packet is Ready for Reading" "Not ready,Ready"
|
|
bitfld.long 0x00 10. " DV ,Data Validate" "Invalid,Valid"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " PKT_LNGTH ,Remaining Amount of Data in Bytes Still to be Read from RAM"
|
|
wgroup.long 0x21C++0x03
|
|
line.long 0x00 "USBTxData,USB Transmit Data Register"
|
|
wgroup.long 0x224++0x03
|
|
line.long 0x00 "USBTxPLen,USB Transmit Packet Length Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " PKT_LNGTH ,Remaining Amount of Data in Bytes Still to be Written to EP_RAM"
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "USBCtrl,USB Control Register"
|
|
bitfld.long 0x00 2.--5. " LOG_ENDPOINT ,Logical Endpoint Number" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
bitfld.long 0x00 1. " WR_EN ,Write Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RD_EN ,Read Mode Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree "SIE Command Registers"
|
|
wgroup.long 0x210++0x03
|
|
line.long 0x00 "USBCmdCode,USB Command Code Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CMD_CODE/CMD_WDATA ,Code for Command/command write data"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMD_PHASE , Command Phase"
|
|
rgroup.long 0x214++0x03
|
|
line.long 0x00 "USBCmdData,USB Command Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMD_RDATA ,Command Data"
|
|
tree.end
|
|
width 0xB
|
|
width 0x10
|
|
base 0xFFE0C000
|
|
tree "DMA Registers"
|
|
group.long 0x250++0x3
|
|
line.long 0x00 "USBDMARSt,USB DMA Request Status"
|
|
setclrfld.long 0x00 31. 0x08 31. 0x04 31. " EP31_Clear/Set ,Endpoint 31 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 30. 0x08 30. 0x04 30. " EP30_Clear/Set ,Endpoint 30 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x08 29. 0x04 29. " EP29_Clear/Set ,Endpoint 29 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 28. 0x08 28. 0x04 28. " EP28_Clear/Set ,Endpoint 28 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x08 27. 0x04 27. " EP27_Clear/Set ,Endpoint 27 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 26. 0x08 26. 0x04 26. " EP26_Clear/Set ,Endpoint 26 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x08 25. 0x04 25. " EP25_Clear/Set ,Endpoint 25 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 24. 0x08 24. 0x04 24. " EP24_Clear/Set ,Endpoint 24 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x08 23. 0x04 23. " EP23_Clear/Set ,Endpoint 23 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 22. 0x08 22. 0x04 22. " EP22_Clear/Set ,Endpoint 22 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x08 21. 0x04 21. " EP21_Clear/Set ,Endpoint 21 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 20. 0x08 20. 0x04 20. " EP20_Clear/Set ,Endpoint 20 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x08 19. 0x04 19. " EP19_Clear/Set ,Endpoint 19 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 18. 0x08 18. 0x04 18. " EP18_Clear/Set ,Endpoint 18 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x08 17. 0x04 17. " EP17_Clear/Set ,Endpoint 17 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x04 16. " EP16_Clear/Set ,Endpoint 16 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " EP15_Clear/Set ,Endpoint 15 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " EP14_Clear/Set ,Endpoint 14 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " EP13_Clear/Set ,Endpoint 13 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " EP12_Clear/Set ,Endpoint 12 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " EP11_Clear/Set ,Endpoint 11 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " EP10_Clear/Set ,Endpoint 10 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " EP9_Clear/Set ,Endpoint 9 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " EP8_Clear/Set ,Endpoint 8 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " EP7_Clear/Set ,Endpoint 7 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " EP6_Clear/Set ,Endpoint 6 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " EP5_Clear/Set ,Endpoint 5 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " EP4_Clear/Set ,Endpoint 4 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " EP3_Clear/Set ,Endpoint 3 DMA Request" "Not requested,Requested"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " EP2_Clear/Set ,Endpoint 2 DMA Request" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " EP1_Clear/Set ,Control Endpoint IN" "Low,High"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " EP0_Clear/Set ,Control Endpoint OUT" "Low,High"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "USBUDCAH,USB UDCA Head"
|
|
hexmask.long 0x00 7.--31. 0x80 " UDCA_ADDR ,Start Address of the UDCA Header"
|
|
group.long 0x284++0x3
|
|
line.long 0x00 "USBEpDMASt,USB Endpoint DMA"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EP31_DMA_ENABLE_Clear/Set ,Endpoint 31 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " EP30_DMA_ENABLE_Clear/Set ,Endpoint 30 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " EP29_DMA_ENABLE_Clear/Set ,Endpoint 29 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EP28_DMA_ENABLE_Clear/Set ,Endpoint 28 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " EP27_DMA_ENABLE_Clear/Set ,Endpoint 27 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " EP26_DMA_ENABLE_Clear/Set ,Endpoint 26 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " EP25_DMA_ENABLE_Clear/Set ,Endpoint 25 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " EP24_DMA_ENABLE_Clear/Set ,Endpoint 24 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " EP23_DMA_ENABLE_Clear/Set ,Endpoint 23 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " EP22_DMA_ENABLE_Clear/Set ,Endpoint 22 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " EP21_DMA_ENABLE_Clear/Set ,Endpoint 21 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " EP20_DMA_ENABLE_Clear/Set ,Endpoint 20 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EP19_DMA_ENABLE_Clear/Set ,Endpoint 19 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " EP18_DMA_ENABLE_Clear/Set ,Endpoint 18 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " EP17_DMA_ENABLE_Clear/Set ,Endpoint 17 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " EP16_DMA_ENABLE_Clear/Set ,Endpoint 16 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EP15_DMA_ENABLE_Clear/Set ,Endpoint 15 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EP14_DMA_ENABLE_Clear/Set ,Endpoint 14 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " EP13_DMA_ENABLE_Clear/Set ,Endpoint 13 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " EP12_DMA_ENABLE_Clear/Set ,Endpoint 12 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " EP11_DMA_ENABLE_Clear/Set ,Endpoint 11 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " EP10_DMA_ENABLE_Clear/Set ,Endpoint 10 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " EP9_DMA_ENABLE_Clear/Set ,Endpoint 9 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " EP8_DMA_ENABLE_Clear/Set ,Endpoint 8 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " EP7_DMA_ENABLE_Clear/Set ,Endpoint 7 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " EP6_DMA_ENABLE_Clear/Set ,Endpoint 6 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " EP5_DMA_ENABLE_Clear/Set ,Endpoint 5 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EP4_DMA_ENABLE_Clear/Set ,Endpoint 4 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EP3_DMA_ENABLE_Clear/Set ,Endpoint 3 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EP2_DMA_ENABLE_Clear/Set ,Endpoint 2 DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " EP1_DMA_ENABLE_Clear/Set ,Control Endpoint IN" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EP0_DMA_ENABLE_Clear/Set ,Control Endpoint OUT" "Low,High"
|
|
rgroup.long 0x290++0x03
|
|
line.long 0x00 "USBDMAIntSt,USB DMA Interrupt Status Register"
|
|
bitfld.long 0x00 2. " ERR ,System Error Interrupt bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " NDDR ,New DD Request Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EOT ,End of Transfer Interrupt bit" "Not occurred,Occurred"
|
|
group.long 0x294++0x03
|
|
line.long 0x00 "USBDMAIntEn,USB DMA Interrupt Enable Register"
|
|
bitfld.long 0x00 2. " ERR ,System Error Interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " NDDR ,New DD Request Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EOT ,End of Transfer Interrupt enable bit" "Disabled,Enabled"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x00 "USBEoTIntSt,USB End of Transfer Interrupt"
|
|
setclrfld.long 0x00 31. 0x08 31. 0x04 31. " EP31_Clear/Set ,End of Transfer Interrupt Request for Endpoint 31" "Not requested,Requested"
|
|
setclrfld.long 0x00 30. 0x08 30. 0x04 30. " EP30_Clear/Set ,End of Transfer Interrupt Request for Endpoint 30" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x08 29. 0x04 29. " EP29_Clear/Set ,End of Transfer Interrupt Request for Endpoint 29" "Not requested,Requested"
|
|
setclrfld.long 0x00 28. 0x08 28. 0x04 28. " EP28_Clear/Set ,End of Transfer Interrupt Request for Endpoint 28" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x08 27. 0x04 27. " EP27_Clear/Set ,End of Transfer Interrupt Request for Endpoint 27" "Not requested,Requested"
|
|
setclrfld.long 0x00 26. 0x08 26. 0x04 26. " EP26_Clear/Set ,End of Transfer Interrupt Request for Endpoint 26" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x08 25. 0x04 25. " EP25_Clear/Set ,End of Transfer Interrupt Request for Endpoint 25" "Not requested,Requested"
|
|
setclrfld.long 0x00 24. 0x08 24. 0x04 24. " EP24_Clear/Set ,End of Transfer Interrupt Request for Endpoint 24" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x08 23. 0x04 23. " EP23_Clear/Set ,End of Transfer Interrupt Request for Endpoint 23" "Not requested,Requested"
|
|
setclrfld.long 0x00 22. 0x08 22. 0x04 22. " EP22_Clear/Set ,End of Transfer Interrupt Request for Endpoint 22" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x08 21. 0x04 21. " EP21_Clear/Set ,End of Transfer Interrupt Request for Endpoint 21" "Not requested,Requested"
|
|
setclrfld.long 0x00 20. 0x08 20. 0x04 20. " EP20_Clear/Set ,End of Transfer Interrupt Request for Endpoint 20" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x08 19. 0x04 19. " EP19_Clear/Set ,End of Transfer Interrupt Request for Endpoint 19" "Not requested,Requested"
|
|
setclrfld.long 0x00 18. 0x08 18. 0x04 18. " EP18_Clear/Set ,End of Transfer Interrupt Request for Endpoint 18" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x08 17. 0x04 17. " EP17_Clear/Set ,End of Transfer Interrupt Request for Endpoint 17" "Not requested,Requested"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x04 16. " EP16_Clear/Set ,End of Transfer Interrupt Request for Endpoint 16" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " EP15_Clear/Set ,End of Transfer Interrupt Request for Endpoint 15" "Not requested,Requested"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " EP14_Clear/Set ,End of Transfer Interrupt Request for Endpoint 14" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " EP13_Clear/Set ,End of Transfer Interrupt Request for Endpoint 13" "Not requested,Requested"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " EP12_Clear/Set ,End of Transfer Interrupt Request for Endpoint 12" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " EP11_Clear/Set ,End of Transfer Interrupt Request for Endpoint 11" "Not requested,Requested"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " EP10_Clear/Set ,End of Transfer Interrupt Request for Endpoint 10" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " EP9_Clear/Set ,End of Transfer Interrupt Request for Endpoint 9" "Not requested,Requested"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " EP8_Clear/Set ,End of Transfer Interrupt Request for Endpoint 8" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " EP7_Clear/Set ,End of Transfer Interrupt Request for Endpoint 7" "Not requested,Requested"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " EP6_Clear/Set ,End of Transfer Interrupt Request for Endpoint 6" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " EP5_Clear/Set ,End of Transfer Interrupt Request for Endpoint 5" "Not requested,Requested"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " EP4_Clear/Set ,End of Transfer Interrupt Request for Endpoint 4" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " EP3_Clear/Set ,End of Transfer Interrupt Request for Endpoint 3" "Not requested,Requested"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " EP2_Clear/Set ,End of Transfer Interrupt Request for Endpoint 2" "Not requested,Requested"
|
|
group.long 0x2AC++0x3
|
|
line.long 0x0 "USBNDDRIntSt,USB New DD Request Interrupt"
|
|
setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_Clear/Set ,New DD Interrupt Request for Endpoint 31" "Not requested,Requested"
|
|
setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_Clear/Set ,New DD Interrupt Request for Endpoint 30" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_Clear/Set ,New DD Interrupt Request for Endpoint 29" "Not requested,Requested"
|
|
setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_Clear/Set ,New DD Interrupt Request for Endpoint 28" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_Clear/Set ,New DD Interrupt Request for Endpoint 27" "Not requested,Requested"
|
|
setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_Clear/Set ,New DD Interrupt Request for Endpoint 26" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_Clear/Set ,New DD Interrupt Request for Endpoint 25" "Not requested,Requested"
|
|
setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_Clear/Set ,New DD Interrupt Request for Endpoint 24" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_Clear/Set ,New DD Interrupt Request for Endpoint 23" "Not requested,Requested"
|
|
setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_Clear/Set ,New DD Interrupt Request for Endpoint 22" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_Clear/Set ,New DD Interrupt Request for Endpoint 21" "Not requested,Requested"
|
|
setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_Clear/Set ,New DD Interrupt Request for Endpoint 20" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_Clear/Set ,New DD Interrupt Request for Endpoint 19" "Not requested,Requested"
|
|
setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_Clear/Set ,New DD Interrupt Request for Endpoint 18" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_Clear/Set ,New DD Interrupt Request for Endpoint 17" "Not requested,Requested"
|
|
setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_Clear/Set ,New DD Interrupt Request for Endpoint 16" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_Clear/Set ,New DD Interrupt Request for Endpoint 15" "Not requested,Requested"
|
|
setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_Clear/Set ,New DD Interrupt Request for Endpoint 14" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_Clear/Set ,New DD Interrupt Request for Endpoint 13" "Not requested,Requested"
|
|
setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_Clear/Set ,New DD Interrupt Request for Endpoint 12" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_Clear/Set ,New DD Interrupt Request for Endpoint 11" "Not requested,Requested"
|
|
setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_Clear/Set ,New DD Interrupt Request for Endpoint 10" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_Clear/Set ,New DD Interrupt Request for Endpoint 9" "Not requested,Requested"
|
|
setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_Clear/Set ,New DD Interrupt Request for Endpoint 8" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_Clear/Set ,New DD Interrupt Request for Endpoint 7" "Not requested,Requested"
|
|
setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_Clear/Set ,New DD Interrupt Request for Endpoint 6" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_Clear/Set ,New DD Interrupt Request for Endpoint 5" "Not requested,Requested"
|
|
setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_Clear/Set ,New DD Interrupt Request for Endpoint 4" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_Clear/Set ,New DD Interrupt Request for Endpoint 3" "Not requested,Requested"
|
|
setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_Clear/Set ,New DD Interrupt Request for Endpoint 2" "Not requested,Requested"
|
|
group.long 0x2B8++0x3
|
|
line.long 0x0 "USBSysErrIntSt,USB System Error Interrupt"
|
|
setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_Clear/Set ,System Error Interrupt Request for Endpoint 31" "Not requested,Requested"
|
|
setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_Clear/Set ,System Error Interrupt Request for Endpoint 30" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_Clear/Set ,System Error Interrupt Request for Endpoint 29" "Not requested,Requested"
|
|
setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_Clear/Set ,System Error Interrupt Request for Endpoint 28" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_Clear/Set ,System Error Interrupt Request for Endpoint 27" "Not requested,Requested"
|
|
setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_Clear/Set ,System Error Interrupt Request for Endpoint 26" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_Clear/Set ,System Error Interrupt Request for Endpoint 25" "Not requested,Requested"
|
|
setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_Clear/Set ,System Error Interrupt Request for Endpoint 24" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_Clear/Set ,System Error Interrupt Request for Endpoint 23" "Not requested,Requested"
|
|
setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_Clear/Set ,System Error Interrupt Request for Endpoint 22" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_Clear/Set ,System Error Interrupt Request for Endpoint 21" "Not requested,Requested"
|
|
setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_Clear/Set ,System Error Interrupt Request for Endpoint 20" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_Clear/Set ,System Error Interrupt Request for Endpoint 19" "Not requested,Requested"
|
|
setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_Clear/Set ,System Error Interrupt Request for Endpoint 18" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_Clear/Set ,System Error Interrupt Request for Endpoint 17" "Not requested,Requested"
|
|
setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_Clear/Set ,System Error Interrupt Request for Endpoint 16" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_Clear/Set ,System Error Interrupt Request for Endpoint 15" "Not requested,Requested"
|
|
setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_Clear/Set ,System Error Interrupt Request for Endpoint 14" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_Clear/Set ,System Error Interrupt Request for Endpoint 13" "Not requested,Requested"
|
|
setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_Clear/Set ,System Error Interrupt Request for Endpoint 12" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_Clear/Set ,System Error Interrupt Request for Endpoint 11" "Not requested,Requested"
|
|
setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_Clear/Set ,System Error Interrupt Request for Endpoint 10" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_Clear/Set ,System Error Interrupt Request for Endpoint 9" "Not requested,Requested"
|
|
setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_Clear/Set ,System Error Interrupt Request for Endpoint 8" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_Clear/Set ,System Error Interrupt Request for Endpoint 7" "Not requested,Requested"
|
|
setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_Clear/Set ,System Error Interrupt Request for Endpoint 6" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_Clear/Set ,System Error Interrupt Request for Endpoint 5" "Not requested,Requested"
|
|
setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_Clear/Set ,System Error Interrupt Request for Endpoint 4" "Not requested,Requested"
|
|
textline " "
|
|
setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_Clear/Set ,System Error Interrupt Request for Endpoint 3" "Not requested,Requested"
|
|
setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_Clear/Set ,System Error Interrupt Request for Endpoint 2" "Not requested,Requested"
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80041000
|
|
width 13.
|
|
tree "USB Controller Registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "USBDevAdr,USB Device Address Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " DEVADDR ,Device address"
|
|
bitfld.long 0x00 7. " DEVEN ,Overall USB Controller Enable" "Disabled,Enabled"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USBMode,USB Mode Register"
|
|
bitfld.long 0x00 0. " SOFTCT ,Soft Connect feature" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PWROFF ,Power off" "No power off,Power off"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WKUP ,Remote wakeup enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " GIE ,Global Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " USBReset ,USB Reset" "No reset,Reset"
|
|
bitfld.long 0x00 5. " GoSusp ,Go suspend" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SNDRSU ,Send Resume signal" "Not sent,Sent"
|
|
bitfld.long 0x00 7. " CLKAON ,Clock Always On" "Disabled,Enabled"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "USBIntE,USB Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " BRESET ,Bus Reset interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SOF ,Start of Frame interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSOF ,Pseudo Start of Frame interrupt enables" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SUSP ,Interrupt enable when the bus goes suspend" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RESUME ,Interrupt enable when the bus goes active" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " HS_STAT ,Interrupt enable when change from FS to HS mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMA ,Interrupt enable when Status Register of any the USB DMA has changed" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " EP0SETUP ,Interrupt enable when Endpoint 0 Setup data is received" "Disabled,Enabled"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "USBIntStat,USB Interrupt Status Register"
|
|
setclrfld.long 0x00 0. 0x1C 0. 0x18 0. " BRESET_set/clr ,USB controller has detected a Bus Reset" "Not detected,Detected"
|
|
setclrfld.long 0x00 1. 0x1C 1. 0x18 1. " SOF_set/clr ,USB controller has received a Start of Frame" "Not received,Received"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x1C 2. 0x18 2. " PSOF_set/clr ,USB controller has received a Pseudo Start of Frame" "Not received,Received"
|
|
setclrfld.long 0x00 3. 0x1C 3. 0x18 3. " SUSP_set/clr ,Host has changed the state of the bus from active to suspend" "Not changed,Changed"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x1C 4. 0x18 4. " RESUME_set/clr ,Host has changed the state of the bus from suspend to active" "Not changed,Changed"
|
|
setclrfld.long 0x00 5. 0x1C 5. 0x18 5. " HS_STAT_set/clr ,Change from FS to HS mode." "Not changed,Changed"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x1C 6. 0x18 6. " DMA_set/clr ,Change in any of the USB DMA controllers Status Registers" "Not changed,Changed"
|
|
setclrfld.long 0x00 7. 0x1C 7. 0x18 7. " EP0SETUP_set/clr ,Endpoint 0 Setup data has been received" "Not received,Received"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "USBIntP,USB Interrupt Priority Register"
|
|
bitfld.long 0x00 0. " BRESET1 ,Bus reset interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 1. " SOF1 ,SOF interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSOF1 ,Pseudo SOF interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 3. " SUSP1 ,Suspend interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RESUME1 ,Resume interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 5. " HS_STAT1 ,HS Status interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " UDMA1 ,USB DMA controller interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 7. " EP0Setup1 ,Endpoint 0 Setup interrupt priority" "Request 0,Request 1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "USBIntCfg,USB Interrupt Configuration Register"
|
|
bitfld.long 0x00 0. " INTPOL ,Interrupt Polarisation" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTEDGE ,Interrupt Sensitivity " "Level-sensitive,Egde-Sensitive"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " DDBG_M_OUT ,Data Debug Mode Out" "ACK/STALL/NYET/NAK,ACK/STALL/NYET,ACK/STALL/NYET/first NAK,ACK/STALL/NYET/first NAK"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DDBG_M_IN ,Data Debug Mode In" "ACK,ACK/STALL/NYET,ACK/first NAK,ACK/first NAK"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CDGB_M ,Control 0 Debug Mode" "ACK/STALL/NAK,ACK/STALL,ACK/STALL/first NAK,ACK/STALL/first NAK"
|
|
rgroup.long 0x74++0x03
|
|
line.long 0x00 "USBFN,USB Frame Number Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " SOF ,Frame number"
|
|
hexmask.long.byte 0x00 11.--13. 1. " mSOF ,mSOF number"
|
|
group.long 0x78++0x07
|
|
line.long 0x00 "USBScratch,USB Scratch Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ScrInf ,Scratch Information"
|
|
line.long 0x04 "USBUnlock,USB Unlock Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " UnlockCode ,UnlockCode"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "USBEIX,USB Endpoint Index Register"
|
|
bitfld.long 0x00 0. " DIR ,Endpoint Direction" "OUT,IN"
|
|
hexmask.long.byte 0x00 1.--4. 1. " ENDPIDX ,Endpoint number for reading and writing"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SEL_EP0SET ,Endpoint registers select" "Other,Endpoint 0 Setup"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USBEType,USB Endpoint Type Register"
|
|
bitfld.long 0x00 0.--1. " TYPE ,Type of the endpoint selected by the USBEIX register" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x00 2. " DBLBUF ,Double buffering enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EP_ENAB ,Endpoint selected by the USBEIX enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIS_EOT ,Automatic EOT empty packet generation disable" "Enabled,Disabled"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "USBECtrl,USB Endpoint Control Register"
|
|
bitfld.long 0x00 0. " STALL ,Endpoint selected by the USBEIX register stall" "Not stalled,Stalled"
|
|
bitfld.long 0x00 1. " TO_STATUS ,USB controller IN/OUT response" "NAK/NAK,Empty packet/ACK"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DATA ,Move to the data phase of the control transfer" "Not moved,Moved"
|
|
bitfld.long 0x00 4. " CLRBUF ,Clear RX buffer" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BUFFULL ,Buffer full" "Not full,Full"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USBMaxSize,USB Endpoint Max Packet Size Register"
|
|
hexmask.long 0x00 0.--10. 1. " FIFOSize ,FIFO size for the endpoint selected by the USBEIX register"
|
|
bitfld.long 0x00 11.--12. " NTRANS ,Number of transactions allowed per microframe" "1 packet,2 packets,3 packets,?..."
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "USBDCnt,USB Data Count Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " Dcnt ,Number of bytes to transmit/received bytes"
|
|
line.long 0x04 "USBData,USB Data Port Register"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "USBShort,USB Short Packet Register"
|
|
bitfld.long 0x00 0. " OUTSH0 ,Received OUT packet shorter than the Endpoint0 Max Packet Size" "No shorter,Shorter"
|
|
bitfld.long 0x00 1. " OUTSH1 ,Received OUT packet shorter than the Endpoint1 Max Packet Size" "No shorter,Shorter"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTSH2 ,Received OUT packet shorter than the Endpoint2 Max Packet Size" "No shorter,Shorter"
|
|
bitfld.long 0x00 3. " OUTSH3 ,Received OUT packet shorter than the Endpoint3 Max Packet Size" "No shorter,Shorter"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTSH4 ,Received OUT packet shorter than the Endpoint4 Max Packet Size" "No shorter,Shorter"
|
|
bitfld.long 0x00 5. " OUTSH5 ,Received OUT packet shorter than the Endpoint5 Max Packet Size" "No shorter,Shorter"
|
|
textline " "
|
|
bitfld.long 0x00 6. " OUTSH6 ,Received OUT packet shorter than the Endpoint6 Max Packet Size" "No shorter,Shorter"
|
|
bitfld.long 0x00 7. " OUTSH7 ,Received OUT packet shorter than the Endpoint7 Max Packet Size" "No shorter,Shorter"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "USBEIntE,USB Endpoint Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " EP0RXIE ,RX interrupts from OUT Endpoint 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EP0TXIE ,TX interrupts from IN Endpoint 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EP1RXIE ,RX interrupts from OUT Endpoint 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EP1TXIE ,TX interrupts from IN Endpoint 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EP2RXIE ,RX interrupts from OUT Endpoint 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EP2TXIE ,TX interrupts from IN Endpoint 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " EP3RXIE ,RX interrupts from OUT Endpoint 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " EP3TXIE ,TX interrupts from IN Endpoint 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EP4RXIE ,RX interrupts from OUT Endpoint 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EP4TXIE ,TX interrupts from IN Endpoint 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EP5RXIE ,RX interrupts from OUT Endpoint 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EP5TXIE ,TX interrupts from IN Endpoint 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EP6RXIE ,RX interrupts from OUT Endpoint 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EP6TXIE ,TX interrupts from IN Endpoint 6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EP7RXIE ,RX interrupts from OUT Endpoint 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EP7TXIE ,TX interrupts from IN Endpoint 7" "Disabled,Enabled"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "USBEIntStat,USB Endpoint Interrupt Status Register"
|
|
setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " EP0RX_set/clr ,Endpoint 0 OUT (RX) buffer filled" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " EP0TX_set/clr ,Endpoint 0 IN (TX) buffer emptied" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " EP1RX_set/clr ,Endpoint 1 OUT (RX) buffer filled" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " EP1TX_set/clr ,Endpoint 1 IN (TX) buffer emptied" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " EP2RX_set/clr ,Endpoint 2 OUT (RX) buffer filled" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " EP2TX_set/clr ,Endpoint 2 IN (TX) buffer emptied" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " EP3RX_set/clr ,Endpoint 3 OUT (RX) buffer filled" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " EP3TX_set/clr ,Endpoint 3 IN (TX) buffer emptied" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " EP4RX_set/clr ,Endpoint 4 OUT (RX) buffer filled" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " EP4TX_set/clr ,Endpoint 4 IN (TX) buffer emptied" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " EP5RX_set/clr ,Endpoint 5 OUT (RX) buffer filled" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " EP5TX_set/clr ,Endpoint 5 IN (TX) buffer emptied" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x0C 12. 0x08 12. " EP6RX_set/clr ,Endpoint 6 OUT (RX) buffer filled" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. 0x0C 13. 0x08 13. " EP6TX_set/clr ,Endpoint 6 IN (TX) buffer emptied" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x0C 14. 0x08 14. " EP7RX_set/clr ,Endpoint 7 OUT (RX) buffer filled" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. 0x0C 15. 0x08 15. " EP7TX_set/clr ,Endpoint 7 IN (TX) buffer emptied" "No interrupt,Interrupt"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "USBEIntP,USB Endpoint Interrupt Priority Register"
|
|
bitfld.long 0x00 0. " P0RX ,Endpoint 0 OUT interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 1. " P1TX ,Endpoint 0 IN interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2RX ,Endpoint 2 OUT interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 3. " P3TX ,Endpoint 2 IN interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P4RX ,Endpoint 4 OUT interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 5. " P5TX ,Endpoint 4 IN interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " P6RX ,Endpoint 6 OUT interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 7. " P7TX ,Endpoint 6 IN interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " P8RX ,Endpoint 8 OUT interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 9. " P9TX ,Endpoint 8 IN interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P10RX ,Endpoint 10 OUT interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 11. " P11TX ,Endpoint 10 IN interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " P12RX ,Endpoint 12 OUT interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 13. " P13TX ,Endpoint 12 IN interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " P14RX ,Endpoint 14 OUT interrupt priority" "Request 0,Request 1"
|
|
bitfld.long 0x00 15. " P15TX ,Endpoint 14 IN interrupt priority" "Request 0,Request 1"
|
|
textline " "
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "USBTMode,USB Test Mode Register"
|
|
bitfld.long 0x00 0. " SE0NAK ,D+ and D- lines to a HS Quiescent state" "No quiescent,Quiescent"
|
|
bitfld.long 0x00 1. " JSTATE ,D+ and D- lines to J state" "No J state,J state"
|
|
textline " "
|
|
bitfld.long 0x00 2. " KSTATE ,D+ and D- lines to K stare" "No K state,K state"
|
|
bitfld.long 0x00 3. " PRBS ,Test pattern from USB controller" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FORCEFS ,Full Speed mode forced" "Not forced,Forced"
|
|
bitfld.long 0x00 7. " FORCEHS ,High Speed mode forced" "Not forced,Forced"
|
|
base 0x80005000
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "USBClkEn,USB Clock Enable Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock to the USB controller enabled" "Disabled,Enabled"
|
|
tree.end
|
|
tree "DMA Engine Registers"
|
|
base 0x80040000
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "UDMACtrl,USB DMA Control Register"
|
|
bitfld.long 0x00 0. " UDMA_EN ,USB DMA operation enable" "Disabled,Enabled"
|
|
wgroup.long 0x404++0x03
|
|
line.long 0x00 "UDMASoftRes,USB DMA Software Reset Register"
|
|
bitfld.long 0x00 0. " RSTCH0 ,DMA channel 0 reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RSTCH1 ,DMA channel 1 reset" "No reset,Reset"
|
|
rgroup.long 0x408++0x03
|
|
line.long 0x00 "UDMAStat,USB DMA Status Register"
|
|
bitfld.long 0x00 0.--2. " CH0Stat ,Channel 0 Status" "Idle,Busy,Suspend,Reserved,Reserved,Reserved,Reserved,Error"
|
|
bitfld.long 0x00 4.--6. " CH1Stat ,Channel 1 Status" "Idle,Busy,Suspend,Reserved,Reserved,Reserved,Reserved,Error"
|
|
group.long 0x0++0x003
|
|
line.long 0x00 "UDMA0Stat,USB DMA Channel 0 Status Register"
|
|
bitfld.long 0x00 0.--1. " State ,Channel 0 State" "Idle,Busy,Suspend,Error"
|
|
bitfld.long 0x00 16. " WrError ,Write Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DFCError ,Destination Flow Control Port error" "No error,Error"
|
|
bitfld.long 0x00 20. " ReError , Read Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SFCError ,Source Flow Control Port error" "No error,Error"
|
|
bitfld.long 0x00 22. " UpError , Update Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CoError ,Configuration Error" "No error,Error"
|
|
group.long 0x40++0x003
|
|
line.long 0x00 "UDMA1Stat,USB DMA Channel 1 Status Register"
|
|
bitfld.long 0x00 0.--1. " State ,Channel 1 State" "Idle,Busy,Suspend,Error"
|
|
bitfld.long 0x00 16. " WrError ,Write Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DFCError ,Destination Flow Control Port error" "No error,Error"
|
|
bitfld.long 0x00 20. " ReError , Read Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SFCError ,Source Flow Control Port error" "No error,Error"
|
|
bitfld.long 0x00 22. " UpError , Update Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CoError ,Configuration Error" "No error,Error"
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "UDMAIntStat,USB DMA Interrupt Status Register"
|
|
setclrfld.long 0x00 1. 0x18 1. 0x20 1. " CH0IEOT_set/clr ,DMA channel 0 end of transmission" "Not ended,Ended"
|
|
setclrfld.long 0x00 2. 0x18 2. 0x20 2. " CH0IError_set/clr ,DMA channel 0 transfer error" "No error,Error"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x18 5. 0x20 5. " CH1IEOT_set/clr ,DMA channel 1 end of transmission" "Not ended,Ended"
|
|
setclrfld.long 0x00 6. 0x18 6. 0x20 6. " CH1IError_set/clr ,DMA channel 1 transfer error" "No error,Error"
|
|
group.long 0x418++0x03
|
|
line.long 0x00 "UDMAIntEn,USB DMA Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " CH0IEOTEn ,EOT interrupts for DMA channel 0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CH0IErrorEn ,Error interrupts for DMA channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH1IEOTEn ,EOT interrupts for DMA channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CH1IErrorEn ,Error interrupts for DMA channel 1 enable" "Disabled,Enabled"
|
|
group.long 0x420++0x03
|
|
line.long 0x00 "UDMAIntDis,USB DMA Interrupt Disable Register"
|
|
bitfld.long 0x00 1. " CH0IEOTDis ,EOT interrupts for DMA channel 0 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 2. " CH0IErrorDis ,Error interrupts for DMA channel 0 disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH1IEOTDis ,EOT interrupts for DMA channel 1 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " CH1IErrorDis ,Error interrupts for DMA channel 1 disable" "Enabled,Disabled"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "UDMA0Ctrl,USB DMA Channel 0 Control Register"
|
|
bitfld.long 0x00 0.--1. " CHEN ,Channel enable" "Disabled,Low priority,Medium priority,High priority"
|
|
bitfld.long 0x00 3.--4. " SOURCE ,Source" "IN (TX),OUT (RX),?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " STYPE ,Source transfer type" "Reserved,Reserved,32 bit,?..."
|
|
bitfld.long 0x00 7.--8. " SA_ADJ ,Source address adjust" "Fixed,Increment,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " SFC_MODE ,Source Flow Control mode" "No SFC,SFC,?..."
|
|
bitfld.long 0x00 11.--14. " SFC_PORT ,Source Flow Control Port" "OUT endpoint 1,IN endpoint 1,OUT endpoint 2,IN endpoint 2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " DEST ,Destination" "OUT (RX),IN (TX),?..."
|
|
bitfld.long 0x00 17.--18. " DTYPE ,Destination transfer type" "Reserved,Reserved,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " DA_ADJ ,Destination adress adjust" "Fixed,Increment,?..."
|
|
bitfld.long 0x00 21.--22. " DFC_MODE ,Destination Flow Control mode" "No DFC,DFC,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23.--26. " DFC_PORT ,Destination Flow Control Port" "OUT endpoint 1,IN endpoint 1,OUT endpoint 2,IN endpoint 2,?..."
|
|
bitfld.long 0x00 30. " IEOT_En ,IEOT in the USB Interrupt Status register enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 31. " IError_En ,IError in the USB Interrupt Status register enable" "Disabled,Enabled"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "UDMA1Ctrl,USB DMA Channel 1 Control Register"
|
|
bitfld.long 0x00 0.--1. " CHEN ,Channel enable" "Disabled,Low priority,Medium priority,High priority"
|
|
bitfld.long 0x00 3.--4. " SOURCE ,Source" "IN (TX),OUT (RX),?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " STYPE ,Source transfer type" "Reserved,Reserved,32 bit,?..."
|
|
bitfld.long 0x00 7.--8. " SA_ADJ ,Source address adjust" "Fixed,Increment,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " SFC_MODE ,Source Flow Control mode" "No SFC,SFC,?..."
|
|
bitfld.long 0x00 11.--14. " SFC_PORT ,Source Flow Control Port" "OUT endpoint 1,IN endpoint 1,OUT endpoint 2,IN endpoint 2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " DEST ,Destination" "OUT (RX),IN (TX),?..."
|
|
bitfld.long 0x00 17.--18. " DTYPE ,Destination transfer type" "Reserved,Reserved,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " DA_ADJ ,Destination adress adjust" "Fixed,Increment,?..."
|
|
bitfld.long 0x00 21.--22. " DFC_MODE ,Destination Flow Control mode" "No DFC,DFC,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23.--26. " DFC_PORT ,Destination Flow Control Port" "OUT endpoint 1,IN endpoint 1,OUT endpoint 2,IN endpoint 2,?..."
|
|
bitfld.long 0x00 30. " IEOT_En ,IEOT in the USB Interrupt Status register enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 31. " IError_En ,IError in the USB Interrupt Status register enable" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "UDMA0Src,USB DMA Channel 0 Source Address Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "UDMA1Src,USB DMA Channel 1 Source Address Register"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "UDMA0Dest,USB DMA Channel 0 Destination Address Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "UDMA1Dest,USB DMA Channel 1 Destination Address Register"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "UDMA0Dest,USB DMA Channel 0 Count Register"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "UDMA1Dest,USB DMA Channel 1 Count Register"
|
|
group.long 0x10++0x003
|
|
line.long 0x00 "UDMA0Throtl,USB DMA Channel 0 Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SThrottle ,Number of words used for source throttling"
|
|
hexmask.long.word 0x00 16.--31. 1. " DThrottle ,Number of words used for destination throttling"
|
|
group.long 0x50++0x003
|
|
line.long 0x00 "UDMA1Throtl,USB DMA Channel 1 Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SThrottle ,Number of words used for source throttling"
|
|
hexmask.long.word 0x00 16.--31. 1. " DThrottle ,Number of words used for destination throttling"
|
|
group.long 0x500++0x0F
|
|
line.long 0x0 "UDMAFCP0,USB DMA Flow Control Port 0 Register"
|
|
line.long 0x4 "UDMAFCP1,USB DMA Flow Control Port 1 Register"
|
|
line.long 0x8 "UDMAFCP2,USB DMA Flow Control Port 2 Register"
|
|
line.long 0xC "UDMAFCP3,USB DMA Flow Control Port 3 Register"
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2420"||cpu()=="LPC2468"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
tree "USB OTG Controller"
|
|
width 0xA
|
|
base 0xE01FC1C0
|
|
group.long 0x00++0x3 "Interrupt Register"
|
|
line.long 0x00 "USBIntSt,USB Interrupt Status Register"
|
|
bitfld.long 0x00 31. " EN_USB_INTS ,Enable USB Interrupts" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " USB_NEED_CLK ,USB Need Clock Indicator" "Not needed,Needed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USB_I2C_INT ,I2C module interrupt line status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " USB_OTG_INT ,OTG interrupt line status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " USB_ATX_INT ,External ATX interrupt line status" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " USB_HOST_INT ,USB host interrupt line status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 2. " USB_INT_REQ_DMA ,DMA Interrupt Line Status" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " USB_INT_REQ_HP ,High Priority Interrupt Line Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " USB_INT_REQ_LP ,Low Priority Interrupt Line Status" "Not requested,Requested"
|
|
width 0xB
|
|
base sd:0xFFE0C000
|
|
group.long 0x100++0x7 "OTG Registers"
|
|
line.long 0x00 "OTGIntSt,OTG Interrupt Status"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " HNP_SUCCESS ,HNP succeeded" "Not succeeded,Succeeded"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " HNP_FAILURE ,HNP failed" "Not failed,Failed"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " REMOVE_PU ,Remove Pull-up" "Not removed,Removed"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TMR ,Timer time-out" "No time-out,Time-out"
|
|
line.long 0x04 "OTGIntEn,OTG Interrupt Enable"
|
|
bitfld.long 0x04 3. " HNP_SUCCESS_ENA ,HNP succeeded Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " HNP_FAILURE_ENA ,HNP failed Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " REMOVE_PU_ENA ,Remove Pull-up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TMR_ENA ,Timer time-out Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x110++0x7
|
|
line.long 0x00 "OTGStCtrl,OTG Status and Control"
|
|
hexmask.long.word 0x00 16.--31. 1. " TMR_CNT ,Current timer count value"
|
|
bitfld.long 0x00 10. " PU_REMOVED ,D+ pull-up removed" "Not removed,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " A_HNP_TRACK ,HNP tracking for A-device (host)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " B_HNP_TRACK ,HNP tracking for B-device (peripheral)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TMR_RST ,Timer reset" "No reset,Reset"
|
|
bitfld.long 0x00 5. " TMR_EN ,Timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TMR_MODE ,Timer mode selection" "Monoshot,Free running"
|
|
bitfld.long 0x00 2.--3. " TMR_SCALE ,Timer scale selection" "10us(100KHz),100us(10KHz),1000us(1KHz),?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " PORT_FUNC ,Controls the function of ports U1 and U2" "00,01,10,11"
|
|
line.long 0x04 "OTGTmr,OTG Timer"
|
|
hexmask.long.word 0x04 0.--15. 1. " TIMEOUT_CNT ,Time-out value"
|
|
width 0xB
|
|
hgroup.byte 0x300++0x0 "I2C Registers"
|
|
hide.byte 0x00 "I2C_RX,I2C Receive"
|
|
in
|
|
wgroup.long 0x300++0x3
|
|
line.long 0x00 "I2C_TX,I2C Transmit"
|
|
bitfld.long 0x00 9. " STOP ,Issue STOP condition after transmitting byte" "Not issue,Issue"
|
|
bitfld.long 0x00 8. " START ,Issue START condition before transmitting byte" "Not issue,Issue"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TX_Data ,Transmit data"
|
|
group.long 0x304++0x3
|
|
line.long 0x00 "I2C_STS,I2C Status"
|
|
bitfld.long 0x00 11. " TFE ,Trasmit FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 10. " TFF ,Transmit FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RFE ,Receive FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SDA ,Current Value of SDA signal" "Low,High"
|
|
bitfld.long 0x00 6. " SCL ,Current Value of SCL signal" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " Active ,Indicates whether the bus is busy" "Not busy,Busy"
|
|
bitfld.long 0x00 4. " DRSI ,Slave Data Request Interrupt" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DRMI ,Master Data Request Interrupt" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " NAI ,No Acknowledge Interrupt" "Received,Not received"
|
|
textline " "
|
|
eventfld.long 0x00 1. " AFI ,Arbitration Failure Interrupt" "No failure,Failure"
|
|
eventfld.long 0x00 0. " TDI ,Transaction Done Interrupt" "Not completed,Completed"
|
|
group.long 0x308++0x3
|
|
line.long 0x00 "I2C_CTL,I2C Control"
|
|
bitfld.long 0x00 8. " SRST ,Soft reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " TFFIE ,Transmit FIFO Not Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RFDAIE ,Receive Data Available Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " REFIE ,Receive FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DRSIE ,Slave Transmitter Data Request Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DRMIE ,Master Transmitter Data Request Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NAIE ,Transmitter No Acknowledge Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " AFIE ,Transmitter Arbitration Failure Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TDIE ,Transmit Done Interrupt Enable" "Disabled,Enabled"
|
|
group.byte 0x30C++0x0
|
|
line.byte 0x00 "I2C_CLKHI,I2C Clock High"
|
|
hexmask.byte 0x00 0.--7. 1. " CDHI ,Clock divisor high"
|
|
wgroup.byte 0x310++0x0
|
|
line.byte 0x00 "I2C_CLKLO,I2C Clock Low"
|
|
hexmask.byte 0x00 0.--7. 1. " CDLO ,Clock divisor low"
|
|
width 0xC
|
|
group.long 0xFF4++0x3 "Clock Control Registers"
|
|
line.long 0x00 "OTGClkCtrl,OTG clock controller"
|
|
bitfld.long 0x00 4. " AHB_CLK_EN ,AHB master clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OTG_CLK_EN ,OTG clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " I2C_CLK_EN ,I2C clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DEV_CLK_EN ,Device clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HOST_CLK_EN ,Host clock enable" "Disabled,Enabled"
|
|
rgroup.long 0xFF8++0x3
|
|
line.long 0x00 "OTGClkSt,OTG clock status"
|
|
bitfld.long 0x00 4. " AHB_CLK_ON ,AHB master clock status" "Not available,Available"
|
|
bitfld.long 0x00 3. " OTG_CLK_ON ,OTG clock status" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 2. " I2C_CLK_ON ,I2C clock status" "Not available,Available"
|
|
bitfld.long 0x00 1. " DEV_CLK_ON ,Device clock status" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HOST_CLK_ON ,Host clock status" "Not available,Available"
|
|
width 0xB
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2420"||cpu()=="LPC2468"||cpu()=="LPC2388"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
tree "USB Host Controller"
|
|
base 0xffe0c000
|
|
width 22.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x0 "HcRevision,BCD Representation Of The Version Of The HCI Specification Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. " REV ,BCD Representation Of The Version Of The HCI Specification"
|
|
group.long 0x04++0xf
|
|
line.long 0x0 "HcControl,HC Operating Modes Register"
|
|
bitfld.long 0x0 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected"
|
|
textline " "
|
|
bitfld.long 0x0 8. " IR ,Interrupt Routing" "Normal host bus,System Management"
|
|
bitfld.long 0x0 6.--7. " HCFS ,Host Controller Functional State for USB" "Reset,Resume,Operational,Suspend"
|
|
textline " "
|
|
bitfld.long 0x0 5. " BLE ,Bulk List Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " CLE ,Control List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " IE ,Isochronous Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " PLE ,Periodic List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1"
|
|
width 22.
|
|
line.long 0x4 "HcCommandStatus,HC Status Register"
|
|
bitfld.long 0x4 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3"
|
|
bitfld.long 0x4 3. " OCR ,Ownership Change Request" "Not requested,Requested"
|
|
bitfld.long 0x4 2. " BLF ,Bulk List Filled" "Not filled,Filled"
|
|
textline " "
|
|
bitfld.long 0x4 1. " CLF ,Control List Filled" "Not filled,Filled"
|
|
bitfld.long 0x4 0. " HCR ,Host Controller Reset" "No effect,Reset"
|
|
line.long 0x8 "HcInterruptStatus,HC Interrupt Status Register"
|
|
bitfld.long 0x8 30. " OC ,Ownership Change" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 6. " RHSC ,Root Hub Status Change" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 5. " FNO ,Frame Number Overflow" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x8 4. " UE ,Unrecoverable Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 3. " RD ,Resume Detected" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 2. " SF ,Start of Frame" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x8 1. " WDH ,Writeback Done Head" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 0. " SO ,Scheduling Overrun" "No interrupt,Interrupt"
|
|
width 22.
|
|
line.long 0xC "HcInterruptEn/Dis,HC Interrupt Enable/Disable Register"
|
|
setclrfld.long 0xC 31. 0xC 31. 0x10 31. " MIE_set/clr ,Master Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0xC 30. 0xC 30. 0x10 30. " OC_set/clr ,Ownership Change" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 6. 0xC 6. 0x10 6. " RHSC_set/clr ,Root Hub Status Change" "Disabled,Enabled"
|
|
setclrfld.long 0xC 5. 0xC 5. 0x10 5. " FNO_set/clr ,Frame Number Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 4. 0xC 4. 0x10 4. " UE_set/clr ,Unrecoverable Error" "Disabled,Enabled"
|
|
setclrfld.long 0xC 3. 0xC 3. 0x10 3. " RD_set/clr ,Resume Detected" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 2. 0xC 2. 0x10 2. " SF_set/clr ,Start of Frame" "Disabled,Enabled"
|
|
setclrfld.long 0xC 1. 0xC 1. 0x10 1. " WDH_set/clr ,Writeback Done Head" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 0. 0xC 0. 0x10 0. " SO_set/clr ,Scheduling Overrun" "Disabled,Enabled"
|
|
width 22.
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "HcHCCA,Host Controller Communication Area Physical Address Register"
|
|
hexmask.long 0x00 8.--31. 0x100 " HCCA ,Host Controller Communication Area Base Address"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "HcPeriodCurrentED,Current Isochronous Or Interrupt Endpoint Physical Address Register"
|
|
hexmask.long 0x0 4.--31. 0x10 " PCED ,Period Current ED"
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "HcControlHeadED,First Endpoint Of The Control List Physical Address Register"
|
|
hexmask.long 0x0 4.--31. 0x10 " CHED ,Control Head ED"
|
|
line.long 0x4 "HcControlCurrentED,Current Endpoint Of The Control List Physical Address Register"
|
|
hexmask.long 0x4 4.--31. 0x10 " CCED ,Control Current ED"
|
|
line.long 0x8 "HcBulkHeadED,First Endpoint Of The Bulk List Physical Address Register"
|
|
hexmask.long 0x8 4.--31. 0x10 " BHED ,Bulk Head ED"
|
|
line.long 0xC "HcBulkCurrentED,Current Endpoint Of The Bulk List Physical Address Register"
|
|
hexmask.long 0xC 4.--31. 0x10 " BCED ,Bulk Current ED"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "HcDoneHead,Last Transfer Descriptor Added Physical Address Register"
|
|
hexmask.long 0x0 4.--31. 0x10 " DH ,Done Head"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "HcFmInterval,HC Frame Interval Register"
|
|
bitfld.long 0x0 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled"
|
|
hexmask.long.word 0x0 16.--30. 1. " FSMPS ,FS Largest Data Packet"
|
|
hexmask.long.word 0x0 0.--13. 1. " FI ,Frame Interval"
|
|
rgroup.long 0x38++0x7
|
|
line.long 0x0 "HcFmRemaining,HC Frame Remaining Register"
|
|
bitfld.long 0x0 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled"
|
|
hexmask.long.word 0x0 0.--13. 1. " FR ,Frame Remaining"
|
|
line.long 0x4 "HcFmNumber,HC Frame Number Register"
|
|
hexmask.long.word 0x4 0.--13. 1. " FN ,Frame Number"
|
|
group.long 0x40++0x1B
|
|
line.long 0x0 "HcPeriodicStart,HC Periodic Start Register"
|
|
hexmask.long.word 0x0 0.--13. 1. " PS ,Periodic Start"
|
|
line.long 0x4 "HcLSThreshold,HC LS Threshold Register"
|
|
hexmask.long.word 0x4 0.--11. 1. " LST ,LS Threshold"
|
|
line.long 0x8 "HcRhDescriptorA,HC Root Hub Descriptor A Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " POTPGT ,Power On To Power Good Time"
|
|
bitfld.long 0x8 12. " NOCP ,No Over Current Protection" "Protection,No protection"
|
|
textline " "
|
|
bitfld.long 0x8 11. " OCPM ,Over Current Protection Mode" "Collectively,Per-port basis"
|
|
bitfld.long 0x8 10. " DT ,Device Type" "Not compound,Compound"
|
|
textline " "
|
|
bitfld.long 0x8 9. " NPS ,No Power Switching" "Switched,Not switched"
|
|
bitfld.long 0x8 8. " PSM ,Power Switching Mode" "Global,Individual"
|
|
textline " "
|
|
hexmask.long.byte 0x8 0.--7. 1. " NDP ,Number Downstream Ports"
|
|
line.long 0xC "HcRhDescriptorB,HC Root Hub Descriptor B Register"
|
|
hexmask.long.word 0xC 16.--31. 1. " PPCM ,Port Power Control Mask"
|
|
hexmask.long.word 0xC 0.--15. 1. " DR ,Device Removable"
|
|
width 22.
|
|
line.long 0x10 "HcRhStatus,HC Root Hub Status Register"
|
|
bitfld.long 0x10 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared"
|
|
eventfld.long 0x10 17. " OCIC ,Over Current Indicator Change" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 16. " LPSC ,Local Power Status Change/Set Global Power (read/write)" "Not supported/No effect,Not supported/Turn power on"
|
|
bitfld.long 0x10 15. " DRWE ,Device Remote Wakeup Enable/Set Remote Wakeup Enable (read/write)" "No wakeup/No effect,Wakeup/Set"
|
|
textline " "
|
|
bitfld.long 0x10 1. " OCI ,OverCurrent Indicator" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
bitfld.long 0x10 0. " LPS ,Local Power Status/Clear Global Power (read/write)" "Not supported/No effect,Not supported/Turn power off"
|
|
line.long 0x14 "HcRhPortStatus[1],HC Root Hub Port Status 1 Register"
|
|
eventfld.long 0x14 20. " PRSC ,Port Reset Status Change" "Not changed,Changed"
|
|
eventfld.long 0x14 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x14 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed"
|
|
eventfld.long 0x14 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x14 16. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x14 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear"
|
|
bitfld.long 0x14 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set"
|
|
textline " "
|
|
bitfld.long 0x14 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set"
|
|
textline " "
|
|
bitfld.long 0x14 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear"
|
|
textline " "
|
|
bitfld.long 0x14 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set"
|
|
bitfld.long 0x14 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set"
|
|
textline " "
|
|
bitfld.long 0x14 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear"
|
|
line.long 0x18 "HcRhPortStatus[2],HC Root Hub Port Status 2 Register"
|
|
eventfld.long 0x18 20. " PRSC ,Port Reset Status Change" "Not changed,Changed"
|
|
eventfld.long 0x18 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x18 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed"
|
|
eventfld.long 0x18 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x18 16. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x18 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear"
|
|
bitfld.long 0x18 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set"
|
|
textline " "
|
|
bitfld.long 0x18 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set"
|
|
textline " "
|
|
bitfld.long 0x18 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear"
|
|
textline " "
|
|
bitfld.long 0x18 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set"
|
|
bitfld.long 0x18 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set"
|
|
textline " "
|
|
bitfld.long 0x18 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear"
|
|
rgroup.long 0xFC++0x3
|
|
line.long 0x0 "Module_ID/Ver_Rev_ID,Module Version And Reversion ID Register"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
; --------------------------------------------------------------------------------
|
|
; RMII
|
|
; --------------------------------------------------------------------------------
|
|
tree "RMII (Ethernet controller/Reduced MII)"
|
|
sif (cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
base sd:0xFFE00000
|
|
width 0x6
|
|
tree "MAC registers"
|
|
if (((data.long(sd:(0xFFE00000+0xFF4)))&0x80000000)==0x00000000)
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "MAC1,MAC configuration register 1"
|
|
bitfld.long 0x00 15. " SOFTRESET ,All modules within the MAC reset except the Host Interface" "No reset,Reset"
|
|
bitfld.long 0x00 14. " SIMULATIONRESET ,Reset random number generator within the Transmit Function" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RESETMCS/RX ,Reset the MAC Control Sublayer / Receive logic" "No reset,Reset"
|
|
bitfld.long 0x00 10. " RESETRX ,Ethernet receive logic reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RESETMCS/TX ,Reset the MAC Control Sublayer / Transmit logic" "No reset,Reset"
|
|
bitfld.long 0x00 8. " RESETTX ,Transmit Function logic reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LOOPBACK ,MAC Transmit interface loop back to the MAC Receive interface" "Normal,Looped"
|
|
bitfld.long 0x00 3. " TXFLOWCONTROL ,PAUSE Flow Control frames transmission enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXFLOWCONTROL ,MAC received PAUSE Flow Control frames enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PASSALLRECEIVEFRAMES ,MAC pass all frames regardless of type" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RECEIVEENABLE ,Allow receive frames to be received" "Not allowed,Allowed"
|
|
line.long 0x4 "MAC2,MAC configuration register 2"
|
|
bitfld.long 0x04 14. " EXCESSDEFER ,MAC defer to carrier indefinitely as per the Standard" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " BACKPRESSURE/NOBACKOFF ,Immediately retransmit without backoff after the MAC incidentally causes a collision during back pressure" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " NOBACKOFF ,MAC immediately retransmit following a collision rather than using the Binary Exponential Backoff algorithm" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " LONGPREAMBLEENFORCEMENT ,MAC only allow receive packets which contain preamble fields less than 12 bytes in length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PUREPREAMBLEENFORCEMENT ,MAC verify the content of the preamble to ensure it contains 0x55 and is error-free" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " AUTODETECTPADENABLE ,MAC automatically detect the type of frame by comparing the two octets" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " VLANPADENABLE ,MAC pad all short frames to 64 bytes and append a valid CRC" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " PAD/CRCENABLE ,MAC pad all short frames" "Not padded,Padded"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CRCENABLE ,Append a CRC to every frame whether padding was required or not" "Not appended,Appended"
|
|
bitfld.long 0x04 3. " DELAYEDCRC ,Number of bytes (if any) of proprietary header information that exist on the front of IEEE 802.3 frames" "No header,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x04 2. " HUGEFRAMEENABLE ,Frames of any length transmit and receive" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " FRAMELENGTHCHECKING ,Both transmit and receive frame lengths compare to the Length/Type field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " FULL-DUPLEX ,MAC Full-Duplex mode" "Disabled,Enabled"
|
|
line.long 0x8 "IPGT,Back-to-Back Inter-Packet-Gap register"
|
|
hexmask.long.byte 0x8 0.--6. 1. " BACK-TO-BACKINTER-PACKET-GAP ,Nibble time offset of the minimum possible period"
|
|
line.long 0xC "IPGR,Non Back-to-Back Inter-Packet-Gap register"
|
|
hexmask.long.byte 0xC 8.--14. 1. " NON-BACK-TO-BACK-INTER-PACKET-GAP_PART1 ,Optional carrierSense window"
|
|
textline " "
|
|
hexmask.long.byte 0xC 0.--6. 1. " NON-BACK-TO-BACK-INTER-PACKET-GAP_PART2 ,Non-Back-to-Back Inter-Packet-Gap"
|
|
line.long 0x10 "CLRT,Collision window / Retry register"
|
|
hexmask.long.byte 0x10 8.--13. 1. " COLLISIONWINDOW ,Slot time or collision window during which collisions occur in properly configured networks"
|
|
bitfld.long 0x10 0.--3. " RETRANSMISSIONMAXIMUM ,Number of retransmission attempts following a collision before aborting the packet due to excessive collisions" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
line.long 0x14 "MAXF,Maximum Frame register"
|
|
hexmask.long.word 0x14 0.--15. 1. " MAXIMUMFRAMELENGTH ,Maximum receive frame"
|
|
line.long 0x18 "SUPP,PHY Support register"
|
|
bitfld.long 0x18 8. " SPEED ,Configure the Reduced MII logic for the current operating speed" "10 Mbps,100 Mbps"
|
|
line.long 0x1C "TEST,Test register"
|
|
bitfld.long 0x1C 2. " TESTBACKPRESSURE ,MAC assert backpressure on the link" "Not asserted,Asserted"
|
|
bitfld.long 0x1C 1. " TESTPAUSE ,MAC Control sublayer inhibit transmissions" "Not inhibited,Inhibited"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " SHORTCUTPAUSEQUANTA ,Reduce the effective PAUSE quanta from 64 byte-times to 1 byte-time" "Not reduced,Reduced"
|
|
line.long 0x20 "MCFG,MII Mgmt Configuration register"
|
|
bitfld.long 0x20 15. " RESETMIIMGMT ,Reset the MII Management hardware" "No reset,Reset"
|
|
bitfld.long 0x20 2.--4. " CLOCKSELECT ,MII Management Clock (MDC) which IEEE 802.3u defines to be no faster than 2.5 MHz" "Clock/4,Clock/4,Clock/6,Clock/8,Clock/10,Clock/14,Clock/20,Clock/28"
|
|
textline " "
|
|
bitfld.long 0x20 1. " SUPPRESSPREAMBLE ,MII Management hardware perform read/write cycles without the 32 bit preamble field" "Not performed,Performed"
|
|
bitfld.long 0x20 0. " SCANINCREMENT ,MII Management hardware perform read cycles across a range of PHYs" "Not performed,Performed"
|
|
line.long 0x24 "MCMD,MII Mgmt Command register"
|
|
bitfld.long 0x24 1. " SCAN ,MII Management hardware perform Read cycles continuously" "Not performed,Performed"
|
|
bitfld.long 0x24 0. " READ ,MII Management hardware perform a single Read cycle" "Not performed,Performed"
|
|
line.long 0x28 "MADR,MII Mgmt Address register"
|
|
bitfld.long 0x28 8.--12. " PHYADDRESS ,5 bit PHY Address field of Mgmt cycles" "Reserved,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F,10,11,12,13,14,15,16,17,18,19,1A,1B,1C,1D,1E,1F"
|
|
bitfld.long 0x28 0.--4. " REGISTERADDRESS ,5 bit Register Address field of Mgmt cycles" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F,10,11,12,13,14,15,16,17,18,19,1A,1B,1C,1D,1E,1F"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "MWTD,MII Mgmt Write Data register"
|
|
hexmask.long.word 0x0 0.--15. 1. " WRITEDATA ,16 bit write data"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "MRDD,MII Mgmt Read Data register"
|
|
hexmask.long.word 0x0 0.--15. 1. " READDATA ,16 bit read data"
|
|
line.long 0x4 "MIND,MII Mgmt Indicators register"
|
|
bitfld.long 0x04 3. " MIILinkFail ,MII Link Fail" "Not failed,Failed"
|
|
bitfld.long 0x04 2. " NOTVALID ,Not valid" "Valid,Not valid"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SCANNING ,Scanning" "Not scanning,Scanning"
|
|
bitfld.long 0x04 0. " BUSY ,Busy" "Not busy,Busy"
|
|
group.long 0x40++0xB
|
|
line.long 0x0 "SA0,Station Address 0 register"
|
|
hexmask.long.byte 0x0 8.--15. 1. " STATIONADDRESS1 ,First octet of the station address"
|
|
hexmask.long.byte 0x0 0.--7. 1. " STATIONADDRESS2 ,Second octet of the station address"
|
|
line.long 0x4 "SA1,Station Address 1 register"
|
|
hexmask.long.byte 0x4 8.--15. 1. " STATIONADDRESS3 ,Third octet of the station address"
|
|
hexmask.long.byte 0x4 0.--7. 1. " STATIONADDRESS4 ,Fourth octet of the station address"
|
|
line.long 0x8 "SA2,Station Address 2 register"
|
|
hexmask.long.byte 0x8 8.--15. 1. " STATIONADDRESS5 ,Fifth octet of the station address"
|
|
hexmask.long.byte 0x8 0.--7. 1. " STATIONADDRESS6 ,Sixth octet of the station address"
|
|
else
|
|
hgroup.long 0x0++0x37
|
|
hide.long 0x0 "MAC1,MAC configuration register 1"
|
|
hide.long 0x4 "MAC2,MAC configuration register 2"
|
|
hide.long 0x8 "IPGT,Back-to-Back Inter-Packet-Gap register"
|
|
hide.long 0xC "IPGR,Non Back-to-Back Inter-Packet-Gap register"
|
|
hide.long 0x10 "CLRT,Collision window / Retry register"
|
|
hide.long 0x14 "MAXF,Maximum Frame register"
|
|
hide.long 0x18 "SUPP,PHY Support register"
|
|
hide.long 0x1C "TEST,Test register"
|
|
hide.long 0x20 "MCFG,MII Mgmt Configuration register"
|
|
hide.long 0x24 "MCMD,MII Mgmt Command register"
|
|
hide.long 0x28 "MADR,MII Mgmt Address register"
|
|
hide.long 0x2C "MWTD,MII Mgmt Write Data register"
|
|
hide.long 0x30 "MRDD,MII Mgmt Read Data register"
|
|
hide.long 0x34 "MIND,MII Mgmt Indicators register"
|
|
hgroup.long 0x40++0xB
|
|
hide.long 0x0 "SA0,Station Address 0 register"
|
|
hide.long 0x4 "SA1,Station Address 1 register"
|
|
hide.long 0x8 "SA2,Station Address 2 register"
|
|
endif
|
|
tree.end
|
|
width 0x14
|
|
tree "Control registers"
|
|
if (((data.long(sd:(0xFFE00000+0xFF4)))&0x80000000)==0x00000000)
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "Command,Command register"
|
|
bitfld.long 0x00 10. " FullDuplex ,Full duplex operation" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RMII ,Mode selection" "MII,RMII"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TxFlowControl ,Enable IEEE 802.3 / clause 31 flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PassRxFilter ,Disable receive filtering" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PassRuntFrame ,Pass Runt Frame" "Filtered out,Passed"
|
|
bitfld.long 0x00 5. " RxReset ,Receive datapath reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TxReset ,Transmit datapath reset" "No reset,Reset"
|
|
bitfld.long 0x00 3. " RegReset ,All datapaths and the host registers reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TxEnable ,Enable transmit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RxEnable ,Enable receive" "Disabled,Enabled"
|
|
rgroup.long 0x104++0x3
|
|
line.long 0x0 "Status,Status register"
|
|
bitfld.long 0x0 1. " TxStatus ,Transmit channel active" "Inactive,Active"
|
|
bitfld.long 0x0 0. " RxStatus ,Receive channel active" "Inactive,Active"
|
|
group.long 0x108++0xB
|
|
line.long 0x0 "RxDescriptor,Receive descriptor base address register"
|
|
hexmask.long 0x0 2.--31. 0x4 " RxDescriptor ,MSBs of receive descriptor base address"
|
|
line.long 0x4 "RxStatus,Receive status base address register"
|
|
hexmask.long 0x4 3.--31. 0x8 " RxStatus ,MSBs of receive status base address"
|
|
line.long 0x8 "RxDescriptorNumber,Receive number of descriptors register"
|
|
hexmask.long.word 0x8 0.--15. 1. " RxDescriptorNumber ,Number of descriptors in the descriptor array for which RxDescriptor is the base address"
|
|
rgroup.long 0x114++0x3
|
|
line.long 0x0 "RxProduceIndex,Receive produce index register"
|
|
hexmask.long.word 0x0 0.--15. 1. " RxProduceIndex ,Index of the descriptor that is going to be filled next by the receive datapath"
|
|
group.long 0x118++0x13
|
|
line.long 0x0 "RxConsumeIndex,Receive consume index register"
|
|
hexmask.long.word 0x0 0.--15. 1. " RxConsumeIndex ,Index of the descriptor that is going to be processed next by the receive"
|
|
line.long 0x4 "TxDescriptor,Transmit descriptor base address register"
|
|
hexmask.long 0x4 2.--31. 0x4 " TxDescriptor ,MSBs of transmit descriptor base address"
|
|
line.long 0x8 "TxStatus,Transmit status base address register"
|
|
hexmask.long 0x8 2.--31. 0x4 " TxStatus ,MSBs of transmit status base address"
|
|
line.long 0xC "TxDescriptorNumber,Transmit number of descriptors register"
|
|
hexmask.long.word 0xC 0.--15. 1. " TxDescriptorNumber ,Number of descriptors in the descriptor array for which TxDescriptor is the base address"
|
|
line.long 0x10 "TxProduceIndex,Transmit produce index register"
|
|
hexmask.long.word 0x10 0.--15. 1. " TxProduceIndex ,Index of the descriptor that is going to be filled next by the transmit software driver"
|
|
rgroup.long 0x12C++0x3
|
|
line.long 0x0 "TxConsumeIndex,Transmit consume index register"
|
|
hexmask.long.word 0x0 0.--15. 1. " TxConsumeIndex ,Index of the descriptor that is going to be transmitted next by the transmit datapath"
|
|
rgroup.long 0x158++0xB
|
|
line.long 0x0 "TSV0,Transmit status vector 0 register"
|
|
bitfld.long 0x00 31. " VLAN ,Frame's length/type field contained 0x8100 which is the VLAN protocol identifier" "Not VLAN,VLAN"
|
|
bitfld.long 0x00 30. " Backpressure ,Carrier-sense method backpressure was previously applied" "Not applied,Applied"
|
|
textline " "
|
|
bitfld.long 0x00 29. " Pause ,The frame was a control frame with a valid PAUSE opcode" "No PAUSE,PAUSE"
|
|
bitfld.long 0x00 28. " Controlframe ,The frame was a control frame" "Not control,Control"
|
|
textline " "
|
|
hexmask.long.word 0x00 12.--27. 1. " Totalbytes ,The total number of bytes transferred including collided attempts"
|
|
bitfld.long 0x00 11. " Underrun ,Host side caused buffer underrun" "No underrun,Underrun"
|
|
textline " "
|
|
bitfld.long 0x00 10. " Giant ,Byte count in frame greater than can be represented in the transmit byte count field in TSV1" "Not greater,Greater"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LateCollision ,Collision occur beyond collision window (512 bit times)" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ExcessiveCollision ,Packet abort due to exceeding of maximum allowed number of collisions" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ExcessiveDefer ,Excessive Defer" "Not deferred,Deferred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PacketDefer ,Packet Defer" "Not deferred,Deferred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " Broadcast ,Broadcast address" "Not broadcast,Broadcast"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Multicast ,Multicast address" "Not multicast,Multicast"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Done ,Transmission of packet complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LOOR ,Length out of range" "In range,Out of range"
|
|
bitfld.long 0x00 1. " LCE ,Length check error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CRCerror ,CRC error" "No error,Error"
|
|
line.long 0x4 "TSV1,Transmit status vector 1 register"
|
|
bitfld.long 0x4 16.--19. " TCC ,Transmit collision count" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
hexmask.long.word 0x4 0.--15. 1. " TBC ,Transmit byte count"
|
|
line.long 0x8 "RSV,Receive status vector register"
|
|
bitfld.long 0x08 30. " VLAN ,Frame's length/type field contained 0x8100 which is the VLAN protocol identifier" "Not VLAN,VLAN"
|
|
textline " "
|
|
bitfld.long 0x08 29. " UnsupportedOpcode ,The current frame was recognized as a Control Frame but contains an unknown opcode" "Not unsupported,Unsupported"
|
|
textline " "
|
|
bitfld.long 0x08 28. " PAUSE ,The frame was a control frame with a valid PAUSE opcode" "No PAUSE,PAUSE"
|
|
textline " "
|
|
bitfld.long 0x08 27. " Controlframe ,The frame was a control frame" "Not control,Control"
|
|
textline " "
|
|
bitfld.long 0x08 26. " DribbleNibble ,After the end of packet another 1-7 bits were received" "No dribble nibble,Dribble nibble"
|
|
textline " "
|
|
bitfld.long 0x08 25. " Broadcast ,The packet destination was a broadcast address" "Not broadcast,Broadcast"
|
|
textline " "
|
|
bitfld.long 0x08 24. " Multicast ,The packet destination was a multicast address" "Not multicast,Multicast"
|
|
bitfld.long 0x08 23. " ReceiveOK ,The packet had valid CRC and no symbol errors" "Not OK,OK"
|
|
textline " "
|
|
bitfld.long 0x08 22. " LOOR ,Length out of range" "In range,Out of range"
|
|
bitfld.long 0x08 21. " LCE ,Length check error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 20. " CRCerror ,The attached CRC in the packet did not match the internally generated CRC" "No error,Error"
|
|
bitfld.long 0x08 19. " RCV ,Receive code violation" "Valid,Not valid"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CEPS ,Carrier event previously seen" "Not seen,Seen"
|
|
bitfld.long 0x08 17. " RXDVEPS ,RXDV event previously seen" "Not seen,Seen"
|
|
textline " "
|
|
bitfld.long 0x08 16. " PPI ,Packet previously ignored" "Not dropped,Dropped"
|
|
hexmask.long.word 0x08 0.--15. 1. " RBC ,Received byte count"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "FlowControlCounter,Flow control counter register"
|
|
hexmask.long.word 0x0 16.--31. 1. " PauseTimer ,Pause Timer"
|
|
hexmask.long.word 0x0 0.--15. 1. " MirrorCounter ,Number of cycles before re-issuing the Pause control frame"
|
|
rgroup.long 0x174++0x3
|
|
line.long 0x0 "FlowControlStatus,Flow control status register"
|
|
hexmask.long.word 0x0 0.--15. 1. " MirrorCounterCurrent ,Mirror Counter Current"
|
|
else
|
|
hgroup.long 0x100++0x2F
|
|
hide.long 0x0 "Command,Command register"
|
|
hide.long 0x4 "Status,Status register"
|
|
hide.long 0x8 "RxDescriptor,Receive descriptor base address register"
|
|
hide.long 0xC "RxStatus,Receive status base address register"
|
|
hide.long 0x10 "RxDescriptorNumber,Receive number of descriptors register"
|
|
hide.long 0x14 "RxProduceIndex,Receive produce index register"
|
|
hide.long 0x18 "RxConsumeIndex,Receive consume index register"
|
|
hide.long 0x1C "TxDescriptor,Transmit descriptor base address register"
|
|
hide.long 0x20 "TxStatus,Transmit status base address register"
|
|
hide.long 0x24 "TxDescriptorNumber,Transmit number of descriptors register"
|
|
hide.long 0x28 "TxProduceIndex,Transmit produce index register"
|
|
hide.long 0x2C "TxConsumeIndex,Transmit consume index register"
|
|
hgroup.long 0x158++0xB
|
|
hide.long 0x0 "TSV0,Transmit status vector 0 register"
|
|
hide.long 0x4 "TSV1,Transmit status vector 1 register"
|
|
hide.long 0x8 "RSV,Receive status vector register"
|
|
hgroup.long 0x170++0x7
|
|
hide.long 0x0 "FlowControlCounter,Flow control counter register"
|
|
hide.long 0x4 "FlowControlStatus,Flow control status register"
|
|
endif
|
|
tree.end
|
|
width 0x13
|
|
tree "Receive filter registers"
|
|
if (((data.long(sd:(0xFFE00000+0xFF4)))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "RxFilterCtrl,Receive filter control register"
|
|
bitfld.long 0x00 13. " RxFilterEnWoL ,Rx Filter Enable WoL" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MagicPacketEnWoL ,Magic Packet Enable WoL" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AcceptPerfectEn ,Accept Perfect Enable" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AcceptMulticastHashEn ,Accept Multicast Hash Enable" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AcceptUnicastHashEn ,Accept Unicast Hash Enable" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AcceptMulticastEn ,Accept Multicast Enable" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AcceptBroadcastEn ,Accept Broadcast Enable" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " AcceptUnicastEn ,Accept Unicast Enable" "Not accepted,Accepted"
|
|
rgroup.long 0x204++0x3
|
|
line.long 0x0 "RxFilterWoLStatus,Receive filter WoL status register"
|
|
bitfld.long 0x00 8. " MagicPacketWoL ,Magic Packet WoL" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RxFilterWoL ,Rx Filter WoL" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AcceptPerfectWoL ,Accept Perfect WoL" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AcceptMulticastHashWoL ,Accept Multicast Hash WoL" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AcceptUnicastHashWoL ,Accept Unicast Hash WoL" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AcceptMulticastWoL ,Accept Multicast WoL" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AcceptBroadcastWoL ,Accept Broadcast WoL" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 0. " AcceptUnicastWoL ,Accept Unicast WoL" "Not caused,Caused"
|
|
wgroup.long 0x208++0x3
|
|
line.long 0x0 "RxFilterWoLClear,Receive filter WoL clear register"
|
|
bitfld.long 0x00 8. " MagicPacketWoLClr ,Magic Packet Wake-up on LAN Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RxFilterWoLClr ,Receive Filter Wake-up on LAN Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AcceptPerfectWoLClr ,Accept Perfect Wake-up on LAN Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AcceptMulticastHashWoLClr ,Accept Multicast Hash Wake-up on LAN Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AcceptUnicastHashWoLClr ,Accept Unicast Hash Wake-up on LAN Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AcceptMulticastWoLClr ,Accept Multicast Wake-up on LAN Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AcceptBroadcastWoLClr ,Accept Broadcast Wake-up on LAN Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " AcceptUnicastWoLClr ,Accept Unicast Wake-up on LAN Clear" "Not cleared,Cleared"
|
|
group.long 0x210++0x7
|
|
line.long 0x0 "HashFilterL,Hash filter table LSBs register"
|
|
line.long 0x4 "HashFilterH,Hash filter table MSBs register"
|
|
else
|
|
hgroup.long 0x200++0xB
|
|
hide.long 0x0 "RxFilterCtrl,Receive filter control register"
|
|
hide.long 0x4 "RxFilterWoLStatus,Receive filter WoL status register"
|
|
hide.long 0x8 "RxFilterWoLClear,Receive filter WoL clear register"
|
|
hgroup.long 0x210++0x7
|
|
hide.long 0x0 "HashFilterL,Hash filter table LSBs register"
|
|
hide.long 0x4 "HashFilterH,Hash filter table MSBs register"
|
|
endif
|
|
tree.end
|
|
width 0xB
|
|
tree "Module control registers"
|
|
if (((data.long(sd:(0xFFE00000+0xFF4)))&0x80000000)==0x00000000)
|
|
group.long 0xFE0++0x3
|
|
line.long 0x0 "IntStatus,Interrupt status register"
|
|
setclrfld.long 0x00 13. 0xC 13. 0x8 13. " WakeupInt_Clear/Set ,Interrupt triggered by a Wakeup event detected by the receive filter" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0xC 12. 0x8 12. " SoftInt_Clear/Set ,Interrupt triggered by software writing a 1 to the SoftintSet bit in the IntSet register" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0xC 7. 0x8 7. " TxDoneInt_Clear/Set ,Interrupt triggered when a descriptor has been transmitted" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0xC 6. 0x8 6. " TxFinishedInt_Clear/Set ,Interrupt triggered when all transmit descriptors have been processed" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0xC 5. 0x8 5. " TxErrorInt_Clear/Set ,Interrupt trigger on transmit errors (LateCollision/ExcessiveCollision and ExcessiveDefer/NoDescriptor/Underrun)" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0xC 4. 0x8 4. " TxUnderrunInt_Clear/Set ,Interrupt set on a fatal underrun error in the transmit queue" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0xC 3. 0x8 3. " RxDoneInt_Clear/Set ,Interrupt triggered when a receive descriptor has been processed" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0xC 2. 0x8 2. " RxFinishedInt_Clear/Set ,Interrupt triggered when all receive descriptors have been processed" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0xC 1. 0x8 1. " RxErrorInt_Clear/Set ,Interrupt trigger on receive errors" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0xC 0. 0x8 0. " RxOverrunInt_Clear/Set ,Interrupt set on a fatal overrun error in the receive queue" "No interrupt,Interrupt"
|
|
group.long 0xFE4++0x3
|
|
line.long 0x0 "IntEnable,Interrupt enable register"
|
|
bitfld.long 0x00 13. " WakeupIntEn ,Enable for interrupt triggered by a Wakeup event detected by the receive filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SoftIntEn ,Enable for interrupt triggered by the SoftInt bit in the IntStatus register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TxDoneIntEn ,Enable for interrupt triggered when a descriptor has been transmitted" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TxFinishedIntEn ,Enable for interrupt triggered when all transmit descriptors have been processed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TxErrorIntEn ,Enable for interrupt trigger on transmit errors" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " TxUnderrunIntEn ,Enable for interrupt trigger on transmit buffer or descriptor underrun situations" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RxDoneIntEn ,Enable for interrupt triggered when a receive descriptor has been processed" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RxFinishedIntEn ,Enable for interrupt triggered when all receive descriptors have been processed" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RxErrorIntEn ,Enable for interrupt trigger on receive errors" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RxOverrunIntEn ,Enable for interrupt trigger on receive buffer overrun or descriptor underrun situations" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xFE0++0x7
|
|
hide.long 0x0 "IntStatus,Interrupt status register"
|
|
hide.long 0x4 "IntEnable,Interrupt enable register"
|
|
endif
|
|
group.long 0xFF4++0x3
|
|
line.long 0x0 "PowerDown,Power-down register"
|
|
bitfld.long 0x0 31. " PowerDownMACAHB ,Power Down Media Access Control AHB" "Access allowed,Access denied"
|
|
tree.end
|
|
wgroup vm:0x0++0x0
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; PCAMM
|
|
; --------------------------------------------------------------------------------
|
|
tree "Processor Cache And Memory Mapping"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80104000
|
|
width 17.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "CACHE_RST_STAT,Cache Reset Status register"
|
|
bitfld.long 0x00 0. " CACHE_STATUS ,Cache reset status" "Complete,Ongoing"
|
|
group.long 0x04++0x13
|
|
line.long 0x00 "CACHE_SETTINGS,Cache Settings register"
|
|
bitfld.long 0x00 0. " CACHE_RST ,Cache controller reset control" "De-asserted,Asserted"
|
|
bitfld.long 0x00 1. " DATA_ENABLE ,Cache for storing data enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INSTRUCTION_ENABLE ,Cache for storing instructions enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PERF_ANAL_RST ,Software reset of the cache performanceanalysis counters" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PERF_ANAL_ENA ,Performance analysis counters enable" "Disabled,Enabled"
|
|
line.long 0x04 "CACHE_PAGE_CTRL,Cache Page Enable Control register"
|
|
bitfld.long 0x04 0. " PAGE_0_ENA ,Caching for page 0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " PAGE_1_ENA ,Caching for page 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PAGE_2_ENA ,Caching for page 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " PAGE_3_ENA ,Caching for page 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " PAGE_4_ENA ,Caching for page 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " PAGE_5_ENA ,Caching for page 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " PAGE_6_ENA ,Caching for page 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PAGE_7_ENA ,Caching for page 7 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PAGE_8_ENA ,Caching for page 8 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " PAGE_9_ENA ,Caching for page 9 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " PAGE_10_ENA ,Caching for page 10 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " PAGE_11_ENA ,Caching for page 11 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PAGE_12_ENA ,Caching for page 12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " PAGE_13_ENA ,Caching for page 13 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14. " PAGE_14_ENA ,Caching for page 14 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " PAGE_15_ENA ,Caching for page 15 enable" "Disabled,Enabled"
|
|
line.long 0x08 "C_RD_MISSES,Cache Read Misses counter"
|
|
line.long 0x0C "C_FLUSHES,Cache Flushes counter"
|
|
line.long 0x10 "C_WR_MISSES,Cache Write Misses counter"
|
|
group.long 0x18++0x3F
|
|
line.long 0x0 "PAGE_ADDRESS0,Page 0 Address Pointer Registers"
|
|
hexmask.long.word 0x0 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x4 "PAGE_ADDRESS1,Page 1 Address Pointer Registers"
|
|
hexmask.long.word 0x4 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x8 "PAGE_ADDRESS2,Page 2 Address Pointer Registers"
|
|
hexmask.long.word 0x8 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0xC "PAGE_ADDRESS3,Page 3 Address Pointer Registers"
|
|
hexmask.long.word 0xC 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x10 "PAGE_ADDRESS4,Page 4 Address Pointer Registers"
|
|
hexmask.long.word 0x10 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x14 "PAGE_ADDRESS5,Page 5 Address Pointer Registers"
|
|
hexmask.long.word 0x14 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x18 "PAGE_ADDRESS6,Page 6 Address Pointer Registers"
|
|
hexmask.long.word 0x18 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x1C "PAGE_ADDRESS7,Page 7 Address Pointer Registers"
|
|
hexmask.long.word 0x1C 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x20 "PAGE_ADDRESS8,Page 8 Address Pointer Registers"
|
|
hexmask.long.word 0x20 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x24 "PAGE_ADDRESS9,Page 9 Address Pointer Registers"
|
|
hexmask.long.word 0x24 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x28 "PAGE_ADDRESS10,Page 10 Address Pointer Registers"
|
|
hexmask.long.word 0x28 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x2C "PAGE_ADDRESS11,Page 11 Address Pointer Registers"
|
|
hexmask.long.word 0x2C 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x30 "PAGE_ADDRESS12,Page 12 Address Pointer Registers"
|
|
hexmask.long.word 0x30 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x34 "PAGE_ADDRESS13,Page 13 Address Pointer Registers"
|
|
hexmask.long.word 0x34 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
line.long 0x38 "PAGE_ADDRESS14,Page 14 Address Pointer Registers"
|
|
hexmask.long.word 0x38 0.--10. 1. " UPPR_ADDR ,Top 11 bits of the 32-bit address coming from the CPU"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CPU_CLK_GATE,CPU Clock Gate control"
|
|
bitfld.long 0x00 0. " CPU_CLK_GATE ,Clock gating to the CPU" "Not gated off,Gated off"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; FI
|
|
; --------------------------------------------------------------------------------
|
|
tree "Flash Interface"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80102000
|
|
width 13.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "F_CTRL,Flash Control register"
|
|
bitfld.long 0x00 0. " FC_CS ,Flash chip mode select" "Standby,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FC_FUNC ,Program/erase select" "Erase,Program"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FC_WEN ,Program/erase enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FC_RD_LATCH ,Reading of Flash data or Flash data latch" "Flash array,Data latches"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FC_PROTECT ,Program/Erase protection" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FC_SET_DATA ,Preset data latches" "No effect,All bits to 1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FC_RSSL ,Reading of Flash array/sector selection latches" "Flash array,Sector selection latches"
|
|
textline " "
|
|
bitfld.long 0x00 12. " FC_PROG_REQ ,Request Flash programming" "No effect,Programming request"
|
|
textline " "
|
|
bitfld.long 0x00 14. " FC_CLR_BUF ,Clear flash data buffer" "No effect,All bits to 1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FC_LOAD_REQ ,Flash data load request" "Not requested,Write to Flash"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "F_STAT,Flash Status register"
|
|
bitfld.long 0x00 0. " FS_DONE ,Programming cycle done" "Not done,Done"
|
|
bitfld.long 0x00 1. " FS_PROGGNT ,Flash bus lock grant" "Not granted,Granted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FS_RDY ,Flash ready indication" "Busy,Ready"
|
|
bitfld.long 0x00 5. " FS_ERR ,Flash read bit error detection" "No error,Error"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "F_PROG_TIME,Flash Program Time register"
|
|
hexmask.long.word 0x00 0.--14. 1. " FPT_TIME ,Programming timer"
|
|
bitfld.long 0x00 15. " FPT_ENABLE ,Program timer Enable" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "F_WAIT,Flash Wait States register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " WAIT_STATES ,Number of wait states used for flash read operations"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "F_CLK_TIME,Flash Clock Divider register"
|
|
hexmask.long.word 0x00 0.--11. 1. " CLK_DIV ,Clock divider setting"
|
|
group.long 0xFE0++0x07
|
|
line.long 0x00 "F_INT_STAT,Flash Interrupt Status register"
|
|
setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " END_OF_ERASE_set/clr ,ERASE End-of-erase interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x0C 1. 0x08 0. " END_OF_PROGRAM_set/clr ,End-of-Program interrupt" "No interrupt,Interrupt"
|
|
line.long 0x04 "F_INTEN,Flash Interrupt Enable register"
|
|
setclrfld.long 0x04 0. -0x04 0. -0x08 0. " EOE_ENABLE_set/clr ,End-of-erase interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. -0x04 1. -0x08 1. " EOP_ENABLE_set/clr ,End-of-Program interrupt enable" "Disabled,Enabled"
|
|
base 0x80005000
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "FLASH_INIT,Flash Initialization register"
|
|
bitfld.long 0x00 0. " FLASH_INIT ,Flash initialization status bit" "Ready,Not ready"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "FLASH_PD,Flash Power Down register"
|
|
bitfld.long 0x00 0. " FLASH_PD ,Flash memory system Power Down control" "Powered down,Powered up"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; DC/DC
|
|
; --------------------------------------------------------------------------------
|
|
tree "DC-DC Converter"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80005000
|
|
width 13.
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "DCDCADJUST1,DCDC converter 1 Adjustment register"
|
|
bitfld.long 0x00 0.--2. " DCDCADJUST1 ,DCDC converter 1 adjustment typical value" "3.636,3.477,3.318,3.159,2.999,2.840,2.681,2.522"
|
|
line.long 0x04 "DCDCADJUST2,DCDC converter 2 Adjustment register"
|
|
bitfld.long 0x04 0.--2. " DCDCADJUST2 ,DCDC converter 2 adjustment typical value" "1.779,1.699,1.619,1.540,1.460,1.380,1.300,1.221"
|
|
line.long 0x08 "DCDCCLKSEL,DCDC Clock Select register"
|
|
bitfld.long 0x08 0. " DCDCCLKSEL ,Source to control the DC-DC converters" "Ring oscillator,12 MHz clock"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; CGU
|
|
; --------------------------------------------------------------------------------
|
|
tree "CGU (Clock Generation Unit)"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80004000
|
|
width 10.
|
|
group.long 0xC00++0x03 "Configuration Registers"
|
|
line.long 0x00 "PMODE,Power Mode Register"
|
|
bitfld.long 0x00 0.--1. " CGUMode ,Modules selected for 'wakeup' operation " "Reserved,Wakeup,Reserved,Disabled"
|
|
rgroup.long 0xC04++0x03
|
|
line.long 0x00 "WDBARK,Watchdog Bark Register"
|
|
bitfld.long 0x00 0. " Bark ,Reset type" "0,1"
|
|
group.long 0xC08++0x03
|
|
line.long 0x00 "OSC32EN,32 kHz Oscillator Control Register"
|
|
bitfld.long 0x00 0. " OSC32EN ,32 kHz oscillator enable" "Disabled,Enabled"
|
|
group.long 0xC10++0x03
|
|
line.long 0x00 "OSCEN,12 MHz Oscillator Control Register"
|
|
bitfld.long 0x00 0. " OSCEN ,Fast oscillator enable" "Disabled,Enabled"
|
|
tree "PLL Registers"
|
|
group.long 0xCE4++0x0B
|
|
line.long 0x00 "LPFIN,Input Select Register"
|
|
bitfld.long 0x00 0.--2. " CLKIN ,Main PLL input clock" "32 kHz oscillator,12 MHz oscillator,MCLKI pin,BCKI pin,WSI pin,Reserved,Reserved,High Speed PLL"
|
|
line.long 0x04 "LPPDN,Power Down Register"
|
|
bitfld.long 0x04 0. " PWD ,PLL power after reset" "Powered up,Powered down"
|
|
line.long 0x08 "LPMBYP,Multiplier Bypass Register"
|
|
bitfld.long 0x08 0. " BPASS , Multiplexer bypass" "Not bypassed,Bypassed"
|
|
rgroup.long 0xCF0++0x03
|
|
line.long 0x00 "LPLOCK,Lock Status Register"
|
|
bitfld.long 0x00 0. " LCK ,PLL synchronization lock" "Not locked,Locked"
|
|
group.long 0xCF4++0x0B
|
|
line.long 0x00 "LPDBYP,Divisor Bypass Register"
|
|
bitfld.long 0x00 0. " BPASS ,Divisor bypass" "Used,Not used"
|
|
line.long 0x04 "LPMSEL,Multiplication Factor"
|
|
;hexmask.long 0x04 0. 1. " MultFact ,Output clock value stet"
|
|
line.long 0x08 "LPPSEL,Division Factor"
|
|
;bitfld.long 0x08 0.--1. " DivFact ,FCLKOUT multipler value" "2,4,8,16"
|
|
group.long 0xCAC++0x03
|
|
line.long 0x00 "HPFIN,Input Select Register"
|
|
bitfld.long 0x00 0.--3. " HPSelect ,HS PLL input clock select" "Reserved,12 MHz oscillator,MCLKI pin,BCKI pin,WSI pin,Reserved,Reserved,Reserved,Main PLL,?..."
|
|
group.long 0xCB4++0x03
|
|
line.long 0x00 "HPNDEC,Initial Divider Control"
|
|
hexmask.long.word 0x00 0.--9. 1. " NDEC ,Initial divider value"
|
|
group.long 0xCB0++0x03
|
|
line.long 0x00 "HPMDEC,Multiplier Control"
|
|
hexmask.long.tbyte 0x00 0.--16. 1. " MDEC ,Multiplexer value"
|
|
group.long 0xCB8++0x03
|
|
line.long 0x00 "HPPDEC,Final Divider Control"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PDEC ,Final divider value"
|
|
group.long 0xCBC++0x03
|
|
line.long 0x00 "HPMODE,HS PLL Mode Control Register"
|
|
bitfld.long 0x00 0. " HPCLKEN ,HP PLL output clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HPPD ,HP PLL power down" "Not power down,Power down"
|
|
bitfld.long 0x00 4. " DIRECTI ,Initial divider disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FREERUN ,Feedback disable" "Enabled,Disabled"
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "HPSTAT,HP PLL Status"
|
|
bitfld.long 0x00 0. " HPLOCK ,Synchronization Lock" "Not achieved,Achieved"
|
|
bitfld.long 0x00 1. " HPFREE ,Free Running mode" "Disabled,Enabled"
|
|
group.long 0xCC8++0x03
|
|
line.long 0x00 "HPREQ,Rate Change Request"
|
|
bitfld.long 0x00 0. " HPMREQ ,HPMREQ" "0,1"
|
|
bitfld.long 0x00 1. " HPNREQ ,HPNREQ" "0,1"
|
|
bitfld.long 0x00 2. " HPPREQ ,HPPREQ" "0,1"
|
|
group.long 0xCC4++0x03
|
|
line.long 0x00 "HPACK,Rate Change Acknowledge"
|
|
bitfld.long 0x00 0. " HPMACK ,HPMACK" "0,1"
|
|
bitfld.long 0x00 1. " HPNACK ,HPNACK" "0,1"
|
|
bitfld.long 0x00 2. " HPPACK ,HPPACK" "0,1"
|
|
group.long 0xCD8++0x0B
|
|
line.long 0x00 "HPSELR,R Bandwidth Register"
|
|
hexmask.long.byte 0x00 0.--3. 1. " SELR ,R Bandwidth Value"
|
|
line.long 0x04 "HPSELI,I Bandwidth Register"
|
|
hexmask.long.byte 0x04 0.--3. 1. " SELI ,I Bandwidth Value"
|
|
line.long 0x08 "HPSELP,P Bandwidth Register"
|
|
hexmask.long.byte 0x08 0.--4. 1. " SELP ,P Bandwidth Value"
|
|
tree.end
|
|
tree "Selection Stage Registers"
|
|
group.long 0x000++0x27
|
|
line.long 0x0 "SYSSCR,Switch Configuration Register"
|
|
bitfld.long 0x0 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x0 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0x4 "APB0SCR,Switch Configuration Register"
|
|
bitfld.long 0x4 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x4 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0x8 "APB1SCR,Switch Configuration Register"
|
|
bitfld.long 0x8 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x8 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0xC "APB3SCR,Switch Configuration Register"
|
|
bitfld.long 0xC 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0xC 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0x10 "DCDCSCR,Switch Configuration Register"
|
|
bitfld.long 0x10 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x10 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0x14 "RTCSCR,Switch Configuration Register"
|
|
bitfld.long 0x14 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x14 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0x18 "MCISCR,Switch Configuration Register"
|
|
bitfld.long 0x18 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x18 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0x1C "UARTSCR,Switch Configuration Register"
|
|
bitfld.long 0x1C 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x1C 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0x20 "DAIOSCR,Switch Configuration Register"
|
|
bitfld.long 0x20 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x20 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
line.long 0x24 "DAISCR,Switch Configuration Register"
|
|
bitfld.long 0x24 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 2. " SCRES ,Selection stage reset" "No reset,Reset"
|
|
bitfld.long 0x24 3. " SCSTOP ,Output of the stage disable" "Enabled,Disabled"
|
|
group.long 0x02C++0x27
|
|
line.long 0x0 "SYSFSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x0 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x4 "APB0FSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x4 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x8 "APB1FSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x8 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0xC "APB3FSR1,Frequency Select 1 Register"
|
|
bitfld.long 0xC 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x10 "DCDCFSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x10 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x14 "RTCFSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x14 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x18 "MCIFSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x18 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x1C "UARTFSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x1C 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x20 "DAIOFSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x20 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x24 "DAIFSR1,Frequency Select 1 Register"
|
|
bitfld.long 0x24 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
group.long 0x058++0x27
|
|
line.long 0x0 "SYSFSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x0 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x4 "APB0FSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x4 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x8 "APB1FSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x8 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0xC "APB3FSR2,Frequency Select 2 Register"
|
|
bitfld.long 0xC 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x10 "DCDCFSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x10 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x14 "RTCFSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x14 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x18 "MCIFSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x18 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x1C "UARTFSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x1C 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x20 "DAIOFSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x20 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
line.long 0x24 "DAIFSR2,Frequency Select 2 Register"
|
|
bitfld.long 0x24 0.--3. " SELECT ,Main clock for side 1" "32 kHz oscillator,Fast oscillator,MCI Clock pin,DAI BCLK pin,DAI WS pin,Reserved,Reserved,High Speed PLL,Main PLL,?..."
|
|
rgroup.long 0x084++0x27
|
|
line.long 0x0 "SYSSSR,Switch status Register"
|
|
bitfld.long 0x0 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0x4 "APB0SSR,Switch status Register"
|
|
bitfld.long 0x4 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x4 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0x8 "APB1SSR,Switch status Register"
|
|
bitfld.long 0x8 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0xC "APB3SSR,Switch status Register"
|
|
bitfld.long 0xC 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0xC 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0x10 "DCDCSSR,Switch status Register"
|
|
bitfld.long 0x10 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0x14 "RTCSSR,Switch status Register"
|
|
bitfld.long 0x14 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0x18 "MCISSR,Switch status Register"
|
|
bitfld.long 0x18 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0x1C "UARTSSR,Switch status Register"
|
|
bitfld.long 0x1C 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x1C 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0x20 "DAIOSSR,Switch status Register"
|
|
bitfld.long 0x20 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x20 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
line.long 0x24 "DAISSR,Switch status Register"
|
|
bitfld.long 0x24 0. " ENF1 ,Side 1 of the stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 1. " ENF2 ,Side 2 of the stage enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x24 2.--5. 1. " RMCLK ,Reflection of enabled side main clock selection"
|
|
group.long 0x3F0++0x0B
|
|
line.long 0x0 "SYSBCR,Base Control Register"
|
|
bitfld.long 0x0 0. " FDRUN ,Operation of all the Fractional Dividers" "Disabled,Enabled"
|
|
line.long 0x4 "APB0BCR,Base Control Register"
|
|
bitfld.long 0x4 0. " FDRUN ,Operation of all the Fractional Dividers" "Disabled,Enabled"
|
|
line.long 0x8 "DAIOBCR,Base Control Register"
|
|
bitfld.long 0x8 0. " FDRUN ,Operation of all the Fractional Dividers" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Fractional Divider Configuration Registers"
|
|
group.long 0x3FC++0x43
|
|
line.long 0x0 "SYSFDCR0,Fractional divider configuration register"
|
|
bitfld.long 0x0 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x0 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x0 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x4 "SYSFDCR1,Fractional divider configuration register"
|
|
bitfld.long 0x4 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x4 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x4 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x4 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x8 "SYSFDCR2,Fractional divider configuration register"
|
|
bitfld.long 0x8 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x8 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x8 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x8 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0xC "SYSFDCR3,Fractional divider configuration register"
|
|
bitfld.long 0xC 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0xC 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0xC 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0xC 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x10 "SYSFDCR4,Fractional divider configuration register"
|
|
bitfld.long 0x10 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x10 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x10 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x14 "SYSFDCR5,Fractional divider configuration register"
|
|
bitfld.long 0x14 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x14 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x14 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x18 "APB0FDCR0,Fractional divider configuration register"
|
|
bitfld.long 0x18 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x18 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x18 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x18 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x1C "APB0FDCR1,Fractional divider configuration register"
|
|
bitfld.long 0x1C 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x1C 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x1C 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x20 "APB1FDCR,Fractional divider configuration register"
|
|
bitfld.long 0x20 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x20 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x20 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x20 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x24 "APB3FDCR,Fractional divider configuration register"
|
|
bitfld.long 0x24 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x24 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x24 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x24 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x28 "UARTFDCR,Fractional divider configuration register"
|
|
bitfld.long 0x28 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x28 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x28 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x28 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x2C "DAIOFDCR0,Fractional divider configuration register"
|
|
bitfld.long 0x2C 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x2C 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x2C 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x2C 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x30 "DAIOFDCR1,Fractional divider configuration register"
|
|
bitfld.long 0x30 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x30 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x30 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x30 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x34 "DAIOFDCR2,Fractional divider configuration register"
|
|
bitfld.long 0x34 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x34 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x34 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x34 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x38 "DAIOFDCR3,Fractional divider configuration register"
|
|
bitfld.long 0x38 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x38 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x38 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x38 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x3C "DAIOFDCR4,Fractional divider configuration register"
|
|
bitfld.long 0x3C 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x3C 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x3C 3.--12. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.word 0x3C 13.--22. 1. " MSUB ,Multiply and divide of base clock values"
|
|
line.long 0x40 "DAIOFDCR5,Fractional divider configuration register"
|
|
bitfld.long 0x40 0. " FDRUN ,Fractional divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 1. " FDRES ,Fractional divider reset" "No reset,Reset"
|
|
bitfld.long 0x40 2. " FDSTRCH ,Base clock pulse stretch" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x40 3.--10. 1. " MADD ,Multiply and divide of base clock values"
|
|
hexmask.long.byte 0x40 11.--18. 1. " MSUB ,Multiply and divide of base clock values"
|
|
tree.end
|
|
tree "Power Control Registers (1)"
|
|
group.long 0x0B0++0x23
|
|
line.long 0x0 "APB0PCR0,Power control register"
|
|
bitfld.long 0x0 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x0 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x4 "APB1PCR0,Power control register"
|
|
bitfld.long 0x4 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x4 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x4 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x8 "APB2PCR,Power control register"
|
|
bitfld.long 0x8 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x8 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x8 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0xC "APB3PCR0,Power control register"
|
|
bitfld.long 0xC 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0xC 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0xC 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x10 "MMIOPCR0,Power control register"
|
|
bitfld.long 0x10 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x10 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x14 "AHB0PCR,Power control register"
|
|
bitfld.long 0x14 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x14 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x14 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x18 "MCIPCR0,Power control register"
|
|
bitfld.long 0x18 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x18 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x1C "MCIPCR1,Power control register"
|
|
bitfld.long 0x1C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x1C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x1C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x20 "UARTPCR0,Power control register"
|
|
bitfld.long 0x20 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x20 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x20 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
group.long 0x0DC++0x7F
|
|
line.long 0x0 "FLSHPCR0,Power control register"
|
|
bitfld.long 0x0 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x0 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x4 "FLSHPCR1,Power control register"
|
|
bitfld.long 0x4 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x4 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x4 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x8 "FLSHPCR2,Power control register"
|
|
bitfld.long 0x8 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x8 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x8 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0xC "LCDPCR0,Power control register"
|
|
bitfld.long 0xC 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0xC 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0xC 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x10 "LCDPCR1,Power control register"
|
|
bitfld.long 0x10 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x10 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x14 "DMAPCR0,Power control register"
|
|
bitfld.long 0x14 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x14 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x14 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x18 "DMAPCR1,Power control register"
|
|
bitfld.long 0x18 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x18 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x1C "USBPCR0,Power control register"
|
|
bitfld.long 0x1C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x1C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x1C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x20 "CPUPCR0,Power control register"
|
|
bitfld.long 0x20 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x20 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x20 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x24 "CPUPCR1,Power control register"
|
|
bitfld.long 0x24 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x24 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x24 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x28 "CPUPCR2,Power control register"
|
|
bitfld.long 0x28 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x28 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x28 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x2C "RAMPCR,Power control register"
|
|
bitfld.long 0x2C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x2C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x2C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x30 "ROMPCR,Power control register"
|
|
bitfld.long 0x30 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x30 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x30 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x34 "EMCPCR0,Power control register"
|
|
bitfld.long 0x34 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x34 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x34 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x38 "EMCPCR1,Power control register"
|
|
bitfld.long 0x38 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x38 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x38 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x3C "MMIOPCR1,Power control register"
|
|
bitfld.long 0x3C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x3C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x3C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x40 "APB0PCR1,Power control register"
|
|
bitfld.long 0x40 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x40 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x40 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x44 "EVRTPCR,Power control register"
|
|
bitfld.long 0x44 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x44 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x44 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x48 "RTCPCR0,Power control register"
|
|
bitfld.long 0x48 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x48 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x48 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x4C "ADCPCR0,Power control register"
|
|
bitfld.long 0x4C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x4C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x4C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x50 "ADCPCR1,Power control register"
|
|
bitfld.long 0x50 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x50 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x50 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x50 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x50 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x54 "WDTPCR,Power control register"
|
|
bitfld.long 0x54 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x54 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x54 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x54 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x54 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x58 "IOCPCR,Power control register"
|
|
bitfld.long 0x58 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x58 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x58 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x58 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x5C "CGUPCR,Power control register"
|
|
bitfld.long 0x5C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x5C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x5C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x5C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x5C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x60 "SYSCPCR,Power control register"
|
|
bitfld.long 0x60 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x60 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x60 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x60 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x60 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x64 "APB1PCR1,Power control register"
|
|
bitfld.long 0x64 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x64 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x64 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x64 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x64 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x68 "T0PCR,Power control register"
|
|
bitfld.long 0x68 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x68 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x68 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x68 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x68 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x6C "T1PCR,Power control register"
|
|
bitfld.long 0x6C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x6C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x6C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x6C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x6C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x70 "I2CPCR,Power control register"
|
|
bitfld.long 0x70 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x70 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x70 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x70 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x70 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x74 "APB3PCR1,Power control register"
|
|
bitfld.long 0x74 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x74 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x74 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x74 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x74 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x78 "SCONPCR,Power control register"
|
|
bitfld.long 0x78 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x78 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x78 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x78 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x78 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x7C "DAIPCR0,Power control register"
|
|
bitfld.long 0x7C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x7C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x7C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x7C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x7C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Power Control Registers (2)"
|
|
group.long 0x160++0x0B
|
|
line.long 0x0 "DAOPCR0,Power control register"
|
|
bitfld.long 0x0 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x0 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x4 "SIOPCR,Power control register"
|
|
bitfld.long 0x4 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x4 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x4 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x8 "SAI1PCR,Power control register"
|
|
bitfld.long 0x8 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x8 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x8 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
group.long 0x174++0x0B
|
|
line.long 0x0 "SAI4PCR,Power control register"
|
|
bitfld.long 0x0 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x0 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x4 "SAO1PCR,Power control register"
|
|
bitfld.long 0x4 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x4 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x4 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x8 "SAO2PCR,Power control register"
|
|
bitfld.long 0x8 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x8 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x8 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
group.long 0x184++0x43
|
|
line.long 0x0 "DDACPCR0,Power control register"
|
|
bitfld.long 0x0 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x0 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x4 "EDGEPCR,Power control register"
|
|
bitfld.long 0x4 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x4 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x4 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x8 "DADCPCR0,Power control register"
|
|
bitfld.long 0x8 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x8 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x8 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0xC "DCDCPCR,Power control register"
|
|
bitfld.long 0xC 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0xC 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0xC 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x10 "RTCPCR1,Power control register"
|
|
bitfld.long 0x10 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x10 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x14 "MCIPCR2,Power control register"
|
|
bitfld.long 0x14 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x14 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x14 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x18 "UARTPCR1,Power control register"
|
|
bitfld.long 0x18 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x18 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x1C "DDACPCR1,Power control register"
|
|
bitfld.long 0x1C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x1C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x1C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x20 "DDACPCR2,Power control register"
|
|
bitfld.long 0x20 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x20 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x20 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x24 "DADCPCR1,Power control register"
|
|
bitfld.long 0x24 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x24 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x24 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x28 "DADCPCR2,Power control register"
|
|
bitfld.long 0x28 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x28 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x28 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x2C "DAIPCR1,Power control register"
|
|
bitfld.long 0x2C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x2C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x2C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x30 "DAIPCR2,Power control register"
|
|
bitfld.long 0x30 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x30 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x30 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x34 "DAOPCR1,Power control register"
|
|
bitfld.long 0x34 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x34 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x34 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x38 "DAOPCR2,Power control register"
|
|
bitfld.long 0x38 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x38 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x38 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x3C "DAOPCR3,Power control register"
|
|
bitfld.long 0x3C 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x3C 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x3C 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
line.long 0x40 "DAIPCR3,Power control register"
|
|
bitfld.long 0x40 0. " PCRUN ,Output clock of the spreading stage enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 1. " PCAUTO ,Automatic control of clock output" "On,Off"
|
|
bitfld.long 0x40 2. " WAKE_EN ,Enable by wakeup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 3. " EXTEN_EN ,Clock under control of a signal from the target module or submodule" "Disabled,Enabled"
|
|
bitfld.long 0x40 4. " ENOUT_EN ,Internal output 'enableout' enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Power Status Registers (1)"
|
|
rgroup.long 0x1CC++0x87
|
|
line.long 0x0 "APB0PSR0,Power status register"
|
|
bitfld.long 0x0 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x0 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x4 "APB1PSR0,Power status register"
|
|
bitfld.long 0x4 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x4 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x8 "APB2PSR,Power status register"
|
|
bitfld.long 0x8 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x8 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0xC "APB3PSR0,Power status register"
|
|
bitfld.long 0xC 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0xC 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x10 "MMIOPSR0,Power status register"
|
|
bitfld.long 0x10 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x10 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x14 "AHB0PSR,Power status register"
|
|
bitfld.long 0x14 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x14 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x18 "MCIPSR0,Power status register"
|
|
bitfld.long 0x18 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x18 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x1C "MCIPSR1,Power status register"
|
|
bitfld.long 0x1C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x1C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x20 "UARTPSR0,Power status register"
|
|
bitfld.long 0x20 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x20 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x24 "FLSHPSR0,Power status register"
|
|
bitfld.long 0x24 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x24 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x28 "FLSHPSR1,Power status register"
|
|
bitfld.long 0x28 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x28 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x2C "FLSHPSR2,Power status register"
|
|
bitfld.long 0x2C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x2C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x30 "LCDPSR0,Power status register"
|
|
bitfld.long 0x30 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x30 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x34 "LCDPSR1,Power status register"
|
|
bitfld.long 0x34 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x34 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x38 "DMAPSR0,Power status register"
|
|
bitfld.long 0x38 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x38 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x3C "DMAPSR1,Power status register"
|
|
bitfld.long 0x3C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x3C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x40 "USBPSR0,Power status register"
|
|
bitfld.long 0x40 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x40 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x44 "CPUPSR0,Power status register"
|
|
bitfld.long 0x44 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x44 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x48 "CPUPSR1,Power status register"
|
|
bitfld.long 0x48 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x48 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x4C "CPUPSR2,Power status register"
|
|
bitfld.long 0x4C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x4C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x50 "RAMPSR,Power status register"
|
|
bitfld.long 0x50 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x50 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x54 "ROMPSR,Power status register"
|
|
bitfld.long 0x54 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x54 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x58 "EMCPSR0,Power status register"
|
|
bitfld.long 0x58 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x58 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x5C "EMCPSR1,Power status register"
|
|
bitfld.long 0x5C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x5C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x60 "MMIOPSR1,Power status register"
|
|
bitfld.long 0x60 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x60 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x64 "APB0PSR1,Power status register"
|
|
bitfld.long 0x64 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x64 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x68 "EVRTPSR,Power status register"
|
|
bitfld.long 0x68 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x68 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x6C "RTCPSR0,Power status register"
|
|
bitfld.long 0x6C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x6C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x70 "ADCPSR0,Power status register"
|
|
bitfld.long 0x70 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x70 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x74 "ADCPSR1,Power status register"
|
|
bitfld.long 0x74 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x74 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x78 "WDTPSR,Power status register"
|
|
bitfld.long 0x78 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x78 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x7C "IOCPSR,Power status register"
|
|
bitfld.long 0x7C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x7C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
tree.end
|
|
tree "Power Status Registers (2)"
|
|
rgroup.long 0x254++0x23
|
|
line.long 0x0 "CGUPSR,Power status register"
|
|
bitfld.long 0x0 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x0 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x4 "SYSCPSR,Power status register"
|
|
bitfld.long 0x4 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x4 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x8 "APB1PSR1,Power status register"
|
|
bitfld.long 0x8 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x8 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0xC "T0PSR,Power status register"
|
|
bitfld.long 0xC 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0xC 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x10 "T1PSR,Power status register"
|
|
bitfld.long 0x10 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x10 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x14 "I2CPSR,Power status register"
|
|
bitfld.long 0x14 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x14 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x18 "APB3PSR1,Power status register"
|
|
bitfld.long 0x18 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x18 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x1C "SCONPSR,Power status register"
|
|
bitfld.long 0x1C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x1C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x20 "DAIPSR0,Power status register"
|
|
bitfld.long 0x20 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x20 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
rgroup.long 0x27C++0x0B
|
|
line.long 0x0 "DAOPSR0,Power status register"
|
|
bitfld.long 0x0 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x0 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x4 "SIOPSR,Power status register"
|
|
bitfld.long 0x4 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x4 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x8 "SAI1PSR,Power status register"
|
|
bitfld.long 0x8 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x8 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
rgroup.long 0x290++0x0B
|
|
line.long 0x0 "SAI4PSR,Power status register"
|
|
bitfld.long 0x0 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x0 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x4 "SAO1PSR,Power status register"
|
|
bitfld.long 0x4 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x4 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x8 "SAO2PSR,Power status register"
|
|
bitfld.long 0x8 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x8 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
rgroup.long 0x2A0++0x43
|
|
line.long 0x0 "DDACPSR0,Power status register"
|
|
bitfld.long 0x0 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x0 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x4 "EDGEPSR,Power status register"
|
|
bitfld.long 0x4 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x4 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x8 "DADCPSR0,Power status register"
|
|
bitfld.long 0x8 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x8 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0xC "DCDCPSR,Power status register"
|
|
bitfld.long 0xC 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0xC 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x10 "RTCPSR1,Power status register"
|
|
bitfld.long 0x10 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x10 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x14 "MCIPSR2,Power status register"
|
|
bitfld.long 0x14 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x14 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x18 "UARTPSR1,Power status register"
|
|
bitfld.long 0x18 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x18 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x1C "DDACPSR1,Power status register"
|
|
bitfld.long 0x1C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x1C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x20 "DDACPSR2,Power status register"
|
|
bitfld.long 0x20 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x20 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x24 "DADCPSR1,Power status register"
|
|
bitfld.long 0x24 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x24 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x28 "DADCPSR2,Power status register"
|
|
bitfld.long 0x28 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x28 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x2C "DAIPSR1,Power status register"
|
|
bitfld.long 0x2C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x2C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x30 "DAIPSR2,Power status register"
|
|
bitfld.long 0x30 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x30 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x34 "DAOPSR1,Power status register"
|
|
bitfld.long 0x34 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x34 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x38 "DAOPSR2,Power status register"
|
|
bitfld.long 0x38 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x38 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x3C "DAOPSR3,Power status register"
|
|
bitfld.long 0x3C 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x3C 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
line.long 0x40 "DAIPSR3,Power status register"
|
|
bitfld.long 0x40 0. " PSACTIVE ,Clock activated" "Not activated,Activated"
|
|
bitfld.long 0x40 1. " PSAWAKE ,Wakeup status of the clock" "No wakeup,Wakeup"
|
|
tree.end
|
|
tree "Enable Select Registers"
|
|
group.long 0x2E8++0x23
|
|
line.long 0x0 "APB0ESR0,Enable select register"
|
|
bitfld.long 0x0 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x0 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x4 "APB1ESR0,Enable select register"
|
|
bitfld.long 0x4 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x4 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x8 "APB2ESR,Enable select register"
|
|
bitfld.long 0x8 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x8 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0xC "APB3ESR0,Enable select register"
|
|
bitfld.long 0xC 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0xC 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x10 "MMIOESR0,Enable select register"
|
|
bitfld.long 0x10 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x10 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x14 "AHB0ESR,Enable select register"
|
|
bitfld.long 0x14 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x14 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x18 "MCIESR0,Enable select register"
|
|
bitfld.long 0x18 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x18 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x1C "MCIESR1,Enable select register"
|
|
bitfld.long 0x1C 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x20 "UARTESR0,Enable select register"
|
|
bitfld.long 0x20 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x20 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
group.long 0x314++0x3F
|
|
line.long 0x0 "FLSHESR0,Enable select register"
|
|
bitfld.long 0x0 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x0 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x4 "FLSHESR1,Enable select register"
|
|
bitfld.long 0x4 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x4 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x8 "FLSHESR2,Enable select register"
|
|
bitfld.long 0x8 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x8 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0xC "LCDESR0,Enable select register"
|
|
bitfld.long 0xC 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0xC 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x10 "LCDESR1,Enable select register"
|
|
bitfld.long 0x10 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x10 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x14 "DMAESR0,Enable select register"
|
|
bitfld.long 0x14 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x14 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x18 "DMAESR1,Enable select register"
|
|
bitfld.long 0x18 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x18 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x1C "USBESR0,Enable select register"
|
|
bitfld.long 0x1C 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x20 "CPUESR0,Enable select register"
|
|
bitfld.long 0x20 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x20 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x24 "CPUESR1,Enable select register"
|
|
bitfld.long 0x24 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x24 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x28 "CPUESR2,Enable select register"
|
|
bitfld.long 0x28 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x28 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x2C "RAMESR,Enable select register"
|
|
bitfld.long 0x2C 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x2C 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x30 "ROMESR,Enable select register"
|
|
bitfld.long 0x30 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x30 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x34 "EMCESR0,Enable select register"
|
|
bitfld.long 0x34 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x34 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x38 "EMCESR1,Enable select register"
|
|
bitfld.long 0x38 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x38 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x3C "MMIOESR1,Enable select register"
|
|
bitfld.long 0x3C 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x3C 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
group.long 0x354++0x23
|
|
line.long 0x0 "APB0ESR1,Enable select register"
|
|
bitfld.long 0x0 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
line.long 0x4 "EVRTESR,Enable select register"
|
|
bitfld.long 0x4 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
line.long 0x8 "RTCESR0,Enable select register"
|
|
bitfld.long 0x8 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
line.long 0xC "ADCESR0,Enable select register"
|
|
bitfld.long 0xC 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
line.long 0x10 "ADCESR1,Enable select register"
|
|
bitfld.long 0x10 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
line.long 0x14 "WDTESR,Enable select register"
|
|
bitfld.long 0x14 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
line.long 0x18 "IOCESR,Enable select register"
|
|
bitfld.long 0x18 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
line.long 0x1C "CGUESR,Enable select register"
|
|
bitfld.long 0x1C 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
line.long 0x20 "SYSCESR,Enable select register"
|
|
bitfld.long 0x20 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x20 1. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1"
|
|
group.long 0x378++0x1B
|
|
line.long 0x0 "APB1ESR1,Enable select register"
|
|
bitfld.long 0x0 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x4 "T0ESR,Enable select register"
|
|
bitfld.long 0x4 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x8 "T1ESR,Enable select register"
|
|
bitfld.long 0x8 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0xC "I2CESR,Enable select register"
|
|
bitfld.long 0xC 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x10 "APB3ESR1,Enable select register"
|
|
bitfld.long 0x10 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x14 "SCONESR,Enable select register"
|
|
bitfld.long 0x14 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x18 "DAIESR0,Enable select register"
|
|
bitfld.long 0x18 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
group.long 0x398++0x0B
|
|
line.long 0x0 "DAOESR0,Enable select register"
|
|
bitfld.long 0x0 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x4 "SIOESR,Enable select register"
|
|
bitfld.long 0x4 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x8 "SAI1ESR,Enable select register"
|
|
bitfld.long 0x8 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
group.long 0x3AC++0x0B
|
|
line.long 0x0 "SAI4ESR,Enable select register"
|
|
bitfld.long 0x0 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x4 "SAO1ESR,Enable select register"
|
|
bitfld.long 0x4 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x8 "SAO2ESR,Enable select register"
|
|
bitfld.long 0x8 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
group.long 0x3BC++0x0F
|
|
line.long 0x0 "DDACESR0,Enable select register"
|
|
bitfld.long 0x0 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x4 "EDGEESR,Enable select register"
|
|
bitfld.long 0x4 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0x8 "DADCESR0,Enable select register"
|
|
bitfld.long 0x8 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
line.long 0xC "UARTESR1,Enable select register"
|
|
bitfld.long 0xC 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
group.long 0x3CC++0x23
|
|
line.long 0x0 "DDACESR1,Enable select register"
|
|
bitfld.long 0x0 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x0 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x4 "DDACESR2,Enable select register"
|
|
bitfld.long 0x4 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x4 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x8 "DADCESR1,Enable select register"
|
|
bitfld.long 0x8 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x8 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0xC "DADCESR2,Enable select register"
|
|
bitfld.long 0xC 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0xC 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x10 "DAIESR1,Enable select register"
|
|
bitfld.long 0x10 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x10 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x14 "DAIESR2,Enable select register"
|
|
bitfld.long 0x14 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x14 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x18 "DAOESR1,Enable select register"
|
|
bitfld.long 0x18 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x18 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x1C "DAOESR2,Enable select register"
|
|
bitfld.long 0x1C 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
line.long 0x20 "DAOESR3,Enable select register"
|
|
bitfld.long 0x20 0. " ESR_EN ,Enable select register" "Disabled,Enabled"
|
|
bitfld.long 0x20 1.--3. " ESR_SEL ,Fractional divider select" "Divider 0,Divider 1,Divider 2,Divider 3,Divider 4,Divider 5,?..."
|
|
tree.end
|
|
tree "Software Reset Registers"
|
|
group.long 0xC18++0x3B
|
|
line.long 0x0 "APB0RES,Software reset register"
|
|
bitfld.long 0x0 0. " APB0RES ,APB0 including CGU;System Config;Event Router;RTC;ADC;WDT;IOCONF reset" "Reset,No reset"
|
|
line.long 0x4 "APB0RES2,Software reset register"
|
|
bitfld.long 0x4 0. " APB0RES2 ,APB0 bridge reset" "Reset,No reset"
|
|
line.long 0x8 "APB1RES,Software reset register"
|
|
bitfld.long 0x8 0. " APB1RES ,APB1 reset" "Reset,No reset"
|
|
line.long 0xC "APB1RES2,Software reset register"
|
|
bitfld.long 0xC 0. " APB1RES2 ,APB1 bridge reset" "Reset,No reset"
|
|
line.long 0x10 "APB2RES,Software reset register"
|
|
bitfld.long 0x10 0. " APB2RES ,APB2 reset" "Reset,No reset"
|
|
line.long 0x14 "APB3RES,Software reset register"
|
|
bitfld.long 0x14 0. " APB3RES ,APB3 reset" "Reset,No reset"
|
|
line.long 0x18 "APB3RES2,Software reset register"
|
|
bitfld.long 0x18 0. " APB3RES2 ,APB3 bridge reset" "Reset,No reset"
|
|
line.long 0x1C "MMIORES,Software reset register"
|
|
bitfld.long 0x1C 0. " MMIORES ,Interrupt Controller reset" "Reset,No reset"
|
|
line.long 0x20 "AHB0RES,Software reset register"
|
|
bitfld.long 0x20 0. " AHB0RES ,Processor;RAM;ROM;other AHB reset" "Reset,No reset"
|
|
line.long 0x24 "T0RES,Software reset register"
|
|
bitfld.long 0x24 0. " T0RES ,Timer 0 reset" "Reset,No reset"
|
|
line.long 0x28 "T1RES,Software reset register"
|
|
bitfld.long 0x28 0. " T1RES ,Timer 1 reset" "Reset,No reset"
|
|
line.long 0x2C "MCIRES,Software reset register"
|
|
bitfld.long 0x2C 0. " MCIRES ,MCI/FD interface reset" "Reset,No reset"
|
|
line.long 0x30 "MCIRES2,Software reset register"
|
|
bitfld.long 0x30 0. " MCIRES2 ,MCI/FD interface reset" "Reset,No reset"
|
|
line.long 0x34 "UARTRES,Software reset register"
|
|
bitfld.long 0x34 0. " UARTRES ,UART reset" "Reset,No reset"
|
|
line.long 0x38 "I2CRES,Software reset register"
|
|
bitfld.long 0x38 0. " I2CRES ,I2C interface reset" "Reset,No reset"
|
|
group.long 0xC58++0x03
|
|
line.long 0x00 "SCONRES,Software reset register"
|
|
bitfld.long 0x00 0. " SCONRES ,Streaming Configuration block reset" " Reset, No reset"
|
|
group.long 0xC60++0x03
|
|
line.long 0x00 "DAIRES,Software reset register"
|
|
bitfld.long 0x00 0. " DAIRES ,DAI reset" " Reset, No reset"
|
|
group.long 0xC68++0x13
|
|
line.long 0x0 "DAORES,Software reset register"
|
|
bitfld.long 0x0 0. " DAORES ,DAO reset" "Reset,No reset"
|
|
line.long 0x4 "DADCRES,Software reset register"
|
|
bitfld.long 0x4 0. " DADCRES ,Dual ADC reset" "Reset,No reset"
|
|
line.long 0x8 "EDGERES,Software reset register"
|
|
bitfld.long 0x8 0. " EDGERES ,DAO Edge Detector reset" "Reset,No reset"
|
|
line.long 0xC "DDACRES,Software reset register"
|
|
bitfld.long 0xC 0. " DDACRES ,Dual DAC reset" "Reset,No reset"
|
|
line.long 0x10 "SAI1RES,Software reset register"
|
|
bitfld.long 0x10 0. " SAI1RES ,SAI1 reset" "Reset,No reset"
|
|
group.long 0xC84++0x0B
|
|
line.long 0x0 "SAI4RES,Software reset register"
|
|
bitfld.long 0x0 0. " SAI4RES ,SAI4 reset" "Reset,No reset"
|
|
line.long 0x4 "SAO1RES,Software reset register"
|
|
bitfld.long 0x4 0. " SAO1RES ,SAO1 reset" "Reset,No reset"
|
|
line.long 0x8 "SAO2RES,Software reset register"
|
|
bitfld.long 0x8 0. " SAO2RES ,SAO2 reset" "Reset,No reset"
|
|
group.long 0xC94++0x017
|
|
line.long 0x0 "FLSHRES,Software reset register"
|
|
bitfld.long 0x0 0. " FLSHRES ,Internal Flash memory reset" "Reset,No reset"
|
|
line.long 0x4 "LCDRES,Software reset register"
|
|
bitfld.long 0x4 0. " LCDRES ,LCD interface reset" "Reset,No reset"
|
|
line.long 0x8 "DMARES,Software reset register"
|
|
bitfld.long 0x8 0. " DMARES ,GP DMA channels reset" "Reset,No reset"
|
|
line.long 0xC "USBRES,Software reset register"
|
|
bitfld.long 0xC 0. " USBRES ,USB interface reset" "Reset,No reset"
|
|
line.long 0x10 "EMCRES,Software reset register"
|
|
bitfld.long 0x10 0. " EMCRES ,External memory controller reset" "Reset,No reset"
|
|
line.long 0x14 "MMIORES2,Software reset register"
|
|
bitfld.long 0x14 0. " MMIORES2 ,Interrupt controller reset" "Reset,No reset"
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; IC
|
|
; --------------------------------------------------------------------------------
|
|
tree "Interrupt Controller"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80300000
|
|
width 15.
|
|
group.long 0x404++0x77
|
|
line.long 0x0 "INT_REQ1,Interrupt Request Register 1"
|
|
bitfld.long 0x0 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x0 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x0 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x0 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x0 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x4 "INT_REQ2,Interrupt Request Register 2"
|
|
bitfld.long 0x4 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x4 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x4 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x4 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x4 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x8 "INT_REQ3,Interrupt Request Register 3"
|
|
bitfld.long 0x8 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x8 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x8 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x8 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x8 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x8 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0xC "INT_REQ4,Interrupt Request Register 4"
|
|
bitfld.long 0xC 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0xC 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0xC 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0xC 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0xC 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0xC 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x10 "INT_REQ5,Interrupt Request Register 5"
|
|
bitfld.long 0x10 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x10 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x10 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x10 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x10 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x14 "INT_REQ6,Interrupt Request Register 6"
|
|
bitfld.long 0x14 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x14 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x14 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x14 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x14 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x18 "INT_REQ7,Interrupt Request Register 7"
|
|
bitfld.long 0x18 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x18 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x18 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x18 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x18 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x18 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x1C "INT_REQ8,Interrupt Request Register 8"
|
|
bitfld.long 0x1C 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x1C 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x1C 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x20 "INT_REQ9,Interrupt Request Register 9"
|
|
bitfld.long 0x20 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x20 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x20 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x20 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x20 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x20 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x24 "INT_REQ10,Interrupt Request Register 10"
|
|
bitfld.long 0x24 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x24 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x24 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x24 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x24 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x24 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x28 "INT_REQ11,Interrupt Request Register 11"
|
|
bitfld.long 0x28 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x28 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x28 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x28 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x28 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x28 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x2C "INT_REQ12,Interrupt Request Register 12"
|
|
bitfld.long 0x2C 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x2C 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x2C 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x2C 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x2C 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x30 "INT_REQ13,Interrupt Request Register 13"
|
|
bitfld.long 0x30 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x30 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x30 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x30 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x30 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x30 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x34 "INT_REQ14,Interrupt Request Register 14"
|
|
bitfld.long 0x34 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x34 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x34 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x34 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x34 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x34 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x38 "INT_REQ15,Interrupt Request Register 15"
|
|
bitfld.long 0x38 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x38 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x38 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x38 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x38 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x38 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x3C "INT_REQ16,Interrupt Request Register 16"
|
|
bitfld.long 0x3C 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x3C 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x3C 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x3C 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x40 "INT_REQ17,Interrupt Request Register 17"
|
|
bitfld.long 0x40 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x40 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x40 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x40 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x40 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x40 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x44 "INT_REQ18,Interrupt Request Register 18"
|
|
bitfld.long 0x44 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x44 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x44 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x44 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x44 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x44 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x48 "INT_REQ19,Interrupt Request Register 19"
|
|
bitfld.long 0x48 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x48 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x48 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x48 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x48 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x48 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x4C "INT_REQ20,Interrupt Request Register 20"
|
|
bitfld.long 0x4C 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x4C 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x4C 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x4C 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x4C 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x4C 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4C 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x4C 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4C 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x4C 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4C 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x50 "INT_REQ21,Interrupt Request Register 21"
|
|
bitfld.long 0x50 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x50 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x50 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x50 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x50 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x50 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x50 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x50 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x50 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x50 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x50 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x54 "INT_REQ22,Interrupt Request Register 22"
|
|
bitfld.long 0x54 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x54 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x54 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x54 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x54 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x54 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x54 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x54 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x54 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x54 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x54 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x58 "INT_REQ23,Interrupt Request Register 23"
|
|
bitfld.long 0x58 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x58 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x58 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x58 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x58 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x58 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x58 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x58 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x5C "INT_REQ24,Interrupt Request Register 24"
|
|
bitfld.long 0x5C 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x5C 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x5C 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x5C 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x5C 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x5C 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x5C 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x5C 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x5C 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x5C 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x5C 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x60 "INT_REQ25,Interrupt Request Register 25"
|
|
bitfld.long 0x60 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x60 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x60 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x60 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x60 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x60 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x60 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x60 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x60 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x60 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x60 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x64 "INT_REQ26,Interrupt Request Register 26"
|
|
bitfld.long 0x64 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x64 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x64 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x64 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x64 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x64 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x64 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x64 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x64 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x64 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x64 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x68 "INT_REQ27,Interrupt Request Register 27"
|
|
bitfld.long 0x68 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x68 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x68 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x68 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x68 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x68 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x68 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x68 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x68 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x68 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x68 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x6C "INT_REQ28,Interrupt Request Register 28"
|
|
bitfld.long 0x6C 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x6C 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x6C 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x6C 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x6C 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x6C 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x6C 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x6C 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x6C 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x6C 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x6C 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
line.long 0x70 "INT_REQ29,Interrupt Request Register 29"
|
|
bitfld.long 0x70 0.--3. " PRIO ,Source priority level" "Disabled,Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8,Level 9,Level 10,Level 11,Level 12,Level 13,Level 14,Level 15"
|
|
bitfld.long 0x70 8. " TARGET ,Interrupt source assign to:" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x70 16. " INTEN ,Interrupt source enable" "Disabled,Enabled"
|
|
bitfld.long 0x70 17. " ACTVLO ,Interrupt sources active high/low" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x70 25. " WE_ACTVLO ,ACTVLO enable" "Disabled,Enabled"
|
|
bitfld.long 0x70 26. " WE_ENABLE ,INTEN enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x70 27. " WE_TARGET ,TARGET enable" "Disabled,Enabled"
|
|
bitfld.long 0x70 28. " WE_PRIO ,PRIO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x70 29. " CLR_SWINT ,Clear of software interrupt request" "Not cleared,Cleared"
|
|
bitfld.long 0x70 30. " SET_SWINT ,Request a software interrupt for source" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x70 31. " PENDING ,Interrupt request signal from asserted source" "No interrupt,Interrupt"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INT_PENDING,Interrupt Pending Register"
|
|
bitfld.long 0x00 1. " PENDING1 ,Interrupt request 1" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " PENDING2 ,Interrupt request 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDING3 ,Interrupt request 3" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " PENDING4 ,Interrupt request 4" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PENDING5 ,Interrupt request 5" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " PENDING6 ,Interrupt request 6" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PENDING7 ,Interrupt request 7" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " PENDING8 ,Interrupt request 8" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PENDING9 ,Interrupt request 9" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " PENDING10 ,Interrupt request 10" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PENDING11 ,Interrupt request 11" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " PENDING12 ,Interrupt request 12" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PENDING13 ,Interrupt request 13" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " PENDING14 ,Interrupt request 14" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PENDING15 ,Interrupt request 15" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " PENDING16 ,Interrupt request 16" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PENDING17 ,Interrupt request 17" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PENDING18 ,Interrupt request 18" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PENDING19 ,Interrupt request 19" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PENDING20 ,Interrupt request 20" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PENDING21 ,Interrupt request 21" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " PENDING22 ,Interrupt request 22" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PENDING23 ,Interrupt request 23" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PENDING24 ,Interrupt request 24" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PENDING25 ,Interrupt request 25" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PENDING26 ,Interrupt request 26" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PENDING27 ,Interrupt request 27" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " PENDING28 ,Interrupt request 28" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " PENDING29 ,Interrupt request 29" "Not pending,Pending"
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "INT_VECTOR0,Vector Register 0"
|
|
hexmask.long.byte 0x00 3.--7. 1. " INDEX ,Number of the source that caused the interrupt"
|
|
hexmask.long 0x00 11.--31. 0x800 " TABLE_ADDR ,Base address of a table in memory"
|
|
line.long 0x04 "INT_VECTOR1,Vector Register 1"
|
|
hexmask.long.byte 0x04 3.--7. 1. " INDEX ,Number of the source that caused the interrupt"
|
|
hexmask.long 0x04 11.--31. 0x800 " TABLE_ADDR ,Base address of a table in memory"
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "INT_FEATURES,Features Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Sourc ,Number of source inputs"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PrLvl ,The highest Priority Level"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--21. 1. " Trgts ,Two target outputs (IRQ and FIQ) indicate"
|
|
group.long 0x000++0x07
|
|
line.long 0x00 "INT_PRIOMASK0,Priority Mask Register 0"
|
|
hexmask.long.byte 0x00 0.--3. 1. " PrLim ,IRQ ISR priority limit"
|
|
line.long 0x04 "INT_PRIOMASK1,Priority Mask Register 1"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PrLim ,FIQ ISR priority limit"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; ER
|
|
; --------------------------------------------------------------------------------
|
|
tree "Event Router"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80000000
|
|
width 10.
|
|
tree "Input Group 0 Registers"
|
|
tree "Input Signals Registers 0"
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "EVAPR0,Activation Polarity Register 0"
|
|
bitfld.long 0x00 31. " A13/P0.29 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 30. " A12/P0.28 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A11/P0.27 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 28. " A10/P0.26 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 27. " A9/P0.25 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 26. " A8/P0.24 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " A7/P0.23 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " A6/P0.22 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 23. " A5/P0.21 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " A4/P0.20 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 21. " A3/P0.19 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 20. " A2/P0.18 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " A1/P0.17 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18. " A0/P0.16 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 17. " D15/P0.15 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 16. " D14/P0.14 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " D13/P0.13 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 14. " D12/P0.12 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " D11/P0.11 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 12. " D10/P0.10 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " D9/P0.9 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 10. " D8/P0.8 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 9. " D7/P0.7 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 8. " D6/P0.6 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " D5/P0.5 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6. " D4/P0.4 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 5. " D3/P0.3 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 4. " D2/P0.2 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D1/P0.1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 2. " D0/P0.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATARDY ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
group.long 0xCE0++0x003
|
|
line.long 0x00 "EVATR0,Activation Type Register 0"
|
|
setclrfld.long 0x00 31. -0x0A0 31. -0x0C0 31. " A13/P0.29_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 30. -0x0A0 30. -0x0C0 30. " A12/P0.28_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x0A0 29. -0x0C0 29. " A11/P0.27_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 28. -0x0A0 28. -0x0C0 28. " A10/P0.26_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x0A0 27. -0x0C0 27. " A9/P0.25_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 26. -0x0A0 26. -0x0C0 26. " A8/P0.24_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x0A0 25. -0x0C0 25. " A7/P0.23_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 24. -0x0A0 24. -0x0C0 24. " A6/P0.22_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x0A0 23. -0x0C0 23. " A5/P0.21_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 22. -0x0A0 22. -0x0C0 22. " A4/P0.20_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x0A0 21. -0x0C0 21. " A3/P0.19_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 20. -0x0A0 20. -0x0C0 20. " A2/P0.18_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x0A0 19. -0x0C0 19. " A1/P0.17_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 18. -0x0A0 18. -0x0C0 18. " A0/P0.16_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x0A0 17. -0x0C0 17. " D15/P0.15_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 16. -0x0A0 16. -0x0C0 16. " D14/P0.14_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x0A0 15. -0x0C0 15. " D13/P0.13_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 14. -0x0A0 14. -0x0C0 14. " D12/P0.12_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x0A0 13. -0x0C0 13. " D11/P0.11_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 12. -0x0A0 12. -0x0C0 12. " D10/P0.10_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x0A0 11. -0x0C0 11. " D9/P0.9_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 10. -0x0A0 10. -0x0C0 10. " D8/P0.8_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x0A0 9. -0x0C0 9. " D7/P0.7_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 8. -0x0A0 8. -0x0C0 8. " D6/P0.6_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x0A0 7. -0x0C0 7. " D5/P0.5_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 6. -0x0A0 6. -0x0C0 6. " D4/P0.4_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x0A0 5. -0x0C0 5. " D3/P0.3_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 4. -0x0A0 4. -0x0C0 4. " D2/P0.2_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x0A0 3. -0x0C0 3. " D1/P0.1_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 2. -0x0A0 2. -0x0C0 2. " D0/P0.0_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x0A0 1. -0x0C0 1. " ATARDY_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 0. -0x0A0 0. -0x0C0 0. " START_set/clr ,Signal activation type" "Level,Edge"
|
|
rgroup.long 0xD20++0x003
|
|
line.long 0x00 "EVRSR0,Raw Status Register 0"
|
|
bitfld.long 0x00 31. " A13/P0.29 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 30. " A12/P0.28 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A11/P0.27 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 28. " A10/P0.26 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " A9/P0.25 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 26. " A8/P0.24 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " A7/P0.23 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 24. " A6/P0.22 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " A5/P0.21 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 22. " A4/P0.20 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " A3/P0.19 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 20. " A2/P0.18 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " A1/P0.17 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 18. " A0/P0.16 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " D15/P0.15 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 16. " D14/P0.14 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " D13/P0.13 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 14. " D12/P0.12 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " D11/P0.11 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 12. " D10/P0.10 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " D9/P0.9 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 10. " D8/P0.8 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " D7/P0.7 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 8. " D6/P0.6 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " D5/P0.5 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 6. " D4/P0.4 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " D3/P0.3 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 4. " D2/P0.2 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D1/P0.1 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 2. " D0/P0.0 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATARDY ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 0. " START ,Signal raw status" "Not active,Active"
|
|
group.long 0xC60++0x003
|
|
line.long 0x00 "EVMASK0,Global Mask Register 0"
|
|
setclrfld.long 0x00 31. 0x40 31. 0x20 31. " A13/P0.29_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x40 30. 0x20 30. " A12/P0.28_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x40 29. 0x20 29. " A11/P0.27_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x40 28. 0x20 28. " A10/P0.26_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x40 27. 0x20 27. " A9/P0.25_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x40 26. 0x20 26. " A8/P0.24_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x40 25. 0x20 25. " A7/P0.23_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x40 24. 0x20 24. " A6/P0.22_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x40 23. 0x20 23. " A5/P0.21_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x40 22. 0x20 22. " A4/P0.20_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x40 21. 0x20 21. " A3/P0.19_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x40 20. 0x20 20. " A2/P0.18_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x40 19. 0x20 19. " A1/P0.17_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x40 18. 0x20 18. " A0/P0.16_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x40 17. 0x20 17. " D15/P0.15_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x40 16. 0x20 16. " D14/P0.14_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x40 15. 0x20 15. " D13/P0.13_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x40 14. 0x20 14. " D12/P0.12_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x40 13. 0x20 13. " D11/P0.11_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x40 12. 0x20 12. " D10/P0.10_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x40 11. 0x20 11. " D9/P0.9_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x40 10. 0x20 10. " D8/P0.8_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x40 9. 0x20 9. " D7/P0.7_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x40 8. 0x20 8. " D6/P0.6_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x40 7. 0x20 7. " D5/P0.5_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x40 6. 0x20 6. " D4/P0.4_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x40 5. 0x20 5. " D3/P0.3_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x40 4. 0x20 4. " D2/P0.2_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x40 3. 0x20 3. " D1/P0.1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x40 2. 0x20 2. " D0/P0.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x40 1. 0x20 1. " ATARDY_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x40 0. 0x20 0. " START_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
rgroup.long 0xC00++0x03
|
|
line.long 0x00 "EVPEND0,Pending Register 0"
|
|
bitfld.long 0x00 31. " A13/P0.29 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 30. " A12/P0.28 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A11/P0.27 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 28. " A10/P0.26 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " A9/P0.25 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 26. " A8/P0.24 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " A7/P0.23 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 24. " A6/P0.22 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " A5/P0.21 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 22. " A4/P0.20 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " A3/P0.19 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 20. " A2/P0.18 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " A1/P0.17 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 18. " A0/P0.16 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " D15/P0.15 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 16. " D14/P0.14 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " D13/P0.13 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 14. " D12/P0.12 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " D11/P0.11 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 12. " D10/P0.10 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " D9/P0.9 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 10. " D8/P0.8 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " D7/P0.7 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 8. " D6/P0.6 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " D5/P0.5 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 6. " D4/P0.4 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " D3/P0.3 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 4. " D2/P0.2 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D1/P0.1 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 2. " D0/P0.0 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATARDY ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 0. " START ,Signal pending" "Not active,Active"
|
|
tree.end
|
|
base 0x80001000
|
|
tree "Interrupt Output Pending Registers 0"
|
|
rgroup.long 0x0++0x03
|
|
line.long 0x00 "EVIOP00,Interrupt Output Pending Register 0 0"
|
|
bitfld.long 0x00 31. " A13/P0.29 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " A12/P0.28 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A11/P0.27 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " A10/P0.26 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " A9/P0.25 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " A8/P0.24 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " A7/P0.23 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " A6/P0.22 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " A5/P0.21 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " A4/P0.20 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " A3/P0.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " A2/P0.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " A1/P0.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " A0/P0.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " D15/P0.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " D14/P0.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " D13/P0.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " D12/P0.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " D11/P0.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " D10/P0.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " D9/P0.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " D8/P0.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " D7/P0.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " D6/P0.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " D5/P0.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " D4/P0.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " D3/P0.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " D2/P0.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D1/P0.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " D0/P0.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATARDY ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " START ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "EVIOP10,Interrupt Output Pending Register 1 0"
|
|
bitfld.long 0x00 31. " A13/P0.29 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " A12/P0.28 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A11/P0.27 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " A10/P0.26 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " A9/P0.25 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " A8/P0.24 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " A7/P0.23 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " A6/P0.22 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " A5/P0.21 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " A4/P0.20 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " A3/P0.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " A2/P0.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " A1/P0.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " A0/P0.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " D15/P0.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " D14/P0.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " D13/P0.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " D12/P0.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " D11/P0.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " D10/P0.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " D9/P0.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " D8/P0.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " D7/P0.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " D6/P0.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " D5/P0.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " D4/P0.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " D3/P0.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " D2/P0.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D1/P0.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " D0/P0.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATARDY ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " START ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "EVIOP20,Interrupt Output Pending Register 2 0"
|
|
bitfld.long 0x00 31. " A13/P0.29 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " A12/P0.28 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A11/P0.27 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " A10/P0.26 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " A9/P0.25 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " A8/P0.24 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " A7/P0.23 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " A6/P0.22 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " A5/P0.21 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " A4/P0.20 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " A3/P0.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " A2/P0.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " A1/P0.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " A0/P0.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " D15/P0.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " D14/P0.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " D13/P0.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " D12/P0.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " D11/P0.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " D10/P0.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " D9/P0.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " D8/P0.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " D7/P0.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " D6/P0.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " D5/P0.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " D4/P0.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " D3/P0.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " D2/P0.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D1/P0.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " D0/P0.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATARDY ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " START ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "EVIOP30,Interrupt Output Pending Register 3 0"
|
|
bitfld.long 0x00 31. " A13/P0.29 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " A12/P0.28 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A11/P0.27 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " A10/P0.26 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " A9/P0.25 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " A8/P0.24 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " A7/P0.23 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " A6/P0.22 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " A5/P0.21 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " A4/P0.20 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " A3/P0.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " A2/P0.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " A1/P0.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " A0/P0.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " D15/P0.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " D14/P0.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " D13/P0.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " D12/P0.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " D11/P0.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " D10/P0.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " D9/P0.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " D8/P0.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " D7/P0.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " D6/P0.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " D5/P0.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " D4/P0.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " D3/P0.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " D2/P0.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D1/P0.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " D0/P0.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATARDY ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " START ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "EVIOP40,Interrupt Output Pending Register 4 0"
|
|
bitfld.long 0x00 31. " A13/P0.29 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " A12/P0.28 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A11/P0.27 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " A10/P0.26 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " A9/P0.25 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " A8/P0.24 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " A7/P0.23 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " A6/P0.22 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " A5/P0.21 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " A4/P0.20 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " A3/P0.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " A2/P0.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " A1/P0.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " A0/P0.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " D15/P0.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " D14/P0.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " D13/P0.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " D12/P0.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " D11/P0.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " D10/P0.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " D9/P0.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " D8/P0.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " D7/P0.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " D6/P0.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " D5/P0.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " D4/P0.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " D3/P0.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " D2/P0.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D1/P0.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " D0/P0.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATARDY ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " START ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
tree.end
|
|
tree "Interrupt Output Mask Register 0"
|
|
group.long 0x400++0x03
|
|
line.long 0x000 "EVIOMK00,Interrupt Output Mask Register 0 0"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " A13/P0.29_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " A12/P0.28_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " A11/P0.27_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " A10/P0.26_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " A9/P0.25_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " A8/P0.24_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " A7/P0.23_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " A6/P0.22_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " A5/P0.21_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " A4/P0.20_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " A3/P0.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " A2/P0.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " A1/P0.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " A0/P0.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " D15/P0.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " D14/P0.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " D13/P0.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " D12/P0.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " D11/P0.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " D10/P0.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " D9/P0.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " D8/P0.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " D7/P0.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " D6/P0.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " D5/P0.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " D4/P0.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " D3/P0.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " D2/P0.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " D1/P0.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " D0/P0.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " ATARDY_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " START_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x420++0x03
|
|
line.long 0x000 "EVIOMK10,Interrupt Output Mask Register 1 0"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " A13/P0.29_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " A12/P0.28_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " A11/P0.27_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " A10/P0.26_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " A9/P0.25_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " A8/P0.24_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " A7/P0.23_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " A6/P0.22_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " A5/P0.21_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " A4/P0.20_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " A3/P0.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " A2/P0.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " A1/P0.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " A0/P0.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " D15/P0.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " D14/P0.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " D13/P0.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " D12/P0.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " D11/P0.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " D10/P0.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " D9/P0.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " D8/P0.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " D7/P0.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " D6/P0.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " D5/P0.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " D4/P0.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " D3/P0.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " D2/P0.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " D1/P0.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " D0/P0.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " ATARDY_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " START_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x440++0x03
|
|
line.long 0x000 "EVIOMK20,Interrupt Output Mask Register 2 0"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " A13/P0.29_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " A12/P0.28_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " A11/P0.27_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " A10/P0.26_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " A9/P0.25_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " A8/P0.24_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " A7/P0.23_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " A6/P0.22_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " A5/P0.21_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " A4/P0.20_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " A3/P0.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " A2/P0.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " A1/P0.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " A0/P0.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " D15/P0.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " D14/P0.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " D13/P0.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " D12/P0.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " D11/P0.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " D10/P0.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " D9/P0.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " D8/P0.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " D7/P0.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " D6/P0.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " D5/P0.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " D4/P0.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " D3/P0.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " D2/P0.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " D1/P0.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " D0/P0.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " ATARDY_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " START_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x460++0x03
|
|
line.long 0x000 "EVIOMK30,Interrupt Output Mask Register 3 0"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " A13/P0.29_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " A12/P0.28_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " A11/P0.27_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " A10/P0.26_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " A9/P0.25_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " A8/P0.24_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " A7/P0.23_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " A6/P0.22_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " A5/P0.21_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " A4/P0.20_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " A3/P0.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " A2/P0.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " A1/P0.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " A0/P0.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " D15/P0.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " D14/P0.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " D13/P0.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " D12/P0.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " D11/P0.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " D10/P0.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " D9/P0.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " D8/P0.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " D7/P0.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " D6/P0.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " D5/P0.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " D4/P0.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " D3/P0.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " D2/P0.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " D1/P0.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " D0/P0.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " ATARDY_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " START_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x480++0x03
|
|
line.long 0x000 "EVIOMK40,Interrupt Output Mask Register 4 0"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " A13/P0.29_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " A12/P0.28_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " A11/P0.27_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " A10/P0.26_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " A9/P0.25_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " A8/P0.24_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " A7/P0.23_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " A6/P0.22_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " A5/P0.21_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " A4/P0.20_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " A3/P0.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " A2/P0.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " A1/P0.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " A0/P0.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " D15/P0.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " D14/P0.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " D13/P0.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " D12/P0.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " D11/P0.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " D10/P0.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " D9/P0.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " D8/P0.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " D7/P0.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " D6/P0.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " D5/P0.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " D4/P0.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " D3/P0.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " D2/P0.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " D1/P0.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " D0/P0.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " ATARDY_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " START_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
width 0x0B
|
|
base 0x80000000
|
|
width 10.
|
|
tree "Input Group 1 Registers"
|
|
tree "Input Signals Registers 1"
|
|
group.long 0xCC4++0x03
|
|
line.long 0x00 "EVAPR1,Activation Polarity Register 1"
|
|
bitfld.long 0x00 31. " LER/P4.3 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 30. " LRW/P4.2 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LRS/P4.1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 28. " LCS/P4.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATO/P3.6 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 26. " BCKO/P3.5 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WSO ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " WSI/P3.2 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BCKI/P3.1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DATI/P3.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RPO/P1.19 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 20. " OE/P1.18 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RAS/P1.17 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAS/P1.16 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WE/P1.15 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MCLKO/P1.14 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BLS1/P1.13 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BLS0/P1.12 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DQM1/P1.11 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DQM0/P1.10 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CKE/P1.9 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DYCS/P1.8 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STCS2/P1.7 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 8. " STCS1/P1.6 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STCS0/P1.5 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6. " A20/P1.4 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 5. " A19/P1.3 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 4. " A18/P1.2 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 3. " A17/P1.1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 2. " A16/P1.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " A15/P0.31 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 0. " A14/P0.30 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
group.long 0xCE4++0x003
|
|
line.long 0x00 "EVATR1,Activation Type Register 1"
|
|
setclrfld.long 0x00 31. -0x0A0 31. -0x0C0 31. " LER/P4.3_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 30. -0x0A0 30. -0x0C0 30. " LRW/P4.2_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x0A0 29. -0x0C0 29. " LRS/P4.1_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 28. -0x0A0 28. -0x0C0 28. " LCS/P4.0_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x0A0 27. -0x0C0 27. " DATO/P3.6_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 26. -0x0A0 26. -0x0C0 26. " BCKO/P3.5_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x0A0 25. -0x0C0 25. " WSO_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 24. -0x0A0 24. -0x0C0 24. " WSI/P3.2_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x0A0 23. -0x0C0 23. " BCKI/P3.1_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 22. -0x0A0 22. -0x0C0 22. " DATI/P3.0_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x0A0 21. -0x0C0 21. " RPO/P1.19_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 20. -0x0A0 20. -0x0C0 20. " OE/P1.18_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x0A0 19. -0x0C0 19. " RAS/P1.17_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 18. -0x0A0 18. -0x0C0 18. " CAS/P1.16_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x0A0 17. -0x0C0 17. " WE/P1.15_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 16. -0x0A0 16. -0x0C0 16. " MCLKO/P1.14_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x0A0 15. -0x0C0 15. " BLS1/P1.13_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 14. -0x0A0 14. -0x0C0 14. " BLS0/P1.12_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x0A0 13. -0x0C0 13. " DQM1/P1.11_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 12. -0x0A0 12. -0x0C0 12. " DQM0/P1.10_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x0A0 11. -0x0C0 11. " CKE/P1.9_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 10. -0x0A0 10. -0x0C0 10. " DYCS/P1.8_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x0A0 9. -0x0C0 9. " STCS2/P1.7_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 8. -0x0A0 8. -0x0C0 8. " STCS1/P1.6_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x0A0 7. -0x0C0 7. " STCS0/P1.5_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 6. -0x0A0 6. -0x0C0 6. " A20/P1.4_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x0A0 5. -0x0C0 5. " A19/P1.3_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 4. -0x0A0 4. -0x0C0 4. " A18/P1.2_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x0A0 3. -0x0C0 3. " A17/P1.1_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 2. -0x0A0 2. -0x0C0 2. " A16/P1.0_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x0A0 1. -0x0C0 1. " A15/P0.31_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 0. -0x0A0 0. -0x0C0 0. " A14/P0.30_set/clr ,Signal activation type" "Level,Edge"
|
|
rgroup.long 0xD24++0x003
|
|
line.long 0x00 "EVRSR1,Raw Status Register 1"
|
|
bitfld.long 0x00 31. " LER/P4.3 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 30. " LRW/P4.2 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LRS/P4.1 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 28. " LCS/P4.0 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATO/P3.6 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 26. " BCKO/P3.5 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WSO ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 24. " WSI/P3.2 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BCKI/P3.1 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 22. " DATI/P3.0 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RPO/P1.19 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 20. " OE/P1.18 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RAS/P1.17 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 18. " CAS/P1.16 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WE/P1.15 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 16. " MCLKO/P1.14 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BLS1/P1.13 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 14. " BLS0/P1.12 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DQM1/P1.11 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 12. " DQM0/P1.10 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CKE/P1.9 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 10. " DYCS/P1.8 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STCS2/P1.7 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 8. " STCS1/P1.6 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STCS0/P1.5 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 6. " A20/P1.4 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " A19/P1.3 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 4. " A18/P1.2 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " A17/P1.1 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 2. " A16/P1.0 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " A15/P0.31 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 0. " A14/P0.30 ,Signal raw status" "Not active,Active"
|
|
group.long 0xC64++0x003
|
|
line.long 0x00 "EVMASK1,Global Mask Register 1"
|
|
setclrfld.long 0x00 31. 0x40 31. 0x20 31. " LER/P4.3_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x40 30. 0x20 30. " LRW/P4.2_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x40 29. 0x20 29. " LRS/P4.1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x40 28. 0x20 28. " LCS/P4.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x40 27. 0x20 27. " DATO/P3.6_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x40 26. 0x20 26. " BCKO/P3.5_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x40 25. 0x20 25. " WSO_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x40 24. 0x20 24. " WSI/P3.2_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x40 23. 0x20 23. " BCKI/P3.1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x40 22. 0x20 22. " DATI/P3.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x40 21. 0x20 21. " RPO/P1.19_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x40 20. 0x20 20. " OE/P1.18_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x40 19. 0x20 19. " RAS/P1.17_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x40 18. 0x20 18. " CAS/P1.16_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x40 17. 0x20 17. " WE/P1.15_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x40 16. 0x20 16. " MCLKO/P1.14_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x40 15. 0x20 15. " BLS1/P1.13_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x40 14. 0x20 14. " BLS0/P1.12_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x40 13. 0x20 13. " DQM1/P1.11_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x40 12. 0x20 12. " DQM0/P1.10_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x40 11. 0x20 11. " CKE/P1.9_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x40 10. 0x20 10. " DYCS/P1.8_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x40 9. 0x20 9. " STCS2/P1.7_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x40 8. 0x20 8. " STCS1/P1.6_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x40 7. 0x20 7. " STCS0/P1.5_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x40 6. 0x20 6. " A20/P1.4_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x40 5. 0x20 5. " A19/P1.3_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x40 4. 0x20 4. " A18/P1.2_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x40 3. 0x20 3. " A17/P1.1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x40 2. 0x20 2. " A16/P1.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x40 1. 0x20 1. " A15/P0.31_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x40 0. 0x20 0. " A14/P0.30_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
rgroup.long 0xC04++0x03
|
|
line.long 0x00 "EVPEND1,Pending Register 1"
|
|
bitfld.long 0x00 31. " LER/P4.3 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 30. " LRW/P4.2 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LRS/P4.1 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 28. " LCS/P4.0 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATO/P3.6 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 26. " BCKO/P3.5 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WSO ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 24. " WSI/P3.2 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BCKI/P3.1 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 22. " DATI/P3.0 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RPO/P1.19 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 20. " OE/P1.18 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RAS/P1.17 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 18. " CAS/P1.16 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WE/P1.15 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 16. " MCLKO/P1.14 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BLS1/P1.13 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 14. " BLS0/P1.12 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DQM1/P1.11 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 12. " DQM0/P1.10 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CKE/P1.9 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 10. " DYCS/P1.8 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STCS2/P1.7 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 8. " STCS1/P1.6 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STCS0/P1.5 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 6. " A20/P1.4 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " A19/P1.3 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 4. " A18/P1.2 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " A17/P1.1 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 2. " A16/P1.0 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " A15/P0.31 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 0. " A14/P0.30 ,Signal pending" "Not active,Active"
|
|
tree.end
|
|
base 0x80001000
|
|
tree "Interrupt Output Pending Registers 1"
|
|
rgroup.long 0x4++0x03
|
|
line.long 0x00 "EVIOP01,Interrupt Output Pending Register 0 1"
|
|
bitfld.long 0x00 31. " LER/P4.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " LRW/P4.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LRS/P4.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " LCS/P4.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATO/P3.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " BCKO/P3.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WSO ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " WSI/P3.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BCKI/P3.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " DATI/P3.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RPO/P1.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " OE/P1.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RAS/P1.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " CAS/P1.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WE/P1.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " MCLKO/P1.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BLS1/P1.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " BLS0/P1.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DQM1/P1.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " DQM0/P1.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CKE/P1.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " DYCS/P1.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STCS2/P1.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " STCS1/P1.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STCS0/P1.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " A20/P1.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " A19/P1.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " A18/P1.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " A17/P1.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " A16/P1.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " A15/P0.31 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " A14/P0.30 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "EVIOP11,Interrupt Output Pending Register 1 1"
|
|
bitfld.long 0x00 31. " LER/P4.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " LRW/P4.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LRS/P4.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " LCS/P4.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATO/P3.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " BCKO/P3.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WSO ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " WSI/P3.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BCKI/P3.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " DATI/P3.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RPO/P1.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " OE/P1.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RAS/P1.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " CAS/P1.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WE/P1.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " MCLKO/P1.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BLS1/P1.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " BLS0/P1.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DQM1/P1.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " DQM0/P1.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CKE/P1.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " DYCS/P1.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STCS2/P1.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " STCS1/P1.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STCS0/P1.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " A20/P1.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " A19/P1.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " A18/P1.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " A17/P1.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " A16/P1.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " A15/P0.31 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " A14/P0.30 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "EVIOP21,Interrupt Output Pending Register 2 1"
|
|
bitfld.long 0x00 31. " LER/P4.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " LRW/P4.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LRS/P4.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " LCS/P4.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATO/P3.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " BCKO/P3.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WSO ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " WSI/P3.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BCKI/P3.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " DATI/P3.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RPO/P1.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " OE/P1.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RAS/P1.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " CAS/P1.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WE/P1.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " MCLKO/P1.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BLS1/P1.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " BLS0/P1.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DQM1/P1.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " DQM0/P1.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CKE/P1.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " DYCS/P1.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STCS2/P1.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " STCS1/P1.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STCS0/P1.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " A20/P1.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " A19/P1.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " A18/P1.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " A17/P1.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " A16/P1.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " A15/P0.31 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " A14/P0.30 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x64++0x03
|
|
line.long 0x00 "EVIOP31,Interrupt Output Pending Register 3 1"
|
|
bitfld.long 0x00 31. " LER/P4.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " LRW/P4.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LRS/P4.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " LCS/P4.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATO/P3.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " BCKO/P3.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WSO ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " WSI/P3.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BCKI/P3.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " DATI/P3.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RPO/P1.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " OE/P1.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RAS/P1.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " CAS/P1.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WE/P1.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " MCLKO/P1.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BLS1/P1.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " BLS0/P1.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DQM1/P1.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " DQM0/P1.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CKE/P1.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " DYCS/P1.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STCS2/P1.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " STCS1/P1.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STCS0/P1.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " A20/P1.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " A19/P1.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " A18/P1.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " A17/P1.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " A16/P1.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " A15/P0.31 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " A14/P0.30 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "EVIOP41,Interrupt Output Pending Register 4 1"
|
|
bitfld.long 0x00 31. " LER/P4.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " LRW/P4.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " LRS/P4.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " LCS/P4.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATO/P3.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " BCKO/P3.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WSO ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " WSI/P3.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BCKI/P3.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " DATI/P3.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RPO/P1.19 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " OE/P1.18 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RAS/P1.17 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " CAS/P1.16 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WE/P1.15 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " MCLKO/P1.14 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BLS1/P1.13 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " BLS0/P1.12 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DQM1/P1.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " DQM0/P1.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CKE/P1.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " DYCS/P1.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STCS2/P1.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " STCS1/P1.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STCS0/P1.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " A20/P1.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " A19/P1.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " A18/P1.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " A17/P1.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " A16/P1.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " A15/P0.31 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " A14/P0.30 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
tree.end
|
|
tree "Interrupt Output Mask Register 1"
|
|
group.long 0x404++0x03
|
|
line.long 0x000 "EVIOMK01,Interrupt Output Mask Register 0 1"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " LER/P4.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " LRW/P4.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " LRS/P4.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " LCS/P4.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " DATO/P3.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " BCKO/P3.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " WSO_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " WSI/P3.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " BCKI/P3.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " DATI/P3.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
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setclrfld.long 0x00 21. 0x800 21. 0x400 21. " RPO/P1.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " OE/P1.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " RAS/P1.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " CAS/P1.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " WE/P1.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " MCLKO/P1.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " BLS1/P1.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " BLS0/P1.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " DQM1/P1.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " DQM0/P1.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " CKE/P1.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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setclrfld.long 0x00 10. 0x800 10. 0x400 10. " DYCS/P1.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 9. 0x800 9. 0x400 9. " STCS2/P1.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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setclrfld.long 0x00 8. 0x800 8. 0x400 8. " STCS1/P1.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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textline " "
|
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setclrfld.long 0x00 7. 0x800 7. 0x400 7. " STCS0/P1.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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setclrfld.long 0x00 6. 0x800 6. 0x400 6. " A20/P1.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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textline " "
|
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setclrfld.long 0x00 5. 0x800 5. 0x400 5. " A19/P1.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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setclrfld.long 0x00 4. 0x800 4. 0x400 4. " A18/P1.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 3. 0x800 3. 0x400 3. " A17/P1.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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setclrfld.long 0x00 2. 0x800 2. 0x400 2. " A16/P1.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 1. 0x800 1. 0x400 1. " A15/P0.31_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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setclrfld.long 0x00 0. 0x800 0. 0x400 0. " A14/P0.30_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
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group.long 0x424++0x03
|
|
line.long 0x000 "EVIOMK11,Interrupt Output Mask Register 1 1"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " LER/P4.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " LRW/P4.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 29. 0x800 29. 0x400 29. " LRS/P4.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " LCS/P4.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 27. 0x800 27. 0x400 27. " DATO/P3.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " BCKO/P3.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 25. 0x800 25. 0x400 25. " WSO_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " WSI/P3.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 23. 0x800 23. 0x400 23. " BCKI/P3.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " DATI/P3.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 21. 0x800 21. 0x400 21. " RPO/P1.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " OE/P1.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 19. 0x800 19. 0x400 19. " RAS/P1.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " CAS/P1.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " WE/P1.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " MCLKO/P1.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " BLS1/P1.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " BLS0/P1.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " DQM1/P1.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " DQM0/P1.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " CKE/P1.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " DYCS/P1.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " STCS2/P1.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " STCS1/P1.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " STCS0/P1.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " A20/P1.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " A19/P1.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " A18/P1.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " A17/P1.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " A16/P1.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " A15/P0.31_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " A14/P0.30_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x444++0x03
|
|
line.long 0x000 "EVIOMK21,Interrupt Output Mask Register 2 1"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " LER/P4.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " LRW/P4.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " LRS/P4.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " LCS/P4.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " DATO/P3.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " BCKO/P3.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " WSO_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " WSI/P3.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " BCKI/P3.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " DATI/P3.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " RPO/P1.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " OE/P1.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " RAS/P1.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " CAS/P1.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " WE/P1.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " MCLKO/P1.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " BLS1/P1.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " BLS0/P1.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " DQM1/P1.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " DQM0/P1.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " CKE/P1.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " DYCS/P1.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " STCS2/P1.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " STCS1/P1.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " STCS0/P1.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " A20/P1.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " A19/P1.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " A18/P1.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " A17/P1.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " A16/P1.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " A15/P0.31_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " A14/P0.30_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x464++0x03
|
|
line.long 0x000 "EVIOMK31,Interrupt Output Mask Register 3 1"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " LER/P4.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " LRW/P4.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " LRS/P4.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " LCS/P4.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " DATO/P3.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " BCKO/P3.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " WSO_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " WSI/P3.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " BCKI/P3.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " DATI/P3.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " RPO/P1.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " OE/P1.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " RAS/P1.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " CAS/P1.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " WE/P1.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " MCLKO/P1.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " BLS1/P1.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " BLS0/P1.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " DQM1/P1.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " DQM0/P1.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " CKE/P1.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " DYCS/P1.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " STCS2/P1.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " STCS1/P1.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " STCS0/P1.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " A20/P1.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " A19/P1.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " A18/P1.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " A17/P1.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " A16/P1.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " A15/P0.31_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " A14/P0.30_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x484++0x03
|
|
line.long 0x000 "EVIOMK41,Interrupt Output Mask Register 4 1"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " LER/P4.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " LRW/P4.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " LRS/P4.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " LCS/P4.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " DATO/P3.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " BCKO/P3.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " WSO_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " WSI/P3.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " BCKI/P3.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " DATI/P3.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " RPO/P1.19_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " OE/P1.18_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " RAS/P1.17_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " CAS/P1.16_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " WE/P1.15_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " MCLKO/P1.14_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " BLS1/P1.13_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " BLS0/P1.12_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " DQM1/P1.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " DQM0/P1.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " CKE/P1.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " DYCS/P1.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " STCS2/P1.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " STCS1/P1.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " STCS0/P1.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " A20/P1.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " A19/P1.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " A18/P1.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " A17/P1.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " A16/P1.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " A15/P0.31_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " A14/P0.30_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
width 0x0B
|
|
base 0x80000000
|
|
width 10.
|
|
tree "Input Group 2 Registers"
|
|
tree "Input Signals Registers 2"
|
|
group.long 0xCC8++0x03
|
|
line.long 0x00 "EVAPR2,Activation Polarity Register 2"
|
|
bitfld.long 0x00 31. " SCL ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 30. " RXD/P6.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WDOG ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 28. " MD3/P5.2 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MD2/P5.3 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 26. " MD1/P5.4 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MD0/P5.5 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ADCINT ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTCINT ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 22. " T1CT1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 21. " T0CT1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 20. " cacheIRQ ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " cacheFIQ ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18. " RTS/P6.3 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CTS/P6.2 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TXD/P6.1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD/P6.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MD0/P5.5 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MD1/P5.4 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MD2/P5.3 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MD3/P5.2 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MCMD/P5.1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MCLK/P5.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 8. " OCLK/P3.3 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LD7/P4.11 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LD6/P4.10 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LD5/P4.9 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LD4/P4.8 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LD3/P4.7 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LD2/P4.6 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LD1/P4.5 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LD0/P4.4 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
group.long 0xCE8++0x003
|
|
line.long 0x00 "EVATR2,Activation Type Register 2"
|
|
setclrfld.long 0x00 31. -0x0A0 31. -0x0C0 31. " SCL_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 30. -0x0A0 30. -0x0C0 30. " RXD/P6.0_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x0A0 29. -0x0C0 29. " WDOG_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 28. -0x0A0 28. -0x0C0 28. " MD3/P5.2_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x0A0 27. -0x0C0 27. " MD2/P5.3_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 26. -0x0A0 26. -0x0C0 26. " MD1/P5.4_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x0A0 25. -0x0C0 25. " MD0/P5.5_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 24. -0x0A0 24. -0x0C0 24. " ADCINT_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x0A0 23. -0x0C0 23. " RTCINT_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 22. -0x0A0 22. -0x0C0 22. " T1CT1_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x0A0 21. -0x0C0 21. " T0CT1_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 20. -0x0A0 20. -0x0C0 20. " cacheIRQ_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x0A0 19. -0x0C0 19. " cacheFIQ_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 18. -0x0A0 18. -0x0C0 18. " RTS/P6.3_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x0A0 17. -0x0C0 17. " CTS/P6.2_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 16. -0x0A0 16. -0x0C0 16. " TXD/P6.1_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x0A0 15. -0x0C0 15. " RXD/P6.0_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 14. -0x0A0 14. -0x0C0 14. " MD0/P5.5_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x0A0 13. -0x0C0 13. " MD1/P5.4_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 12. -0x0A0 12. -0x0C0 12. " MD2/P5.3_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x0A0 11. -0x0C0 11. " MD3/P5.2_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 10. -0x0A0 10. -0x0C0 10. " MCMD/P5.1_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x0A0 9. -0x0C0 9. " MCLK/P5.0_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 8. -0x0A0 8. -0x0C0 8. " OCLK/P3.3_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x0A0 7. -0x0C0 7. " LD7/P4.11_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 6. -0x0A0 6. -0x0C0 6. " LD6/P4.10_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x0A0 5. -0x0C0 5. " LD5/P4.9_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 4. -0x0A0 4. -0x0C0 4. " LD4/P4.8_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x0A0 3. -0x0C0 3. " LD3/P4.7_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 2. -0x0A0 2. -0x0C0 2. " LD2/P4.6_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x0A0 1. -0x0C0 1. " LD1/P4.5_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 0. -0x0A0 0. -0x0C0 0. " LD0/P4.4_set/clr ,Signal activation type" "Level,Edge"
|
|
rgroup.long 0xD28++0x003
|
|
line.long 0x00 "EVRSR2,Raw Status Register 2"
|
|
bitfld.long 0x00 31. " SCL ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 30. " RXD/P6.0 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WDOG ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 28. " MD3/P5.2 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MD2/P5.3 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 26. " MD1/P5.4 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MD0/P5.5 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 24. " ADCINT ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTCINT ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 22. " T1CT1 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " T0CT1 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 20. " cacheIRQ ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " cacheFIQ ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 18. " RTS/P6.3 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CTS/P6.2 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 16. " TXD/P6.1 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD/P6.0 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 14. " MD0/P5.5 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MD1/P5.4 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 12. " MD2/P5.3 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MD3/P5.2 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 10. " MCMD/P5.1 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MCLK/P5.0 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 8. " OCLK/P3.3 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LD7/P4.11 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 6. " LD6/P4.10 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LD5/P4.9 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 4. " LD4/P4.8 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LD3/P4.7 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 2. " LD2/P4.6 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LD1/P4.5 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 0. " LD0/P4.4 ,Signal raw status" "Not active,Active"
|
|
group.long 0xC68++0x003
|
|
line.long 0x00 "EVMASK2,Global Mask Register 2"
|
|
setclrfld.long 0x00 31. 0x40 31. 0x20 31. " SCL_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x40 30. 0x20 30. " RXD/P6.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x40 29. 0x20 29. " WDOG_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x40 28. 0x20 28. " MD3/P5.2_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x40 27. 0x20 27. " MD2/P5.3_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x40 26. 0x20 26. " MD1/P5.4_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x40 25. 0x20 25. " MD0/P5.5_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x40 24. 0x20 24. " ADCINT_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x40 23. 0x20 23. " RTCINT_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x40 22. 0x20 22. " T1CT1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x40 21. 0x20 21. " T0CT1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x40 20. 0x20 20. " cacheIRQ_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x40 19. 0x20 19. " cacheFIQ_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x40 18. 0x20 18. " RTS/P6.3_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x40 17. 0x20 17. " CTS/P6.2_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x40 16. 0x20 16. " TXD/P6.1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x40 15. 0x20 15. " RXD/P6.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x40 14. 0x20 14. " MD0/P5.5_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x40 13. 0x20 13. " MD1/P5.4_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x40 12. 0x20 12. " MD2/P5.3_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x40 11. 0x20 11. " MD3/P5.2_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x40 10. 0x20 10. " MCMD/P5.1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x40 9. 0x20 9. " MCLK/P5.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x40 8. 0x20 8. " OCLK/P3.3_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x40 7. 0x20 7. " LD7/P4.11_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x40 6. 0x20 6. " LD6/P4.10_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x40 5. 0x20 5. " LD5/P4.9_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x40 4. 0x20 4. " LD4/P4.8_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x40 3. 0x20 3. " LD3/P4.7_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x40 2. 0x20 2. " LD2/P4.6_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x40 1. 0x20 1. " LD1/P4.5_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x40 0. 0x20 0. " LD0/P4.4_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
rgroup.long 0xC08++0x03
|
|
line.long 0x00 "EVPEND2,Pending Register 2"
|
|
bitfld.long 0x00 31. " SCL ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 30. " RXD/P6.0 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WDOG ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 28. " MD3/P5.2 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MD2/P5.3 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 26. " MD1/P5.4 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MD0/P5.5 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 24. " ADCINT ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTCINT ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 22. " T1CT1 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " T0CT1 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 20. " cacheIRQ ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " cacheFIQ ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 18. " RTS/P6.3 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CTS/P6.2 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 16. " TXD/P6.1 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD/P6.0 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 14. " MD0/P5.5 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MD1/P5.4 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 12. " MD2/P5.3 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MD3/P5.2 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 10. " MCMD/P5.1 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MCLK/P5.0 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 8. " OCLK/P3.3 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LD7/P4.11 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 6. " LD6/P4.10 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LD5/P4.9 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 4. " LD4/P4.8 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LD3/P4.7 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 2. " LD2/P4.6 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LD1/P4.5 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 0. " LD0/P4.4 ,Signal pending" "Not active,Active"
|
|
tree.end
|
|
base 0x80001000
|
|
tree "Interrupt Output Pending Registers 2"
|
|
rgroup.long 0x8++0x03
|
|
line.long 0x00 "EVIOP02,Interrupt Output Pending Register 0 2"
|
|
bitfld.long 0x00 31. " SCL ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WDOG ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " ADCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " T1CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " T0CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " cacheIRQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " cacheFIQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " RTS/P6.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CTS/P6.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " TXD/P6.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " MCMD/P5.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MCLK/P5.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " OCLK/P3.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LD7/P4.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " LD6/P4.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LD5/P4.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " LD4/P4.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LD3/P4.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " LD2/P4.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LD1/P4.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " LD0/P4.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "EVIOP12,Interrupt Output Pending Register 1 2"
|
|
bitfld.long 0x00 31. " SCL ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WDOG ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " ADCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " T1CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " T0CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " cacheIRQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " cacheFIQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " RTS/P6.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CTS/P6.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " TXD/P6.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " MCMD/P5.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MCLK/P5.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " OCLK/P3.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LD7/P4.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " LD6/P4.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LD5/P4.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " LD4/P4.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LD3/P4.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " LD2/P4.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LD1/P4.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " LD0/P4.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "EVIOP22,Interrupt Output Pending Register 2 2"
|
|
bitfld.long 0x00 31. " SCL ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WDOG ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " ADCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " T1CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " T0CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " cacheIRQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " cacheFIQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " RTS/P6.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CTS/P6.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " TXD/P6.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " MCMD/P5.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MCLK/P5.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " OCLK/P3.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LD7/P4.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " LD6/P4.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LD5/P4.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " LD4/P4.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LD3/P4.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " LD2/P4.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LD1/P4.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " LD0/P4.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "EVIOP32,Interrupt Output Pending Register 3 2"
|
|
bitfld.long 0x00 31. " SCL ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WDOG ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " ADCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " T1CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " T0CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " cacheIRQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " cacheFIQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " RTS/P6.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CTS/P6.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " TXD/P6.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " MCMD/P5.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MCLK/P5.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " OCLK/P3.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LD7/P4.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " LD6/P4.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LD5/P4.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " LD4/P4.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LD3/P4.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " LD2/P4.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LD1/P4.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " LD0/P4.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "EVIOP42,Interrupt Output Pending Register 4 2"
|
|
bitfld.long 0x00 31. " SCL ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 30. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WDOG ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 28. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 26. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 24. " ADCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTCINT ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " T1CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " T0CT1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " cacheIRQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " cacheFIQ ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " RTS/P6.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CTS/P6.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " TXD/P6.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD/P6.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " MD0/P5.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MD1/P5.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " MD2/P5.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MD3/P5.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " MCMD/P5.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MCLK/P5.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " OCLK/P3.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LD7/P4.11 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " LD6/P4.10 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LD5/P4.9 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " LD4/P4.8 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LD3/P4.7 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " LD2/P4.6 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LD1/P4.5 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. " LD0/P4.4 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
tree.end
|
|
tree "Interrupt Output Mask Register 2"
|
|
group.long 0x408++0x03
|
|
line.long 0x000 "EVIOMK02,Interrupt Output Mask Register 0 2"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " SCL_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " WDOG_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " ADCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " RTCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " T1CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " T0CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " cacheIRQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " cacheFIQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " RTS/P6.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " CTS/P6.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " TXD/P6.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " MCMD/P5.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " MCLK/P5.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " OCLK/P3.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " LD7/P4.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " LD6/P4.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " LD5/P4.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " LD4/P4.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " LD3/P4.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " LD2/P4.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " LD1/P4.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " LD0/P4.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x428++0x03
|
|
line.long 0x000 "EVIOMK12,Interrupt Output Mask Register 1 2"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " SCL_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " WDOG_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " ADCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " RTCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " T1CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " T0CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " cacheIRQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " cacheFIQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " RTS/P6.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " CTS/P6.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " TXD/P6.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " MCMD/P5.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " MCLK/P5.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " OCLK/P3.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " LD7/P4.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " LD6/P4.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " LD5/P4.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " LD4/P4.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " LD3/P4.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " LD2/P4.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " LD1/P4.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " LD0/P4.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x448++0x03
|
|
line.long 0x000 "EVIOMK22,Interrupt Output Mask Register 2 2"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " SCL_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " WDOG_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " ADCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " RTCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " T1CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " T0CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " cacheIRQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " cacheFIQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " RTS/P6.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " CTS/P6.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " TXD/P6.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " MCMD/P5.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " MCLK/P5.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " OCLK/P3.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " LD7/P4.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " LD6/P4.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " LD5/P4.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " LD4/P4.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " LD3/P4.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " LD2/P4.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " LD1/P4.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " LD0/P4.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x468++0x03
|
|
line.long 0x000 "EVIOMK32,Interrupt Output Mask Register 3 2"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " SCL_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " WDOG_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " ADCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " RTCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " T1CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " T0CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " cacheIRQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " cacheFIQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " RTS/P6.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " CTS/P6.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " TXD/P6.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " MCMD/P5.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " MCLK/P5.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " OCLK/P3.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " LD7/P4.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " LD6/P4.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " LD5/P4.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " LD4/P4.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " LD3/P4.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " LD2/P4.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " LD1/P4.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " LD0/P4.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x488++0x03
|
|
line.long 0x000 "EVIOMK42,Interrupt Output Mask Register 4 2"
|
|
setclrfld.long 0x00 31. 0x800 31. 0x400 31. " SCL_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x800 30. 0x400 30. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x800 29. 0x400 29. " WDOG_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x800 28. 0x400 28. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x800 27. 0x400 27. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x800 26. 0x400 26. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x800 25. 0x400 25. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x800 24. 0x400 24. " ADCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x800 23. 0x400 23. " RTCINT_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x800 22. 0x400 22. " T1CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x800 21. 0x400 21. " T0CT1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x800 20. 0x400 20. " cacheIRQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x800 19. 0x400 19. " cacheFIQ_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x800 18. 0x400 18. " RTS/P6.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x800 17. 0x400 17. " CTS/P6.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x800 16. 0x400 16. " TXD/P6.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x800 15. 0x400 15. " RXD/P6.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x800 14. 0x400 14. " MD0/P5.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x800 13. 0x400 13. " MD1/P5.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x800 12. 0x400 12. " MD2/P5.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x800 11. 0x400 11. " MD3/P5.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " MCMD/P5.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " MCLK/P5.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " OCLK/P3.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " LD7/P4.11_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " LD6/P4.10_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " LD5/P4.9_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " LD4/P4.8_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " LD3/P4.7_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " LD2/P4.6_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x800 1. 0x400 1. " LD1/P4.5_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x800 0. 0x400 0. " LD0/P4.4_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
width 0x0B
|
|
base 0x80000000
|
|
width 10.
|
|
tree "Input Group 3 Registers"
|
|
tree "Input Signals Registers 3"
|
|
group.long 0xCCC++0x03
|
|
line.long 0x00 "EVAPR3,Activation Polarity Register 3"
|
|
bitfld.long 0x00 10. " USBbusres ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 9. " UVBUS/P7.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 8. " USBpwroff ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " USBwkupcs ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBgosusp ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MODE2/P2.3 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODE1/P2.2 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P2.1 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2.0 ,Signal activation polarity" "Low-active/Falling-edge,High-active/Rising-edge"
|
|
group.long 0xCEC++0x003
|
|
line.long 0x00 "EVATR3,Activation Type Register 3"
|
|
setclrfld.long 0x00 10. -0x0A0 10. -0x0C0 10. " USBbusres_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 9. -0x0A0 9. -0x0C0 9. " UVBUS/P7.0_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x0A0 8. -0x0C0 8. " USBpwroff_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 7. -0x0A0 7. -0x0C0 7. " USBwkupcs_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x0A0 6. -0x0C0 6. " USBgosusp_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 5. -0x0A0 5. -0x0C0 5. " MODE2/P2.3_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x0A0 4. -0x0C0 4. " MODE1/P2.2_set/clr ,Signal activation type" "Level,Edge"
|
|
setclrfld.long 0x00 3. -0x0A0 3. -0x0C0 3. " P2.1_set/clr ,Signal activation type" "Level,Edge"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x0A0 2. -0x0C0 2. " P2.0_set/clr ,Signal activation type" "Level,Edge"
|
|
rgroup.long 0xD2C++0x003
|
|
line.long 0x00 "EVRSR3,Raw Status Register 3"
|
|
bitfld.long 0x00 10. " USBbusres ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 9. " UVBUS/P7.0 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " USBpwroff ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 7. " USBwkupcs ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBgosusp ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 5. " MODE2/P2.3 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODE1/P2.2 ,Signal raw status" "Not active,Active"
|
|
bitfld.long 0x00 3. " P2.1 ,Signal raw status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2.0 ,Signal raw status" "Not active,Active"
|
|
group.long 0xC6C++0x003
|
|
line.long 0x00 "EVMASK3,Global Mask Register 3"
|
|
setclrfld.long 0x00 10. 0x40 10. 0x20 10. " USBbusres_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x40 9. 0x20 9. " UVBUS/P7.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x40 8. 0x20 8. " USBpwroff_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x40 7. 0x20 7. " USBwkupcs_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x40 6. 0x20 6. " USBgosusp_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x40 5. 0x20 5. " MODE2/P2.3_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x40 4. 0x20 4. " MODE1/P2.2_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x40 3. 0x20 3. " P2.1_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x40 2. 0x20 2. " P2.0_set/clr ,Signal global mask" "Disabled,Enabled"
|
|
rgroup.long 0xC0C++0x03
|
|
line.long 0x00 "EVPEND3,Pending Register 3"
|
|
bitfld.long 0x00 10. " USBbusres ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 9. " UVBUS/P7.0 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " USBpwroff ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 7. " USBwkupcs ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBgosusp ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 5. " MODE2/P2.3 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODE1/P2.2 ,Signal pending" "Not active,Active"
|
|
bitfld.long 0x00 3. " P2.1 ,Signal pending" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2.0 ,Signal pending" "Not active,Active"
|
|
tree.end
|
|
base 0x80001000
|
|
tree "Interrupt Output Pending Registers 3"
|
|
rgroup.long 0xC++0x03
|
|
line.long 0x00 "EVIOP03,Interrupt Output Pending Register 0 3"
|
|
bitfld.long 0x00 10. " USBbusres ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " UVBUS/P7.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " USBpwroff ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 7. " USBwkupcs ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBgosusp ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. " MODE2/P2.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODE1/P2.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. " P2.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "EVIOP13,Interrupt Output Pending Register 1 3"
|
|
bitfld.long 0x00 10. " USBbusres ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " UVBUS/P7.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " USBpwroff ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 7. " USBwkupcs ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBgosusp ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. " MODE2/P2.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODE1/P2.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. " P2.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "EVIOP23,Interrupt Output Pending Register 2 3"
|
|
bitfld.long 0x00 10. " USBbusres ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " UVBUS/P7.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " USBpwroff ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 7. " USBwkupcs ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBgosusp ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. " MODE2/P2.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODE1/P2.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. " P2.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x6C++0x03
|
|
line.long 0x00 "EVIOP33,Interrupt Output Pending Register 3 3"
|
|
bitfld.long 0x00 10. " USBbusres ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " UVBUS/P7.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " USBpwroff ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 7. " USBwkupcs ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBgosusp ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. " MODE2/P2.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODE1/P2.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. " P2.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
rgroup.long 0x8C++0x03
|
|
line.long 0x00 "EVIOP43,Interrupt Output Pending Register 4 3"
|
|
bitfld.long 0x00 10. " USBbusres ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " UVBUS/P7.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " USBpwroff ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 7. " USBwkupcs ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBgosusp ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. " MODE2/P2.3 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODE1/P2.2 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. " P2.1 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2.0 ,Signal Interrupt Output Pending" "Not asserted,Asserted"
|
|
tree.end
|
|
tree "Interrupt Output Mask Register 1"
|
|
group.long 0x40C++0x03
|
|
line.long 0x000 "EVIOMK03,Interrupt Output Mask Register 0 3"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " USBbusres_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " UVBUS/P7.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " USBpwroff_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " USBwkupcs_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " USBgosusp_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " MODE2/P2.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " MODE1/P2.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " P2.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " P2.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x42C++0x03
|
|
line.long 0x000 "EVIOMK13,Interrupt Output Mask Register 1 3"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " USBbusres_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " UVBUS/P7.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " USBpwroff_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " USBwkupcs_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " USBgosusp_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " MODE2/P2.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " MODE1/P2.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " P2.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " P2.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x44C++0x03
|
|
line.long 0x000 "EVIOMK23,Interrupt Output Mask Register 2 3"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " USBbusres_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " UVBUS/P7.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " USBpwroff_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " USBwkupcs_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " USBgosusp_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " MODE2/P2.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " MODE1/P2.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " P2.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " P2.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x46C++0x03
|
|
line.long 0x000 "EVIOMK33,Interrupt Output Mask Register 3 3"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " USBbusres_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " UVBUS/P7.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " USBpwroff_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " USBwkupcs_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " USBgosusp_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " MODE2/P2.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " MODE1/P2.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " P2.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " P2.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
group.long 0x48C++0x03
|
|
line.long 0x000 "EVIOMK43,Interrupt Output Mask Register 4 3"
|
|
setclrfld.long 0x00 10. 0x800 10. 0x400 10. " USBbusres_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x800 9. 0x400 9. " UVBUS/P7.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x800 8. 0x400 8. " USBpwroff_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x800 7. 0x400 7. " USBwkupcs_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x800 6. 0x400 6. " USBgosusp_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x800 5. 0x400 5. " MODE2/P2.3_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x800 4. 0x400 4. " MODE1/P2.2_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x800 3. 0x400 3. " P2.1_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x800 2. 0x400 2. " P2.0_set/clr ,Signal Interrupt Output Mask" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
base 0x80000000
|
|
width 12.
|
|
tree "Output And Feature Registers"
|
|
rgroup.long 0xD40++0x03
|
|
line.long 0x00 "EVOUT,Event Router Output Register"
|
|
bitfld.long 0x00 4. " WakeUp ,Wakeup output to the Clock Generation Unit" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. " INT3 ,Request the corresponding interrupt to the Interrupt Controller" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " INT2 ,Request the corresponding interrupt to the Interrupt Controller" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INT1 ,Request the corresponding interrupt to the Interrupt Controller" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " INT0 ,Request the corresponding interrupt to the Interrupt Controller" "Not requested,Requested"
|
|
rgroup.long 0xE00++0x03
|
|
line.long 0x00 "EVFEATURES,Features Register"
|
|
hexmask.long.byte 0x00 16.--21. 1. " m ,Number of outputs produced by the Event Router (minus 1)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " n ,Number of inputs included in the Event Router (minus 1)"
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; GPDMA
|
|
; --------------------------------------------------------------------------------
|
|
tree "General Purpose DMA Controller"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80103000
|
|
width 15.
|
|
tree "Channel Registers"
|
|
group.long 0x800++0x13 "Channel 0"
|
|
line.long 0x00 "DMA0Status,Source Address Register 0"
|
|
line.long 0x04 "DMA0Dest,Destination Address Register 0"
|
|
line.long 0x08 "DMA0Length,Transfer Length Register 0"
|
|
hexmask.long.word 0x08 0.--11. 1. " MaxTrans ,The maximum number of transfers to be performed (minus one)"
|
|
line.long 0x0C "DMA0Config,Channel Configuration Register 0"
|
|
bitfld.long 0x0C 0.--4. " DestID ,Destination ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 5.--9. " SourceID ,Source ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " Size ,Size" "32 bits,16 bits,8 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12. " SwapEndian ,Swap data between Big and Little Endian formats" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--15. " PairedChannel ,Paired Channel entry format" "Source Address,Dest Address,Transfer Length,Configuration,Next Entry Address,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 17. " PairedChannelEn ,Paired Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " CircularBuffer ,Circular Buffer value" "Not incremented,Incremented"
|
|
line.long 0x10 "DMA0Enab,Channel Enable Register 0"
|
|
bitfld.long 0x10 0. " ChanEn ,Channel Enable" "Disabled,Enabled"
|
|
group.long (0x800+0x1C)++0x03
|
|
line.long 0x00 "DMA0Count,Transfer Count Register 0"
|
|
hexmask.long.word 0x00 0.--11. 1. " Counter ,Passed read/ write cycles"
|
|
group.long 0x820++0x13 "Channel 1"
|
|
line.long 0x00 "DMA1Status,Source Address Register 1"
|
|
line.long 0x04 "DMA1Dest,Destination Address Register 1"
|
|
line.long 0x08 "DMA1Length,Transfer Length Register 1"
|
|
hexmask.long.word 0x08 0.--11. 1. " MaxTrans ,The maximum number of transfers to be performed (minus one)"
|
|
line.long 0x0C "DMA1Config,Channel Configuration Register 1"
|
|
bitfld.long 0x0C 0.--4. " DestID ,Destination ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 5.--9. " SourceID ,Source ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " Size ,Size" "32 bits,16 bits,8 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12. " SwapEndian ,Swap data between Big and Little Endian formats" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--15. " PairedChannel ,Paired Channel entry format" "Source Address,Dest Address,Transfer Length,Configuration,Next Entry Address,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 17. " PairedChannelEn ,Paired Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " CircularBuffer ,Circular Buffer value" "Not incremented,Incremented"
|
|
line.long 0x10 "DMA1Enab,Channel Enable Register 1"
|
|
bitfld.long 0x10 0. " ChanEn ,Channel Enable" "Disabled,Enabled"
|
|
group.long (0x820+0x1C)++0x03
|
|
line.long 0x00 "DMA1Count,Transfer Count Register 1"
|
|
hexmask.long.word 0x00 0.--11. 1. " Counter ,Passed read/ write cycles"
|
|
group.long 0x840++0x13 "Channel 2"
|
|
line.long 0x00 "DMA2Status,Source Address Register 2"
|
|
line.long 0x04 "DMA2Dest,Destination Address Register 2"
|
|
line.long 0x08 "DMA2Length,Transfer Length Register 2"
|
|
hexmask.long.word 0x08 0.--11. 1. " MaxTrans ,The maximum number of transfers to be performed (minus one)"
|
|
line.long 0x0C "DMA2Config,Channel Configuration Register 2"
|
|
bitfld.long 0x0C 0.--4. " DestID ,Destination ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 5.--9. " SourceID ,Source ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " Size ,Size" "32 bits,16 bits,8 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12. " SwapEndian ,Swap data between Big and Little Endian formats" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--15. " PairedChannel ,Paired Channel entry format" "Source Address,Dest Address,Transfer Length,Configuration,Next Entry Address,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 17. " PairedChannelEn ,Paired Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " CircularBuffer ,Circular Buffer value" "Not incremented,Incremented"
|
|
line.long 0x10 "DMA2Enab,Channel Enable Register 2"
|
|
bitfld.long 0x10 0. " ChanEn ,Channel Enable" "Disabled,Enabled"
|
|
group.long (0x840+0x1C)++0x03
|
|
line.long 0x00 "DMA2Count,Transfer Count Register 2"
|
|
hexmask.long.word 0x00 0.--11. 1. " Counter ,Passed read/ write cycles"
|
|
group.long 0x860++0x13 "Channel 3"
|
|
line.long 0x00 "DMA3Status,Source Address Register 3"
|
|
line.long 0x04 "DMA3Dest,Destination Address Register 3"
|
|
line.long 0x08 "DMA3Length,Transfer Length Register 3"
|
|
hexmask.long.word 0x08 0.--11. 1. " MaxTrans ,The maximum number of transfers to be performed (minus one)"
|
|
line.long 0x0C "DMA3Config,Channel Configuration Register 3"
|
|
bitfld.long 0x0C 0.--4. " DestID ,Destination ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 5.--9. " SourceID ,Source ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " Size ,Size" "32 bits,16 bits,8 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12. " SwapEndian ,Swap data between Big and Little Endian formats" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--15. " PairedChannel ,Paired Channel entry format" "Source Address,Dest Address,Transfer Length,Configuration,Next Entry Address,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 17. " PairedChannelEn ,Paired Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " CircularBuffer ,Circular Buffer value" "Not incremented,Incremented"
|
|
line.long 0x10 "DMA3Enab,Channel Enable Register 3"
|
|
bitfld.long 0x10 0. " ChanEn ,Channel Enable" "Disabled,Enabled"
|
|
group.long (0x860+0x1C)++0x03
|
|
line.long 0x00 "DMA3Count,Transfer Count Register 3"
|
|
hexmask.long.word 0x00 0.--11. 1. " Counter ,Passed read/ write cycles"
|
|
group.long 0x880++0x13 "Channel 4"
|
|
line.long 0x00 "DMA4Status,Source Address Register 4"
|
|
line.long 0x04 "DMA4Dest,Destination Address Register 4"
|
|
line.long 0x08 "DMA4Length,Transfer Length Register 4"
|
|
hexmask.long.word 0x08 0.--11. 1. " MaxTrans ,The maximum number of transfers to be performed (minus one)"
|
|
line.long 0x0C "DMA4Config,Channel Configuration Register 4"
|
|
bitfld.long 0x0C 0.--4. " DestID ,Destination ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 5.--9. " SourceID ,Source ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " Size ,Size" "32 bits,16 bits,8 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12. " SwapEndian ,Swap data between Big and Little Endian formats" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--15. " PairedChannel ,Paired Channel entry format" "Source Address,Dest Address,Transfer Length,Configuration,Next Entry Address,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 17. " PairedChannelEn ,Paired Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " CircularBuffer ,Circular Buffer value" "Not incremented,Incremented"
|
|
line.long 0x10 "DMA4Enab,Channel Enable Register 4"
|
|
bitfld.long 0x10 0. " ChanEn ,Channel Enable" "Disabled,Enabled"
|
|
group.long (0x880+0x1C)++0x03
|
|
line.long 0x00 "DMA4Count,Transfer Count Register 4"
|
|
hexmask.long.word 0x00 0.--11. 1. " Counter ,Passed read/ write cycles"
|
|
group.long 0x8A0++0x13 "Channel 5"
|
|
line.long 0x00 "DMA5Status,Source Address Register 5"
|
|
line.long 0x04 "DMA5Dest,Destination Address Register 5"
|
|
line.long 0x08 "DMA5Length,Transfer Length Register 5"
|
|
hexmask.long.word 0x08 0.--11. 1. " MaxTrans ,The maximum number of transfers to be performed (minus one)"
|
|
line.long 0x0C "DMA5Config,Channel Configuration Register 5"
|
|
bitfld.long 0x0C 0.--4. " DestID ,Destination ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 5.--9. " SourceID ,Source ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " Size ,Size" "32 bits,16 bits,8 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12. " SwapEndian ,Swap data between Big and Little Endian formats" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--15. " PairedChannel ,Paired Channel entry format" "Source Address,Dest Address,Transfer Length,Configuration,Next Entry Address,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 17. " PairedChannelEn ,Paired Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " CircularBuffer ,Circular Buffer value" "Not incremented,Incremented"
|
|
line.long 0x10 "DMA5Enab,Channel Enable Register 5"
|
|
bitfld.long 0x10 0. " ChanEn ,Channel Enable" "Disabled,Enabled"
|
|
group.long (0x8A0+0x1C)++0x03
|
|
line.long 0x00 "DMA5Count,Transfer Count Register 5"
|
|
hexmask.long.word 0x00 0.--11. 1. " Counter ,Passed read/ write cycles"
|
|
group.long 0x8C0++0x13 "Channel 6"
|
|
line.long 0x00 "DMA6Status,Source Address Register 6"
|
|
line.long 0x04 "DMA6Dest,Destination Address Register 6"
|
|
line.long 0x08 "DMA6Length,Transfer Length Register 6"
|
|
hexmask.long.word 0x08 0.--11. 1. " MaxTrans ,The maximum number of transfers to be performed (minus one)"
|
|
line.long 0x0C "DMA6Config,Channel Configuration Register 6"
|
|
bitfld.long 0x0C 0.--4. " DestID ,Destination ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 5.--9. " SourceID ,Source ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " Size ,Size" "32 bits,16 bits,8 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12. " SwapEndian ,Swap data between Big and Little Endian formats" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--15. " PairedChannel ,Paired Channel entry format" "Source Address,Dest Address,Transfer Length,Configuration,Next Entry Address,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 17. " PairedChannelEn ,Paired Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " CircularBuffer ,Circular Buffer value" "Not incremented,Incremented"
|
|
line.long 0x10 "DMA6Enab,Channel Enable Register 6"
|
|
bitfld.long 0x10 0. " ChanEn ,Channel Enable" "Disabled,Enabled"
|
|
group.long (0x8C0+0x1C)++0x03
|
|
line.long 0x00 "DMA6Count,Transfer Count Register 6"
|
|
hexmask.long.word 0x00 0.--11. 1. " Counter ,Passed read/ write cycles"
|
|
group.long 0x8E0++0x13 "Channel 7"
|
|
line.long 0x00 "DMA7Status,Source Address Register 7"
|
|
line.long 0x04 "DMA7Dest,Destination Address Register 7"
|
|
line.long 0x08 "DMA7Length,Transfer Length Register 7"
|
|
hexmask.long.word 0x08 0.--11. 1. " MaxTrans ,The maximum number of transfers to be performed (minus one)"
|
|
line.long 0x0C "DMA7Config,Channel Configuration Register 7"
|
|
bitfld.long 0x0C 0.--4. " DestID ,Destination ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 5.--9. " SourceID ,Source ID" "Reserved,SD/MMC Single,SD/MMC Burst,UART Rx,UART Tx,I2C,SAO1 A channel,SAO1 B channel,SAO2 A channel,SAO2 B channel,SAI1 A channel,SAI1 B channel,Reserved,Reserved,Reserved,Reserved,SAI4 A channel,SAI4 B channel,LCD output,MPMC_A19,MPMC_A17,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " Size ,Size" "32 bits,16 bits,8 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12. " SwapEndian ,Swap data between Big and Little Endian formats" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--15. " PairedChannel ,Paired Channel entry format" "Source Address,Dest Address,Transfer Length,Configuration,Next Entry Address,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 17. " PairedChannelEn ,Paired Channel Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " CircularBuffer ,Circular Buffer value" "Not incremented,Incremented"
|
|
line.long 0x10 "DMA7Enab,Channel Enable Register 7"
|
|
bitfld.long 0x10 0. " ChanEn ,Channel Enable" "Disabled,Enabled"
|
|
group.long (0x8E0+0x1C)++0x03
|
|
line.long 0x00 "DMA7Count,Transfer Count Register 7"
|
|
hexmask.long.word 0x00 0.--11. 1. " Counter ,Passed read/ write cycles"
|
|
tree.end
|
|
tree "Channel Alternate Registers"
|
|
wgroup.long 0xA00++0x0F
|
|
line.long 0x00 "DMA0AltSource,Alternate Source Address Register 0"
|
|
line.long 0x04 "DMA0AltDest,Alternate Destination Address Register 0"
|
|
line.long 0x08 "DMA0AltLength,Alternate Transfer Length Register 0"
|
|
hexmask.long.word 0x08 0.--11. 1. " AlTrLng ,Alternate Channel Transfer Length"
|
|
line.long 0x0C "DMA0AltConfig,Alternate Configuration Registers 0"
|
|
hexmask.long.tbyte 0x0C 0.--18. 1. " AlConf ,Alternate Channel Configuration"
|
|
wgroup.long 0xA10++0x0F
|
|
line.long 0x00 "DMA1AltSource,Alternate Source Address Register 1"
|
|
line.long 0x04 "DMA1AltDest,Alternate Destination Address Register 1"
|
|
line.long 0x08 "DMA1AltLength,Alternate Transfer Length Register 1"
|
|
hexmask.long.word 0x08 0.--11. 1. " AlTrLng ,Alternate Channel Transfer Length"
|
|
line.long 0x0C "DMA1AltConfig,Alternate Configuration Registers 1"
|
|
hexmask.long.tbyte 0x0C 0.--18. 1. " AlConf ,Alternate Channel Configuration"
|
|
wgroup.long 0xA20++0x0F
|
|
line.long 0x00 "DMA2AltSource,Alternate Source Address Register 2"
|
|
line.long 0x04 "DMA2AltDest,Alternate Destination Address Register 2"
|
|
line.long 0x08 "DMA2AltLength,Alternate Transfer Length Register 2"
|
|
hexmask.long.word 0x08 0.--11. 1. " AlTrLng ,Alternate Channel Transfer Length"
|
|
line.long 0x0C "DMA2AltConfig,Alternate Configuration Registers 2"
|
|
hexmask.long.tbyte 0x0C 0.--18. 1. " AlConf ,Alternate Channel Configuration"
|
|
wgroup.long 0xA30++0x0F
|
|
line.long 0x00 "DMA3AltSource,Alternate Source Address Register 3"
|
|
line.long 0x04 "DMA3AltDest,Alternate Destination Address Register 3"
|
|
line.long 0x08 "DMA3AltLength,Alternate Transfer Length Register 3"
|
|
hexmask.long.word 0x08 0.--11. 1. " AlTrLng ,Alternate Channel Transfer Length"
|
|
line.long 0x0C "DMA3AltConfig,Alternate Configuration Registers 3"
|
|
hexmask.long.tbyte 0x0C 0.--18. 1. " AlConf ,Alternate Channel Configuration"
|
|
wgroup.long 0xA40++0x0F
|
|
line.long 0x00 "DMA4AltSource,Alternate Source Address Register 4"
|
|
line.long 0x04 "DMA4AltDest,Alternate Destination Address Register 4"
|
|
line.long 0x08 "DMA4AltLength,Alternate Transfer Length Register 4"
|
|
hexmask.long.word 0x08 0.--11. 1. " AlTrLng ,Alternate Channel Transfer Length"
|
|
line.long 0x0C "DMA4AltConfig,Alternate Configuration Registers 4"
|
|
hexmask.long.tbyte 0x0C 0.--18. 1. " AlConf ,Alternate Channel Configuration"
|
|
wgroup.long 0xA50++0x0F
|
|
line.long 0x00 "DMA5AltSource,Alternate Source Address Register 5"
|
|
line.long 0x04 "DMA5AltDest,Alternate Destination Address Register 5"
|
|
line.long 0x08 "DMA5AltLength,Alternate Transfer Length Register 5"
|
|
hexmask.long.word 0x08 0.--11. 1. " AlTrLng ,Alternate Channel Transfer Length"
|
|
line.long 0x0C "DMA5AltConfig,Alternate Configuration Registers 5"
|
|
hexmask.long.tbyte 0x0C 0.--18. 1. " AlConf ,Alternate Channel Configuration"
|
|
wgroup.long 0xA60++0x0F
|
|
line.long 0x00 "DMA6AltSource,Alternate Source Address Register 6"
|
|
line.long 0x04 "DMA6AltDest,Alternate Destination Address Register 6"
|
|
line.long 0x08 "DMA6AltLength,Alternate Transfer Length Register 6"
|
|
hexmask.long.word 0x08 0.--11. 1. " AlTrLng ,Alternate Channel Transfer Length"
|
|
line.long 0x0C "DMA6AltConfig,Alternate Configuration Registers 6"
|
|
hexmask.long.tbyte 0x0C 0.--18. 1. " AlConf ,Alternate Channel Configuration"
|
|
wgroup.long 0xA70++0x0F
|
|
line.long 0x00 "DMA7AltSource,Alternate Source Address Register 7"
|
|
line.long 0x04 "DMA7AltDest,Alternate Destination Address Register 7"
|
|
line.long 0x08 "DMA7AltLength,Alternate Transfer Length Register 7"
|
|
hexmask.long.word 0x08 0.--11. 1. " AlTrLng ,Alternate Channel Transfer Length"
|
|
line.long 0x0C "DMA7AltConfig,Alternate Configuration Registers 7"
|
|
hexmask.long.tbyte 0x0C 0.--18. 1. " AlConf ,Alternate Channel Configuration"
|
|
tree.end
|
|
tree "Global and System Control Registers"
|
|
group.long 0xC00++0x0B
|
|
line.long 0x00 "DMA_Enable,Global Enable Register"
|
|
bitfld.long 0x00 0. " ChanEn0 ,Channel 0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ChanEn1 ,Channel 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ChanEn2 ,Channel 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ChanEn3 ,Channel 3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ChanEn4 ,Channel 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ChanEn5 ,Channel 5 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ChanEn6 ,Channel 6 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ChanEn7 ,Channel 7 Enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA_Stat,Global Status and Clear Register"
|
|
eventfld.long 0x04 0. " Complete0 ,Channel 0 Buffer Finish" "Not finished,Finished"
|
|
eventfld.long 0x04 1. " Half0 ,Channel 0 Half-buffer Finish" "Not half-finished,Half-finished"
|
|
textline " "
|
|
eventfld.long 0x04 2. " Complete1 ,Channel 1 Buffer Finish" "Not finished,Finished"
|
|
eventfld.long 0x04 3. " Half1 ,Channel 1 Half-buffer Finish" "Not half-finished,Half-finished"
|
|
textline " "
|
|
eventfld.long 0x04 4. " Complete2 ,Channel 2 Buffer Finish" "Not finished,Finished"
|
|
eventfld.long 0x04 5. " Half2 ,Channel 2 Half-buffer Finish" "Not half-finished,Half-finished"
|
|
textline " "
|
|
eventfld.long 0x04 6. " Complete3 ,Channel 3 Buffer Finish" "Not finished,Finished"
|
|
eventfld.long 0x04 7. " Half3 ,Channel 3 Half-buffer Finish" "Not half-finished,Half-finished"
|
|
textline " "
|
|
eventfld.long 0x04 8. " Complete4 ,Channel 4 Buffer Finish" "Not finished,Finished"
|
|
eventfld.long 0x04 9. " Half4 ,Channel 4 Half-buffer Finish" "Not half-finished,Half-finished"
|
|
textline " "
|
|
eventfld.long 0x04 10. " Complete5 ,Channel 5 Buffer Finish" "Not finished,Finished"
|
|
eventfld.long 0x04 11. " Half5 ,Channel 5 Half-buffer Finish" "Not half-finished,Half-finished"
|
|
textline " "
|
|
eventfld.long 0x04 12. " Complete6 ,Channel 6 Buffer Finish" "Not finished,Finished"
|
|
eventfld.long 0x04 13. " Half6 ,Channel 6 Half-buffer Finish" "Not half-finished,Half-finished"
|
|
textline " "
|
|
eventfld.long 0x04 14. " Complete7 ,Channel 7 Buffer Finish" "Not finished,Finished"
|
|
eventfld.long 0x04 15. " Half7 ,Channel 7 Half-buffer Finish" "Not half-finished,Half-finished"
|
|
textline " "
|
|
eventfld.long 0x04 30. " SoftInt ,Soft Interrupt Register write" "Not written,Written"
|
|
eventfld.long 0x04 31. " Abort ,Abort Status for an AHB Cycle" "Not aborted,Aborted"
|
|
line.long 0x08 "DMA_IRQMask,IRQ Mask Register"
|
|
bitfld.long 0x08 0. " MaskComp0 ,Channel 0 Buffer Finish Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " MaskHalf0 ,Channel 0 Half-buffer Finish Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 2. " MaskComp1 ,Channel 1 Buffer Finish Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " MaskHalf1 ,Channel 1 Half-buffer Finish Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " MaskComp2 ,Channel 2 Buffer Finish Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " MaskHalf2 ,Channel 2 Half-buffer Finish Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 6. " MaskComp3 ,Channel 3 Buffer Finish Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " MaskHalf3 ,Channel 3 Half-buffer Finish Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " MaskComp4 ,Channel 4 Buffer Finish Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " MaskHalf4 ,Channel 4 Half-buffer Finish Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 10. " MaskComp5 ,Channel 5 Buffer Finish Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " MaskHalf5 ,Channel 5 Half-buffer Finish Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " MaskComp6 ,Channel 6 Buffer Finish Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " MaskHalf6 ,Channel 6 Half-buffer Finish Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 14. " MaskComp7 ,Channel 7 Buffer Finish Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " MaskHalf7 ,Channel 7 Half-buffer Finish Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 30. " MaskSoftIn ,Global Soft Interrupt Register Write Mask" "Not masked,Masked"
|
|
bitfld.long 0x08 31. " MaskAbort ,Abort Status for an AHB Cycle Mask" "Not masked,Masked"
|
|
wgroup.long 0xC10++0x03
|
|
line.long 0x00 "DMA_SoftInt,DMA Software Interrupt Register"
|
|
group.long 0x2048++0x07
|
|
line.long 0x00 "DMA3EXTEN,DMA Channel 3 External Enable Register"
|
|
bitfld.long 0x00 0. " DMA3EXTEN ,DMA Channel 3 External Enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA5EXTEN,DMA Channel 5 External Enable Register"
|
|
bitfld.long 0x04 0. " DMA5EXTEN ,DMA Channel 5 External Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||cpu()=="LPC2420"||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
base sd:0xFFE04000
|
|
width 0x17
|
|
tree "General Registers"
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "DMACIntStatus,Interrupt Status Register"
|
|
bitfld.long 0x0 1. " IntStatus1 ,Status of channel 1 interrupts after masking" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IntStatus0 ,Status of channel 0 interrupts after masking" "No interrupt,Interrupt"
|
|
line.long 0x4 "DMACIntTCStatus,Interrupt Terminal Count Status Register"
|
|
bitfld.long 0x4 1. " IntTCStatus1 ,Terminal count interrupt request status for channel 1" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 0. " IntTCStatus0 ,Terminal count interrupt request status for channel 0" "Not requested,Requested"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "DMACIntClear,Interrupt Terminal Count Clear Register"
|
|
bitfld.long 0x0 1. " IntTCClear1 ,Clears the terminal count interrupt request for channel 1 (IntTCStatus1)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IntTCClear0 ,Clears the terminal count interrupt request for channel 0 (IntTCStatus0)" "No effect,Cleared"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "DMACIntErrorStatus,Interrupt Error Status Register"
|
|
bitfld.long 0x0 1. " IntErrorStatus1 ,Interrupt error status for channel 1" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IntErrorStatus0 ,Interrupt error status for channel 0" "No error,Error"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "DMACIntErrClr,Interrupt Error Clear Register"
|
|
bitfld.long 0x0 1. " IntErrClr1 ,Clears the error interrupt request for channel 1 (IntErrorStatus1)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IntErrClr0 ,Clears the error interrupt request for channel 0 (IntErrorStatus0)" "No effect,Cleared"
|
|
rgroup.long 0x14++0xB
|
|
line.long 0x0 "DMACRawIntTCStatus,Raw Interrupt Terminal Count Status Register"
|
|
bitfld.long 0x0 1. " RawIntTCStatus1 ,Status of the terminal count interrupt for channel 1 prior to masking" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 0. " RawIntTCStatus0 ,Status of the terminal count interrupt for channel 0 prior to masking" "No interrupt,Interrupt"
|
|
line.long 0x4 "DMACRawIntErrorStatus,Raw Error Interrupt Status Register"
|
|
bitfld.long 0x4 1. " RawIntErrorStatus1 ,Status of the error interrupt for channel 1 prior to masking" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 0. " RawIntErrorStatus0 ,Status of the error interrupt for channel 0 prior to masking" "No interrupt,Interrupt"
|
|
line.long 0x8 "DMACEnbldChns,Enabled Channel Register"
|
|
bitfld.long 0x8 1. " EnabledChannels1 ,Enable status for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x8 0. " EnabledChannels0 ,Enable status for Channel 0" "Disabled,Enabled"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "DMACSoftBReq,Software Burst Request Register"
|
|
bitfld.long 0x0 6. " SoftBReqI2S1 ,Software burst request flag for I2S1" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SoftBReqI2S0 ,Software burst request flag for I2S0" "Not requested,Requested"
|
|
textline " "
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x0 4. " SoftBReqSDMMC ,Software burst request flag for SD/MMC" "Not requested,Requested"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 3. " SoftBReqSSP1Rx ,Software burst request flag for SSP1 Rx" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SoftBReqSSP1Tx ,Software burst request flag for SSP1 Tx" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 1. " SoftBReqSSP0Rx ,Software burst request flag for SSP0 Rx" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SoftBReqSSP0Tx ,Software burst request flag for SSP0 Tx" "Not requested,Requested"
|
|
line.long 0x4 "DMACSoftSReq,Software Single Request Register"
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
bitfld.long 0x4 4. " SoftReqSDMMC ,Single software request flag for SD/MMC" "Not requested,Requested"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x4 3. " SoftReqSSP1Rx ,Single software request flag for SSP1 Rx" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 2. " SoftReqSSP1Tx ,Single software request flag for SSP1 Tx" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 1. " SoftReqSSP0Rx ,Single software request flag for SSP0 Rx" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 0. " SoftReqSSP0Tx ,Single software request flag for SSP0 Tx" "Not requested,Requested"
|
|
sif (cpu()=="LPC2367"||cpu()=="LPC2368"||cpu()=="LPC2377"||cpu()=="LPC2378"||cpu()=="LPC2387"||cpu()=="LPC2388"||cpu()=="LPC2420"||cpu()=="LPC2458"||cpu()=="LPC2460"||cpu()=="LPC2468"||cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "DMACSoftLBReq,Software Last Burst Request Register"
|
|
bitfld.long 0x0 4. " SoftLBReqSDMMC ,Software last burst request flags for SD/MMC" "Not requested,Requested"
|
|
line.long 0x4 "DMACSoftLSReq,Software Last Single Request Register"
|
|
bitfld.long 0x4 4. " SoftLSReqSDMMC ,Software last single request flags for SD/MMC" "Not requested,Requested"
|
|
else
|
|
hgroup.long 0x28++0x7
|
|
hide.long 0x0 "DMACSoftLBReq,Software Last Burst Request Register"
|
|
hide.long 0x4 "DMACSoftLSReq,Software Last Single Request Register"
|
|
endif
|
|
group.long 0x30++0x7
|
|
line.long 0x00 "DMACConfiguration,Configuration Register"
|
|
bitfld.long 0x00 1. " M ,AHB Master endianness configuration" "Little-endian,Big-endian"
|
|
bitfld.long 0x00 0. " E ,GPDMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMACSync,Synchronization Register"
|
|
bitfld.long 0x04 15. " DMACSync15 ,DMA synchronization logic for DMA request signal 15 enabled or disabled" "Enabled,Disabled"
|
|
bitfld.long 0x04 14. " DMACSync14 ,DMA synchronization logic for DMA request signal 14 enabled or disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " DMACSync13 ,DMA synchronization logic for DMA request signal 13 enabled or disabled" "Enabled,Disabled"
|
|
bitfld.long 0x04 12. " DMACSync12 ,DMA synchronization logic for DMA request signal 12 enabled or disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DMACSync11 ,DMA synchronization logic for DMA request signal 11 enabled or disabled" "Enabled,Disabled"
|
|
bitfld.long 0x04 10. " DMACSync10 ,DMA synchronization logic for DMA request signal 10 enabled or disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " DMACSync9 ,DMA synchronization logic for DMA request signal 9 enabled or disabled" "Enabled,Disabled"
|
|
bitfld.long 0x04 8. " DMACSync8 ,DMA synchronization logic for DMA request signal 8 enabled or disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DMACSync7 ,DMA synchronization logic for DMA request signal 7 enabled or disabled" "Enabled,Disabled"
|
|
bitfld.long 0x04 6. " DMACSync6 ,DMA synchronization logic for DMA request signal 6 enabled or disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " DMACSync5 ,DMA synchronization logic for DMA request signal 5 enabled or disabled" "Enabled,Disabled"
|
|
bitfld.long 0x04 4. " DMACSync4 ,DMA synchronization logic for DMA request signal 4 enabled or disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DMACSync3 ,DMA synchronization logic for DMA request signal 3 enabled or disabled" "Enabled,Disabled"
|
|
bitfld.long 0x04 2. " DMACSync2 ,DMA synchronization logic for DMA request signal 2 enabled or disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DMACSync1 ,DMA synchronization logic for DMA request signal 1 enabled or disabled" "Enabled,Disabled"
|
|
bitfld.long 0x04 0. " DMACSync0 ,DMA synchronization logic for DMA request signal 0 enabled or disabled" "Enabled,Disabled"
|
|
tree.end
|
|
width 0x15
|
|
tree "Channel 0 Registers"
|
|
group.long 0x100++0x13
|
|
line.long 0x0 "DMACC0SrcAddr,Channel 0 Source Address Register"
|
|
line.long 0x4 "DMACC0DestAddr,Channel 0 Destination Address Register"
|
|
line.long 0x8 "DMACC0LLI,Channel 0 Linked List Item Register"
|
|
hexmask.long 0x8 2.--31. 4. " LLI ,Linked list item"
|
|
line.long 0xC "DMACC0Control,Channel 0 Control Register"
|
|
bitfld.long 0xC 31. " I ,Terminal count interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.long 0xC 30. " ProtCONC ,Cacheable or not cacheable" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0xC 29. " ProtBONB ,Bufferable or not bufferable" "Not bufferable,Bufferable"
|
|
bitfld.long 0xC 28. " ProtPOU ,Privileged or User" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0xC 27. " DI ,Destination increment" "Disabled,Enabled"
|
|
bitfld.long 0xC 26. " SI ,Source increment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8 bit,16 bit,32 bit,?..."
|
|
bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0xC 15.--17. " DBsize ,Destination burst size" "1.,4.,8.,16.,32.,64.,128.,256."
|
|
bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1.,4.,8.,16.,32.,64.,128.,256."
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size"
|
|
line.long 0x10 "DMACC0Configuration,Channel 0 Configuration Register"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
textline " "
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "Memory to memory,Memory to peripheral/DMA,Peripheral to memory/DMA,Source to destination peripheral/DMA,Source to destination peripheral/Destinat.,Memory to peripheral/Peripheral,Peripheral to memory/Peripheral,Source to destination peripheral/Source"
|
|
textline " "
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2365"||cpu()=="LPC2366")
|
|
bitfld.long 0x10 6.--9. " DestPeripheral ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,Reserved,I2S channel 0,I2S channel 1,?..."
|
|
textline " "
|
|
bitfld.long 0x10 1.--4. " SrcPeripheral ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,Reserved,I2S channel 0,I2S channel 1,?..."
|
|
textline " "
|
|
else
|
|
bitfld.long 0x10 6.--9. " DestPeripheral ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,SD/MMC,I2S channel 0,I2S channel 1,?..."
|
|
textline " "
|
|
bitfld.long 0x10 1.--4. " SrcPeripheral ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,SD/MMC,I2S channel 0,I2S channel 1,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 0. " E ,The Channel Enable bit status" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 1 Registers"
|
|
group.long 0x120++0x13
|
|
line.long 0x0 "DMACC1SrcAddr,Channel 1 Source Address Register"
|
|
line.long 0x4 "DMACC1DestAddr,Channel 1 Destination Address Register"
|
|
line.long 0x8 "DMACC1LLI,Channel 1 Linked List Item Register"
|
|
hexmask.long 0x8 2.--31. 4. " LLI ,Linked list item"
|
|
line.long 0xC "DMACC1Control,Channel 1 Control Register"
|
|
bitfld.long 0xC 31. " I ,Terminal count interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.long 0xC 30. " ProtCONC ,Cacheable or not cacheable" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0xC 29. " ProtBONB ,Bufferable or not bufferable" "Not bufferable,Bufferable"
|
|
bitfld.long 0xC 28. " ProtPOU ,Privileged or User" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0xC 27. " DI ,Destination increment" "Disabled,Enabled"
|
|
bitfld.long 0xC 26. " SI ,Source increment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8 bit,16 bit,32 bit,?..."
|
|
bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8 bit,16 bit,32 bit,?..."
|
|
textline " "
|
|
bitfld.long 0xC 15.--17. " DBsize ,Destination burst size" "1.,4.,8.,16.,32.,64.,128.,256."
|
|
bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1.,4.,8.,16.,32.,64.,128.,256."
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size"
|
|
line.long 0x10 "DMACC1Configuration,Channel 1 Configuration Register"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
textline " "
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "Memory to memory,Memory to peripheral/DMA,Peripheral to memory/DMA,Source to destination peripheral/DMA,Source to destination peripheral/Destinat.,Memory to peripheral/Peripheral,Peripheral to memory/Peripheral,Source to destination peripheral/Source"
|
|
textline " "
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||cpu()=="LPC2364"||cpu()=="LPC2365"||cpu()=="LPC2366")
|
|
bitfld.long 0x10 6.--9. " DestPeripheral ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,Reserved,I2S channel 0,I2S channel 1,?..."
|
|
textline " "
|
|
bitfld.long 0x10 1.--4. " SrcPeripheral ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,Reserved,I2S channel 0,I2S channel 1,?..."
|
|
else
|
|
bitfld.long 0x10 6.--9. " DestPeripheral ,Destination peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,SD/MMC,I2S channel 0,I2S channel 1,?..."
|
|
textline " "
|
|
bitfld.long 0x10 1.--4. " SrcPeripheral ,Source peripheral" "SSP0 Tx,SSP0 Rx,SSP1 Tx,SSP1 Rx,SD/MMC,I2S channel 0,I2S channel 1,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,The Channel Enable bit status" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; I2S Input Module (DAI)
|
|
; --------------------------------------------------------------------------------
|
|
tree "I2S Input Module (DAI)"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80200000
|
|
width 9.
|
|
group.long 0x384++0x03 "DAI/DAO Registers"
|
|
line.long 0x00 "SIOCR,Stream I/O Configuration Register"
|
|
bitfld.long 0x00 7. " DAI_OE ,DAI/BCK-WSI operation mode" "Slave/inputs,Master/outputs"
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "I2S_FMT,I2S Format Register"
|
|
bitfld.long 0x00 0.--2. " DAI_FMT ,Type of data captured from DATI pin" "Reserved,Reserved,Reserved,Standard IIS,LSB 16-bit,LSB 18-bit,LSB 20-bit,LSB 24-bit"
|
|
bitfld.long 0x00 6.--8. " DAO_FMT ,Type of output data from DATO pin" "Reserved,Reserved,Reserved,Standard IIS,LSB 16-bit,LSB 18-bit,LSB 20-bit,LSB 24-bit"
|
|
hgroup.long 0x00++0x03 "SAI1 Registers"
|
|
hide.long 0x00 "L16IN1,The Most Significant 16 Bits of the Oldest L Channel Values Register"
|
|
in
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "R16IN1,The Most Significant 16 Bits of the Oldest R Channel Values Register"
|
|
in
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "L24IN1,The Oldest L Channel Value Register"
|
|
in
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "R24IN1,The Oldest R Channel Value Register"
|
|
in
|
|
hgroup.long 0x20++0x03
|
|
hide.long 0x00 "L32IN1,The Most Significant 16 Bits of the Two Oldest L Channel Values Register"
|
|
in
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "R32IN1,The Most Significant 16 Bits of the Two Oldest R Channel Values Register"
|
|
in
|
|
hgroup.long 0x60++0x03
|
|
hide.long 0x00 "LR32IN1,The Most Significant 16 Bits of the Oldest L and R Channel Values Register"
|
|
in
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "SAISTAT1,SAI1 Status Register"
|
|
bitfld.long 0x00 0. " RUNDER ,R FIFO Underrun" "No Underrun,Underrun"
|
|
bitfld.long 0x00 1. " LUNDER ,L FIFO Underrun" "No Underrun,Underrun"
|
|
bitfld.long 0x00 2. " ROVER ,R FIFO Overrun" "No Overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LOVER ,L FIFO Overrun" "No Overrun,Overrun"
|
|
bitfld.long 0x00 4. " LFULL ,L FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 5. " LHALF ,L FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LNOTMT ,L FIFO not empty" "Empty,Not empty"
|
|
bitfld.long 0x00 7. " RFULL ,R FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 8. " RHALF ,R FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RNOTMT ,R FIFO not empty" "Empty,Not empty"
|
|
line.long 0x04 "SAIMASK1,SAI1 Mask Register"
|
|
bitfld.long 0x04 0. " RUNMK ,R Channel Underrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " LUNMK ,L Channel Underrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " ROVMK ,R Channel Overrun Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " LOVMK ,L Channel Overrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " LFULMK ,L Channel Full Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " LHALFMK ,L Channel Half-full Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LNMTMK ,L Channel Non-empty Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " RFULMK ,R Channel Full Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " RHALFMK ,R Channel Half-full Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 9. " RNMTMK ,R Channel Non-empty Interrupt Request Mask" "Not masked,Masked"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; I2S Output Module (DAO)
|
|
; --------------------------------------------------------------------------------
|
|
tree "I2S Output Module (DAO)"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80200000
|
|
width 9.
|
|
wgroup.long 0x200++0x0F "SAO1 Registers"
|
|
line.long 0x00 "L16OUT1,One 16 Bit Value To L Channel FIFO Write Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " L16OUT2 ,One 16 Bit Value To L Channel"
|
|
line.long 0x04 "R16OUT1,One 16 Bit Value To R Channel FIFO Write Register"
|
|
hexmask.long.word 0x4 0.--15. 1. " R16OUT2 ,One 16 Bit Value To R Channel"
|
|
line.long 0x08 "L24OUT1,One 24 Bit Value To L Channel FIFO Write Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. " L24OUT2 ,One 24 Bit Value To L Channel"
|
|
line.long 0x0C "R24OUT1,One 24 Bit Value To R Channel FIFO Write Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. " R24OUT2 ,One 24 Bit Value To R Channel"
|
|
wgroup.long 0x220++0x03
|
|
line.long 0x00 "L32OUT1,Two 16 Bit Value To L Channel FIFO Write Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " 1L32OUT2 ,First 16 Bit Value To L Channel"
|
|
hexmask.long.word 0x0 16.--31. 1. " 2L32OUT2 ,Second 16 Bit Value To L Channel"
|
|
wgroup.long 0x240++0x03
|
|
line.long 0x00 "R32OUT1,Two 16 Bit Value To L Channel FIFO Write Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " 1R32OUT2 ,First 16 Bit Value To R Channel"
|
|
hexmask.long.word 0x0 16.--31. 1. " 2R32OUT2 ,Second 16 Bit Value To R Channel"
|
|
wgroup.long 0x260++0x03
|
|
line.long 0x00 "LR32OUT1,One 16 Bit Value To L and R Channel FIFO Write Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " L32OUT2 ,16 Bit Value To L Channel"
|
|
hexmask.long.word 0x0 16.--31. 1. " R32OUT2 ,16 Bit Value To R Channel"
|
|
group.long 0x210++0x07
|
|
line.long 0x00 "SAOSTAT1,SAO1 Status Register"
|
|
bitfld.long 0x00 0. " RUNDER ,R FIFO Underrun" "No Underrun,Underrun"
|
|
bitfld.long 0x00 1. " LUNDER ,L FIFO Underrun" "No Underrun,Underrun"
|
|
bitfld.long 0x00 2. " ROVER ,R FIFO Overrun" "No Overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LOVER ,L FIFO Overrun" "No Overrun,Overrun"
|
|
bitfld.long 0x00 4. " LFULL ,L FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 5. " LHALF ,L FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LMT ,L FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RFULL ,R FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 8. " RHALF ,R FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RMT ,R FIFO empty" "Not empty,Empty"
|
|
line.long 0x04 "SAOMASK1,SAO1 Mask Register"
|
|
bitfld.long 0x04 0. " RUNMK ,R Channel Underrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " LUNMK ,L Channel Underrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " ROVMK ,R Channel Overrun Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " LOVMK ,L Channel Overrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " LFULMK ,L Channel Full Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " LHALFMK ,L Channel Half-full Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LMTMK ,L Channel Empty Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " RFULMK ,R Channel Full Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " RHALFMK ,R Channel Half-full Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 9. " RMTMK ,R Channel Empty Interrupt Request Mask" "Not masked,Masked"
|
|
wgroup.long 0x220++0x03
|
|
line.long 0x00 "L32OUT1,Two 16 Bit Value To L Channel FIFO Write Register"
|
|
wgroup.long 0x240++0x03
|
|
line.long 0x00 "R32OUT1,Two 16 Bit Value To L Channel FIFO Write Register"
|
|
wgroup.long 0x260++0x03
|
|
line.long 0x00 "LR32OUT1,One 16 Bit Value To L and R Channel FIFO Write Register"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; I2S
|
|
; --------------------------------------------------------------------------------
|
|
tree "I2S (Inter-IC Sound)"
|
|
sif (cpu()=="LPC2361"||cpu()=="LPC2362"||(cpu()=="LPC2364")||(cpu()=="LPC2366")||(cpu()=="LPC2368")||(cpu()=="LPC2378")||cpu()=="LPC2420"||(cpu()=="LPC2468")||(cpu()=="LPC2365")||(cpu()=="LPC2367")||(cpu()=="LPC2377")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
base sd:0xE0088000
|
|
width 11.
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "I2SDAO,Digital Audio Output Register"
|
|
bitfld.word 0x00 15. " mute ,The transmit channel sends only zeroes" "Not muted,Muted"
|
|
hexmask.word 0x00 6.--14. 1. " ws_halfperiod ,Word select half period minus one"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ws_sel ,Slave mode" "Master,Slave"
|
|
bitfld.word 0x00 4. " reset ,Asynchronously reset the transmit channel and FIFO" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 3. " stop ,Disables accesses on FIFOs/places the transmit channel in mute mode" "Enabled,Disabled"
|
|
bitfld.word 0x00 2. " mono ,Data of monaural format" "Stereo,Monaural"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " wordwidth ,Selects the number of bytes in data" "8 bit,16 bit,Reserved,32 bit"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "I2SDAI,Digital Audio Input Register"
|
|
hexmask.word 0x00 6.--14. 1. " ws_halfperiod ,Word select half period minus one"
|
|
bitfld.word 0x00 5. " ws_sel ,Slave mode" "Master,Slave"
|
|
textline " "
|
|
bitfld.word 0x00 4. " reset ,Asynchronously reset the transmit channel and FIFO" "No reset,Reset"
|
|
bitfld.word 0x00 3. " stop ,Disables accesses on FIFOs/places the transmit channel in mute mode" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " mono ,Data of monaural format" "Stereo,Monaural"
|
|
bitfld.word 0x00 0.--1. " wordwidth ,Selects the number of bytes in data" "8 bit,16 bit,Reserved,32 bit"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "I2STXFIFO,Transmit FIFO Register"
|
|
hgroup.long 0xC++0x3
|
|
hide.long 0x0 "I2SRXFIFO,Receive FIFO Register"
|
|
in
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "I2SSTATE,Status Feedback Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " tx_level ,Current level of the Transmit FIFO"
|
|
hexmask.long.byte 0x00 8.--15. 1. " rx_level ,Current level of the Receive FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 2. " dmareq2 ,Presence of Receive or Transmit DMA Request 2" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " dmareq1 ,Presence of Receive or Transmit DMA Request 1" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " irq ,Presence of Receive Interrupt or Transmit Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "I2SDMA1,DMA Configuration Register 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " tx_depth_dma1 ,Set the FIFO level that triggers a transmit DMA request on DMA1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " rx_depth_dma1 ,Set the FIFO level that triggers a receive DMA request on DMA1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " tx_dma1_enable ,Enables DMA1 for I2S transmit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " rx_dma1_enable ,Enables DMA1 for I2S receive" "Disabled,Enabled"
|
|
line.long 0x4 "I2SDMA2,DMA Configuration Register 2"
|
|
hexmask.long.byte 0x04 16.--23. 1. " tx_depth_dma2 ,Set the FIFO level that triggers a transmit DMA request on DMA2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " rx_depth_dma2 ,Set the FIFO level that triggers a receive DMA request on DMA2"
|
|
textline " "
|
|
bitfld.long 0x04 1. " tx_dma2_enable ,Enables DMA1 for I2S transmit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " rx_dma2_enable ,Enables DMA1 for I2S receive" "Disabled,Enabled"
|
|
line.long 0x8 "I2SIRQ,Interrupt Request Control Register"
|
|
hexmask.long.byte 0x08 16.--23. 1. " tx_depth_Irq ,Set the FIFO level on which to create an irq request"
|
|
hexmask.long.byte 0x08 8.--15. 1. " rx_depth_Irq ,Set the FIFO level on which to create an irq request"
|
|
textline " "
|
|
bitfld.long 0x08 1. " tx_Irq_enable ,Enables I2S transmit interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " rx_Irq_enable ,Enables I2S receive interrupt" "Disabled,Enabled"
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "I2STXRATE,Transmit bit (Clock) rate divider Register"
|
|
hexmask.word 0x0 0.--9. 1. " tx_rate ,I2S transmit bit rate"
|
|
group.word 0x24++0x1
|
|
line.word 0x0 "I2SRXRATE,Receive bit (Clock) rate divider Register"
|
|
hexmask.word 0x0 0.--9. 1. " rx_rate ,I2S receive bit rate"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; Dual ADC
|
|
; --------------------------------------------------------------------------------
|
|
tree "Dual Analog to Digital Converter"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80200000
|
|
width 10.
|
|
group.long 0x3A4++0x0B
|
|
line.long 0x00 "DAINCTRL,Dual Analog In Control Register"
|
|
bitfld.long 0x00 0. " RSD_PD ,Right single-to-differential converter power down" "Powered up,Powered down"
|
|
bitfld.long 0x00 1. " LSD_PD ,Left single-to-differential converter power down" "Powered up,Powered down"
|
|
textline " "
|
|
bitfld.long 0x00 3.--6. " RPGA_GAIN ,RPGA Gain" "0 dB,3 dB,6 dB,9 dB,12 dB,15 dB,18 dB,21 dB,24 dB,24 dB,24 dB,24 dB,24 dB,24 dB,24 dB,24 dB"
|
|
bitfld.long 0x00 7. " RPGA_PD ,RPGA Power Down" "Powered up,Powered down"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " LPGA_GAIN ,LPGA Gain" "0 dB,3 dB,6 dB,9 dB,12 dB,15 dB,18 dB,21 dB,24 dB,24 dB,24 dB,24 dB,24 dB,24 dB,24 dB,24 dB"
|
|
bitfld.long 0x00 12. " LPGA_PD ,LPGA Power Down" "Powered up,Powered down"
|
|
line.long 0x04 "DADCCTRL,Dual ADC Control Register"
|
|
bitfld.long 0x04 1. " RDITHER ,Dither to the RADC apply" "Not applied,Applied"
|
|
bitfld.long 0x04 3. " RPD ,RADC Power Down" "Powered up,Powered down"
|
|
textline " "
|
|
bitfld.long 0x04 5. " LDITHER ,Dither to the LADC apply" "Not applied,Applied"
|
|
bitfld.long 0x04 7. " LPD ,LADC Power Down" "Powered up,Powered down"
|
|
line.long 0x08 "DECCTRL,Decimator Control Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RGAIN ,R Channel Gain"
|
|
hexmask.long.byte 0x08 8.--15. 1. " LGAIN ,L Channel Gain"
|
|
textline " "
|
|
bitfld.long 0x08 17. " DADC_INV ,Polarity of the Signals to Both Channels Inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x08 18. " DADC_MUTE ,Both Channels Mute" "Not muted,Muted"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ENODCBF ,Output Blocking DC Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " ENIDCBF ,Input Blocking DC Filter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " ENTIMER ,Timer After Reset Enable" "Disabled,Enabled"
|
|
rgroup.long 0x3B0++0x03
|
|
line.long 0x00 "DECSTAT,Decimator status register"
|
|
bitfld.long 0x00 0. " MUTED ,DADC Channels Mute" "Not muted,Muted"
|
|
bitfld.long 0x00 1. " OVFLO ,One Channel Overflow" "No overflow,Overflow"
|
|
hgroup.long 0x180++0x03 "SAI4 Registers"
|
|
hide.long 0x00 "L16IN4,The Most Significant 16 Bits of the Oldest L Channel Value Register"
|
|
in
|
|
hgroup.long 0x184++0x03
|
|
hide.long 0x00 "R16IN4,The Most Significant 16 Bits of the Oldest R Channel Value Register"
|
|
in
|
|
hgroup.long 0x188++0x03
|
|
hide.long 0x00 "L24IN4,The Oldest L Channel Value Register"
|
|
in
|
|
hgroup.long 0x18C++0x03
|
|
hide.long 0x00 "R24IN4,The Oldest R Channel Value Register"
|
|
in
|
|
hgroup.long 0x1A0++0x03
|
|
hide.long 0x00 "L32IN4,The Most Significant 16 Bits of the Two Oldest L Channel Values Register"
|
|
in
|
|
hgroup.long 0x1C0++0x03
|
|
hide.long 0x00 "R32IN4,The Most Significant 16 Bits of the Two Oldest R Channel Values Register"
|
|
in
|
|
hgroup.long 0x1E0++0x03
|
|
hide.long 0x00 "LR32IN4,The Most Significant 16 Bits of the Oldest L and R Channel Values Register"
|
|
in
|
|
group.long 0x190++0x07
|
|
line.long 0x00 "SAISTAT4,SAI4 Status Register"
|
|
bitfld.long 0x00 0. " RUNDER ,R FIFO Underrun" "No Underrun,Underrun"
|
|
bitfld.long 0x00 1. " LUNDER ,L FIFO Underrun" "No Underrun,Underrun"
|
|
bitfld.long 0x00 2. " ROVER ,R FIFO Overrun" "No Overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LOVER ,L FIFO Overrun" "No Overrun,Overrun"
|
|
bitfld.long 0x00 4. " LFULL ,L FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 5. " LHALF ,L FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LNOTMT ,L FIFO not empty" "Empty,Not empty"
|
|
bitfld.long 0x00 7. " RFULL ,R FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 8. " RHALF ,R FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RNOTMT ,R FIFO not empty" "Empty,Not empty"
|
|
line.long 0x04 "SAIMASK4,SAI4 Mask Register"
|
|
bitfld.long 0x04 0. " RUNMK ,R Channel Underrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " LUNMK ,L Channel Underrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " ROVMK ,R Channel Overrun Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " LOVMK ,L Channel Overrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " LFULMK ,L Channel Full Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " LHALFMK ,L Channel Half-full Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LNMTMK ,L Channel Non-empty Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " RFULMK ,R Channel Full Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " RHALFMK ,R Channel Half-full Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 9. " RNMTMK ,R Channel Non-empty Interrupt Request Mask" "Not masked,Masked"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; Dual DAC
|
|
; --------------------------------------------------------------------------------
|
|
tree "Dual Digital to Analog Converter"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80200000
|
|
width 10.
|
|
group.long 0x398++0x03
|
|
line.long 0x00 "DDACCTRL,Dual DAC Control Register"
|
|
hexmask.long 0x00 0.--7. 1. " RGAIN ,R Channel Negative Gain"
|
|
hexmask.long 0x00 8.--15. 1. " LGAIN ,L Channel Negative Gain"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " DEEMPH ,Digital De-emphasis Control" "Disabled,32 kHz,44.1 kHz,48 kHz,96 kHz,Disabled,Disabled,Disabled"
|
|
bitfld.long 0x00 19. " SMUTE ,Slow Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MODE2FS ,FS Mode" "1 fs,2 fs,?..."
|
|
bitfld.long 0x00 22.--23. " ROLLOFF ,Rolloff" "Sharp,Slow,Sharp,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PSLOW ,Dual DAC Power Change Time" "512 fs,1024 fs"
|
|
bitfld.long 0x00 25. " DDAC_PD ,Interpolator Power Down" "Powered up,Powered down"
|
|
textline " "
|
|
bitfld.long 0x00 26. " DDAC_INV ,Left and Righr Channel Signal Polarity Inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27.--28. " SILDET_T ,Number of Consecutive All-zero Input Values for Silence Detection" "3200,4800,9600,19200"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ENSILDET ,Silence-detection Circuit Enable" "Disabled,Enabled"
|
|
rgroup.long 0x39C++0x03
|
|
line.long 0x00 "DDACSTAT,Dual DAC Status Register"
|
|
bitfld.long 0x00 0. " MUTED ,DDAC Channels Mute" "Not muted,Muted"
|
|
bitfld.long 0x00 1. " PDOWN ,DDAC Channels Power Down" "Powered up,Powered down"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RSILENT ,R Channel Silent" "No silence,Silence"
|
|
bitfld.long 0x00 3. " LSILENT ,L Channel Silent" "No silence,Silence"
|
|
group.long 0x3A0++0x03
|
|
line.long 0x00 "DDACSET,Dual DAC Settings Register"
|
|
bitfld.long 0x00 8. " RDYNPON ,Right DAC Power Apply" "Not applied,Applied"
|
|
bitfld.long 0x00 9. " LDYNPON ,Left DAC Power Apply" "Not applied,Applied"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LBI_DWA ,Data Weighting Algorithm Mode for Left Channel" "Unidirectional,Bidirectional"
|
|
bitfld.long 0x00 11. " RBI_DWA ,Data Weighting Algorithm Mode for Right Channel" "Unidirectional,Bidirectional"
|
|
textline " "
|
|
bitfld.long 0x00 12. " W1 ,User Software Must Always Write a 1 to This Bit" "0,1"
|
|
wgroup.long 0x280++0x0F "SAO2 Registers"
|
|
line.long 0x00 "L16OUT2,One 16 Bit Value To L Channel FIFO Write Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " L16OUT2 ,One 16 Bit Value To L Channel"
|
|
line.long 0x04 "R16OUT2,One 16 Bit Value To R Channel FIFO Write Register"
|
|
hexmask.long.word 0x4 0.--15. 1. " R16OUT2 ,One 16 Bit Value To R Channel"
|
|
line.long 0x08 "L24OUT2,One 24 Bit Value To L Channel FIFO Write Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. " L24OUT2 ,One 24 Bit Value To L Channel"
|
|
line.long 0x0C "R24OUT2,One 24 Bit Value To R Channel FIFO Write Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. " R24OUT2 ,One 24 Bit Value To R Channel"
|
|
wgroup.long 0x2A0++0x03
|
|
line.long 0x00 "L32OUT2,Two 16 Bit Value To L Channel FIFO Write Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " 1L32OUT2 ,First 16 Bit Value To L Channel"
|
|
hexmask.long.word 0x0 16.--31. 1. " 2L32OUT2 ,Second 16 Bit Value To L Channel"
|
|
wgroup.long 0x2C0++0x03
|
|
line.long 0x00 "R32OUT2,Two 16 Bit Value To L Channel FIFO Write Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " 1R32OUT2 ,First 16 Bit Value To R Channel"
|
|
hexmask.long.word 0x0 16.--31. 1. " 2R32OUT2 ,Second 16 Bit Value To R Channel"
|
|
wgroup.long 0x2E0++0x03
|
|
line.long 0x00 "LR32OUT2,One 16 Bit Value To L and R Channel FIFO Write Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " L32OUT2 ,16 Bit Value To L Channel"
|
|
hexmask.long.word 0x0 16.--31. 1. " R32OUT2 ,16 Bit Value To R Channel"
|
|
group.long 0x290++0x07
|
|
line.long 0x00 "SAOSTAT2,SAO2 Status Register"
|
|
bitfld.long 0x00 0. " RUNDER ,R FIFO Underrun" "No Underrun,Underrun"
|
|
bitfld.long 0x00 1. " LUNDER ,L FIFO Underrun" "No Underrun,Underrun"
|
|
bitfld.long 0x00 2. " ROVER ,R FIFO Overrun" "No Overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LOVER ,L FIFO Overrun" "No Overrun,Overrun"
|
|
bitfld.long 0x00 4. " LFULL ,L FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 5. " LHALF ,L FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LMT ,L FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 7. " RFULL ,R FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 8. " RHALF ,R FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RMT ,R FIFO empty" "Not empty,Empty"
|
|
line.long 0x04 "SAOMASK2,SAO2 Mask Register"
|
|
bitfld.long 0x04 0. " RUNMK ,R Channel Underrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " LUNMK ,L Channel Underrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " ROVMK ,R Channel Overrun Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " LOVMK ,L Channel Overrun Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " LFULMK ,L Channel Full Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " LHALFMK ,L Channel Half-full Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LMTMK ,L Channel Empty Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " RFULMK ,R Channel Full Interrupt Request Mask" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " RHALFMK ,R Channel Half-full Interrupt Request Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 9. " RMTMK ,R Channel Empty Interrupt Request Mask" "Not masked,Masked"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; SD/MCI
|
|
; --------------------------------------------------------------------------------
|
|
tree "SD/MCI Card Interface"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80100000
|
|
width 16.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "MCIPower,Power Control register"
|
|
bitfld.long 0x00 0.--1. " Ctrl ,Power Control" "Power off,Reserved,Power up,Power on"
|
|
bitfld.long 0x00 6. " OpenDrn ,Open Drain - MCICMD output control" "0,1"
|
|
line.long 0x04 "MCIClock,Clock Control register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ClkDiv ,MCI bus clock period"
|
|
bitfld.long 0x04 8. " ClkEnab ,MCI bus clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " PwrSave ,Power Save" "Not saved,Saved"
|
|
textline " "
|
|
bitfld.long 0x04 10. " Bypass ,Division bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x04 11. " WideBus ,Card type select" "MCI cards,SD cards"
|
|
line.long 0x08 "MCIArgument,Argument register"
|
|
line.long 0x0C "MCICommand,Command register"
|
|
hexmask.long.byte 0x0C 0.--5. 1. " CmdIndex ,Command index"
|
|
bitfld.long 0x0C 6. " Response ,CPSM wait for response" "No wait,Wait"
|
|
bitfld.long 0x0C 7. " LongRsp ,CPSM receive a 136 bit long response" "Short,Long"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " Interrupt ,CPSM wait for interrupt request from card" "No wait,Wait"
|
|
bitfld.long 0x0C 9. " W8PEND ,CPSM wait for CmdPend" "No wait,Wait"
|
|
bitfld.long 0x0C 10. " CPSM_EN ,CPSM enable" "Disabled,Enabled"
|
|
if (((d.l(sd:0x8010000C))&0x80)==0x80)
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x00 "MCIRespCommand,Command Response register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RespCmd ,Response command index"
|
|
line.long 0x04 "MCIResponse0,Response register 0"
|
|
line.long 0x08 "MCIResponse1,Response register 1"
|
|
line.long 0x0C "MCIResponse2,Response register 2"
|
|
line.long 0x10 "MCIResponse3,Response register 3"
|
|
else
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x00 "MCIRespCommand,Command Response register"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RespCmd ,Response command index"
|
|
line.long 0x04 "MCIResponse0,Response register 0"
|
|
hgroup.long 0x18++0xB
|
|
hide.long 0x0 "MCIResponse1,Response register 1"
|
|
in
|
|
hide.long 0x4 "MCIResponse2,Response register 2"
|
|
in
|
|
hide.long 0x8 "MCIResponse3,Response register 3"
|
|
in
|
|
endif
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "MCIDataTimer,Data Timer register"
|
|
line.long 0x04 "MCIDataLength,Data Length register"
|
|
hexmask.long.word 0x04 0.--15. 1. " DataLength ,Data length value"
|
|
line.long 0x08 "MCIDataCtrl,Data Control register"
|
|
bitfld.long 0x08 0. " XferEnab ,Data transfer enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " Direction ,Transfer direction" "Controller to card,Card to controller"
|
|
textline " "
|
|
bitfld.long 0x08 2. " StreamMode ,Transfer mode" "Block,Stream"
|
|
bitfld.long 0x08 3. " DMAEnable ,Data transfer select" "Programmed I/O,SDMA"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " BlockSize ,Data block length" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,?..."
|
|
rgroup.long 0x30++0x07
|
|
line.long 0x00 "MCIDataCnt,Data Counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RemDat ,Remaining data"
|
|
line.long 0x04 "MCIStatus,Status register"
|
|
bitfld.long 0x04 0. " CmdCrcFail ,CRC check failed for command response received" "Not failed,Failed"
|
|
bitfld.long 0x04 1. " DataCrcFail ,CRC check failed for data block sent/received" "Not failed,Failed"
|
|
textline " "
|
|
bitfld.long 0x04 2. " CmdTimeOut ,Command response timeout" "No timeout,Timeout"
|
|
bitfld.long 0x04 3. " DataTimeOut ,Data timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TxUnderrun ,Transmit FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x04 5. " RxOverrun ,Receive FIFO overrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 6. " CmdRespEnd ,CRC check passed for command response received" "Not passed,Passed"
|
|
bitfld.long 0x04 7. " CmdSent ,Command sent" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x04 8. " DataEnd ,Data end" "No end,End"
|
|
bitfld.long 0x04 9. " StartBitErr ,Start bit error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 10. " DataBlockEnd ,CRC check passed for data block sent/received" "Not passed,Passed"
|
|
bitfld.long 0x04 11. " CmdActive ,Command transfer in progress" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 12. " TxActive ,Data transmit in progress" "Not active,Active"
|
|
bitfld.long 0x04 13. " RxActive ,Data receive in progress" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 14. " TxFifoHalfEmpty ,Transmit FIFO half empty" "Not half-empty,Half-empty"
|
|
bitfld.long 0x04 15. " RxFifoHalfFull ,Receive FIFO half full" "Not half-full,Half-full"
|
|
textline " "
|
|
bitfld.long 0x04 16. " TxFifoFull ,Transmit FIFO full" "Not full,Full"
|
|
bitfld.long 0x04 17. " RxFifoFull ,Receive FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x04 18. " TxFifoEmpty ,Transmit FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x04 19. " RxDataAvlbl ,Data available in receive FIFO" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x04 20. " TxDataAvlbl ,Data available in transmit FIFO" "Not available,Available"
|
|
bitfld.long 0x04 21. " RxFifoEmpty ,Receive FIFO empty" "Not empty,Empty"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "MCIClear,Clear register"
|
|
bitfld.long 0x00 0. " CmdCrcFailClr ,CmdCrcFail flag clear" "Not Cleared,Cleared"
|
|
bitfld.long 0x00 1. " DataCrcFailClr ,Clears DataCrcFail flag clear" "Not Cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CmdTimeOutClr ,Clears CmdTimeOut flag clear" "Not Cleared,Cleared"
|
|
bitfld.long 0x00 3. " DataTimeOutClr ,Clears DataTimeOut flag clear" "Not Cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TxUnderrunClr ,Clears TxUnderrun flag clear" "Not Cleared,Cleared"
|
|
bitfld.long 0x00 5. " RxOverrunClr ,Clears RxOverrun flag clear" "Not Cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CmdRespEndClr ,Clears CmdRespEnd flag clear" "Not Cleared,Cleared"
|
|
bitfld.long 0x00 7. " CmdSentClr ,Clears CmdSent flag clear" "Not Cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DataEndClr ,Clears DataEnd flag clear" "Not Cleared,Cleared"
|
|
bitfld.long 0x00 9. " StartBitErrClr ,Clears StartBitErr flag clear" "Not Cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DataBlockEndClr ,Clears DataBlockEnd flag clear" "Not Cleared,Cleared"
|
|
group.long 0x3C++0x07
|
|
line.long 0x00 "MCIMask0,Interrupt Mask register 0"
|
|
bitfld.long 0x00 0. " Mask0 ,CmdCrcFail flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " Mask1 ,DataCrcFail flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " Mask2 ,CmdTimeOut flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Mask3 ,Mask DataTimeOut flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " Mask4 ,Mask TxUnderrun flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " Mask5 ,RxOverrun flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " Mask6 ,CmdRespEnd flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " Mask7 ,CmdSent flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " Mask8 ,DataEnd flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " Mask9 ,StartBitErr flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " Mask10 ,DataBlockEnd flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " Mask11 ,CmdActive flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " Mask12 ,TxActive flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " Mask13 ,RxActive flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " Mask14 ,TxFifoHalfEmpty flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " Mask15 ,RxFifoHalfFull flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " Mask16 ,TxFifoFull flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " Mask17 ,RxFifoFull flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " Mask18 ,TxFifoEmpty flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " Mask19 ,RxFifoEmpty flag mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " Mask20 ,TxDataAvlbl flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " Mask21 ,RxDataAvlbl flag mask" "Not masked,Masked"
|
|
line.long 0x04 "MCIMask1,Interrupt Mask register 1"
|
|
bitfld.long 0x04 0. " Mask0 ,CmdCrcFail flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " Mask1 ,DataCrcFail flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " Mask2 ,CmdTimeOut flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " Mask3 ,Mask DataTimeOut flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " Mask4 ,Mask TxUnderrun flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " Mask5 ,RxOverrun flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 6. " Mask6 ,CmdRespEnd flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " Mask7 ,CmdSent flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " Mask8 ,DataEnd flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 9. " Mask9 ,StartBitErr flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " Mask10 ,DataBlockEnd flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " Mask11 ,CmdActive flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " Mask12 ,TxActive flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " Mask13 ,RxActive flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " Mask14 ,TxFifoHalfEmpty flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " Mask15 ,RxFifoHalfFull flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 16. " Mask16 ,TxFifoFull flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " Mask17 ,RxFifoFull flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 18. " Mask18 ,TxFifoEmpty flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " Mask19 ,RxFifoEmpty flag mask" "Not masked,Masked"
|
|
bitfld.long 0x04 20. " Mask20 ,TxDataAvlbl flag mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 21. " Mask21 ,RxDataAvlbl flag mask" "Not masked,Masked"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MCIFifoCnt,FIFO Counter register"
|
|
hexmask.long.word 0x00 0.--14. 1. " RemDat ,Remaining data"
|
|
hgroup.long 0x80++0x3F
|
|
hide.long 0x0 "MCIFIF0,Data FIFO Register 0x0"
|
|
in
|
|
hide.long 0x4 "MCIFIF1,Data FIFO Register 0x4"
|
|
in
|
|
hide.long 0x8 "MCIFIF2,Data FIFO Register 0x8"
|
|
in
|
|
hide.long 0xC "MCIFIF3,Data FIFO Register 0xC"
|
|
in
|
|
hide.long 0x10 "MCIFIF4,Data FIFO Register 0x10"
|
|
in
|
|
hide.long 0x14 "MCIFIF5,Data FIFO Register 0x14"
|
|
in
|
|
hide.long 0x18 "MCIFIF6,Data FIFO Register 0x18"
|
|
in
|
|
hide.long 0x1C "MCIFIF7,Data FIFO Register 0x1C"
|
|
in
|
|
hide.long 0x20 "MCIFIF8,Data FIFO Register 0x20"
|
|
in
|
|
hide.long 0x24 "MCIFIF9,Data FIFO Register 0x24"
|
|
in
|
|
hide.long 0x28 "MCIFIF10,Data FIFO Register 0x28"
|
|
in
|
|
hide.long 0x2C "MCIFIF11,Data FIFO Register 0x2C"
|
|
in
|
|
hide.long 0x30 "MCIFIF12,Data FIFO Register 0x30"
|
|
in
|
|
hide.long 0x34 "MCIFIF13,Data FIFO Register 0x34"
|
|
in
|
|
hide.long 0x38 "MCIFIF14,Data FIFO Register 0x38"
|
|
in
|
|
hide.long 0x3C "MCIFIF15,Data FIFO Register 0x3C"
|
|
in
|
|
base 0x8000502C
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCICLKEN,MCI Clock Enable register"
|
|
bitfld.long 0x00 0. " MCICLKEN ,MCI Clock Enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
endif
|
|
sif ((cpu()=="LPC2367")||(cpu()=="LPC2368")||(cpu()=="LPC2377")||(cpu()=="LPC2378")||(cpu()=="LPC2420")||(cpu()=="LPC2468")||(cpu()=="LPC2387")||(cpu()=="LPC2388")||(cpu()=="LPC2458")||(cpu()=="LPC2460")||(cpu()=="LPC2470")||(cpu()=="LPC2478"))
|
|
base sd:0xE008C000
|
|
width 0x10
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MCIPower,Power control register"
|
|
bitfld.long 0x0 7. " Rod ,Rod control" "No rod,Rod"
|
|
bitfld.long 0x0 6. " OpenDrain ,MCICMD output control" "No open drain,Open drain"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " Ctrl ,Control" "Power-off,Reserved,Power-up,Power-on"
|
|
line.long 0x4 "MCIClock,Clock control register"
|
|
bitfld.long 0x04 11. " WideBus ,Enable wide bus mode" "Standard,Wide"
|
|
bitfld.long 0x04 10. " Bypass ,Enable bypass of clock divide logic" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " PwrSave ,Disable MCI clock output when bus is idle" "Always enabled,When bus is active"
|
|
bitfld.long 0x04 8. " Enable ,Enable MCI bus clock" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " ClkDiv ,MCI bus clock period"
|
|
line.long 0x8 "MCIArgument,Argument register"
|
|
line.long 0xC "MCICommand,Command register"
|
|
bitfld.long 0x0C 10. " Enable ,CPSM enabled" "Disabled,Enabled"
|
|
bitfld.long 0x0C 9. " Pending ,CPSM waits for CmdPend before it starts sending a command" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " Interrupt ,CPSM disables command timer and waits for interrupt request" "Disabled,Enabled"
|
|
bitfld.long 0x0C 7. " LongRsp ,CPSM receives a 136 bit long response" "Short,Long"
|
|
textline " "
|
|
bitfld.long 0x0C 6. " Response ,CPSM waits for a response" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 0.--5. 1. " CmdIndex ,Command index"
|
|
if (((d.l(sd:0xE008C000+0xC))&0x80)==0x80)
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "MCIRespCommand,Response command register"
|
|
hexmask.long.byte 0x0 0.--5. 1. " RespCmd ,Response command index"
|
|
line.long 0x4 "MCIResponse0,Response register 0"
|
|
line.long 0x8 "MCIResponse1,Response register 1"
|
|
line.long 0xC "MCIResponse2,Response register 2"
|
|
line.long 0x10 "MCIResponse3,Response register 3"
|
|
hexmask.long 0x10 1.--31. 2. " Status[31:1] ,Card status [31:1]"
|
|
else
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "MCIRespCommand,Response command register"
|
|
hexmask.long.byte 0x0 0.--5. 1. " RespCmd ,Response command index"
|
|
line.long 0x4 "MCIResponse0,Response register 0"
|
|
hgroup.long 0x18++0xb
|
|
hide.long 0x0 "MCIResponse1,Response register 1"
|
|
hide.long 0x4 "MCIResponse2,Response register 2"
|
|
hide.long 0x8 "MCIResponse3,Response register 3"
|
|
endif
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "MCIDataTimer,Data Timer Register"
|
|
line.long 0x4 "MCIDataLength,Data Length Register"
|
|
hexmask.long.word 0x4 0.--15. 1. " DataLength ,Data length value"
|
|
if ((d.l(sd:0xE008C000+0x2c)&0x4)==0x0)
|
|
group.long 0x2c++0x3
|
|
line.long 0x0 "MCIDataCtrl,Data control register"
|
|
bitfld.long 0x00 4.--7. " BlockSize ,Data block length" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,?..."
|
|
bitfld.long 0x00 3. " DMAEnable ,Enable DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Mode ,Data transfer mode" "Block,Stream"
|
|
bitfld.long 0x00 1. " Direction ,Data transfer direction" "Controller to card,Card to controller"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Enable ,Data transfer enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x2c++0x3
|
|
line.long 0x0 "MCIDataCtrl,Data control register"
|
|
bitfld.long 0x00 3. " DMAEnable ,Enable DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Mode ,Data transfer mode" "Block,Stream"
|
|
bitfld.long 0x00 1. " Direction ,Data transfer direction" "Controller to card,Card to controller"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Enable ,Data transfer enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "MCIDataCnt,Data counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " DataCount ,Remaining data"
|
|
line.long 0x4 "MCIStatus,Status register"
|
|
bitfld.long 0x04 21. " RxDataAvlbl ,Data available in receive FIFO" "Not available,Available"
|
|
bitfld.long 0x04 20. " TxDataAvlbl ,Data available in transmit FIFO" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RxFifoEmpty ,Receive FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x04 18. " TxFifoEmpty ,Transmit FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 17. " RxFifoFull ,Receive FIFO full" "Not full,Full"
|
|
bitfld.long 0x04 16. " TxFifoFull ,Transmit FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x04 15. " RxFifoHalfFull ,Receive FIFO half full" "Not half full,Half full"
|
|
bitfld.long 0x04 14. " TxFifoHalfEmpty ,Transmit FIFO half empty" "Not half empty,Half Empty"
|
|
textline " "
|
|
bitfld.long 0x04 13. " RxActive ,Data receive in progress" "Not active,Active"
|
|
bitfld.long 0x04 12. " TxActive ,Data transmit in progress" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 11. " CmdActive ,Command transfer in progress" "Not active,Active"
|
|
bitfld.long 0x04 10. " DataBlockEnd ,Data block sent/received (CRC check passed)" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x04 9. " StartBitErr ,Start bit not detected on all data signals in wide bus mode" "No error,Error"
|
|
bitfld.long 0x04 8. " DataEnd ,Data end (data counter is zero)" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CmdSent ,Command sent (no response required)" "Not sent,Sent"
|
|
bitfld.long 0x04 6. " CmdRespEnd ,Command response received (CRC check passed)" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RxOverrun ,Receive FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x04 4. " TxUnderrun ,Transmit FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DataTimeOut ,Data timeout" "No timeout,Timeout"
|
|
bitfld.long 0x04 2. " CmdTimeOut ,Command response timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DataCrcFail ,Data block sent/received (CRC check failed)" "Not failed,Failed"
|
|
bitfld.long 0x04 0. " CmdCrcFail ,Command response received (CRC check failed)" "Not failed,Failed"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x0 "MCIClear,Clear register"
|
|
bitfld.long 0x00 10. " DataBlockEndClr ,Clears DataBlockEnd flag" "Not cleared,Cleared"
|
|
bitfld.long 0x00 9. " StartBitErrClr ,Clears StartBitErr flag" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DataEndClr ,Clears DataEnd flag" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CmdSentClr ,Clears CmdSent flag" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CmdRespEndClr ,Clears CmdRespEnd flag" "Not cleared,Cleared"
|
|
bitfld.long 0x00 5. " RxOverrunClr ,Clears RxOverrun flag" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TxUnderrunClr ,Clears TxUnderrun flag" "Not cleared,Cleared"
|
|
bitfld.long 0x00 3. " DataTimeOutClr ,Clears DataTimeOut flag" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CmdTimeOutClr ,Clears CmdTimeOut flag" "Not cleared,Cleared"
|
|
bitfld.long 0x00 1. " DataCrcFailClr ,Clears DataCrcFail flag" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CmdCrcFailClr ,Clears CmdCrcFail flag" "Not cleared,Cleared"
|
|
width 0xA
|
|
tree "Interrupt mask registers"
|
|
textline ""
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "MCIMask0,Interrupt 0 mask register"
|
|
bitfld.long 0x00 21. " RxDataAvlbl ,Mask RxDataAvlbl flag" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " TxDataAvlbl ,Mask TxDataAvlbl flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RxFifoEmpty ,Mask RxFifoEmpty flag" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TxFifoEmpty ,Mask TxFifoEmpty flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RxFifoFull ,Mask RxFifoFull flag" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " TxFifoFull ,Mask TxFifoFull flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RxFifoHalfFull ,Mask RxFifoHalfFull flag" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " TxFifoHalfEmpty ,Mask TxFifoHalfEmpty flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RxActive ,Mask RxActive flag" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " TxActive ,Mask TxActive flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CmdActive ,Mask CmdActive flag" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " DataBlockEnd ,Mask DataBlockEnd flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " StartBitErr ,Mask StartBitErr flag" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " DataEnd ,Mask DataEnd flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CmdSent ,Mask CmdSent flag" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " CmdRespEnd ,Mask CmdRespEnd flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RxOverrun ,Mask RxOverrun flag" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " TxUnderrun ,Mask TxUnderrun flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DataTimeOut ,Mask DataTimeOut flag" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " CmdTimeOut ,Mask CmdTimeOut flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DataCrcFail ,Mask DataCrcFail flag" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " CmdCrcFail ,Mask CmdCrcFail flag" "Not masked,Masked"
|
|
tree.end
|
|
width 0xC
|
|
textline " "
|
|
tree "Data FIFO Registers"
|
|
hgroup.long 0x80++0x3
|
|
hide.long 0x0 "MCIFIFO0,Data FIFO Register 0"
|
|
in
|
|
hgroup.long 0x84++0x3
|
|
hide.long 0x0 "MCIFIFO1,Data FIFO Register 1"
|
|
in
|
|
hgroup.long 0x88++0x3
|
|
hide.long 0x0 "MCIFIFO2,Data FIFO Register 2"
|
|
in
|
|
hgroup.long 0x8C++0x3
|
|
hide.long 0x0 "MCIFIFO3,Data FIFO Register 3"
|
|
in
|
|
hgroup.long 0x90++0x3
|
|
hide.long 0x0 "MCIFIFO4,Data FIFO Register 4"
|
|
in
|
|
hgroup.long 0x94++0x3
|
|
hide.long 0x0 "MCIFIFO5,Data FIFO Register 5"
|
|
in
|
|
hgroup.long 0x98++0x3
|
|
hide.long 0x0 "MCIFIFO6,Data FIFO Register 6"
|
|
in
|
|
hgroup.long 0x9C++0x3
|
|
hide.long 0x0 "MCIFIFO7,Data FIFO Register 7"
|
|
in
|
|
hgroup.long 0xA0++0x3
|
|
hide.long 0x0 "MCIFIFO8,Data FIFO Register 8"
|
|
in
|
|
hgroup.long 0xA4++0x3
|
|
hide.long 0x0 "MCIFIFO9,Data FIFO Register 9"
|
|
in
|
|
hgroup.long 0xA8++0x3
|
|
hide.long 0x0 "MCIFIFO10,Data FIFO Register 10"
|
|
in
|
|
hgroup.long 0xAC++0x3
|
|
hide.long 0x0 "MCIFIFO11,Data FIFO Register 11"
|
|
in
|
|
hgroup.long 0xB0++0x3
|
|
hide.long 0x0 "MCIFIFO12,Data FIFO Register 12"
|
|
in
|
|
hgroup.long 0xB4++0x3
|
|
hide.long 0x0 "MCIFIFO13,Data FIFO Register 13"
|
|
in
|
|
hgroup.long 0xB8++0x3
|
|
hide.long 0x0 "MCIFIFO14,Data FIFO Register 14"
|
|
in
|
|
hgroup.long 0xBC++0x3
|
|
hide.long 0x0 "MCIFIFO15,Data FIFO Register 15"
|
|
in
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x0 "MCIFifoCnt,FIFO Counter Register"
|
|
hexmask.long.word 0x0 0.--14. 1. " DataCount ,Remaining data"
|
|
tree.end
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; LCD
|
|
; --------------------------------------------------------------------------------
|
|
tree "LCD Interface"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80103000
|
|
width 10.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "LCDCTRL,Control Register"
|
|
bitfld.long 0x00 1. " LCDPS ,LCD parallel or serial mode" "Parallel,Serial"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LCDMI ,Parallel mode" "8080,6800"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCDW84 ,Width for parallel mode" "8 bit,4 bit"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " SCLKSEL ,Serial clock timing control" "Rising edge at start/falling at 50%,Rising egde at 25%/falling at 50%,Falling edge at start/rising at 50%,Falling edge at 25%/rising at 75%"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " SSAMPL ,Serial sampling" "At the start of each bit cell,At 25% into each bit cell,Halfway through each bit cell,At 75% into each bit cell"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LCDCBSY ,LCD busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CBSENSE ,State of selected bit the hardware will wait for" "1/high,0/low"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " LCDBSYN ,Signal to check select" "LD0,LD1,LD2,LD3,LD4,LD5,LD6,LD7"
|
|
textline " "
|
|
bitfld.long 0x00 13. " LRSSEL ,State which select the status register" "LSR low,LSR high"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CSPOLAR ,LCS polarisation" "High-active,Low-active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ERPOLAR ,LER output inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MSFIRST ,Most significant bits first" "Disabled,Enabled"
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "LCDSTAT,Status Register"
|
|
bitfld.long 0x00 0. " LCDFIFOMT ,Output FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " LCDFIFOH ,Output FIFO contains less than 8 bytes" "=> 8 bytes,< 8 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LCDOVER ,LCD overrun" "No overrun,Overrun"
|
|
bitfld.long 0x00 3. " LCDREAD ,Read operation complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LCDBUSY ,LCD busy" "Not busy,Busy"
|
|
bitfld.long 0x00 5.--9. " FIFOLEV ,Number of bytes currently in the output FIFO" "Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes"
|
|
line.long 0x04 "LCDISTAT,Raw Interrupt Status Register"
|
|
bitfld.long 0x04 0. " LCDFIFOMT ,Output FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x04 1. " LCDFIFOH ,Output FIFO contains less than 8 bytes" "=> 8 bytes,< 8 bytes"
|
|
textline " "
|
|
bitfld.long 0x04 2. " LCDOVER ,LCD overrun" "No overrun,Overrun"
|
|
bitfld.long 0x04 3. " LCDREAD ,Read operation complete" "Not completed,Completed"
|
|
group.long 0x010++0x03
|
|
line.long 0x00 "LCDIMASK,Interrupt Mask Register"
|
|
bitfld.long 0x00 0. " LCDFIFOMT ,Output FIFO empty interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " LCDFIFOH ,Output FIFO contains less than 8 bytes interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LCDOVER ,LCD overrun interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " LCDREAD ,Read operation complete interrupt mask" "Not masked,Masked"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "LCDICLR,Interrupt Clear Register"
|
|
bitfld.long 0x00 0. " LCDFIFOMT ,LCDFIFOMT bit clear in LCDSTAT register" "Not cleared,Cleared"
|
|
bitfld.long 0x00 1. " LCDFIFOH ,LCDFIFOH bit clear in LCDSTAT register" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LCDOVER ,LCDOVER bit clear in LCDSTAT register" "Not cleared,Cleared"
|
|
bitfld.long 0x00 3. " LCDREAD ,LCDREAD bit clear in LCDSTAT register" "Not cleared,Cleared"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "LCDREAD,Read Command Register"
|
|
bitfld.long 0x00 0. " LCDDATA ,LRS output set" "Instruction state,Data state"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "LCDIBYTE,Instruction Byte Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LCDIBYTE ,Byte placed in the output FIFO as a instruction"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "LCDDBYTE,Data Byte Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LCDDBYTE ,Byte placed in the output FIFO as a data"
|
|
wgroup.long 0x40++0x03
|
|
line.long 0x00 "LCDIWORD,Instruction Word Register"
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "LCDDWORD,Data Word Register"
|
|
width 0x0B
|
|
endif
|
|
sif (cpu()=="LPC2470"||cpu()=="LPC2478")
|
|
width 14.
|
|
base sd:0xe01fc1b8
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LCD_CFG,LCD Configuration Register"
|
|
bitfld.long 0x00 0.--4. " CLKDIV ,LCD panel clock prescaler selection" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
base sd:0xffe10000
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "LCD_TIMH,Horizontal Timing Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " HBP ,Horizontal back porch"
|
|
hexmask.long.byte 0x00 16.--23. 1. " HFP ,Horizontal front porch"
|
|
hexmask.long.byte 0x00 8.--15. 1. " HSW ,Horizontal synchronization pulse width"
|
|
hexmask.long.byte 0x00 2.--7. 1. " PPL ,Pixels-per-line"
|
|
line.long 0x04 "LCD_TIMV,Vertical Timing Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " VBP ,Vertical back porch"
|
|
hexmask.long.byte 0x04 16.--23. 1. " VFP ,Vertical front porch"
|
|
hexmask.long.byte 0x04 10.--15. 1. " VSW ,Vertical synchronization pulse width"
|
|
hexmask.long.word 0x04 0.--9. 1. " LPP ,Lines per panel"
|
|
width 14.
|
|
line.long 0x08 "LCD_POL,Clock and Signal Polarity Register"
|
|
bitfld.long 0x08 27.--31. " PCD_HI ,Upper five bits of panel clock divisor" "Reserved,Single/color,Single/monochrome 4-bit,Reserved,Dual/color,Reserved,Dual/monochrome 4-bit and Single/monochrome 8-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Dual/monochrome 8-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x08 26. " BCD ,Bypass pixel clock divider" "Not bypassed,Bypassed"
|
|
hexmask.long.word 0x08 16.--25. 1. " CPL ,Clocks per line"
|
|
textline " "
|
|
bitfld.long 0x08 14. " IOE ,Invert output enable" "Active High,Active Low"
|
|
bitfld.long 0x08 13. " IPC ,Invert panel clock" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x08 12. " IHS ,Invert horizontal synchronization" "Active High/Inactive Low,Active Low/Inactive High"
|
|
bitfld.long 0x08 11. " IVS ,Invert vertical synchronization" "Active High/Inactive Low,Active Low/Inactive High"
|
|
textline " "
|
|
bitfld.long 0x08 6.--10. " ACB ,AC bias pin frequency" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31."
|
|
bitfld.long 0x08 5. " CLKSEL ,Clock Select" "HCLK,LCDDCLK"
|
|
textline " "
|
|
bitfld.long 0x08 0.--4. " PCD_LO ,Lower five bits of panel clock divisor (panel/mode)" "Reserved,Single/color,Single/monochrome 4-bit,Reserved,Dual/color,Reserved,Dual/monochrome 4-bit and Single/monochrome 8-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Dual/monochrome 8-bit,?..."
|
|
width 14.
|
|
line.long 0x0c "LCD_LE,Line End Control Register"
|
|
bitfld.long 0x0C 16. " LEE ,LCD Line end enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 0.--6. 1. " LED ,Line-end delay"
|
|
line.long 0x10 "LCD_UPBASE,Upper Panel Frame Base Address Register"
|
|
hexmask.long 0x10 3.--31. 0x8 " LCDUPBASE ,LCD upper panel base address"
|
|
line.long 0x14 "LCD_LPBASE,Lower Panel Frame Base Address Register"
|
|
hexmask.long 0x14 3.--31. 0x8 " LCDLPBASE ,LCD lower panel base address"
|
|
if (((data.long(sd:(0xffe10000+0x18)))&0x20)==0x20)
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "LCD_CTRL,LCD Control Register"
|
|
bitfld.long 0x00 16. " WATERMARK ,LCD DMA FIFO watermark level" "4,8"
|
|
bitfld.long 0x00 12.--13. " LcdVComp ,LCD Vertical Compare Interrupt" "Vertical synchronization,Back porch,Active video,Front porch"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LcdPwr ,LCD power enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " BEPO ,Big-Endian Pixel Ordering" "Little endian,Big endian"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BEBO ,Big-endian Byte Order" "Little endian,Big endian"
|
|
bitfld.long 0x00 8. " BGR ,Color format selection" "RGB,BGR"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LcdDual ,Single or Dual LCD panel selection" "Single,Dual"
|
|
bitfld.long 0x00 6. " LcdMono8 ,Monochrome LCD interface width" "4-bit,8-bit"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LcdTFT ,LCD panel TFT type selection" "STN,TFT"
|
|
bitfld.long 0x00 1.--3. " LcdBpp ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp,16 bpp (5:6:5),12 bpp (4:4:4)"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LcdEn ,LCD enable control bit" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "LCD_CTRL,LCD Control Register"
|
|
bitfld.long 0x00 16. " WATERMARK ,LCD DMA FIFO watermark level" "4,8"
|
|
bitfld.long 0x00 12.--13. " LcdVComp ,LCD Vertical Compare Interrupt" "Vertical synchronization,Back porch,Active video,Front porch"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LcdPwr ,LCD power enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " BEPO ,Big-Endian Pixel Ordering" "Little endian,Big endian"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BEBO ,Big-endian Byte Order" "Little endian,Big endian"
|
|
bitfld.long 0x00 8. " BGR ,Color format selection" "RGB,BGR"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LcdDual ,Single or Dual LCD panel selection" "Single,Dual"
|
|
bitfld.long 0x00 6. " LcdMono8 ,Monochrome LCD interface width" "4-bit,8-bit"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LcdTFT ,LCD panel TFT type selection" "STN,TFT"
|
|
bitfld.long 0x00 4. " LcdBW ,STN LCD monochrome/color selection" "Monochrome,Color"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " LcdBpp ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,Reserved,16 bpp (5:6:5),12 bpp (4:4:4)"
|
|
bitfld.long 0x00 0. " LcdEn ,LCD enable control bit" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "LCD_INTMSK,Interrupt Mask Register"
|
|
bitfld.long 0x00 4. " BERIM ,AHB master error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " VCompIM ,Vertical compare interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LNBUIM ,LCD next base address update interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FUFIM ,FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
width 14.
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "LCD_INTRAW,Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " BERRAW ,AHB master bus error raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " VCompRIS ,Vertical compare raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LNBURIS ,LCD next address base update raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " FUFRIS ,FIFO underflow raw interrupt status" "No interrupt,Interrupt"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "LCD_INTSTAT,Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " BERMIS ,AHB master bus error masked interrupt status" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " VCompMIS ,Vertical compare masked interrupt status" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LNBUMIS ,LCD next address base update masked interrupt status" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " FUFMIS ,FIFO underflow masked interrupt status" "Not masked,Masked"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "LCD_INTCLR,Interrupt Clear Register"
|
|
bitfld.long 0x00 4. " BERIC ,AHB master error interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " VCompIC ,Vertical compare interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LNBUIC ,LCD next address base update interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " FUFIC ,FIFO underflow interrupt clear" "No effect,Clear"
|
|
rgroup.long 0x2c++0x7
|
|
line.long 0x00 "LCD_UPCURR,Upper Panel Current Address Register"
|
|
line.long 0x04 "LCD_LPCURR,Lower Panel Current Address Register"
|
|
width 11.
|
|
tree "Color Palette Registers"
|
|
group.long 0x200++0x3
|
|
line.long 0x00 "LCD_PAL0,Color Palette Register 0"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x204++0x3
|
|
line.long 0x00 "LCD_PAL1,Color Palette Register 1"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x208++0x3
|
|
line.long 0x00 "LCD_PAL2,Color Palette Register 2"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x20C++0x3
|
|
line.long 0x00 "LCD_PAL3,Color Palette Register 3"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x210++0x3
|
|
line.long 0x00 "LCD_PAL4,Color Palette Register 4"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x214++0x3
|
|
line.long 0x00 "LCD_PAL5,Color Palette Register 5"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x218++0x3
|
|
line.long 0x00 "LCD_PAL6,Color Palette Register 6"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x21C++0x3
|
|
line.long 0x00 "LCD_PAL7,Color Palette Register 7"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x220++0x3
|
|
line.long 0x00 "LCD_PAL8,Color Palette Register 8"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x224++0x3
|
|
line.long 0x00 "LCD_PAL9,Color Palette Register 9"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x228++0x3
|
|
line.long 0x00 "LCD_PAL10,Color Palette Register 10"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x22C++0x3
|
|
line.long 0x00 "LCD_PAL11,Color Palette Register 11"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x230++0x3
|
|
line.long 0x00 "LCD_PAL12,Color Palette Register 12"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x234++0x3
|
|
line.long 0x00 "LCD_PAL13,Color Palette Register 13"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x238++0x3
|
|
line.long 0x00 "LCD_PAL14,Color Palette Register 14"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x23C++0x3
|
|
line.long 0x00 "LCD_PAL15,Color Palette Register 15"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x240++0x3
|
|
line.long 0x00 "LCD_PAL16,Color Palette Register 16"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x244++0x3
|
|
line.long 0x00 "LCD_PAL17,Color Palette Register 17"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x248++0x3
|
|
line.long 0x00 "LCD_PAL18,Color Palette Register 18"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x24C++0x3
|
|
line.long 0x00 "LCD_PAL19,Color Palette Register 19"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x250++0x3
|
|
line.long 0x00 "LCD_PAL20,Color Palette Register 20"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x254++0x3
|
|
line.long 0x00 "LCD_PAL21,Color Palette Register 21"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x258++0x3
|
|
line.long 0x00 "LCD_PAL22,Color Palette Register 22"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x25C++0x3
|
|
line.long 0x00 "LCD_PAL23,Color Palette Register 23"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x260++0x3
|
|
line.long 0x00 "LCD_PAL24,Color Palette Register 24"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x264++0x3
|
|
line.long 0x00 "LCD_PAL25,Color Palette Register 25"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x268++0x3
|
|
line.long 0x00 "LCD_PAL26,Color Palette Register 26"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x26C++0x3
|
|
line.long 0x00 "LCD_PAL27,Color Palette Register 27"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x270++0x3
|
|
line.long 0x00 "LCD_PAL28,Color Palette Register 28"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x274++0x3
|
|
line.long 0x00 "LCD_PAL29,Color Palette Register 29"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x278++0x3
|
|
line.long 0x00 "LCD_PAL30,Color Palette Register 30"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x27C++0x3
|
|
line.long 0x00 "LCD_PAL31,Color Palette Register 31"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x280++0x3
|
|
line.long 0x00 "LCD_PAL32,Color Palette Register 32"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x284++0x3
|
|
line.long 0x00 "LCD_PAL33,Color Palette Register 33"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x288++0x3
|
|
line.long 0x00 "LCD_PAL34,Color Palette Register 34"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x28C++0x3
|
|
line.long 0x00 "LCD_PAL35,Color Palette Register 35"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x290++0x3
|
|
line.long 0x00 "LCD_PAL36,Color Palette Register 36"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x294++0x3
|
|
line.long 0x00 "LCD_PAL37,Color Palette Register 37"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x298++0x3
|
|
line.long 0x00 "LCD_PAL38,Color Palette Register 38"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x29C++0x3
|
|
line.long 0x00 "LCD_PAL39,Color Palette Register 39"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x00 "LCD_PAL40,Color Palette Register 40"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2A4++0x3
|
|
line.long 0x00 "LCD_PAL41,Color Palette Register 41"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2A8++0x3
|
|
line.long 0x00 "LCD_PAL42,Color Palette Register 42"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2AC++0x3
|
|
line.long 0x00 "LCD_PAL43,Color Palette Register 43"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2B0++0x3
|
|
line.long 0x00 "LCD_PAL44,Color Palette Register 44"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2B4++0x3
|
|
line.long 0x00 "LCD_PAL45,Color Palette Register 45"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2B8++0x3
|
|
line.long 0x00 "LCD_PAL46,Color Palette Register 46"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2BC++0x3
|
|
line.long 0x00 "LCD_PAL47,Color Palette Register 47"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2C0++0x3
|
|
line.long 0x00 "LCD_PAL48,Color Palette Register 48"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2C4++0x3
|
|
line.long 0x00 "LCD_PAL49,Color Palette Register 49"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2C8++0x3
|
|
line.long 0x00 "LCD_PAL50,Color Palette Register 50"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2CC++0x3
|
|
line.long 0x00 "LCD_PAL51,Color Palette Register 51"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2D0++0x3
|
|
line.long 0x00 "LCD_PAL52,Color Palette Register 52"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2D4++0x3
|
|
line.long 0x00 "LCD_PAL53,Color Palette Register 53"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2D8++0x3
|
|
line.long 0x00 "LCD_PAL54,Color Palette Register 54"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2DC++0x3
|
|
line.long 0x00 "LCD_PAL55,Color Palette Register 55"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2E0++0x3
|
|
line.long 0x00 "LCD_PAL56,Color Palette Register 56"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2E4++0x3
|
|
line.long 0x00 "LCD_PAL57,Color Palette Register 57"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2E8++0x3
|
|
line.long 0x00 "LCD_PAL58,Color Palette Register 58"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2EC++0x3
|
|
line.long 0x00 "LCD_PAL59,Color Palette Register 59"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2F0++0x3
|
|
line.long 0x00 "LCD_PAL60,Color Palette Register 60"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2F4++0x3
|
|
line.long 0x00 "LCD_PAL61,Color Palette Register 61"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2F8++0x3
|
|
line.long 0x00 "LCD_PAL62,Color Palette Register 62"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x2FC++0x3
|
|
line.long 0x00 "LCD_PAL63,Color Palette Register 63"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x300++0x3
|
|
line.long 0x00 "LCD_PAL64,Color Palette Register 64"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x304++0x3
|
|
line.long 0x00 "LCD_PAL65,Color Palette Register 65"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x308++0x3
|
|
line.long 0x00 "LCD_PAL66,Color Palette Register 66"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x30C++0x3
|
|
line.long 0x00 "LCD_PAL67,Color Palette Register 67"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x310++0x3
|
|
line.long 0x00 "LCD_PAL68,Color Palette Register 68"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x314++0x3
|
|
line.long 0x00 "LCD_PAL69,Color Palette Register 69"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x318++0x3
|
|
line.long 0x00 "LCD_PAL70,Color Palette Register 70"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x31C++0x3
|
|
line.long 0x00 "LCD_PAL71,Color Palette Register 71"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x320++0x3
|
|
line.long 0x00 "LCD_PAL72,Color Palette Register 72"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x324++0x3
|
|
line.long 0x00 "LCD_PAL73,Color Palette Register 73"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x328++0x3
|
|
line.long 0x00 "LCD_PAL74,Color Palette Register 74"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x32C++0x3
|
|
line.long 0x00 "LCD_PAL75,Color Palette Register 75"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x330++0x3
|
|
line.long 0x00 "LCD_PAL76,Color Palette Register 76"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x334++0x3
|
|
line.long 0x00 "LCD_PAL77,Color Palette Register 77"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x338++0x3
|
|
line.long 0x00 "LCD_PAL78,Color Palette Register 78"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x33C++0x3
|
|
line.long 0x00 "LCD_PAL79,Color Palette Register 79"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x340++0x3
|
|
line.long 0x00 "LCD_PAL80,Color Palette Register 80"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x344++0x3
|
|
line.long 0x00 "LCD_PAL81,Color Palette Register 81"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x348++0x3
|
|
line.long 0x00 "LCD_PAL82,Color Palette Register 82"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x34C++0x3
|
|
line.long 0x00 "LCD_PAL83,Color Palette Register 83"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x350++0x3
|
|
line.long 0x00 "LCD_PAL84,Color Palette Register 84"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x354++0x3
|
|
line.long 0x00 "LCD_PAL85,Color Palette Register 85"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x358++0x3
|
|
line.long 0x00 "LCD_PAL86,Color Palette Register 86"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x35C++0x3
|
|
line.long 0x00 "LCD_PAL87,Color Palette Register 87"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x360++0x3
|
|
line.long 0x00 "LCD_PAL88,Color Palette Register 88"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x364++0x3
|
|
line.long 0x00 "LCD_PAL89,Color Palette Register 89"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x368++0x3
|
|
line.long 0x00 "LCD_PAL90,Color Palette Register 90"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x36C++0x3
|
|
line.long 0x00 "LCD_PAL91,Color Palette Register 91"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x370++0x3
|
|
line.long 0x00 "LCD_PAL92,Color Palette Register 92"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x374++0x3
|
|
line.long 0x00 "LCD_PAL93,Color Palette Register 93"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x378++0x3
|
|
line.long 0x00 "LCD_PAL94,Color Palette Register 94"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x37C++0x3
|
|
line.long 0x00 "LCD_PAL95,Color Palette Register 95"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x380++0x3
|
|
line.long 0x00 "LCD_PAL96,Color Palette Register 96"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x384++0x3
|
|
line.long 0x00 "LCD_PAL97,Color Palette Register 97"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x388++0x3
|
|
line.long 0x00 "LCD_PAL98,Color Palette Register 98"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x38C++0x3
|
|
line.long 0x00 "LCD_PAL99,Color Palette Register 99"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x390++0x3
|
|
line.long 0x00 "LCD_PAL100,Color Palette Register 100"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x394++0x3
|
|
line.long 0x00 "LCD_PAL101,Color Palette Register 101"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x398++0x3
|
|
line.long 0x00 "LCD_PAL102,Color Palette Register 102"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x39C++0x3
|
|
line.long 0x00 "LCD_PAL103,Color Palette Register 103"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3A0++0x3
|
|
line.long 0x00 "LCD_PAL104,Color Palette Register 104"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3A4++0x3
|
|
line.long 0x00 "LCD_PAL105,Color Palette Register 105"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3A8++0x3
|
|
line.long 0x00 "LCD_PAL106,Color Palette Register 106"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3AC++0x3
|
|
line.long 0x00 "LCD_PAL107,Color Palette Register 107"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3B0++0x3
|
|
line.long 0x00 "LCD_PAL108,Color Palette Register 108"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3B4++0x3
|
|
line.long 0x00 "LCD_PAL109,Color Palette Register 109"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3B8++0x3
|
|
line.long 0x00 "LCD_PAL110,Color Palette Register 110"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3BC++0x3
|
|
line.long 0x00 "LCD_PAL111,Color Palette Register 111"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3C0++0x3
|
|
line.long 0x00 "LCD_PAL112,Color Palette Register 112"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3C4++0x3
|
|
line.long 0x00 "LCD_PAL113,Color Palette Register 113"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3C8++0x3
|
|
line.long 0x00 "LCD_PAL114,Color Palette Register 114"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3CC++0x3
|
|
line.long 0x00 "LCD_PAL115,Color Palette Register 115"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3D0++0x3
|
|
line.long 0x00 "LCD_PAL116,Color Palette Register 116"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3D4++0x3
|
|
line.long 0x00 "LCD_PAL117,Color Palette Register 117"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3D8++0x3
|
|
line.long 0x00 "LCD_PAL118,Color Palette Register 118"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3DC++0x3
|
|
line.long 0x00 "LCD_PAL119,Color Palette Register 119"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3E0++0x3
|
|
line.long 0x00 "LCD_PAL120,Color Palette Register 120"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3E4++0x3
|
|
line.long 0x00 "LCD_PAL121,Color Palette Register 121"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3E8++0x3
|
|
line.long 0x00 "LCD_PAL122,Color Palette Register 122"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3EC++0x3
|
|
line.long 0x00 "LCD_PAL123,Color Palette Register 123"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3F0++0x3
|
|
line.long 0x00 "LCD_PAL124,Color Palette Register 124"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3F4++0x3
|
|
line.long 0x00 "LCD_PAL125,Color Palette Register 125"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3F8++0x3
|
|
line.long 0x00 "LCD_PAL126,Color Palette Register 126"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
group.long 0x3FC++0x3
|
|
line.long 0x00 "LCD_PAL127,Color Palette Register 127"
|
|
bitfld.long 0x00 31. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 26.--30. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 21.--25. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 16.--20. 1. " R[4:0] ,Red palette data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I ,Intensity (RGB 6:6:6 TFT only)" "Low,High"
|
|
hexmask.long.byte 0x00 10.--14. 1. " B[4:0] ,Blue palette data"
|
|
hexmask.long.byte 0x00 5.--9. 1. " G[4:0] ,Green palette data"
|
|
hexmask.long.byte 0x00 0.--4. 1. " R[4:0] ,Red palette data"
|
|
tree.end
|
|
width 14.
|
|
tree "Cursor Image Registers"
|
|
group.long 0x800++0x3
|
|
line.long 0x00 "CRSR_IMG0,Cursor Image Register 0"
|
|
group.long 0x804++0x3
|
|
line.long 0x00 "CRSR_IMG1,Cursor Image Register 1"
|
|
group.long 0x808++0x3
|
|
line.long 0x00 "CRSR_IMG2,Cursor Image Register 2"
|
|
group.long 0x80C++0x3
|
|
line.long 0x00 "CRSR_IMG3,Cursor Image Register 3"
|
|
group.long 0x810++0x3
|
|
line.long 0x00 "CRSR_IMG4,Cursor Image Register 4"
|
|
group.long 0x814++0x3
|
|
line.long 0x00 "CRSR_IMG5,Cursor Image Register 5"
|
|
group.long 0x818++0x3
|
|
line.long 0x00 "CRSR_IMG6,Cursor Image Register 6"
|
|
group.long 0x81C++0x3
|
|
line.long 0x00 "CRSR_IMG7,Cursor Image Register 7"
|
|
group.long 0x820++0x3
|
|
line.long 0x00 "CRSR_IMG8,Cursor Image Register 8"
|
|
group.long 0x824++0x3
|
|
line.long 0x00 "CRSR_IMG9,Cursor Image Register 9"
|
|
group.long 0x828++0x3
|
|
line.long 0x00 "CRSR_IMG10,Cursor Image Register 10"
|
|
group.long 0x82C++0x3
|
|
line.long 0x00 "CRSR_IMG11,Cursor Image Register 11"
|
|
group.long 0x830++0x3
|
|
line.long 0x00 "CRSR_IMG12,Cursor Image Register 12"
|
|
group.long 0x834++0x3
|
|
line.long 0x00 "CRSR_IMG13,Cursor Image Register 13"
|
|
group.long 0x838++0x3
|
|
line.long 0x00 "CRSR_IMG14,Cursor Image Register 14"
|
|
group.long 0x83C++0x3
|
|
line.long 0x00 "CRSR_IMG15,Cursor Image Register 15"
|
|
group.long 0x840++0x3
|
|
line.long 0x00 "CRSR_IMG16,Cursor Image Register 16"
|
|
group.long 0x844++0x3
|
|
line.long 0x00 "CRSR_IMG17,Cursor Image Register 17"
|
|
group.long 0x848++0x3
|
|
line.long 0x00 "CRSR_IMG18,Cursor Image Register 18"
|
|
group.long 0x84C++0x3
|
|
line.long 0x00 "CRSR_IMG19,Cursor Image Register 19"
|
|
group.long 0x850++0x3
|
|
line.long 0x00 "CRSR_IMG20,Cursor Image Register 20"
|
|
group.long 0x854++0x3
|
|
line.long 0x00 "CRSR_IMG21,Cursor Image Register 21"
|
|
group.long 0x858++0x3
|
|
line.long 0x00 "CRSR_IMG22,Cursor Image Register 22"
|
|
group.long 0x85C++0x3
|
|
line.long 0x00 "CRSR_IMG23,Cursor Image Register 23"
|
|
group.long 0x860++0x3
|
|
line.long 0x00 "CRSR_IMG24,Cursor Image Register 24"
|
|
group.long 0x864++0x3
|
|
line.long 0x00 "CRSR_IMG25,Cursor Image Register 25"
|
|
group.long 0x868++0x3
|
|
line.long 0x00 "CRSR_IMG26,Cursor Image Register 26"
|
|
group.long 0x86C++0x3
|
|
line.long 0x00 "CRSR_IMG27,Cursor Image Register 27"
|
|
group.long 0x870++0x3
|
|
line.long 0x00 "CRSR_IMG28,Cursor Image Register 28"
|
|
group.long 0x874++0x3
|
|
line.long 0x00 "CRSR_IMG29,Cursor Image Register 29"
|
|
group.long 0x878++0x3
|
|
line.long 0x00 "CRSR_IMG30,Cursor Image Register 30"
|
|
group.long 0x87C++0x3
|
|
line.long 0x00 "CRSR_IMG31,Cursor Image Register 31"
|
|
group.long 0x880++0x3
|
|
line.long 0x00 "CRSR_IMG32,Cursor Image Register 32"
|
|
group.long 0x884++0x3
|
|
line.long 0x00 "CRSR_IMG33,Cursor Image Register 33"
|
|
group.long 0x888++0x3
|
|
line.long 0x00 "CRSR_IMG34,Cursor Image Register 34"
|
|
group.long 0x88C++0x3
|
|
line.long 0x00 "CRSR_IMG35,Cursor Image Register 35"
|
|
group.long 0x890++0x3
|
|
line.long 0x00 "CRSR_IMG36,Cursor Image Register 36"
|
|
group.long 0x894++0x3
|
|
line.long 0x00 "CRSR_IMG37,Cursor Image Register 37"
|
|
group.long 0x898++0x3
|
|
line.long 0x00 "CRSR_IMG38,Cursor Image Register 38"
|
|
group.long 0x89C++0x3
|
|
line.long 0x00 "CRSR_IMG39,Cursor Image Register 39"
|
|
group.long 0x8A0++0x3
|
|
line.long 0x00 "CRSR_IMG40,Cursor Image Register 40"
|
|
group.long 0x8A4++0x3
|
|
line.long 0x00 "CRSR_IMG41,Cursor Image Register 41"
|
|
group.long 0x8A8++0x3
|
|
line.long 0x00 "CRSR_IMG42,Cursor Image Register 42"
|
|
group.long 0x8AC++0x3
|
|
line.long 0x00 "CRSR_IMG43,Cursor Image Register 43"
|
|
group.long 0x8B0++0x3
|
|
line.long 0x00 "CRSR_IMG44,Cursor Image Register 44"
|
|
group.long 0x8B4++0x3
|
|
line.long 0x00 "CRSR_IMG45,Cursor Image Register 45"
|
|
group.long 0x8B8++0x3
|
|
line.long 0x00 "CRSR_IMG46,Cursor Image Register 46"
|
|
group.long 0x8BC++0x3
|
|
line.long 0x00 "CRSR_IMG47,Cursor Image Register 47"
|
|
group.long 0x8C0++0x3
|
|
line.long 0x00 "CRSR_IMG48,Cursor Image Register 48"
|
|
group.long 0x8C4++0x3
|
|
line.long 0x00 "CRSR_IMG49,Cursor Image Register 49"
|
|
group.long 0x8C8++0x3
|
|
line.long 0x00 "CRSR_IMG50,Cursor Image Register 50"
|
|
group.long 0x8CC++0x3
|
|
line.long 0x00 "CRSR_IMG51,Cursor Image Register 51"
|
|
group.long 0x8D0++0x3
|
|
line.long 0x00 "CRSR_IMG52,Cursor Image Register 52"
|
|
group.long 0x8D4++0x3
|
|
line.long 0x00 "CRSR_IMG53,Cursor Image Register 53"
|
|
group.long 0x8D8++0x3
|
|
line.long 0x00 "CRSR_IMG54,Cursor Image Register 54"
|
|
group.long 0x8DC++0x3
|
|
line.long 0x00 "CRSR_IMG55,Cursor Image Register 55"
|
|
group.long 0x8E0++0x3
|
|
line.long 0x00 "CRSR_IMG56,Cursor Image Register 56"
|
|
group.long 0x8E4++0x3
|
|
line.long 0x00 "CRSR_IMG57,Cursor Image Register 57"
|
|
group.long 0x8E8++0x3
|
|
line.long 0x00 "CRSR_IMG58,Cursor Image Register 58"
|
|
group.long 0x8EC++0x3
|
|
line.long 0x00 "CRSR_IMG59,Cursor Image Register 59"
|
|
group.long 0x8F0++0x3
|
|
line.long 0x00 "CRSR_IMG60,Cursor Image Register 60"
|
|
group.long 0x8F4++0x3
|
|
line.long 0x00 "CRSR_IMG61,Cursor Image Register 61"
|
|
group.long 0x8F8++0x3
|
|
line.long 0x00 "CRSR_IMG62,Cursor Image Register 62"
|
|
group.long 0x8FC++0x3
|
|
line.long 0x00 "CRSR_IMG63,Cursor Image Register 63"
|
|
group.long 0x900++0x3
|
|
line.long 0x00 "CRSR_IMG64,Cursor Image Register 64"
|
|
group.long 0x904++0x3
|
|
line.long 0x00 "CRSR_IMG65,Cursor Image Register 65"
|
|
group.long 0x908++0x3
|
|
line.long 0x00 "CRSR_IMG66,Cursor Image Register 66"
|
|
group.long 0x90C++0x3
|
|
line.long 0x00 "CRSR_IMG67,Cursor Image Register 67"
|
|
group.long 0x910++0x3
|
|
line.long 0x00 "CRSR_IMG68,Cursor Image Register 68"
|
|
group.long 0x914++0x3
|
|
line.long 0x00 "CRSR_IMG69,Cursor Image Register 69"
|
|
group.long 0x918++0x3
|
|
line.long 0x00 "CRSR_IMG70,Cursor Image Register 70"
|
|
group.long 0x91C++0x3
|
|
line.long 0x00 "CRSR_IMG71,Cursor Image Register 71"
|
|
group.long 0x920++0x3
|
|
line.long 0x00 "CRSR_IMG72,Cursor Image Register 72"
|
|
group.long 0x924++0x3
|
|
line.long 0x00 "CRSR_IMG73,Cursor Image Register 73"
|
|
group.long 0x928++0x3
|
|
line.long 0x00 "CRSR_IMG74,Cursor Image Register 74"
|
|
group.long 0x92C++0x3
|
|
line.long 0x00 "CRSR_IMG75,Cursor Image Register 75"
|
|
group.long 0x930++0x3
|
|
line.long 0x00 "CRSR_IMG76,Cursor Image Register 76"
|
|
group.long 0x934++0x3
|
|
line.long 0x00 "CRSR_IMG77,Cursor Image Register 77"
|
|
group.long 0x938++0x3
|
|
line.long 0x00 "CRSR_IMG78,Cursor Image Register 78"
|
|
group.long 0x93C++0x3
|
|
line.long 0x00 "CRSR_IMG79,Cursor Image Register 79"
|
|
group.long 0x940++0x3
|
|
line.long 0x00 "CRSR_IMG80,Cursor Image Register 80"
|
|
group.long 0x944++0x3
|
|
line.long 0x00 "CRSR_IMG81,Cursor Image Register 81"
|
|
group.long 0x948++0x3
|
|
line.long 0x00 "CRSR_IMG82,Cursor Image Register 82"
|
|
group.long 0x94C++0x3
|
|
line.long 0x00 "CRSR_IMG83,Cursor Image Register 83"
|
|
group.long 0x950++0x3
|
|
line.long 0x00 "CRSR_IMG84,Cursor Image Register 84"
|
|
group.long 0x954++0x3
|
|
line.long 0x00 "CRSR_IMG85,Cursor Image Register 85"
|
|
group.long 0x958++0x3
|
|
line.long 0x00 "CRSR_IMG86,Cursor Image Register 86"
|
|
group.long 0x95C++0x3
|
|
line.long 0x00 "CRSR_IMG87,Cursor Image Register 87"
|
|
group.long 0x960++0x3
|
|
line.long 0x00 "CRSR_IMG88,Cursor Image Register 88"
|
|
group.long 0x964++0x3
|
|
line.long 0x00 "CRSR_IMG89,Cursor Image Register 89"
|
|
group.long 0x968++0x3
|
|
line.long 0x00 "CRSR_IMG90,Cursor Image Register 90"
|
|
group.long 0x96C++0x3
|
|
line.long 0x00 "CRSR_IMG91,Cursor Image Register 91"
|
|
group.long 0x970++0x3
|
|
line.long 0x00 "CRSR_IMG92,Cursor Image Register 92"
|
|
group.long 0x974++0x3
|
|
line.long 0x00 "CRSR_IMG93,Cursor Image Register 93"
|
|
group.long 0x978++0x3
|
|
line.long 0x00 "CRSR_IMG94,Cursor Image Register 94"
|
|
group.long 0x97C++0x3
|
|
line.long 0x00 "CRSR_IMG95,Cursor Image Register 95"
|
|
group.long 0x980++0x3
|
|
line.long 0x00 "CRSR_IMG96,Cursor Image Register 96"
|
|
group.long 0x984++0x3
|
|
line.long 0x00 "CRSR_IMG97,Cursor Image Register 97"
|
|
group.long 0x988++0x3
|
|
line.long 0x00 "CRSR_IMG98,Cursor Image Register 98"
|
|
group.long 0x98C++0x3
|
|
line.long 0x00 "CRSR_IMG99,Cursor Image Register 99"
|
|
group.long 0x990++0x3
|
|
line.long 0x00 "CRSR_IMG100,Cursor Image Register 100"
|
|
group.long 0x994++0x3
|
|
line.long 0x00 "CRSR_IMG101,Cursor Image Register 101"
|
|
group.long 0x998++0x3
|
|
line.long 0x00 "CRSR_IMG102,Cursor Image Register 102"
|
|
group.long 0x99C++0x3
|
|
line.long 0x00 "CRSR_IMG103,Cursor Image Register 103"
|
|
group.long 0x9A0++0x3
|
|
line.long 0x00 "CRSR_IMG104,Cursor Image Register 104"
|
|
group.long 0x9A4++0x3
|
|
line.long 0x00 "CRSR_IMG105,Cursor Image Register 105"
|
|
group.long 0x9A8++0x3
|
|
line.long 0x00 "CRSR_IMG106,Cursor Image Register 106"
|
|
group.long 0x9AC++0x3
|
|
line.long 0x00 "CRSR_IMG107,Cursor Image Register 107"
|
|
group.long 0x9B0++0x3
|
|
line.long 0x00 "CRSR_IMG108,Cursor Image Register 108"
|
|
group.long 0x9B4++0x3
|
|
line.long 0x00 "CRSR_IMG109,Cursor Image Register 109"
|
|
group.long 0x9B8++0x3
|
|
line.long 0x00 "CRSR_IMG110,Cursor Image Register 110"
|
|
group.long 0x9BC++0x3
|
|
line.long 0x00 "CRSR_IMG111,Cursor Image Register 111"
|
|
group.long 0x9C0++0x3
|
|
line.long 0x00 "CRSR_IMG112,Cursor Image Register 112"
|
|
group.long 0x9C4++0x3
|
|
line.long 0x00 "CRSR_IMG113,Cursor Image Register 113"
|
|
group.long 0x9C8++0x3
|
|
line.long 0x00 "CRSR_IMG114,Cursor Image Register 114"
|
|
group.long 0x9CC++0x3
|
|
line.long 0x00 "CRSR_IMG115,Cursor Image Register 115"
|
|
group.long 0x9D0++0x3
|
|
line.long 0x00 "CRSR_IMG116,Cursor Image Register 116"
|
|
group.long 0x9D4++0x3
|
|
line.long 0x00 "CRSR_IMG117,Cursor Image Register 117"
|
|
group.long 0x9D8++0x3
|
|
line.long 0x00 "CRSR_IMG118,Cursor Image Register 118"
|
|
group.long 0x9DC++0x3
|
|
line.long 0x00 "CRSR_IMG119,Cursor Image Register 119"
|
|
group.long 0x9E0++0x3
|
|
line.long 0x00 "CRSR_IMG120,Cursor Image Register 120"
|
|
group.long 0x9E4++0x3
|
|
line.long 0x00 "CRSR_IMG121,Cursor Image Register 121"
|
|
group.long 0x9E8++0x3
|
|
line.long 0x00 "CRSR_IMG122,Cursor Image Register 122"
|
|
group.long 0x9EC++0x3
|
|
line.long 0x00 "CRSR_IMG123,Cursor Image Register 123"
|
|
group.long 0x9F0++0x3
|
|
line.long 0x00 "CRSR_IMG124,Cursor Image Register 124"
|
|
group.long 0x9F4++0x3
|
|
line.long 0x00 "CRSR_IMG125,Cursor Image Register 125"
|
|
group.long 0x9F8++0x3
|
|
line.long 0x00 "CRSR_IMG126,Cursor Image Register 126"
|
|
group.long 0x9FC++0x3
|
|
line.long 0x00 "CRSR_IMG127,Cursor Image Register 127"
|
|
group.long 0xA00++0x3
|
|
line.long 0x00 "CRSR_IMG128,Cursor Image Register 128"
|
|
group.long 0xA04++0x3
|
|
line.long 0x00 "CRSR_IMG129,Cursor Image Register 129"
|
|
group.long 0xA08++0x3
|
|
line.long 0x00 "CRSR_IMG130,Cursor Image Register 130"
|
|
group.long 0xA0C++0x3
|
|
line.long 0x00 "CRSR_IMG131,Cursor Image Register 131"
|
|
group.long 0xA10++0x3
|
|
line.long 0x00 "CRSR_IMG132,Cursor Image Register 132"
|
|
group.long 0xA14++0x3
|
|
line.long 0x00 "CRSR_IMG133,Cursor Image Register 133"
|
|
group.long 0xA18++0x3
|
|
line.long 0x00 "CRSR_IMG134,Cursor Image Register 134"
|
|
group.long 0xA1C++0x3
|
|
line.long 0x00 "CRSR_IMG135,Cursor Image Register 135"
|
|
group.long 0xA20++0x3
|
|
line.long 0x00 "CRSR_IMG136,Cursor Image Register 136"
|
|
group.long 0xA24++0x3
|
|
line.long 0x00 "CRSR_IMG137,Cursor Image Register 137"
|
|
group.long 0xA28++0x3
|
|
line.long 0x00 "CRSR_IMG138,Cursor Image Register 138"
|
|
group.long 0xA2C++0x3
|
|
line.long 0x00 "CRSR_IMG139,Cursor Image Register 139"
|
|
group.long 0xA30++0x3
|
|
line.long 0x00 "CRSR_IMG140,Cursor Image Register 140"
|
|
group.long 0xA34++0x3
|
|
line.long 0x00 "CRSR_IMG141,Cursor Image Register 141"
|
|
group.long 0xA38++0x3
|
|
line.long 0x00 "CRSR_IMG142,Cursor Image Register 142"
|
|
group.long 0xA3C++0x3
|
|
line.long 0x00 "CRSR_IMG143,Cursor Image Register 143"
|
|
group.long 0xA40++0x3
|
|
line.long 0x00 "CRSR_IMG144,Cursor Image Register 144"
|
|
group.long 0xA44++0x3
|
|
line.long 0x00 "CRSR_IMG145,Cursor Image Register 145"
|
|
group.long 0xA48++0x3
|
|
line.long 0x00 "CRSR_IMG146,Cursor Image Register 146"
|
|
group.long 0xA4C++0x3
|
|
line.long 0x00 "CRSR_IMG147,Cursor Image Register 147"
|
|
group.long 0xA50++0x3
|
|
line.long 0x00 "CRSR_IMG148,Cursor Image Register 148"
|
|
group.long 0xA54++0x3
|
|
line.long 0x00 "CRSR_IMG149,Cursor Image Register 149"
|
|
group.long 0xA58++0x3
|
|
line.long 0x00 "CRSR_IMG150,Cursor Image Register 150"
|
|
group.long 0xA5C++0x3
|
|
line.long 0x00 "CRSR_IMG151,Cursor Image Register 151"
|
|
group.long 0xA60++0x3
|
|
line.long 0x00 "CRSR_IMG152,Cursor Image Register 152"
|
|
group.long 0xA64++0x3
|
|
line.long 0x00 "CRSR_IMG153,Cursor Image Register 153"
|
|
group.long 0xA68++0x3
|
|
line.long 0x00 "CRSR_IMG154,Cursor Image Register 154"
|
|
group.long 0xA6C++0x3
|
|
line.long 0x00 "CRSR_IMG155,Cursor Image Register 155"
|
|
group.long 0xA70++0x3
|
|
line.long 0x00 "CRSR_IMG156,Cursor Image Register 156"
|
|
group.long 0xA74++0x3
|
|
line.long 0x00 "CRSR_IMG157,Cursor Image Register 157"
|
|
group.long 0xA78++0x3
|
|
line.long 0x00 "CRSR_IMG158,Cursor Image Register 158"
|
|
group.long 0xA7C++0x3
|
|
line.long 0x00 "CRSR_IMG159,Cursor Image Register 159"
|
|
group.long 0xA80++0x3
|
|
line.long 0x00 "CRSR_IMG160,Cursor Image Register 160"
|
|
group.long 0xA84++0x3
|
|
line.long 0x00 "CRSR_IMG161,Cursor Image Register 161"
|
|
group.long 0xA88++0x3
|
|
line.long 0x00 "CRSR_IMG162,Cursor Image Register 162"
|
|
group.long 0xA8C++0x3
|
|
line.long 0x00 "CRSR_IMG163,Cursor Image Register 163"
|
|
group.long 0xA90++0x3
|
|
line.long 0x00 "CRSR_IMG164,Cursor Image Register 164"
|
|
group.long 0xA94++0x3
|
|
line.long 0x00 "CRSR_IMG165,Cursor Image Register 165"
|
|
group.long 0xA98++0x3
|
|
line.long 0x00 "CRSR_IMG166,Cursor Image Register 166"
|
|
group.long 0xA9C++0x3
|
|
line.long 0x00 "CRSR_IMG167,Cursor Image Register 167"
|
|
group.long 0xAA0++0x3
|
|
line.long 0x00 "CRSR_IMG168,Cursor Image Register 168"
|
|
group.long 0xAA4++0x3
|
|
line.long 0x00 "CRSR_IMG169,Cursor Image Register 169"
|
|
group.long 0xAA8++0x3
|
|
line.long 0x00 "CRSR_IMG170,Cursor Image Register 170"
|
|
group.long 0xAAC++0x3
|
|
line.long 0x00 "CRSR_IMG171,Cursor Image Register 171"
|
|
group.long 0xAB0++0x3
|
|
line.long 0x00 "CRSR_IMG172,Cursor Image Register 172"
|
|
group.long 0xAB4++0x3
|
|
line.long 0x00 "CRSR_IMG173,Cursor Image Register 173"
|
|
group.long 0xAB8++0x3
|
|
line.long 0x00 "CRSR_IMG174,Cursor Image Register 174"
|
|
group.long 0xABC++0x3
|
|
line.long 0x00 "CRSR_IMG175,Cursor Image Register 175"
|
|
group.long 0xAC0++0x3
|
|
line.long 0x00 "CRSR_IMG176,Cursor Image Register 176"
|
|
group.long 0xAC4++0x3
|
|
line.long 0x00 "CRSR_IMG177,Cursor Image Register 177"
|
|
group.long 0xAC8++0x3
|
|
line.long 0x00 "CRSR_IMG178,Cursor Image Register 178"
|
|
group.long 0xACC++0x3
|
|
line.long 0x00 "CRSR_IMG179,Cursor Image Register 179"
|
|
group.long 0xAD0++0x3
|
|
line.long 0x00 "CRSR_IMG180,Cursor Image Register 180"
|
|
group.long 0xAD4++0x3
|
|
line.long 0x00 "CRSR_IMG181,Cursor Image Register 181"
|
|
group.long 0xAD8++0x3
|
|
line.long 0x00 "CRSR_IMG182,Cursor Image Register 182"
|
|
group.long 0xADC++0x3
|
|
line.long 0x00 "CRSR_IMG183,Cursor Image Register 183"
|
|
group.long 0xAE0++0x3
|
|
line.long 0x00 "CRSR_IMG184,Cursor Image Register 184"
|
|
group.long 0xAE4++0x3
|
|
line.long 0x00 "CRSR_IMG185,Cursor Image Register 185"
|
|
group.long 0xAE8++0x3
|
|
line.long 0x00 "CRSR_IMG186,Cursor Image Register 186"
|
|
group.long 0xAEC++0x3
|
|
line.long 0x00 "CRSR_IMG187,Cursor Image Register 187"
|
|
group.long 0xAF0++0x3
|
|
line.long 0x00 "CRSR_IMG188,Cursor Image Register 188"
|
|
group.long 0xAF4++0x3
|
|
line.long 0x00 "CRSR_IMG189,Cursor Image Register 189"
|
|
group.long 0xAF8++0x3
|
|
line.long 0x00 "CRSR_IMG190,Cursor Image Register 190"
|
|
group.long 0xAFC++0x3
|
|
line.long 0x00 "CRSR_IMG191,Cursor Image Register 191"
|
|
group.long 0xB00++0x3
|
|
line.long 0x00 "CRSR_IMG192,Cursor Image Register 192"
|
|
group.long 0xB04++0x3
|
|
line.long 0x00 "CRSR_IMG193,Cursor Image Register 193"
|
|
group.long 0xB08++0x3
|
|
line.long 0x00 "CRSR_IMG194,Cursor Image Register 194"
|
|
group.long 0xB0C++0x3
|
|
line.long 0x00 "CRSR_IMG195,Cursor Image Register 195"
|
|
group.long 0xB10++0x3
|
|
line.long 0x00 "CRSR_IMG196,Cursor Image Register 196"
|
|
group.long 0xB14++0x3
|
|
line.long 0x00 "CRSR_IMG197,Cursor Image Register 197"
|
|
group.long 0xB18++0x3
|
|
line.long 0x00 "CRSR_IMG198,Cursor Image Register 198"
|
|
group.long 0xB1C++0x3
|
|
line.long 0x00 "CRSR_IMG199,Cursor Image Register 199"
|
|
group.long 0xB20++0x3
|
|
line.long 0x00 "CRSR_IMG200,Cursor Image Register 200"
|
|
group.long 0xB24++0x3
|
|
line.long 0x00 "CRSR_IMG201,Cursor Image Register 201"
|
|
group.long 0xB28++0x3
|
|
line.long 0x00 "CRSR_IMG202,Cursor Image Register 202"
|
|
group.long 0xB2C++0x3
|
|
line.long 0x00 "CRSR_IMG203,Cursor Image Register 203"
|
|
group.long 0xB30++0x3
|
|
line.long 0x00 "CRSR_IMG204,Cursor Image Register 204"
|
|
group.long 0xB34++0x3
|
|
line.long 0x00 "CRSR_IMG205,Cursor Image Register 205"
|
|
group.long 0xB38++0x3
|
|
line.long 0x00 "CRSR_IMG206,Cursor Image Register 206"
|
|
group.long 0xB3C++0x3
|
|
line.long 0x00 "CRSR_IMG207,Cursor Image Register 207"
|
|
group.long 0xB40++0x3
|
|
line.long 0x00 "CRSR_IMG208,Cursor Image Register 208"
|
|
group.long 0xB44++0x3
|
|
line.long 0x00 "CRSR_IMG209,Cursor Image Register 209"
|
|
group.long 0xB48++0x3
|
|
line.long 0x00 "CRSR_IMG210,Cursor Image Register 210"
|
|
group.long 0xB4C++0x3
|
|
line.long 0x00 "CRSR_IMG211,Cursor Image Register 211"
|
|
group.long 0xB50++0x3
|
|
line.long 0x00 "CRSR_IMG212,Cursor Image Register 212"
|
|
group.long 0xB54++0x3
|
|
line.long 0x00 "CRSR_IMG213,Cursor Image Register 213"
|
|
group.long 0xB58++0x3
|
|
line.long 0x00 "CRSR_IMG214,Cursor Image Register 214"
|
|
group.long 0xB5C++0x3
|
|
line.long 0x00 "CRSR_IMG215,Cursor Image Register 215"
|
|
group.long 0xB60++0x3
|
|
line.long 0x00 "CRSR_IMG216,Cursor Image Register 216"
|
|
group.long 0xB64++0x3
|
|
line.long 0x00 "CRSR_IMG217,Cursor Image Register 217"
|
|
group.long 0xB68++0x3
|
|
line.long 0x00 "CRSR_IMG218,Cursor Image Register 218"
|
|
group.long 0xB6C++0x3
|
|
line.long 0x00 "CRSR_IMG219,Cursor Image Register 219"
|
|
group.long 0xB70++0x3
|
|
line.long 0x00 "CRSR_IMG220,Cursor Image Register 220"
|
|
group.long 0xB74++0x3
|
|
line.long 0x00 "CRSR_IMG221,Cursor Image Register 221"
|
|
group.long 0xB78++0x3
|
|
line.long 0x00 "CRSR_IMG222,Cursor Image Register 222"
|
|
group.long 0xB7C++0x3
|
|
line.long 0x00 "CRSR_IMG223,Cursor Image Register 223"
|
|
group.long 0xB80++0x3
|
|
line.long 0x00 "CRSR_IMG224,Cursor Image Register 224"
|
|
group.long 0xB84++0x3
|
|
line.long 0x00 "CRSR_IMG225,Cursor Image Register 225"
|
|
group.long 0xB88++0x3
|
|
line.long 0x00 "CRSR_IMG226,Cursor Image Register 226"
|
|
group.long 0xB8C++0x3
|
|
line.long 0x00 "CRSR_IMG227,Cursor Image Register 227"
|
|
group.long 0xB90++0x3
|
|
line.long 0x00 "CRSR_IMG228,Cursor Image Register 228"
|
|
group.long 0xB94++0x3
|
|
line.long 0x00 "CRSR_IMG229,Cursor Image Register 229"
|
|
group.long 0xB98++0x3
|
|
line.long 0x00 "CRSR_IMG230,Cursor Image Register 230"
|
|
group.long 0xB9C++0x3
|
|
line.long 0x00 "CRSR_IMG231,Cursor Image Register 231"
|
|
group.long 0xBA0++0x3
|
|
line.long 0x00 "CRSR_IMG232,Cursor Image Register 232"
|
|
group.long 0xBA4++0x3
|
|
line.long 0x00 "CRSR_IMG233,Cursor Image Register 233"
|
|
group.long 0xBA8++0x3
|
|
line.long 0x00 "CRSR_IMG234,Cursor Image Register 234"
|
|
group.long 0xBAC++0x3
|
|
line.long 0x00 "CRSR_IMG235,Cursor Image Register 235"
|
|
group.long 0xBB0++0x3
|
|
line.long 0x00 "CRSR_IMG236,Cursor Image Register 236"
|
|
group.long 0xBB4++0x3
|
|
line.long 0x00 "CRSR_IMG237,Cursor Image Register 237"
|
|
group.long 0xBB8++0x3
|
|
line.long 0x00 "CRSR_IMG238,Cursor Image Register 238"
|
|
group.long 0xBBC++0x3
|
|
line.long 0x00 "CRSR_IMG239,Cursor Image Register 239"
|
|
group.long 0xBC0++0x3
|
|
line.long 0x00 "CRSR_IMG240,Cursor Image Register 240"
|
|
group.long 0xBC4++0x3
|
|
line.long 0x00 "CRSR_IMG241,Cursor Image Register 241"
|
|
group.long 0xBC8++0x3
|
|
line.long 0x00 "CRSR_IMG242,Cursor Image Register 242"
|
|
group.long 0xBCC++0x3
|
|
line.long 0x00 "CRSR_IMG243,Cursor Image Register 243"
|
|
group.long 0xBD0++0x3
|
|
line.long 0x00 "CRSR_IMG244,Cursor Image Register 244"
|
|
group.long 0xBD4++0x3
|
|
line.long 0x00 "CRSR_IMG245,Cursor Image Register 245"
|
|
group.long 0xBD8++0x3
|
|
line.long 0x00 "CRSR_IMG246,Cursor Image Register 246"
|
|
group.long 0xBDC++0x3
|
|
line.long 0x00 "CRSR_IMG247,Cursor Image Register 247"
|
|
group.long 0xBE0++0x3
|
|
line.long 0x00 "CRSR_IMG248,Cursor Image Register 248"
|
|
group.long 0xBE4++0x3
|
|
line.long 0x00 "CRSR_IMG249,Cursor Image Register 249"
|
|
group.long 0xBE8++0x3
|
|
line.long 0x00 "CRSR_IMG250,Cursor Image Register 250"
|
|
group.long 0xBEC++0x3
|
|
line.long 0x00 "CRSR_IMG251,Cursor Image Register 251"
|
|
group.long 0xBF0++0x3
|
|
line.long 0x00 "CRSR_IMG252,Cursor Image Register 252"
|
|
group.long 0xBF4++0x3
|
|
line.long 0x00 "CRSR_IMG253,Cursor Image Register 253"
|
|
group.long 0xBF8++0x3
|
|
line.long 0x00 "CRSR_IMG254,Cursor Image Register 254"
|
|
group.long 0xBFC++0x3
|
|
line.long 0x00 "CRSR_IMG255,Cursor Image Register 255"
|
|
tree.end
|
|
group.long 0xc00++0x17
|
|
line.long 0x00 "CRSR_CTRL,Cursor Control Register"
|
|
bitfld.long 0x00 4.--5. " CrsrNum[1:0] ,Cursor image number" "Cursor0,Cursor1,Cursor2,Cursor3"
|
|
bitfld.long 0x00 0. " CrsrOn ,Cursor enable" "Not displayed,Displayed"
|
|
line.long 0x04 "CRSR_CFG,Cursor Configuration Register"
|
|
bitfld.long 0x04 1. " FrameSync ,Cursor frame synchronization type" "Asynchronous,Synchronized"
|
|
bitfld.long 0x04 0. " CrsrSize ,Cursor size selection" "32x32,64x64"
|
|
line.long 0x08 "CRSR_PAL0,Cursor Palette Register 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " Blue ,Blue color component"
|
|
hexmask.long.byte 0x08 8.--15. 1. " Green ,Green color component"
|
|
hexmask.long.byte 0x08 0.--7. 1. " Red ,Red color component"
|
|
line.long 0x0c "CRSR_PAL1,Cursor Palette Register 1"
|
|
hexmask.long.byte 0x0c 16.--23. 1. " Blue ,Blue color component"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " Green ,Green color component"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " Red ,Red color component"
|
|
line.long 0x10 "CRSR_XY,Cursor XY Position Register"
|
|
hexmask.long.word 0x10 16.--25. 1. " CrsrY ,Y ordinate of the cursor origin measured in pixels"
|
|
hexmask.long.word 0x10 0.--9. 1. " CrsrX ,X ordinate of the cursor origin measured in pixels"
|
|
line.long 0x14 "CRSR_CLIP,Cursor Clip Position Register"
|
|
hexmask.long.byte 0x14 8.--13. 1. " CrsrClipY ,Cursor clip position for Y direction"
|
|
hexmask.long.byte 0x14 0.--5. 1. " CrsrClipX ,Cursor clip position for X direction"
|
|
group.long 0xc20++0x3
|
|
line.long 0x00 "CRSR_INTMSK,Cursor Interrupt Mask Register"
|
|
bitfld.long 0x00 0. " CrsrIM ,Cursor interrupt mask" "Disabled,Enabled"
|
|
group.long 0xc28++0x7
|
|
line.long 0x00 "CRSR_INTRAW,Cursor Raw Interrupt Status Register"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x4 0. " CrsrRIS_set/clr ,Cursor raw interrupt status" "No interrupt,Interrupt"
|
|
line.long 0x04 "CRSR_INTSTAT,Cursor Masked Interrupt Status Register"
|
|
setclrfld.long 0x04 0. 0x04 0. -0x8 0. " CrsrMIS_set/clr ,Cursor masked interrupt status" "Not masked,Masked"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; I/O
|
|
; --------------------------------------------------------------------------------
|
|
tree "I/O Configuration And Pinning"
|
|
sif (cpu()=="LPC2880"||cpu()=="LPC2888")
|
|
base 0x80003000
|
|
width 10.
|
|
tree "Port 0 (EMC) Registers"
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "MODE1[0],Port 0 (EMC) Mode 1 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " D0/P0.0_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " D1/P0.1_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " D2/P0.2_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " D3/P0.3_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " D4/P0.4_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " D5/P0.5_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " D6/P0.6_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " D7/P0.7_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " D8/P0.8_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " D9/P0.9_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " D10/P0.10_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " D11/P0.11_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " D12/P0.12_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " D13/P0.13_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " D14/P0.14_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " D15/P0.15_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " A0/P0.16_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " A1/P0.17_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " A2/P0.18_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " A3/P0.19_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " A4/P0.20_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " A5/P0.21_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " A6/P0.22_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " A7/P0.23_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " A8/P0.24_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " A9/P0.25_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " A10/P0.26_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " A11/P0.27_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " A12/P0.28_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " A13/P0.29_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " A14/P0.30_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " A15/P0.31_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
group.long 0x010++0x03
|
|
line.long 0x00 "MODE0[0],Port 0 (EMC) Mode 0 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " D0/P0.0_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " D1/P0.1_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " D2/P0.2_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " D3/P0.3_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " D4/P0.4_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " D5/P0.5_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " D6/P0.6_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " D7/P0.7_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " D8/P0.8_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " D9/P0.9_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " D10/P0.10_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " D11/P0.11_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " D12/P0.12_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " D13/P0.13_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " D14/P0.14_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " D15/P0.15_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " A0/P0.16_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " A1/P0.17_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " A2/P0.18_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " A3/P0.19_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " A4/P0.20_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " A5/P0.21_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " A6/P0.22_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " A7/P0.23_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " A8/P0.24_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " A9/P0.25_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " A10/P0.26_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " A11/P0.27_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " A12/P0.28_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " A13/P0.29_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " A14/P0.30_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " A15/P0.31_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
rgroup.long 0x000++0x03
|
|
line.long 0x00 "PINS[0],Port 0 (EMC) Pin State Register"
|
|
bitfld.long 0x00 0. " D0/P0.0 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 1. " D1/P0.1 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " D2/P0.2 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 3. " D3/P0.3 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " D4/P0.4 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 5. " D5/P0.5 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " D6/P0.6 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 7. " D7/P0.7 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " D8/P0.8 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 9. " D9/P0.9 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " D10/P0.10 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 11. " D11/P0.11 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " D12/P0.12 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 13. " D13/P0.13 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 14. " D14/P0.14 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 15. " D15/P0.15 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " A0/P0.16 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 17. " A1/P0.17 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " A2/P0.18 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 19. " A3/P0.19 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " A4/P0.20 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 21. " A5/P0.21 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " A6/P0.22 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 23. " A7/P0.23 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 24. " A8/P0.24 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 25. " A9/P0.25 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " A10/P0.26 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 27. " A11/P0.27 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " A12/P0.28 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 29. " A13/P0.29 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 30. " A14/P0.30 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 31. " A15/P0.31 ,GPIO pin state" "Low,High"
|
|
tree.end
|
|
tree "Port 1 (EMC) Registers"
|
|
group.long 0x060++0x03
|
|
line.long 0x00 "MODE1[1],Port 1 (EMC) Mode 1 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " A16/P1.0_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " A17/P1.1_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " A18/P1.2_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " A19/P1.3_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " A20/P1.4_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " STCS0/P1.5_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " STCS1/P1.6_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " STCS2/P1.7_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DYCS/P1.8_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " CKE/P1.9_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DQM0/P1.10_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DQM1/P1.11_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " BLS0/P1.12_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " BLS1/P1.13_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " MCLKO/P1.14_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " WE/P1.15_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CAS/P1.16_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " RAS/P1.17_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " OE/P1.18_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RPO/P1.19_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
group.long 0x050++0x03
|
|
line.long 0x00 "MODE0[1],Port 1 (EMC) Mode 0 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " A16/P1.0_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " A17/P1.1_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " A18/P1.2_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " A19/P1.3_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " A20/P1.4_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " STCS0/P1.5_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " STCS1/P1.6_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " STCS2/P1.7_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DYCS/P1.8_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " CKE/P1.9_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DQM0/P1.10_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DQM1/P1.11_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " BLS0/P1.12_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " BLS1/P1.13_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " MCLKO/P1.14_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " WE/P1.15_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CAS/P1.16_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " RAS/P1.17_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " OE/P1.18_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RPO/P1.19_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "PINS[1],Port 1 (EMC) Pin State Register"
|
|
bitfld.long 0x00 0. " A16/P1.0 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 1. " A17/P1.1 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " A18/P1.2 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 3. " A19/P1.3 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " A20/P1.4 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 5. " STCS0/P1.5 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STCS1/P1.6 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 7. " STCS2/P1.7 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DYCS/P1.8 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 9. " CKE/P1.9 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DQM0/P1.10 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 11. " DQM1/P1.11 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " BLS0/P1.12 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 13. " BLS1/P1.13 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MCLKO/P1.14 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 15. " WE/P1.15 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CAS/P1.16 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 17. " RAS/P1.17 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OE/P1.18 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 19. " RPO/P1.19 ,GPIO pin state" "Low,High"
|
|
tree.end
|
|
tree "Port 2 (GPIO) Registers"
|
|
group.long 0x0A0++0x03
|
|
line.long 0x00 "MODE1[2],Port 2 (GPIO) Mode 1 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " P2.0_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " P2.1_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " MODE0/P2.2_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " MODE1/P2.3_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
group.long 0x090++0x03
|
|
line.long 0x00 "MODE0[2],Port 2 (GPIO) Mode 0 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " P2.0_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " P2.1_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " MODE0/P2.2_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " MODE1/P2.3_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
rgroup.long 0x080++0x03
|
|
line.long 0x00 "PINS[2],Port 2 (GPIO) Pin State Register"
|
|
bitfld.long 0x00 0. " P2.0_set/clr ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 1. " P2.1_set/clr ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MODE0/P2.2_set/clr ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 3. " MODE1/P2.3_set/clr ,GPIO pin state" "Low,High"
|
|
tree.end
|
|
tree "Port 3 (DAI/DAO) Registers"
|
|
group.long 0x0E0++0x03
|
|
line.long 0x00 "MODE1[3],Port 3 (DAI/DAO) Mode 1 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DATI/P3.0_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BCKI/P3.1_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " WSI/P3.2_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DCLKO/P3.3_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " BCKO/P3.5_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " DATO/P3.6_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
group.long 0x0D0++0x03
|
|
line.long 0x00 "MODE0[3],Port 3 (DAI/DAO) Mode 0 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DATI/P3.0_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BCKI/P3.1_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " WSI/P3.2_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DCLKO/P3.3_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " BCKO/P3.5_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " DATO/P3.6_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PINS[3],Port 3 (DAI/DAO) Pin State Register"
|
|
bitfld.long 0x00 0. " DATI/P3.0 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 1. " BCKI/P3.1 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WSI/P3.2 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 3. " DCLKO/P3.3 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BCKO/P3.5 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 6. " DATO/P3.6 ,GPIO pin state" "Low,High"
|
|
tree.end
|
|
tree "Port 4 (LCD) Registers"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "MODE1[4],Port 4 (LCD) Mode 1 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LCS/P4.0_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LRS/P4.1_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " LRW/P4.2_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " LER/P4.3_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " LD0/P4.4_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " LD1/P4.5_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " LD2/P4.6_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " LD3/P4.7_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " LD4/P4.8_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " LD5/P4.9_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " LD6/P4.10_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LD7/P4.11_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "MODE0[4],Port 4 (LCD) Mode 0 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LCS/P4.0_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LRS/P4.1_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " LRW/P4.2_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " LER/P4.3_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " LD0/P4.4_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " LD1/P4.5_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " LD2/P4.6_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " LD3/P4.7_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " LD4/P4.8_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " LD5/P4.9_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " LD6/P4.10_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LD7/P4.11_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "PINS[4],Port 4 (LCD) Pin State Register"
|
|
bitfld.long 0x00 0. " LCS/P4.0 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 1. " LRS/P4.1 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LRW/P4.2 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 3. " LER/P4.3 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LD0/P4.4 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 5. " LD1/P4.5 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LD2/P4.6 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 7. " LD3/P4.7 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LD4/P4.8 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 9. " LD5/P4.9 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LD6/P4.10 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 11. " LD7/P4.11 ,GPIO pin state" "Low,High"
|
|
tree.end
|
|
tree "Port 5 (MCI/SD) Registers"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "MODE1[5],Port 5 (MCI/SD) Mode 1 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " MCLK/P5.0_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MCMD/P5.1_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " MD3/P5.2_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " MD2/P5.3_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " MD1/P5.4_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " MD0/P5.5_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "MODE0[5],Port 5 (MCI/SD) Mode 0 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " MCLK/P5.0_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MCMD/P5.1_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " MD3/P5.2_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " MD2/P5.3_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " MD1/P5.4_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " MD0/P5.5_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
rgroup.long 0x140++0x03
|
|
line.long 0x00 "PINS[5],Port 5 (MCI/SD) Pin State Register"
|
|
bitfld.long 0x00 0. " MCLK/P5.0 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 1. " MCMD/P5.1 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MD3/P5.2 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 3. " MD2/P5.3 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MD1/P5.4 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 5. " MD0/P5.5 ,GPIO pin state" "Low,High"
|
|
tree.end
|
|
tree "Port 6 (UART) Registers"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "MODE1[6],Port 6 (UART) Mode 1 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RXD/P6.0_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TXD/P6.1_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CTS/P6.2_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " RTS/P6.3_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "MODE0[6],Port 6 (UART) Mode 0 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RXD/P6.0_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TXD/P6.1_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CTS/P6.2_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " RTS/P6.3_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
rgroup.long 0x180++0x03
|
|
line.long 0x00 "PINS[6],Port 6 (UART) Pin State Register"
|
|
bitfld.long 0x00 0. " RXD/P6.0 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 1. " TXD/P6.1 ,GPIO pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTS/P6.2 ,GPIO pin state" "Low,High"
|
|
bitfld.long 0x00 3. " RTS/P6.3 ,GPIO pin state" "Low,High"
|
|
tree.end
|
|
tree "Port 7 (USB) Registers"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "MODE1[7],Port 7 (USB) Mode 1 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " VBUS/P7.0_set/clr ,Mode 1 GPIO pin state" "Low,High"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "MODE0[7],Port 7 (USB) Mode 0 Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " VBUS/P7.0_set/clr ,Mode 0 GPIO pin state" "Low,High"
|
|
rgroup.long 0x1C0++0x03
|
|
line.long 0x00 "PINS[7],Port 7 (USB) Pin State Register"
|
|
bitfld.long 0x00 0. " VBUS/P7.0 ,GPIO pin state" "Low,High"
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
textline ""
|