23819 lines
1.3 MiB
23819 lines
1.3 MiB
; --------------------------------------------------------------------------------
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; @Title: GD32W515x On-Chip Peripherals
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; @Props: Released
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; @Author: JON
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; @Changelog: 2022-05-10 JON
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; @Manufacturer: GigaDevice - GigaDevice Semiconductor Inc.
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; @Doc: SVD generated (SVD2PER 1.8.0) based on: GD32W515Px.svd (Ver. 1.0),
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; GD32W515Tx.svd (Ver. 1.0)
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; @Core: Cortex-M33F
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; @Chip: GD32W515P0, GD32W515PI, GD32W515TG, GD32W515TI
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pergd32w515x.per 15527 2022-12-09 13:25:57Z kwisniewski $
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tree.close "Core Registers (Cortex-M33F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes"
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bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
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bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
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textline " "
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bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes"
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group.long 0x0C++0x0F
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line.long 0x00 "CPPWR,Coprocessor Power Control Register"
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bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only"
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bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted"
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bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only"
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textline " "
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bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted"
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bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only"
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bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted"
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textline " "
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bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only"
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bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted"
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bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only"
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textline " "
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bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted"
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bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only"
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bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted"
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textline " "
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bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only"
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bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted"
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bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only"
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textline " "
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bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted"
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bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only"
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bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted"
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line.long 0x04 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x08 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x0C "SYST_CVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPUID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main extension"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Reserved,Reserved,Patch 2,?..."
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control and State Register"
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setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
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setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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textline " "
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bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
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rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
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rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
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textline " "
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
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rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
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rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
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bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
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textline " "
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bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration and Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
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bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
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bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
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line.long 0x14 "SHPR1,System Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
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bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
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bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
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bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active"
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textline " "
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bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
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bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "UFSR,Usage Fault Status Register"
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eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error"
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textline " "
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eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
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textline " "
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eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x03
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line.long 0x00 "HFSR,HardFault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
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if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48)
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group.long 0xD8C++0x03
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line.long 0x00 "NSACR,Non-Secure Access Control Register"
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bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled"
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bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled"
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bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled"
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bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled"
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bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled"
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bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled"
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bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled"
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else
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hgroup.long 0xD8C++0x03
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hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)"
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endif
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Triggered Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended"
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tree "Memory System"
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width 10.
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rgroup.long 0xD78++0x03
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line.long 0x00 "CLIDR,Cache Level ID Register"
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bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
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bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
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bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
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textline " "
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bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
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bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
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bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
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textline " "
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bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
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bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
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bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
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textline " "
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|
bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000)
|
|
rgroup.long 0xD7C++0x03
|
|
line.long 0x00 "CTR,Cache Type Register"
|
|
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
|
|
bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
rgroup.long 0xD7C++0x03
|
|
line.long 0x00 "CTR,Cache Type Register"
|
|
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
|
|
endif
|
|
rgroup.long 0xD80++0x03
|
|
line.long 0x00 "CCSIDR,Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
|
|
bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
|
|
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
|
|
group.long 0xD84++0x03
|
|
line.long 0x00 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
|
|
bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
|
|
wgroup.long 0xF50++0x03
|
|
line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
|
|
wgroup.long 0xF58++0x23
|
|
line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
|
|
line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
|
|
line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
|
|
hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
|
|
bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
|
|
line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
|
|
line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
|
|
line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
|
|
hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
|
|
bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
|
|
line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
|
|
line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
|
|
hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
|
|
bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
|
|
line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
|
|
tree.end
|
|
tree "Feature Registers"
|
|
width 10.
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..."
|
|
rgroup.long 0xD4C++0x03
|
|
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..."
|
|
rgroup.long 0xD54++0x03
|
|
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD5C++0x03
|
|
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
|
|
bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x03
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
rgroup.long 0xD64++0x03
|
|
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..."
|
|
rgroup.long 0xD68++0x03
|
|
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..."
|
|
bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..."
|
|
rgroup.long 0xD6C++0x03
|
|
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..."
|
|
rgroup.long 0xD70++0x03
|
|
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..."
|
|
bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..."
|
|
bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..."
|
|
tree.end
|
|
tree "CoreSight Identification Registers"
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 11.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "DPIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "DPIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "DPIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "DPIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "DCIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "DCIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0c "DCIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
|
|
endif
|
|
tree.end
|
|
newline
|
|
group.long 0xDC0++0x07
|
|
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
|
|
bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
|
|
bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Security Attribution Unit (SAU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
group.long 0xDD0++0x03
|
|
line.long 0x00 "SAU_CTRL,SAU Control Register"
|
|
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
|
|
rgroup.long 0xDD4++0x03
|
|
line.long 0x00 "SAU_TYPE,SAU Type Register"
|
|
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..."
|
|
group.long 0xDD8++0x03
|
|
line.long 0x00 "SAU_RNR,SAU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
|
|
tree.close "SAU regions"
|
|
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0
|
|
group.long 0xDDC++0x03 "Region 0"
|
|
saveout 0xDD8 %l 0x0
|
|
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1
|
|
group.long 0xDDC++0x03 "Region 1"
|
|
saveout 0xDD8 %l 0x1
|
|
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2
|
|
group.long 0xDDC++0x03 "Region 2"
|
|
saveout 0xDD8 %l 0x2
|
|
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3
|
|
group.long 0xDDC++0x03 "Region 3"
|
|
saveout 0xDD8 %l 0x3
|
|
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4
|
|
group.long 0xDDC++0x03 "Region 4"
|
|
saveout 0xDD8 %l 0x4
|
|
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5
|
|
group.long 0xDDC++0x03 "Region 5"
|
|
saveout 0xDD8 %l 0x5
|
|
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6
|
|
group.long 0xDDC++0x03 "Region 6"
|
|
saveout 0xDD8 %l 0x6
|
|
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7
|
|
group.long 0xDDC++0x03 "Region 7"
|
|
saveout 0xDD8 %l 0x7
|
|
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
endif
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
endif
|
|
tree.end
|
|
group.long 0xDE4++0x03
|
|
line.long 0x00 "SFSR,Secure Fault Status Register"
|
|
bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid"
|
|
bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred"
|
|
group.long 0xDE8++0x03
|
|
line.long 0x00 "SFAR,Secure Fault Address Register"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511"
|
|
width 24.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x104++0x03
|
|
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x10C++0x03
|
|
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x110++0x03
|
|
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x114++0x03
|
|
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x118++0x03
|
|
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x11C++0x03
|
|
hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x120++0x03
|
|
hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x124++0x03
|
|
hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x128++0x03
|
|
hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x12C++0x03
|
|
hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x130++0x03
|
|
hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x134++0x03
|
|
hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x138++0x03
|
|
hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x13C++0x03
|
|
hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
width 24.
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x204++0x03
|
|
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x208++0x03
|
|
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x20C++0x03
|
|
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x210++0x03
|
|
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x214++0x03
|
|
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x218++0x03
|
|
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x21C++0x03
|
|
hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x220++0x03
|
|
hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
group.long 0x224++0x03
|
|
line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x224++0x03
|
|
hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x228++0x03
|
|
hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
group.long 0x22C++0x03
|
|
line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x22C++0x03
|
|
hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x230++0x03
|
|
hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
group.long 0x234++0x03
|
|
line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x234++0x03
|
|
hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
group.long 0x238++0x03
|
|
line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x238++0x03
|
|
hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
|
|
group.long 0x23C++0x03
|
|
line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x23C++0x03
|
|
hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
width 11.
|
|
tree "Interrupt Active Bit Registers"
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE0,Active Bit Register 0"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
rgroup.long 0x304++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x304++0x03
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
rgroup.long 0x308++0x03
|
|
line.long 0x00 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x308++0x03
|
|
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
rgroup.long 0x30C++0x03
|
|
line.long 0x00 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x30C++0x03
|
|
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
rgroup.long 0x310++0x03
|
|
line.long 0x00 "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x310++0x03
|
|
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
rgroup.long 0x314++0x03
|
|
line.long 0x00 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x314++0x03
|
|
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
rgroup.long 0x318++0x03
|
|
line.long 0x00 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x318++0x03
|
|
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
rgroup.long 0x31C++0x03
|
|
line.long 0x00 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x31C++0x03
|
|
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
rgroup.long 0x320++0x03
|
|
line.long 0x00 "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x320++0x03
|
|
hide.long 0x00 "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
rgroup.long 0x324++0x03
|
|
line.long 0x00 "ACTIVE9,Active Bit Register 9"
|
|
bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x324++0x03
|
|
hide.long 0x00 "ACTIVE9,Active Bit Register 9"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
rgroup.long 0x328++0x03
|
|
line.long 0x00 "ACTIVE10,Active Bit Register 10"
|
|
bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x328++0x03
|
|
hide.long 0x00 "ACTIVE10,Active Bit Register 10"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
rgroup.long 0x32C++0x03
|
|
line.long 0x00 "ACTIVE11,Active Bit Register 11"
|
|
bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x32C++0x03
|
|
hide.long 0x00 "ACTIVE11,Active Bit Register 11"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
rgroup.long 0x330++0x03
|
|
line.long 0x00 "ACTIVE12,Active Bit Register 12"
|
|
bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x330++0x03
|
|
hide.long 0x00 "ACTIVE12,Active Bit Register 12"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
rgroup.long 0x334++0x03
|
|
line.long 0x00 "ACTIVE13,Active Bit Register 13"
|
|
bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x334++0x03
|
|
hide.long 0x00 "ACTIVE13,Active Bit Register 13"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
rgroup.long 0x338++0x03
|
|
line.long 0x00 "ACTIVE14,Active Bit Register 14"
|
|
bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x338++0x03
|
|
hide.long 0x00 "ACTIVE14,Active Bit Register 14"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
|
|
rgroup.long 0x33C++0x03
|
|
line.long 0x00 "ACTIVE15,Active Bit Register 15"
|
|
bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x33C++0x03
|
|
hide.long 0x00 "ACTIVE15,Active Bit Register 15"
|
|
endif
|
|
tree.end
|
|
width 13.
|
|
tree "Interrupt Target Non-Secure Registers"
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
|
|
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x384++0x03
|
|
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
|
|
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x384++0x03
|
|
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x388++0x03
|
|
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
|
|
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x388++0x03
|
|
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x38C++0x03
|
|
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
|
|
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x38C++0x03
|
|
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x390++0x03
|
|
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
|
|
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x390++0x03
|
|
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x394++0x03
|
|
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
|
|
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x394++0x03
|
|
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x398++0x03
|
|
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
|
|
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x398++0x03
|
|
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x39C++0x03
|
|
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
|
|
bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x39C++0x03
|
|
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
group.long 0x3A0++0x03
|
|
line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
|
|
bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3A0++0x03
|
|
hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
group.long 0x3A4++0x03
|
|
line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
|
|
bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3A4++0x03
|
|
hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
group.long 0x3A8++0x03
|
|
line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
|
|
bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3A8++0x03
|
|
hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
group.long 0x3AC++0x03
|
|
line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
|
|
bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3AC++0x03
|
|
hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
group.long 0x3B0++0x03
|
|
line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
|
|
bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3B0++0x03
|
|
hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
group.long 0x3B4++0x03
|
|
line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
|
|
bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3B4++0x03
|
|
hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
group.long 0x3B8++0x03
|
|
line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
|
|
bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3B8++0x03
|
|
hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F)
|
|
group.long 0x3BC++0x03
|
|
line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
|
|
bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3BC++0x03
|
|
hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x420++0x1F
|
|
line.long 0x0 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x4 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x8 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0xC "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x10 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x14 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x18 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x1C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
else
|
|
hgroup.long 0x420++0x1F
|
|
hide.long 0x0 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR10,Interrupt Priority Register"
|
|
hide.long 0xC "IPR11,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR15,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x440++0x1F
|
|
line.long 0x0 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x4 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x8 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0xC "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x10 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x14 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x18 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x1C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
else
|
|
hgroup.long 0x440++0x1F
|
|
hide.long 0x0 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR18,Interrupt Priority Register"
|
|
hide.long 0xC "IPR19,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR23,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x460++0x1F
|
|
line.long 0x0 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x4 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x8 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0xC "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x10 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x14 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x18 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x1C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
else
|
|
hgroup.long 0x460++0x1F
|
|
hide.long 0x0 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR26,Interrupt Priority Register"
|
|
hide.long 0xC "IPR27,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR31,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x480++0x1F
|
|
line.long 0x0 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x4 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x8 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0xC "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x10 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x14 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x18 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x1C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
else
|
|
hgroup.long 0x480++0x1F
|
|
hide.long 0x0 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR34,Interrupt Priority Register"
|
|
hide.long 0xC "IPR35,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR39,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x4A0++0x1F
|
|
line.long 0x0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0x4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0x8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0x10 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0x14 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0x18 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0x1C "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
else
|
|
hgroup.long 0x4A0++0x1F
|
|
hide.long 0x0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xC "IPR43,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR44,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR45,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR46,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR47,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x4C0++0x1F
|
|
line.long 0x0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0x4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0x8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0x10 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0x14 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0x18 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0x1C "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
else
|
|
hgroup.long 0x4C0++0x1F
|
|
hide.long 0x0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xC "IPR51,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR52,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR53,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR54,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR55,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x4E0++0x1F
|
|
line.long 0x0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0x4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0x8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
line.long 0x10 "IPR60,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority"
|
|
line.long 0x14 "IPR61,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority"
|
|
line.long 0x18 "IPR62,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority"
|
|
line.long 0x1C "IPR63,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority"
|
|
else
|
|
hgroup.long 0x4E0++0x1F
|
|
hide.long 0x0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xC "IPR59,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR60,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR61,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR62,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR63,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
group.long 0x500++0x1F
|
|
line.long 0x0 "IPR64,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority"
|
|
line.long 0x4 "IPR65,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority"
|
|
line.long 0x8 "IPR66,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority"
|
|
line.long 0xC "IPR67,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority"
|
|
line.long 0x10 "IPR68,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority"
|
|
line.long 0x14 "IPR69,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority"
|
|
line.long 0x18 "IPR70,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority"
|
|
line.long 0x1C "IPR71,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority"
|
|
else
|
|
hgroup.long 0x500++0x1F
|
|
hide.long 0x0 "IPR64,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR65,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR66,Interrupt Priority Register"
|
|
hide.long 0xC "IPR67,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR68,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR69,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR70,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR71,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
group.long 0x520++0x1F
|
|
line.long 0x0 "IPR72,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority"
|
|
line.long 0x4 "IPR73,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority"
|
|
line.long 0x8 "IPR74,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority"
|
|
line.long 0xC "IPR75,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority"
|
|
line.long 0x10 "IPR76,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority"
|
|
line.long 0x14 "IPR77,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority"
|
|
line.long 0x18 "IPR78,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority"
|
|
line.long 0x1C "IPR79,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority"
|
|
else
|
|
hgroup.long 0x520++0x1F
|
|
hide.long 0x0 "IPR72,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR73,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR74,Interrupt Priority Register"
|
|
hide.long 0xC "IPR75,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR76,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR77,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR78,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR79,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
group.long 0x540++0x1F
|
|
line.long 0x0 "IPR80,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority"
|
|
line.long 0x4 "IPR81,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority"
|
|
line.long 0x8 "IPR82,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority"
|
|
line.long 0xC "IPR83,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority"
|
|
line.long 0x10 "IPR84,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority"
|
|
line.long 0x14 "IPR85,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority"
|
|
line.long 0x18 "IPR86,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority"
|
|
line.long 0x1C "IPR87,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority"
|
|
else
|
|
hgroup.long 0x540++0x1F
|
|
hide.long 0x0 "IPR80,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR81,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR82,Interrupt Priority Register"
|
|
hide.long 0xC "IPR83,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR84,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR85,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR86,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR87,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
group.long 0x560++0x1F
|
|
line.long 0x0 "IPR88,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority"
|
|
line.long 0x4 "IPR89,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority"
|
|
line.long 0x8 "IPR90,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority"
|
|
line.long 0xC "IPR91,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority"
|
|
line.long 0x10 "IPR92,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority"
|
|
line.long 0x14 "IPR93,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority"
|
|
line.long 0x18 "IPR94,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority"
|
|
line.long 0x1C "IPR95,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority"
|
|
else
|
|
hgroup.long 0x560++0x1F
|
|
hide.long 0x0 "IPR88,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR89,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR90,Interrupt Priority Register"
|
|
hide.long 0xC "IPR91,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR92,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR93,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR94,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR95,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
group.long 0x580++0x1F
|
|
line.long 0x0 "IPR96,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority"
|
|
line.long 0x4 "IPR97,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority"
|
|
line.long 0x8 "IPR98,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority"
|
|
line.long 0xC "IPR99,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority"
|
|
line.long 0x10 "IPR100,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority"
|
|
line.long 0x14 "IPR101,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority"
|
|
line.long 0x18 "IPR102,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority"
|
|
line.long 0x1C "IPR103,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority"
|
|
else
|
|
hgroup.long 0x580++0x1F
|
|
hide.long 0x0 "IPR96,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR97,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR98,Interrupt Priority Register"
|
|
hide.long 0xC "IPR99,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR100,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR101,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR102,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR103,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
group.long 0x5A0++0x1F
|
|
line.long 0x0 "IPR104,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority"
|
|
line.long 0x4 "IPR105,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority"
|
|
line.long 0x8 "IPR106,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority"
|
|
line.long 0xC "IPR107,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority"
|
|
line.long 0x10 "IPR108,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority"
|
|
line.long 0x14 "IPR109,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority"
|
|
line.long 0x18 "IPR110,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority"
|
|
line.long 0x1C "IPR111,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority"
|
|
else
|
|
hgroup.long 0x5A0++0x1F
|
|
hide.long 0x0 "IPR104,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR105,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR106,Interrupt Priority Register"
|
|
hide.long 0xC "IPR107,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR108,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR109,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR110,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR111,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
group.long 0x5C0++0x1F
|
|
line.long 0x0 "IPR112,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority"
|
|
line.long 0x4 "IPR113,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority"
|
|
line.long 0x8 "IPR114,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority"
|
|
line.long 0xC "IPR115,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority"
|
|
line.long 0x10 "IPR116,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority"
|
|
line.long 0x14 "IPR117,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority"
|
|
line.long 0x18 "IPR118,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority"
|
|
line.long 0x1C "IPR119,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority"
|
|
else
|
|
hgroup.long 0x5C0++0x1F
|
|
hide.long 0x0 "IPR112,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR113,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR114,Interrupt Priority Register"
|
|
hide.long 0xC "IPR115,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR116,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR117,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR118,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR119,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif (CORENAME()=="CORTEXM33F")
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored"
|
|
newline
|
|
bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only"
|
|
bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure"
|
|
newline
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
newline
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x0B
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
newline
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..."
|
|
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
|
|
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 13.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
group.long 0xE04++0x07
|
|
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
|
|
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
|
|
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
|
|
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
|
|
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
|
|
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
|
|
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
|
|
rgroup.long 0xFB8++0x03
|
|
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
|
|
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
|
|
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
|
|
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 12.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..."
|
|
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000)
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
|
|
hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address"
|
|
else
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
tree "CoreSight Identification Registers"
|
|
width 12.
|
|
rgroup.long 0xFCC++0x03
|
|
line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register"
|
|
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
|
|
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "FP_PIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "FP_PIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "FP_PIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "FP_PIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "FP_CIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "FP_CIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0c "FP_CIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 16.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..."
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DWT_CYCCNT,Cycle Count register"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000)
|
|
group.long 0x08++0x17
|
|
line.long 0x00 "DWT_CPICNT,CPI Count register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter"
|
|
line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x10 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter"
|
|
line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
endif
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
endif
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
endif
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
endif
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
|
|
tree "CoreSight Identification Registers"
|
|
width 13.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFCC++0x03
|
|
line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register"
|
|
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
|
|
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "DWT_CIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "DWT_CIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0c "DWT_CIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
autoindent.on center tree
|
|
tree "ADC (Analog to digital converter)"
|
|
tree "ADC"
|
|
base ad:0x40012000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 5. "ROVF,Regular data register overflow" "0,1"
|
|
bitfld.long 0x00 4. "STRC,Start flag of regular channel group" "0,1"
|
|
bitfld.long 0x00 3. "STIC,Start flag of inserted channel group" "0,1"
|
|
bitfld.long 0x00 2. "EOIC,End of inserted group conversion flag" "0,1"
|
|
bitfld.long 0x00 1. "EOC,End of group conversion flag" "0,1"
|
|
bitfld.long 0x00 0. "WDE,Analog watchdog event flag" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 26. "ROVFIE,Interrupt enable for ROVF" "0,1"
|
|
bitfld.long 0x00 23. "RWDEN,Regular channel analog watchdog enable" "0,1"
|
|
bitfld.long 0x00 22. "IWDEN,Inserted channel analog watchdog enable" "0,1"
|
|
bitfld.long 0x00 13.--15. "DISNUM,Number of conversions in discontinuous mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. "DISIC,Discontinuous mode on inserted channels" "0,1"
|
|
bitfld.long 0x00 11. "DISRC,Discontinuous mode on regular channels" "0,1"
|
|
bitfld.long 0x00 10. "ICA,Inserted channel group convert automatically" "0,1"
|
|
bitfld.long 0x00 9. "WDSC,When in scan mode analog watchdog is effective on a single channel" "0,1"
|
|
bitfld.long 0x00 8. "SM,Scan mode" "0,1"
|
|
bitfld.long 0x00 7. "EOICIE,Interrupt enable for EOIC" "0,1"
|
|
bitfld.long 0x00 6. "WDEIE,Analog watchdog WDE" "0,1"
|
|
bitfld.long 0x00 5. "EOCIE,Interrupt enable for EOC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "WDCHSEL,Analog watchdog channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 30. "SWRCST,Software start on regular channel" "0,1"
|
|
bitfld.long 0x00 28.--29. "ETMRC,External trigger mode for regular channel" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. "ETSRC,External trigger select for regular channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. "SWICST,Software start on inserted channel" "0,1"
|
|
bitfld.long 0x00 20.--21. "ETMIC,External trigger mode for inserted channel" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "ETSIC,External trigger select for inserted channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. "DAL,Data alignment" "0,1"
|
|
bitfld.long 0x00 10. "EOCM,End of conversion mode" "0,1"
|
|
bitfld.long 0x00 9. "DDM,DMA disable mode" "0,1"
|
|
bitfld.long 0x00 8. "DMA,DMA request enable" "0,1"
|
|
bitfld.long 0x00 1. "CTN,Continuous mode" "0,1"
|
|
bitfld.long 0x00 0. "ADCON,ADC on" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SAMPT0,Sample time register 0"
|
|
bitfld.long 0x00 3.--5. "SPT11,Channel 11 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SPT10,Channel 10 sample time selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SAMPT1,Sample time register 1"
|
|
bitfld.long 0x00 27.--29. "SPT9,Channel 9 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. "SPT8,Channel 8 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 21.--23. "SPT7,Channel 7 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "SPT6,Channel 6 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--17. "SPT5,Channel 5 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "SPT4,Channel 4 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 9.--11. "SPT3,Channel 3 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "SPT2,Channel 2 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. "SPT1,Channel 1 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SPT0,Channel 0 sample time selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IOFF0,Inserted channel data offset register 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for inserted channel 0"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IOFF1,Inserted channel data offset register 1"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for inserted channel 1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IOFF2,Inserted channel data offset register 2"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for inserted channel 2"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IOFF3,Inserted channel data offset register 3"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for inserted channel 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WDHT,watchdog higher threshold register"
|
|
hexmask.long.word 0x00 0.--11. 1. "WDHT,Analog watchdog higher threshold"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WDLT,watchdog lower threshold register"
|
|
hexmask.long.word 0x00 0.--11. 1. "WDLT,Analog watchdog lower threshold"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "RSQ0,regular sequence register 0"
|
|
bitfld.long 0x00 20.--23. "RL,Regular channel group length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "RSQ1,regular sequence register 1"
|
|
bitfld.long 0x00 10.--14. "RSQ8,9th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. "RSQ7,8th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "RSQ6,7th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "RSQ2,regular sequence register 2"
|
|
bitfld.long 0x00 25.--29. "RSQ5,6th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. "RSQ4,5th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15.--19. "RSQ3,4th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10.--14. "RSQ2,3rd conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. "RSQ1,2nd conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "RSQ0,1st conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "ISQ,Inserted sequence register"
|
|
bitfld.long 0x00 20.--21. "IL,Inserted channel group length" "0,1,2,3"
|
|
bitfld.long 0x00 15.--19. "ISQ3,4th conversion in inserted sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10.--14. "ISQ2,3rd conversion in inserted sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. "ISQ1,2nd conversion in inserted sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "ISQ0,1st conversion in inserted sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "IDATA0,Inserted data register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Inserted number 0 conversion data"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "IDATA1,Inserted data register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Inserted number 1 conversion data"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "IDATA2,Inserted data register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Inserted number 2 conversion data"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "IDATA3,Inserted data register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Inserted number 3 conversion data"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "RDATA,regular data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RDATA,Regular channel data"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "OVSAMPCTL,Oversample control register"
|
|
bitfld.long 0x00 9. "TOVS,Triggered Oversampling" "0,1"
|
|
bitfld.long 0x00 5.--8. "OVSS,Oversampling shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--4. "OVSR,Oversampling ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "OVSEN,Oversampling Enable" "0,1"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "CCTL,Commom control register"
|
|
bitfld.long 0x00 23. "TSVREN,Channel 9 (temperature sensor) and 10 (internal reference voltage) enable of ADC" "0,1"
|
|
bitfld.long 0x00 22. "VBATEN,Channel 11 (1/4 voltageof external battery) enable of ADC" "0,1"
|
|
bitfld.long 0x00 16.--18. "ADCCK,ADC clock" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "SEC_ADC"
|
|
base ad:0x50012000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 5. "ROVF,Regular data register overflow" "0,1"
|
|
bitfld.long 0x00 4. "STRC,Start flag of regular channel group" "0,1"
|
|
bitfld.long 0x00 3. "STIC,Start flag of inserted channel group" "0,1"
|
|
bitfld.long 0x00 2. "EOIC,End of inserted group conversion flag" "0,1"
|
|
bitfld.long 0x00 1. "EOC,End of group conversion flag" "0,1"
|
|
bitfld.long 0x00 0. "WDE,Analog watchdog event flag" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 26. "ROVFIE,Interrupt enable for ROVF" "0,1"
|
|
bitfld.long 0x00 23. "RWDEN,Regular channel analog watchdog enable" "0,1"
|
|
bitfld.long 0x00 22. "IWDEN,Inserted channel analog watchdog enable" "0,1"
|
|
bitfld.long 0x00 13.--15. "DISNUM,Number of conversions in discontinuous mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. "DISIC,Discontinuous mode on inserted channels" "0,1"
|
|
bitfld.long 0x00 11. "DISRC,Discontinuous mode on regular channels" "0,1"
|
|
bitfld.long 0x00 10. "ICA,Inserted channel group convert automatically" "0,1"
|
|
bitfld.long 0x00 9. "WDSC,When in scan mode analog watchdog is effective on a single channel" "0,1"
|
|
bitfld.long 0x00 8. "SM,Scan mode" "0,1"
|
|
bitfld.long 0x00 7. "EOICIE,Interrupt enable for EOIC" "0,1"
|
|
bitfld.long 0x00 6. "WDEIE,Analog watchdog WDE" "0,1"
|
|
bitfld.long 0x00 5. "EOCIE,Interrupt enable for EOC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "WDCHSEL,Analog watchdog channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 30. "SWRCST,Software start on regular channel" "0,1"
|
|
bitfld.long 0x00 28.--29. "ETMRC,External trigger mode for regular channel" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. "ETSRC,External trigger select for regular channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. "SWICST,Software start on inserted channel" "0,1"
|
|
bitfld.long 0x00 20.--21. "ETMIC,External trigger mode for inserted channel" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "ETSIC,External trigger select for inserted channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. "DAL,Data alignment" "0,1"
|
|
bitfld.long 0x00 10. "EOCM,End of conversion mode" "0,1"
|
|
bitfld.long 0x00 9. "DDM,DMA disable mode" "0,1"
|
|
bitfld.long 0x00 8. "DMA,DMA request enable" "0,1"
|
|
bitfld.long 0x00 1. "CTN,Continuous mode" "0,1"
|
|
bitfld.long 0x00 0. "ADCON,ADC on" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SAMPT0,Sample time register 0"
|
|
bitfld.long 0x00 3.--5. "SPT11,Channel 11 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SPT10,Channel 10 sample time selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SAMPT1,Sample time register 1"
|
|
bitfld.long 0x00 27.--29. "SPT9,Channel 9 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. "SPT8,Channel 8 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 21.--23. "SPT7,Channel 7 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "SPT6,Channel 6 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--17. "SPT5,Channel 5 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "SPT4,Channel 4 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 9.--11. "SPT3,Channel 3 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "SPT2,Channel 2 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. "SPT1,Channel 1 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SPT0,Channel 0 sample time selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IOFF0,Inserted channel data offset register 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for inserted channel 0"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IOFF1,Inserted channel data offset register 1"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for inserted channel 1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IOFF2,Inserted channel data offset register 2"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for inserted channel 2"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IOFF3,Inserted channel data offset register 3"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for inserted channel 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WDHT,watchdog higher threshold register"
|
|
hexmask.long.word 0x00 0.--11. 1. "WDHT,Analog watchdog higher threshold"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WDLT,watchdog lower threshold register"
|
|
hexmask.long.word 0x00 0.--11. 1. "WDLT,Analog watchdog lower threshold"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "RSQ0,regular sequence register 0"
|
|
bitfld.long 0x00 20.--23. "RL,Regular channel group length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "RSQ1,regular sequence register 1"
|
|
bitfld.long 0x00 10.--14. "RSQ8,9th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. "RSQ7,8th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "RSQ6,7th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "RSQ2,regular sequence register 2"
|
|
bitfld.long 0x00 25.--29. "RSQ5,6th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. "RSQ4,5th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15.--19. "RSQ3,4th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10.--14. "RSQ2,3rd conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. "RSQ1,2nd conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "RSQ0,1st conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "ISQ,Inserted sequence register"
|
|
bitfld.long 0x00 20.--21. "IL,Inserted channel group length" "0,1,2,3"
|
|
bitfld.long 0x00 15.--19. "ISQ3,4th conversion in inserted sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10.--14. "ISQ2,3rd conversion in inserted sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. "ISQ1,2nd conversion in inserted sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "ISQ0,1st conversion in inserted sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "IDATA0,Inserted data register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Inserted number 0 conversion data"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "IDATA1,Inserted data register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Inserted number 1 conversion data"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "IDATA2,Inserted data register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Inserted number 2 conversion data"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "IDATA3,Inserted data register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Inserted number 3 conversion data"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "RDATA,regular data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RDATA,Regular channel data"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "OVSAMPCTL,Oversample control register"
|
|
bitfld.long 0x00 9. "TOVS,Triggered Oversampling" "0,1"
|
|
bitfld.long 0x00 5.--8. "OVSS,Oversampling shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--4. "OVSR,Oversampling ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "OVSEN,Oversampling Enable" "0,1"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "CCTL,Commom control register"
|
|
bitfld.long 0x00 23. "TSVREN,Channel 9 (temperature sensor) and 10 (internal reference voltage) enable of ADC" "0,1"
|
|
bitfld.long 0x00 22. "VBATEN,Channel 11 (1/4 voltageof external battery) enable of ADC" "0,1"
|
|
bitfld.long 0x00 16.--18. "ADCCK,ADC clock" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree.end
|
|
tree "CAU (Cryptographic acceleration unit)"
|
|
tree "CAU"
|
|
base ad:0x4C060000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,CAU control register"
|
|
bitfld.long 0x00 19. "ALGM_3,Encryption/decryption algorithm mode bit 3" "0,1"
|
|
bitfld.long 0x00 16.--17. "GCM_CCMPH,GCM CCM phase" "0,1,2,3"
|
|
bitfld.long 0x00 15. "CAUEN,Cryptographic module enable" "0,1"
|
|
bitfld.long 0x00 14. "FFLUSH,FIFO flush" "0,1"
|
|
bitfld.long 0x00 8.--9. "KEYM,AES key size mode configuration" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "DATAM,Data swapping type mode configuration" "0,1,2,3"
|
|
bitfld.long 0x00 3.--5. "ALGM,Encryption/decryption algorithm mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "CAUDIR,CAU direction" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT0,CAU status register 0"
|
|
bitfld.long 0x00 4. "BUSY,BUSY flag" "0,1"
|
|
bitfld.long 0x00 3. "OFU,OUT FIFO full flag" "0,1"
|
|
bitfld.long 0x00 2. "ONE,OUT FIFO not empty flag" "0,1"
|
|
bitfld.long 0x00 1. "INF,IN FIFO not full flag" "0,1"
|
|
bitfld.long 0x00 0. "IEM,IN FIFO empty flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DI,CAU data input register"
|
|
hexmask.long 0x00 0.--31. 1. "DI,Data input"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "DO,CAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO,Data output"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DMAEN,CAU DMA enable register"
|
|
bitfld.long 0x00 1. "DMAOEN,Out FIFO DMA enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAIEN,In FIFO DMA enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "INTEN,CAU interrupt enable register"
|
|
bitfld.long 0x00 1. "OINTEN,Out FIFO interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "IINTEN,In FIFO interrupt enable" "0,1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "STAT1,CAU interrupt status flag register 1"
|
|
bitfld.long 0x00 1. "OSTA,Out FIFO interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "ISTA,In FIFO interrupt flag" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "INTF,CAU enable interrupt status flag register"
|
|
bitfld.long 0x00 1. "OINTF,Out FIFO enabled interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "IINTF,In FIFO enabled interrupt flag" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "KEY0H,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY0H,Key for DES TDES AES"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "KEY0L,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY0L,Key for DES TDES AES"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "KEY1H,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY1H,Key for DES TDES AES"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "KEY1L,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY1L,Key for DES TDES AES"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "KEY2H,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY2H,Key for DES TDES AES"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "KEY2L,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY2L,Key for DES TDES AES"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "KEY3H,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY3H,Key for DES TDES AES"
|
|
wgroup.long 0x3C++0x03
|
|
line.long 0x00 "KEY3L,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY3L,Key for DES TDES AES"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IV0H,CAU initialization register"
|
|
hexmask.long 0x00 0.--31. 1. "IV0H,The initialization vector for DES TDES AES"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IV0L,CAU initialization register"
|
|
hexmask.long 0x00 0.--31. 1. "IV0L,The initialization vector for DES TDES AES"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "IV1H,CAU initialization register"
|
|
hexmask.long 0x00 0.--31. 1. "IV1H,The initialization vector for DES TDES AES"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "IV1L,CAU initialization register"
|
|
hexmask.long 0x00 0.--31. 1. "IV1L,The initialization vector for DES TDES AES"
|
|
tree.end
|
|
tree "SEC_CAU"
|
|
base ad:0x5C060000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,CAU control register"
|
|
bitfld.long 0x00 19. "ALGM_3,Encryption/decryption algorithm mode bit 3" "0,1"
|
|
bitfld.long 0x00 16.--17. "GCM_CCMPH,GCM CCM phase" "0,1,2,3"
|
|
bitfld.long 0x00 15. "CAUEN,Cryptographic module enable" "0,1"
|
|
bitfld.long 0x00 14. "FFLUSH,FIFO flush" "0,1"
|
|
bitfld.long 0x00 8.--9. "KEYM,AES key size mode configuration" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "DATAM,Data swapping type mode configuration" "0,1,2,3"
|
|
bitfld.long 0x00 3.--5. "ALGM,Encryption/decryption algorithm mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "CAUDIR,CAU direction" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT0,CAU status register 0"
|
|
bitfld.long 0x00 4. "BUSY,BUSY flag" "0,1"
|
|
bitfld.long 0x00 3. "OFU,OUT FIFO full flag" "0,1"
|
|
bitfld.long 0x00 2. "ONE,OUT FIFO not empty flag" "0,1"
|
|
bitfld.long 0x00 1. "INF,IN FIFO not full flag" "0,1"
|
|
bitfld.long 0x00 0. "IEM,IN FIFO empty flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DI,CAU data input register"
|
|
hexmask.long 0x00 0.--31. 1. "DI,Data input"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "DO,CAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO,Data output"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DMAEN,CAU DMA enable register"
|
|
bitfld.long 0x00 1. "DMAOEN,Out FIFO DMA enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAIEN,In FIFO DMA enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "INTEN,CAU interrupt enable register"
|
|
bitfld.long 0x00 1. "OINTEN,Out FIFO interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "IINTEN,In FIFO interrupt enable" "0,1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "STAT1,CAU interrupt status flag register 1"
|
|
bitfld.long 0x00 1. "OSTA,Out FIFO interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "ISTA,In FIFO interrupt flag" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "INTF,CAU enable interrupt status flag register"
|
|
bitfld.long 0x00 1. "OINTF,Out FIFO enabled interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "IINTF,In FIFO enabled interrupt flag" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "KEY0H,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY0H,Key for DES TDES AES"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "KEY0L,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY0L,Key for DES TDES AES"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "KEY1H,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY1H,Key for DES TDES AES"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "KEY1L,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY1L,Key for DES TDES AES"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "KEY2H,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY2H,Key for DES TDES AES"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "KEY2L,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY2L,Key for DES TDES AES"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "KEY3H,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY3H,Key for DES TDES AES"
|
|
wgroup.long 0x3C++0x03
|
|
line.long 0x00 "KEY3L,CAU key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY3L,Key for DES TDES AES"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IV0H,CAU initialization register"
|
|
hexmask.long 0x00 0.--31. 1. "IV0H,The initialization vector for DES TDES AES"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IV0L,CAU initialization register"
|
|
hexmask.long 0x00 0.--31. 1. "IV0L,The initialization vector for DES TDES AES"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "IV1H,CAU initialization register"
|
|
hexmask.long 0x00 0.--31. 1. "IV1H,The initialization vector for DES TDES AES"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "IV1L,CAU initialization register"
|
|
hexmask.long 0x00 0.--31. 1. "IV1L,The initialization vector for DES TDES AES"
|
|
tree.end
|
|
tree.end
|
|
tree "CRC (Cyclic redundancy check calculation unit)"
|
|
tree "CRC"
|
|
base ad:0x40023000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,Data register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,CRC calculation result bits"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FDATA,Free data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FDATA,Free Data Register bits"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 0. "RST,reset the CRC_DATA register" "0,1"
|
|
tree.end
|
|
tree "SEC_CRC"
|
|
base ad:0x50023000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,Data register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,CRC calculation result bits"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FDATA,Free data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FDATA,Free Data Register bits"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 0. "RST,reset the CRC_DATA register" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "DBG (Debug support)"
|
|
base ad:0xE0044000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "ID,ID code register"
|
|
hexmask.long 0x00 0.--31. 1. "ID_CODE,DBG ID code register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 6.--7. "TRACE_MODE,Trace pin allocation mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TRACE_IOEN,Trace pin allocation enable" "0,1"
|
|
bitfld.long 0x00 2. "STB_HOLD,Standby mode hold register" "0,1"
|
|
bitfld.long 0x00 1. "DSLP_HOLD,Deep-sleep mode hold register" "0,1"
|
|
bitfld.long 0x00 0. "SLP_HOLD,Sleep mode hold register" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
bitfld.long 0x00 22. "I2C1_HOLD,I2C1 hold register" "0,1"
|
|
bitfld.long 0x00 21. "I2C0_HOLD,I2C0 hold register" "0,1"
|
|
bitfld.long 0x00 12. "FWDGT_HOLD,FWDGT hold register" "0,1"
|
|
bitfld.long 0x00 11. "WWDGT_HOLD,WWDGT hold register" "0,1"
|
|
bitfld.long 0x00 10. "RTC_HOLD,RTC hold register" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5_HOLD,TIMER 5 hold register" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4_HOLD,TIMER 4 hold register" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3_HOLD,TIMER 3 hold register" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TIMER2_HOLD,TIMER 2 hold register" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1_HOLD,TIMER 1 hold register" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
bitfld.long 0x00 24. "TIMER16_HOLD,TIMER 16 hold register" "0,1"
|
|
bitfld.long 0x00 23. "TIMER15_HOLD,TIMER 15 hold register" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0_HOLD,TIMER 0 hold register" "0,1"
|
|
tree.end
|
|
tree "DCB (Debug Control Block)"
|
|
base ad:0xE000EE08
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DSCSR,Debug Security Control and Status Register"
|
|
bitfld.long 0x00 16. "CDS,Current domain Secure" "0,1"
|
|
tree.end
|
|
sif cpuis("GD32W515P*")
|
|
tree "DCI (Digital Camera Interface)"
|
|
tree "DCI"
|
|
base ad:0x4C050000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 14. "DCIEN,DCI Enable" "0,1"
|
|
bitfld.long 0x00 10.--11. "DCIF,Digital camera interface format" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "FR,Frame rate" "0,1,2,3"
|
|
bitfld.long 0x00 7. "VPS,Vertical Polarity Selection" "0,1"
|
|
bitfld.long 0x00 6. "HPS,Horizontal Polarity Selection" "0,1"
|
|
bitfld.long 0x00 5. "CKS,Clock Polarity Selection" "0,1"
|
|
bitfld.long 0x00 4. "ESM,Embedded Synchronous Mode" "0,1"
|
|
bitfld.long 0x00 3. "JM,JPEG mode" "0,1"
|
|
bitfld.long 0x00 2. "WDEN,Window Enable" "0,1"
|
|
bitfld.long 0x00 1. "SNAP,Snapshot mode" "0,1"
|
|
bitfld.long 0x00 0. "CAP,Capture Enable" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT0,Status register 0"
|
|
bitfld.long 0x00 2. "FV,FIFO Valid" "0,1"
|
|
bitfld.long 0x00 1. "VS,VS line status" "0,1"
|
|
bitfld.long 0x00 0. "HS,HS line status" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STAT1,Status register 1"
|
|
bitfld.long 0x00 4. "ELF,End of Line Flag" "0,1"
|
|
bitfld.long 0x00 3. "VSF,Vsync Flag" "0,1"
|
|
bitfld.long 0x00 2. "ESEF,Embedded Synchronous Error Flag" "0,1"
|
|
bitfld.long 0x00 1. "OVRF,FIFO Overrun Flag" "0,1"
|
|
bitfld.long 0x00 0. "EFF,End of Frame Flag" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 4. "ELIE,End of Line Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "VSIE,Vsync Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "ESEIE,Embedded Synchronous Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "OVRIE,FIFO Overrun Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "EFIE,End of Frame Interrupt Enable" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "INTF,Interrupt flag register"
|
|
bitfld.long 0x00 4. "ELIF,End of Line Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "VSIF,Vsync Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "ESEIF,Embedded Synchronous Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "OVRIF,FIFO Overrun Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "EFIF,End of Frame Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 4. "ELFC,End of Line Flag Clear" "0,1"
|
|
bitfld.long 0x00 3. "VSFC,Vsync flag clear" "0,1"
|
|
bitfld.long 0x00 2. "ESEFC,Clear embedded synchronous Error Flag" "0,1"
|
|
bitfld.long 0x00 1. "OVRFC,Clear FIFO Overrun Flag" "0,1"
|
|
bitfld.long 0x00 0. "EFFC,Clear End of Frame Flag" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SC,Synchronization codes register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "FE,Frame End Code in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LE,Line End Code in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 8.--15. 1. "LS,Line Start Code in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FS,Frame Start Code in Embedded Synchronous Mode"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SCUMSK,Synchronization codes unmask register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "FEM,Frame End Code unMask Bits in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LEM,Line End Code unMask Bits in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 8.--15. 1. "LSM,Line Start Code unMask Bits in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FSM,Frame Start Code unMask Bits in Embedded Synchronous Mode"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CWSPOS,Cropping window start position register"
|
|
hexmask.long.word 0x00 16.--28. 1. "WVSP,Window Vertical Start Position"
|
|
hexmask.long.word 0x00 0.--13. 1. "WHSP,Window Horizontal Start Position"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CWSZ,Cropping window size register"
|
|
hexmask.long.word 0x00 16.--29. 1. "WVSZ,Window Vertical Size"
|
|
hexmask.long.word 0x00 0.--13. 1. "WHSZ,Window Horizontal Size"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "DATA,DATA register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DT3,Pixel Data 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DT2,Pixel Data 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. "DT1,Pixel Data 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DT0,Pixel Data 0"
|
|
tree.end
|
|
tree "SEC_DCI"
|
|
base ad:0x5C050000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 14. "DCIEN,DCI Enable" "0,1"
|
|
bitfld.long 0x00 10.--11. "DCIF,Digital camera interface format" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "FR,Frame rate" "0,1,2,3"
|
|
bitfld.long 0x00 7. "VPS,Vertical Polarity Selection" "0,1"
|
|
bitfld.long 0x00 6. "HPS,Horizontal Polarity Selection" "0,1"
|
|
bitfld.long 0x00 5. "CKS,Clock Polarity Selection" "0,1"
|
|
bitfld.long 0x00 4. "ESM,Embedded Synchronous Mode" "0,1"
|
|
bitfld.long 0x00 3. "JM,JPEG mode" "0,1"
|
|
bitfld.long 0x00 2. "WDEN,Window Enable" "0,1"
|
|
bitfld.long 0x00 1. "SNAP,Snapshot mode" "0,1"
|
|
bitfld.long 0x00 0. "CAP,Capture Enable" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT0,Status register 0"
|
|
bitfld.long 0x00 2. "FV,FIFO Valid" "0,1"
|
|
bitfld.long 0x00 1. "VS,VS line status" "0,1"
|
|
bitfld.long 0x00 0. "HS,HS line status" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STAT1,Status register 1"
|
|
bitfld.long 0x00 4. "ELF,End of Line Flag" "0,1"
|
|
bitfld.long 0x00 3. "VSF,Vsync Flag" "0,1"
|
|
bitfld.long 0x00 2. "ESEF,Embedded Synchronous Error Flag" "0,1"
|
|
bitfld.long 0x00 1. "OVRF,FIFO Overrun Flag" "0,1"
|
|
bitfld.long 0x00 0. "EFF,End of Frame Flag" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 4. "ELIE,End of Line Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "VSIE,Vsync Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "ESEIE,Embedded Synchronous Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "OVRIE,FIFO Overrun Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "EFIE,End of Frame Interrupt Enable" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "INTF,Interrupt flag register"
|
|
bitfld.long 0x00 4. "ELIF,End of Line Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "VSIF,Vsync Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "ESEIF,Embedded Synchronous Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "OVRIF,FIFO Overrun Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "EFIF,End of Frame Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 4. "ELFC,End of Line Flag Clear" "0,1"
|
|
bitfld.long 0x00 3. "VSFC,Vsync flag clear" "0,1"
|
|
bitfld.long 0x00 2. "ESEFC,Clear embedded synchronous Error Flag" "0,1"
|
|
bitfld.long 0x00 1. "OVRFC,Clear FIFO Overrun Flag" "0,1"
|
|
bitfld.long 0x00 0. "EFFC,Clear End of Frame Flag" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SC,Synchronization codes register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "FE,Frame End Code in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LE,Line End Code in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 8.--15. 1. "LS,Line Start Code in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FS,Frame Start Code in Embedded Synchronous Mode"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SCUMSK,Synchronization codes unmask register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "FEM,Frame End Code unMask Bits in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LEM,Line End Code unMask Bits in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 8.--15. 1. "LSM,Line Start Code unMask Bits in Embedded Synchronous Mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FSM,Frame Start Code unMask Bits in Embedded Synchronous Mode"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CWSPOS,Cropping window start position register"
|
|
hexmask.long.word 0x00 16.--28. 1. "WVSP,Window Vertical Start Position"
|
|
hexmask.long.word 0x00 0.--13. 1. "WHSP,Window Horizontal Start Position"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CWSZ,Cropping window size register"
|
|
hexmask.long.word 0x00 16.--29. 1. "WVSZ,Window Vertical Size"
|
|
hexmask.long.word 0x00 0.--13. 1. "WHSZ,Window Horizontal Size"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "DATA,DATA register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DT3,Pixel Data 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DT2,Pixel Data 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. "DT1,Pixel Data 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DT0,Pixel Data 0"
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree "DMA (DMA controller)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40026000 ad:0x40026400)
|
|
tree "DMA$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "INTF0,Interrupt flag register 0"
|
|
bitfld.long 0x00 27. "FTFIF3,Full Transfer finish flag of channel 3" "0,1"
|
|
bitfld.long 0x00 26. "HTFIF3,Half transfer finish flag of channel 3" "0,1"
|
|
bitfld.long 0x00 25. "TAEIF3,Transfer access error flag of channel 3" "0,1"
|
|
bitfld.long 0x00 24. "SDEIF3,Single data mode exception of channel 3" "0,1"
|
|
bitfld.long 0x00 22. "FEEIF3,FIFO error and exception of channel 3" "0,1"
|
|
bitfld.long 0x00 21. "FTFIF2,Full Transfer finish flag of channel 2" "0,1"
|
|
bitfld.long 0x00 20. "HTFIF2,Half transfer finish flag of channel 2" "0,1"
|
|
bitfld.long 0x00 19. "TAEIF2,Transfer access error flag of channel 2" "0,1"
|
|
bitfld.long 0x00 18. "SDEIF2,Single data mode exception of channel 2" "0,1"
|
|
bitfld.long 0x00 16. "FEEIF2,FIFO error and exception of channel 2" "0,1"
|
|
bitfld.long 0x00 11. "FTFIF1,Full Transfer finish flag of channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "HTFIF1,Half transfer finish flag of channel 1" "0,1"
|
|
bitfld.long 0x00 9. "TAEIF1,Transfer access error flag of channel 1" "0,1"
|
|
bitfld.long 0x00 8. "SDEIF1,Single data mode exception of channel 1" "0,1"
|
|
bitfld.long 0x00 6. "FEEIF1,FIFO error and exception of channel 1" "0,1"
|
|
bitfld.long 0x00 5. "FTFIF0,Full Transfer finish flag of channel 0" "0,1"
|
|
bitfld.long 0x00 4. "HTFIF0,Half transfer finish flag of channel 0" "0,1"
|
|
bitfld.long 0x00 3. "TAEIF0,Transfer access error flag of channel 0" "0,1"
|
|
bitfld.long 0x00 2. "SDEIF0,Single data mode exception of channel 0" "0,1"
|
|
bitfld.long 0x00 0. "FEEIF0,FIFO error and exception of channel 0" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "INTF1,Interrupt flag register 1"
|
|
bitfld.long 0x00 27. "FTFIF7,Full Transfer finish flag of channel 7" "0,1"
|
|
bitfld.long 0x00 26. "HTFIF7,Half transfer finish flag of channel 7" "0,1"
|
|
bitfld.long 0x00 25. "TAEIF7,Transfer access error flag of channel 7" "0,1"
|
|
bitfld.long 0x00 24. "SDEIF7,Single data mode exception of channel 7" "0,1"
|
|
bitfld.long 0x00 22. "FEEIF7,FIFO error and exception of channel 7" "0,1"
|
|
bitfld.long 0x00 21. "FTFIF6,Full Transfer finish flag of channel 6" "0,1"
|
|
bitfld.long 0x00 20. "HTFIF6,Half transfer finish flag of channel 6" "0,1"
|
|
bitfld.long 0x00 19. "TAEIF6,Transfer access error flag of channel 6" "0,1"
|
|
bitfld.long 0x00 18. "SDEIF6,Single data mode exception of channel 6" "0,1"
|
|
bitfld.long 0x00 16. "FEEIF6,FIFO error and exception of channel 6" "0,1"
|
|
bitfld.long 0x00 11. "FTFIF5,Full Transfer finish flag of channel 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "HTFIF5,Half transfer finish flag of channel 5" "0,1"
|
|
bitfld.long 0x00 9. "TAEIF5,Transfer access error flag of channel 5" "0,1"
|
|
bitfld.long 0x00 8. "SDEIF5,Single data mode exception of channel 5" "0,1"
|
|
bitfld.long 0x00 6. "FEEIF5,FIFO error and exception of channel 5" "0,1"
|
|
bitfld.long 0x00 5. "FTFIF4,Full Transfer finish flag of channel 4" "0,1"
|
|
bitfld.long 0x00 4. "HTFIF4,Half transfer finish flag of channel 4" "0,1"
|
|
bitfld.long 0x00 3. "TAEIF4,Transfer access error flag of channel 4" "0,1"
|
|
bitfld.long 0x00 2. "SDEIF4,Single data mode exception of channel 4" "0,1"
|
|
bitfld.long 0x00 0. "FEEIF4,FIFO error and exception of channel 4" "0,1"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "INTC0,Interrupt flag clear register 0"
|
|
bitfld.long 0x00 27. "FTFIFC3,Clear bit for Full transfer finish flag of channel 3" "0,1"
|
|
bitfld.long 0x00 26. "HTFIFC3,Clear bit for half transfer finish flag of channel 3" "0,1"
|
|
bitfld.long 0x00 25. "TAEIFC3,Clear bit for transfer access error flag of channel 3" "0,1"
|
|
bitfld.long 0x00 24. "SDEIFC3,Clear bit for single data mode exception of channel 3" "0,1"
|
|
bitfld.long 0x00 22. "FEEIFC3,Clear bit for FIFO error and exception of channel 3" "0,1"
|
|
bitfld.long 0x00 21. "FTFIFC2,Clear bit for Full transfer finish flag of channel 2" "0,1"
|
|
bitfld.long 0x00 20. "HTFIFC2,Clear bit for half transfer finish flag of channel 2" "0,1"
|
|
bitfld.long 0x00 19. "TAEIFC2,Clear bit for transfer access error flag of channel 2" "0,1"
|
|
bitfld.long 0x00 18. "SDEIFC2,Clear bit for single data mode exception of channel 2" "0,1"
|
|
bitfld.long 0x00 16. "FEEIFC2,Clear bit for FIFO error and exception of channel 2" "0,1"
|
|
bitfld.long 0x00 11. "FTFIFC1,Clear bit for Full transfer finish flag of channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "HTFIFC1,Clear bit for half transfer finish flag of channel 1" "0,1"
|
|
bitfld.long 0x00 9. "TAEIFC1,Clear bit for transfer access error flag of channel 1" "0,1"
|
|
bitfld.long 0x00 8. "SDEIFC1,Clear bit for single data mode exception of channel 1" "0,1"
|
|
bitfld.long 0x00 6. "FEEIFC1,Clear bit for FIFO error and exception of channel 1" "0,1"
|
|
bitfld.long 0x00 5. "FTFIFC0,Clear bit for Full transfer finish flag of channel 0" "0,1"
|
|
bitfld.long 0x00 4. "HTFIFC0,Clear bit for half transfer finish flag of channel 0" "0,1"
|
|
bitfld.long 0x00 3. "TAEIFC0,Clear bit for transfer access error flag of channel 0" "0,1"
|
|
bitfld.long 0x00 2. "SDEIFC0,Clear bit for single data mode exception of channel 0" "0,1"
|
|
bitfld.long 0x00 0. "FEEIFC0,Clear bit for FIFO error and exception of channel 0" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "INTC1,Interrupt flag clear register 1"
|
|
bitfld.long 0x00 27. "FTFIFC7,Clear bit for Full transfer finish flag of channel 7" "0,1"
|
|
bitfld.long 0x00 26. "HTFIFC7,Clear bit for half transfer finish flag of channel 7" "0,1"
|
|
bitfld.long 0x00 25. "TAEIFC7,Clear bit for transfer access error flag of channel 7" "0,1"
|
|
bitfld.long 0x00 24. "SDEIFC7,Clear bit for single data mode exception of channel 7" "0,1"
|
|
bitfld.long 0x00 22. "FEEIFC7,Clear bit for FIFO error and exception of channel 7" "0,1"
|
|
bitfld.long 0x00 21. "FTFIFC6,Clear bit for Full transfer finish flag of channel 6" "0,1"
|
|
bitfld.long 0x00 20. "HTFIFC6,Clear bit for half transfer finish flag of channel 6" "0,1"
|
|
bitfld.long 0x00 19. "TAEIFC6,Clear bit for transfer access error flag of channel 6" "0,1"
|
|
bitfld.long 0x00 18. "SDEIFC6,Clear bit for single data mode exception of channel 6" "0,1"
|
|
bitfld.long 0x00 16. "FEEIFC6,Clear bit for FIFO error and exception of channel 6" "0,1"
|
|
bitfld.long 0x00 11. "FTFIFC5,Clear bit for Full transfer finish flag of channel 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "HTFIFC5,Clear bit for half transfer finish flag of channel 5" "0,1"
|
|
bitfld.long 0x00 9. "TAEIFC5,Clear bit for transfer access error flag of channel 5" "0,1"
|
|
bitfld.long 0x00 8. "SDEIFC5,Clear bit for single data mode exception of channel 5" "0,1"
|
|
bitfld.long 0x00 6. "FEEIFC5,Clear bit for FIFO error and exception of channel 5" "0,1"
|
|
bitfld.long 0x00 5. "FTFIFC4,Clear bit for Full transfer finish flag of channel 4" "0,1"
|
|
bitfld.long 0x00 4. "HTFIFC4,Clear bit for half transfer finish flag of channel 4" "0,1"
|
|
bitfld.long 0x00 3. "TAEIFC4,Clear bit for transfer access error flag of channel 4" "0,1"
|
|
bitfld.long 0x00 2. "SDEIFC4,Clear bit for single data mode exception of channel 4" "0,1"
|
|
bitfld.long 0x00 0. "FEEIFC4,Clear bit for FIFO error and exception of channel 4" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0CTL,Channel 0 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH0CNT,Channel 0 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH0PADDR,Channel 0 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH0M0ADDR,Channel 0 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH0M1ADDR,Channel 0 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH0FCTL,Channel 0 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CH1CTL,Channel 1 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CH1CNT,Channel 1 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CH1PADDR,Channel 1 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH1M0ADDR,Channel 1 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1M1ADDR,Channel 1 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH1FCTL,Channel 1 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH2CTL,Channel 2 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CH2CNT,Channel 2 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CH2PADDR,Channel 2 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CH2M0ADDR,Channel 2 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CH2M1ADDR,Channel 2 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CH2FCTL,Channel 2 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CH3CTL,Channel 3 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CH3CNT,Channel 3 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CH3PADDR,Channel 3 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CH3M0ADDR,Channel 3 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CH3M1ADDR,Channel 3 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "CH3FCTL,Channel 3 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "CH4CTL,Channel 4 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "CH4CNT,Channel 4 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "CH4PADDR,Channel 4 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "CH4M0ADDR,Channel 4 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CH4M1ADDR,Channel 4 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CH4FCTL,Channel 4 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "CH5CTL,Channel 5 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CH5CNT,Channel 5 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CH5PADDR,Channel 5 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "CH5M0ADDR,Channel 5 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "CH5M1ADDR,Channel 5 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "CH5FCTL,Channel 5 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "CH6CTL,Channel 6 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "CH6CNT,Channel 6 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "CH6PADDR,Channel 6 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "CH6M0ADDR,Channel 6 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "CH6M1ADDR,Channel 6 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "CH6FCTL,Channel 6 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "CH7CTL,Channel 7 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "CH7CNT,Channel 7 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CH7PADDR,Channel 7 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "CH7M0ADDR,Channel 7 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "CH7M1ADDR,Channel 7 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "CH7FCTL,Channel 7 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "SSTAT,Security status register"
|
|
bitfld.long 0x00 7. "IAIF7,Channel 7 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "IAIF6,Channel 6 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "IAIF5,Channel 5 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "IAIF4,Channel 4 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "IAIF3,Channel 3 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "IAIF2,Channel 2 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "IAIF1,Channel 1 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "IAIF0,Channel 0 illegal access interrupt flag" "0,1"
|
|
wgroup.long 0x104++0x03
|
|
line.long 0x00 "SSCCTL,Security status register"
|
|
bitfld.long 0x00 7. "CIAIF7,Stream 7 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "CIAIF6,Stream 6 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CIAIF5,Stream 5 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CIAIF4,Stream 4 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CIAIF3,Stream 3 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CIAIF2,Stream 2 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CIAIF1,Stream 1 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "CIAIF0,Stream 0 clear illegal access interrupt flag" "0,1"
|
|
wgroup.long 0x108++0x03
|
|
line.long 0x00 "CH0SCTL,Channel 0 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x10C++0x03
|
|
line.long 0x00 "CH1SCTL,Channel 1 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x110++0x03
|
|
line.long 0x00 "CH2SCTL,Channel 2 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x114++0x03
|
|
line.long 0x00 "CH3SCTL,Channel 3 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x118++0x03
|
|
line.long 0x00 "CH4SCTL,Channel 4 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x11C++0x03
|
|
line.long 0x00 "CH5SCTL,Channel 5 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x120++0x03
|
|
line.long 0x00 "CH6SCTL,Channel 6 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x124++0x03
|
|
line.long 0x00 "CH7SCTL,Channel 7 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
repeat 2. (list 0. 1.) (list ad:0x50026000 ad:0x50026400)
|
|
tree "SEC_DMA$1"
|
|
base $2
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "INTF0,Interrupt flag register 0"
|
|
bitfld.long 0x00 27. "FTFIF3,Full Transfer finish flag of channel 3" "0,1"
|
|
bitfld.long 0x00 26. "HTFIF3,Half transfer finish flag of channel 3" "0,1"
|
|
bitfld.long 0x00 25. "TAEIF3,Transfer access error flag of channel 3" "0,1"
|
|
bitfld.long 0x00 24. "SDEIF3,Single data mode exception of channel 3" "0,1"
|
|
bitfld.long 0x00 22. "FEEIF3,FIFO error and exception of channel 3" "0,1"
|
|
bitfld.long 0x00 21. "FTFIF2,Full Transfer finish flag of channel 2" "0,1"
|
|
bitfld.long 0x00 20. "HTFIF2,Half transfer finish flag of channel 2" "0,1"
|
|
bitfld.long 0x00 19. "TAEIF2,Transfer access error flag of channel 2" "0,1"
|
|
bitfld.long 0x00 18. "SDEIF2,Single data mode exception of channel 2" "0,1"
|
|
bitfld.long 0x00 16. "FEEIF2,FIFO error and exception of channel 2" "0,1"
|
|
bitfld.long 0x00 11. "FTFIF1,Full Transfer finish flag of channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "HTFIF1,Half transfer finish flag of channel 1" "0,1"
|
|
bitfld.long 0x00 9. "TAEIF1,Transfer access error flag of channel 1" "0,1"
|
|
bitfld.long 0x00 8. "SDEIF1,Single data mode exception of channel 1" "0,1"
|
|
bitfld.long 0x00 6. "FEEIF1,FIFO error and exception of channel 1" "0,1"
|
|
bitfld.long 0x00 5. "FTFIF0,Full Transfer finish flag of channel 0" "0,1"
|
|
bitfld.long 0x00 4. "HTFIF0,Half transfer finish flag of channel 0" "0,1"
|
|
bitfld.long 0x00 3. "TAEIF0,Transfer access error flag of channel 0" "0,1"
|
|
bitfld.long 0x00 2. "SDEIF0,Single data mode exception of channel 0" "0,1"
|
|
bitfld.long 0x00 0. "FEEIF0,FIFO error and exception of channel 0" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "INTF1,Interrupt flag register 1"
|
|
bitfld.long 0x00 27. "FTFIF7,Full Transfer finish flag of channel 7" "0,1"
|
|
bitfld.long 0x00 26. "HTFIF7,Half transfer finish flag of channel 7" "0,1"
|
|
bitfld.long 0x00 25. "TAEIF7,Transfer access error flag of channel 7" "0,1"
|
|
bitfld.long 0x00 24. "SDEIF7,Single data mode exception of channel 7" "0,1"
|
|
bitfld.long 0x00 22. "FEEIF7,FIFO error and exception of channel 7" "0,1"
|
|
bitfld.long 0x00 21. "FTFIF6,Full Transfer finish flag of channel 6" "0,1"
|
|
bitfld.long 0x00 20. "HTFIF6,Half transfer finish flag of channel 6" "0,1"
|
|
bitfld.long 0x00 19. "TAEIF6,Transfer access error flag of channel 6" "0,1"
|
|
bitfld.long 0x00 18. "SDEIF6,Single data mode exception of channel 6" "0,1"
|
|
bitfld.long 0x00 16. "FEEIF6,FIFO error and exception of channel 6" "0,1"
|
|
bitfld.long 0x00 11. "FTFIF5,Full Transfer finish flag of channel 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "HTFIF5,Half transfer finish flag of channel 5" "0,1"
|
|
bitfld.long 0x00 9. "TAEIF5,Transfer access error flag of channel 5" "0,1"
|
|
bitfld.long 0x00 8. "SDEIF5,Single data mode exception of channel 5" "0,1"
|
|
bitfld.long 0x00 6. "FEEIF5,FIFO error and exception of channel 5" "0,1"
|
|
bitfld.long 0x00 5. "FTFIF4,Full Transfer finish flag of channel 4" "0,1"
|
|
bitfld.long 0x00 4. "HTFIF4,Half transfer finish flag of channel 4" "0,1"
|
|
bitfld.long 0x00 3. "TAEIF4,Transfer access error flag of channel 4" "0,1"
|
|
bitfld.long 0x00 2. "SDEIF4,Single data mode exception of channel 4" "0,1"
|
|
bitfld.long 0x00 0. "FEEIF4,FIFO error and exception of channel 4" "0,1"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "INTC0,Interrupt flag clear register 0"
|
|
bitfld.long 0x00 27. "FTFIFC3,Clear bit for Full transfer finish flag of channel 3" "0,1"
|
|
bitfld.long 0x00 26. "HTFIFC3,Clear bit for half transfer finish flag of channel 3" "0,1"
|
|
bitfld.long 0x00 25. "TAEIFC3,Clear bit for transfer access error flag of channel 3" "0,1"
|
|
bitfld.long 0x00 24. "SDEIFC3,Clear bit for single data mode exception of channel 3" "0,1"
|
|
bitfld.long 0x00 22. "FEEIFC3,Clear bit for FIFO error and exception of channel 3" "0,1"
|
|
bitfld.long 0x00 21. "FTFIFC2,Clear bit for Full transfer finish flag of channel 2" "0,1"
|
|
bitfld.long 0x00 20. "HTFIFC2,Clear bit for half transfer finish flag of channel 2" "0,1"
|
|
bitfld.long 0x00 19. "TAEIFC2,Clear bit for transfer access error flag of channel 2" "0,1"
|
|
bitfld.long 0x00 18. "SDEIFC2,Clear bit for single data mode exception of channel 2" "0,1"
|
|
bitfld.long 0x00 16. "FEEIFC2,Clear bit for FIFO error and exception of channel 2" "0,1"
|
|
bitfld.long 0x00 11. "FTFIFC1,Clear bit for Full transfer finish flag of channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "HTFIFC1,Clear bit for half transfer finish flag of channel 1" "0,1"
|
|
bitfld.long 0x00 9. "TAEIFC1,Clear bit for transfer access error flag of channel 1" "0,1"
|
|
bitfld.long 0x00 8. "SDEIFC1,Clear bit for single data mode exception of channel 1" "0,1"
|
|
bitfld.long 0x00 6. "FEEIFC1,Clear bit for FIFO error and exception of channel 1" "0,1"
|
|
bitfld.long 0x00 5. "FTFIFC0,Clear bit for Full transfer finish flag of channel 0" "0,1"
|
|
bitfld.long 0x00 4. "HTFIFC0,Clear bit for half transfer finish flag of channel 0" "0,1"
|
|
bitfld.long 0x00 3. "TAEIFC0,Clear bit for transfer access error flag of channel 0" "0,1"
|
|
bitfld.long 0x00 2. "SDEIFC0,Clear bit for single data mode exception of channel 0" "0,1"
|
|
bitfld.long 0x00 0. "FEEIFC0,Clear bit for FIFO error and exception of channel 0" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "INTC1,Interrupt flag clear register 1"
|
|
bitfld.long 0x00 27. "FTFIFC7,Clear bit for Full transfer finish flag of channel 7" "0,1"
|
|
bitfld.long 0x00 26. "HTFIFC7,Clear bit for half transfer finish flag of channel 7" "0,1"
|
|
bitfld.long 0x00 25. "TAEIFC7,Clear bit for transfer access error flag of channel 7" "0,1"
|
|
bitfld.long 0x00 24. "SDEIFC7,Clear bit for single data mode exception of channel 7" "0,1"
|
|
bitfld.long 0x00 22. "FEEIFC7,Clear bit for FIFO error and exception of channel 7" "0,1"
|
|
bitfld.long 0x00 21. "FTFIFC6,Clear bit for Full transfer finish flag of channel 6" "0,1"
|
|
bitfld.long 0x00 20. "HTFIFC6,Clear bit for half transfer finish flag of channel 6" "0,1"
|
|
bitfld.long 0x00 19. "TAEIFC6,Clear bit for transfer access error flag of channel 6" "0,1"
|
|
bitfld.long 0x00 18. "SDEIFC6,Clear bit for single data mode exception of channel 6" "0,1"
|
|
bitfld.long 0x00 16. "FEEIFC6,Clear bit for FIFO error and exception of channel 6" "0,1"
|
|
bitfld.long 0x00 11. "FTFIFC5,Clear bit for Full transfer finish flag of channel 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "HTFIFC5,Clear bit for half transfer finish flag of channel 5" "0,1"
|
|
bitfld.long 0x00 9. "TAEIFC5,Clear bit for transfer access error flag of channel 5" "0,1"
|
|
bitfld.long 0x00 8. "SDEIFC5,Clear bit for single data mode exception of channel 5" "0,1"
|
|
bitfld.long 0x00 6. "FEEIFC5,Clear bit for FIFO error and exception of channel 5" "0,1"
|
|
bitfld.long 0x00 5. "FTFIFC4,Clear bit for Full transfer finish flag of channel 4" "0,1"
|
|
bitfld.long 0x00 4. "HTFIFC4,Clear bit for half transfer finish flag of channel 4" "0,1"
|
|
bitfld.long 0x00 3. "TAEIFC4,Clear bit for transfer access error flag of channel 4" "0,1"
|
|
bitfld.long 0x00 2. "SDEIFC4,Clear bit for single data mode exception of channel 4" "0,1"
|
|
bitfld.long 0x00 0. "FEEIFC4,Clear bit for FIFO error and exception of channel 4" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0CTL,Channel 0 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH0CNT,Channel 0 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH0PADDR,Channel 0 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH0M0ADDR,Channel 0 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH0M1ADDR,Channel 0 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH0FCTL,Channel 0 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CH1CTL,Channel 1 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CH1CNT,Channel 1 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CH1PADDR,Channel 1 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH1M0ADDR,Channel 1 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1M1ADDR,Channel 1 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH1FCTL,Channel 1 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH2CTL,Channel 2 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CH2CNT,Channel 2 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CH2PADDR,Channel 2 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CH2M0ADDR,Channel 2 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CH2M1ADDR,Channel 2 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CH2FCTL,Channel 2 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CH3CTL,Channel 3 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CH3CNT,Channel 3 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CH3PADDR,Channel 3 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CH3M0ADDR,Channel 3 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CH3M1ADDR,Channel 3 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "CH3FCTL,Channel 3 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "CH4CTL,Channel 4 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "CH4CNT,Channel 4 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "CH4PADDR,Channel 4 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "CH4M0ADDR,Channel 4 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CH4M1ADDR,Channel 4 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CH4FCTL,Channel 4 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "CH5CTL,Channel 5 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CH5CNT,Channel 5 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CH5PADDR,Channel 5 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "CH5M0ADDR,Channel 5 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "CH5M1ADDR,Channel 5 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "CH5FCTL,Channel 5 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "CH6CTL,Channel 6 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "CH6CNT,Channel 6 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "CH6PADDR,Channel 6 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "CH6M0ADDR,Channel 6 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "CH6M1ADDR,Channel 6 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "CH6FCTL,Channel 6 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "CH7CTL,Channel 7 control register"
|
|
bitfld.long 0x00 25.--27. "PERIEN,Peripheral enable" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--24. "MBURST,Transfer burst type of memory" "0,1,2,3"
|
|
bitfld.long 0x00 21.--22. "PBURST,Transfer burst type of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 19. "MBS,Memory buffer select" "0,1"
|
|
bitfld.long 0x00 18. "SBMEN,Switch-buffer mode enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "PRIO,Priority level" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PAIF,Peripheral address increment fixed" "0,1"
|
|
bitfld.long 0x00 13.--14. "MWIDTH,Transfer width of memory" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "PWIDTH,Transfer width of peripheral" "0,1,2,3"
|
|
bitfld.long 0x00 10. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 9. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CMEN,Circulation mode enable" "0,1"
|
|
bitfld.long 0x00 6.--7. "TM,Transfer mode" "0,1,2,3"
|
|
bitfld.long 0x00 5. "TFCS,Transfer flow controller select" "0,1"
|
|
bitfld.long 0x00 4. "FTFIE,Enable bit for full transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 3. "HTFIE,Enable bit for half transfer finish interrupt" "0,1"
|
|
bitfld.long 0x00 2. "TAEIE,Enable bit for tranfer access error interrupt" "0,1"
|
|
bitfld.long 0x00 1. "SDEIE,Enable bit for single data mode exception interrupt" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "CH7CNT,Channel 7 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CH7PADDR,Channel 7 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "CH7M0ADDR,Channel 7 memory 0 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M0ADDR,Memory 0 base address"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "CH7M1ADDR,Channel 7 memory 1 base address register"
|
|
hexmask.long 0x00 0.--31. 1. "M1ADDR,Memory 1 base address"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "CH7FCTL,Channel 7 FIFO control register"
|
|
bitfld.long 0x00 7. "FEEIE,Enable bit for FIFO error and exception interrupt" "0,1"
|
|
rbitfld.long 0x00 3.--5. "FCNT,FIFO counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MDMEN,Multi-data mode enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FCCV,FIFO counter critical value" "0,1,2,3"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "SSTAT,Security status register"
|
|
bitfld.long 0x00 7. "IAIF7,Channel 7 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "IAIF6,Channel 6 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "IAIF5,Channel 5 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "IAIF4,Channel 4 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "IAIF3,Channel 3 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "IAIF2,Channel 2 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "IAIF1,Channel 1 illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "IAIF0,Channel 0 illegal access interrupt flag" "0,1"
|
|
wgroup.long 0x104++0x03
|
|
line.long 0x00 "SSCCTL,Security status register"
|
|
bitfld.long 0x00 7. "CIAIF7,Stream 7 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "CIAIF6,Stream 6 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CIAIF5,Stream 5 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CIAIF4,Stream 4 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CIAIF3,Stream 3 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CIAIF2,Stream 2 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CIAIF1,Stream 1 clear illegal access interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "CIAIF0,Stream 0 clear illegal access interrupt flag" "0,1"
|
|
wgroup.long 0x108++0x03
|
|
line.long 0x00 "CH0SCTL,Channel 0 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x10C++0x03
|
|
line.long 0x00 "CH1SCTL,Channel 1 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x110++0x03
|
|
line.long 0x00 "CH2SCTL,Channel 2 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x114++0x03
|
|
line.long 0x00 "CH3SCTL,Channel 3 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x118++0x03
|
|
line.long 0x00 "CH4SCTL,Channel 4 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x11C++0x03
|
|
line.long 0x00 "CH5SCTL,Channel 5 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x120++0x03
|
|
line.long 0x00 "CH6SCTL,Channel 6 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
wgroup.long 0x124++0x03
|
|
line.long 0x00 "CH7SCTL,Channel 7 security control register"
|
|
bitfld.long 0x00 3. "PRIV,Privileged mode" "0,1"
|
|
bitfld.long 0x00 2. "DSEC,Security of the DMA transfer to the destination" "0,1"
|
|
bitfld.long 0x00 1. "SSEC,Security of the DMA transfer from the source" "0,1"
|
|
bitfld.long 0x00 0. "SECM,Secure mode" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "EFUSE"
|
|
tree "EFUSE"
|
|
base ad:0x40022800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CS,Control and status register"
|
|
bitfld.long 0x00 26. "OBERIC,Clear bit for overstep boundary error interrupt flag" "0,1"
|
|
bitfld.long 0x00 25. "RDIC,Clear bit for read operation completed interrupt flag" "0,1"
|
|
bitfld.long 0x00 24. "PGIC,Clear bit for program operation completed interrupt flag" "0,1"
|
|
bitfld.long 0x00 22. "OBERIE,Enable bit for overstep boundary error interrupt" "0,1"
|
|
bitfld.long 0x00 21. "RDIE,Enable bit for read operation completed interrupt" "0,1"
|
|
bitfld.long 0x00 20. "PGIE,Enable bit for program operation completed interrupt" "0,1"
|
|
rbitfld.long 0x00 18. "OBERIF,Overstep boundary error flag" "0,1"
|
|
rbitfld.long 0x00 17. "RDIF,Read operation complete flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 16. "PGIF,Program operation completed flag" "0,1"
|
|
rbitfld.long 0x00 15. "CFGRSS,EFUSE_IAK_RSS register contribute configuer" "0,1"
|
|
bitfld.long 0x00 1. "EFRW,The selection of efuse operation" "0,1"
|
|
bitfld.long 0x00 0. "EFSTR,Start efuse operation" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ADDR,Address register"
|
|
hexmask.long.byte 0x00 8.--14. 1. "EFSIZE,Read or write efuse data size"
|
|
hexmask.long.byte 0x00 0.--7. 1. "EFADDR,Read or write efuse data start address"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 5. "SWBOOT0,Efuse boot 0 bit enable" "0,1"
|
|
bitfld.long 0x00 4. "EFBOOT0,Efuse boot0" "0,1"
|
|
bitfld.long 0x00 3. "SWBOOT1,Efuse boot 1 bit enable" "0,1"
|
|
bitfld.long 0x00 2. "EFBOOT1,Efuse boot1" "0,1"
|
|
bitfld.long 0x00 1. "EFBOOTLK,EFUSE_CTL register bit[5:2] lock bit" "0,1"
|
|
bitfld.long 0x00 0. "EFSB,Boot from Secure boot" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "TZCTL,Trustzone control register"
|
|
bitfld.long 0x00 7. "VFCERT,Verify firmware certificate" "0,1"
|
|
bitfld.long 0x00 6. "VFIMG,Verify firmware image" "0,1"
|
|
bitfld.long 0x00 5. "DPLK,EFUSE_DP register lock bit" "0,1"
|
|
bitfld.long 0x00 4. "IRLK,EFUSE_IAK_RSS register lock bit" "0,1"
|
|
bitfld.long 0x00 3. "RFLK,EFUSE_RF_DATA register lock bit" "0,1"
|
|
bitfld.long 0x00 2. "ROTLK,EFUSE_ROTPK_KEY register lock bit" "0,1"
|
|
bitfld.long 0x00 1. "NDBG,Debugging permission setting" "0,1"
|
|
bitfld.long 0x00 0. "TZEN,Trust zone enable bit" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_CTL,Flash protection control register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FP,Efuse flash protection value"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "USER_CTL,User byte control register"
|
|
bitfld.long 0x00 6. "UDLK,EFUSE_USER_DATA register lock bit" "0,1"
|
|
bitfld.long 0x00 5. "AESEN,Lock EFUSE_AES_KEY register and enable AES decrypt function" "0,1"
|
|
bitfld.long 0x00 4. "MCUINITLK,EFUSE_MCU_INIT_DATA register lock bit" "0,1"
|
|
bitfld.long 0x00 3. "EFOPLK,EFUSE_FP_CTL and EFUSE_USER_CTL register lock bit" "0,1"
|
|
bitfld.long 0x00 2. "NRSTDPSLP,Reset option of entry deep sleep mode" "0,1"
|
|
bitfld.long 0x00 1. "NRSTSTDBY,Reset option of entry standby mode" "0,1"
|
|
bitfld.long 0x00 0. "HWDG,Free watchdog timer selection" "0,1"
|
|
repeat 3. (strings "0" "1" "2" )(list 0x0 0x4 0x8 )
|
|
group.long ($2+0x18)++0x03
|
|
line.long 0x00 "MCU_INIT_DATA$1,Mcu initialization data register $1"
|
|
hexmask.long 0x00 0.--31. 1. "INITDATA,Efuse mcu_init value"
|
|
repeat.end
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x24)++0x03
|
|
line.long 0x00 "AES_KEY$1,Firmware AES key register $1"
|
|
hexmask.long 0x00 0.--31. 1. "AESKEY,Efuse AES key value"
|
|
repeat.end
|
|
repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C )
|
|
group.long ($2+0x34)++0x03
|
|
line.long 0x00 "ROTPK_KEY$1,RoTPK key register $1"
|
|
hexmask.long 0x00 0.--31. 1. "RKEY,Efuse RoTPK or its hash value"
|
|
repeat.end
|
|
repeat 2. (strings "0" "1" )(list 0x0 0x4 )
|
|
group.long ($2+0x54)++0x03
|
|
line.long 0x00 "DP$1,Debug password register $1"
|
|
hexmask.long 0x00 0.--31. 1. "DP,Efuse Debug password value"
|
|
repeat.end
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x5C)++0x03
|
|
line.long 0x00 "IAK_RSS$1,IAK key or RSS register $1"
|
|
hexmask.long 0x00 0.--31. 1. "IAKRSS,Efuse IAK/RSS value"
|
|
repeat.end
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
rgroup.long ($2+0x9C)++0x03
|
|
line.long 0x00 "PUID$1,Product UID register $1"
|
|
hexmask.long 0x00 0.--31. 1. "UID,Efuse MCU UID value"
|
|
repeat.end
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
rgroup.long ($2+0xAC)++0x03
|
|
line.long 0x00 "HUK_KEY$1,HUK key register $1"
|
|
hexmask.long 0x00 0.--31. 1. "HKEY,Efuse HUK value"
|
|
repeat.end
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "RF_DATA0,RF data register"
|
|
hexmask.long 0x00 0.--31. 1. "HKEY,Efuse HUK value"
|
|
repeat 11. (strings "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 )
|
|
group.long ($2+0xC0)++0x03
|
|
line.long 0x00 "RF_DATA$1,RF data register $1"
|
|
hexmask.long 0x00 0.--31. 1. "RFDATA,Efuse RF data value"
|
|
repeat.end
|
|
repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C )
|
|
group.long ($2+0xEC)++0x03
|
|
line.long 0x00 "USER_DATA$1,User data register $1"
|
|
hexmask.long 0x00 0.--31. 1. "USERDATA,Efuse USER_DATA value"
|
|
repeat.end
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "PRE_TZEN,EFUSE Pre-TZEN register"
|
|
bitfld.long 0x00 0. "STZEN,Enable Trustzone function by software" "0,1"
|
|
rgroup.long 0x120++0x03
|
|
line.long 0x00 "TZ_BOOT_ADDR,TrustZone boot address register"
|
|
hexmask.long 0x00 0.--31. 1. "TZBOOTADDR,Boot from the address when TrustZone is enabled"
|
|
rgroup.long 0x124++0x03
|
|
line.long 0x00 "NTZ_BOOT_ADDR,No-TrustZone boot address register"
|
|
hexmask.long 0x00 0.--31. 1. "NTZBOOTADDR,Boot from the address when TrustZone is disabled"
|
|
tree.end
|
|
tree "SEC_EFUSE"
|
|
base ad:0x50022800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CS,Control and status register"
|
|
bitfld.long 0x00 26. "OBERIC,Clear bit for overstep boundary error interrupt flag" "0,1"
|
|
bitfld.long 0x00 25. "RDIC,Clear bit for read operation completed interrupt flag" "0,1"
|
|
bitfld.long 0x00 24. "PGIC,Clear bit for program operation completed interrupt flag" "0,1"
|
|
bitfld.long 0x00 22. "OBERIE,Enable bit for overstep boundary error interrupt" "0,1"
|
|
bitfld.long 0x00 21. "RDIE,Enable bit for read operation completed interrupt" "0,1"
|
|
bitfld.long 0x00 20. "PGIE,Enable bit for program operation completed interrupt" "0,1"
|
|
rbitfld.long 0x00 18. "OBERIF,Overstep boundary error flag" "0,1"
|
|
rbitfld.long 0x00 17. "RDIF,Read operation complete flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 16. "PGIF,Program operation completed flag" "0,1"
|
|
rbitfld.long 0x00 15. "CFGRSS,EFUSE_IAK_RSS register contribute configuer" "0,1"
|
|
bitfld.long 0x00 1. "EFRW,The selection of efuse operation" "0,1"
|
|
bitfld.long 0x00 0. "EFSTR,Start efuse operation" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ADDR,Address register"
|
|
hexmask.long.byte 0x00 8.--14. 1. "EFSIZE,Read or write efuse data size"
|
|
hexmask.long.byte 0x00 0.--7. 1. "EFADDR,Read or write efuse data start address"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 5. "SWBOOT0,Efuse boot 0 bit enable" "0,1"
|
|
bitfld.long 0x00 4. "EFBOOT0,Efuse boot0" "0,1"
|
|
bitfld.long 0x00 3. "SWBOOT1,Efuse boot 1 bit enable" "0,1"
|
|
bitfld.long 0x00 2. "EFBOOT1,Efuse boot1" "0,1"
|
|
bitfld.long 0x00 1. "EFBOOTLK,EFUSE_CTL register bit[5:2] lock bit" "0,1"
|
|
bitfld.long 0x00 0. "EFSB,Boot from Secure boot" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "TZCTL,Trustzone control register"
|
|
bitfld.long 0x00 7. "VFCERT,Verify firmware certificate" "0,1"
|
|
bitfld.long 0x00 6. "VFIMG,Verify firmware image" "0,1"
|
|
bitfld.long 0x00 5. "DPLK,EFUSE_DP register lock bit" "0,1"
|
|
bitfld.long 0x00 4. "IRLK,EFUSE_IAK_RSS register lock bit" "0,1"
|
|
bitfld.long 0x00 3. "RFLK,EFUSE_RF_DATA register lock bit" "0,1"
|
|
bitfld.long 0x00 2. "ROTLK,EFUSE_ROTPK_KEY register lock bit" "0,1"
|
|
bitfld.long 0x00 1. "NDBG,Debugging permission setting" "0,1"
|
|
bitfld.long 0x00 0. "TZEN,Trust zone enable bit" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_CTL,Flash protection control register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FP,Efuse flash protection value"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "USER_CTL,User byte control register"
|
|
bitfld.long 0x00 6. "UDLK,EFUSE_USER_DATA register lock bit" "0,1"
|
|
bitfld.long 0x00 5. "AESEN,Lock EFUSE_AES_KEY register and enable AES decrypt function" "0,1"
|
|
bitfld.long 0x00 4. "MCUINITLK,EFUSE_MCU_INIT_DATA register lock bit" "0,1"
|
|
bitfld.long 0x00 3. "EFOPLK,EFUSE_FP_CTL and EFUSE_USER_CTL register lock bit" "0,1"
|
|
bitfld.long 0x00 2. "NRSTDPSLP,Reset option of entry deep sleep mode" "0,1"
|
|
bitfld.long 0x00 1. "NRSTSTDBY,Reset option of entry standby mode" "0,1"
|
|
bitfld.long 0x00 0. "HWDG,Free watchdog timer selection" "0,1"
|
|
repeat 3. (strings "0" "1" "2" )(list 0x0 0x4 0x8 )
|
|
group.long ($2+0x18)++0x03
|
|
line.long 0x00 "MCU_INIT_DATA$1,Mcu initialization data register $1"
|
|
hexmask.long 0x00 0.--31. 1. "INITDATA,Efuse mcu_init value"
|
|
repeat.end
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x24)++0x03
|
|
line.long 0x00 "AES_KEY$1,Firmware AES key register $1"
|
|
hexmask.long 0x00 0.--31. 1. "AESKEY,Efuse AES key value"
|
|
repeat.end
|
|
repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C )
|
|
group.long ($2+0x34)++0x03
|
|
line.long 0x00 "ROTPK_KEY$1,RoTPK key register $1"
|
|
hexmask.long 0x00 0.--31. 1. "RKEY,Efuse RoTPK or its hash value"
|
|
repeat.end
|
|
repeat 2. (strings "0" "1" )(list 0x0 0x4 )
|
|
group.long ($2+0x54)++0x03
|
|
line.long 0x00 "DP$1,Debug password register $1"
|
|
hexmask.long 0x00 0.--31. 1. "DP,Efuse Debug password value"
|
|
repeat.end
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x5C)++0x03
|
|
line.long 0x00 "IAK_RSS$1,IAK key or RSS register $1"
|
|
hexmask.long 0x00 0.--31. 1. "IAKRSS,Efuse IAK/RSS value"
|
|
repeat.end
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
rgroup.long ($2+0x9C)++0x03
|
|
line.long 0x00 "PUID$1,Product UID register $1"
|
|
hexmask.long 0x00 0.--31. 1. "UID,Efuse MCU UID value"
|
|
repeat.end
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
rgroup.long ($2+0xAC)++0x03
|
|
line.long 0x00 "HUK_KEY$1,HUK key register $1"
|
|
hexmask.long 0x00 0.--31. 1. "HKEY,Efuse HUK value"
|
|
repeat.end
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "RF_DATA0,RF data register"
|
|
hexmask.long 0x00 0.--31. 1. "HKEY,Efuse HUK value"
|
|
repeat 11. (strings "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 )
|
|
group.long ($2+0xC0)++0x03
|
|
line.long 0x00 "RF_DATA$1,RF data register $1"
|
|
hexmask.long 0x00 0.--31. 1. "RFDATA,Efuse RF data value"
|
|
repeat.end
|
|
repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C )
|
|
group.long ($2+0xEC)++0x03
|
|
line.long 0x00 "USER_DATA$1,User data register $1"
|
|
hexmask.long 0x00 0.--31. 1. "USERDATA,Efuse USER_DATA value"
|
|
repeat.end
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "PRE_TZEN,EFUSE Pre-TZEN register"
|
|
bitfld.long 0x00 0. "STZEN,Enable Trustzone function by software" "0,1"
|
|
rgroup.long 0x120++0x03
|
|
line.long 0x00 "TZ_BOOT_ADDR,TrustZone boot address register"
|
|
hexmask.long 0x00 0.--31. 1. "TZBOOTADDR,Boot from the address when TrustZone is enabled"
|
|
rgroup.long 0x124++0x03
|
|
line.long 0x00 "NTZ_BOOT_ADDR,No-TrustZone boot address register"
|
|
hexmask.long 0x00 0.--31. 1. "NTZBOOTADDR,Boot from the address when TrustZone is disabled"
|
|
tree.end
|
|
tree.end
|
|
tree "EXTI (External interrupt/event controller)"
|
|
tree "EXTI"
|
|
base ad:0x40013C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register (EXTI_INTEN)"
|
|
bitfld.long 0x00 28. "INTEN28,Enable Interrupt on line 28" "0,1"
|
|
bitfld.long 0x00 27. "INTEN27,Enable Interrupt on line 27" "0,1"
|
|
bitfld.long 0x00 26. "INTEN26,Enable Interrupt on line 26" "0,1"
|
|
bitfld.long 0x00 25. "INTEN25,Enable Interrupt on line 25" "0,1"
|
|
bitfld.long 0x00 24. "INTEN24,Enable Interrupt on line 24" "0,1"
|
|
bitfld.long 0x00 23. "INTEN23,Enable Interrupt on line 23" "0,1"
|
|
bitfld.long 0x00 22. "INTEN22,Enable Interrupt on line 22" "0,1"
|
|
bitfld.long 0x00 21. "INTEN21,Enable Interrupt on line 21" "0,1"
|
|
bitfld.long 0x00 20. "INTEN20,Enable Interrupt on line 20" "0,1"
|
|
bitfld.long 0x00 19. "INTEN19,Enable Interrupt on line 19" "0,1"
|
|
bitfld.long 0x00 18. "INTEN18,Enable Interrupt on line 18" "0,1"
|
|
bitfld.long 0x00 17. "INTEN17,Enable Interrupt on line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "INTEN16,Enable Interrupt on line 16" "0,1"
|
|
bitfld.long 0x00 15. "INTEN15,Enable Interrupt on line 15" "0,1"
|
|
bitfld.long 0x00 14. "INTEN14,Enable Interrupt on line 14" "0,1"
|
|
bitfld.long 0x00 13. "INTEN13,Enable Interrupt on line 13" "0,1"
|
|
bitfld.long 0x00 12. "INTEN12,Enable Interrupt on line 12" "0,1"
|
|
bitfld.long 0x00 11. "INTEN11,Enable Interrupt on line 11" "0,1"
|
|
bitfld.long 0x00 10. "INTEN10,Enable Interrupt on line 10" "0,1"
|
|
bitfld.long 0x00 9. "INTEN9,Enable Interrupt on line 9" "0,1"
|
|
bitfld.long 0x00 8. "INTEN8,Enable Interrupt on line 8" "0,1"
|
|
bitfld.long 0x00 7. "INTEN7,Enable Interrupt on line 7" "0,1"
|
|
bitfld.long 0x00 6. "INTEN6,Enable Interrupt on line 6" "0,1"
|
|
bitfld.long 0x00 5. "INTEN5,Enable Interrupt on line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "INTEN4,Enable Interrupt on line 4" "0,1"
|
|
bitfld.long 0x00 3. "INTEN3,Enable Interrupt on line 3" "0,1"
|
|
bitfld.long 0x00 2. "INTEN2,Enable Interrupt on line 2" "0,1"
|
|
bitfld.long 0x00 1. "INTEN1,Enable Interrupt on line 1" "0,1"
|
|
bitfld.long 0x00 0. "INTEN0,Enable Interrupt on line 0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EVEN,Event enable register (EXTI_EVEN)"
|
|
bitfld.long 0x00 28. "EVEN28,Enable Event on line 28" "0,1"
|
|
bitfld.long 0x00 27. "EVEN27,Enable Event on line 27" "0,1"
|
|
bitfld.long 0x00 26. "EVEN26,Enable Event on line 26" "0,1"
|
|
bitfld.long 0x00 25. "EVEN25,Enable Event on line 25" "0,1"
|
|
bitfld.long 0x00 24. "EVEN24,Enable Event on line 24" "0,1"
|
|
bitfld.long 0x00 23. "EVEN23,Enable Event on line 23" "0,1"
|
|
bitfld.long 0x00 22. "EVEN22,Enable Event on line 22" "0,1"
|
|
bitfld.long 0x00 21. "EVEN21,Enable Event on line 21" "0,1"
|
|
bitfld.long 0x00 20. "EVEN20,Enable Event on line 20" "0,1"
|
|
bitfld.long 0x00 19. "EVEN19,Enable Event on line 19" "0,1"
|
|
bitfld.long 0x00 18. "EVEN18,Enable Event on line 18" "0,1"
|
|
bitfld.long 0x00 17. "EVEN17,Enable Event on line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "EVEN16,Enable Event on line 16" "0,1"
|
|
bitfld.long 0x00 15. "EVEN15,Enable Event on line 15" "0,1"
|
|
bitfld.long 0x00 14. "EVEN14,Enable Event on line 14" "0,1"
|
|
bitfld.long 0x00 13. "EVEN13,Enable Event on line 13" "0,1"
|
|
bitfld.long 0x00 12. "EVEN12,Enable Event on line 12" "0,1"
|
|
bitfld.long 0x00 11. "EVEN11,Enable Event on line 11" "0,1"
|
|
bitfld.long 0x00 10. "EVEN10,Enable Event on line 10" "0,1"
|
|
bitfld.long 0x00 9. "EVEN9,Enable Event on line 9" "0,1"
|
|
bitfld.long 0x00 8. "EVEN8,Enable Event on line 8" "0,1"
|
|
bitfld.long 0x00 7. "EVEN7,Enable Event on line 7" "0,1"
|
|
bitfld.long 0x00 6. "EVEN6,Enable Event on line 6" "0,1"
|
|
bitfld.long 0x00 5. "EVEN5,Enable Event on line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "EVEN4,Enable Event on line 4" "0,1"
|
|
bitfld.long 0x00 3. "EVEN3,Enable Event on line 3" "0,1"
|
|
bitfld.long 0x00 2. "EVEN2,Enable Event on line 2" "0,1"
|
|
bitfld.long 0x00 1. "EVEN1,Enable Event on line 1" "0,1"
|
|
bitfld.long 0x00 0. "EVEN0,Enable Event on line 0" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RTEN,Rising Edge Trigger Enable register (EXTI_RTEN)"
|
|
bitfld.long 0x00 28. "RTEN28,Rising edge trigger enable of line 28" "0,1"
|
|
bitfld.long 0x00 27. "RTEN27,Rising edge trigger enable of line 27" "0,1"
|
|
bitfld.long 0x00 26. "RTEN26,Rising edge trigger enable of line 26" "0,1"
|
|
bitfld.long 0x00 25. "RTEN25,Rising edge trigger enable of line 25" "0,1"
|
|
bitfld.long 0x00 24. "RTEN24,Rising edge trigger enable of line 24" "0,1"
|
|
bitfld.long 0x00 23. "RTEN23,Rising edge trigger enable of line 23" "0,1"
|
|
bitfld.long 0x00 22. "RTEN22,Rising edge trigger enable of line 22" "0,1"
|
|
bitfld.long 0x00 21. "RTEN21,Rising edge trigger enable of line 21" "0,1"
|
|
bitfld.long 0x00 20. "RTEN20,Rising edge trigger enable of line 20" "0,1"
|
|
bitfld.long 0x00 19. "RTEN19,Rising edge trigger enable of line 19" "0,1"
|
|
bitfld.long 0x00 18. "RTEN18,Rising edge trigger enable of line 18" "0,1"
|
|
bitfld.long 0x00 17. "RTEN17,Rising edge trigger enable of line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "RTEN16,Rising edge trigger enable of line 16" "0,1"
|
|
bitfld.long 0x00 15. "RTEN15,Rising edge trigger enable of line 15" "0,1"
|
|
bitfld.long 0x00 14. "RTEN14,Rising edge trigger enable of line 14" "0,1"
|
|
bitfld.long 0x00 13. "RTEN13,Rising edge trigger enable of line 13" "0,1"
|
|
bitfld.long 0x00 12. "RTEN12,Rising edge trigger enable of line 12" "0,1"
|
|
bitfld.long 0x00 11. "RTEN11,Rising edge trigger enable of line 11" "0,1"
|
|
bitfld.long 0x00 10. "RTEN10,Rising edge trigger enable of line 10" "0,1"
|
|
bitfld.long 0x00 9. "RTEN9,Rising edge trigger enable of line 9" "0,1"
|
|
bitfld.long 0x00 8. "RTEN8,Rising edge trigger enable of line 8" "0,1"
|
|
bitfld.long 0x00 7. "RTEN7,Rising edge trigger enable of line 7" "0,1"
|
|
bitfld.long 0x00 6. "RTEN6,Rising edge trigger enable of line 6" "0,1"
|
|
bitfld.long 0x00 5. "RTEN5,Rising edge trigger enable of line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RTEN4,Rising edge trigger enable of line 4" "0,1"
|
|
bitfld.long 0x00 3. "RTEN3,Rising edge trigger enable of line 3" "0,1"
|
|
bitfld.long 0x00 2. "RTEN2,Rising edge trigger enable of line 2" "0,1"
|
|
bitfld.long 0x00 1. "RTEN1,Rising edge trigger enable of line 1" "0,1"
|
|
bitfld.long 0x00 0. "RTEN0,Rising edge trigger enable of line 0" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FTEN,Falling Egde Trigger Enable register (EXTI_FTEN)"
|
|
bitfld.long 0x00 28. "FTEN28,Falling edge trigger enable of line 28" "0,1"
|
|
bitfld.long 0x00 27. "FTEN27,Falling edge trigger enable of line 27" "0,1"
|
|
bitfld.long 0x00 26. "FTEN26,Falling edge trigger enable of line 26" "0,1"
|
|
bitfld.long 0x00 25. "FTEN25,Falling edge trigger enable of line 25" "0,1"
|
|
bitfld.long 0x00 24. "FTEN24,Falling edge trigger enable of line 24" "0,1"
|
|
bitfld.long 0x00 23. "FTEN23,Falling edge trigger enable of line 23" "0,1"
|
|
bitfld.long 0x00 22. "FTEN22,Falling edge trigger enable of line 22" "0,1"
|
|
bitfld.long 0x00 21. "FTEN21,Falling edge trigger enable of line 21" "0,1"
|
|
bitfld.long 0x00 20. "FTEN20,Falling edge trigger enable of line 20" "0,1"
|
|
bitfld.long 0x00 19. "FTEN19,Falling edge trigger enable of line 19" "0,1"
|
|
bitfld.long 0x00 18. "FTEN18,Falling edge trigger enable of line 18" "0,1"
|
|
bitfld.long 0x00 17. "FTEN17,Falling edge trigger enable of line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FTEN16,Falling edge trigger enable of line 16" "0,1"
|
|
bitfld.long 0x00 15. "FTEN15,Falling edge trigger enable of line 15" "0,1"
|
|
bitfld.long 0x00 14. "FTEN14,Falling edge trigger enable of line 14" "0,1"
|
|
bitfld.long 0x00 13. "FTEN13,Falling edge trigger enable of line 13" "0,1"
|
|
bitfld.long 0x00 12. "FTEN12,Falling edge trigger enable of line 12" "0,1"
|
|
bitfld.long 0x00 11. "FTEN11,Falling edge trigger enable of line 11" "0,1"
|
|
bitfld.long 0x00 10. "FTEN10,Falling edge trigger enable of line 10" "0,1"
|
|
bitfld.long 0x00 9. "FTEN9,Falling edge trigger enable of line 9" "0,1"
|
|
bitfld.long 0x00 8. "FTEN8,Falling edge trigger enable of line 8" "0,1"
|
|
bitfld.long 0x00 7. "FTEN7,Falling edge trigger enable of line 7" "0,1"
|
|
bitfld.long 0x00 6. "FTEN6,Falling edge trigger enable of line 6" "0,1"
|
|
bitfld.long 0x00 5. "FTEN5,Falling edge trigger enable of line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "FTEN4,Falling edge trigger enable of line 4" "0,1"
|
|
bitfld.long 0x00 3. "FTEN3,Falling edge trigger enable of line 3" "0,1"
|
|
bitfld.long 0x00 2. "FTEN2,Falling edge trigger enable of line 2" "0,1"
|
|
bitfld.long 0x00 1. "FTEN1,Falling edge trigger enable of line 1" "0,1"
|
|
bitfld.long 0x00 0. "FTEN0,Falling edge trigger enable of line 0" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SWIEV,Software interrupt event register (EXTI_SWIEV)"
|
|
bitfld.long 0x00 28. "SWIEV28,Interrupt/Event software trigger on line 28" "0,1"
|
|
bitfld.long 0x00 27. "SWIEV27,Interrupt/Event software trigger on line 27" "0,1"
|
|
bitfld.long 0x00 26. "SWIEV26,Interrupt/Event software trigger on line 26" "0,1"
|
|
bitfld.long 0x00 25. "SWIEV25,Interrupt/Event software trigger on line 25" "0,1"
|
|
bitfld.long 0x00 24. "SWIEV24,Interrupt/Event software trigger on line 24" "0,1"
|
|
bitfld.long 0x00 23. "SWIEV23,Interrupt/Event software trigger on line 23" "0,1"
|
|
bitfld.long 0x00 22. "SWIEV22,Interrupt/Event software trigger on line 22" "0,1"
|
|
bitfld.long 0x00 21. "SWIEV21,Interrupt/Event software trigger on line 21" "0,1"
|
|
bitfld.long 0x00 20. "SWIEV20,Interrupt/Event software trigger on line 20" "0,1"
|
|
bitfld.long 0x00 19. "SWIEV19,Interrupt/Event software trigger on line 19" "0,1"
|
|
bitfld.long 0x00 18. "SWIEV18,Interrupt/Event software trigger on line 18" "0,1"
|
|
bitfld.long 0x00 17. "SWIEV17,Interrupt/Event software trigger on line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SWIEV16,Interrupt/Event software trigger on line 16" "0,1"
|
|
bitfld.long 0x00 15. "SWIEV15,Interrupt/Event software trigger on line 15" "0,1"
|
|
bitfld.long 0x00 14. "SWIEV14,Interrupt/Event software trigger on line 14" "0,1"
|
|
bitfld.long 0x00 13. "SWIEV13,Interrupt/Event software trigger on line 13" "0,1"
|
|
bitfld.long 0x00 12. "SWIEV12,Interrupt/Event software trigger on line 12" "0,1"
|
|
bitfld.long 0x00 11. "SWIEV11,Interrupt/Event software trigger on line 11" "0,1"
|
|
bitfld.long 0x00 10. "SWIEV10,Interrupt/Event software trigger on line 10" "0,1"
|
|
bitfld.long 0x00 9. "SWIEV9,Interrupt/Event software trigger on line 9" "0,1"
|
|
bitfld.long 0x00 8. "SWIEV8,Interrupt/Event software trigger on line 8" "0,1"
|
|
bitfld.long 0x00 7. "SWIEV7,Interrupt/Event software trigger on line 7" "0,1"
|
|
bitfld.long 0x00 6. "SWIEV6,Interrupt/Event software trigger on line 6" "0,1"
|
|
bitfld.long 0x00 5. "SWIEV5,Interrupt/Event software trigger on line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SWIEV4,Interrupt/Event software trigger on line 4" "0,1"
|
|
bitfld.long 0x00 3. "SWIEV3,Interrupt/Event software trigger on line 3" "0,1"
|
|
bitfld.long 0x00 2. "SWIEV2,Interrupt/Event software trigger on line 2" "0,1"
|
|
bitfld.long 0x00 1. "SWIEV1,Interrupt/Event software trigger on line 1" "0,1"
|
|
bitfld.long 0x00 0. "SWIEV0,Interrupt/Event software trigger on line 0" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PD,Pending register (EXTI_PD)"
|
|
bitfld.long 0x00 28. "PD28,Interrupt pending status of line 28" "0,1"
|
|
bitfld.long 0x00 27. "PD27,Interrupt pending status of line 27" "0,1"
|
|
bitfld.long 0x00 26. "PD26,Interrupt pending status of line 26" "0,1"
|
|
bitfld.long 0x00 25. "PD25,Interrupt pending status of line 25" "0,1"
|
|
bitfld.long 0x00 24. "PD24,Interrupt pending status of line 24" "0,1"
|
|
bitfld.long 0x00 23. "PD23,Interrupt pending status of line 23" "0,1"
|
|
bitfld.long 0x00 22. "PD22,Interrupt pending status of line 22" "0,1"
|
|
bitfld.long 0x00 21. "PD21,Interrupt pending status of line 21" "0,1"
|
|
bitfld.long 0x00 20. "PD20,Interrupt pending status of line 20" "0,1"
|
|
bitfld.long 0x00 19. "PD19,Interrupt pending status of line 19" "0,1"
|
|
bitfld.long 0x00 18. "PD18,Interrupt pending status of line 18" "0,1"
|
|
bitfld.long 0x00 17. "PD17,Interrupt pending status of line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PD16,Interrupt pending status of line 16" "0,1"
|
|
bitfld.long 0x00 15. "PD15,Interrupt pending status of line 15" "0,1"
|
|
bitfld.long 0x00 14. "PD14,Interrupt pending status of line 14" "0,1"
|
|
bitfld.long 0x00 13. "PD13,Interrupt pending status of line 13" "0,1"
|
|
bitfld.long 0x00 12. "PD12,Interrupt pending status of line 12" "0,1"
|
|
bitfld.long 0x00 11. "PD11,Interrupt pending status of line 11" "0,1"
|
|
bitfld.long 0x00 10. "PD10,Interrupt pending status of line 10" "0,1"
|
|
bitfld.long 0x00 9. "PD9,Interrupt pending status of line 9" "0,1"
|
|
bitfld.long 0x00 8. "PD8,Interrupt pending status of line 8" "0,1"
|
|
bitfld.long 0x00 7. "PD7,Interrupt pending status of line 7" "0,1"
|
|
bitfld.long 0x00 6. "PD6,Interrupt pending status of line 6" "0,1"
|
|
bitfld.long 0x00 5. "PD5,Interrupt pending status of line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PD4,Interrupt pending status of line 4" "0,1"
|
|
bitfld.long 0x00 3. "PD3,Interrupt pending status of line 3" "0,1"
|
|
bitfld.long 0x00 2. "PD2,Interrupt pending status of line 2" "0,1"
|
|
bitfld.long 0x00 1. "PD1,Interrupt pending status of line 1" "0,1"
|
|
bitfld.long 0x00 0. "PD0,Interrupt pending status of line 0" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SECCFG,EXTI security configuration register"
|
|
bitfld.long 0x00 28. "SEC28,Security enable on event input 28" "0,1"
|
|
bitfld.long 0x00 27. "SEC27,Security enable on event input 27" "0,1"
|
|
bitfld.long 0x00 26. "SEC26,Security enable on event input 26" "0,1"
|
|
bitfld.long 0x00 25. "SEC25,Security enable on event input 25" "0,1"
|
|
bitfld.long 0x00 24. "SEC24,Security enable on event input 24" "0,1"
|
|
bitfld.long 0x00 23. "SEC23,Security enable on event input 23" "0,1"
|
|
bitfld.long 0x00 22. "SEC22,Security enable on event input 22" "0,1"
|
|
bitfld.long 0x00 21. "SEC21,Security enable on event input 21" "0,1"
|
|
bitfld.long 0x00 20. "SEC20,Security enable on event input 20" "0,1"
|
|
bitfld.long 0x00 19. "SEC19,Security enable on event input 19" "0,1"
|
|
bitfld.long 0x00 18. "SEC18,Security enable on event input 18" "0,1"
|
|
bitfld.long 0x00 17. "SEC17,Security enable on event input 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SEC16,Security enable on event input 16" "0,1"
|
|
bitfld.long 0x00 15. "SEC15,Security enable on event input 15" "0,1"
|
|
bitfld.long 0x00 14. "SEC14,Security enable on event input 14" "0,1"
|
|
bitfld.long 0x00 13. "SEC13,Security enable on event input 13" "0,1"
|
|
bitfld.long 0x00 12. "SEC12,Security enable on event input 12" "0,1"
|
|
bitfld.long 0x00 11. "SEC11,Security enable on event input 11" "0,1"
|
|
bitfld.long 0x00 10. "SEC10,Security enable on event input 10" "0,1"
|
|
bitfld.long 0x00 9. "SEC9,Security enable on event input 9" "0,1"
|
|
bitfld.long 0x00 8. "SEC8,Security enable on event input 8" "0,1"
|
|
bitfld.long 0x00 7. "SEC7,Security enable on event input 7" "0,1"
|
|
bitfld.long 0x00 6. "SEC6,Security enable on event input 6" "0,1"
|
|
bitfld.long 0x00 5. "SEC5,Security enable on event input 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SEC4,Security enable on event input 4" "0,1"
|
|
bitfld.long 0x00 3. "SEC3,Security enable on event input 3" "0,1"
|
|
bitfld.long 0x00 2. "SEC2,Security enable on event input 2" "0,1"
|
|
bitfld.long 0x00 1. "SEC1,Security enable on event input 1" "0,1"
|
|
bitfld.long 0x00 0. "SEC0,Security enable on event input 0" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PRIVCFG,EXTI privilege configuration register"
|
|
bitfld.long 0x00 28. "PRIV28,Security enable on event input 28" "0,1"
|
|
bitfld.long 0x00 27. "PRIV27,Security enable on event input 27" "0,1"
|
|
bitfld.long 0x00 26. "PRIV26,Security enable on event input 26" "0,1"
|
|
bitfld.long 0x00 25. "PRIV25,Security enable on event input 25" "0,1"
|
|
bitfld.long 0x00 24. "PRIV24,Security enable on event input 24" "0,1"
|
|
bitfld.long 0x00 23. "PRIV23,Security enable on event input 23" "0,1"
|
|
bitfld.long 0x00 22. "PRIV22,Security enable on event input 22" "0,1"
|
|
bitfld.long 0x00 21. "PRIV21,Security enable on event input 21" "0,1"
|
|
bitfld.long 0x00 20. "PRIV20,Security enable on event input 20" "0,1"
|
|
bitfld.long 0x00 19. "PRIV19,Security enable on event input 19" "0,1"
|
|
bitfld.long 0x00 18. "PRIV18,Security enable on event input 18" "0,1"
|
|
bitfld.long 0x00 17. "PRIV17,Security enable on event input 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PRIV16,Security enable on event input 16" "0,1"
|
|
bitfld.long 0x00 15. "PRIV15,Security enable on event input 15" "0,1"
|
|
bitfld.long 0x00 14. "PRIV14,Security enable on event input 14" "0,1"
|
|
bitfld.long 0x00 13. "PRIV13,Security enable on event input 13" "0,1"
|
|
bitfld.long 0x00 12. "PRIV12,Security enable on event input 12" "0,1"
|
|
bitfld.long 0x00 11. "PRIV11,Security enable on event input 11" "0,1"
|
|
bitfld.long 0x00 10. "PRIV10,Security enable on event input 10" "0,1"
|
|
bitfld.long 0x00 9. "PRIV9,Security enable on event input 9" "0,1"
|
|
bitfld.long 0x00 8. "PRIV8,Security enable on event input 8" "0,1"
|
|
bitfld.long 0x00 7. "PRIV7,Security enable on event input 7" "0,1"
|
|
bitfld.long 0x00 6. "PRIV6,Security enable on event input 6" "0,1"
|
|
bitfld.long 0x00 5. "PRIV5,Security enable on event input 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PRIV4,Security enable on event input 4" "0,1"
|
|
bitfld.long 0x00 3. "PRIV3,Security enable on event input 3" "0,1"
|
|
bitfld.long 0x00 2. "PRIV2,Security enable on event input 2" "0,1"
|
|
bitfld.long 0x00 1. "PRIV1,Security enable on event input 1" "0,1"
|
|
bitfld.long 0x00 0. "PRIV0,Security enable on event input 0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "LOCK,EXTI lock register"
|
|
bitfld.long 0x00 0. "LOCK,Global security and privilege configuration registers" "0,1"
|
|
tree.end
|
|
tree "SEC_EXTI"
|
|
base ad:0x50013C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register (EXTI_INTEN)"
|
|
bitfld.long 0x00 28. "INTEN28,Enable Interrupt on line 28" "0,1"
|
|
bitfld.long 0x00 27. "INTEN27,Enable Interrupt on line 27" "0,1"
|
|
bitfld.long 0x00 26. "INTEN26,Enable Interrupt on line 26" "0,1"
|
|
bitfld.long 0x00 25. "INTEN25,Enable Interrupt on line 25" "0,1"
|
|
bitfld.long 0x00 24. "INTEN24,Enable Interrupt on line 24" "0,1"
|
|
bitfld.long 0x00 23. "INTEN23,Enable Interrupt on line 23" "0,1"
|
|
bitfld.long 0x00 22. "INTEN22,Enable Interrupt on line 22" "0,1"
|
|
bitfld.long 0x00 21. "INTEN21,Enable Interrupt on line 21" "0,1"
|
|
bitfld.long 0x00 20. "INTEN20,Enable Interrupt on line 20" "0,1"
|
|
bitfld.long 0x00 19. "INTEN19,Enable Interrupt on line 19" "0,1"
|
|
bitfld.long 0x00 18. "INTEN18,Enable Interrupt on line 18" "0,1"
|
|
bitfld.long 0x00 17. "INTEN17,Enable Interrupt on line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "INTEN16,Enable Interrupt on line 16" "0,1"
|
|
bitfld.long 0x00 15. "INTEN15,Enable Interrupt on line 15" "0,1"
|
|
bitfld.long 0x00 14. "INTEN14,Enable Interrupt on line 14" "0,1"
|
|
bitfld.long 0x00 13. "INTEN13,Enable Interrupt on line 13" "0,1"
|
|
bitfld.long 0x00 12. "INTEN12,Enable Interrupt on line 12" "0,1"
|
|
bitfld.long 0x00 11. "INTEN11,Enable Interrupt on line 11" "0,1"
|
|
bitfld.long 0x00 10. "INTEN10,Enable Interrupt on line 10" "0,1"
|
|
bitfld.long 0x00 9. "INTEN9,Enable Interrupt on line 9" "0,1"
|
|
bitfld.long 0x00 8. "INTEN8,Enable Interrupt on line 8" "0,1"
|
|
bitfld.long 0x00 7. "INTEN7,Enable Interrupt on line 7" "0,1"
|
|
bitfld.long 0x00 6. "INTEN6,Enable Interrupt on line 6" "0,1"
|
|
bitfld.long 0x00 5. "INTEN5,Enable Interrupt on line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "INTEN4,Enable Interrupt on line 4" "0,1"
|
|
bitfld.long 0x00 3. "INTEN3,Enable Interrupt on line 3" "0,1"
|
|
bitfld.long 0x00 2. "INTEN2,Enable Interrupt on line 2" "0,1"
|
|
bitfld.long 0x00 1. "INTEN1,Enable Interrupt on line 1" "0,1"
|
|
bitfld.long 0x00 0. "INTEN0,Enable Interrupt on line 0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EVEN,Event enable register (EXTI_EVEN)"
|
|
bitfld.long 0x00 28. "EVEN28,Enable Event on line 28" "0,1"
|
|
bitfld.long 0x00 27. "EVEN27,Enable Event on line 27" "0,1"
|
|
bitfld.long 0x00 26. "EVEN26,Enable Event on line 26" "0,1"
|
|
bitfld.long 0x00 25. "EVEN25,Enable Event on line 25" "0,1"
|
|
bitfld.long 0x00 24. "EVEN24,Enable Event on line 24" "0,1"
|
|
bitfld.long 0x00 23. "EVEN23,Enable Event on line 23" "0,1"
|
|
bitfld.long 0x00 22. "EVEN22,Enable Event on line 22" "0,1"
|
|
bitfld.long 0x00 21. "EVEN21,Enable Event on line 21" "0,1"
|
|
bitfld.long 0x00 20. "EVEN20,Enable Event on line 20" "0,1"
|
|
bitfld.long 0x00 19. "EVEN19,Enable Event on line 19" "0,1"
|
|
bitfld.long 0x00 18. "EVEN18,Enable Event on line 18" "0,1"
|
|
bitfld.long 0x00 17. "EVEN17,Enable Event on line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "EVEN16,Enable Event on line 16" "0,1"
|
|
bitfld.long 0x00 15. "EVEN15,Enable Event on line 15" "0,1"
|
|
bitfld.long 0x00 14. "EVEN14,Enable Event on line 14" "0,1"
|
|
bitfld.long 0x00 13. "EVEN13,Enable Event on line 13" "0,1"
|
|
bitfld.long 0x00 12. "EVEN12,Enable Event on line 12" "0,1"
|
|
bitfld.long 0x00 11. "EVEN11,Enable Event on line 11" "0,1"
|
|
bitfld.long 0x00 10. "EVEN10,Enable Event on line 10" "0,1"
|
|
bitfld.long 0x00 9. "EVEN9,Enable Event on line 9" "0,1"
|
|
bitfld.long 0x00 8. "EVEN8,Enable Event on line 8" "0,1"
|
|
bitfld.long 0x00 7. "EVEN7,Enable Event on line 7" "0,1"
|
|
bitfld.long 0x00 6. "EVEN6,Enable Event on line 6" "0,1"
|
|
bitfld.long 0x00 5. "EVEN5,Enable Event on line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "EVEN4,Enable Event on line 4" "0,1"
|
|
bitfld.long 0x00 3. "EVEN3,Enable Event on line 3" "0,1"
|
|
bitfld.long 0x00 2. "EVEN2,Enable Event on line 2" "0,1"
|
|
bitfld.long 0x00 1. "EVEN1,Enable Event on line 1" "0,1"
|
|
bitfld.long 0x00 0. "EVEN0,Enable Event on line 0" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RTEN,Rising Edge Trigger Enable register (EXTI_RTEN)"
|
|
bitfld.long 0x00 28. "RTEN28,Rising edge trigger enable of line 28" "0,1"
|
|
bitfld.long 0x00 27. "RTEN27,Rising edge trigger enable of line 27" "0,1"
|
|
bitfld.long 0x00 26. "RTEN26,Rising edge trigger enable of line 26" "0,1"
|
|
bitfld.long 0x00 25. "RTEN25,Rising edge trigger enable of line 25" "0,1"
|
|
bitfld.long 0x00 24. "RTEN24,Rising edge trigger enable of line 24" "0,1"
|
|
bitfld.long 0x00 23. "RTEN23,Rising edge trigger enable of line 23" "0,1"
|
|
bitfld.long 0x00 22. "RTEN22,Rising edge trigger enable of line 22" "0,1"
|
|
bitfld.long 0x00 21. "RTEN21,Rising edge trigger enable of line 21" "0,1"
|
|
bitfld.long 0x00 20. "RTEN20,Rising edge trigger enable of line 20" "0,1"
|
|
bitfld.long 0x00 19. "RTEN19,Rising edge trigger enable of line 19" "0,1"
|
|
bitfld.long 0x00 18. "RTEN18,Rising edge trigger enable of line 18" "0,1"
|
|
bitfld.long 0x00 17. "RTEN17,Rising edge trigger enable of line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "RTEN16,Rising edge trigger enable of line 16" "0,1"
|
|
bitfld.long 0x00 15. "RTEN15,Rising edge trigger enable of line 15" "0,1"
|
|
bitfld.long 0x00 14. "RTEN14,Rising edge trigger enable of line 14" "0,1"
|
|
bitfld.long 0x00 13. "RTEN13,Rising edge trigger enable of line 13" "0,1"
|
|
bitfld.long 0x00 12. "RTEN12,Rising edge trigger enable of line 12" "0,1"
|
|
bitfld.long 0x00 11. "RTEN11,Rising edge trigger enable of line 11" "0,1"
|
|
bitfld.long 0x00 10. "RTEN10,Rising edge trigger enable of line 10" "0,1"
|
|
bitfld.long 0x00 9. "RTEN9,Rising edge trigger enable of line 9" "0,1"
|
|
bitfld.long 0x00 8. "RTEN8,Rising edge trigger enable of line 8" "0,1"
|
|
bitfld.long 0x00 7. "RTEN7,Rising edge trigger enable of line 7" "0,1"
|
|
bitfld.long 0x00 6. "RTEN6,Rising edge trigger enable of line 6" "0,1"
|
|
bitfld.long 0x00 5. "RTEN5,Rising edge trigger enable of line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RTEN4,Rising edge trigger enable of line 4" "0,1"
|
|
bitfld.long 0x00 3. "RTEN3,Rising edge trigger enable of line 3" "0,1"
|
|
bitfld.long 0x00 2. "RTEN2,Rising edge trigger enable of line 2" "0,1"
|
|
bitfld.long 0x00 1. "RTEN1,Rising edge trigger enable of line 1" "0,1"
|
|
bitfld.long 0x00 0. "RTEN0,Rising edge trigger enable of line 0" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FTEN,Falling Egde Trigger Enable register (EXTI_FTEN)"
|
|
bitfld.long 0x00 28. "FTEN28,Falling edge trigger enable of line 28" "0,1"
|
|
bitfld.long 0x00 27. "FTEN27,Falling edge trigger enable of line 27" "0,1"
|
|
bitfld.long 0x00 26. "FTEN26,Falling edge trigger enable of line 26" "0,1"
|
|
bitfld.long 0x00 25. "FTEN25,Falling edge trigger enable of line 25" "0,1"
|
|
bitfld.long 0x00 24. "FTEN24,Falling edge trigger enable of line 24" "0,1"
|
|
bitfld.long 0x00 23. "FTEN23,Falling edge trigger enable of line 23" "0,1"
|
|
bitfld.long 0x00 22. "FTEN22,Falling edge trigger enable of line 22" "0,1"
|
|
bitfld.long 0x00 21. "FTEN21,Falling edge trigger enable of line 21" "0,1"
|
|
bitfld.long 0x00 20. "FTEN20,Falling edge trigger enable of line 20" "0,1"
|
|
bitfld.long 0x00 19. "FTEN19,Falling edge trigger enable of line 19" "0,1"
|
|
bitfld.long 0x00 18. "FTEN18,Falling edge trigger enable of line 18" "0,1"
|
|
bitfld.long 0x00 17. "FTEN17,Falling edge trigger enable of line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FTEN16,Falling edge trigger enable of line 16" "0,1"
|
|
bitfld.long 0x00 15. "FTEN15,Falling edge trigger enable of line 15" "0,1"
|
|
bitfld.long 0x00 14. "FTEN14,Falling edge trigger enable of line 14" "0,1"
|
|
bitfld.long 0x00 13. "FTEN13,Falling edge trigger enable of line 13" "0,1"
|
|
bitfld.long 0x00 12. "FTEN12,Falling edge trigger enable of line 12" "0,1"
|
|
bitfld.long 0x00 11. "FTEN11,Falling edge trigger enable of line 11" "0,1"
|
|
bitfld.long 0x00 10. "FTEN10,Falling edge trigger enable of line 10" "0,1"
|
|
bitfld.long 0x00 9. "FTEN9,Falling edge trigger enable of line 9" "0,1"
|
|
bitfld.long 0x00 8. "FTEN8,Falling edge trigger enable of line 8" "0,1"
|
|
bitfld.long 0x00 7. "FTEN7,Falling edge trigger enable of line 7" "0,1"
|
|
bitfld.long 0x00 6. "FTEN6,Falling edge trigger enable of line 6" "0,1"
|
|
bitfld.long 0x00 5. "FTEN5,Falling edge trigger enable of line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "FTEN4,Falling edge trigger enable of line 4" "0,1"
|
|
bitfld.long 0x00 3. "FTEN3,Falling edge trigger enable of line 3" "0,1"
|
|
bitfld.long 0x00 2. "FTEN2,Falling edge trigger enable of line 2" "0,1"
|
|
bitfld.long 0x00 1. "FTEN1,Falling edge trigger enable of line 1" "0,1"
|
|
bitfld.long 0x00 0. "FTEN0,Falling edge trigger enable of line 0" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SWIEV,Software interrupt event register (EXTI_SWIEV)"
|
|
bitfld.long 0x00 28. "SWIEV28,Interrupt/Event software trigger on line 28" "0,1"
|
|
bitfld.long 0x00 27. "SWIEV27,Interrupt/Event software trigger on line 27" "0,1"
|
|
bitfld.long 0x00 26. "SWIEV26,Interrupt/Event software trigger on line 26" "0,1"
|
|
bitfld.long 0x00 25. "SWIEV25,Interrupt/Event software trigger on line 25" "0,1"
|
|
bitfld.long 0x00 24. "SWIEV24,Interrupt/Event software trigger on line 24" "0,1"
|
|
bitfld.long 0x00 23. "SWIEV23,Interrupt/Event software trigger on line 23" "0,1"
|
|
bitfld.long 0x00 22. "SWIEV22,Interrupt/Event software trigger on line 22" "0,1"
|
|
bitfld.long 0x00 21. "SWIEV21,Interrupt/Event software trigger on line 21" "0,1"
|
|
bitfld.long 0x00 20. "SWIEV20,Interrupt/Event software trigger on line 20" "0,1"
|
|
bitfld.long 0x00 19. "SWIEV19,Interrupt/Event software trigger on line 19" "0,1"
|
|
bitfld.long 0x00 18. "SWIEV18,Interrupt/Event software trigger on line 18" "0,1"
|
|
bitfld.long 0x00 17. "SWIEV17,Interrupt/Event software trigger on line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SWIEV16,Interrupt/Event software trigger on line 16" "0,1"
|
|
bitfld.long 0x00 15. "SWIEV15,Interrupt/Event software trigger on line 15" "0,1"
|
|
bitfld.long 0x00 14. "SWIEV14,Interrupt/Event software trigger on line 14" "0,1"
|
|
bitfld.long 0x00 13. "SWIEV13,Interrupt/Event software trigger on line 13" "0,1"
|
|
bitfld.long 0x00 12. "SWIEV12,Interrupt/Event software trigger on line 12" "0,1"
|
|
bitfld.long 0x00 11. "SWIEV11,Interrupt/Event software trigger on line 11" "0,1"
|
|
bitfld.long 0x00 10. "SWIEV10,Interrupt/Event software trigger on line 10" "0,1"
|
|
bitfld.long 0x00 9. "SWIEV9,Interrupt/Event software trigger on line 9" "0,1"
|
|
bitfld.long 0x00 8. "SWIEV8,Interrupt/Event software trigger on line 8" "0,1"
|
|
bitfld.long 0x00 7. "SWIEV7,Interrupt/Event software trigger on line 7" "0,1"
|
|
bitfld.long 0x00 6. "SWIEV6,Interrupt/Event software trigger on line 6" "0,1"
|
|
bitfld.long 0x00 5. "SWIEV5,Interrupt/Event software trigger on line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SWIEV4,Interrupt/Event software trigger on line 4" "0,1"
|
|
bitfld.long 0x00 3. "SWIEV3,Interrupt/Event software trigger on line 3" "0,1"
|
|
bitfld.long 0x00 2. "SWIEV2,Interrupt/Event software trigger on line 2" "0,1"
|
|
bitfld.long 0x00 1. "SWIEV1,Interrupt/Event software trigger on line 1" "0,1"
|
|
bitfld.long 0x00 0. "SWIEV0,Interrupt/Event software trigger on line 0" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PD,Pending register (EXTI_PD)"
|
|
bitfld.long 0x00 28. "PD28,Interrupt pending status of line 28" "0,1"
|
|
bitfld.long 0x00 27. "PD27,Interrupt pending status of line 27" "0,1"
|
|
bitfld.long 0x00 26. "PD26,Interrupt pending status of line 26" "0,1"
|
|
bitfld.long 0x00 25. "PD25,Interrupt pending status of line 25" "0,1"
|
|
bitfld.long 0x00 24. "PD24,Interrupt pending status of line 24" "0,1"
|
|
bitfld.long 0x00 23. "PD23,Interrupt pending status of line 23" "0,1"
|
|
bitfld.long 0x00 22. "PD22,Interrupt pending status of line 22" "0,1"
|
|
bitfld.long 0x00 21. "PD21,Interrupt pending status of line 21" "0,1"
|
|
bitfld.long 0x00 20. "PD20,Interrupt pending status of line 20" "0,1"
|
|
bitfld.long 0x00 19. "PD19,Interrupt pending status of line 19" "0,1"
|
|
bitfld.long 0x00 18. "PD18,Interrupt pending status of line 18" "0,1"
|
|
bitfld.long 0x00 17. "PD17,Interrupt pending status of line 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PD16,Interrupt pending status of line 16" "0,1"
|
|
bitfld.long 0x00 15. "PD15,Interrupt pending status of line 15" "0,1"
|
|
bitfld.long 0x00 14. "PD14,Interrupt pending status of line 14" "0,1"
|
|
bitfld.long 0x00 13. "PD13,Interrupt pending status of line 13" "0,1"
|
|
bitfld.long 0x00 12. "PD12,Interrupt pending status of line 12" "0,1"
|
|
bitfld.long 0x00 11. "PD11,Interrupt pending status of line 11" "0,1"
|
|
bitfld.long 0x00 10. "PD10,Interrupt pending status of line 10" "0,1"
|
|
bitfld.long 0x00 9. "PD9,Interrupt pending status of line 9" "0,1"
|
|
bitfld.long 0x00 8. "PD8,Interrupt pending status of line 8" "0,1"
|
|
bitfld.long 0x00 7. "PD7,Interrupt pending status of line 7" "0,1"
|
|
bitfld.long 0x00 6. "PD6,Interrupt pending status of line 6" "0,1"
|
|
bitfld.long 0x00 5. "PD5,Interrupt pending status of line 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PD4,Interrupt pending status of line 4" "0,1"
|
|
bitfld.long 0x00 3. "PD3,Interrupt pending status of line 3" "0,1"
|
|
bitfld.long 0x00 2. "PD2,Interrupt pending status of line 2" "0,1"
|
|
bitfld.long 0x00 1. "PD1,Interrupt pending status of line 1" "0,1"
|
|
bitfld.long 0x00 0. "PD0,Interrupt pending status of line 0" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SECCFG,EXTI security configuration register"
|
|
bitfld.long 0x00 28. "SEC28,Security enable on event input 28" "0,1"
|
|
bitfld.long 0x00 27. "SEC27,Security enable on event input 27" "0,1"
|
|
bitfld.long 0x00 26. "SEC26,Security enable on event input 26" "0,1"
|
|
bitfld.long 0x00 25. "SEC25,Security enable on event input 25" "0,1"
|
|
bitfld.long 0x00 24. "SEC24,Security enable on event input 24" "0,1"
|
|
bitfld.long 0x00 23. "SEC23,Security enable on event input 23" "0,1"
|
|
bitfld.long 0x00 22. "SEC22,Security enable on event input 22" "0,1"
|
|
bitfld.long 0x00 21. "SEC21,Security enable on event input 21" "0,1"
|
|
bitfld.long 0x00 20. "SEC20,Security enable on event input 20" "0,1"
|
|
bitfld.long 0x00 19. "SEC19,Security enable on event input 19" "0,1"
|
|
bitfld.long 0x00 18. "SEC18,Security enable on event input 18" "0,1"
|
|
bitfld.long 0x00 17. "SEC17,Security enable on event input 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SEC16,Security enable on event input 16" "0,1"
|
|
bitfld.long 0x00 15. "SEC15,Security enable on event input 15" "0,1"
|
|
bitfld.long 0x00 14. "SEC14,Security enable on event input 14" "0,1"
|
|
bitfld.long 0x00 13. "SEC13,Security enable on event input 13" "0,1"
|
|
bitfld.long 0x00 12. "SEC12,Security enable on event input 12" "0,1"
|
|
bitfld.long 0x00 11. "SEC11,Security enable on event input 11" "0,1"
|
|
bitfld.long 0x00 10. "SEC10,Security enable on event input 10" "0,1"
|
|
bitfld.long 0x00 9. "SEC9,Security enable on event input 9" "0,1"
|
|
bitfld.long 0x00 8. "SEC8,Security enable on event input 8" "0,1"
|
|
bitfld.long 0x00 7. "SEC7,Security enable on event input 7" "0,1"
|
|
bitfld.long 0x00 6. "SEC6,Security enable on event input 6" "0,1"
|
|
bitfld.long 0x00 5. "SEC5,Security enable on event input 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SEC4,Security enable on event input 4" "0,1"
|
|
bitfld.long 0x00 3. "SEC3,Security enable on event input 3" "0,1"
|
|
bitfld.long 0x00 2. "SEC2,Security enable on event input 2" "0,1"
|
|
bitfld.long 0x00 1. "SEC1,Security enable on event input 1" "0,1"
|
|
bitfld.long 0x00 0. "SEC0,Security enable on event input 0" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PRIVCFG,EXTI privilege configuration register"
|
|
bitfld.long 0x00 28. "PRIV28,Security enable on event input 28" "0,1"
|
|
bitfld.long 0x00 27. "PRIV27,Security enable on event input 27" "0,1"
|
|
bitfld.long 0x00 26. "PRIV26,Security enable on event input 26" "0,1"
|
|
bitfld.long 0x00 25. "PRIV25,Security enable on event input 25" "0,1"
|
|
bitfld.long 0x00 24. "PRIV24,Security enable on event input 24" "0,1"
|
|
bitfld.long 0x00 23. "PRIV23,Security enable on event input 23" "0,1"
|
|
bitfld.long 0x00 22. "PRIV22,Security enable on event input 22" "0,1"
|
|
bitfld.long 0x00 21. "PRIV21,Security enable on event input 21" "0,1"
|
|
bitfld.long 0x00 20. "PRIV20,Security enable on event input 20" "0,1"
|
|
bitfld.long 0x00 19. "PRIV19,Security enable on event input 19" "0,1"
|
|
bitfld.long 0x00 18. "PRIV18,Security enable on event input 18" "0,1"
|
|
bitfld.long 0x00 17. "PRIV17,Security enable on event input 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PRIV16,Security enable on event input 16" "0,1"
|
|
bitfld.long 0x00 15. "PRIV15,Security enable on event input 15" "0,1"
|
|
bitfld.long 0x00 14. "PRIV14,Security enable on event input 14" "0,1"
|
|
bitfld.long 0x00 13. "PRIV13,Security enable on event input 13" "0,1"
|
|
bitfld.long 0x00 12. "PRIV12,Security enable on event input 12" "0,1"
|
|
bitfld.long 0x00 11. "PRIV11,Security enable on event input 11" "0,1"
|
|
bitfld.long 0x00 10. "PRIV10,Security enable on event input 10" "0,1"
|
|
bitfld.long 0x00 9. "PRIV9,Security enable on event input 9" "0,1"
|
|
bitfld.long 0x00 8. "PRIV8,Security enable on event input 8" "0,1"
|
|
bitfld.long 0x00 7. "PRIV7,Security enable on event input 7" "0,1"
|
|
bitfld.long 0x00 6. "PRIV6,Security enable on event input 6" "0,1"
|
|
bitfld.long 0x00 5. "PRIV5,Security enable on event input 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PRIV4,Security enable on event input 4" "0,1"
|
|
bitfld.long 0x00 3. "PRIV3,Security enable on event input 3" "0,1"
|
|
bitfld.long 0x00 2. "PRIV2,Security enable on event input 2" "0,1"
|
|
bitfld.long 0x00 1. "PRIV1,Security enable on event input 1" "0,1"
|
|
bitfld.long 0x00 0. "PRIV0,Security enable on event input 0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "LOCK,EXTI lock register"
|
|
bitfld.long 0x00 0. "LOCK,Global security and privilege configuration registers" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "FMC"
|
|
tree "FMC"
|
|
base ad:0x40022000
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "KEY,Unlock key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,FMC_CTL unlock register"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "OBKEY,Option byte unlock key register"
|
|
hexmask.long 0x00 0.--31. 1. "OBKEY,FMC_ OBCTL0 option byte operation unlock register"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 5. "ENDF,End of operation flag bit" "0,1"
|
|
bitfld.long 0x00 4. "WPERR,Erase/Program protection error flag bit" "0,1"
|
|
bitfld.long 0x00 3. "OBERR,Option bytes error flag bit" "0,1"
|
|
rbitfld.long 0x00 0. "BUSY,The flash is busy bit" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 15. "OBRLD,Option byte reload bit" "0,1"
|
|
bitfld.long 0x00 14. "OBSTART,Option bytes modification start bit" "0,1"
|
|
bitfld.long 0x00 12. "ENDIE,End of operation interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "ERRIE,Error interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 9. "OBWEN,FMC_OFVR write enable bit" "0,1"
|
|
bitfld.long 0x00 7. "LK,FMC_CTL lock bit" "0,1"
|
|
bitfld.long 0x00 6. "START,Send erase command to FMC" "0,1"
|
|
bitfld.long 0x00 2. "MER,Main flash mass erase command bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PER,Main flash page erase command bit" "0,1"
|
|
bitfld.long 0x00 0. "PG,Main flash program command bit" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "ADDR,Address register"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,Flash erase/program command address bits"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "OBSTAT,Option byte status register"
|
|
bitfld.long 0x00 5. "FMCOB,Whether the option byte exist or not" "0,1"
|
|
bitfld.long 0x00 4. "NQSPI,Memory structure is FMC mode or QSPI mode" "0,1"
|
|
bitfld.long 0x00 3. "TZEN_STAT,Trust zone state" "0,1"
|
|
bitfld.long 0x00 2. "WP,Write/erase protection state" "0,1"
|
|
bitfld.long 0x00 1. "SPC,Security protection level 1 state" "0,1"
|
|
bitfld.long 0x00 0. "SPC_P5,Security protection level 0.5 state" "0,1"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "SECKEY,Secure Unlock key register"
|
|
hexmask.long 0x00 0.--31. 1. "SECKEY,FMC_SECCTL unlock register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SECSTAT,Secure status register"
|
|
bitfld.long 0x00 5. "SECENDF,End of operation flag" "0,1"
|
|
bitfld.long 0x00 4. "SECWPERR,Erase/Program protection error flag" "0,1"
|
|
bitfld.long 0x00 3. "SECERR,Secure error flag" "0,1"
|
|
bitfld.long 0x00 0. "SECBUSY,The flash is busy" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SECCTL,Secure Control register"
|
|
bitfld.long 0x00 12. "SECENDIE,End of operation interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "SECERRIE,Error interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 7. "SECLK,FMC_SECCTL lock bit" "0,1"
|
|
bitfld.long 0x00 6. "SECSTART,Send erase command to FMC bit" "0,1"
|
|
bitfld.long 0x00 2. "SECMER,Main flash mass erase command bit" "0,1"
|
|
bitfld.long 0x00 1. "SECPER,Main flash page erase command bit" "0,1"
|
|
bitfld.long 0x00 0. "SECPG,Main flash program command bit" "0,1"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "SECADDR,Secure Address register"
|
|
hexmask.long 0x00 0.--31. 1. "SECADDR,Flash erase/program command address bits"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "OBR,Option byte register"
|
|
bitfld.long 0x00 15. "TZEN,Trust zone enable bit" "0,1"
|
|
bitfld.long 0x00 12. "SRAM1_RST,SRAM1 reset enable bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPC,Option byte security protection value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "OBUSER,Option byte user register"
|
|
hexmask.long.word 0x00 0.--15. 1. "USER,Option byte USER value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SECMCFG0,Secure mark configuration register 0"
|
|
hexmask.long.word 0x00 16.--25. 1. "SECM0_EPAGE,End page of mark secure area 0"
|
|
hexmask.long.word 0x00 0.--9. 1. "SECM0_SPAGE,Start page of mark secure area 0"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMP0,Secure dedicated mark protection register 0"
|
|
bitfld.long 0x00 31. "DMP0_EN,DMP area 0 enable" "0,1"
|
|
hexmask.long.word 0x00 16.--25. 1. "DMP0_EPAGE,End page of DMP mark secure area 0"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "OBWRP0,Option byte write protection area register 0"
|
|
hexmask.long.word 0x00 16.--25. 1. "WRP0_EPAGE,End page of write protection area 0"
|
|
hexmask.long.word 0x00 0.--9. 1. "WRP0_SPAGE,Start page of write protection area 0"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SECM_CFG1,Secure mark configuration register 1"
|
|
hexmask.long.word 0x00 16.--25. 1. "SECM1_EPAGE,End page of mark secure area 1"
|
|
hexmask.long.word 0x00 0.--9. 1. "SECM1_SPAGE,Start page of mark secure area 1"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DMP1,Secure dedicated mark protection register 1"
|
|
bitfld.long 0x00 31. "DMP1_EN,DMP area 1 enable" "0,1"
|
|
hexmask.long.word 0x00 16.--25. 1. "DMP1_EPAGE,End page of DMP mark secure area 1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "OBWRP1,Option byte write protection area register 1"
|
|
hexmask.long.word 0x00 16.--25. 1. "WRP1_EPAGE,End page of write protection area 1"
|
|
hexmask.long.word 0x00 0.--9. 1. "WRP1_SPAGE,Start page of write protection area 1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SECMCFG2,Secure mark configuration register 2"
|
|
hexmask.long.word 0x00 16.--25. 1. "SECM2_EPAGE,End page of mark secure area 2"
|
|
hexmask.long.word 0x00 0.--9. 1. "SECM2_SPAGE,Start page of mark secure area 2"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SECMCFG3,Secure mark configuration register 3"
|
|
hexmask.long.word 0x00 16.--25. 1. "SECM3_EPAGE,End page of mark secure area 3"
|
|
hexmask.long.word 0x00 0.--9. 1. "SECM3_SPAGE,Start page of mark secure area 3"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "NODEC0,NO OTFDEC region0 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "NODEC0_PEND,End page of NODEC region 0"
|
|
hexmask.long.word 0x00 0.--9. 1. "NODEC0_SPAGE,Start page of NODEC region 0"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "NODEC1,NO OTFDEC region1 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "NODEC1_PEND,End page of NODEC region 1"
|
|
hexmask.long.word 0x00 0.--9. 1. "NODEC1_SPAGE,Start page of NODEC region 1"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "NODEC2,NO OTFDEC region2 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "NODEC2_PEND,End page of NODEC region 2"
|
|
hexmask.long.word 0x00 0.--9. 1. "NODEC2_SPAGE,Start page of NODEC region 2"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "NODEC3,NO OTFDEC region3 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "NODEC3_PEND,End page of NODEC region 3"
|
|
hexmask.long.word 0x00 0.--9. 1. "NODEC0_SPAGE,Start page of NODEC region 3"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "OFRG,Offset region register"
|
|
hexmask.long.word 0x00 16.--28. 1. "OF_EPAGE,End page of offset region"
|
|
hexmask.long.word 0x00 0.--12. 1. "OF_SPAGE,Start page of offset region"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "OFVR,Offset value register"
|
|
hexmask.long.word 0x00 0.--12. 1. "OF_VALUE,Offset value"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "DMPCTL,DMP control register"
|
|
bitfld.long 0x00 1. "DMP1_ACC_CFG,DMP area 1 access configuration bit" "0,1"
|
|
bitfld.long 0x00 0. "DMP0_ACC_CFG,DMP area 0 access configuration bit" "0,1"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "PRIVCFG,Privilege configuration register"
|
|
bitfld.long 0x00 0. "FMC_PRIV,FMC privilege configuration" "0,1"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "PID,Product ID register"
|
|
hexmask.long 0x00 0.--31. 1. "PID,Product reserved ID code register"
|
|
tree.end
|
|
tree "SEC_FMC"
|
|
base ad:0x50022000
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "KEY,Unlock key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,FMC_CTL unlock register"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "OBKEY,Option byte unlock key register"
|
|
hexmask.long 0x00 0.--31. 1. "OBKEY,FMC_ OBCTL0 option byte operation unlock register"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 5. "ENDF,End of operation flag bit" "0,1"
|
|
bitfld.long 0x00 4. "WPERR,Erase/Program protection error flag bit" "0,1"
|
|
bitfld.long 0x00 3. "OBERR,Option bytes error flag bit" "0,1"
|
|
rbitfld.long 0x00 0. "BUSY,The flash is busy bit" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 15. "OBRLD,Option byte reload bit" "0,1"
|
|
bitfld.long 0x00 14. "OBSTART,Option bytes modification start bit" "0,1"
|
|
bitfld.long 0x00 12. "ENDIE,End of operation interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "ERRIE,Error interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 9. "OBWEN,FMC_OFVR write enable bit" "0,1"
|
|
bitfld.long 0x00 7. "LK,FMC_CTL lock bit" "0,1"
|
|
bitfld.long 0x00 6. "START,Send erase command to FMC" "0,1"
|
|
bitfld.long 0x00 2. "MER,Main flash mass erase command bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PER,Main flash page erase command bit" "0,1"
|
|
bitfld.long 0x00 0. "PG,Main flash program command bit" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "ADDR,Address register"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,Flash erase/program command address bits"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "OBSTAT,Option byte status register"
|
|
bitfld.long 0x00 5. "FMCOB,Whether the option byte exist or not" "0,1"
|
|
bitfld.long 0x00 4. "NQSPI,Memory structure is FMC mode or QSPI mode" "0,1"
|
|
bitfld.long 0x00 3. "TZEN_STAT,Trust zone state" "0,1"
|
|
bitfld.long 0x00 2. "WP,Write/erase protection state" "0,1"
|
|
bitfld.long 0x00 1. "SPC,Security protection level 1 state" "0,1"
|
|
bitfld.long 0x00 0. "SPC_P5,Security protection level 0.5 state" "0,1"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "SECKEY,Secure Unlock key register"
|
|
hexmask.long 0x00 0.--31. 1. "SECKEY,FMC_SECCTL unlock register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SECSTAT,Secure status register"
|
|
bitfld.long 0x00 5. "SECENDF,End of operation flag" "0,1"
|
|
bitfld.long 0x00 4. "SECWPERR,Erase/Program protection error flag" "0,1"
|
|
bitfld.long 0x00 3. "SECERR,Secure error flag" "0,1"
|
|
bitfld.long 0x00 0. "SECBUSY,The flash is busy" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SECCTL,Secure Control register"
|
|
bitfld.long 0x00 12. "SECENDIE,End of operation interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "SECERRIE,Error interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 7. "SECLK,FMC_SECCTL lock bit" "0,1"
|
|
bitfld.long 0x00 6. "SECSTART,Send erase command to FMC bit" "0,1"
|
|
bitfld.long 0x00 2. "SECMER,Main flash mass erase command bit" "0,1"
|
|
bitfld.long 0x00 1. "SECPER,Main flash page erase command bit" "0,1"
|
|
bitfld.long 0x00 0. "SECPG,Main flash program command bit" "0,1"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "SECADDR,Secure Address register"
|
|
hexmask.long 0x00 0.--31. 1. "SECADDR,Flash erase/program command address bits"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "OBR,Option byte register"
|
|
bitfld.long 0x00 15. "TZEN,Trust zone enable bit" "0,1"
|
|
bitfld.long 0x00 12. "SRAM1_RST,SRAM1 reset enable bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPC,Option byte security protection value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "OBUSER,Option byte user register"
|
|
hexmask.long.word 0x00 0.--15. 1. "USER,Option byte USER value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SECMCFG0,Secure mark configuration register 0"
|
|
hexmask.long.word 0x00 16.--25. 1. "SECM0_EPAGE,End page of mark secure area 0"
|
|
hexmask.long.word 0x00 0.--9. 1. "SECM0_SPAGE,Start page of mark secure area 0"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMP0,Secure dedicated mark protection register 0"
|
|
bitfld.long 0x00 31. "DMP0_EN,DMP area 0 enable" "0,1"
|
|
hexmask.long.word 0x00 16.--25. 1. "DMP0_EPAGE,End page of DMP mark secure area 0"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "OBWRP0,Option byte write protection area register 0"
|
|
hexmask.long.word 0x00 16.--25. 1. "WRP0_EPAGE,End page of write protection area 0"
|
|
hexmask.long.word 0x00 0.--9. 1. "WRP0_SPAGE,Start page of write protection area 0"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SECM_CFG1,Secure mark configuration register 1"
|
|
hexmask.long.word 0x00 16.--25. 1. "SECM1_EPAGE,End page of mark secure area 1"
|
|
hexmask.long.word 0x00 0.--9. 1. "SECM1_SPAGE,Start page of mark secure area 1"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DMP1,Secure dedicated mark protection register 1"
|
|
bitfld.long 0x00 31. "DMP1_EN,DMP area 1 enable" "0,1"
|
|
hexmask.long.word 0x00 16.--25. 1. "DMP1_EPAGE,End page of DMP mark secure area 1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "OBWRP1,Option byte write protection area register 1"
|
|
hexmask.long.word 0x00 16.--25. 1. "WRP1_EPAGE,End page of write protection area 1"
|
|
hexmask.long.word 0x00 0.--9. 1. "WRP1_SPAGE,Start page of write protection area 1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SECMCFG2,Secure mark configuration register 2"
|
|
hexmask.long.word 0x00 16.--25. 1. "SECM2_EPAGE,End page of mark secure area 2"
|
|
hexmask.long.word 0x00 0.--9. 1. "SECM2_SPAGE,Start page of mark secure area 2"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SECMCFG3,Secure mark configuration register 3"
|
|
hexmask.long.word 0x00 16.--25. 1. "SECM3_EPAGE,End page of mark secure area 3"
|
|
hexmask.long.word 0x00 0.--9. 1. "SECM3_SPAGE,Start page of mark secure area 3"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "NODEC0,NO OTFDEC region0 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "NODEC0_PEND,End page of NODEC region 0"
|
|
hexmask.long.word 0x00 0.--9. 1. "NODEC0_SPAGE,Start page of NODEC region 0"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "NODEC1,NO OTFDEC region1 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "NODEC1_PEND,End page of NODEC region 1"
|
|
hexmask.long.word 0x00 0.--9. 1. "NODEC1_SPAGE,Start page of NODEC region 1"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "NODEC2,NO OTFDEC region2 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "NODEC2_PEND,End page of NODEC region 2"
|
|
hexmask.long.word 0x00 0.--9. 1. "NODEC2_SPAGE,Start page of NODEC region 2"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "NODEC3,NO OTFDEC region3 register"
|
|
hexmask.long.word 0x00 16.--25. 1. "NODEC3_PEND,End page of NODEC region 3"
|
|
hexmask.long.word 0x00 0.--9. 1. "NODEC0_SPAGE,Start page of NODEC region 3"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "OFRG,Offset region register"
|
|
hexmask.long.word 0x00 16.--28. 1. "OF_EPAGE,End page of offset region"
|
|
hexmask.long.word 0x00 0.--12. 1. "OF_SPAGE,Start page of offset region"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "OFVR,Offset value register"
|
|
hexmask.long.word 0x00 0.--12. 1. "OF_VALUE,Offset value"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "DMPCTL,DMP control register"
|
|
bitfld.long 0x00 1. "DMP1_ACC_CFG,DMP area 1 access configuration bit" "0,1"
|
|
bitfld.long 0x00 0. "DMP0_ACC_CFG,DMP area 0 access configuration bit" "0,1"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "PRIVCFG,Privilege configuration register"
|
|
bitfld.long 0x00 0. "FMC_PRIV,FMC privilege configuration" "0,1"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "PID,Product ID register"
|
|
hexmask.long 0x00 0.--31. 1. "PID,Product reserved ID code register"
|
|
tree.end
|
|
tree.end
|
|
tree "FWDGT (Free watchdog timer)"
|
|
tree "FWDGT"
|
|
base ad:0x40003000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMD,Key value"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PSC,Prescaler register"
|
|
bitfld.long 0x00 0.--2. "PSC,Prescaler divider" "0,1,2,3,4,5,6,7"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLD,Reload register"
|
|
hexmask.long.word 0x00 0.--11. 1. "RLD,Free watchdog timer counter reload value"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 1. "RUD,Free watchdog timer counter reload value update" "0,1"
|
|
bitfld.long 0x00 0. "PUD,Free watchdog timer prescaler value update" "0,1"
|
|
tree.end
|
|
tree "SEC_FWDGT"
|
|
base ad:0x50003000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMD,Key value"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PSC,Prescaler register"
|
|
bitfld.long 0x00 0.--2. "PSC,Prescaler divider" "0,1,2,3,4,5,6,7"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLD,Reload register"
|
|
hexmask.long.word 0x00 0.--11. 1. "RLD,Free watchdog timer counter reload value"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 1. "RUD,Free watchdog timer counter reload value update" "0,1"
|
|
bitfld.long 0x00 0. "PUD,Free watchdog timer prescaler value update" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
|
|
tree "GPIOA"
|
|
base ad:0x40020000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (x = 15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (x = 14)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (x = 13)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (x = 12)" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (x = 11)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (x = 10)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (x = 9)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (x = 8)" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (x = 7)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (x = 6 )" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (x = 5)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (x = 4 )" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (x = 3)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (x = 2)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (x = 1)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (x = 0)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output mode register"
|
|
bitfld.long 0x00 15. "OM15,Port 15 output mode bit" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port 14 output mode bit" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port 13 output mode bit" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port 12 output mode bit" "0,1"
|
|
bitfld.long 0x00 11. "OM11,Port 11 output mode bit" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port 10 output mode bit" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port 9 output mode bit" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port 8 output mode bit" "0,1"
|
|
bitfld.long 0x00 7. "OM7,Port 7 output mode bit" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port 6 output mode bit" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port 5 output mode bit" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port 4 output mode bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port 3 output mode bit" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port 2 output mode bit" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port 1 output mode bit" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port 0 output mode bit" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD,GPIO port output speed register"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port 15 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port 14 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port 13 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port 12 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port 11 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port 10 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port 9 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port 8 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port 7 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port 6 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port 5 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port 4 output max speed bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port 3 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port 2 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port 1 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port 0 output max speed bits" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port 15 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port 14 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port 13 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port 12 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "PUD11,Port 11 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port 10 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port 9 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port 8 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "PUD7,Port 7 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port 6 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port 5 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port 4 pull-up or pull-down bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port 3 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port 2 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port 1 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port 0 pull-up or pull-down bits" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input status register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input status (y = 15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input status (y = 14)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input status (y = 13)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input status (y = 12)" "0,1"
|
|
bitfld.long 0x00 11. "ISTAT11,Port input status (y = 11)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input status (y = 10)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input status (y = 9)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input status (y = 8)" "0,1"
|
|
bitfld.long 0x00 7. "ISTAT7,Port input status (y = 7)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input status (y = 6)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input status (y = 5)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input status (y = 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input status (y = 3)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input status (y = 2)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input status (y = 1)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input status (y = 0)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,Port output control register"
|
|
bitfld.long 0x00 15. "OTCL15,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OTCL14,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OTCL13,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OTCL12,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 11. "OTCL11,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OTCL10,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OTCL9,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OTCL8,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 7. "OTCL7,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OTCL6,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OTCL5,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OTCL4,Pin output control(y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OTCL3,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OTCL2,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OTC1,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OTCL0,Pin output control(y=0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit operate register"
|
|
bitfld.long 0x00 31. "CR15,Port Clear bit 15" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port Clear bit 14" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port Clear bit 13" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port Clear bit 12" "0,1"
|
|
bitfld.long 0x00 27. "CR11,Port Clear bit 11" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port Clear bit 10" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port Clear bit 9" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port Clear bit 8" "0,1"
|
|
bitfld.long 0x00 23. "CR7,Port Clear bit 7" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port Clear bit 6" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port Clear bit 5" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port Clear bit 3" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port Clear bit 2" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port Clear bit 1" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port Clear bit 0" "0,1"
|
|
bitfld.long 0x00 15. "BOP15,Port Set bit 15" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port Set bit 14" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port Set bit 13" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port Set bit 12" "0,1"
|
|
bitfld.long 0x00 11. "BOP11,Port Set bit 11" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port Set bit 10" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port Set bit 9" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port Set bit 7" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port Set bit 6" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port Set bit 5" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port Set bit 4" "0,1"
|
|
bitfld.long 0x00 3. "BOP3,Port Set bit 3" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port Set bit 2" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port Set bit 1" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port Set bit 0" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LOCK,GPIO port configuration lock register"
|
|
bitfld.long 0x00 16. "LKK,Lock sequence key" "0,1"
|
|
bitfld.long 0x00 15. "LK15,Port Lock bit 15" "0,1"
|
|
bitfld.long 0x00 14. "LK14,Port Lock bit 14" "0,1"
|
|
bitfld.long 0x00 13. "LK13,Port Lock bit 13" "0,1"
|
|
bitfld.long 0x00 12. "LK12,Port Lock bit 12" "0,1"
|
|
bitfld.long 0x00 11. "LK11,Port Lock bit 11" "0,1"
|
|
bitfld.long 0x00 10. "LK10,Port Lock bit 10" "0,1"
|
|
bitfld.long 0x00 9. "LK9,Port Lock bit 9" "0,1"
|
|
bitfld.long 0x00 8. "LK8,Port Lock bit 8" "0,1"
|
|
bitfld.long 0x00 7. "LK7,Port Lock bit 7" "0,1"
|
|
bitfld.long 0x00 6. "LK6,Port Lock bit 6" "0,1"
|
|
bitfld.long 0x00 5. "LK5,Port Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LK4,Port Lock bit 4" "0,1"
|
|
bitfld.long 0x00 3. "LK3,Port Lock bit 3" "0,1"
|
|
bitfld.long 0x00 2. "LK2,Port Lock bit 2" "0,1"
|
|
bitfld.long 0x00 1. "LK1,Port Lock bit 1" "0,1"
|
|
bitfld.long 0x00 0. "LK0,Port Lock bit 0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function selected register 0"
|
|
bitfld.long 0x00 28.--31. "SEL7,Port 7 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Port 6 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Port 5 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Port 4 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL3,Port 3 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Port 2 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Port 1 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Port 0 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function selected register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Port 15 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Port 14 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL13,Port 13 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Port 12 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL11,Port 11 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL10,Port 10 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 4.--7. "SEL9,Port 9 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Port 8 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Bit clear register"
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|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
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|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
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|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
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|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
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|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
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|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
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|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
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|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
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|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
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bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
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|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
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|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
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bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
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bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
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bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
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bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
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bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
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bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
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bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
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bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
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|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
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|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
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bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
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|
newline
|
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bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
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|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
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bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
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group.long 0x30++0x03
|
|
line.long 0x00 "SCFG,GPIO secure configuration register"
|
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bitfld.long 0x00 15. "SCFG15,Port A secure bit configure y (y= 15)" "0,1"
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bitfld.long 0x00 14. "SCFG14,Port A secure bit configure y (y= 14)" "0,1"
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bitfld.long 0x00 13. "SCFG13,Port A secure bit configure y (y= 13)" "0,1"
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bitfld.long 0x00 12. "SCFG12,Port A secure bit configure y (y= 12)" "0,1"
|
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bitfld.long 0x00 11. "SCFG11,Port A secure bit configure y (y= 11)" "0,1"
|
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bitfld.long 0x00 10. "SCFG10,Port A secure bit configure y (y= 10)" "0,1"
|
|
bitfld.long 0x00 9. "SCFG9,Port A secure bit configure y (y= 9)" "0,1"
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bitfld.long 0x00 8. "SCFG8,Port A secure bit configure y (y= 8)" "0,1"
|
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bitfld.long 0x00 7. "SCFG7,Port A secure bit configure y (y= 7)" "0,1"
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bitfld.long 0x00 6. "SCFG6,Port A secure bit configure y (y= 6)" "0,1"
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bitfld.long 0x00 5. "SCFG5,Port A secure bit configure y (y= 5)" "0,1"
|
|
bitfld.long 0x00 4. "SCFG4,Port A secure bit configure y (y= 4)" "0,1"
|
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newline
|
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bitfld.long 0x00 3. "SCFG3,Port A secure bit configure y (y= 3)" "0,1"
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|
bitfld.long 0x00 2. "SCFG2,Port A secure bit configure y (y= 2)" "0,1"
|
|
bitfld.long 0x00 1. "SCFG1,Port A secure bit configure y (y= 1)" "0,1"
|
|
bitfld.long 0x00 0. "SCFG0,Port A secure bit configure y (y= 0)" "0,1"
|
|
tree.end
|
|
tree "GPIOB"
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base ad:0x40020400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (x = 15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (x = 14)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (x = 13)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (x = 12)" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (x = 11)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (x = 10)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (x = 9)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (x = 8)" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (x = 7)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (x = 6 )" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (x = 5)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (x = 4 )" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (x = 3)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (x = 2)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (x = 1)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (x = 0)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output mode register"
|
|
bitfld.long 0x00 15. "OM15,Port 15 output mode bit" "0,1"
|
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bitfld.long 0x00 14. "OM14,Port 14 output mode bit" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port 13 output mode bit" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port 12 output mode bit" "0,1"
|
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bitfld.long 0x00 11. "OM11,Port 11 output mode bit" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port 10 output mode bit" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port 9 output mode bit" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port 8 output mode bit" "0,1"
|
|
bitfld.long 0x00 7. "OM7,Port 7 output mode bit" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port 6 output mode bit" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port 5 output mode bit" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port 4 output mode bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port 3 output mode bit" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port 2 output mode bit" "0,1"
|
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bitfld.long 0x00 1. "OM1,Port 1 output mode bit" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port 0 output mode bit" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD,GPIO port output speed register"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port 15 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port 14 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port 13 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port 12 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port 11 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port 10 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port 9 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port 8 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port 7 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port 6 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port 5 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port 4 output max speed bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port 3 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port 2 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port 1 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port 0 output max speed bits" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port 15 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port 14 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port 13 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port 12 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "PUD11,Port 11 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port 10 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port 9 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port 8 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "PUD7,Port 7 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port 6 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port 5 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port 4 pull-up or pull-down bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port 3 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port 2 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port 1 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port 0 pull-up or pull-down bits" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input status register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input status (y = 15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input status (y = 14)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input status (y = 13)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input status (y = 12)" "0,1"
|
|
bitfld.long 0x00 11. "ISTAT11,Port input status (y = 11)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input status (y = 10)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input status (y = 9)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input status (y = 8)" "0,1"
|
|
bitfld.long 0x00 7. "ISTAT7,Port input status (y = 7)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input status (y = 6)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input status (y = 5)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input status (y = 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input status (y = 3)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input status (y = 2)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input status (y = 1)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input status (y = 0)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,Port output control register"
|
|
bitfld.long 0x00 15. "OTCL15,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OTCL14,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OTCL13,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OTCL12,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 11. "OTCL11,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OTCL10,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OTCL9,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OTCL8,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 7. "OTCL7,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OTCL6,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OTCL5,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OTCL4,Pin output control(y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OTCL3,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OTCL2,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OTC1,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OTCL0,Pin output control(y=0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit operate register"
|
|
bitfld.long 0x00 31. "CR15,Port Clear bit 15" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port Clear bit 14" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port Clear bit 13" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port Clear bit 12" "0,1"
|
|
bitfld.long 0x00 27. "CR11,Port Clear bit 11" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port Clear bit 10" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port Clear bit 9" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port Clear bit 8" "0,1"
|
|
bitfld.long 0x00 23. "CR7,Port Clear bit 7" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port Clear bit 6" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port Clear bit 5" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port Clear bit 3" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port Clear bit 2" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port Clear bit 1" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port Clear bit 0" "0,1"
|
|
bitfld.long 0x00 15. "BOP15,Port Set bit 15" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port Set bit 14" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port Set bit 13" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port Set bit 12" "0,1"
|
|
bitfld.long 0x00 11. "BOP11,Port Set bit 11" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port Set bit 10" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port Set bit 9" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port Set bit 7" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port Set bit 6" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port Set bit 5" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port Set bit 4" "0,1"
|
|
bitfld.long 0x00 3. "BOP3,Port Set bit 3" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port Set bit 2" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port Set bit 1" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port Set bit 0" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LOCK,GPIO port configuration lock register"
|
|
bitfld.long 0x00 16. "LKK,Lock sequence key" "0,1"
|
|
bitfld.long 0x00 15. "LK15,Port Lock bit 15" "0,1"
|
|
bitfld.long 0x00 14. "LK14,Port Lock bit 14" "0,1"
|
|
bitfld.long 0x00 13. "LK13,Port Lock bit 13" "0,1"
|
|
bitfld.long 0x00 12. "LK12,Port Lock bit 12" "0,1"
|
|
bitfld.long 0x00 11. "LK11,Port Lock bit 11" "0,1"
|
|
bitfld.long 0x00 10. "LK10,Port Lock bit 10" "0,1"
|
|
bitfld.long 0x00 9. "LK9,Port Lock bit 9" "0,1"
|
|
bitfld.long 0x00 8. "LK8,Port Lock bit 8" "0,1"
|
|
bitfld.long 0x00 7. "LK7,Port Lock bit 7" "0,1"
|
|
bitfld.long 0x00 6. "LK6,Port Lock bit 6" "0,1"
|
|
bitfld.long 0x00 5. "LK5,Port Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LK4,Port Lock bit 4" "0,1"
|
|
bitfld.long 0x00 3. "LK3,Port Lock bit 3" "0,1"
|
|
bitfld.long 0x00 2. "LK2,Port Lock bit 2" "0,1"
|
|
bitfld.long 0x00 1. "LK1,Port Lock bit 1" "0,1"
|
|
bitfld.long 0x00 0. "LK0,Port Lock bit 0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function selected register 0"
|
|
bitfld.long 0x00 28.--31. "SEL7,Port 7 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Port 6 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Port 5 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Port 4 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL3,Port 3 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Port 2 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Port 1 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Port 0 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function selected register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Port 15 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Port 14 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. "SEL13,Port 13 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Port 12 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. "SEL11,Port 11 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 8.--11. "SEL10,Port 10 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL9,Port 9 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Port 8 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Bit clear register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
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bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
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bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SCFG,GPIO secure configuration register"
|
|
bitfld.long 0x00 15. "SCFG15,Port A secure bit configure y (y= 15)" "0,1"
|
|
bitfld.long 0x00 14. "SCFG14,Port A secure bit configure y (y= 14)" "0,1"
|
|
bitfld.long 0x00 13. "SCFG13,Port A secure bit configure y (y= 13)" "0,1"
|
|
bitfld.long 0x00 12. "SCFG12,Port A secure bit configure y (y= 12)" "0,1"
|
|
bitfld.long 0x00 11. "SCFG11,Port A secure bit configure y (y= 11)" "0,1"
|
|
bitfld.long 0x00 10. "SCFG10,Port A secure bit configure y (y= 10)" "0,1"
|
|
bitfld.long 0x00 9. "SCFG9,Port A secure bit configure y (y= 9)" "0,1"
|
|
bitfld.long 0x00 8. "SCFG8,Port A secure bit configure y (y= 8)" "0,1"
|
|
bitfld.long 0x00 7. "SCFG7,Port A secure bit configure y (y= 7)" "0,1"
|
|
bitfld.long 0x00 6. "SCFG6,Port A secure bit configure y (y= 6)" "0,1"
|
|
bitfld.long 0x00 5. "SCFG5,Port A secure bit configure y (y= 5)" "0,1"
|
|
bitfld.long 0x00 4. "SCFG4,Port A secure bit configure y (y= 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SCFG3,Port A secure bit configure y (y= 3)" "0,1"
|
|
bitfld.long 0x00 2. "SCFG2,Port A secure bit configure y (y= 2)" "0,1"
|
|
bitfld.long 0x00 1. "SCFG1,Port A secure bit configure y (y= 1)" "0,1"
|
|
bitfld.long 0x00 0. "SCFG0,Port A secure bit configure y (y= 0)" "0,1"
|
|
tree.end
|
|
tree "GPIOC"
|
|
base ad:0x40020800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (x = 15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (x = 14)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (x = 13)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (x = 12)" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (x = 11)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (x = 10)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (x = 9)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (x = 8)" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (x = 7)" "0,1,2,3"
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|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (x = 6 )" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (x = 5)" "0,1,2,3"
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|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (x = 4 )" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (x = 3)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (x = 2)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (x = 1)" "0,1,2,3"
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|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (x = 0)" "0,1,2,3"
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group.long 0x04++0x03
|
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line.long 0x00 "OMODE,GPIO port output mode register"
|
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bitfld.long 0x00 15. "OM15,Port 15 output mode bit" "0,1"
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bitfld.long 0x00 14. "OM14,Port 14 output mode bit" "0,1"
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bitfld.long 0x00 13. "OM13,Port 13 output mode bit" "0,1"
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bitfld.long 0x00 12. "OM12,Port 12 output mode bit" "0,1"
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bitfld.long 0x00 11. "OM11,Port 11 output mode bit" "0,1"
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bitfld.long 0x00 10. "OM10,Port 10 output mode bit" "0,1"
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bitfld.long 0x00 9. "OM9,Port 9 output mode bit" "0,1"
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bitfld.long 0x00 8. "OM8,Port 8 output mode bit" "0,1"
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bitfld.long 0x00 7. "OM7,Port 7 output mode bit" "0,1"
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bitfld.long 0x00 6. "OM6,Port 6 output mode bit" "0,1"
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bitfld.long 0x00 5. "OM5,Port 5 output mode bit" "0,1"
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bitfld.long 0x00 4. "OM4,Port 4 output mode bit" "0,1"
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newline
|
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bitfld.long 0x00 3. "OM3,Port 3 output mode bit" "0,1"
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bitfld.long 0x00 2. "OM2,Port 2 output mode bit" "0,1"
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bitfld.long 0x00 1. "OM1,Port 1 output mode bit" "0,1"
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bitfld.long 0x00 0. "OM0,Port 0 output mode bit" "0,1"
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group.long 0x08++0x03
|
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line.long 0x00 "OSPD,GPIO port output speed register"
|
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bitfld.long 0x00 30.--31. "OSPD15,Port 15 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 28.--29. "OSPD14,Port 14 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 26.--27. "OSPD13,Port 13 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 24.--25. "OSPD12,Port 12 output max speed bits" "0,1,2,3"
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bitfld.long 0x00 22.--23. "OSPD11,Port 11 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 20.--21. "OSPD10,Port 10 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 18.--19. "OSPD9,Port 9 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 16.--17. "OSPD8,Port 8 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 14.--15. "OSPD7,Port 7 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 12.--13. "OSPD6,Port 6 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port 5 output max speed bits" "0,1,2,3"
|
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bitfld.long 0x00 8.--9. "OSPD4,Port 4 output max speed bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port 3 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port 2 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port 1 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port 0 output max speed bits" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port 15 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port 14 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port 13 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port 12 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "PUD11,Port 11 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port 10 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port 9 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port 8 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "PUD7,Port 7 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port 6 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port 5 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port 4 pull-up or pull-down bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port 3 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port 2 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port 1 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port 0 pull-up or pull-down bits" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input status register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input status (y = 15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input status (y = 14)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input status (y = 13)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input status (y = 12)" "0,1"
|
|
bitfld.long 0x00 11. "ISTAT11,Port input status (y = 11)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input status (y = 10)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input status (y = 9)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input status (y = 8)" "0,1"
|
|
bitfld.long 0x00 7. "ISTAT7,Port input status (y = 7)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input status (y = 6)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input status (y = 5)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input status (y = 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input status (y = 3)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input status (y = 2)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input status (y = 1)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input status (y = 0)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,Port output control register"
|
|
bitfld.long 0x00 15. "OTCL15,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OTCL14,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OTCL13,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OTCL12,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 11. "OTCL11,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OTCL10,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OTCL9,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OTCL8,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 7. "OTCL7,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OTCL6,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OTCL5,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OTCL4,Pin output control(y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OTCL3,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OTCL2,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OTC1,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OTCL0,Pin output control(y=0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit operate register"
|
|
bitfld.long 0x00 31. "CR15,Port Clear bit 15" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port Clear bit 14" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port Clear bit 13" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port Clear bit 12" "0,1"
|
|
bitfld.long 0x00 27. "CR11,Port Clear bit 11" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port Clear bit 10" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port Clear bit 9" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port Clear bit 8" "0,1"
|
|
bitfld.long 0x00 23. "CR7,Port Clear bit 7" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port Clear bit 6" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port Clear bit 5" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port Clear bit 3" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port Clear bit 2" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port Clear bit 1" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port Clear bit 0" "0,1"
|
|
bitfld.long 0x00 15. "BOP15,Port Set bit 15" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port Set bit 14" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port Set bit 13" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port Set bit 12" "0,1"
|
|
bitfld.long 0x00 11. "BOP11,Port Set bit 11" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port Set bit 10" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port Set bit 9" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port Set bit 7" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port Set bit 6" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port Set bit 5" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port Set bit 4" "0,1"
|
|
bitfld.long 0x00 3. "BOP3,Port Set bit 3" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port Set bit 2" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port Set bit 1" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port Set bit 0" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LOCK,GPIO port configuration lock register"
|
|
bitfld.long 0x00 16. "LKK,Lock sequence key" "0,1"
|
|
bitfld.long 0x00 15. "LK15,Port Lock bit 15" "0,1"
|
|
bitfld.long 0x00 14. "LK14,Port Lock bit 14" "0,1"
|
|
bitfld.long 0x00 13. "LK13,Port Lock bit 13" "0,1"
|
|
bitfld.long 0x00 12. "LK12,Port Lock bit 12" "0,1"
|
|
bitfld.long 0x00 11. "LK11,Port Lock bit 11" "0,1"
|
|
bitfld.long 0x00 10. "LK10,Port Lock bit 10" "0,1"
|
|
bitfld.long 0x00 9. "LK9,Port Lock bit 9" "0,1"
|
|
bitfld.long 0x00 8. "LK8,Port Lock bit 8" "0,1"
|
|
bitfld.long 0x00 7. "LK7,Port Lock bit 7" "0,1"
|
|
bitfld.long 0x00 6. "LK6,Port Lock bit 6" "0,1"
|
|
bitfld.long 0x00 5. "LK5,Port Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LK4,Port Lock bit 4" "0,1"
|
|
bitfld.long 0x00 3. "LK3,Port Lock bit 3" "0,1"
|
|
bitfld.long 0x00 2. "LK2,Port Lock bit 2" "0,1"
|
|
bitfld.long 0x00 1. "LK1,Port Lock bit 1" "0,1"
|
|
bitfld.long 0x00 0. "LK0,Port Lock bit 0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function selected register 0"
|
|
bitfld.long 0x00 28.--31. "SEL7,Port 7 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Port 6 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Port 5 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Port 4 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL3,Port 3 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Port 2 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Port 1 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Port 0 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function selected register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Port 15 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Port 14 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL13,Port 13 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Port 12 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL11,Port 11 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL10,Port 10 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL9,Port 9 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Port 8 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Bit clear register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SCFG,GPIO secure configuration register"
|
|
bitfld.long 0x00 15. "SCFG15,Port A secure bit configure y (y= 15)" "0,1"
|
|
bitfld.long 0x00 14. "SCFG14,Port A secure bit configure y (y= 14)" "0,1"
|
|
bitfld.long 0x00 13. "SCFG13,Port A secure bit configure y (y= 13)" "0,1"
|
|
bitfld.long 0x00 12. "SCFG12,Port A secure bit configure y (y= 12)" "0,1"
|
|
bitfld.long 0x00 11. "SCFG11,Port A secure bit configure y (y= 11)" "0,1"
|
|
bitfld.long 0x00 10. "SCFG10,Port A secure bit configure y (y= 10)" "0,1"
|
|
bitfld.long 0x00 9. "SCFG9,Port A secure bit configure y (y= 9)" "0,1"
|
|
bitfld.long 0x00 8. "SCFG8,Port A secure bit configure y (y= 8)" "0,1"
|
|
bitfld.long 0x00 7. "SCFG7,Port A secure bit configure y (y= 7)" "0,1"
|
|
bitfld.long 0x00 6. "SCFG6,Port A secure bit configure y (y= 6)" "0,1"
|
|
bitfld.long 0x00 5. "SCFG5,Port A secure bit configure y (y= 5)" "0,1"
|
|
bitfld.long 0x00 4. "SCFG4,Port A secure bit configure y (y= 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SCFG3,Port A secure bit configure y (y= 3)" "0,1"
|
|
bitfld.long 0x00 2. "SCFG2,Port A secure bit configure y (y= 2)" "0,1"
|
|
bitfld.long 0x00 1. "SCFG1,Port A secure bit configure y (y= 1)" "0,1"
|
|
bitfld.long 0x00 0. "SCFG0,Port A secure bit configure y (y= 0)" "0,1"
|
|
tree.end
|
|
tree "SEC_GPIOA"
|
|
base ad:0x50020000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (x = 15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (x = 14)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (x = 13)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (x = 12)" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (x = 11)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (x = 10)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (x = 9)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (x = 8)" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (x = 7)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (x = 6 )" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (x = 5)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (x = 4 )" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (x = 3)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (x = 2)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (x = 1)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (x = 0)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output mode register"
|
|
bitfld.long 0x00 15. "OM15,Port 15 output mode bit" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port 14 output mode bit" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port 13 output mode bit" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port 12 output mode bit" "0,1"
|
|
bitfld.long 0x00 11. "OM11,Port 11 output mode bit" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port 10 output mode bit" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port 9 output mode bit" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port 8 output mode bit" "0,1"
|
|
bitfld.long 0x00 7. "OM7,Port 7 output mode bit" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port 6 output mode bit" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port 5 output mode bit" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port 4 output mode bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port 3 output mode bit" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port 2 output mode bit" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port 1 output mode bit" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port 0 output mode bit" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD,GPIO port output speed register"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port 15 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port 14 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port 13 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port 12 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port 11 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port 10 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port 9 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port 8 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port 7 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port 6 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port 5 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port 4 output max speed bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port 3 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port 2 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port 1 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port 0 output max speed bits" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port 15 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port 14 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port 13 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port 12 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "PUD11,Port 11 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port 10 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port 9 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port 8 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "PUD7,Port 7 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port 6 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port 5 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port 4 pull-up or pull-down bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port 3 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port 2 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port 1 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port 0 pull-up or pull-down bits" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input status register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input status (y = 15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input status (y = 14)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input status (y = 13)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input status (y = 12)" "0,1"
|
|
bitfld.long 0x00 11. "ISTAT11,Port input status (y = 11)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input status (y = 10)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input status (y = 9)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input status (y = 8)" "0,1"
|
|
bitfld.long 0x00 7. "ISTAT7,Port input status (y = 7)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input status (y = 6)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input status (y = 5)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input status (y = 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input status (y = 3)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input status (y = 2)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input status (y = 1)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input status (y = 0)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,Port output control register"
|
|
bitfld.long 0x00 15. "OTCL15,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OTCL14,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OTCL13,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OTCL12,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 11. "OTCL11,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OTCL10,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OTCL9,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OTCL8,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 7. "OTCL7,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OTCL6,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OTCL5,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OTCL4,Pin output control(y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OTCL3,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OTCL2,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OTC1,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OTCL0,Pin output control(y=0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit operate register"
|
|
bitfld.long 0x00 31. "CR15,Port Clear bit 15" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port Clear bit 14" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port Clear bit 13" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port Clear bit 12" "0,1"
|
|
bitfld.long 0x00 27. "CR11,Port Clear bit 11" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port Clear bit 10" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port Clear bit 9" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port Clear bit 8" "0,1"
|
|
bitfld.long 0x00 23. "CR7,Port Clear bit 7" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port Clear bit 6" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port Clear bit 5" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port Clear bit 3" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port Clear bit 2" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port Clear bit 1" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port Clear bit 0" "0,1"
|
|
bitfld.long 0x00 15. "BOP15,Port Set bit 15" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port Set bit 14" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port Set bit 13" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port Set bit 12" "0,1"
|
|
bitfld.long 0x00 11. "BOP11,Port Set bit 11" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port Set bit 10" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port Set bit 9" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port Set bit 7" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port Set bit 6" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port Set bit 5" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port Set bit 4" "0,1"
|
|
bitfld.long 0x00 3. "BOP3,Port Set bit 3" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port Set bit 2" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port Set bit 1" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port Set bit 0" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LOCK,GPIO port configuration lock register"
|
|
bitfld.long 0x00 16. "LKK,Lock sequence key" "0,1"
|
|
bitfld.long 0x00 15. "LK15,Port Lock bit 15" "0,1"
|
|
bitfld.long 0x00 14. "LK14,Port Lock bit 14" "0,1"
|
|
bitfld.long 0x00 13. "LK13,Port Lock bit 13" "0,1"
|
|
bitfld.long 0x00 12. "LK12,Port Lock bit 12" "0,1"
|
|
bitfld.long 0x00 11. "LK11,Port Lock bit 11" "0,1"
|
|
bitfld.long 0x00 10. "LK10,Port Lock bit 10" "0,1"
|
|
bitfld.long 0x00 9. "LK9,Port Lock bit 9" "0,1"
|
|
bitfld.long 0x00 8. "LK8,Port Lock bit 8" "0,1"
|
|
bitfld.long 0x00 7. "LK7,Port Lock bit 7" "0,1"
|
|
bitfld.long 0x00 6. "LK6,Port Lock bit 6" "0,1"
|
|
bitfld.long 0x00 5. "LK5,Port Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LK4,Port Lock bit 4" "0,1"
|
|
bitfld.long 0x00 3. "LK3,Port Lock bit 3" "0,1"
|
|
bitfld.long 0x00 2. "LK2,Port Lock bit 2" "0,1"
|
|
bitfld.long 0x00 1. "LK1,Port Lock bit 1" "0,1"
|
|
bitfld.long 0x00 0. "LK0,Port Lock bit 0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function selected register 0"
|
|
bitfld.long 0x00 28.--31. "SEL7,Port 7 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Port 6 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Port 5 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Port 4 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL3,Port 3 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Port 2 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Port 1 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Port 0 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function selected register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Port 15 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Port 14 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL13,Port 13 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Port 12 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL11,Port 11 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL10,Port 10 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL9,Port 9 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Port 8 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Bit clear register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SCFG,GPIO secure configuration register"
|
|
bitfld.long 0x00 15. "SCFG15,Port A secure bit configure y (y= 15)" "0,1"
|
|
bitfld.long 0x00 14. "SCFG14,Port A secure bit configure y (y= 14)" "0,1"
|
|
bitfld.long 0x00 13. "SCFG13,Port A secure bit configure y (y= 13)" "0,1"
|
|
bitfld.long 0x00 12. "SCFG12,Port A secure bit configure y (y= 12)" "0,1"
|
|
bitfld.long 0x00 11. "SCFG11,Port A secure bit configure y (y= 11)" "0,1"
|
|
bitfld.long 0x00 10. "SCFG10,Port A secure bit configure y (y= 10)" "0,1"
|
|
bitfld.long 0x00 9. "SCFG9,Port A secure bit configure y (y= 9)" "0,1"
|
|
bitfld.long 0x00 8. "SCFG8,Port A secure bit configure y (y= 8)" "0,1"
|
|
bitfld.long 0x00 7. "SCFG7,Port A secure bit configure y (y= 7)" "0,1"
|
|
bitfld.long 0x00 6. "SCFG6,Port A secure bit configure y (y= 6)" "0,1"
|
|
bitfld.long 0x00 5. "SCFG5,Port A secure bit configure y (y= 5)" "0,1"
|
|
bitfld.long 0x00 4. "SCFG4,Port A secure bit configure y (y= 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SCFG3,Port A secure bit configure y (y= 3)" "0,1"
|
|
bitfld.long 0x00 2. "SCFG2,Port A secure bit configure y (y= 2)" "0,1"
|
|
bitfld.long 0x00 1. "SCFG1,Port A secure bit configure y (y= 1)" "0,1"
|
|
bitfld.long 0x00 0. "SCFG0,Port A secure bit configure y (y= 0)" "0,1"
|
|
tree.end
|
|
tree "SEC_GPIOB"
|
|
base ad:0x50020400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (x = 15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (x = 14)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (x = 13)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (x = 12)" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (x = 11)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (x = 10)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (x = 9)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (x = 8)" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (x = 7)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (x = 6 )" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (x = 5)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (x = 4 )" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (x = 3)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (x = 2)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (x = 1)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (x = 0)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output mode register"
|
|
bitfld.long 0x00 15. "OM15,Port 15 output mode bit" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port 14 output mode bit" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port 13 output mode bit" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port 12 output mode bit" "0,1"
|
|
bitfld.long 0x00 11. "OM11,Port 11 output mode bit" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port 10 output mode bit" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port 9 output mode bit" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port 8 output mode bit" "0,1"
|
|
bitfld.long 0x00 7. "OM7,Port 7 output mode bit" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port 6 output mode bit" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port 5 output mode bit" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port 4 output mode bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port 3 output mode bit" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port 2 output mode bit" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port 1 output mode bit" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port 0 output mode bit" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD,GPIO port output speed register"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port 15 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port 14 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port 13 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port 12 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port 11 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port 10 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port 9 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port 8 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port 7 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port 6 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port 5 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port 4 output max speed bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port 3 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port 2 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port 1 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port 0 output max speed bits" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port 15 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port 14 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port 13 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port 12 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "PUD11,Port 11 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port 10 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port 9 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port 8 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "PUD7,Port 7 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port 6 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port 5 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port 4 pull-up or pull-down bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port 3 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port 2 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port 1 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port 0 pull-up or pull-down bits" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input status register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input status (y = 15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input status (y = 14)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input status (y = 13)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input status (y = 12)" "0,1"
|
|
bitfld.long 0x00 11. "ISTAT11,Port input status (y = 11)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input status (y = 10)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input status (y = 9)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input status (y = 8)" "0,1"
|
|
bitfld.long 0x00 7. "ISTAT7,Port input status (y = 7)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input status (y = 6)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input status (y = 5)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input status (y = 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input status (y = 3)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input status (y = 2)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input status (y = 1)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input status (y = 0)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,Port output control register"
|
|
bitfld.long 0x00 15. "OTCL15,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OTCL14,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OTCL13,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OTCL12,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 11. "OTCL11,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OTCL10,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OTCL9,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OTCL8,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 7. "OTCL7,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OTCL6,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OTCL5,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OTCL4,Pin output control(y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OTCL3,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OTCL2,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OTC1,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OTCL0,Pin output control(y=0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit operate register"
|
|
bitfld.long 0x00 31. "CR15,Port Clear bit 15" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port Clear bit 14" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port Clear bit 13" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port Clear bit 12" "0,1"
|
|
bitfld.long 0x00 27. "CR11,Port Clear bit 11" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port Clear bit 10" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port Clear bit 9" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port Clear bit 8" "0,1"
|
|
bitfld.long 0x00 23. "CR7,Port Clear bit 7" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port Clear bit 6" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port Clear bit 5" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port Clear bit 3" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port Clear bit 2" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port Clear bit 1" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port Clear bit 0" "0,1"
|
|
bitfld.long 0x00 15. "BOP15,Port Set bit 15" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port Set bit 14" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port Set bit 13" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port Set bit 12" "0,1"
|
|
bitfld.long 0x00 11. "BOP11,Port Set bit 11" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port Set bit 10" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port Set bit 9" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port Set bit 7" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port Set bit 6" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port Set bit 5" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port Set bit 4" "0,1"
|
|
bitfld.long 0x00 3. "BOP3,Port Set bit 3" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port Set bit 2" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port Set bit 1" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port Set bit 0" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LOCK,GPIO port configuration lock register"
|
|
bitfld.long 0x00 16. "LKK,Lock sequence key" "0,1"
|
|
bitfld.long 0x00 15. "LK15,Port Lock bit 15" "0,1"
|
|
bitfld.long 0x00 14. "LK14,Port Lock bit 14" "0,1"
|
|
bitfld.long 0x00 13. "LK13,Port Lock bit 13" "0,1"
|
|
bitfld.long 0x00 12. "LK12,Port Lock bit 12" "0,1"
|
|
bitfld.long 0x00 11. "LK11,Port Lock bit 11" "0,1"
|
|
bitfld.long 0x00 10. "LK10,Port Lock bit 10" "0,1"
|
|
bitfld.long 0x00 9. "LK9,Port Lock bit 9" "0,1"
|
|
bitfld.long 0x00 8. "LK8,Port Lock bit 8" "0,1"
|
|
bitfld.long 0x00 7. "LK7,Port Lock bit 7" "0,1"
|
|
bitfld.long 0x00 6. "LK6,Port Lock bit 6" "0,1"
|
|
bitfld.long 0x00 5. "LK5,Port Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LK4,Port Lock bit 4" "0,1"
|
|
bitfld.long 0x00 3. "LK3,Port Lock bit 3" "0,1"
|
|
bitfld.long 0x00 2. "LK2,Port Lock bit 2" "0,1"
|
|
bitfld.long 0x00 1. "LK1,Port Lock bit 1" "0,1"
|
|
bitfld.long 0x00 0. "LK0,Port Lock bit 0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function selected register 0"
|
|
bitfld.long 0x00 28.--31. "SEL7,Port 7 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Port 6 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Port 5 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Port 4 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL3,Port 3 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Port 2 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Port 1 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Port 0 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function selected register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Port 15 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Port 14 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL13,Port 13 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Port 12 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL11,Port 11 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL10,Port 10 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL9,Port 9 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Port 8 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Bit clear register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SCFG,GPIO secure configuration register"
|
|
bitfld.long 0x00 15. "SCFG15,Port A secure bit configure y (y= 15)" "0,1"
|
|
bitfld.long 0x00 14. "SCFG14,Port A secure bit configure y (y= 14)" "0,1"
|
|
bitfld.long 0x00 13. "SCFG13,Port A secure bit configure y (y= 13)" "0,1"
|
|
bitfld.long 0x00 12. "SCFG12,Port A secure bit configure y (y= 12)" "0,1"
|
|
bitfld.long 0x00 11. "SCFG11,Port A secure bit configure y (y= 11)" "0,1"
|
|
bitfld.long 0x00 10. "SCFG10,Port A secure bit configure y (y= 10)" "0,1"
|
|
bitfld.long 0x00 9. "SCFG9,Port A secure bit configure y (y= 9)" "0,1"
|
|
bitfld.long 0x00 8. "SCFG8,Port A secure bit configure y (y= 8)" "0,1"
|
|
bitfld.long 0x00 7. "SCFG7,Port A secure bit configure y (y= 7)" "0,1"
|
|
bitfld.long 0x00 6. "SCFG6,Port A secure bit configure y (y= 6)" "0,1"
|
|
bitfld.long 0x00 5. "SCFG5,Port A secure bit configure y (y= 5)" "0,1"
|
|
bitfld.long 0x00 4. "SCFG4,Port A secure bit configure y (y= 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SCFG3,Port A secure bit configure y (y= 3)" "0,1"
|
|
bitfld.long 0x00 2. "SCFG2,Port A secure bit configure y (y= 2)" "0,1"
|
|
bitfld.long 0x00 1. "SCFG1,Port A secure bit configure y (y= 1)" "0,1"
|
|
bitfld.long 0x00 0. "SCFG0,Port A secure bit configure y (y= 0)" "0,1"
|
|
tree.end
|
|
tree "SEC_GPIOC"
|
|
base ad:0x50020800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (x = 15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (x = 14)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (x = 13)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (x = 12)" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (x = 11)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (x = 10)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (x = 9)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (x = 8)" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (x = 7)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (x = 6 )" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (x = 5)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (x = 4 )" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (x = 3)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (x = 2)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (x = 1)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (x = 0)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output mode register"
|
|
bitfld.long 0x00 15. "OM15,Port 15 output mode bit" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port 14 output mode bit" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port 13 output mode bit" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port 12 output mode bit" "0,1"
|
|
bitfld.long 0x00 11. "OM11,Port 11 output mode bit" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port 10 output mode bit" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port 9 output mode bit" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port 8 output mode bit" "0,1"
|
|
bitfld.long 0x00 7. "OM7,Port 7 output mode bit" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port 6 output mode bit" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port 5 output mode bit" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port 4 output mode bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port 3 output mode bit" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port 2 output mode bit" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port 1 output mode bit" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port 0 output mode bit" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD,GPIO port output speed register"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port 15 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port 14 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port 13 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port 12 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port 11 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port 10 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port 9 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port 8 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port 7 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port 6 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port 5 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port 4 output max speed bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port 3 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port 2 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port 1 output max speed bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port 0 output max speed bits" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port 15 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port 14 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port 13 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port 12 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. "PUD11,Port 11 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port 10 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port 9 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port 8 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "PUD7,Port 7 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port 6 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port 5 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port 4 pull-up or pull-down bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port 3 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port 2 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port 1 pull-up or pull-down bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port 0 pull-up or pull-down bits" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input status register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input status (y = 15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input status (y = 14)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input status (y = 13)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input status (y = 12)" "0,1"
|
|
bitfld.long 0x00 11. "ISTAT11,Port input status (y = 11)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input status (y = 10)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input status (y = 9)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input status (y = 8)" "0,1"
|
|
bitfld.long 0x00 7. "ISTAT7,Port input status (y = 7)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input status (y = 6)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input status (y = 5)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input status (y = 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input status (y = 3)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input status (y = 2)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input status (y = 1)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input status (y = 0)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,Port output control register"
|
|
bitfld.long 0x00 15. "OTCL15,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OTCL14,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OTCL13,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OTCL12,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 11. "OTCL11,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OTCL10,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OTCL9,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OTCL8,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 7. "OTCL7,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OTCL6,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OTCL5,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OTCL4,Pin output control(y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OTCL3,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OTCL2,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OTC1,Pin output control(y=0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OTCL0,Pin output control(y=0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit operate register"
|
|
bitfld.long 0x00 31. "CR15,Port Clear bit 15" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port Clear bit 14" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port Clear bit 13" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port Clear bit 12" "0,1"
|
|
bitfld.long 0x00 27. "CR11,Port Clear bit 11" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port Clear bit 10" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port Clear bit 9" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port Clear bit 8" "0,1"
|
|
bitfld.long 0x00 23. "CR7,Port Clear bit 7" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port Clear bit 6" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port Clear bit 5" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port Clear bit 3" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port Clear bit 2" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port Clear bit 1" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port Clear bit 0" "0,1"
|
|
bitfld.long 0x00 15. "BOP15,Port Set bit 15" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port Set bit 14" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port Set bit 13" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port Set bit 12" "0,1"
|
|
bitfld.long 0x00 11. "BOP11,Port Set bit 11" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port Set bit 10" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port Set bit 9" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port Set bit 7" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port Set bit 6" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port Set bit 5" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port Set bit 4" "0,1"
|
|
bitfld.long 0x00 3. "BOP3,Port Set bit 3" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port Set bit 2" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port Set bit 1" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port Set bit 0" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LOCK,GPIO port configuration lock register"
|
|
bitfld.long 0x00 16. "LKK,Lock sequence key" "0,1"
|
|
bitfld.long 0x00 15. "LK15,Port Lock bit 15" "0,1"
|
|
bitfld.long 0x00 14. "LK14,Port Lock bit 14" "0,1"
|
|
bitfld.long 0x00 13. "LK13,Port Lock bit 13" "0,1"
|
|
bitfld.long 0x00 12. "LK12,Port Lock bit 12" "0,1"
|
|
bitfld.long 0x00 11. "LK11,Port Lock bit 11" "0,1"
|
|
bitfld.long 0x00 10. "LK10,Port Lock bit 10" "0,1"
|
|
bitfld.long 0x00 9. "LK9,Port Lock bit 9" "0,1"
|
|
bitfld.long 0x00 8. "LK8,Port Lock bit 8" "0,1"
|
|
bitfld.long 0x00 7. "LK7,Port Lock bit 7" "0,1"
|
|
bitfld.long 0x00 6. "LK6,Port Lock bit 6" "0,1"
|
|
bitfld.long 0x00 5. "LK5,Port Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LK4,Port Lock bit 4" "0,1"
|
|
bitfld.long 0x00 3. "LK3,Port Lock bit 3" "0,1"
|
|
bitfld.long 0x00 2. "LK2,Port Lock bit 2" "0,1"
|
|
bitfld.long 0x00 1. "LK1,Port Lock bit 1" "0,1"
|
|
bitfld.long 0x00 0. "LK0,Port Lock bit 0" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function selected register 0"
|
|
bitfld.long 0x00 28.--31. "SEL7,Port 7 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Port 6 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Port 5 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Port 4 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL3,Port 3 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Port 2 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Port 1 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Port 0 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function selected register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Port 15 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Port 14 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL13,Port 13 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Port 12 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "SEL11,Port 11 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL10,Port 10 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL9,Port 9 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Port 8 alternate function selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Bit clear register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SCFG,GPIO secure configuration register"
|
|
bitfld.long 0x00 15. "SCFG15,Port A secure bit configure y (y= 15)" "0,1"
|
|
bitfld.long 0x00 14. "SCFG14,Port A secure bit configure y (y= 14)" "0,1"
|
|
bitfld.long 0x00 13. "SCFG13,Port A secure bit configure y (y= 13)" "0,1"
|
|
bitfld.long 0x00 12. "SCFG12,Port A secure bit configure y (y= 12)" "0,1"
|
|
bitfld.long 0x00 11. "SCFG11,Port A secure bit configure y (y= 11)" "0,1"
|
|
bitfld.long 0x00 10. "SCFG10,Port A secure bit configure y (y= 10)" "0,1"
|
|
bitfld.long 0x00 9. "SCFG9,Port A secure bit configure y (y= 9)" "0,1"
|
|
bitfld.long 0x00 8. "SCFG8,Port A secure bit configure y (y= 8)" "0,1"
|
|
bitfld.long 0x00 7. "SCFG7,Port A secure bit configure y (y= 7)" "0,1"
|
|
bitfld.long 0x00 6. "SCFG6,Port A secure bit configure y (y= 6)" "0,1"
|
|
bitfld.long 0x00 5. "SCFG5,Port A secure bit configure y (y= 5)" "0,1"
|
|
bitfld.long 0x00 4. "SCFG4,Port A secure bit configure y (y= 4)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SCFG3,Port A secure bit configure y (y= 3)" "0,1"
|
|
bitfld.long 0x00 2. "SCFG2,Port A secure bit configure y (y= 2)" "0,1"
|
|
bitfld.long 0x00 1. "SCFG1,Port A secure bit configure y (y= 1)" "0,1"
|
|
bitfld.long 0x00 0. "SCFG0,Port A secure bit configure y (y= 0)" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "HAU (HAU acceleration unit)"
|
|
tree "HAU"
|
|
base ad:0x4C060400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,HAU control register"
|
|
bitfld.long 0x00 18. "ALGM1,Algorithm selection bit 1" "0,1"
|
|
bitfld.long 0x00 16. "KLM,Key length mode" "0,1"
|
|
bitfld.long 0x00 13. "MDS,Multiple DMA selection" "0,1"
|
|
rbitfld.long 0x00 12. "DINE,DI register is not empty" "0,1"
|
|
rbitfld.long 0x00 8.--11. "NWIF,Number of words in IN FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "ALGM0,Algorithm selection bit 0" "0,1"
|
|
bitfld.long 0x00 6. "HMS,HAU mode selection" "0,1"
|
|
bitfld.long 0x00 4.--5. "DATAM,Data type mode" "0,1,2,3"
|
|
bitfld.long 0x00 3. "DMAE,DMA enable" "0,1"
|
|
bitfld.long 0x00 2. "START,Start message digest calculation" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DI,HAU data input register"
|
|
hexmask.long 0x00 0.--31. 1. "DI,Message data input"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CFG,HAU configuration register"
|
|
bitfld.long 0x00 8. "CALEN,Digest calculation enable" "0,1"
|
|
bitfld.long 0x00 0.--4. "VBL,Valid bits length in the last word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "DO0,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO0,message digest result of hash algorithm"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DO1,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO1,message digest result of hash algorithm"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "DO2,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO2,message digest result of hash algorithm"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DO3,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO3,message digest result of hash algorithm"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DO4,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO4,message digest result of hash algorithm"
|
|
rgroup.long 0x324++0x03
|
|
line.long 0x00 "DO5,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO5,message digest result of hash algorithm"
|
|
rgroup.long 0x328++0x03
|
|
line.long 0x00 "DO6,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO6,message digest result of hash algorithm"
|
|
rgroup.long 0x32C++0x03
|
|
line.long 0x00 "DO7,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO7,message digest result of hash algorithm"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,HAU interrupt enable register"
|
|
bitfld.long 0x00 1. "CCIE,calculation completion interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "DIIE,Data input interrupt enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "STAT,HAU status and interrupt flag register"
|
|
rbitfld.long 0x00 3. "BUSY,Busy flag bit" "0,1"
|
|
rbitfld.long 0x00 2. "DMAS,DMA status flag" "0,1"
|
|
rbitfld.long 0x00 1. "CCF,Digest calculation completion flag" "0,1"
|
|
rbitfld.long 0x00 0. "DIF,Data input flag" "0,1"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "CTX0,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX0,The complete internal status"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CTX1,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX1,The complete internal status"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "CTX2,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX2,The complete internal status"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "CTX3,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX3,The complete internal status"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "CTX4,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX4,The complete internal status"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "CTX5,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX5,The complete internal status"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "CTX6,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX6,The complete internal status"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "CTX7,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX7,The complete internal status"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "CTX8,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX8,The complete internal status"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CTX9,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX9,The complete internal status"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "CTX10,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX10,The complete internal status"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "CTX11,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX11,The complete internal status"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "CTX12,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX12,The complete internal status"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "CTX13,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX13,The complete internal status"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "CTX14,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX14,The complete internal status"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "CTX15,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX15,The complete internal status"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "CTX16,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX16,The complete internal status"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "CTX17,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX17,The complete internal status"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "CTX18,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX18,The complete internal status"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "CTX19,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX19,The complete internal status"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "CTX20,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX20,The complete internal status"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CTX21,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX21,The complete internal status"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "CTX22,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX22,The complete internal status"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "CTX23,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX23,The complete internal status"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "CTX24,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX24,The complete internal status"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "CTX25,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX25,The complete internal status"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "CTX26,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX26,The complete internal status"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "CTX27,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX27,The complete internal status"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "CTX28,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX28,The complete internal status"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "CTX29,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX29,The complete internal status"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "CTX30,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX30,The complete internal status"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "CTX31,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX31,The complete internal status"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "CTX32,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX32,The complete internal status"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "CTX33,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX33,The complete internal status"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "CTX34,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX34,The complete internal status"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "CTX35,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX35,The complete internal status"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "CTX36,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX36,The complete internal status"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "CTX37,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX37,The complete internal status"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "CTX38,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX38,The complete internal status"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "CTX39,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX39,The complete internal status"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "CTX40,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX40,The complete internal status"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "CTX41,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX41,The complete internal status"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "CTX42,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX42,The complete internal status"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "CTX43,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX43,The complete internal status"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "CTX44,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX44,The complete internal status"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "CTX45,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX45,The complete internal status"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "CTX46,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX46,The complete internal status"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "CTX47,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX47,The complete internal status"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "CTX48,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX48,The complete internal status"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "CTX49,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX49,The complete internal status"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "CTX50,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX50,The complete internal status"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "CTX51,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX51,The complete internal status"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "CTX52,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX52,The complete internal status"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "CTX53,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX53,The complete internal status"
|
|
tree.end
|
|
tree "SEC_HAU"
|
|
base ad:0x5C060400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,HAU control register"
|
|
bitfld.long 0x00 18. "ALGM1,Algorithm selection bit 1" "0,1"
|
|
bitfld.long 0x00 16. "KLM,Key length mode" "0,1"
|
|
bitfld.long 0x00 13. "MDS,Multiple DMA selection" "0,1"
|
|
rbitfld.long 0x00 12. "DINE,DI register is not empty" "0,1"
|
|
rbitfld.long 0x00 8.--11. "NWIF,Number of words in IN FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "ALGM0,Algorithm selection bit 0" "0,1"
|
|
bitfld.long 0x00 6. "HMS,HAU mode selection" "0,1"
|
|
bitfld.long 0x00 4.--5. "DATAM,Data type mode" "0,1,2,3"
|
|
bitfld.long 0x00 3. "DMAE,DMA enable" "0,1"
|
|
bitfld.long 0x00 2. "START,Start message digest calculation" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DI,HAU data input register"
|
|
hexmask.long 0x00 0.--31. 1. "DI,Message data input"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CFG,HAU configuration register"
|
|
bitfld.long 0x00 8. "CALEN,Digest calculation enable" "0,1"
|
|
bitfld.long 0x00 0.--4. "VBL,Valid bits length in the last word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "DO0,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO0,message digest result of hash algorithm"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "DO1,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO1,message digest result of hash algorithm"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "DO2,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO2,message digest result of hash algorithm"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DO3,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO3,message digest result of hash algorithm"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DO4,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO4,message digest result of hash algorithm"
|
|
rgroup.long 0x324++0x03
|
|
line.long 0x00 "DO5,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO5,message digest result of hash algorithm"
|
|
rgroup.long 0x328++0x03
|
|
line.long 0x00 "DO6,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO6,message digest result of hash algorithm"
|
|
rgroup.long 0x32C++0x03
|
|
line.long 0x00 "DO7,HAU data output register"
|
|
hexmask.long 0x00 0.--31. 1. "DO7,message digest result of hash algorithm"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,HAU interrupt enable register"
|
|
bitfld.long 0x00 1. "CCIE,calculation completion interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "DIIE,Data input interrupt enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "STAT,HAU status and interrupt flag register"
|
|
rbitfld.long 0x00 3. "BUSY,Busy flag bit" "0,1"
|
|
rbitfld.long 0x00 2. "DMAS,DMA status flag" "0,1"
|
|
rbitfld.long 0x00 1. "CCF,Digest calculation completion flag" "0,1"
|
|
rbitfld.long 0x00 0. "DIF,Data input flag" "0,1"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "CTX0,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX0,The complete internal status"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CTX1,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX1,The complete internal status"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "CTX2,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX2,The complete internal status"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "CTX3,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX3,The complete internal status"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "CTX4,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX4,The complete internal status"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "CTX5,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX5,The complete internal status"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "CTX6,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX6,The complete internal status"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "CTX7,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX7,The complete internal status"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "CTX8,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX8,The complete internal status"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CTX9,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX9,The complete internal status"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "CTX10,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX10,The complete internal status"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "CTX11,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX11,The complete internal status"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "CTX12,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX12,The complete internal status"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "CTX13,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX13,The complete internal status"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "CTX14,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX14,The complete internal status"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "CTX15,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX15,The complete internal status"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "CTX16,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX16,The complete internal status"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "CTX17,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX17,The complete internal status"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "CTX18,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX18,The complete internal status"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "CTX19,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX19,The complete internal status"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "CTX20,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX20,The complete internal status"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CTX21,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX21,The complete internal status"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "CTX22,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX22,The complete internal status"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "CTX23,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX23,The complete internal status"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "CTX24,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX24,The complete internal status"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "CTX25,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX25,The complete internal status"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "CTX26,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX26,The complete internal status"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "CTX27,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX27,The complete internal status"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "CTX28,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX28,The complete internal status"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "CTX29,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX29,The complete internal status"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "CTX30,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX30,The complete internal status"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "CTX31,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX31,The complete internal status"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "CTX32,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX32,The complete internal status"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "CTX33,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX33,The complete internal status"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "CTX34,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX34,The complete internal status"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "CTX35,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX35,The complete internal status"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "CTX36,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX36,The complete internal status"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "CTX37,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX37,The complete internal status"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "CTX38,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX38,The complete internal status"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "CTX39,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX39,The complete internal status"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "CTX40,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX40,The complete internal status"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "CTX41,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX41,The complete internal status"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "CTX42,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX42,The complete internal status"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "CTX43,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX43,The complete internal status"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "CTX44,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX44,The complete internal status"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "CTX45,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX45,The complete internal status"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "CTX46,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX46,The complete internal status"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "CTX47,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX47,The complete internal status"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "CTX48,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX48,The complete internal status"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "CTX49,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX49,The complete internal status"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "CTX50,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX50,The complete internal status"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "CTX51,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX51,The complete internal status"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "CTX52,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX52,The complete internal status"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "CTX53,Context switch register x"
|
|
hexmask.long 0x00 0.--31. 1. "CTX53,The complete internal status"
|
|
tree.end
|
|
tree.end
|
|
sif cpuis("GD32W515P*")
|
|
tree "HPDF (High-Performance Digital Filter)"
|
|
tree "HPDF"
|
|
base ad:0x40016000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH0CTL,Channel 0 control register"
|
|
bitfld.long 0x00 31. "HPDFEN,Global enable for HPDF interface" "0,1"
|
|
bitfld.long 0x00 30. "CKOUTSEL,Serial clock output source selection" "0,1"
|
|
bitfld.long 0x00 29. "CKOUTDM,Serial clock output duty mode" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CKOUTDIV,Serial clock output divider"
|
|
bitfld.long 0x00 14.--15. "DPM,Data packing mode" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CMSD,Channel 0 multiplexer select input data source" "0,1,2,3"
|
|
bitfld.long 0x00 8. "CHPINSEL,Channel inputs pins selection" "0,1"
|
|
bitfld.long 0x00 7. "CHEN,Channel 0 enable" "0,1"
|
|
bitfld.long 0x00 6. "CKLEN,Clock loss detector enable" "0,1"
|
|
bitfld.long 0x00 5. "MMEN,Malfunction monitor enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "SPICKSS,SPI clock source select" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "SITYP,Serial interface type" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH1CTL,Channel 1 control register"
|
|
bitfld.long 0x00 14.--15. "DPM,Data packing mode" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CMSD,Channel 0 multiplexer select input data source" "0,1,2,3"
|
|
bitfld.long 0x00 8. "CHPINSEL,Channel inputs pins selection" "0,1"
|
|
bitfld.long 0x00 7. "CHEN,Channel 0 enable" "0,1"
|
|
bitfld.long 0x00 6. "CKLEN,Clock loss detector enable" "0,1"
|
|
bitfld.long 0x00 5. "MMEN,Malfunction monitor enable" "0,1"
|
|
bitfld.long 0x00 2.--3. "SPICKSS,SPI clock source select" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "SITYP,Serial interface type" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CH0CFG0,Channel 0 configuration 0 register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "CALOFF,24-bit calibration offset"
|
|
bitfld.long 0x00 3.--7. "DTRS,Data right bit-shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH1CFG0,Channel 1 configuration 0 register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "CALOFF,24-bit calibration offset"
|
|
bitfld.long 0x00 3.--7. "DTRS,Data right bit-shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CH0CFG1,Channel 0 configuration 1 register"
|
|
bitfld.long 0x00 22.--23. "TMSFO,Threshold monitor Sinc filter order selection" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. "TMFOR,Threshold monitor filter oversampling rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 12.--13. "MMBSD,Malfunction monitor break signal distribution" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MMCT,Malfunction monitor counter threshold"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CH1CFG1,Channel 1 configuration 1 register"
|
|
bitfld.long 0x00 22.--23. "TMSFO,Threshold monitor Sinc filter order selection" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. "TMFOR,Threshold monitor filter oversampling rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 12.--13. "MMBSD,Malfunction monitor break signal distribution" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MMCT,Malfunction monitor counter threshold"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "CH0TMFDT,Channel 0 threshold monitor filter data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TMDATA,Threshold monitor data"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "CH1TMFDT,Channel 0 threshold monitor filter data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TMDATA,Threshold monitor data"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0PDI,Channel 0 parallel data input register"
|
|
hexmask.long.word 0x00 16.--31. 1. "DATAIN1,Data input 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATAIN0,Data input 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CH1PDI,Channel 1 parallel data input register"
|
|
hexmask.long.word 0x00 16.--31. 1. "DATAIN1,Data input 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATAIN0,Data input 0"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH0PS,Channel 0 pulse skip register"
|
|
bitfld.long 0x00 0.--5. "PLSK,Pulses to skip for input data skipping function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH1PS,Channel 1 pulse skip register"
|
|
bitfld.long 0x00 0.--5. "PLSK,Pulses to skip for input data skipping function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "FLT0CTL0,Filter 0 control register 0"
|
|
bitfld.long 0x00 30. "TMFM,Threshold monitor fast mode" "0,1"
|
|
bitfld.long 0x00 29. "FAST,Fast conversion mode enable for regular conversions" "0,1"
|
|
bitfld.long 0x00 24. "RCS,Regular conversion channel selection" "0,1"
|
|
bitfld.long 0x00 21. "RCDMAEN,DMA channel enabled to read data for the regular conversion" "0,1"
|
|
bitfld.long 0x00 19. "RCSYN,Regular conversion synchronously" "0,1"
|
|
bitfld.long 0x00 18. "RCCM,Regular conversions continuous mode" "0,1"
|
|
bitfld.long 0x00 17. "SRCS,Start regular channel conversion by software" "0,1"
|
|
bitfld.long 0x00 13.--14. "ICTEEN,Inserted conversions trigger edge enable" "0,1,2,3"
|
|
bitfld.long 0x00 8.--12. "ICTSSEL,Inserted conversions trigger signal selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. "ICDMAEN,DMA channel enabled to read data for the inserted channel group" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SCMOD,Scan conversion mode of inserted conversions" "0,1"
|
|
bitfld.long 0x00 3. "ICSYN,Inserted conversion synchronously" "0,1"
|
|
bitfld.long 0x00 1. "SICC,Start inserted group channel conversion" "0,1"
|
|
bitfld.long 0x00 0. "FLTEN,Inserted conversions trigger signal selection" "0,1"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "FLT1CTL0,Filter 1 control register 0"
|
|
bitfld.long 0x00 30. "TMFM,Threshold monitor fast mode" "0,1"
|
|
bitfld.long 0x00 29. "FAST,Fast conversion mode enable for regular conversions" "0,1"
|
|
bitfld.long 0x00 24. "RCS,Regular conversion channel selection" "0,1"
|
|
bitfld.long 0x00 21. "RCDMAEN,DMA channel enabled to read data for the regular conversion" "0,1"
|
|
bitfld.long 0x00 19. "RCSYN,Regular conversion synchronously" "0,1"
|
|
bitfld.long 0x00 18. "RCCM,Regular conversions continuous mode" "0,1"
|
|
bitfld.long 0x00 17. "SRCS,Start regular channel conversion by software" "0,1"
|
|
bitfld.long 0x00 13.--14. "ICTEEN,Inserted conversions trigger edge enable" "0,1,2,3"
|
|
bitfld.long 0x00 8.--12. "ICTSSEL,Inserted conversions trigger signal selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. "ICDMAEN,DMA channel enabled to read data for the inserted channel group" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SCMOD,Scan conversion mode of inserted conversions" "0,1"
|
|
bitfld.long 0x00 3. "ICSYN,Inserted conversion synchronously" "0,1"
|
|
bitfld.long 0x00 1. "SICC,Start inserted group channel conversion" "0,1"
|
|
bitfld.long 0x00 0. "FLTEN,Inserted conversions trigger signal selection" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "FLT0CTL1,Filter 0 control register 1"
|
|
bitfld.long 0x00 16.--17. "TMCHEN,Threshold monitor channel enable" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "EMCS,Extremes monitor channel selection" "0,1,2,3"
|
|
bitfld.long 0x00 6. "CKLIE,Clock loss interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "MMIE,Malfunction monitor interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMIE,Threshold monitor interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "RDOVRIE,Regular data overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "IDOVRIE,Inserted data overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "RCEIE,Regular conversion end interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "ICEIE,Inserted conversion end interrupt enable" "0,1"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "FLT1CTL1,Filter 1 control register 1"
|
|
bitfld.long 0x00 16.--17. "TMCHEN,Threshold monitor channel enable" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "EMCS,Extremes monitor channel selection" "0,1,2,3"
|
|
bitfld.long 0x00 5. "MMIE,Malfunction monitor interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMIE,Threshold monitor interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "RDOVRIE,Regular data overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "IDOVRIE,Inserted data overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "RCEIE,Regular conversion end interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "ICEIE,Inserted conversion end interrupt enable" "0,1"
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "FLT0STAT,Filter 0 status register"
|
|
bitfld.long 0x00 24.--25. "MMF,Malfunction monitor flag" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CKLF,Clock loss flag" "0,1,2,3"
|
|
bitfld.long 0x00 14. "RCPF,Regular conversion in progress flag" "0,1"
|
|
bitfld.long 0x00 13. "ICPF,Inserted conversion in progress flag" "0,1"
|
|
bitfld.long 0x00 4. "TMEOF,Threshold monitor event occurred flag" "0,1"
|
|
bitfld.long 0x00 3. "RCOF,Regular conversion end flag" "0,1"
|
|
bitfld.long 0x00 2. "ICOF,Inserted conversion overflow flag" "0,1"
|
|
bitfld.long 0x00 1. "RCEF,Regular conversion end flag" "0,1"
|
|
bitfld.long 0x00 0. "ICEF,Inserted conversion end flag" "0,1"
|
|
rgroup.long 0x188++0x03
|
|
line.long 0x00 "FLT1STAT,Filter 1 status register"
|
|
bitfld.long 0x00 24.--25. "MMF,Malfunction monitor flag" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CKLF,Clock loss flag" "0,1,2,3"
|
|
bitfld.long 0x00 14. "RCPF,Regular conversion in progress flag" "0,1"
|
|
bitfld.long 0x00 13. "ICPF,Inserted conversion in progress flag" "0,1"
|
|
bitfld.long 0x00 4. "TMEOF,Analog watchdog event occurred flag" "0,1"
|
|
bitfld.long 0x00 3. "RCOF,Regular conversion end flag" "0,1"
|
|
bitfld.long 0x00 2. "ICOF,Inserted conversion overflow flag" "0,1"
|
|
bitfld.long 0x00 1. "RCEF,Regular conversion end flag" "0,1"
|
|
bitfld.long 0x00 0. "ICEF,Inserted conversion end flag" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "FLT0INTC,Filter 0 interrupt flag clear register"
|
|
bitfld.long 0x00 24.--25. "MMFC,Clear the malfunction monitor flag" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CKLFC,Clear the clock loss flag" "0,1,2,3"
|
|
bitfld.long 0x00 3. "RCOFC,Clear the regular conversion overflow flag" "0,1"
|
|
bitfld.long 0x00 2. "ICOFC,Clear the inserted conversion overflow flag" "0,1"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "FLT1INTC,Filter 1 interrupt flag clear register"
|
|
bitfld.long 0x00 24.--25. "MMFC,Clear the short-circuit detector flag" "0,1,2,3"
|
|
bitfld.long 0x00 3. "RCOFC,Clear the regular conversion overflow flag" "0,1"
|
|
bitfld.long 0x00 2. "ICOFC,Clear the inserted conversion overflow flag" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "FLT0ICGS,Filter 0 inserted channel group selection register"
|
|
bitfld.long 0x00 0.--1. "ICGSEL,Inserted channel group selection" "0,1,2,3"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "FLT1ICGS,Filter 1 inserted channel group selection register"
|
|
bitfld.long 0x00 0.--1. "ICGSEL,Inserted channel group selection" "0,1,2,3"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "FLT0SFCTL,Filter 0 sinc filter control register"
|
|
bitfld.long 0x00 29.--31. "SFO,Sinc filter order" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 16.--25. 1. "SFOR,Sinc filter oversampling ratio"
|
|
hexmask.long.byte 0x00 0.--7. 1. "IOR,Integrator oversampling ratio"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "FLT1SFCTL,Filter 1 sinc filter control register"
|
|
bitfld.long 0x00 29.--31. "SFO,Sinc filter order" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 16.--25. 1. "SFOR,Sinc filter oversampling ratio"
|
|
hexmask.long.byte 0x00 0.--7. 1. "IOR,Integrator oversampling ratio"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "FLT0IDATA,Filter 0 inserted group data register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "IDATA,Inserted group conversion data"
|
|
bitfld.long 0x00 0. "ICCH,Inserted channel most recently converted" "0,1"
|
|
rgroup.long 0x198++0x03
|
|
line.long 0x00 "FLT1IDATA,Filter 1 inserted group data register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "IDATA,Inserted group conversion data"
|
|
bitfld.long 0x00 0. "ICCH,Inserted channel most recently converted" "0,1"
|
|
rgroup.long 0x11C++0x03
|
|
line.long 0x00 "FLT0RDATA,Filter 0 regular channel data register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "RDATA,Regular channel conversion data"
|
|
bitfld.long 0x00 4. "RCHPDT,Regular channel pending data" "0,1"
|
|
bitfld.long 0x00 0. "RCCH,Regular channel most recently converted" "0,1"
|
|
rgroup.long 0x19C++0x03
|
|
line.long 0x00 "FLT1RDATA,Filter 1 regular channel data register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "RDATA,Regular channel conversion data"
|
|
bitfld.long 0x00 4. "RCHPDT,Regular channel pending data" "0,1"
|
|
bitfld.long 0x00 0. "RCCH,Regular channel most recently converted" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "FLT0AWHT,Filter 0 threshold monitor high threshold register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "HTVAL,Threshold monitor high threshold value"
|
|
bitfld.long 0x00 0.--1. "HTBSD,High threshold event break signal distribution" "0,1,2,3"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "FLT1TMHT,Filter 1 threshold monitor high threshold register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "HTVAL,Threshold monitor high threshold value"
|
|
bitfld.long 0x00 0.--1. "HTBSD,High threshold event break signal distribution" "0,1,2,3"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "FLT0TMLT,Filter 0 threshold monitor low threshold register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "LTVAL,Threshold monitor low threshold value"
|
|
bitfld.long 0x00 0.--1. "LTBSD,Low threshold event break signal distribution" "0,1,2,3"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "FLT1TMLT,Filter 1 threshold monitor low threshold register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "LTVAL,Threshold monitor low threshold value"
|
|
bitfld.long 0x00 0.--1. "LTBSD,Low threshold event break signal distribution" "0,1,2,3"
|
|
rgroup.long 0x128++0x03
|
|
line.long 0x00 "FLT0TMSTAT,Filter 0 threshold monitor status register"
|
|
bitfld.long 0x00 8.--9. "HTF,Threshold monitor high threshold flag" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "LTF,Threshold monitor low threshold flag" "0,1,2,3"
|
|
rgroup.long 0x1A8++0x03
|
|
line.long 0x00 "FLT1TMSTAT,Filter 0 threshold monitor status register"
|
|
bitfld.long 0x00 8.--9. "HTF,Threshold monitor high threshold flag" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "LTF,Threshold monitor low threshold flag" "0,1,2,3"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "FLT0TMFC,Filter 0 threshold monitor flag clear register"
|
|
bitfld.long 0x00 8.--9. "HTFC,Clear the threshold monitor high threshold flag" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "LTFC,Clear the threshold monitor low threshold flag" "0,1,2,3"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "FLT1TMFC,Filter 1 threshold monitor flag clear register"
|
|
bitfld.long 0x00 8.--9. "HTFC,Clear the threshold monitor high threshold flag" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "LTFC,Clear the threshold monitor low threshold flag" "0,1,2,3"
|
|
rgroup.long 0x130++0x03
|
|
line.long 0x00 "FLT0EMMAX,Filter 0 extremes monitor maximum register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "MAXVAL,Extremes monitor maximum value"
|
|
bitfld.long 0x00 0. "MAXDC,Extremes monitor maximum data channel" "0,1"
|
|
rgroup.long 0x1B0++0x03
|
|
line.long 0x00 "FLT1EMMAX,Filter 1 extremes monitor maximum register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "MAXVAL,Extremes monitor maximum value"
|
|
bitfld.long 0x00 0. "MAXDC,Extremes monitor maximum data channel" "0,1"
|
|
rgroup.long 0x134++0x03
|
|
line.long 0x00 "FLT0EMMIN,Filter 0 extremes monitor minimum register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "MINVAL,Extremes monitor minimum value"
|
|
bitfld.long 0x00 0. "MINDC,Extremes monitor minimum data channel" "0,1"
|
|
rgroup.long 0x1B4++0x03
|
|
line.long 0x00 "FLT1EDMIN,Filter 1 extremes monitor minimum register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "MINVAL,Extremes monitor minimum value"
|
|
bitfld.long 0x00 0. "MINDC,Extremes monitor minimum data channel" "0,1"
|
|
tree.end
|
|
tree "SEC_HPDF"
|
|
base ad:0x50016000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH0CTL,Channel 0 control register"
|
|
bitfld.long 0x00 31. "HPDFEN,Global enable for HPDF interface" "0,1"
|
|
bitfld.long 0x00 30. "CKOUTSEL,Serial clock output source selection" "0,1"
|
|
bitfld.long 0x00 29. "CKOUTDM,Serial clock output duty mode" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CKOUTDIV,Serial clock output divider"
|
|
bitfld.long 0x00 14.--15. "DPM,Data packing mode" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CMSD,Channel 0 multiplexer select input data source" "0,1,2,3"
|
|
bitfld.long 0x00 8. "CHPINSEL,Channel inputs pins selection" "0,1"
|
|
bitfld.long 0x00 7. "CHEN,Channel 0 enable" "0,1"
|
|
bitfld.long 0x00 6. "CKLEN,Clock loss detector enable" "0,1"
|
|
bitfld.long 0x00 5. "MMEN,Malfunction monitor enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "SPICKSS,SPI clock source select" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "SITYP,Serial interface type" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH1CTL,Channel 1 control register"
|
|
bitfld.long 0x00 14.--15. "DPM,Data packing mode" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CMSD,Channel 0 multiplexer select input data source" "0,1,2,3"
|
|
bitfld.long 0x00 8. "CHPINSEL,Channel inputs pins selection" "0,1"
|
|
bitfld.long 0x00 7. "CHEN,Channel 0 enable" "0,1"
|
|
bitfld.long 0x00 6. "CKLEN,Clock loss detector enable" "0,1"
|
|
bitfld.long 0x00 5. "MMEN,Malfunction monitor enable" "0,1"
|
|
bitfld.long 0x00 2.--3. "SPICKSS,SPI clock source select" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "SITYP,Serial interface type" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CH0CFG0,Channel 0 configuration 0 register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "CALOFF,24-bit calibration offset"
|
|
bitfld.long 0x00 3.--7. "DTRS,Data right bit-shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH1CFG0,Channel 1 configuration 0 register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "CALOFF,24-bit calibration offset"
|
|
bitfld.long 0x00 3.--7. "DTRS,Data right bit-shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CH0CFG1,Channel 0 configuration 1 register"
|
|
bitfld.long 0x00 22.--23. "TMSFO,Threshold monitor Sinc filter order selection" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. "TMFOR,Threshold monitor filter oversampling rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 12.--13. "MMBSD,Malfunction monitor break signal distribution" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MMCT,Malfunction monitor counter threshold"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CH1CFG1,Channel 1 configuration 1 register"
|
|
bitfld.long 0x00 22.--23. "TMSFO,Threshold monitor Sinc filter order selection" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. "TMFOR,Threshold monitor filter oversampling rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 12.--13. "MMBSD,Malfunction monitor break signal distribution" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MMCT,Malfunction monitor counter threshold"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "CH0TMFDT,Channel 0 threshold monitor filter data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TMDATA,Threshold monitor data"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "CH1TMFDT,Channel 0 threshold monitor filter data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TMDATA,Threshold monitor data"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0PDI,Channel 0 parallel data input register"
|
|
hexmask.long.word 0x00 16.--31. 1. "DATAIN1,Data input 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATAIN0,Data input 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CH1PDI,Channel 1 parallel data input register"
|
|
hexmask.long.word 0x00 16.--31. 1. "DATAIN1,Data input 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATAIN0,Data input 0"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH0PS,Channel 0 pulse skip register"
|
|
bitfld.long 0x00 0.--5. "PLSK,Pulses to skip for input data skipping function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH1PS,Channel 1 pulse skip register"
|
|
bitfld.long 0x00 0.--5. "PLSK,Pulses to skip for input data skipping function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "FLT0CTL0,Filter 0 control register 0"
|
|
bitfld.long 0x00 30. "TMFM,Threshold monitor fast mode" "0,1"
|
|
bitfld.long 0x00 29. "FAST,Fast conversion mode enable for regular conversions" "0,1"
|
|
bitfld.long 0x00 24. "RCS,Regular conversion channel selection" "0,1"
|
|
bitfld.long 0x00 21. "RCDMAEN,DMA channel enabled to read data for the regular conversion" "0,1"
|
|
bitfld.long 0x00 19. "RCSYN,Regular conversion synchronously" "0,1"
|
|
bitfld.long 0x00 18. "RCCM,Regular conversions continuous mode" "0,1"
|
|
bitfld.long 0x00 17. "SRCS,Start regular channel conversion by software" "0,1"
|
|
bitfld.long 0x00 13.--14. "ICTEEN,Inserted conversions trigger edge enable" "0,1,2,3"
|
|
bitfld.long 0x00 8.--12. "ICTSSEL,Inserted conversions trigger signal selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. "ICDMAEN,DMA channel enabled to read data for the inserted channel group" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SCMOD,Scan conversion mode of inserted conversions" "0,1"
|
|
bitfld.long 0x00 3. "ICSYN,Inserted conversion synchronously" "0,1"
|
|
bitfld.long 0x00 1. "SICC,Start inserted group channel conversion" "0,1"
|
|
bitfld.long 0x00 0. "FLTEN,Inserted conversions trigger signal selection" "0,1"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "FLT1CTL0,Filter 1 control register 0"
|
|
bitfld.long 0x00 30. "TMFM,Threshold monitor fast mode" "0,1"
|
|
bitfld.long 0x00 29. "FAST,Fast conversion mode enable for regular conversions" "0,1"
|
|
bitfld.long 0x00 24. "RCS,Regular conversion channel selection" "0,1"
|
|
bitfld.long 0x00 21. "RCDMAEN,DMA channel enabled to read data for the regular conversion" "0,1"
|
|
bitfld.long 0x00 19. "RCSYN,Regular conversion synchronously" "0,1"
|
|
bitfld.long 0x00 18. "RCCM,Regular conversions continuous mode" "0,1"
|
|
bitfld.long 0x00 17. "SRCS,Start regular channel conversion by software" "0,1"
|
|
bitfld.long 0x00 13.--14. "ICTEEN,Inserted conversions trigger edge enable" "0,1,2,3"
|
|
bitfld.long 0x00 8.--12. "ICTSSEL,Inserted conversions trigger signal selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. "ICDMAEN,DMA channel enabled to read data for the inserted channel group" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SCMOD,Scan conversion mode of inserted conversions" "0,1"
|
|
bitfld.long 0x00 3. "ICSYN,Inserted conversion synchronously" "0,1"
|
|
bitfld.long 0x00 1. "SICC,Start inserted group channel conversion" "0,1"
|
|
bitfld.long 0x00 0. "FLTEN,Inserted conversions trigger signal selection" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "FLT0CTL1,Filter 0 control register 1"
|
|
bitfld.long 0x00 16.--17. "TMCHEN,Threshold monitor channel enable" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "EMCS,Extremes monitor channel selection" "0,1,2,3"
|
|
bitfld.long 0x00 6. "CKLIE,Clock loss interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "MMIE,Malfunction monitor interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMIE,Threshold monitor interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "RDOVRIE,Regular data overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "IDOVRIE,Inserted data overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "RCEIE,Regular conversion end interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "ICEIE,Inserted conversion end interrupt enable" "0,1"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "FLT1CTL1,Filter 1 control register 1"
|
|
bitfld.long 0x00 16.--17. "TMCHEN,Threshold monitor channel enable" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "EMCS,Extremes monitor channel selection" "0,1,2,3"
|
|
bitfld.long 0x00 5. "MMIE,Malfunction monitor interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMIE,Threshold monitor interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "RDOVRIE,Regular data overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "IDOVRIE,Inserted data overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "RCEIE,Regular conversion end interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "ICEIE,Inserted conversion end interrupt enable" "0,1"
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "FLT0STAT,Filter 0 status register"
|
|
bitfld.long 0x00 24.--25. "MMF,Malfunction monitor flag" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CKLF,Clock loss flag" "0,1,2,3"
|
|
bitfld.long 0x00 14. "RCPF,Regular conversion in progress flag" "0,1"
|
|
bitfld.long 0x00 13. "ICPF,Inserted conversion in progress flag" "0,1"
|
|
bitfld.long 0x00 4. "TMEOF,Threshold monitor event occurred flag" "0,1"
|
|
bitfld.long 0x00 3. "RCOF,Regular conversion end flag" "0,1"
|
|
bitfld.long 0x00 2. "ICOF,Inserted conversion overflow flag" "0,1"
|
|
bitfld.long 0x00 1. "RCEF,Regular conversion end flag" "0,1"
|
|
bitfld.long 0x00 0. "ICEF,Inserted conversion end flag" "0,1"
|
|
rgroup.long 0x188++0x03
|
|
line.long 0x00 "FLT1STAT,Filter 1 status register"
|
|
bitfld.long 0x00 24.--25. "MMF,Malfunction monitor flag" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CKLF,Clock loss flag" "0,1,2,3"
|
|
bitfld.long 0x00 14. "RCPF,Regular conversion in progress flag" "0,1"
|
|
bitfld.long 0x00 13. "ICPF,Inserted conversion in progress flag" "0,1"
|
|
bitfld.long 0x00 4. "TMEOF,Analog watchdog event occurred flag" "0,1"
|
|
bitfld.long 0x00 3. "RCOF,Regular conversion end flag" "0,1"
|
|
bitfld.long 0x00 2. "ICOF,Inserted conversion overflow flag" "0,1"
|
|
bitfld.long 0x00 1. "RCEF,Regular conversion end flag" "0,1"
|
|
bitfld.long 0x00 0. "ICEF,Inserted conversion end flag" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "FLT0INTC,Filter 0 interrupt flag clear register"
|
|
bitfld.long 0x00 24.--25. "MMFC,Clear the malfunction monitor flag" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CKLFC,Clear the clock loss flag" "0,1,2,3"
|
|
bitfld.long 0x00 3. "RCOFC,Clear the regular conversion overflow flag" "0,1"
|
|
bitfld.long 0x00 2. "ICOFC,Clear the inserted conversion overflow flag" "0,1"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "FLT1INTC,Filter 1 interrupt flag clear register"
|
|
bitfld.long 0x00 24.--25. "MMFC,Clear the short-circuit detector flag" "0,1,2,3"
|
|
bitfld.long 0x00 3. "RCOFC,Clear the regular conversion overflow flag" "0,1"
|
|
bitfld.long 0x00 2. "ICOFC,Clear the inserted conversion overflow flag" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "FLT0ICGS,Filter 0 inserted channel group selection register"
|
|
bitfld.long 0x00 0.--1. "ICGSEL,Inserted channel group selection" "0,1,2,3"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "FLT1ICGS,Filter 1 inserted channel group selection register"
|
|
bitfld.long 0x00 0.--1. "ICGSEL,Inserted channel group selection" "0,1,2,3"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "FLT0SFCTL,Filter 0 sinc filter control register"
|
|
bitfld.long 0x00 29.--31. "SFO,Sinc filter order" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 16.--25. 1. "SFOR,Sinc filter oversampling ratio"
|
|
hexmask.long.byte 0x00 0.--7. 1. "IOR,Integrator oversampling ratio"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "FLT1SFCTL,Filter 1 sinc filter control register"
|
|
bitfld.long 0x00 29.--31. "SFO,Sinc filter order" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 16.--25. 1. "SFOR,Sinc filter oversampling ratio"
|
|
hexmask.long.byte 0x00 0.--7. 1. "IOR,Integrator oversampling ratio"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "FLT0IDATA,Filter 0 inserted group data register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "IDATA,Inserted group conversion data"
|
|
bitfld.long 0x00 0. "ICCH,Inserted channel most recently converted" "0,1"
|
|
rgroup.long 0x198++0x03
|
|
line.long 0x00 "FLT1IDATA,Filter 1 inserted group data register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "IDATA,Inserted group conversion data"
|
|
bitfld.long 0x00 0. "ICCH,Inserted channel most recently converted" "0,1"
|
|
rgroup.long 0x11C++0x03
|
|
line.long 0x00 "FLT0RDATA,Filter 0 regular channel data register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "RDATA,Regular channel conversion data"
|
|
bitfld.long 0x00 4. "RCHPDT,Regular channel pending data" "0,1"
|
|
bitfld.long 0x00 0. "RCCH,Regular channel most recently converted" "0,1"
|
|
rgroup.long 0x19C++0x03
|
|
line.long 0x00 "FLT1RDATA,Filter 1 regular channel data register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "RDATA,Regular channel conversion data"
|
|
bitfld.long 0x00 4. "RCHPDT,Regular channel pending data" "0,1"
|
|
bitfld.long 0x00 0. "RCCH,Regular channel most recently converted" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "FLT0AWHT,Filter 0 threshold monitor high threshold register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "HTVAL,Threshold monitor high threshold value"
|
|
bitfld.long 0x00 0.--1. "HTBSD,High threshold event break signal distribution" "0,1,2,3"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "FLT1TMHT,Filter 1 threshold monitor high threshold register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "HTVAL,Threshold monitor high threshold value"
|
|
bitfld.long 0x00 0.--1. "HTBSD,High threshold event break signal distribution" "0,1,2,3"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "FLT0TMLT,Filter 0 threshold monitor low threshold register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "LTVAL,Threshold monitor low threshold value"
|
|
bitfld.long 0x00 0.--1. "LTBSD,Low threshold event break signal distribution" "0,1,2,3"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "FLT1TMLT,Filter 1 threshold monitor low threshold register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "LTVAL,Threshold monitor low threshold value"
|
|
bitfld.long 0x00 0.--1. "LTBSD,Low threshold event break signal distribution" "0,1,2,3"
|
|
rgroup.long 0x128++0x03
|
|
line.long 0x00 "FLT0TMSTAT,Filter 0 threshold monitor status register"
|
|
bitfld.long 0x00 8.--9. "HTF,Threshold monitor high threshold flag" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "LTF,Threshold monitor low threshold flag" "0,1,2,3"
|
|
rgroup.long 0x1A8++0x03
|
|
line.long 0x00 "FLT1TMSTAT,Filter 0 threshold monitor status register"
|
|
bitfld.long 0x00 8.--9. "HTF,Threshold monitor high threshold flag" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "LTF,Threshold monitor low threshold flag" "0,1,2,3"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "FLT0TMFC,Filter 0 threshold monitor flag clear register"
|
|
bitfld.long 0x00 8.--9. "HTFC,Clear the threshold monitor high threshold flag" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "LTFC,Clear the threshold monitor low threshold flag" "0,1,2,3"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "FLT1TMFC,Filter 1 threshold monitor flag clear register"
|
|
bitfld.long 0x00 8.--9. "HTFC,Clear the threshold monitor high threshold flag" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "LTFC,Clear the threshold monitor low threshold flag" "0,1,2,3"
|
|
rgroup.long 0x130++0x03
|
|
line.long 0x00 "FLT0EMMAX,Filter 0 extremes monitor maximum register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "MAXVAL,Extremes monitor maximum value"
|
|
bitfld.long 0x00 0. "MAXDC,Extremes monitor maximum data channel" "0,1"
|
|
rgroup.long 0x1B0++0x03
|
|
line.long 0x00 "FLT1EMMAX,Filter 1 extremes monitor maximum register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "MAXVAL,Extremes monitor maximum value"
|
|
bitfld.long 0x00 0. "MAXDC,Extremes monitor maximum data channel" "0,1"
|
|
rgroup.long 0x134++0x03
|
|
line.long 0x00 "FLT0EMMIN,Filter 0 extremes monitor minimum register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "MINVAL,Extremes monitor minimum value"
|
|
bitfld.long 0x00 0. "MINDC,Extremes monitor minimum data channel" "0,1"
|
|
rgroup.long 0x1B4++0x03
|
|
line.long 0x00 "FLT1EDMIN,Filter 1 extremes monitor minimum register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "MINVAL,Extremes monitor minimum value"
|
|
bitfld.long 0x00 0. "MINDC,Extremes monitor minimum data channel" "0,1"
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
tree "I2C0"
|
|
base ad:0x40005400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 23. "PECEN,PEC Calculation Switch" "0,1"
|
|
bitfld.long 0x00 22. "SMBALTEN,SMBus Alert enable" "0,1"
|
|
bitfld.long 0x00 21. "SMBDAEN,SMBus device default address enable" "0,1"
|
|
bitfld.long 0x00 20. "SMBHAEN,SMBus Host address enable" "0,1"
|
|
bitfld.long 0x00 19. "GCEN,Whether or not to response to a General Call" "0,1"
|
|
bitfld.long 0x00 18. "WUEN,Wakeup from Deep-sleep mode enable" "0,1"
|
|
bitfld.long 0x00 17. "SS,Whether to stretch SCL low when data is not ready in slave mode" "0,1"
|
|
bitfld.long 0x00 16. "SBCTL,Slave byte control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "DENR,DMA enable for reception" "0,1"
|
|
bitfld.long 0x00 14. "DENT,DMA enable for transmission" "0,1"
|
|
bitfld.long 0x00 12. "ANOFF,Analog noise filter disable" "0,1"
|
|
bitfld.long 0x00 8.--11. "DNF,Digital noise filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "STPDETIE,Stop detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NACKIE,Not acknowledge received interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ADDMIE,Address match interrupt enable in slave mode" "0,1"
|
|
bitfld.long 0x00 2. "RBNEIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "TIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "I2CEN,I2C peripheral enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
bitfld.long 0x00 26. "PECTRANS,PEC Transfer" "0,1"
|
|
bitfld.long 0x00 25. "AUTOEND,Automatic end mode in master mode" "0,1"
|
|
bitfld.long 0x00 24. "RELOAD,Reload mode" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BYTENUM,Number of bytes to be transferred"
|
|
bitfld.long 0x00 15. "NACKEN,Generate NACK in slave mode" "0,1"
|
|
bitfld.long 0x00 14. "STOP,Generate a STOP condition on I2C bus" "0,1"
|
|
bitfld.long 0x00 13. "START,Generate a START condition on I2C bus" "0,1"
|
|
bitfld.long 0x00 12. "HEAD10R,10-bit address header executes read direction only in master receive mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ADD10EN,10-bit addressing mode enable in master mode" "0,1"
|
|
bitfld.long 0x00 10. "TRDIR,Transfer direction in master mode" "0,1"
|
|
hexmask.long.word 0x00 0.--9. 1. "SADDRESS,Slave address to be sent"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SADDR0,Slave address register 0"
|
|
bitfld.long 0x00 15. "ADDRESSEN,I2C address enable" "0,1"
|
|
bitfld.long 0x00 10. "ADDFORMAT,Address mode for the I2C slave" "0,1"
|
|
bitfld.long 0x00 8.--9. "ADDRESS_8_9,7-bit address or bits 7:1 of a 10-bit address" "0,1,2,3"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS_1_7,Highest two bits of a 10-bit address"
|
|
bitfld.long 0x00 0. "ADDRESS_0,Bit 0 of a 10-bit address" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SADDR1,Slave address register 1"
|
|
bitfld.long 0x00 15. "ADDRESS2EN,Second I2C address enable" "0,1"
|
|
bitfld.long 0x00 8.--10. "ADDMSK2,ADDRESS2[7:1] mask" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS2,Second I2C address for the slave"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TIMING,Timing register"
|
|
bitfld.long 0x00 28.--31. "PSC,Timing prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SCLDELY,Data setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SDADELY,Data hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. "SCLH,SCL high period"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SCLL,SCL low period"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TIMEOUT,timeout register"
|
|
bitfld.long 0x00 31. "EXTOEN,Extended clock timeout detection enable" "0,1"
|
|
hexmask.long.word 0x00 16.--27. 1. "BUSTOB,Bus timeout B"
|
|
bitfld.long 0x00 15. "TOEN,Clock timeout detection enable" "0,1"
|
|
bitfld.long 0x00 12. "TOIDLE,Idle clock timeout detection" "0,1"
|
|
hexmask.long.word 0x00 0.--11. 1. "BUSTOA,Bus timeout A"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "STAT,Transfer status register"
|
|
hexmask.long.byte 0x00 17.--23. 1. "READDR,Received match address in slave mode"
|
|
bitfld.long 0x00 16. "TR,Whether the I2C is a transmitter or a receiver in slave mode" "0,1"
|
|
bitfld.long 0x00 15. "I2CBSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 13. "SMBALT,SMBus Alert" "0,1"
|
|
bitfld.long 0x00 12. "TIMEOUT,TIMEOUT flag" "0,1"
|
|
bitfld.long 0x00 11. "PECERR,PEC error" "0,1"
|
|
bitfld.long 0x00 10. "OUERR,Overrun/Underrun error in slave mode" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARB,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "BERR,Bus error" "0,1"
|
|
bitfld.long 0x00 7. "TCR,Transfer complete reload" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transfer complete in master mode" "0,1"
|
|
bitfld.long 0x00 5. "STPDET,STOP condition is detected on the bus" "0,1"
|
|
bitfld.long 0x00 4. "NACK,Not Acknowledge flag" "0,1"
|
|
bitfld.long 0x00 3. "ADDSEND,Address received matches in slave mode" "0,1"
|
|
bitfld.long 0x00 2. "RBNE,I2C_RDATA is not empty during receiving" "0,1"
|
|
bitfld.long 0x00 1. "TI,Transmit interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TBE,I2C_TDATA is empty during transmitting" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "STATC,Status clear register"
|
|
bitfld.long 0x00 13. "SMBALTC,SMBus Alert flag clear" "0,1"
|
|
bitfld.long 0x00 12. "TIMEOUTC,TIMEOUT flag clear" "0,1"
|
|
bitfld.long 0x00 11. "PECERRC,PEC error flag clear" "0,1"
|
|
bitfld.long 0x00 10. "OUERRC,Overrun/Underrun flag clear" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARBC,Arbitration Lost flag clear" "0,1"
|
|
bitfld.long 0x00 8. "BERRC,Bus error flag clear" "0,1"
|
|
bitfld.long 0x00 5. "STPDETC,STPDET flag clear" "0,1"
|
|
bitfld.long 0x00 4. "NACKC,Not Acknowledge flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ADDSENDC,ADDSEND flag clear" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PEC,Packet Error Check register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PECV,Packet Error Checking Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RDATA,receive data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TDATA,Transmit data value"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
hexmask.long.byte 0x00 9.--15. 1. "ADDM,Defines which bits of ADDRESS are compared with an incoming address byte"
|
|
tree.end
|
|
tree "I2C1"
|
|
base ad:0x40005800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 23. "PECEN,PEC Calculation Switch" "0,1"
|
|
bitfld.long 0x00 22. "SMBALTEN,SMBus Alert enable" "0,1"
|
|
bitfld.long 0x00 21. "SMBDAEN,SMBus device default address enable" "0,1"
|
|
bitfld.long 0x00 20. "SMBHAEN,SMBus Host address enable" "0,1"
|
|
bitfld.long 0x00 19. "GCEN,Whether or not to response to a General Call" "0,1"
|
|
bitfld.long 0x00 17. "SS,Whether to stretch SCL low when data is not ready in slave mode" "0,1"
|
|
bitfld.long 0x00 16. "SBCTL,Slave byte control" "0,1"
|
|
bitfld.long 0x00 15. "DENR,DMA enable for reception" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "DENT,DMA enable for transmission" "0,1"
|
|
bitfld.long 0x00 12. "ANOFF,Analog noise filter disable" "0,1"
|
|
bitfld.long 0x00 8.--11. "DNF,Digital noise filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "STPDETIE,Stop detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NACKIE,Not acknowledge received interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "ADDMIE,Address match interrupt enable in slave mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RBNEIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "TIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "I2CEN,I2C peripheral enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
bitfld.long 0x00 26. "PECTRANS,PEC Transfer" "0,1"
|
|
bitfld.long 0x00 25. "AUTOEND,Automatic end mode in master mode" "0,1"
|
|
bitfld.long 0x00 24. "RELOAD,Reload mode" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BYTENUM,Number of bytes to be transferred"
|
|
bitfld.long 0x00 15. "NACKEN,Generate NACK in slave mode" "0,1"
|
|
bitfld.long 0x00 14. "STOP,Generate a STOP condition on I2C bus" "0,1"
|
|
bitfld.long 0x00 13. "START,Generate a START condition on I2C bus" "0,1"
|
|
bitfld.long 0x00 12. "HEAD10R,10-bit address header executes read direction only in master receive mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ADD10EN,10-bit addressing mode enable in master mode" "0,1"
|
|
bitfld.long 0x00 10. "TRDIR,Transfer direction in master mode" "0,1"
|
|
hexmask.long.word 0x00 0.--9. 1. "SADDRESS,Slave address to be sent"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SADDR0,Slave address register 0"
|
|
bitfld.long 0x00 15. "ADDRESSEN,I2C address enable" "0,1"
|
|
bitfld.long 0x00 10. "ADDFORMAT,Address mode for the I2C slave" "0,1"
|
|
bitfld.long 0x00 8.--9. "ADDRESS_8_9,7-bit address or bits 7:1 of a 10-bit address" "0,1,2,3"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS_1_7,Highest two bits of a 10-bit address"
|
|
bitfld.long 0x00 0. "ADDRESS_0,Bit 0 of a 10-bit address" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SADDR1,Slave address register 1"
|
|
bitfld.long 0x00 15. "ADDRESS2EN,Second I2C address enable" "0,1"
|
|
bitfld.long 0x00 8.--10. "ADDMSK2,ADDRESS2[7:1] mask" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS2,Second I2C address for the slave"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TIMING,Timing register"
|
|
bitfld.long 0x00 28.--31. "PSC,Timing prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SCLDELY,Data setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SDADELY,Data hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. "SCLH,SCL high period"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SCLL,SCL low period"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TIMEOUT,timeout register"
|
|
bitfld.long 0x00 31. "EXTOEN,Extended clock timeout detection enable" "0,1"
|
|
hexmask.long.word 0x00 16.--27. 1. "BUSTOB,Bus timeout B"
|
|
bitfld.long 0x00 15. "TOEN,Clock timeout detection enable" "0,1"
|
|
bitfld.long 0x00 12. "TOIDLE,Idle clock timeout detection" "0,1"
|
|
hexmask.long.word 0x00 0.--11. 1. "BUSTOA,Bus timeout A"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "STAT,Transfer status register"
|
|
hexmask.long.byte 0x00 17.--23. 1. "READDR,Received match address in slave mode"
|
|
bitfld.long 0x00 16. "TR,Whether the I2C is a transmitter or a receiver in slave mode" "0,1"
|
|
bitfld.long 0x00 15. "I2CBSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 13. "SMBALT,SMBus Alert" "0,1"
|
|
bitfld.long 0x00 12. "TIMEOUT,TIMEOUT flag" "0,1"
|
|
bitfld.long 0x00 11. "PECERR,PEC error" "0,1"
|
|
bitfld.long 0x00 10. "OUERR,Overrun/Underrun error in slave mode" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARB,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "BERR,Bus error" "0,1"
|
|
bitfld.long 0x00 7. "TCR,Transfer complete reload" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transfer complete in master mode" "0,1"
|
|
bitfld.long 0x00 5. "STPDET,STOP condition is detected on the bus" "0,1"
|
|
bitfld.long 0x00 4. "NACK,Not Acknowledge flag" "0,1"
|
|
bitfld.long 0x00 3. "ADDSEND,Address received matches in slave mode" "0,1"
|
|
bitfld.long 0x00 2. "RBNE,I2C_RDATA is not empty during receiving" "0,1"
|
|
bitfld.long 0x00 1. "TI,Transmit interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TBE,I2C_TDATA is empty during transmitting" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "STATC,Status clear register"
|
|
bitfld.long 0x00 13. "SMBALTC,SMBus Alert flag clear" "0,1"
|
|
bitfld.long 0x00 12. "TIMEOUTC,TIMEOUT flag clear" "0,1"
|
|
bitfld.long 0x00 11. "PECERRC,PEC error flag clear" "0,1"
|
|
bitfld.long 0x00 10. "OUERRC,Overrun/Underrun flag clear" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARBC,Arbitration Lost flag clear" "0,1"
|
|
bitfld.long 0x00 8. "BERRC,Bus error flag clear" "0,1"
|
|
bitfld.long 0x00 5. "STPDETC,STPDET flag clear" "0,1"
|
|
bitfld.long 0x00 4. "NACKC,Not Acknowledge flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ADDSENDC,ADDSEND flag clear" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PEC,PEC register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PECV,Packet Error Checking Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RDATA,receive data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TDATA,Transmit data value"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
hexmask.long.byte 0x00 9.--15. 1. "ADDM,Defines which bits of ADDRESS are compared with an incoming address byte"
|
|
tree.end
|
|
tree "SEC_I2C0"
|
|
base ad:0x50005400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 23. "PECEN,PEC Calculation Switch" "0,1"
|
|
bitfld.long 0x00 22. "SMBALTEN,SMBus Alert enable" "0,1"
|
|
bitfld.long 0x00 21. "SMBDAEN,SMBus device default address enable" "0,1"
|
|
bitfld.long 0x00 20. "SMBHAEN,SMBus Host address enable" "0,1"
|
|
bitfld.long 0x00 19. "GCEN,Whether or not to response to a General Call" "0,1"
|
|
bitfld.long 0x00 18. "WUEN,Wakeup from Deep-sleep mode enable" "0,1"
|
|
bitfld.long 0x00 17. "SS,Whether to stretch SCL low when data is not ready in slave mode" "0,1"
|
|
bitfld.long 0x00 16. "SBCTL,Slave byte control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "DENR,DMA enable for reception" "0,1"
|
|
bitfld.long 0x00 14. "DENT,DMA enable for transmission" "0,1"
|
|
bitfld.long 0x00 12. "ANOFF,Analog noise filter disable" "0,1"
|
|
bitfld.long 0x00 8.--11. "DNF,Digital noise filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "STPDETIE,Stop detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NACKIE,Not acknowledge received interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ADDMIE,Address match interrupt enable in slave mode" "0,1"
|
|
bitfld.long 0x00 2. "RBNEIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "TIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "I2CEN,I2C peripheral enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
bitfld.long 0x00 26. "PECTRANS,PEC Transfer" "0,1"
|
|
bitfld.long 0x00 25. "AUTOEND,Automatic end mode in master mode" "0,1"
|
|
bitfld.long 0x00 24. "RELOAD,Reload mode" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BYTENUM,Number of bytes to be transferred"
|
|
bitfld.long 0x00 15. "NACKEN,Generate NACK in slave mode" "0,1"
|
|
bitfld.long 0x00 14. "STOP,Generate a STOP condition on I2C bus" "0,1"
|
|
bitfld.long 0x00 13. "START,Generate a START condition on I2C bus" "0,1"
|
|
bitfld.long 0x00 12. "HEAD10R,10-bit address header executes read direction only in master receive mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ADD10EN,10-bit addressing mode enable in master mode" "0,1"
|
|
bitfld.long 0x00 10. "TRDIR,Transfer direction in master mode" "0,1"
|
|
hexmask.long.word 0x00 0.--9. 1. "SADDRESS,Slave address to be sent"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SADDR0,Slave address register 0"
|
|
bitfld.long 0x00 15. "ADDRESSEN,I2C address enable" "0,1"
|
|
bitfld.long 0x00 10. "ADDFORMAT,Address mode for the I2C slave" "0,1"
|
|
bitfld.long 0x00 8.--9. "ADDRESS_8_9,7-bit address or bits 7:1 of a 10-bit address" "0,1,2,3"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS_1_7,Highest two bits of a 10-bit address"
|
|
bitfld.long 0x00 0. "ADDRESS_0,Bit 0 of a 10-bit address" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SADDR1,Slave address register 1"
|
|
bitfld.long 0x00 15. "ADDRESS2EN,Second I2C address enable" "0,1"
|
|
bitfld.long 0x00 8.--10. "ADDMSK2,ADDRESS2[7:1] mask" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS2,Second I2C address for the slave"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TIMING,Timing register"
|
|
bitfld.long 0x00 28.--31. "PSC,Timing prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SCLDELY,Data setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SDADELY,Data hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. "SCLH,SCL high period"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SCLL,SCL low period"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TIMEOUT,timeout register"
|
|
bitfld.long 0x00 31. "EXTOEN,Extended clock timeout detection enable" "0,1"
|
|
hexmask.long.word 0x00 16.--27. 1. "BUSTOB,Bus timeout B"
|
|
bitfld.long 0x00 15. "TOEN,Clock timeout detection enable" "0,1"
|
|
bitfld.long 0x00 12. "TOIDLE,Idle clock timeout detection" "0,1"
|
|
hexmask.long.word 0x00 0.--11. 1. "BUSTOA,Bus timeout A"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "STAT,Transfer status register"
|
|
hexmask.long.byte 0x00 17.--23. 1. "READDR,Received match address in slave mode"
|
|
bitfld.long 0x00 16. "TR,Whether the I2C is a transmitter or a receiver in slave mode" "0,1"
|
|
bitfld.long 0x00 15. "I2CBSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 13. "SMBALT,SMBus Alert" "0,1"
|
|
bitfld.long 0x00 12. "TIMEOUT,TIMEOUT flag" "0,1"
|
|
bitfld.long 0x00 11. "PECERR,PEC error" "0,1"
|
|
bitfld.long 0x00 10. "OUERR,Overrun/Underrun error in slave mode" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARB,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "BERR,Bus error" "0,1"
|
|
bitfld.long 0x00 7. "TCR,Transfer complete reload" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transfer complete in master mode" "0,1"
|
|
bitfld.long 0x00 5. "STPDET,STOP condition is detected on the bus" "0,1"
|
|
bitfld.long 0x00 4. "NACK,Not Acknowledge flag" "0,1"
|
|
bitfld.long 0x00 3. "ADDSEND,Address received matches in slave mode" "0,1"
|
|
bitfld.long 0x00 2. "RBNE,I2C_RDATA is not empty during receiving" "0,1"
|
|
bitfld.long 0x00 1. "TI,Transmit interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TBE,I2C_TDATA is empty during transmitting" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "STATC,Status clear register"
|
|
bitfld.long 0x00 13. "SMBALTC,SMBus Alert flag clear" "0,1"
|
|
bitfld.long 0x00 12. "TIMEOUTC,TIMEOUT flag clear" "0,1"
|
|
bitfld.long 0x00 11. "PECERRC,PEC error flag clear" "0,1"
|
|
bitfld.long 0x00 10. "OUERRC,Overrun/Underrun flag clear" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARBC,Arbitration Lost flag clear" "0,1"
|
|
bitfld.long 0x00 8. "BERRC,Bus error flag clear" "0,1"
|
|
bitfld.long 0x00 5. "STPDETC,STPDET flag clear" "0,1"
|
|
bitfld.long 0x00 4. "NACKC,Not Acknowledge flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ADDSENDC,ADDSEND flag clear" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PEC,Packet Error Check register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PECV,Packet Error Checking Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RDATA,receive data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TDATA,Transmit data value"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
hexmask.long.byte 0x00 9.--15. 1. "ADDM,Defines which bits of ADDRESS are compared with an incoming address byte"
|
|
tree.end
|
|
tree "SEC_I2C1"
|
|
base ad:0x50005800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 23. "PECEN,PEC Calculation Switch" "0,1"
|
|
bitfld.long 0x00 22. "SMBALTEN,SMBus Alert enable" "0,1"
|
|
bitfld.long 0x00 21. "SMBDAEN,SMBus device default address enable" "0,1"
|
|
bitfld.long 0x00 20. "SMBHAEN,SMBus Host address enable" "0,1"
|
|
bitfld.long 0x00 19. "GCEN,Whether or not to response to a General Call" "0,1"
|
|
bitfld.long 0x00 17. "SS,Whether to stretch SCL low when data is not ready in slave mode" "0,1"
|
|
bitfld.long 0x00 16. "SBCTL,Slave byte control" "0,1"
|
|
bitfld.long 0x00 15. "DENR,DMA enable for reception" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "DENT,DMA enable for transmission" "0,1"
|
|
bitfld.long 0x00 12. "ANOFF,Analog noise filter disable" "0,1"
|
|
bitfld.long 0x00 8.--11. "DNF,Digital noise filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "STPDETIE,Stop detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NACKIE,Not acknowledge received interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "ADDMIE,Address match interrupt enable in slave mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RBNEIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "TIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "I2CEN,I2C peripheral enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
bitfld.long 0x00 26. "PECTRANS,PEC Transfer" "0,1"
|
|
bitfld.long 0x00 25. "AUTOEND,Automatic end mode in master mode" "0,1"
|
|
bitfld.long 0x00 24. "RELOAD,Reload mode" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BYTENUM,Number of bytes to be transferred"
|
|
bitfld.long 0x00 15. "NACKEN,Generate NACK in slave mode" "0,1"
|
|
bitfld.long 0x00 14. "STOP,Generate a STOP condition on I2C bus" "0,1"
|
|
bitfld.long 0x00 13. "START,Generate a START condition on I2C bus" "0,1"
|
|
bitfld.long 0x00 12. "HEAD10R,10-bit address header executes read direction only in master receive mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ADD10EN,10-bit addressing mode enable in master mode" "0,1"
|
|
bitfld.long 0x00 10. "TRDIR,Transfer direction in master mode" "0,1"
|
|
hexmask.long.word 0x00 0.--9. 1. "SADDRESS,Slave address to be sent"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SADDR0,Slave address register 0"
|
|
bitfld.long 0x00 15. "ADDRESSEN,I2C address enable" "0,1"
|
|
bitfld.long 0x00 10. "ADDFORMAT,Address mode for the I2C slave" "0,1"
|
|
bitfld.long 0x00 8.--9. "ADDRESS_8_9,7-bit address or bits 7:1 of a 10-bit address" "0,1,2,3"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS_1_7,Highest two bits of a 10-bit address"
|
|
bitfld.long 0x00 0. "ADDRESS_0,Bit 0 of a 10-bit address" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SADDR1,Slave address register 1"
|
|
bitfld.long 0x00 15. "ADDRESS2EN,Second I2C address enable" "0,1"
|
|
bitfld.long 0x00 8.--10. "ADDMSK2,ADDRESS2[7:1] mask" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS2,Second I2C address for the slave"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TIMING,Timing register"
|
|
bitfld.long 0x00 28.--31. "PSC,Timing prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SCLDELY,Data setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SDADELY,Data hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. "SCLH,SCL high period"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SCLL,SCL low period"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TIMEOUT,timeout register"
|
|
bitfld.long 0x00 31. "EXTOEN,Extended clock timeout detection enable" "0,1"
|
|
hexmask.long.word 0x00 16.--27. 1. "BUSTOB,Bus timeout B"
|
|
bitfld.long 0x00 15. "TOEN,Clock timeout detection enable" "0,1"
|
|
bitfld.long 0x00 12. "TOIDLE,Idle clock timeout detection" "0,1"
|
|
hexmask.long.word 0x00 0.--11. 1. "BUSTOA,Bus timeout A"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "STAT,Transfer status register"
|
|
hexmask.long.byte 0x00 17.--23. 1. "READDR,Received match address in slave mode"
|
|
bitfld.long 0x00 16. "TR,Whether the I2C is a transmitter or a receiver in slave mode" "0,1"
|
|
bitfld.long 0x00 15. "I2CBSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 13. "SMBALT,SMBus Alert" "0,1"
|
|
bitfld.long 0x00 12. "TIMEOUT,TIMEOUT flag" "0,1"
|
|
bitfld.long 0x00 11. "PECERR,PEC error" "0,1"
|
|
bitfld.long 0x00 10. "OUERR,Overrun/Underrun error in slave mode" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARB,Arbitration Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "BERR,Bus error" "0,1"
|
|
bitfld.long 0x00 7. "TCR,Transfer complete reload" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transfer complete in master mode" "0,1"
|
|
bitfld.long 0x00 5. "STPDET,STOP condition is detected on the bus" "0,1"
|
|
bitfld.long 0x00 4. "NACK,Not Acknowledge flag" "0,1"
|
|
bitfld.long 0x00 3. "ADDSEND,Address received matches in slave mode" "0,1"
|
|
bitfld.long 0x00 2. "RBNE,I2C_RDATA is not empty during receiving" "0,1"
|
|
bitfld.long 0x00 1. "TI,Transmit interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TBE,I2C_TDATA is empty during transmitting" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "STATC,Status clear register"
|
|
bitfld.long 0x00 13. "SMBALTC,SMBus Alert flag clear" "0,1"
|
|
bitfld.long 0x00 12. "TIMEOUTC,TIMEOUT flag clear" "0,1"
|
|
bitfld.long 0x00 11. "PECERRC,PEC error flag clear" "0,1"
|
|
bitfld.long 0x00 10. "OUERRC,Overrun/Underrun flag clear" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARBC,Arbitration Lost flag clear" "0,1"
|
|
bitfld.long 0x00 8. "BERRC,Bus error flag clear" "0,1"
|
|
bitfld.long 0x00 5. "STPDETC,STPDET flag clear" "0,1"
|
|
bitfld.long 0x00 4. "NACKC,Not Acknowledge flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ADDSENDC,ADDSEND flag clear" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PEC,PEC register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PECV,Packet Error Checking Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RDATA,receive data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TDATA,Transmit data value"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
hexmask.long.byte 0x00 9.--15. 1. "ADDM,Defines which bits of ADDRESS are compared with an incoming address byte"
|
|
tree.end
|
|
tree.end
|
|
tree "ICACHE"
|
|
tree "ICACHE"
|
|
base ad:0x40080000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 19. "MMRST,Miss monitor reset" "0,1"
|
|
bitfld.long 0x00 18. "HMRST,Hit monitor reset" "0,1"
|
|
bitfld.long 0x00 17. "MMEN,Miss monitor enable" "0,1"
|
|
bitfld.long 0x00 16. "HMEN,Hit monitor enable" "0,1"
|
|
bitfld.long 0x00 3. "BSTT,Burst type for fast bus" "0,1"
|
|
bitfld.long 0x00 2. "AMSEL,Cache set-associativity mode selection" "0,1"
|
|
bitfld.long 0x00 1. "INVAL,Cache invalidation Set by software and cleared by hardware" "0,1"
|
|
bitfld.long 0x00 0. "EN,cache enabled" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 2. "ERR,Cache error flag" "0,1"
|
|
bitfld.long 0x00 1. "END,operation end flag" "0,1"
|
|
bitfld.long 0x00 0. "BUSY,Busy flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 2. "ERRIE,cache error interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "ENDIE,cache operation end interrupt enable" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "FC,Flag clear register"
|
|
bitfld.long 0x00 2. "ERRC,Software clear cache error flag" "0,1"
|
|
bitfld.long 0x00 1. "ENDC,Software clear operation end flag" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "HMC,Hit monitor counter register"
|
|
hexmask.long 0x00 0.--31. 1. "HMC,Cache hit monitor counter"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "MMC,Miss monitor counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "MMC,Cache miss monitor counter"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFG0,Configuration register 0"
|
|
bitfld.long 0x00 31. "OBT,Output burst type for region 0" "0,1"
|
|
bitfld.long 0x00 28. "MSEL,Region 0 AHB cache master selection" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. "RADDR,Region 0 remapped address this field replaces the alias address defined by BADDR field"
|
|
bitfld.long 0x00 15. "EN,Region 0 enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "SIZE,Region 0 size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BADDR,Region 0 base address"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFG1,Configuration register 1"
|
|
bitfld.long 0x00 31. "OBT,Output burst type for region 1" "0,1"
|
|
bitfld.long 0x00 28. "MSEL,Region 1 AHB cache master selection" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. "RADDR,Region 1 remapped address this field replaces the alias address defined by BADDR field"
|
|
bitfld.long 0x00 15. "EN,Region 1 enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "SIZE,Region 1 size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BADDR,Region 1 base address"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CFG2,Configuration register"
|
|
bitfld.long 0x00 31. "OBT,Output burst type for region 2" "0,1"
|
|
bitfld.long 0x00 28. "MSEL,Region 2 AHB cache master selection" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. "RADDR,Region 2 remapped address this field replaces the alias address defined by BADDR field"
|
|
bitfld.long 0x00 15. "EN,Region 2 enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "SIZE,Region 2 size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BADDR,Region 2 base address"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CFG3,Configuration register"
|
|
bitfld.long 0x00 31. "OBT,Output burst type for region 3" "0,1"
|
|
bitfld.long 0x00 28. "MSEL,Region 3 AHB cache master selection" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. "RADDR,Region 3 remapped address this field replaces the alias address defined by BADDR field"
|
|
bitfld.long 0x00 15. "EN,Region 3 enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "SIZE,Region 3 size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BADDR,Region 3 base address"
|
|
tree.end
|
|
tree "SEC_ICACHE"
|
|
base ad:0x50080000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 19. "MMRST,Miss monitor reset" "0,1"
|
|
bitfld.long 0x00 18. "HMRST,Hit monitor reset" "0,1"
|
|
bitfld.long 0x00 17. "MMEN,Miss monitor enable" "0,1"
|
|
bitfld.long 0x00 16. "HMEN,Hit monitor enable" "0,1"
|
|
bitfld.long 0x00 3. "BSTT,Burst type for fast bus" "0,1"
|
|
bitfld.long 0x00 2. "AMSEL,Cache set-associativity mode selection" "0,1"
|
|
bitfld.long 0x00 1. "INVAL,Cache invalidation Set by software and cleared by hardware" "0,1"
|
|
bitfld.long 0x00 0. "EN,cache enabled" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 2. "ERR,Cache error flag" "0,1"
|
|
bitfld.long 0x00 1. "END,operation end flag" "0,1"
|
|
bitfld.long 0x00 0. "BUSY,Busy flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 2. "ERRIE,cache error interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "ENDIE,cache operation end interrupt enable" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "FC,Flag clear register"
|
|
bitfld.long 0x00 2. "ERRC,Software clear cache error flag" "0,1"
|
|
bitfld.long 0x00 1. "ENDC,Software clear operation end flag" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "HMC,Hit monitor counter register"
|
|
hexmask.long 0x00 0.--31. 1. "HMC,Cache hit monitor counter"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "MMC,Miss monitor counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "MMC,Cache miss monitor counter"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFG0,Configuration register 0"
|
|
bitfld.long 0x00 31. "OBT,Output burst type for region 0" "0,1"
|
|
bitfld.long 0x00 28. "MSEL,Region 0 AHB cache master selection" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. "RADDR,Region 0 remapped address this field replaces the alias address defined by BADDR field"
|
|
bitfld.long 0x00 15. "EN,Region 0 enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "SIZE,Region 0 size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BADDR,Region 0 base address"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFG1,Configuration register 1"
|
|
bitfld.long 0x00 31. "OBT,Output burst type for region 1" "0,1"
|
|
bitfld.long 0x00 28. "MSEL,Region 1 AHB cache master selection" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. "RADDR,Region 1 remapped address this field replaces the alias address defined by BADDR field"
|
|
bitfld.long 0x00 15. "EN,Region 1 enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "SIZE,Region 1 size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BADDR,Region 1 base address"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CFG2,Configuration register"
|
|
bitfld.long 0x00 31. "OBT,Output burst type for region 2" "0,1"
|
|
bitfld.long 0x00 28. "MSEL,Region 2 AHB cache master selection" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. "RADDR,Region 2 remapped address this field replaces the alias address defined by BADDR field"
|
|
bitfld.long 0x00 15. "EN,Region 2 enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "SIZE,Region 2 size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BADDR,Region 2 base address"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CFG3,Configuration register"
|
|
bitfld.long 0x00 31. "OBT,Output burst type for region 3" "0,1"
|
|
bitfld.long 0x00 28. "MSEL,Region 3 AHB cache master selection" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. "RADDR,Region 3 remapped address this field replaces the alias address defined by BADDR field"
|
|
bitfld.long 0x00 15. "EN,Region 3 enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "SIZE,Region 3 size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BADDR,Region 3 base address"
|
|
tree.end
|
|
tree.end
|
|
tree "PKCAU (Public Key Cryptographic Acceleration Unit)"
|
|
tree "PKCAU"
|
|
base ad:0x4C061000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 20. "ADDRERRIE,Address error interrupt enable" "0,1"
|
|
bitfld.long 0x00 19. "RAMERRIE,RAM error interrupt enable" "0,1"
|
|
bitfld.long 0x00 17. "ENDIE,End of operation interrupt enable" "0,1"
|
|
bitfld.long 0x00 8.--13. "MODSEL,PKCAU operation mode selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 1. "START,PKCAU starts operation" "0,1"
|
|
bitfld.long 0x00 0. "PKCAUEN,PKCAU enable" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 20. "ADDRERR,Address error" "0,1"
|
|
bitfld.long 0x00 19. "RAMERR,PKCAU RAM error" "0,1"
|
|
bitfld.long 0x00 17. "ENDF,End of PKCAU operation" "0,1"
|
|
bitfld.long 0x00 16. "BUSY,Busy flag" "0,1"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "STATC,Status clear register"
|
|
bitfld.long 0x00 20. "ADDRERRC,Address error flag clear" "0,1"
|
|
bitfld.long 0x00 19. "RAMERRC,PKCAU RAM error flag clear" "0,1"
|
|
bitfld.long 0x00 17. "ENDFC,End of PKCAU operation flag clear" "0,1"
|
|
tree.end
|
|
tree "SEC_PKCAU"
|
|
base ad:0x5C061000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 20. "ADDRERRIE,Address error interrupt enable" "0,1"
|
|
bitfld.long 0x00 19. "RAMERRIE,RAM error interrupt enable" "0,1"
|
|
bitfld.long 0x00 17. "ENDIE,End of operation interrupt enable" "0,1"
|
|
bitfld.long 0x00 8.--13. "MODSEL,PKCAU operation mode selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 1. "START,PKCAU starts operation" "0,1"
|
|
bitfld.long 0x00 0. "PKCAUEN,PKCAU enable" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 20. "ADDRERR,Address error" "0,1"
|
|
bitfld.long 0x00 19. "RAMERR,PKCAU RAM error" "0,1"
|
|
bitfld.long 0x00 17. "ENDF,End of PKCAU operation" "0,1"
|
|
bitfld.long 0x00 16. "BUSY,Busy flag" "0,1"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "STATC,Status clear register"
|
|
bitfld.long 0x00 20. "ADDRERRC,Address error flag clear" "0,1"
|
|
bitfld.long 0x00 19. "RAMERRC,PKCAU RAM error flag clear" "0,1"
|
|
bitfld.long 0x00 17. "ENDFC,End of PKCAU operation flag clear" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "PMU (Program Memory Unit)"
|
|
tree "PMU"
|
|
base ad:0x40007000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,power control register 0"
|
|
bitfld.long 0x00 18.--19. "LDEN,Low-driver mode enable in Deep-sleep mode" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "LDOVS,LDO output voltage select" "0,1,2,3"
|
|
bitfld.long 0x00 11. "LDNP,Low-driver mode when use normal power LDO" "0,1"
|
|
bitfld.long 0x00 10. "LDLP,Low-driver mode when use low power LDO" "0,1"
|
|
bitfld.long 0x00 9. "VLVDEN,VDDA low voltage detect enable" "0,1"
|
|
bitfld.long 0x00 8. "BKPWEN,Backup Domain Write Enable" "0,1"
|
|
bitfld.long 0x00 5.--7. "LVDT,Low Voltage Detector Threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. "LVDEN,Low Voltage Detector Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "STBRST,Standby Flag Reset" "0,1"
|
|
bitfld.long 0x00 2. "WURST,Wakeup Flag Reset" "0,1"
|
|
bitfld.long 0x00 1. "STBMOD,Standby Mode" "0,1"
|
|
bitfld.long 0x00 0. "LDOLP,LDO Low Power Mode" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CS0,power control/status register 0"
|
|
bitfld.long 0x00 18.--19. "LDRF,Low-driver mode ready flag" "0,1,2,3"
|
|
rbitfld.long 0x00 14. "LDOVSRF,LDO voltage select ready flag" "0,1"
|
|
bitfld.long 0x00 11. "WUPEN3,WKUP Pin3(PA12) Enable" "0,1"
|
|
bitfld.long 0x00 10. "WUPEN2,WKUP Pin2(PB2) Enable" "0,1"
|
|
bitfld.long 0x00 9. "WUPEN1,WKUP Pin1(PA15) Enable" "0,1"
|
|
bitfld.long 0x00 8. "WUPEN0,WKUP Pin0(PA2) Enable" "0,1"
|
|
rbitfld.long 0x00 3. "VLVDF,VDDA Low Voltage Detector Status Flag" "0,1"
|
|
rbitfld.long 0x00 2. "LVDF,Low Voltage Detector Status Flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 1. "STBF,Standby flag" "0,1"
|
|
rbitfld.long 0x00 0. "WUF,Wakeup flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
bitfld.long 0x00 16. "RETDIS,No retention register when WIFI por-off" "0,1"
|
|
bitfld.long 0x00 14. "SRAM3PWAKE,SRAM3 wakeup by software" "0,1"
|
|
bitfld.long 0x00 13. "SRAM3PSLEEP,SRAM3 go to sleep by software" "0,1"
|
|
bitfld.long 0x00 10. "SRAM2PWAKE,SRAM2 wakeup by software" "0,1"
|
|
bitfld.long 0x00 9. "SRAM2PSLEEP,SRAM2 go to sleep by software" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1PWAKE,SRAM1 wakeup by software" "0,1"
|
|
bitfld.long 0x00 5. "SRAM1PSLEEP,SRAM1 go to sleep by software" "0,1"
|
|
bitfld.long 0x00 3. "WPWAKE,WIFI wakeup" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WPSLEEP,WIFI go to sleep by software only when WPEN bit is 1" "0,1"
|
|
bitfld.long 0x00 1. "WPEN,WIFI power enable" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "CS1,Control and status register 1"
|
|
bitfld.long 0x00 14. "SRAM3PS_ACTIVE,SRAM3 is in active state" "0,1"
|
|
bitfld.long 0x00 13. "SRAM3PS_SLEEP,SRAM3 is in sleep state" "0,1"
|
|
bitfld.long 0x00 10. "SRAM2PS_ACTIVE,SRAM2 is in active state" "0,1"
|
|
bitfld.long 0x00 9. "SRAM2PS_SLEEP,SRAM2 is in sleep state" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1PWAKE,SRAM1 wakeup by software" "0,1"
|
|
bitfld.long 0x00 5. "SRAM1PS_ACTIVE,SRAM1 is in active state" "0,1"
|
|
bitfld.long 0x00 3. "WPS_ACTIVE,WIFI is in active state" "0,1"
|
|
bitfld.long 0x00 2. "WPS_SLEEP,WIFI is in sleep state" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RFCLT,RF Control register"
|
|
bitfld.long 0x00 2. "RFFC,RFFC" "0,1"
|
|
bitfld.long 0x00 1. "RFFS,RFFS" "0,1"
|
|
bitfld.long 0x00 0. "RFSWEN,RF sequence configured" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SECCFG,Secure configuration register"
|
|
bitfld.long 0x00 16. "RFSEC,RF security" "0,1"
|
|
bitfld.long 0x00 11. "LPSSEC,WIFI_sleep and SRAM_sleep mode security" "0,1"
|
|
bitfld.long 0x00 10. "DBPSEC,Backup Domain write access security" "0,1"
|
|
bitfld.long 0x00 9. "VDMSEC,Voltage detection and monitoring security" "0,1"
|
|
bitfld.long 0x00 8. "LPMSEC,Low-power mode security" "0,1"
|
|
bitfld.long 0x00 3. "WUP3SEC,WKUP pin 3 security" "0,1"
|
|
bitfld.long 0x00 2. "WUP2SEC,WKUP pin 2 security" "0,1"
|
|
bitfld.long 0x00 1. "WUP1SEC,WKUP pin 1 security" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "WUP0SEC,WKUP pin 0 security" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PRICFG,Privilege configuration register"
|
|
bitfld.long 0x00 0. "PRIV,PMU privileged access" "0,1"
|
|
tree.end
|
|
tree "SEC_PMU"
|
|
base ad:0x50007000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,power control register 0"
|
|
bitfld.long 0x00 18.--19. "LDEN,Low-driver mode enable in Deep-sleep mode" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "LDOVS,LDO output voltage select" "0,1,2,3"
|
|
bitfld.long 0x00 11. "LDNP,Low-driver mode when use normal power LDO" "0,1"
|
|
bitfld.long 0x00 10. "LDLP,Low-driver mode when use low power LDO" "0,1"
|
|
bitfld.long 0x00 9. "VLVDEN,VDDA low voltage detect enable" "0,1"
|
|
bitfld.long 0x00 8. "BKPWEN,Backup Domain Write Enable" "0,1"
|
|
bitfld.long 0x00 5.--7. "LVDT,Low Voltage Detector Threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. "LVDEN,Low Voltage Detector Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "STBRST,Standby Flag Reset" "0,1"
|
|
bitfld.long 0x00 2. "WURST,Wakeup Flag Reset" "0,1"
|
|
bitfld.long 0x00 1. "STBMOD,Standby Mode" "0,1"
|
|
bitfld.long 0x00 0. "LDOLP,LDO Low Power Mode" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CS0,power control/status register 0"
|
|
bitfld.long 0x00 18.--19. "LDRF,Low-driver mode ready flag" "0,1,2,3"
|
|
rbitfld.long 0x00 14. "LDOVSRF,LDO voltage select ready flag" "0,1"
|
|
bitfld.long 0x00 11. "WUPEN3,WKUP Pin3(PA12) Enable" "0,1"
|
|
bitfld.long 0x00 10. "WUPEN2,WKUP Pin2(PB2) Enable" "0,1"
|
|
bitfld.long 0x00 9. "WUPEN1,WKUP Pin1(PA15) Enable" "0,1"
|
|
bitfld.long 0x00 8. "WUPEN0,WKUP Pin0(PA2) Enable" "0,1"
|
|
rbitfld.long 0x00 3. "VLVDF,VDDA Low Voltage Detector Status Flag" "0,1"
|
|
rbitfld.long 0x00 2. "LVDF,Low Voltage Detector Status Flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 1. "STBF,Standby flag" "0,1"
|
|
rbitfld.long 0x00 0. "WUF,Wakeup flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
bitfld.long 0x00 16. "RETDIS,No retention register when WIFI por-off" "0,1"
|
|
bitfld.long 0x00 14. "SRAM3PWAKE,SRAM3 wakeup by software" "0,1"
|
|
bitfld.long 0x00 13. "SRAM3PSLEEP,SRAM3 go to sleep by software" "0,1"
|
|
bitfld.long 0x00 10. "SRAM2PWAKE,SRAM2 wakeup by software" "0,1"
|
|
bitfld.long 0x00 9. "SRAM2PSLEEP,SRAM2 go to sleep by software" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1PWAKE,SRAM1 wakeup by software" "0,1"
|
|
bitfld.long 0x00 5. "SRAM1PSLEEP,SRAM1 go to sleep by software" "0,1"
|
|
bitfld.long 0x00 3. "WPWAKE,WIFI wakeup" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WPSLEEP,WIFI go to sleep by software only when WPEN bit is 1" "0,1"
|
|
bitfld.long 0x00 1. "WPEN,WIFI power enable" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "CS1,Control and status register 1"
|
|
bitfld.long 0x00 14. "SRAM3PS_ACTIVE,SRAM3 is in active state" "0,1"
|
|
bitfld.long 0x00 13. "SRAM3PS_SLEEP,SRAM3 is in sleep state" "0,1"
|
|
bitfld.long 0x00 10. "SRAM2PS_ACTIVE,SRAM2 is in active state" "0,1"
|
|
bitfld.long 0x00 9. "SRAM2PS_SLEEP,SRAM2 is in sleep state" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1PWAKE,SRAM1 wakeup by software" "0,1"
|
|
bitfld.long 0x00 5. "SRAM1PS_ACTIVE,SRAM1 is in active state" "0,1"
|
|
bitfld.long 0x00 3. "WPS_ACTIVE,WIFI is in active state" "0,1"
|
|
bitfld.long 0x00 2. "WPS_SLEEP,WIFI is in sleep state" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RFCLT,RF Control register"
|
|
bitfld.long 0x00 2. "RFFC,RFFC" "0,1"
|
|
bitfld.long 0x00 1. "RFFS,RFFS" "0,1"
|
|
bitfld.long 0x00 0. "RFSWEN,RF sequence configured" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SECCFG,Secure configuration register"
|
|
bitfld.long 0x00 16. "RFSEC,RF security" "0,1"
|
|
bitfld.long 0x00 11. "LPSSEC,WIFI_sleep and SRAM_sleep mode security" "0,1"
|
|
bitfld.long 0x00 10. "DBPSEC,Backup Domain write access security" "0,1"
|
|
bitfld.long 0x00 9. "VDMSEC,Voltage detection and monitoring security" "0,1"
|
|
bitfld.long 0x00 8. "LPMSEC,Low-power mode security" "0,1"
|
|
bitfld.long 0x00 3. "WUP3SEC,WKUP pin 3 security" "0,1"
|
|
bitfld.long 0x00 2. "WUP2SEC,WKUP pin 2 security" "0,1"
|
|
bitfld.long 0x00 1. "WUP1SEC,WKUP pin 1 security" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "WUP0SEC,WKUP pin 0 security" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PRICFG,Privilege configuration register"
|
|
bitfld.long 0x00 0. "PRIV,PMU privileged access" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "QSPI (Queued Synchronous Peripheral Interface)"
|
|
tree "QSPI"
|
|
base ad:0x40025800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PSC,The scaler factor for generating SCK"
|
|
bitfld.long 0x00 23. "SPMOD,Status Polling match mode" "0,1"
|
|
bitfld.long 0x00 22. "SPS,Status polling mode stop" "0,1"
|
|
bitfld.long 0x00 16.--20. "PL,FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "FLITF_MOD,Busy in FLITF mode" "0,1"
|
|
rbitfld.long 0x00 14. "BUSY,Busy" "0,1"
|
|
bitfld.long 0x00 7.--10. "FTL,FIFO threshold level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6. "SCKDEM,SCK delay enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "SSAMPLE,Sample shift" "0,1,2,3"
|
|
bitfld.long 0x00 3. "TMOUTEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x00 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x00 1. "ABORT,Abort request" "0,1"
|
|
bitfld.long 0x00 0. "QSPIEN,QSPI enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DCFG,Device configuration register"
|
|
bitfld.long 0x00 16.--20. "FMSZ,Flash memory size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. "CSHC,Chip select high cycle" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "CKMOD,the SCK level when QSPI is free" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 11. "WSIE,Wrong start sequence enable" "0,1"
|
|
bitfld.long 0x00 10. "TMOUTIE,Timeout enable" "0,1"
|
|
bitfld.long 0x00 9. "SMIE,Status match enable" "0,1"
|
|
bitfld.long 0x00 8. "FTIE,FIFO threshold enable" "0,1"
|
|
bitfld.long 0x00 7. "TCIE,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TERRIE,Transfer error interrupt enable" "0,1"
|
|
rbitfld.long 0x00 5. "WS,Wrong start sequence flag" "0,1"
|
|
rbitfld.long 0x00 4. "TMOUT,Timeout flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 3. "SM,Status match flag" "0,1"
|
|
rbitfld.long 0x00 2. "FT,FIFO threshold flag" "0,1"
|
|
rbitfld.long 0x00 1. "TC,Transfer complete flag" "0,1"
|
|
rbitfld.long 0x00 0. "TERR,Transfer error flag" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATC,Status clear register"
|
|
bitfld.long 0x00 5. "WSC,Clear wrong start sequence flag" "0,1"
|
|
bitfld.long 0x00 4. "TMOUTC,Clear timeout flag" "0,1"
|
|
bitfld.long 0x00 3. "SMC,Clear status match flag" "0,1"
|
|
bitfld.long 0x00 1. "TCC,Clear timeout flag" "0,1"
|
|
bitfld.long 0x00 0. "TERRC,Clear transfer error flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DTLEN,Data length register"
|
|
hexmask.long 0x00 0.--31. 1. "DTLEN,Data length"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TCFG,Transfer configuration register"
|
|
bitfld.long 0x00 28. "SIOO,Send instruction only once mode" "0,1"
|
|
bitfld.long 0x00 26.--27. "FMOD,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "DATAMOD,Data mode" "0,1,2,3"
|
|
bitfld.long 0x00 18.--22. "DUMYC,Number of dummy cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--17. "ALTESZ,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "ALTEMOD,Alternate bytes mode" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "ADDRSZ,Address size" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "ADDRMOD,Address mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "IMOD,Instruction mode" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTRUCTION,Instruction"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ADDR,Address register"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,Address"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ALTE,Alternate bytes register"
|
|
hexmask.long 0x00 0.--31. 1. "ALTE,Alternate Bytes"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DATA,Data register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "STATMK,Status mask register"
|
|
hexmask.long 0x00 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "STATMATCH,Status match register"
|
|
hexmask.long 0x00 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTERVAL,Interval register"
|
|
hexmask.long 0x00 0.--31. 1. "INTERVAL,Interval cycle"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TMOUT,Timeout register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TMOUT,Timeout cycle"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "FLUSH,FIFO flush register"
|
|
bitfld.long 0x00 0. "FLUSH,Used to flush all qspi interal fifo" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "WTCNT,Wait cnt for indirect wire mode register"
|
|
hexmask.long 0x00 0.--31. 1. "WTCNT,Wait cnt when an indirect write operation is completed or aborted"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "SPTMOUT,Timeout for staus polling mode register"
|
|
hexmask.long 0x00 0.--31. 1. "SPTMOUT,Timeout cnt when a flitf transfer trys to abort a staus polling mode opertaion"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "FLITF_SEC,FLITF mode security configuration register"
|
|
bitfld.long 0x00 0. "SECURE_FLITF,Use for indicate if register of flitf mode" "0,1"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CTLF,Control register in FLITF mode"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PSCF,The scaler factor for generating SCK"
|
|
bitfld.long 0x00 23. "CKMODEF,The SCK level in FLITF mode" "0,1"
|
|
bitfld.long 0x00 16.--18. "CSHCF,Chip select high cycle in FLITF mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--5. "SSAMPLEF,Sample shift in FLITF mode" "0,1,2,3"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "TCFGF,Transfer configuration register in FLITF mode"
|
|
bitfld.long 0x00 28. "SIOOF,Send instruction only once mode in FLITF mode" "0,1"
|
|
bitfld.long 0x00 24.--25. "DATAMODF,Data mode in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 18.--22. "DUMYCF,Number of dummy cycles in FLITF mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--17. "ALTESZF,Alternate bytes size in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "ALTEMODF,Alternate bytes mode in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "ADDRSZF,Address size in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "ADDRMODF,Address mode in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "IMODF,Instruction mode in FLITF mode" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTRUCTIONF,Instruction in FLITF mode"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "ALTEF,Alternate bytes register in FLITF mode"
|
|
hexmask.long 0x00 0.--31. 1. "ALTEF,Alternate Bytes in FLITF mode"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "BYTE_CNT,Complete bytes counter register"
|
|
hexmask.long 0x00 0.--31. 1. "BYTECNT,Remained Bytes which has been aborted by FLITF mode"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "PRIV,Privilege configuration register"
|
|
bitfld.long 0x00 0. "PRIV,Use for indicate if register is privileged" "0,1"
|
|
tree.end
|
|
tree "SEC_QSPI"
|
|
base ad:0x50025800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PSC,The scaler factor for generating SCK"
|
|
bitfld.long 0x00 23. "SPMOD,Status Polling match mode" "0,1"
|
|
bitfld.long 0x00 22. "SPS,Status polling mode stop" "0,1"
|
|
bitfld.long 0x00 16.--20. "PL,FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "FLITF_MOD,Busy in FLITF mode" "0,1"
|
|
rbitfld.long 0x00 14. "BUSY,Busy" "0,1"
|
|
bitfld.long 0x00 7.--10. "FTL,FIFO threshold level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6. "SCKDEM,SCK delay enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "SSAMPLE,Sample shift" "0,1,2,3"
|
|
bitfld.long 0x00 3. "TMOUTEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x00 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x00 1. "ABORT,Abort request" "0,1"
|
|
bitfld.long 0x00 0. "QSPIEN,QSPI enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DCFG,Device configuration register"
|
|
bitfld.long 0x00 16.--20. "FMSZ,Flash memory size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. "CSHC,Chip select high cycle" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "CKMOD,the SCK level when QSPI is free" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 11. "WSIE,Wrong start sequence enable" "0,1"
|
|
bitfld.long 0x00 10. "TMOUTIE,Timeout enable" "0,1"
|
|
bitfld.long 0x00 9. "SMIE,Status match enable" "0,1"
|
|
bitfld.long 0x00 8. "FTIE,FIFO threshold enable" "0,1"
|
|
bitfld.long 0x00 7. "TCIE,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TERRIE,Transfer error interrupt enable" "0,1"
|
|
rbitfld.long 0x00 5. "WS,Wrong start sequence flag" "0,1"
|
|
rbitfld.long 0x00 4. "TMOUT,Timeout flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 3. "SM,Status match flag" "0,1"
|
|
rbitfld.long 0x00 2. "FT,FIFO threshold flag" "0,1"
|
|
rbitfld.long 0x00 1. "TC,Transfer complete flag" "0,1"
|
|
rbitfld.long 0x00 0. "TERR,Transfer error flag" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATC,Status clear register"
|
|
bitfld.long 0x00 5. "WSC,Clear wrong start sequence flag" "0,1"
|
|
bitfld.long 0x00 4. "TMOUTC,Clear timeout flag" "0,1"
|
|
bitfld.long 0x00 3. "SMC,Clear status match flag" "0,1"
|
|
bitfld.long 0x00 1. "TCC,Clear timeout flag" "0,1"
|
|
bitfld.long 0x00 0. "TERRC,Clear transfer error flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DTLEN,Data length register"
|
|
hexmask.long 0x00 0.--31. 1. "DTLEN,Data length"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TCFG,Transfer configuration register"
|
|
bitfld.long 0x00 28. "SIOO,Send instruction only once mode" "0,1"
|
|
bitfld.long 0x00 26.--27. "FMOD,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "DATAMOD,Data mode" "0,1,2,3"
|
|
bitfld.long 0x00 18.--22. "DUMYC,Number of dummy cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--17. "ALTESZ,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "ALTEMOD,Alternate bytes mode" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "ADDRSZ,Address size" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "ADDRMOD,Address mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "IMOD,Instruction mode" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTRUCTION,Instruction"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ADDR,Address register"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,Address"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ALTE,Alternate bytes register"
|
|
hexmask.long 0x00 0.--31. 1. "ALTE,Alternate Bytes"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DATA,Data register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "STATMK,Status mask register"
|
|
hexmask.long 0x00 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "STATMATCH,Status match register"
|
|
hexmask.long 0x00 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTERVAL,Interval register"
|
|
hexmask.long 0x00 0.--31. 1. "INTERVAL,Interval cycle"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TMOUT,Timeout register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TMOUT,Timeout cycle"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "FLUSH,FIFO flush register"
|
|
bitfld.long 0x00 0. "FLUSH,Used to flush all qspi interal fifo" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "WTCNT,Wait cnt for indirect wire mode register"
|
|
hexmask.long 0x00 0.--31. 1. "WTCNT,Wait cnt when an indirect write operation is completed or aborted"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "SPTMOUT,Timeout for staus polling mode register"
|
|
hexmask.long 0x00 0.--31. 1. "SPTMOUT,Timeout cnt when a flitf transfer trys to abort a staus polling mode opertaion"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "FLITF_SEC,FLITF mode security configuration register"
|
|
bitfld.long 0x00 0. "SECURE_FLITF,Use for indicate if register of flitf mode" "0,1"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CTLF,Control register in FLITF mode"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PSCF,The scaler factor for generating SCK"
|
|
bitfld.long 0x00 23. "CKMODEF,The SCK level in FLITF mode" "0,1"
|
|
bitfld.long 0x00 16.--18. "CSHCF,Chip select high cycle in FLITF mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--5. "SSAMPLEF,Sample shift in FLITF mode" "0,1,2,3"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "TCFGF,Transfer configuration register in FLITF mode"
|
|
bitfld.long 0x00 28. "SIOOF,Send instruction only once mode in FLITF mode" "0,1"
|
|
bitfld.long 0x00 24.--25. "DATAMODF,Data mode in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 18.--22. "DUMYCF,Number of dummy cycles in FLITF mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--17. "ALTESZF,Alternate bytes size in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "ALTEMODF,Alternate bytes mode in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "ADDRSZF,Address size in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "ADDRMODF,Address mode in FLITF mode" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "IMODF,Instruction mode in FLITF mode" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTRUCTIONF,Instruction in FLITF mode"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "ALTEF,Alternate bytes register in FLITF mode"
|
|
hexmask.long 0x00 0.--31. 1. "ALTEF,Alternate Bytes in FLITF mode"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "BYTE_CNT,Complete bytes counter register"
|
|
hexmask.long 0x00 0.--31. 1. "BYTECNT,Remained Bytes which has been aborted by FLITF mode"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "PRIV,Privilege configuration register"
|
|
bitfld.long 0x00 0. "PRIV,Use for indicate if register is privileged" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "RCU (Reset and clock unit)"
|
|
tree "RCU"
|
|
base ad:0x40023800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 31. "HXTALREADY,High Speed crystal oscillator ready" "0,1"
|
|
bitfld.long 0x00 30. "HXTALENPLL,High Speed crystal oscillator enable for system CK_PLLP" "0,1"
|
|
bitfld.long 0x00 29. "HXTALENI2S,High Speed crystal oscillator enable for PLLI2S" "0,1"
|
|
bitfld.long 0x00 28. "HXTALPU,High Speed crystal oscillator (HXTAL) Power Up" "0,1"
|
|
rbitfld.long 0x00 27. "PLLI2SSTB,PLLI2S clock stabilization flag" "0,1"
|
|
bitfld.long 0x00 26. "PLLI2SEN,PLLI2S enable" "0,1"
|
|
rbitfld.long 0x00 25. "PLLSTB,PLL clock stabilization flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "PLLEN,PLL enable" "0,1"
|
|
rbitfld.long 0x00 23. "PLLDIGSTB,PLLDIG Clock Stabilization Flag" "0,1"
|
|
bitfld.long 0x00 22. "RFCKMEN,HXTAL Clock Monitor Enable" "0,1"
|
|
bitfld.long 0x00 21. "PLLDIGEN,PLLDIG enable" "0,1"
|
|
bitfld.long 0x00 20. "PLLDIGPU,PLL power up" "0,1"
|
|
bitfld.long 0x00 19. "CKMEN,HXTAL clock monitor enable" "0,1"
|
|
bitfld.long 0x00 18. "HXTALBPS,High speed crystal oscillator (HXTAL) clock bypass mode enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 17. "HXTALSTB,High speed crystal oscillator (HXTAL) clock stabilization flag" "0,1"
|
|
bitfld.long 0x00 16. "HXTALEN,High Speed crystal oscillator (HXTAL) enable" "0,1"
|
|
hexmask.long.byte 0x00 8.--15. 1. "IRC16MCALIB,Internal 16MHz RC Oscillator calibration value register"
|
|
bitfld.long 0x00 3.--7. "IRC16MADJ,Internal 16MHz RC Oscillator clock trim adjust value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2. "RCUPRIP,RCU privilege protection" "0,1"
|
|
rbitfld.long 0x00 1. "IRC16MSTB,IRC16M Internal 16MHz RC Oscillator stabilization flag" "0,1"
|
|
bitfld.long 0x00 0. "IRC16MEN,Internal 16MHz RC oscillator enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PLL,PLL register (RCU_PLL)"
|
|
bitfld.long 0x00 16.--17. "PLLP,The PLLP output frequency division factor from PLL VCO clock" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PLLSEL,PLL Clock Source Selection" "0,1"
|
|
hexmask.long.word 0x00 6.--14. 1. "PLLN,The PLL VCO clock multi factor"
|
|
bitfld.long 0x00 0.--5. "PLLPSC,The PLL VCO source clock prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CFG0,Clock configuration register 0 (RCU_CFG0)"
|
|
bitfld.long 0x00 30.--31. "CKOUT1SEL,CKOUT1 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 27.--29. "CKOUT1DIV,The CK_OUT1 divider which the CK_OUT1 frequency can be reduced" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. "CKOUT0DIV,The CK_OUT0 divider which the CK_OUT0 frequency can be reduced" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 21.--22. "CKOUT0SEL,CKOUT0 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. "RTCDIV,RTC clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 13.--15. "APB2PSC,APB2 prescaler selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--12. "APB1PSC,APB1 prescaler selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "AHBPSC,AHB prescaler selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 2.--3. "SCSS,System clock switch status" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "SCS,System clock switch" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "INT,Clock interrupt register (RCU_INT)"
|
|
bitfld.long 0x00 23. "CKMIC,HXTAL Clock Stuck Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 22. "PLLDIGSTBIC,PLLDIG stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 21. "PLLI2SSTBIC,PLLI2S stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 20. "PLLSTBIC,PLL stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 19. "HXTALSTBIC,HXTAL Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 18. "IRC16MSTBIC,IRC16M Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 17. "LXTALSTBIC,LXTAL Stabilization Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "IRC32KSTBIC,IRC32K Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 14. "PLLDIGSTBIE,PLLDIG Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. "PLLI2SSTBIE,PLLI2S Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "PLLSTBIE,PLL Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. "HXTALSTBIE,HXTAL Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "IRC16MSTBIE,IRC16M Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "LXTALSTBIE,LXTAL Stabilization Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "IRC32KSTBIE,IRC32K Stabilization interrupt enable" "0,1"
|
|
rbitfld.long 0x00 7. "CKMIF,HXTAL Clock Stuck Interrupt Flag" "0,1"
|
|
rbitfld.long 0x00 6. "PLLDIGSTBIF,PLLDIG stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 5. "PLLI2SSTBIF,PLLI2S stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 4. "PLLSTBIF,PLL stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 3. "HXTALSTBIF,HXTAL stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 2. "IRC16MSTBIF,IRC16M stabilization interrupt flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 1. "LXTALSTBIF,LXTAL stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 0. "IRC32KSTBIF,IRC32K stabilization interrupt flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "AHB1RST,AHB1 reset register"
|
|
bitfld.long 0x00 29. "USBFSRST,USBFS reset" "0,1"
|
|
bitfld.long 0x00 22. "DMA1RST,DMA1 reset" "0,1"
|
|
bitfld.long 0x00 21. "DMA0RST,DMA0 reset" "0,1"
|
|
bitfld.long 0x00 13. "WIFIRST,WIFI reset" "0,1"
|
|
bitfld.long 0x00 12. "CRCRST,CRC reset" "0,1"
|
|
bitfld.long 0x00 8. "TSIRST,TSI reset" "0,1"
|
|
bitfld.long 0x00 7. "TZPCURST,TZPCU reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCRST,GPIO port C reset" "0,1"
|
|
bitfld.long 0x00 1. "PBRST,GPIO port B reset" "0,1"
|
|
bitfld.long 0x00 0. "PARST,GPIO port A reset" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "AHB2RST,AHB2 reset register"
|
|
bitfld.long 0x00 6. "TRNGRST,TRNG reset" "0,1"
|
|
bitfld.long 0x00 5. "HAURST,HAU reset" "0,1"
|
|
bitfld.long 0x00 4. "CAURST,CAU reset" "0,1"
|
|
bitfld.long 0x00 3. "PKCAURST,PKCAU reset" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "AHB2RST,AHB2 reset register"
|
|
bitfld.long 0x00 6. "TRNGRST,TRNG reset" "0,1"
|
|
bitfld.long 0x00 5. "HAURST,HAU reset" "0,1"
|
|
bitfld.long 0x00 4. "CAURST,CAU reset" "0,1"
|
|
bitfld.long 0x00 3. "PKCAURST,PKCAU reset" "0,1"
|
|
bitfld.long 0x00 0. "DCIRST,DCI reset" "0,1"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "AHB3RST,AHB3 reset register"
|
|
bitfld.long 0x00 1. "QSPIRST,QSPI reset" "0,1"
|
|
bitfld.long 0x00 0. "SQPIRST,SQPI reset" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "APB1RST,APB1 reset register (RCU_APB1RST)"
|
|
bitfld.long 0x00 28. "PMURST,Power control reset" "0,1"
|
|
bitfld.long 0x00 22. "I2C1RST,I2C1 reset" "0,1"
|
|
bitfld.long 0x00 21. "I2C0RST,I2C0 reset" "0,1"
|
|
bitfld.long 0x00 18. "USART0RST,USART0 reset" "0,1"
|
|
bitfld.long 0x00 17. "USART1RST,USART1 reset" "0,1"
|
|
bitfld.long 0x00 14. "SPI1RST,SPI1 reset" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTRST,Window watchdog timer reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER5RST,TIMER5 timer reset" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4RST,TIMER4 timer reset" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3RST,TIMER3 timer reset" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2RST,TIMER2 timer reset" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1RST,TIMER1 timer reset" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "APB2RST,APB2 reset register (RCU_APB2RST)"
|
|
bitfld.long 0x00 31. "RFRST,RF reset" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16RST,TIMER16 reset" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15RST,TIMER15 reset" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGRST,SYSCFG Reset" "0,1"
|
|
bitfld.long 0x00 12. "SPI0RST,SPI0 Reset" "0,1"
|
|
bitfld.long 0x00 11. "SDIORST,SDIO reset" "0,1"
|
|
bitfld.long 0x00 8. "ADCRST,ADC reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "USART2RST,USART2 reset" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0RST,TIMER0 reset" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "APB2RST,APB2 reset register (RCU_APB2RST)"
|
|
bitfld.long 0x00 31. "RFRST,RF reset" "0,1"
|
|
bitfld.long 0x00 30. "HPDFRST,HPDF reset" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16RST,TIMER16 reset" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15RST,TIMER15 reset" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGRST,SYSCFG Reset" "0,1"
|
|
bitfld.long 0x00 12. "SPI0RST,SPI0 Reset" "0,1"
|
|
bitfld.long 0x00 11. "SDIORST,SDIO reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ADCRST,ADC reset" "0,1"
|
|
bitfld.long 0x00 4. "USART2RST,USART2 reset" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0RST,TIMER0 reset" "0,1"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "AHB1EN,AHB1 enable register"
|
|
bitfld.long 0x00 29. "USBFSEN,USBFS clock enable" "0,1"
|
|
bitfld.long 0x00 22. "DMA1EN,DMA1 clock enable" "0,1"
|
|
bitfld.long 0x00 21. "DMA0EN,DMA0 clock enable" "0,1"
|
|
bitfld.long 0x00 19. "SRAM3EN,SRAM3 clock enable" "0,1"
|
|
bitfld.long 0x00 18. "SRAM2EN,SRAM2 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "SRAM1EN,SRAM1 clock enable" "0,1"
|
|
bitfld.long 0x00 16. "SRAM0EN,SRAM0 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "WIFIRUNEN,WIFIRUNEN clock enable" "0,1"
|
|
bitfld.long 0x00 13. "WIFIEN,WIFI Module clock enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCEN,CRC clock enable" "0,1"
|
|
bitfld.long 0x00 8. "TSIEN,TSI clock enable" "0,1"
|
|
bitfld.long 0x00 7. "TZPCUEN,TZPCU clock enable" "0,1"
|
|
bitfld.long 0x00 2. "PCEN,GPIO port C clock enable" "0,1"
|
|
bitfld.long 0x00 1. "PBEN,GPIO port B clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PAEN,GPIO port A clock enable" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "AHB2EN,AHB2 enable register"
|
|
bitfld.long 0x00 6. "TRNGEN,TRNG clock enable" "0,1"
|
|
bitfld.long 0x00 5. "HAUEN,HAU clock enable" "0,1"
|
|
bitfld.long 0x00 4. "CAUEN,CAU clock enable" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUEN,PKCAU clock enable" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "AHB2EN,AHB2 enable register"
|
|
bitfld.long 0x00 6. "TRNGEN,TRNG clock enable" "0,1"
|
|
bitfld.long 0x00 5. "HAUEN,HAU clock enable" "0,1"
|
|
bitfld.long 0x00 4. "CAUEN,CAU clock enable" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUEN,PKCAU clock enable" "0,1"
|
|
bitfld.long 0x00 0. "DCIEN,DCI clock enable" "0,1"
|
|
endif
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "AHB3EN,AHB3 clock enable register"
|
|
bitfld.long 0x00 1. "QSPIEN,QSPI clock enable" "0,1"
|
|
bitfld.long 0x00 0. "SQPIEN,SQPI clock enable" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "APB1EN,APB1 clock enable register (RCU_APB1EN)"
|
|
bitfld.long 0x00 28. "PMUEN,Power control clock enable" "0,1"
|
|
bitfld.long 0x00 22. "I2C1EN,I2C1 clock enable" "0,1"
|
|
bitfld.long 0x00 21. "I2C0EN,I2C0 clock enable" "0,1"
|
|
bitfld.long 0x00 18. "USART0EN,USART0 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "USART1EN,USART1 clock enable" "0,1"
|
|
bitfld.long 0x00 14. "SPI1EN,SPI1 clock enable" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTEN,Window watchdog timer clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER5EN,TIMER5 timer clock enable" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4EN,TIMER4 timer clock enable" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3EN,TIMER3 timer clock enable" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2EN,TIMER2 timer clock enable" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1EN,TIMER1 timer clock enable" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "APB2EN,APB2 clock enable register (RCU_APB2EN)"
|
|
bitfld.long 0x00 31. "RFEN,RF clock enable" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16EN,TIMER16 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15EN,TIMER15 clock enable" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGEN,SYSCFG clock enable" "0,1"
|
|
bitfld.long 0x00 12. "SPI0EN,SPI0 clock enable" "0,1"
|
|
bitfld.long 0x00 11. "SDIOEN,SDIO clock enable" "0,1"
|
|
bitfld.long 0x00 8. "ADC0EN,ADC0 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "USART2EN,USART2 clock enable" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0EN,TIMER0 clock enable" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "APB2EN,APB2 clock enable register (RCU_APB2EN)"
|
|
bitfld.long 0x00 31. "RFEN,RF clock enable" "0,1"
|
|
bitfld.long 0x00 30. "HPDFEN,HPDF clock enable" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16EN,TIMER16 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15EN,TIMER15 clock enable" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGEN,SYSCFG clock enable" "0,1"
|
|
bitfld.long 0x00 12. "SPI0EN,SPI0 clock enable" "0,1"
|
|
bitfld.long 0x00 11. "SDIOEN,SDIO clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ADC0EN,ADC0 clock enable" "0,1"
|
|
bitfld.long 0x00 4. "USART2EN,USART2 clock enable" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0EN,TIMER0 clock enable" "0,1"
|
|
endif
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "AHB1SPEN,AHB1 sleep mode enable register"
|
|
bitfld.long 0x00 29. "USBFSSPEN,USBFS clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 22. "DMA1SPEN,DMA1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 21. "DMA0SPEN,DMA0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 19. "SRAM3SPEN,SRAM3 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 18. "SRAM2SPEN,SRAM2 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 17. "SRAM1SPEN,SRAM1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 16. "SRAM0SPEN,SRAM0 clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "FMCSPEN,FMC clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 14. "WIFIRUNSPEN,WIFIRUN clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 13. "WIFISPEN,WIFI clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 12. "CRCSPEN,CRC clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 8. "TSISPEN,TSI clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 7. "TZPCUSPEN,TZPCU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 2. "PCSPEN,GPIO port C clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PBSPEN,GPIO port B clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "PASPEN,GPIO port A clock enable when sleep mode" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AHB2SPEN,AHB2 sleep mode enable register"
|
|
bitfld.long 0x00 6. "TRNGSPEN,TRNG clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 5. "HAUSPEN,HAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 4. "CAUSPEN,CAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUSPEN,PKCAU clock enable when sleep mode" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AHB2SPEN,AHB2 sleep mode enable register"
|
|
bitfld.long 0x00 6. "TRNGSPEN,TRNG clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 5. "HAUSPEN,HAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 4. "CAUSPEN,CAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUSPEN,PKCAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "DCISPEN,DCI clock enable when sleep mode" "0,1"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "AHB3SPEN,AHB3 Sleep mode enable register"
|
|
bitfld.long 0x00 1. "QSPISPEN,QSPI clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "SQPISPEN,SQPI clock enable when sleep mode" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "APB1SPEN,APB1 sleep mode clock enable register (RCU_APB1EN)"
|
|
bitfld.long 0x00 28. "PMUSPEN,Power control clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 22. "I2C1SPEN,I2C1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 21. "I2C0SPEN,I2C0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 18. "USART0SPEN,USART0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 17. "USART1SPEN,USART1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 14. "SPI1SPEN,SPI1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTSPEN,Window watchdog timer clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER5SPEN,TIMER5 timer clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4SPEN,TIMER4 timer clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3SPEN,TIMER3 timer clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2SPEN,TIMER2 timer clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1SPEN,TIMER1 timer clock enable when sleep mode" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "APB2SPEN,APB2 sleep mode enable register (RCU_APB2SPEN)"
|
|
bitfld.long 0x00 31. "RFSPEN,RF clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16SPEN,TIMER16 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15SPEN,TIMER15 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGSPEN,SYSCFG clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 12. "SPI0SPEN,SPI0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 11. "SDIOSPEN,SDIO clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 8. "ADC0SPEN,ADC0 clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "USART2SPEN,USART2 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0SPEN,TIMER0 clock enable when sleep mode" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "APB2SPEN,APB2 sleep mode enable register (RCU_APB2SPEN)"
|
|
bitfld.long 0x00 31. "RFSPEN,RF clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 30. "HPDFSPEN,HPDF clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16SPEN,TIMER16 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15SPEN,TIMER15 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGSPEN,SYSCFG clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 12. "SPI0SPEN,SPI0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 11. "SDIOSPEN,SDIO clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ADC0SPEN,ADC0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 4. "USART2SPEN,USART2 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0SPEN,TIMER0 clock enable when sleep mode" "0,1"
|
|
endif
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "BDCTL,Backup domain control register (RCU_BDCTL)"
|
|
bitfld.long 0x00 16. "BKPRST,Backup domain reset" "0,1"
|
|
bitfld.long 0x00 15. "RTCEN,RTC clock enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "RTCSRC,RTC clock entry selection" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. "LXTALDRI,LXTAL drive capability" "0,1,2,3"
|
|
bitfld.long 0x00 2. "LXTALBPS,LXTAL bypass mode enable" "0,1"
|
|
rbitfld.long 0x00 1. "LXTALSTB,External low-speed oscillator stabilization" "0,1"
|
|
bitfld.long 0x00 0. "LXTALEN,LXTAL enable" "0,1"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "RSTSCK,Reset source /clock register (RCU_RSTSCK)"
|
|
rbitfld.long 0x00 31. "LPRSTF,Low-power reset flag" "0,1"
|
|
rbitfld.long 0x00 30. "WWDGTRSTF,Window watchdog timer reset flag" "0,1"
|
|
rbitfld.long 0x00 29. "FWDGTRSTF,Free Watchdog timer reset flag" "0,1"
|
|
rbitfld.long 0x00 28. "SWRSTF,Software reset flag" "0,1"
|
|
rbitfld.long 0x00 27. "PORRSTF,Power reset flag" "0,1"
|
|
rbitfld.long 0x00 26. "EPRSTF,External PIN reset flag" "0,1"
|
|
rbitfld.long 0x00 25. "OBLRSTF,Option byte loader reset flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "RSTFC,Reset flag clear" "0,1"
|
|
rbitfld.long 0x00 1. "IRC32KSTB,IRC32K stabilization" "0,1"
|
|
bitfld.long 0x00 0. "IRC32KEN,IRC32K enable" "0,1"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "PLLSSCTL,PLL clock spread spectrum control register (RCU_PLLSSCTL)"
|
|
bitfld.long 0x00 31. "SSCGON,PLL spread spectrum modulation enable" "0,1"
|
|
bitfld.long 0x00 30. "SS_TYPE,PLL spread spectrum modulation type select" "0,1"
|
|
hexmask.long.word 0x00 13.--27. 1. "MODSTEP,configure PLL spread spectrum modulation profile amplitude and frequency"
|
|
hexmask.long.word 0x00 0.--12. 1. "MODCNT,configure PLL spread spectrum modulation profile amplitude and frequency"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PLLCFG,PLL clock configuration register"
|
|
bitfld.long 0x00 26.--31. "PLLDIGFSYSDIV,PLLDIG clock divider factor for system clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 24.--25. "PLLDIGOSEL,PLLDIG output frequency select" "0,1,2,3"
|
|
bitfld.long 0x00 16.--18. "PLLI2SPSC,The PLLI2S VCO source clock pre-scale" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 6.--12. 1. "PLLI2SN,The PLLI2S VCO clock multi factor"
|
|
bitfld.long 0x00 0.--5. "PLLI2SDIV,PLLI2S clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CFG1,Clock Configuration register 1"
|
|
bitfld.long 0x00 30.--31. "USART0SEL,USART0 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "USART2SEL,USART2 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "I2C0SEL,I2C0 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 24. "TIMERSEL,TIMER clock selection" "0,1"
|
|
bitfld.long 0x00 21. "LDO_ANA_LQB,Analog LDO current bias mode" "0,1"
|
|
bitfld.long 0x00 20. "LDO_CLK_LQB,Clock LDO current bias mode" "0,1"
|
|
bitfld.long 0x00 19. "BGPU,BandGap power on enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "LDOCLKPU,LDO clock power on enable for RF/ADC/DAC" "0,1"
|
|
bitfld.long 0x00 17. "LDOANAPU,LDO analog power on enable for RF filter" "0,1"
|
|
bitfld.long 0x00 16. "RFPLLPU,RFPLL power on enable" "0,1"
|
|
rbitfld.long 0x00 15. "RFPLLLOCK,RF PLL LOCK" "0,1"
|
|
bitfld.long 0x00 14. "RFPLLCALEN,RF PLL Calculation enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "BGVBIT,BandGap Power adjust" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--8. 1. "IRC16MDIV,IRC16M clock divider factor for system clock"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "ADDCTL,Additional clock control register"
|
|
bitfld.long 0x00 24.--29. "PLLFI2SDIV,The PLL divider factor for I2S clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "SDIOSEL_1,Bit 1 of SDIOSEL" "0,1"
|
|
bitfld.long 0x00 17.--22. "SDIODIV,SDIO clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16. "SDIOSEL_0,SDIO clock selection" "0,1"
|
|
bitfld.long 0x00 12.--13. "I2SSEL,I2S Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 1.--5. "USBFSDIV,USBFS clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0. "USBFSSEL,USBFS clock selection" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "ADDCTL,Additional clock control register"
|
|
bitfld.long 0x00 24.--29. "PLLFI2SDIV,The PLL divider factor for I2S clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "SDIOSEL_1,Bit 1 of SDIOSEL" "0,1"
|
|
bitfld.long 0x00 17.--22. "SDIODIV,SDIO clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16. "SDIOSEL_0,SDIO clock selection" "0,1"
|
|
bitfld.long 0x00 14.--15. "HPDFAUDIOSEL,HPDF AUDIO clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "I2SSEL,I2S Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 11. "HPDFSEL,HPDF clock Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1.--5. "USBFSDIV,USBFS clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0. "USBFSSEL,USBFS clock selection" "0,1"
|
|
endif
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "SECP_CFG,Secure protection configuration register"
|
|
bitfld.long 0x00 10. "BKPSECP,BKP security protection" "0,1"
|
|
bitfld.long 0x00 9. "RMVRSTFSECP,Remove reset flag security protection" "0,1"
|
|
bitfld.long 0x00 8. "PLLI2SSECP,PLLI2S configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 7. "PLLDIGSECP,PLLDIG configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 6. "PLLSECP,Main PLL configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 5. "PRESCSECP,AHBx/APBx prescaler configuration bits security protection" "0,1"
|
|
bitfld.long 0x00 4. "SYSCLKSECP,SYSCLK clock selection clock output on MCO configuration" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "LXTALSECP,LXTAL clock configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 2. "IRC40KSECP,IRC40K clock configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 1. "HXTALSECP,HXTAL clock configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 0. "IRC16MSECP,IRC16M clock configuration and status bits security protection" "0,1"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "SECP_STAT,Secure protection status register"
|
|
bitfld.long 0x00 10. "BKPSECPF,BKP security protection flag" "0,1"
|
|
bitfld.long 0x00 9. "RMVRSTFSECPF,Remove reset flag security protection flag" "0,1"
|
|
bitfld.long 0x00 8. "PLLI2SSECPF,PLLI2S configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 7. "PLLDIGSECPF,PLLDIG configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 6. "PLLSECPF,Main PLL configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 5. "PRESCSECPF,AHBx/APBx prescaler configuration bits security protection flag" "0,1"
|
|
bitfld.long 0x00 4. "SYSCLKSECPF,SYSCLK clock selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "LXTALSECPF,LXTAL clock configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 2. "IRC40KSECPF,IRC40K clock configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 1. "HXTALSECPF,HXTAL clock configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "IRC16MSECPF,IRC16M clock configuration and status bits security protection flag" "0,1"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "AHB1SECP_STAT,AHB1 secure protection status register"
|
|
bitfld.long 0x00 29. "USBFSSECF,USBFS security protection flag" "0,1"
|
|
bitfld.long 0x00 22. "DMA1SECF,DMA1 security protection flag" "0,1"
|
|
bitfld.long 0x00 21. "DMA0SECF,DMA0 security protection flag" "0,1"
|
|
bitfld.long 0x00 19. "SRAM3SECF,SRAM3 security protection flag" "0,1"
|
|
bitfld.long 0x00 18. "SRAM2SECF,SRAM2 security protection flag" "0,1"
|
|
bitfld.long 0x00 17. "SRAM1SECF,SRAM1 security protection flag" "0,1"
|
|
bitfld.long 0x00 16. "SRAM0SECF,SRAM0 security protection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "FMCSECF,FMC security protection flag" "0,1"
|
|
bitfld.long 0x00 13. "WIFISECF,WIFI security protection flag" "0,1"
|
|
bitfld.long 0x00 12. "CRCSECF,CRC security protection flag" "0,1"
|
|
bitfld.long 0x00 2. "PCSECF,GPIO port C security protection flag" "0,1"
|
|
bitfld.long 0x00 1. "PBSECF,GPIO port B security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "PASECF,GPIO port A security protection flag" "0,1"
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "AHB2SECP_STAT,AHB2 secure protection status register"
|
|
bitfld.long 0x00 6. "TRNGSECPF,TRNG security protection flag" "0,1"
|
|
bitfld.long 0x00 5. "HAUSECPF,HAU security protection flag" "0,1"
|
|
bitfld.long 0x00 4. "CAUSECPF,CAU security protection flag" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUSECPF,PKCAU security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "DCISECPF,DCI security protection flag" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "AHB2SECP_STAT,AHB2 secure protection status register"
|
|
bitfld.long 0x00 6. "TRNGSECPF,TRNG security protection flag" "0,1"
|
|
bitfld.long 0x00 5. "HAUSECPF,HAU security protection flag" "0,1"
|
|
bitfld.long 0x00 4. "CAUSECPF,CAU security protection flag" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUSECPF,PKCAU security protection flag" "0,1"
|
|
endif
|
|
rgroup.long 0xD0++0x03
|
|
line.long 0x00 "AHB3SECP_STAT,AHB3 secure protection status register"
|
|
bitfld.long 0x00 1. "QSPISECPF,QSPI security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "SQPISECPF,SQPI security protection flag" "0,1"
|
|
rgroup.long 0xD4++0x03
|
|
line.long 0x00 "APB1SECP_STAT,APB1 secure protection status register"
|
|
bitfld.long 0x00 28. "PMUSECPF,PMU security protection flag" "0,1"
|
|
bitfld.long 0x00 22. "I2C1SECPF,I2C1 security protection flag" "0,1"
|
|
bitfld.long 0x00 21. "I2C0SECPF,I2C0 security protection flag" "0,1"
|
|
bitfld.long 0x00 18. "USART0SECPF,USART0 security protection flag" "0,1"
|
|
bitfld.long 0x00 17. "USART1SECPF,USART1 security protection flag" "0,1"
|
|
bitfld.long 0x00 14. "SPI1SECPF,SPI1 security protection flag" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTSECPF,WWDGT security protection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER5SECPF,TIMER5 security protection flag" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4SECPF,TIMER4 security protection flag" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3SECPF,TIMER3 security protection flag" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2SECPF,TIMER2 security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1SECPF,TIMER1 security protection flag" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
rgroup.long 0xD8++0x03
|
|
line.long 0x00 "APB2SECP_STAT,APB2 secure protection status register"
|
|
bitfld.long 0x00 31. "RFSECPF,RF security protection flag" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16SECPF,TIMER16 security protection flag" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15SECPF,TIMER15 security protection flag" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGSECPF,SYSCFG security protection flag" "0,1"
|
|
bitfld.long 0x00 12. "SPI0SECPF,SPI0 security protection flag" "0,1"
|
|
bitfld.long 0x00 11. "SDIOSECPF,SDIO security protection flag" "0,1"
|
|
bitfld.long 0x00 8. "ADC0SECPF,ADC0 security protection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "USART2SECPF,USART2 security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0SECPF,TIMER0 security protection flag" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
rgroup.long 0xD8++0x03
|
|
line.long 0x00 "APB2SECP_STAT,APB2 secure protection status register"
|
|
bitfld.long 0x00 31. "RFSECPF,RF security protection flag" "0,1"
|
|
bitfld.long 0x00 30. "HPDFSECPF,HPDF security protection flag" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16SECPF,TIMER16 security protection flag" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15SECPF,TIMER15 security protection flag" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGSECPF,SYSCFG security protection flag" "0,1"
|
|
bitfld.long 0x00 12. "SPI0SECPF,SPI0 security protection flag" "0,1"
|
|
bitfld.long 0x00 11. "SDIOSECPF,SDIO security protection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ADC0SECPF,ADC0 security protection flag" "0,1"
|
|
bitfld.long 0x00 4. "USART2SECPF,USART2 security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0SECPF,TIMER0 security protection flag" "0,1"
|
|
endif
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VKEY,Voltage key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,The key of RCU_DSV register"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "DSV,Deep-sleep mode voltage register"
|
|
bitfld.long 0x00 0.--1. "DSLPVS,Deep-sleep mode voltage select" "0,1,2,3"
|
|
tree.end
|
|
tree "SEC_RCU"
|
|
base ad:0x50023800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 31. "HXTALREADY,High Speed crystal oscillator ready" "0,1"
|
|
bitfld.long 0x00 30. "HXTALENPLL,High Speed crystal oscillator enable for system CK_PLLP" "0,1"
|
|
bitfld.long 0x00 29. "HXTALENI2S,High Speed crystal oscillator enable for PLLI2S" "0,1"
|
|
bitfld.long 0x00 28. "HXTALPU,High Speed crystal oscillator (HXTAL) Power Up" "0,1"
|
|
rbitfld.long 0x00 27. "PLLI2SSTB,PLLI2S clock stabilization flag" "0,1"
|
|
bitfld.long 0x00 26. "PLLI2SEN,PLLI2S enable" "0,1"
|
|
rbitfld.long 0x00 25. "PLLSTB,PLL clock stabilization flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "PLLEN,PLL enable" "0,1"
|
|
rbitfld.long 0x00 23. "PLLDIGSTB,PLLDIG Clock Stabilization Flag" "0,1"
|
|
bitfld.long 0x00 22. "RFCKMEN,HXTAL Clock Monitor Enable" "0,1"
|
|
bitfld.long 0x00 21. "PLLDIGEN,PLLDIG enable" "0,1"
|
|
bitfld.long 0x00 20. "PLLDIGPU,PLL power up" "0,1"
|
|
bitfld.long 0x00 19. "CKMEN,HXTAL clock monitor enable" "0,1"
|
|
bitfld.long 0x00 18. "HXTALBPS,High speed crystal oscillator (HXTAL) clock bypass mode enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 17. "HXTALSTB,High speed crystal oscillator (HXTAL) clock stabilization flag" "0,1"
|
|
bitfld.long 0x00 16. "HXTALEN,High Speed crystal oscillator (HXTAL) enable" "0,1"
|
|
hexmask.long.byte 0x00 8.--15. 1. "IRC16MCALIB,Internal 16MHz RC Oscillator calibration value register"
|
|
bitfld.long 0x00 3.--7. "IRC16MADJ,Internal 16MHz RC Oscillator clock trim adjust value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2. "RCUPRIP,RCU privilege protection" "0,1"
|
|
rbitfld.long 0x00 1. "IRC16MSTB,IRC16M Internal 16MHz RC Oscillator stabilization flag" "0,1"
|
|
bitfld.long 0x00 0. "IRC16MEN,Internal 16MHz RC oscillator enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PLL,PLL register (RCU_PLL)"
|
|
bitfld.long 0x00 16.--17. "PLLP,The PLLP output frequency division factor from PLL VCO clock" "0,1,2,3"
|
|
bitfld.long 0x00 15. "PLLSEL,PLL Clock Source Selection" "0,1"
|
|
hexmask.long.word 0x00 6.--14. 1. "PLLN,The PLL VCO clock multi factor"
|
|
bitfld.long 0x00 0.--5. "PLLPSC,The PLL VCO source clock prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CFG0,Clock configuration register 0 (RCU_CFG0)"
|
|
bitfld.long 0x00 30.--31. "CKOUT1SEL,CKOUT1 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 27.--29. "CKOUT1DIV,The CK_OUT1 divider which the CK_OUT1 frequency can be reduced" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. "CKOUT0DIV,The CK_OUT0 divider which the CK_OUT0 frequency can be reduced" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 21.--22. "CKOUT0SEL,CKOUT0 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 16.--20. "RTCDIV,RTC clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 13.--15. "APB2PSC,APB2 prescaler selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--12. "APB1PSC,APB1 prescaler selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "AHBPSC,AHB prescaler selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 2.--3. "SCSS,System clock switch status" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "SCS,System clock switch" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "INT,Clock interrupt register (RCU_INT)"
|
|
bitfld.long 0x00 23. "CKMIC,HXTAL Clock Stuck Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 22. "PLLDIGSTBIC,PLLDIG stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 21. "PLLI2SSTBIC,PLLI2S stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 20. "PLLSTBIC,PLL stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 19. "HXTALSTBIC,HXTAL Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 18. "IRC16MSTBIC,IRC16M Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 17. "LXTALSTBIC,LXTAL Stabilization Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "IRC32KSTBIC,IRC32K Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 14. "PLLDIGSTBIE,PLLDIG Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. "PLLI2SSTBIE,PLLI2S Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "PLLSTBIE,PLL Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. "HXTALSTBIE,HXTAL Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "IRC16MSTBIE,IRC16M Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "LXTALSTBIE,LXTAL Stabilization Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "IRC32KSTBIE,IRC32K Stabilization interrupt enable" "0,1"
|
|
rbitfld.long 0x00 7. "CKMIF,HXTAL Clock Stuck Interrupt Flag" "0,1"
|
|
rbitfld.long 0x00 6. "PLLDIGSTBIF,PLLDIG stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 5. "PLLI2SSTBIF,PLLI2S stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 4. "PLLSTBIF,PLL stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 3. "HXTALSTBIF,HXTAL stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 2. "IRC16MSTBIF,IRC16M stabilization interrupt flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 1. "LXTALSTBIF,LXTAL stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 0. "IRC32KSTBIF,IRC32K stabilization interrupt flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "AHB1RST,AHB1 reset register"
|
|
bitfld.long 0x00 29. "USBFSRST,USBFS reset" "0,1"
|
|
bitfld.long 0x00 22. "DMA1RST,DMA1 reset" "0,1"
|
|
bitfld.long 0x00 21. "DMA0RST,DMA0 reset" "0,1"
|
|
bitfld.long 0x00 13. "WIFIRST,WIFI reset" "0,1"
|
|
bitfld.long 0x00 12. "CRCRST,CRC reset" "0,1"
|
|
bitfld.long 0x00 8. "TSIRST,TSI reset" "0,1"
|
|
bitfld.long 0x00 7. "TZPCURST,TZPCU reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCRST,GPIO port C reset" "0,1"
|
|
bitfld.long 0x00 1. "PBRST,GPIO port B reset" "0,1"
|
|
bitfld.long 0x00 0. "PARST,GPIO port A reset" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "AHB2RST,AHB2 reset register"
|
|
bitfld.long 0x00 6. "TRNGRST,TRNG reset" "0,1"
|
|
bitfld.long 0x00 5. "HAURST,HAU reset" "0,1"
|
|
bitfld.long 0x00 4. "CAURST,CAU reset" "0,1"
|
|
bitfld.long 0x00 3. "PKCAURST,PKCAU reset" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "AHB2RST,AHB2 reset register"
|
|
bitfld.long 0x00 6. "TRNGRST,TRNG reset" "0,1"
|
|
bitfld.long 0x00 5. "HAURST,HAU reset" "0,1"
|
|
bitfld.long 0x00 4. "CAURST,CAU reset" "0,1"
|
|
bitfld.long 0x00 3. "PKCAURST,PKCAU reset" "0,1"
|
|
bitfld.long 0x00 0. "DCIRST,DCI reset" "0,1"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "AHB3RST,AHB3 reset register"
|
|
bitfld.long 0x00 1. "QSPIRST,QSPI reset" "0,1"
|
|
bitfld.long 0x00 0. "SQPIRST,SQPI reset" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "APB1RST,APB1 reset register (RCU_APB1RST)"
|
|
bitfld.long 0x00 28. "PMURST,Power control reset" "0,1"
|
|
bitfld.long 0x00 22. "I2C1RST,I2C1 reset" "0,1"
|
|
bitfld.long 0x00 21. "I2C0RST,I2C0 reset" "0,1"
|
|
bitfld.long 0x00 18. "USART0RST,USART0 reset" "0,1"
|
|
bitfld.long 0x00 17. "USART1RST,USART1 reset" "0,1"
|
|
bitfld.long 0x00 14. "SPI1RST,SPI1 reset" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTRST,Window watchdog timer reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER5RST,TIMER5 timer reset" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4RST,TIMER4 timer reset" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3RST,TIMER3 timer reset" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2RST,TIMER2 timer reset" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1RST,TIMER1 timer reset" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "APB2RST,APB2 reset register (RCU_APB2RST)"
|
|
bitfld.long 0x00 31. "RFRST,RF reset" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16RST,TIMER16 reset" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15RST,TIMER15 reset" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGRST,SYSCFG Reset" "0,1"
|
|
bitfld.long 0x00 12. "SPI0RST,SPI0 Reset" "0,1"
|
|
bitfld.long 0x00 11. "SDIORST,SDIO reset" "0,1"
|
|
bitfld.long 0x00 8. "ADCRST,ADC reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "USART2RST,USART2 reset" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0RST,TIMER0 reset" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "APB2RST,APB2 reset register (RCU_APB2RST)"
|
|
bitfld.long 0x00 31. "RFRST,RF reset" "0,1"
|
|
bitfld.long 0x00 30. "HPDFRST,HPDF reset" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16RST,TIMER16 reset" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15RST,TIMER15 reset" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGRST,SYSCFG Reset" "0,1"
|
|
bitfld.long 0x00 12. "SPI0RST,SPI0 Reset" "0,1"
|
|
bitfld.long 0x00 11. "SDIORST,SDIO reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ADCRST,ADC reset" "0,1"
|
|
bitfld.long 0x00 4. "USART2RST,USART2 reset" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0RST,TIMER0 reset" "0,1"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "AHB1EN,AHB1 enable register"
|
|
bitfld.long 0x00 29. "USBFSEN,USBFS clock enable" "0,1"
|
|
bitfld.long 0x00 22. "DMA1EN,DMA1 clock enable" "0,1"
|
|
bitfld.long 0x00 21. "DMA0EN,DMA0 clock enable" "0,1"
|
|
bitfld.long 0x00 19. "SRAM3EN,SRAM3 clock enable" "0,1"
|
|
bitfld.long 0x00 18. "SRAM2EN,SRAM2 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "SRAM1EN,SRAM1 clock enable" "0,1"
|
|
bitfld.long 0x00 16. "SRAM0EN,SRAM0 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "WIFIRUNEN,WIFIRUNEN clock enable" "0,1"
|
|
bitfld.long 0x00 13. "WIFIEN,WIFI Module clock enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCEN,CRC clock enable" "0,1"
|
|
bitfld.long 0x00 8. "TSIEN,TSI clock enable" "0,1"
|
|
bitfld.long 0x00 7. "TZPCUEN,TZPCU clock enable" "0,1"
|
|
bitfld.long 0x00 2. "PCEN,GPIO port C clock enable" "0,1"
|
|
bitfld.long 0x00 1. "PBEN,GPIO port B clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PAEN,GPIO port A clock enable" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "AHB2EN,AHB2 enable register"
|
|
bitfld.long 0x00 6. "TRNGEN,TRNG clock enable" "0,1"
|
|
bitfld.long 0x00 5. "HAUEN,HAU clock enable" "0,1"
|
|
bitfld.long 0x00 4. "CAUEN,CAU clock enable" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUEN,PKCAU clock enable" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "AHB2EN,AHB2 enable register"
|
|
bitfld.long 0x00 6. "TRNGEN,TRNG clock enable" "0,1"
|
|
bitfld.long 0x00 5. "HAUEN,HAU clock enable" "0,1"
|
|
bitfld.long 0x00 4. "CAUEN,CAU clock enable" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUEN,PKCAU clock enable" "0,1"
|
|
bitfld.long 0x00 0. "DCIEN,DCI clock enable" "0,1"
|
|
endif
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "AHB3EN,AHB3 clock enable register"
|
|
bitfld.long 0x00 1. "QSPIEN,QSPI clock enable" "0,1"
|
|
bitfld.long 0x00 0. "SQPIEN,SQPI clock enable" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "APB1EN,APB1 clock enable register (RCU_APB1EN)"
|
|
bitfld.long 0x00 28. "PMUEN,Power control clock enable" "0,1"
|
|
bitfld.long 0x00 22. "I2C1EN,I2C1 clock enable" "0,1"
|
|
bitfld.long 0x00 21. "I2C0EN,I2C0 clock enable" "0,1"
|
|
bitfld.long 0x00 18. "USART0EN,USART0 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "USART1EN,USART1 clock enable" "0,1"
|
|
bitfld.long 0x00 14. "SPI1EN,SPI1 clock enable" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTEN,Window watchdog timer clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER5EN,TIMER5 timer clock enable" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4EN,TIMER4 timer clock enable" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3EN,TIMER3 timer clock enable" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2EN,TIMER2 timer clock enable" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1EN,TIMER1 timer clock enable" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "APB2EN,APB2 clock enable register (RCU_APB2EN)"
|
|
bitfld.long 0x00 31. "RFEN,RF clock enable" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16EN,TIMER16 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15EN,TIMER15 clock enable" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGEN,SYSCFG clock enable" "0,1"
|
|
bitfld.long 0x00 12. "SPI0EN,SPI0 clock enable" "0,1"
|
|
bitfld.long 0x00 11. "SDIOEN,SDIO clock enable" "0,1"
|
|
bitfld.long 0x00 8. "ADC0EN,ADC0 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "USART2EN,USART2 clock enable" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0EN,TIMER0 clock enable" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "APB2EN,APB2 clock enable register (RCU_APB2EN)"
|
|
bitfld.long 0x00 31. "RFEN,RF clock enable" "0,1"
|
|
bitfld.long 0x00 30. "HPDFEN,HPDF clock enable" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16EN,TIMER16 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15EN,TIMER15 clock enable" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGEN,SYSCFG clock enable" "0,1"
|
|
bitfld.long 0x00 12. "SPI0EN,SPI0 clock enable" "0,1"
|
|
bitfld.long 0x00 11. "SDIOEN,SDIO clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ADC0EN,ADC0 clock enable" "0,1"
|
|
bitfld.long 0x00 4. "USART2EN,USART2 clock enable" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0EN,TIMER0 clock enable" "0,1"
|
|
endif
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "AHB1SPEN,AHB1 sleep mode enable register"
|
|
bitfld.long 0x00 29. "USBFSSPEN,USBFS clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 22. "DMA1SPEN,DMA1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 21. "DMA0SPEN,DMA0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 19. "SRAM3SPEN,SRAM3 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 18. "SRAM2SPEN,SRAM2 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 17. "SRAM1SPEN,SRAM1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 16. "SRAM0SPEN,SRAM0 clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "FMCSPEN,FMC clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 14. "WIFIRUNSPEN,WIFIRUN clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 13. "WIFISPEN,WIFI clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 12. "CRCSPEN,CRC clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 8. "TSISPEN,TSI clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 7. "TZPCUSPEN,TZPCU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 2. "PCSPEN,GPIO port C clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PBSPEN,GPIO port B clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "PASPEN,GPIO port A clock enable when sleep mode" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AHB2SPEN,AHB2 sleep mode enable register"
|
|
bitfld.long 0x00 6. "TRNGSPEN,TRNG clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 5. "HAUSPEN,HAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 4. "CAUSPEN,CAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUSPEN,PKCAU clock enable when sleep mode" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AHB2SPEN,AHB2 sleep mode enable register"
|
|
bitfld.long 0x00 6. "TRNGSPEN,TRNG clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 5. "HAUSPEN,HAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 4. "CAUSPEN,CAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUSPEN,PKCAU clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "DCISPEN,DCI clock enable when sleep mode" "0,1"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "AHB3SPEN,AHB3 Sleep mode enable register"
|
|
bitfld.long 0x00 1. "QSPISPEN,QSPI clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "SQPISPEN,SQPI clock enable when sleep mode" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "APB1SPEN,APB1 sleep mode clock enable register (RCU_APB1EN)"
|
|
bitfld.long 0x00 28. "PMUSPEN,Power control clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 22. "I2C1SPEN,I2C1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 21. "I2C0SPEN,I2C0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 18. "USART0SPEN,USART0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 17. "USART1SPEN,USART1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 14. "SPI1SPEN,SPI1 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTSPEN,Window watchdog timer clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER5SPEN,TIMER5 timer clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4SPEN,TIMER4 timer clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3SPEN,TIMER3 timer clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2SPEN,TIMER2 timer clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1SPEN,TIMER1 timer clock enable when sleep mode" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "APB2SPEN,APB2 sleep mode enable register (RCU_APB2SPEN)"
|
|
bitfld.long 0x00 31. "RFSPEN,RF clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16SPEN,TIMER16 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15SPEN,TIMER15 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGSPEN,SYSCFG clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 12. "SPI0SPEN,SPI0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 11. "SDIOSPEN,SDIO clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 8. "ADC0SPEN,ADC0 clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "USART2SPEN,USART2 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0SPEN,TIMER0 clock enable when sleep mode" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "APB2SPEN,APB2 sleep mode enable register (RCU_APB2SPEN)"
|
|
bitfld.long 0x00 31. "RFSPEN,RF clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 30. "HPDFSPEN,HPDF clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16SPEN,TIMER16 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15SPEN,TIMER15 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGSPEN,SYSCFG clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 12. "SPI0SPEN,SPI0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 11. "SDIOSPEN,SDIO clock enable when sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ADC0SPEN,ADC0 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 4. "USART2SPEN,USART2 clock enable when sleep mode" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0SPEN,TIMER0 clock enable when sleep mode" "0,1"
|
|
endif
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "BDCTL,Backup domain control register (RCU_BDCTL)"
|
|
bitfld.long 0x00 16. "BKPRST,Backup domain reset" "0,1"
|
|
bitfld.long 0x00 15. "RTCEN,RTC clock enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "RTCSRC,RTC clock entry selection" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. "LXTALDRI,LXTAL drive capability" "0,1,2,3"
|
|
bitfld.long 0x00 2. "LXTALBPS,LXTAL bypass mode enable" "0,1"
|
|
rbitfld.long 0x00 1. "LXTALSTB,External low-speed oscillator stabilization" "0,1"
|
|
bitfld.long 0x00 0. "LXTALEN,LXTAL enable" "0,1"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "RSTSCK,Reset source /clock register (RCU_RSTSCK)"
|
|
rbitfld.long 0x00 31. "LPRSTF,Low-power reset flag" "0,1"
|
|
rbitfld.long 0x00 30. "WWDGTRSTF,Window watchdog timer reset flag" "0,1"
|
|
rbitfld.long 0x00 29. "FWDGTRSTF,Free Watchdog timer reset flag" "0,1"
|
|
rbitfld.long 0x00 28. "SWRSTF,Software reset flag" "0,1"
|
|
rbitfld.long 0x00 27. "PORRSTF,Power reset flag" "0,1"
|
|
rbitfld.long 0x00 26. "EPRSTF,External PIN reset flag" "0,1"
|
|
rbitfld.long 0x00 25. "OBLRSTF,Option byte loader reset flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "RSTFC,Reset flag clear" "0,1"
|
|
rbitfld.long 0x00 1. "IRC32KSTB,IRC32K stabilization" "0,1"
|
|
bitfld.long 0x00 0. "IRC32KEN,IRC32K enable" "0,1"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "PLLSSCTL,PLL clock spread spectrum control register (RCU_PLLSSCTL)"
|
|
bitfld.long 0x00 31. "SSCGON,PLL spread spectrum modulation enable" "0,1"
|
|
bitfld.long 0x00 30. "SS_TYPE,PLL spread spectrum modulation type select" "0,1"
|
|
hexmask.long.word 0x00 13.--27. 1. "MODSTEP,configure PLL spread spectrum modulation profile amplitude and frequency"
|
|
hexmask.long.word 0x00 0.--12. 1. "MODCNT,configure PLL spread spectrum modulation profile amplitude and frequency"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PLLCFG,PLL clock configuration register"
|
|
bitfld.long 0x00 26.--31. "PLLDIGFSYSDIV,PLLDIG clock divider factor for system clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 24.--25. "PLLDIGOSEL,PLLDIG output frequency select" "0,1,2,3"
|
|
bitfld.long 0x00 16.--18. "PLLI2SPSC,The PLLI2S VCO source clock pre-scale" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 6.--12. 1. "PLLI2SN,The PLLI2S VCO clock multi factor"
|
|
bitfld.long 0x00 0.--5. "PLLI2SDIV,PLLI2S clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CFG1,Clock Configuration register 1"
|
|
bitfld.long 0x00 30.--31. "USART0SEL,USART0 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "USART2SEL,USART2 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "I2C0SEL,I2C0 Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 24. "TIMERSEL,TIMER clock selection" "0,1"
|
|
bitfld.long 0x00 21. "LDO_ANA_LQB,Analog LDO current bias mode" "0,1"
|
|
bitfld.long 0x00 20. "LDO_CLK_LQB,Clock LDO current bias mode" "0,1"
|
|
bitfld.long 0x00 19. "BGPU,BandGap power on enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "LDOCLKPU,LDO clock power on enable for RF/ADC/DAC" "0,1"
|
|
bitfld.long 0x00 17. "LDOANAPU,LDO analog power on enable for RF filter" "0,1"
|
|
bitfld.long 0x00 16. "RFPLLPU,RFPLL power on enable" "0,1"
|
|
rbitfld.long 0x00 15. "RFPLLLOCK,RF PLL LOCK" "0,1"
|
|
bitfld.long 0x00 14. "RFPLLCALEN,RF PLL Calculation enable" "0,1"
|
|
bitfld.long 0x00 9.--11. "BGVBIT,BandGap Power adjust" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--8. 1. "IRC16MDIV,IRC16M clock divider factor for system clock"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "ADDCTL,Additional clock control register"
|
|
bitfld.long 0x00 24.--29. "PLLFI2SDIV,The PLL divider factor for I2S clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "SDIOSEL_1,Bit 1 of SDIOSEL" "0,1"
|
|
bitfld.long 0x00 17.--22. "SDIODIV,SDIO clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16. "SDIOSEL_0,SDIO clock selection" "0,1"
|
|
bitfld.long 0x00 12.--13. "I2SSEL,I2S Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 1.--5. "USBFSDIV,USBFS clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0. "USBFSSEL,USBFS clock selection" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "ADDCTL,Additional clock control register"
|
|
bitfld.long 0x00 24.--29. "PLLFI2SDIV,The PLL divider factor for I2S clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 23. "SDIOSEL_1,Bit 1 of SDIOSEL" "0,1"
|
|
bitfld.long 0x00 17.--22. "SDIODIV,SDIO clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16. "SDIOSEL_0,SDIO clock selection" "0,1"
|
|
bitfld.long 0x00 14.--15. "HPDFAUDIOSEL,HPDF AUDIO clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "I2SSEL,I2S Clock Source Selection" "0,1,2,3"
|
|
bitfld.long 0x00 11. "HPDFSEL,HPDF clock Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1.--5. "USBFSDIV,USBFS clock divider factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0. "USBFSSEL,USBFS clock selection" "0,1"
|
|
endif
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "SECP_CFG,Secure protection configuration register"
|
|
bitfld.long 0x00 10. "BKPSECP,BKP security protection" "0,1"
|
|
bitfld.long 0x00 9. "RMVRSTFSECP,Remove reset flag security protection" "0,1"
|
|
bitfld.long 0x00 8. "PLLI2SSECP,PLLI2S configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 7. "PLLDIGSECP,PLLDIG configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 6. "PLLSECP,Main PLL configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 5. "PRESCSECP,AHBx/APBx prescaler configuration bits security protection" "0,1"
|
|
bitfld.long 0x00 4. "SYSCLKSECP,SYSCLK clock selection clock output on MCO configuration" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "LXTALSECP,LXTAL clock configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 2. "IRC40KSECP,IRC40K clock configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 1. "HXTALSECP,HXTAL clock configuration and status bits security protection" "0,1"
|
|
bitfld.long 0x00 0. "IRC16MSECP,IRC16M clock configuration and status bits security protection" "0,1"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "SECP_STAT,Secure protection status register"
|
|
bitfld.long 0x00 10. "BKPSECPF,BKP security protection flag" "0,1"
|
|
bitfld.long 0x00 9. "RMVRSTFSECPF,Remove reset flag security protection flag" "0,1"
|
|
bitfld.long 0x00 8. "PLLI2SSECPF,PLLI2S configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 7. "PLLDIGSECPF,PLLDIG configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 6. "PLLSECPF,Main PLL configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 5. "PRESCSECPF,AHBx/APBx prescaler configuration bits security protection flag" "0,1"
|
|
bitfld.long 0x00 4. "SYSCLKSECPF,SYSCLK clock selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "LXTALSECPF,LXTAL clock configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 2. "IRC40KSECPF,IRC40K clock configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 1. "HXTALSECPF,HXTAL clock configuration and status bits security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "IRC16MSECPF,IRC16M clock configuration and status bits security protection flag" "0,1"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "AHB1SECP_STAT,AHB1 secure protection status register"
|
|
bitfld.long 0x00 29. "USBFSSECF,USBFS security protection flag" "0,1"
|
|
bitfld.long 0x00 22. "DMA1SECF,DMA1 security protection flag" "0,1"
|
|
bitfld.long 0x00 21. "DMA0SECF,DMA0 security protection flag" "0,1"
|
|
bitfld.long 0x00 19. "SRAM3SECF,SRAM3 security protection flag" "0,1"
|
|
bitfld.long 0x00 18. "SRAM2SECF,SRAM2 security protection flag" "0,1"
|
|
bitfld.long 0x00 17. "SRAM1SECF,SRAM1 security protection flag" "0,1"
|
|
bitfld.long 0x00 16. "SRAM0SECF,SRAM0 security protection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "FMCSECF,FMC security protection flag" "0,1"
|
|
bitfld.long 0x00 13. "WIFISECF,WIFI security protection flag" "0,1"
|
|
bitfld.long 0x00 12. "CRCSECF,CRC security protection flag" "0,1"
|
|
bitfld.long 0x00 2. "PCSECF,GPIO port C security protection flag" "0,1"
|
|
bitfld.long 0x00 1. "PBSECF,GPIO port B security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "PASECF,GPIO port A security protection flag" "0,1"
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "AHB2SECP_STAT,AHB2 secure protection status register"
|
|
bitfld.long 0x00 6. "TRNGSECPF,TRNG security protection flag" "0,1"
|
|
bitfld.long 0x00 5. "HAUSECPF,HAU security protection flag" "0,1"
|
|
bitfld.long 0x00 4. "CAUSECPF,CAU security protection flag" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUSECPF,PKCAU security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "DCISECPF,DCI security protection flag" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "AHB2SECP_STAT,AHB2 secure protection status register"
|
|
bitfld.long 0x00 6. "TRNGSECPF,TRNG security protection flag" "0,1"
|
|
bitfld.long 0x00 5. "HAUSECPF,HAU security protection flag" "0,1"
|
|
bitfld.long 0x00 4. "CAUSECPF,CAU security protection flag" "0,1"
|
|
bitfld.long 0x00 3. "PKCAUSECPF,PKCAU security protection flag" "0,1"
|
|
endif
|
|
rgroup.long 0xD0++0x03
|
|
line.long 0x00 "AHB3SECP_STAT,AHB3 secure protection status register"
|
|
bitfld.long 0x00 1. "QSPISECPF,QSPI security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "SQPISECPF,SQPI security protection flag" "0,1"
|
|
rgroup.long 0xD4++0x03
|
|
line.long 0x00 "APB1SECP_STAT,APB1 secure protection status register"
|
|
bitfld.long 0x00 28. "PMUSECPF,PMU security protection flag" "0,1"
|
|
bitfld.long 0x00 22. "I2C1SECPF,I2C1 security protection flag" "0,1"
|
|
bitfld.long 0x00 21. "I2C0SECPF,I2C0 security protection flag" "0,1"
|
|
bitfld.long 0x00 18. "USART0SECPF,USART0 security protection flag" "0,1"
|
|
bitfld.long 0x00 17. "USART1SECPF,USART1 security protection flag" "0,1"
|
|
bitfld.long 0x00 14. "SPI1SECPF,SPI1 security protection flag" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTSECPF,WWDGT security protection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER5SECPF,TIMER5 security protection flag" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4SECPF,TIMER4 security protection flag" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3SECPF,TIMER3 security protection flag" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2SECPF,TIMER2 security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1SECPF,TIMER1 security protection flag" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
rgroup.long 0xD8++0x03
|
|
line.long 0x00 "APB2SECP_STAT,APB2 secure protection status register"
|
|
bitfld.long 0x00 31. "RFSECPF,RF security protection flag" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16SECPF,TIMER16 security protection flag" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15SECPF,TIMER15 security protection flag" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGSECPF,SYSCFG security protection flag" "0,1"
|
|
bitfld.long 0x00 12. "SPI0SECPF,SPI0 security protection flag" "0,1"
|
|
bitfld.long 0x00 11. "SDIOSECPF,SDIO security protection flag" "0,1"
|
|
bitfld.long 0x00 8. "ADC0SECPF,ADC0 security protection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "USART2SECPF,USART2 security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0SECPF,TIMER0 security protection flag" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
rgroup.long 0xD8++0x03
|
|
line.long 0x00 "APB2SECP_STAT,APB2 secure protection status register"
|
|
bitfld.long 0x00 31. "RFSECPF,RF security protection flag" "0,1"
|
|
bitfld.long 0x00 30. "HPDFSECPF,HPDF security protection flag" "0,1"
|
|
bitfld.long 0x00 18. "TIMER16SECPF,TIMER16 security protection flag" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15SECPF,TIMER15 security protection flag" "0,1"
|
|
bitfld.long 0x00 14. "SYSCFGSECPF,SYSCFG security protection flag" "0,1"
|
|
bitfld.long 0x00 12. "SPI0SECPF,SPI0 security protection flag" "0,1"
|
|
bitfld.long 0x00 11. "SDIOSECPF,SDIO security protection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ADC0SECPF,ADC0 security protection flag" "0,1"
|
|
bitfld.long 0x00 4. "USART2SECPF,USART2 security protection flag" "0,1"
|
|
bitfld.long 0x00 0. "TIMER0SECPF,TIMER0 security protection flag" "0,1"
|
|
endif
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VKEY,Voltage key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,The key of RCU_DSV register"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "DSV,Deep-sleep mode voltage register"
|
|
bitfld.long 0x00 0.--1. "DSLPVS,Deep-sleep mode voltage select" "0,1,2,3"
|
|
tree.end
|
|
tree.end
|
|
tree "RTC (Real-time Counter)"
|
|
tree "RTC"
|
|
base ad:0x40002800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TIME,time register"
|
|
bitfld.long 0x00 22. "PM,AM/PM notation" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DATE,date register"
|
|
bitfld.long 0x00 20.--23. "YRT,Year tens in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "YRU,Year units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 13.--15. "DOW,Days of the week" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. "MONT,Month tens in BCD code" "0,1"
|
|
bitfld.long 0x00 8.--11. "MONU,Month units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. "DAYT,Date tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "DAYU,Date units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
bitfld.long 0x00 31. "OUT2EN,RTC_OUT pin select" "0,1"
|
|
bitfld.long 0x00 23. "COEN,Calibration output enable" "0,1"
|
|
bitfld.long 0x00 21.--22. "OS,Output selection" "0,1,2,3"
|
|
bitfld.long 0x00 20. "OPOL,Output polarity" "0,1"
|
|
bitfld.long 0x00 19. "COS,Calibration output selection" "0,1"
|
|
bitfld.long 0x00 18. "DSM,Daylight saving mark" "0,1"
|
|
bitfld.long 0x00 17. "S1H,Subtract 1 hour (winter time change)" "0,1"
|
|
bitfld.long 0x00 16. "A1H,Add 1 hour (summer time change)" "0,1"
|
|
bitfld.long 0x00 15. "TSIE,Time-stamp interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "WTIE,Auto-wakeup timer interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "ALRM1IE,RTC alarm-1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 12. "ALRM0IE,RTC alarm-0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 11. "TSEN,Time-stamp function enable" "0,1"
|
|
bitfld.long 0x00 10. "WTEN,Auto-wakeup timer function enable" "0,1"
|
|
bitfld.long 0x00 9. "ALRM1EN,Alarm-1 function enable" "0,1"
|
|
bitfld.long 0x00 8. "ALRM0EN,Alarm-0 function enable" "0,1"
|
|
bitfld.long 0x00 7. "CCEN,Coarse calibration function enable" "0,1"
|
|
bitfld.long 0x00 6. "CS,Clock System" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "BPSHAD,Shadow registers bypass control" "0,1"
|
|
bitfld.long 0x00 4. "REFEN,Reference clock detection function enable enable (50 or 60 Hz)" "0,1"
|
|
bitfld.long 0x00 3. "TSEG,Valid event edge of time-stamp" "0,1"
|
|
bitfld.long 0x00 0.--2. "WTCS,Auto-wakeup timer clock selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ICS,Initialization control and status register"
|
|
rbitfld.long 0x00 16. "SCPF,Smooth calibration pending flag" "0,1"
|
|
bitfld.long 0x00 7. "INITM,Enter initialization mode" "0,1"
|
|
rbitfld.long 0x00 6. "INITF,Initialization state flag" "0,1"
|
|
bitfld.long 0x00 5. "RSYNF,Register synchronization flag" "0,1"
|
|
rbitfld.long 0x00 4. "YCM,Year configuration mark" "0,1"
|
|
bitfld.long 0x00 3. "SOPF,Shift function operation pending flag" "0,1"
|
|
rbitfld.long 0x00 2. "WTWF,Wakeup timer write enable flag" "0,1"
|
|
rbitfld.long 0x00 1. "ALRM1WF,Alarm 1 configuration can be write flag" "0,1"
|
|
rbitfld.long 0x00 0. "ALRM0WF,Alarm 0 configuration can be write flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PSC,prescaler register"
|
|
hexmask.long.byte 0x00 16.--22. 1. "FACTOR_A,Asynchronous prescaler factor"
|
|
hexmask.long.word 0x00 0.--14. 1. "FACTOR_S,Synchronous prescaler factor"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "WUT,Wakeup timer register"
|
|
hexmask.long.word 0x00 0.--15. 1. "WTRV,Auto-wakeup timer reloads value"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "COSC,Coarse calibration register"
|
|
bitfld.long 0x00 7. "COSD,Coarse Calibration direction" "0,1"
|
|
bitfld.long 0x00 0.--4. "COSS,Coarse Calibration step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ALRM0TD,Alarm 0 time and date register"
|
|
bitfld.long 0x00 31. "MSKD,Alarm date mask bit" "0,1"
|
|
bitfld.long 0x00 30. "DOWS,Day of the week selected" "0,1"
|
|
bitfld.long 0x00 28.--29. "DAYT,Date tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. "DAYU,Date units or week day in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. "MSKH,Alarm hours mask bit" "0,1"
|
|
bitfld.long 0x00 22. "PM,AM/PM flag" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. "MSKM,Alarm minutes mask bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSKS,Alarm seconds mask bit" "0,1"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "ALRM1TD,Alarm 1 time and date register"
|
|
bitfld.long 0x00 31. "MSKD,Alarm date mask bit" "0,1"
|
|
bitfld.long 0x00 30. "DOWS,Day of the week selected" "0,1"
|
|
bitfld.long 0x00 28.--29. "DAYT,Date tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. "DAYU,Date units or week day in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. "MSKH,Alarm hours mask bit" "0,1"
|
|
bitfld.long 0x00 22. "PM,AM/PM flag" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. "MSKM,Alarm minutes mask bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSKS,Alarm seconds mask bit" "0,1"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "WPK,write protection register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WPK,Write protection key"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "SS,sub second register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SSC,Sub second value"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "SHIFTCTL,shift function control register"
|
|
bitfld.long 0x00 31. "A1S,One second add" "0,1"
|
|
hexmask.long.word 0x00 0.--14. 1. "SFS,Subtract a fraction of a second"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "TTS,Time of time stamp register"
|
|
bitfld.long 0x00 22. "PM,AM/PM mark" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "DTS,Date of time stamp register"
|
|
bitfld.long 0x00 13.--15. "DOW,Week day units" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. "MONT,Month tens in BCD format" "0,1"
|
|
bitfld.long 0x00 8.--11. "MONU,Month units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. "DAYT,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "DAYU,Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "SSTS,Sub second of time stamp register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SSC,Sub second value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "HRFC,calibration register"
|
|
bitfld.long 0x00 15. "FREQI,Increase RTC frequency by 488.5PPM" "0,1"
|
|
bitfld.long 0x00 14. "CWND8,Frequency compensation window 8 second selected" "0,1"
|
|
bitfld.long 0x00 13. "CWND16,Frequency compensation window 16 second selected" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "CMSK,Calibration mask number"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TAMP,tamper and alternate function configuration register"
|
|
bitfld.long 0x00 31. "BKERASE,Backup registers erase" "0,1"
|
|
bitfld.long 0x00 20. "TP1NOER,Tamper 1 no erase" "0,1"
|
|
bitfld.long 0x00 19. "TP0NOER,Tamper 0 no erase" "0,1"
|
|
bitfld.long 0x00 18. "AOT,RTC_ALARM Output Type" "0,1"
|
|
bitfld.long 0x00 15. "DISPU,RTC_TAMPx pull-up disable" "0,1"
|
|
bitfld.long 0x00 13.--14. "PRCH,Pre-charge duration time of RTC_TAMPx" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "FLT,RTC_TAMPx filter count setting" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. "FREQ,Sampling frequency of tamper event detection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 7. "TPTS,Make tamper function used for timestamp function" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TP1EG,Tamper 1 event trigger edge" "0,1"
|
|
bitfld.long 0x00 3. "TP1EN,Tamper 1 detection enable" "0,1"
|
|
bitfld.long 0x00 2. "TPIE,Tamper detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "TP0EG,Tamper 0 event trigger edge" "0,1"
|
|
bitfld.long 0x00 0. "TP0EN,Tamper 0 detection enable" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "ALRM0SS,alarm A sub second register"
|
|
bitfld.long 0x00 24.--27. "MSKSSC,Mask control bit of SSC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--14. 1. "SSC,Alarm sub second value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "ALRM1SS,Alarm 1 sub second register"
|
|
bitfld.long 0x00 24.--27. "MSKSSC,Mask control bit of SSC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--14. 1. "SSC,Alarm sub second value"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PPM_CTL,Privilege protection mode control register"
|
|
bitfld.long 0x00 31. "BKPWPRIP,Backup registers zone B privilege protection" "0,1"
|
|
bitfld.long 0x00 30. "BKPRWPRIP,Backup registers zone A privilege protection" "0,1"
|
|
bitfld.long 0x00 15. "RTCPRIP,RTC privilege protection" "0,1"
|
|
bitfld.long 0x00 14. "INITPRIP,Initialization privilege protection" "0,1"
|
|
bitfld.long 0x00 13. "CALCPRIP,Shift register privilege protection" "0,1"
|
|
bitfld.long 0x00 12. "TAMPPRIP,Tamper privilege protection" "0,1"
|
|
bitfld.long 0x00 3. "TSPRIP,Timestamp privilege protection" "0,1"
|
|
bitfld.long 0x00 2. "WUTPRIP,Wakeup timer privilege protection" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1PRIP,Alarm 1 privilege protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ALRM0PRIP,Alarm 0 privilege protection" "0,1"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SPM_CTL,Secure protection mode control register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "BKPWSECP,Backup registers write protection offset"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BKPRWSECP,Backup registers read/write protection offset"
|
|
bitfld.long 0x00 15. "RTCSECP,RTC global protection" "0,1"
|
|
bitfld.long 0x00 14. "INITSECP,Initialization protection" "0,1"
|
|
bitfld.long 0x00 13. "CALSECP,Shift register daylight saving calibration and reference clock protection" "0,1"
|
|
bitfld.long 0x00 12. "TAMPSECP,Tamper protection" "0,1"
|
|
bitfld.long 0x00 3. "TSSECP,Timestamp protection" "0,1"
|
|
bitfld.long 0x00 2. "WUTSECP,Wakeup timer protection" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1SECP,Alarm 1 protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ALRM0SECP,Alarm 0 protection" "0,1"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 17. "TP1F,RTC_TAMP1 detected flag" "0,1"
|
|
bitfld.long 0x00 16. "TP0F,RTC_TAMP0 detected flag" "0,1"
|
|
bitfld.long 0x00 4. "TSOVRF,Time-stamp overflow flag" "0,1"
|
|
bitfld.long 0x00 3. "TSF,Time-stamp flag" "0,1"
|
|
bitfld.long 0x00 2. "WTF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1F,Alarm-1 occurs flag" "0,1"
|
|
bitfld.long 0x00 0. "ALRM0F,Alarm-0 occurs flag" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "NSMI_STAT,Non-secure masked interrupt status register"
|
|
bitfld.long 0x00 17. "TP1NSMF,RTC_TAMP1 non-secure interrupt masked flag" "0,1"
|
|
bitfld.long 0x00 16. "TP0NSMF,RTC_TAMP0 non-secure interrupt masked flag" "0,1"
|
|
bitfld.long 0x00 4. "TSOVRNSMF,Time-stamp overflow non-secure masked flag" "0,1"
|
|
bitfld.long 0x00 3. "TSNSMF,Time-stamp flag" "0,1"
|
|
bitfld.long 0x00 2. "WTNSMF,Wakeup timer non-secure masked flag" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1NSMF,Alarm-1 occurs non-secure masked flag" "0,1"
|
|
bitfld.long 0x00 0. "ALRM0NSMF,Alarm-0 occurs non-secure masked flag" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SMI_STAT,Secure masked interrupt status register"
|
|
bitfld.long 0x00 17. "TP1SMF,RTC_TAMP1 secure interrupt masked flag" "0,1"
|
|
bitfld.long 0x00 16. "TP0SMF,RTC_TAMP0 secure interrupt masked flag" "0,1"
|
|
bitfld.long 0x00 4. "TSOVRSMF,Time-stamp overflow secure masked flag" "0,1"
|
|
bitfld.long 0x00 3. "TSSMF,Time-stamp secure masked flag" "0,1"
|
|
bitfld.long 0x00 2. "WTSMF,Wakeup timer secure masked flag" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1SMF,Alarm-1 occurs secure masked flag" "0,1"
|
|
bitfld.long 0x00 0. "ALRM0SMF,Alarm-0 occurs secure masked flag" "0,1"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "STATC,Status flag clear register"
|
|
bitfld.long 0x00 17. "TP1FC,TAMP1 detection flag clear" "0,1"
|
|
bitfld.long 0x00 16. "TP0FC,TAMP0 detection flag clear" "0,1"
|
|
bitfld.long 0x00 4. "TSOVRFC,Timestamp overflow flag clear" "0,1"
|
|
bitfld.long 0x00 3. "TSFC,Timestamp flag clear" "0,1"
|
|
bitfld.long 0x00 2. "WTFC,Wakeup timer flag clear" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1FC,Alarm 1 flag clear" "0,1"
|
|
bitfld.long 0x00 0. "ALRM0FC,Alarm 0 flag clear" "0,1"
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x70)++0x03
|
|
line.long 0x00 "BKP$1,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
repeat 4. (strings "16" "7" "18" "19" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0xB0)++0x03
|
|
line.long 0x00 "BKP$1,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "SEC_RTC"
|
|
base ad:0x50002800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TIME,time register"
|
|
bitfld.long 0x00 22. "PM,AM/PM notation" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DATE,date register"
|
|
bitfld.long 0x00 20.--23. "YRT,Year tens in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "YRU,Year units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 13.--15. "DOW,Days of the week" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. "MONT,Month tens in BCD code" "0,1"
|
|
bitfld.long 0x00 8.--11. "MONU,Month units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. "DAYT,Date tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "DAYU,Date units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
bitfld.long 0x00 31. "OUT2EN,RTC_OUT pin select" "0,1"
|
|
bitfld.long 0x00 23. "COEN,Calibration output enable" "0,1"
|
|
bitfld.long 0x00 21.--22. "OS,Output selection" "0,1,2,3"
|
|
bitfld.long 0x00 20. "OPOL,Output polarity" "0,1"
|
|
bitfld.long 0x00 19. "COS,Calibration output selection" "0,1"
|
|
bitfld.long 0x00 18. "DSM,Daylight saving mark" "0,1"
|
|
bitfld.long 0x00 17. "S1H,Subtract 1 hour (winter time change)" "0,1"
|
|
bitfld.long 0x00 16. "A1H,Add 1 hour (summer time change)" "0,1"
|
|
bitfld.long 0x00 15. "TSIE,Time-stamp interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "WTIE,Auto-wakeup timer interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "ALRM1IE,RTC alarm-1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 12. "ALRM0IE,RTC alarm-0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 11. "TSEN,Time-stamp function enable" "0,1"
|
|
bitfld.long 0x00 10. "WTEN,Auto-wakeup timer function enable" "0,1"
|
|
bitfld.long 0x00 9. "ALRM1EN,Alarm-1 function enable" "0,1"
|
|
bitfld.long 0x00 8. "ALRM0EN,Alarm-0 function enable" "0,1"
|
|
bitfld.long 0x00 7. "CCEN,Coarse calibration function enable" "0,1"
|
|
bitfld.long 0x00 6. "CS,Clock System" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "BPSHAD,Shadow registers bypass control" "0,1"
|
|
bitfld.long 0x00 4. "REFEN,Reference clock detection function enable enable (50 or 60 Hz)" "0,1"
|
|
bitfld.long 0x00 3. "TSEG,Valid event edge of time-stamp" "0,1"
|
|
bitfld.long 0x00 0.--2. "WTCS,Auto-wakeup timer clock selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ICS,Initialization control and status register"
|
|
rbitfld.long 0x00 16. "SCPF,Smooth calibration pending flag" "0,1"
|
|
bitfld.long 0x00 7. "INITM,Enter initialization mode" "0,1"
|
|
rbitfld.long 0x00 6. "INITF,Initialization state flag" "0,1"
|
|
bitfld.long 0x00 5. "RSYNF,Register synchronization flag" "0,1"
|
|
rbitfld.long 0x00 4. "YCM,Year configuration mark" "0,1"
|
|
bitfld.long 0x00 3. "SOPF,Shift function operation pending flag" "0,1"
|
|
rbitfld.long 0x00 2. "WTWF,Wakeup timer write enable flag" "0,1"
|
|
rbitfld.long 0x00 1. "ALRM1WF,Alarm 1 configuration can be write flag" "0,1"
|
|
rbitfld.long 0x00 0. "ALRM0WF,Alarm 0 configuration can be write flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PSC,prescaler register"
|
|
hexmask.long.byte 0x00 16.--22. 1. "FACTOR_A,Asynchronous prescaler factor"
|
|
hexmask.long.word 0x00 0.--14. 1. "FACTOR_S,Synchronous prescaler factor"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "WUT,Wakeup timer register"
|
|
hexmask.long.word 0x00 0.--15. 1. "WTRV,Auto-wakeup timer reloads value"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "COSC,Coarse calibration register"
|
|
bitfld.long 0x00 7. "COSD,Coarse Calibration direction" "0,1"
|
|
bitfld.long 0x00 0.--4. "COSS,Coarse Calibration step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ALRM0TD,Alarm 0 time and date register"
|
|
bitfld.long 0x00 31. "MSKD,Alarm date mask bit" "0,1"
|
|
bitfld.long 0x00 30. "DOWS,Day of the week selected" "0,1"
|
|
bitfld.long 0x00 28.--29. "DAYT,Date tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. "DAYU,Date units or week day in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. "MSKH,Alarm hours mask bit" "0,1"
|
|
bitfld.long 0x00 22. "PM,AM/PM flag" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. "MSKM,Alarm minutes mask bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSKS,Alarm seconds mask bit" "0,1"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "ALRM1TD,Alarm 1 time and date register"
|
|
bitfld.long 0x00 31. "MSKD,Alarm date mask bit" "0,1"
|
|
bitfld.long 0x00 30. "DOWS,Day of the week selected" "0,1"
|
|
bitfld.long 0x00 28.--29. "DAYT,Date tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. "DAYU,Date units or week day in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. "MSKH,Alarm hours mask bit" "0,1"
|
|
bitfld.long 0x00 22. "PM,AM/PM flag" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. "MSKM,Alarm minutes mask bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSKS,Alarm seconds mask bit" "0,1"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "WPK,write protection register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WPK,Write protection key"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "SS,sub second register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SSC,Sub second value"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "SHIFTCTL,shift function control register"
|
|
bitfld.long 0x00 31. "A1S,One second add" "0,1"
|
|
hexmask.long.word 0x00 0.--14. 1. "SFS,Subtract a fraction of a second"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "TTS,Time of time stamp register"
|
|
bitfld.long 0x00 22. "PM,AM/PM mark" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "DTS,Date of time stamp register"
|
|
bitfld.long 0x00 13.--15. "DOW,Week day units" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. "MONT,Month tens in BCD format" "0,1"
|
|
bitfld.long 0x00 8.--11. "MONU,Month units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. "DAYT,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "DAYU,Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "SSTS,Sub second of time stamp register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SSC,Sub second value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "HRFC,calibration register"
|
|
bitfld.long 0x00 15. "FREQI,Increase RTC frequency by 488.5PPM" "0,1"
|
|
bitfld.long 0x00 14. "CWND8,Frequency compensation window 8 second selected" "0,1"
|
|
bitfld.long 0x00 13. "CWND16,Frequency compensation window 16 second selected" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "CMSK,Calibration mask number"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TAMP,tamper and alternate function configuration register"
|
|
bitfld.long 0x00 31. "BKERASE,Backup registers erase" "0,1"
|
|
bitfld.long 0x00 20. "TP1NOER,Tamper 1 no erase" "0,1"
|
|
bitfld.long 0x00 19. "TP0NOER,Tamper 0 no erase" "0,1"
|
|
bitfld.long 0x00 18. "AOT,RTC_ALARM Output Type" "0,1"
|
|
bitfld.long 0x00 15. "DISPU,RTC_TAMPx pull-up disable" "0,1"
|
|
bitfld.long 0x00 13.--14. "PRCH,Pre-charge duration time of RTC_TAMPx" "0,1,2,3"
|
|
bitfld.long 0x00 11.--12. "FLT,RTC_TAMPx filter count setting" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. "FREQ,Sampling frequency of tamper event detection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 7. "TPTS,Make tamper function used for timestamp function" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TP1EG,Tamper 1 event trigger edge" "0,1"
|
|
bitfld.long 0x00 3. "TP1EN,Tamper 1 detection enable" "0,1"
|
|
bitfld.long 0x00 2. "TPIE,Tamper detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "TP0EG,Tamper 0 event trigger edge" "0,1"
|
|
bitfld.long 0x00 0. "TP0EN,Tamper 0 detection enable" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "ALRM0SS,alarm A sub second register"
|
|
bitfld.long 0x00 24.--27. "MSKSSC,Mask control bit of SSC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--14. 1. "SSC,Alarm sub second value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "ALRM1SS,Alarm 1 sub second register"
|
|
bitfld.long 0x00 24.--27. "MSKSSC,Mask control bit of SSC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--14. 1. "SSC,Alarm sub second value"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PPM_CTL,Privilege protection mode control register"
|
|
bitfld.long 0x00 31. "BKPWPRIP,Backup registers zone B privilege protection" "0,1"
|
|
bitfld.long 0x00 30. "BKPRWPRIP,Backup registers zone A privilege protection" "0,1"
|
|
bitfld.long 0x00 15. "RTCPRIP,RTC privilege protection" "0,1"
|
|
bitfld.long 0x00 14. "INITPRIP,Initialization privilege protection" "0,1"
|
|
bitfld.long 0x00 13. "CALCPRIP,Shift register privilege protection" "0,1"
|
|
bitfld.long 0x00 12. "TAMPPRIP,Tamper privilege protection" "0,1"
|
|
bitfld.long 0x00 3. "TSPRIP,Timestamp privilege protection" "0,1"
|
|
bitfld.long 0x00 2. "WUTPRIP,Wakeup timer privilege protection" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1PRIP,Alarm 1 privilege protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ALRM0PRIP,Alarm 0 privilege protection" "0,1"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SPM_CTL,Secure protection mode control register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "BKPWSECP,Backup registers write protection offset"
|
|
hexmask.long.byte 0x00 16.--23. 1. "BKPRWSECP,Backup registers read/write protection offset"
|
|
bitfld.long 0x00 15. "RTCSECP,RTC global protection" "0,1"
|
|
bitfld.long 0x00 14. "INITSECP,Initialization protection" "0,1"
|
|
bitfld.long 0x00 13. "CALSECP,Shift register daylight saving calibration and reference clock protection" "0,1"
|
|
bitfld.long 0x00 12. "TAMPSECP,Tamper protection" "0,1"
|
|
bitfld.long 0x00 3. "TSSECP,Timestamp protection" "0,1"
|
|
bitfld.long 0x00 2. "WUTSECP,Wakeup timer protection" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1SECP,Alarm 1 protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ALRM0SECP,Alarm 0 protection" "0,1"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 17. "TP1F,RTC_TAMP1 detected flag" "0,1"
|
|
bitfld.long 0x00 16. "TP0F,RTC_TAMP0 detected flag" "0,1"
|
|
bitfld.long 0x00 4. "TSOVRF,Time-stamp overflow flag" "0,1"
|
|
bitfld.long 0x00 3. "TSF,Time-stamp flag" "0,1"
|
|
bitfld.long 0x00 2. "WTF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1F,Alarm-1 occurs flag" "0,1"
|
|
bitfld.long 0x00 0. "ALRM0F,Alarm-0 occurs flag" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "NSMI_STAT,Non-secure masked interrupt status register"
|
|
bitfld.long 0x00 17. "TP1NSMF,RTC_TAMP1 non-secure interrupt masked flag" "0,1"
|
|
bitfld.long 0x00 16. "TP0NSMF,RTC_TAMP0 non-secure interrupt masked flag" "0,1"
|
|
bitfld.long 0x00 4. "TSOVRNSMF,Time-stamp overflow non-secure masked flag" "0,1"
|
|
bitfld.long 0x00 3. "TSNSMF,Time-stamp flag" "0,1"
|
|
bitfld.long 0x00 2. "WTNSMF,Wakeup timer non-secure masked flag" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1NSMF,Alarm-1 occurs non-secure masked flag" "0,1"
|
|
bitfld.long 0x00 0. "ALRM0NSMF,Alarm-0 occurs non-secure masked flag" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SMI_STAT,Secure masked interrupt status register"
|
|
bitfld.long 0x00 17. "TP1SMF,RTC_TAMP1 secure interrupt masked flag" "0,1"
|
|
bitfld.long 0x00 16. "TP0SMF,RTC_TAMP0 secure interrupt masked flag" "0,1"
|
|
bitfld.long 0x00 4. "TSOVRSMF,Time-stamp overflow secure masked flag" "0,1"
|
|
bitfld.long 0x00 3. "TSSMF,Time-stamp secure masked flag" "0,1"
|
|
bitfld.long 0x00 2. "WTSMF,Wakeup timer secure masked flag" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1SMF,Alarm-1 occurs secure masked flag" "0,1"
|
|
bitfld.long 0x00 0. "ALRM0SMF,Alarm-0 occurs secure masked flag" "0,1"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "STATC,Status flag clear register"
|
|
bitfld.long 0x00 17. "TP1FC,TAMP1 detection flag clear" "0,1"
|
|
bitfld.long 0x00 16. "TP0FC,TAMP0 detection flag clear" "0,1"
|
|
bitfld.long 0x00 4. "TSOVRFC,Timestamp overflow flag clear" "0,1"
|
|
bitfld.long 0x00 3. "TSFC,Timestamp flag clear" "0,1"
|
|
bitfld.long 0x00 2. "WTFC,Wakeup timer flag clear" "0,1"
|
|
bitfld.long 0x00 1. "ALRM1FC,Alarm 1 flag clear" "0,1"
|
|
bitfld.long 0x00 0. "ALRM0FC,Alarm 0 flag clear" "0,1"
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
group.long ($2+0x70)++0x03
|
|
line.long 0x00 "BKP$1,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
repeat 4. (strings "16" "7" "18" "19" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0xB0)++0x03
|
|
line.long 0x00 "BKP$1,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "SDIO (Secure digital input/output interface)"
|
|
tree "SDIO"
|
|
base ad:0x40012C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWRCTL,Power control register"
|
|
bitfld.long 0x00 0.--1. "PWRCTL,SDIO power control bits" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CLKCTL,Clock control register"
|
|
bitfld.long 0x00 31. "DIV_8,MSB of Clock division" "0,1"
|
|
bitfld.long 0x00 14. "HWCLKEN,Hardware Clock Control enable bit" "0,1"
|
|
bitfld.long 0x00 13. "CLKEDGE,SDIO_CLK clock edge selection bit" "0,1"
|
|
bitfld.long 0x00 11.--12. "BUSMODE,SDIO card bus mode control bit" "0,1,2,3"
|
|
bitfld.long 0x00 10. "CLKBYP,Clock bypass enable bit" "0,1"
|
|
bitfld.long 0x00 9. "CLKPWRSAV,SDIO_CLK clock dynamic switch on/off for power saving" "0,1"
|
|
bitfld.long 0x00 8. "CLKEN,SDIO_CLK clock output enable bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV_0_7,Clock division"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMDAGMT,Command argument register"
|
|
hexmask.long 0x00 0.--31. 1. "CMDAGMT,SDIO card command argument"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CMDCTL,Command control register"
|
|
bitfld.long 0x00 14. "ATAEN,CE-ATA command enable(CE-ATA only)" "0,1"
|
|
bitfld.long 0x00 13. "NINTEN,No CE-ATA Interrupt (CE-ATA only)" "0,1"
|
|
bitfld.long 0x00 12. "ENCMDC,CMD completion signal enabled (CE-ATA only)" "0,1"
|
|
bitfld.long 0x00 11. "SUSPEND,SD I/O suspend command(SD I/O only)" "0,1"
|
|
bitfld.long 0x00 10. "CSMEN,Command state machine (CSM) enable bit" "0,1"
|
|
bitfld.long 0x00 9. "WAITDEND,Waits for ends of data transfer" "0,1"
|
|
bitfld.long 0x00 8. "INTWAIT,Interrupt wait instead of timeout" "0,1"
|
|
bitfld.long 0x00 6.--7. "CMDRESP,Command response type bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. "CMDIDX,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RSPCMDIDX,Command index response register"
|
|
bitfld.long 0x00 0.--5. "RSPCMDIDX,Last response command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RESP0,Response register 0"
|
|
hexmask.long 0x00 0.--31. 1. "RESP0,Card state"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "RESP1,Response register 1"
|
|
hexmask.long 0x00 0.--31. 1. "RESP1,Card state"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "RESP2,Response register 2"
|
|
hexmask.long 0x00 0.--31. 1. "RESP2,Card state"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RESP3,Response register 3"
|
|
hexmask.long 0x00 0.--31. 1. "RESP3,Response register 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DATATO,Data timeout register"
|
|
hexmask.long 0x00 0.--31. 1. "DATATO,Data timeout period"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DATALEN,Data length register"
|
|
hexmask.long 0x00 0.--24. 1. "DATALEN,Data transfer length"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DATACTL,Data control register"
|
|
bitfld.long 0x00 11. "IOEN,SD I/O specific function enable" "0,1"
|
|
bitfld.long 0x00 10. "RWTYPE,Read wait type" "0,1"
|
|
bitfld.long 0x00 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x00 8. "RWEN,Read wait mode enabled" "0,1"
|
|
bitfld.long 0x00 4.--7. "BLKSZ,Data block size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "DMAEN,DMA enable bit" "0,1"
|
|
bitfld.long 0x00 2. "TRANSMOD,Data transfer mode" "0,1"
|
|
bitfld.long 0x00 1. "DATADIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x00 0. "DATAEN,Data transfer enabled bit" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "DATACNT,Data counter register"
|
|
hexmask.long 0x00 0.--24. 1. "DATACNT,Data count value"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 23. "ATAEND,CE-ATA command completion signal received" "0,1"
|
|
bitfld.long 0x00 22. "SDIOINT,SD I/O interrupt received" "0,1"
|
|
bitfld.long 0x00 21. "RXDTVAL,Data is valid in receive FIFO" "0,1"
|
|
bitfld.long 0x00 20. "TXDTVAL,Data is valid in transmit FIFO" "0,1"
|
|
bitfld.long 0x00 19. "RFE,Receive FIFO is empty" "0,1"
|
|
bitfld.long 0x00 18. "TFE,Transmit FIFO is empty" "0,1"
|
|
bitfld.long 0x00 17. "RFF,Receive FIFO is full" "0,1"
|
|
bitfld.long 0x00 16. "TFF,Transmit FIFO is full" "0,1"
|
|
bitfld.long 0x00 15. "RFH,Receive FIFO is half full" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TFH,Transmit FIFO is half empty" "0,1"
|
|
bitfld.long 0x00 13. "RXRUN,Data reception in progress" "0,1"
|
|
bitfld.long 0x00 12. "TXRUN,Data transmission in progress" "0,1"
|
|
bitfld.long 0x00 11. "CMDRUN,Command transmission in progress" "0,1"
|
|
bitfld.long 0x00 10. "DTBLKEND,Data block sent/received" "0,1"
|
|
bitfld.long 0x00 9. "STBITE,Start bit error in the bus" "0,1"
|
|
bitfld.long 0x00 8. "DTEND,Data end" "0,1"
|
|
bitfld.long 0x00 7. "CMDSEND,Command sent" "0,1"
|
|
bitfld.long 0x00 6. "CMDRECV,Command response received" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXORE,Received FIFO overrun error occurs" "0,1"
|
|
bitfld.long 0x00 4. "TXURE,Transmit FIFO underrun error occurs" "0,1"
|
|
bitfld.long 0x00 3. "DTTMOUT,Data timeout" "0,1"
|
|
bitfld.long 0x00 2. "CMDTMOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x00 1. "DTCRCERR,Data block sent/received" "0,1"
|
|
bitfld.long 0x00 0. "CCRCERR,Command response received" "0,1"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "INTC,Interrupt clear register"
|
|
bitfld.long 0x00 23. "ATAENDC,ATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x00 22. "SDIOINTC,SDIOINT flag clear bit" "0,1"
|
|
bitfld.long 0x00 10. "DTBLKENDC,DTBLKEND flag clear bit" "0,1"
|
|
bitfld.long 0x00 9. "STBITEC,STBITE flag clear bit" "0,1"
|
|
bitfld.long 0x00 8. "DTENDC,DTEND flag clear bit" "0,1"
|
|
bitfld.long 0x00 7. "CMDSENDC,CMDSEND flag clear bit" "0,1"
|
|
bitfld.long 0x00 6. "CMDRECVC,CMDRECV flag clear bit" "0,1"
|
|
bitfld.long 0x00 5. "RXOREC,RXORE flag clear bit" "0,1"
|
|
bitfld.long 0x00 4. "TXUREC,TXURE flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "DTTMOUTC,DTTMOUT flag clear bit" "0,1"
|
|
bitfld.long 0x00 2. "CMDTMOUTC,CMDTMOUT flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "DTCRCERRC,DTCRCERR flag clear bit" "0,1"
|
|
bitfld.long 0x00 0. "CCRCERRC,CCRCERR flag clear bit" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 23. "ATAENDIE,CE-ATA command completion signal received interrupt enable" "0,1"
|
|
bitfld.long 0x00 22. "SDIOINTIE,SD I/O interrupt received interrupt enable" "0,1"
|
|
bitfld.long 0x00 21. "RXDTVALIE,Data valid in receive FIFO interrupt enable" "0,1"
|
|
bitfld.long 0x00 20. "TXDTVALIE,Data valid in transmit FIFO interrupt enable" "0,1"
|
|
bitfld.long 0x00 19. "RFEIE,Receive FIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 18. "TFEIE,Transmit FIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 17. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 16. "TFFIE,Transmit FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 15. "RFHIE,Receive FIFO half full interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TFHIE,Transmit FIFO half empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "RXRUNIE,Data reception interrupt enable" "0,1"
|
|
bitfld.long 0x00 12. "TXRUNIE,Data transmission interrupt enable" "0,1"
|
|
bitfld.long 0x00 11. "CMDRUNIE,Command transmission interrupt enable" "0,1"
|
|
bitfld.long 0x00 10. "DTBLKENDIE,Data block end interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "STBITEIE,Start bit error interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "DTENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "CMDSENDIE,Command sent interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "CMDRECVIE,Command response received interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXOREIE,Received FIFO overrun error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TXUREIE,Transmit FIFO underrun error interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "DTTMOUTIE,Data timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CMDTMOUTIE,Command response timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "DTCRCERRIE,Data CRC fail interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CCRCERRIE,Command response CRC fail interrupt enable" "0,1"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "FIFOCNT,FIFO counter register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "FIFOCNT,FIFO counter"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "FIFO,FIFO data register"
|
|
hexmask.long 0x00 0.--31. 1. "FIFODT,Receive FIFO data or transmit FIFO data"
|
|
tree.end
|
|
tree "SEC_SDIO"
|
|
base ad:0x50012C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWRCTL,Power control register"
|
|
bitfld.long 0x00 0.--1. "PWRCTL,SDIO power control bits" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CLKCTL,Clock control register"
|
|
bitfld.long 0x00 31. "DIV_8,MSB of Clock division" "0,1"
|
|
bitfld.long 0x00 14. "HWCLKEN,Hardware Clock Control enable bit" "0,1"
|
|
bitfld.long 0x00 13. "CLKEDGE,SDIO_CLK clock edge selection bit" "0,1"
|
|
bitfld.long 0x00 11.--12. "BUSMODE,SDIO card bus mode control bit" "0,1,2,3"
|
|
bitfld.long 0x00 10. "CLKBYP,Clock bypass enable bit" "0,1"
|
|
bitfld.long 0x00 9. "CLKPWRSAV,SDIO_CLK clock dynamic switch on/off for power saving" "0,1"
|
|
bitfld.long 0x00 8. "CLKEN,SDIO_CLK clock output enable bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV_0_7,Clock division"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMDAGMT,Command argument register"
|
|
hexmask.long 0x00 0.--31. 1. "CMDAGMT,SDIO card command argument"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CMDCTL,Command control register"
|
|
bitfld.long 0x00 14. "ATAEN,CE-ATA command enable(CE-ATA only)" "0,1"
|
|
bitfld.long 0x00 13. "NINTEN,No CE-ATA Interrupt (CE-ATA only)" "0,1"
|
|
bitfld.long 0x00 12. "ENCMDC,CMD completion signal enabled (CE-ATA only)" "0,1"
|
|
bitfld.long 0x00 11. "SUSPEND,SD I/O suspend command(SD I/O only)" "0,1"
|
|
bitfld.long 0x00 10. "CSMEN,Command state machine (CSM) enable bit" "0,1"
|
|
bitfld.long 0x00 9. "WAITDEND,Waits for ends of data transfer" "0,1"
|
|
bitfld.long 0x00 8. "INTWAIT,Interrupt wait instead of timeout" "0,1"
|
|
bitfld.long 0x00 6.--7. "CMDRESP,Command response type bits" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. "CMDIDX,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RSPCMDIDX,Command index response register"
|
|
bitfld.long 0x00 0.--5. "RSPCMDIDX,Last response command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RESP0,Response register 0"
|
|
hexmask.long 0x00 0.--31. 1. "RESP0,Card state"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "RESP1,Response register 1"
|
|
hexmask.long 0x00 0.--31. 1. "RESP1,Card state"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "RESP2,Response register 2"
|
|
hexmask.long 0x00 0.--31. 1. "RESP2,Card state"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RESP3,Response register 3"
|
|
hexmask.long 0x00 0.--31. 1. "RESP3,Response register 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DATATO,Data timeout register"
|
|
hexmask.long 0x00 0.--31. 1. "DATATO,Data timeout period"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DATALEN,Data length register"
|
|
hexmask.long 0x00 0.--24. 1. "DATALEN,Data transfer length"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DATACTL,Data control register"
|
|
bitfld.long 0x00 11. "IOEN,SD I/O specific function enable" "0,1"
|
|
bitfld.long 0x00 10. "RWTYPE,Read wait type" "0,1"
|
|
bitfld.long 0x00 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x00 8. "RWEN,Read wait mode enabled" "0,1"
|
|
bitfld.long 0x00 4.--7. "BLKSZ,Data block size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "DMAEN,DMA enable bit" "0,1"
|
|
bitfld.long 0x00 2. "TRANSMOD,Data transfer mode" "0,1"
|
|
bitfld.long 0x00 1. "DATADIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x00 0. "DATAEN,Data transfer enabled bit" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "DATACNT,Data counter register"
|
|
hexmask.long 0x00 0.--24. 1. "DATACNT,Data count value"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 23. "ATAEND,CE-ATA command completion signal received" "0,1"
|
|
bitfld.long 0x00 22. "SDIOINT,SD I/O interrupt received" "0,1"
|
|
bitfld.long 0x00 21. "RXDTVAL,Data is valid in receive FIFO" "0,1"
|
|
bitfld.long 0x00 20. "TXDTVAL,Data is valid in transmit FIFO" "0,1"
|
|
bitfld.long 0x00 19. "RFE,Receive FIFO is empty" "0,1"
|
|
bitfld.long 0x00 18. "TFE,Transmit FIFO is empty" "0,1"
|
|
bitfld.long 0x00 17. "RFF,Receive FIFO is full" "0,1"
|
|
bitfld.long 0x00 16. "TFF,Transmit FIFO is full" "0,1"
|
|
bitfld.long 0x00 15. "RFH,Receive FIFO is half full" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TFH,Transmit FIFO is half empty" "0,1"
|
|
bitfld.long 0x00 13. "RXRUN,Data reception in progress" "0,1"
|
|
bitfld.long 0x00 12. "TXRUN,Data transmission in progress" "0,1"
|
|
bitfld.long 0x00 11. "CMDRUN,Command transmission in progress" "0,1"
|
|
bitfld.long 0x00 10. "DTBLKEND,Data block sent/received" "0,1"
|
|
bitfld.long 0x00 9. "STBITE,Start bit error in the bus" "0,1"
|
|
bitfld.long 0x00 8. "DTEND,Data end" "0,1"
|
|
bitfld.long 0x00 7. "CMDSEND,Command sent" "0,1"
|
|
bitfld.long 0x00 6. "CMDRECV,Command response received" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXORE,Received FIFO overrun error occurs" "0,1"
|
|
bitfld.long 0x00 4. "TXURE,Transmit FIFO underrun error occurs" "0,1"
|
|
bitfld.long 0x00 3. "DTTMOUT,Data timeout" "0,1"
|
|
bitfld.long 0x00 2. "CMDTMOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x00 1. "DTCRCERR,Data block sent/received" "0,1"
|
|
bitfld.long 0x00 0. "CCRCERR,Command response received" "0,1"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "INTC,Interrupt clear register"
|
|
bitfld.long 0x00 23. "ATAENDC,ATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x00 22. "SDIOINTC,SDIOINT flag clear bit" "0,1"
|
|
bitfld.long 0x00 10. "DTBLKENDC,DTBLKEND flag clear bit" "0,1"
|
|
bitfld.long 0x00 9. "STBITEC,STBITE flag clear bit" "0,1"
|
|
bitfld.long 0x00 8. "DTENDC,DTEND flag clear bit" "0,1"
|
|
bitfld.long 0x00 7. "CMDSENDC,CMDSEND flag clear bit" "0,1"
|
|
bitfld.long 0x00 6. "CMDRECVC,CMDRECV flag clear bit" "0,1"
|
|
bitfld.long 0x00 5. "RXOREC,RXORE flag clear bit" "0,1"
|
|
bitfld.long 0x00 4. "TXUREC,TXURE flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "DTTMOUTC,DTTMOUT flag clear bit" "0,1"
|
|
bitfld.long 0x00 2. "CMDTMOUTC,CMDTMOUT flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "DTCRCERRC,DTCRCERR flag clear bit" "0,1"
|
|
bitfld.long 0x00 0. "CCRCERRC,CCRCERR flag clear bit" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 23. "ATAENDIE,CE-ATA command completion signal received interrupt enable" "0,1"
|
|
bitfld.long 0x00 22. "SDIOINTIE,SD I/O interrupt received interrupt enable" "0,1"
|
|
bitfld.long 0x00 21. "RXDTVALIE,Data valid in receive FIFO interrupt enable" "0,1"
|
|
bitfld.long 0x00 20. "TXDTVALIE,Data valid in transmit FIFO interrupt enable" "0,1"
|
|
bitfld.long 0x00 19. "RFEIE,Receive FIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 18. "TFEIE,Transmit FIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 17. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 16. "TFFIE,Transmit FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 15. "RFHIE,Receive FIFO half full interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TFHIE,Transmit FIFO half empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "RXRUNIE,Data reception interrupt enable" "0,1"
|
|
bitfld.long 0x00 12. "TXRUNIE,Data transmission interrupt enable" "0,1"
|
|
bitfld.long 0x00 11. "CMDRUNIE,Command transmission interrupt enable" "0,1"
|
|
bitfld.long 0x00 10. "DTBLKENDIE,Data block end interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "STBITEIE,Start bit error interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "DTENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "CMDSENDIE,Command sent interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "CMDRECVIE,Command response received interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXOREIE,Received FIFO overrun error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TXUREIE,Transmit FIFO underrun error interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "DTTMOUTIE,Data timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CMDTMOUTIE,Command response timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "DTCRCERRIE,Data CRC fail interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CCRCERRIE,Command response CRC fail interrupt enable" "0,1"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "FIFOCNT,FIFO counter register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "FIFOCNT,FIFO counter"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "FIFO,FIFO data register"
|
|
hexmask.long 0x00 0.--31. 1. "FIFODT,Receive FIFO data or transmit FIFO data"
|
|
tree.end
|
|
tree.end
|
|
tree "SPI (Serial peripheral interface)"
|
|
tree "I2S1_ADD"
|
|
base ad:0x40003400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 15. "BDEN,Bidirectional enable" "0,1"
|
|
bitfld.long 0x00 14. "BDOEN,Bidirectional Transmit output enable" "0,1"
|
|
bitfld.long 0x00 13. "CRCEN,CRC Calculation Enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCNT,CRC Next Transfer" "0,1"
|
|
bitfld.long 0x00 11. "FF16,Data frame format" "0,1"
|
|
bitfld.long 0x00 10. "RO,Receive only" "0,1"
|
|
bitfld.long 0x00 9. "SWNSSEN,NSS Software Mode Selection" "0,1"
|
|
bitfld.long 0x00 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1"
|
|
bitfld.long 0x00 7. "LF,LSB First Mode" "0,1"
|
|
bitfld.long 0x00 6. "SPIEN,SPI enable" "0,1"
|
|
bitfld.long 0x00 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "MSTMOD,Master Mode Enable" "0,1"
|
|
bitfld.long 0x00 1. "CKPL,Clock polarity Selection" "0,1"
|
|
bitfld.long 0x00 0. "CKPH,Clock Phase Selection" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TBEIE,Tx buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "RBNEIE,RX buffer not empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMOD,SPI TI Mode Enable" "0,1"
|
|
bitfld.long 0x00 3. "NSSP,SPI NSS pulse mode Enable" "0,1"
|
|
bitfld.long 0x00 2. "NSSDRV,Drive NSS Output" "0,1"
|
|
bitfld.long 0x00 1. "DMATEN,Transmit Buffer DMA Enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAREN,Rx buffer DMA enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 8. "FERR,Format Error" "0,1"
|
|
rbitfld.long 0x00 7. "TRANS,Transmitting On-going Bit" "0,1"
|
|
rbitfld.long 0x00 6. "RXORERR,Reception Overrun Error Bit" "0,1"
|
|
rbitfld.long 0x00 5. "CONFERR,SPI Configuration error" "0,1"
|
|
bitfld.long 0x00 4. "CRCERR,SPI CRC Error Bit" "0,1"
|
|
rbitfld.long 0x00 3. "TXURERR,Transmission underrun error bit" "0,1"
|
|
rbitfld.long 0x00 2. "I2SCH,I2S channel side" "0,1"
|
|
rbitfld.long 0x00 1. "TBE,Transmit Buffer Empty" "0,1"
|
|
rbitfld.long 0x00 0. "RBNE,Receive Buffer Not Empty" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SPI_DATA,Data transfer register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RCRC,RX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCRC,RX CRC register"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TCRC,TX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TCRC,Tx CRC register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "I2SCTL,I2S control register"
|
|
bitfld.long 0x00 11. "I2SSEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x00 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "I2SOPMOD,I2S operation mode" "0,1,2,3"
|
|
bitfld.long 0x00 7. "PCMSMOD,PCM frame synchronization mode" "0,1"
|
|
bitfld.long 0x00 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x00 3. "CKPL,Idle state clock polarity" "0,1"
|
|
bitfld.long 0x00 1.--2. "DTLEN,Data length" "0,1,2,3"
|
|
bitfld.long 0x00 0. "CHLEN,Channel length (number of bits per audio channel)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x00 9. "MCKOEN,I2S_MCK output enable" "0,1"
|
|
bitfld.long 0x00 8. "OF,Odd factor for the prescaler" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Dividing factor for the prescaler"
|
|
tree.end
|
|
tree "SEC_I2S1_ADD"
|
|
base ad:0x50003400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 15. "BDEN,Bidirectional enable" "0,1"
|
|
bitfld.long 0x00 14. "BDOEN,Bidirectional Transmit output enable" "0,1"
|
|
bitfld.long 0x00 13. "CRCEN,CRC Calculation Enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCNT,CRC Next Transfer" "0,1"
|
|
bitfld.long 0x00 11. "FF16,Data frame format" "0,1"
|
|
bitfld.long 0x00 10. "RO,Receive only" "0,1"
|
|
bitfld.long 0x00 9. "SWNSSEN,NSS Software Mode Selection" "0,1"
|
|
bitfld.long 0x00 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1"
|
|
bitfld.long 0x00 7. "LF,LSB First Mode" "0,1"
|
|
bitfld.long 0x00 6. "SPIEN,SPI enable" "0,1"
|
|
bitfld.long 0x00 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "MSTMOD,Master Mode Enable" "0,1"
|
|
bitfld.long 0x00 1. "CKPL,Clock polarity Selection" "0,1"
|
|
bitfld.long 0x00 0. "CKPH,Clock Phase Selection" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TBEIE,Tx buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "RBNEIE,RX buffer not empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMOD,SPI TI Mode Enable" "0,1"
|
|
bitfld.long 0x00 3. "NSSP,SPI NSS pulse mode Enable" "0,1"
|
|
bitfld.long 0x00 2. "NSSDRV,Drive NSS Output" "0,1"
|
|
bitfld.long 0x00 1. "DMATEN,Transmit Buffer DMA Enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAREN,Rx buffer DMA enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 8. "FERR,Format Error" "0,1"
|
|
rbitfld.long 0x00 7. "TRANS,Transmitting On-going Bit" "0,1"
|
|
rbitfld.long 0x00 6. "RXORERR,Reception Overrun Error Bit" "0,1"
|
|
rbitfld.long 0x00 5. "CONFERR,SPI Configuration error" "0,1"
|
|
bitfld.long 0x00 4. "CRCERR,SPI CRC Error Bit" "0,1"
|
|
rbitfld.long 0x00 3. "TXURERR,Transmission underrun error bit" "0,1"
|
|
rbitfld.long 0x00 2. "I2SCH,I2S channel side" "0,1"
|
|
rbitfld.long 0x00 1. "TBE,Transmit Buffer Empty" "0,1"
|
|
rbitfld.long 0x00 0. "RBNE,Receive Buffer Not Empty" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SPI_DATA,Data transfer register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RCRC,RX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCRC,RX CRC register"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TCRC,TX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TCRC,Tx CRC register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "I2SCTL,I2S control register"
|
|
bitfld.long 0x00 11. "I2SSEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x00 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "I2SOPMOD,I2S operation mode" "0,1,2,3"
|
|
bitfld.long 0x00 7. "PCMSMOD,PCM frame synchronization mode" "0,1"
|
|
bitfld.long 0x00 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x00 3. "CKPL,Idle state clock polarity" "0,1"
|
|
bitfld.long 0x00 1.--2. "DTLEN,Data length" "0,1,2,3"
|
|
bitfld.long 0x00 0. "CHLEN,Channel length (number of bits per audio channel)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x00 9. "MCKOEN,I2S_MCK output enable" "0,1"
|
|
bitfld.long 0x00 8. "OF,Odd factor for the prescaler" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Dividing factor for the prescaler"
|
|
tree.end
|
|
tree "SEC_SPI0"
|
|
base ad:0x50013000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 15. "BDEN,Bidirectional enable" "0,1"
|
|
bitfld.long 0x00 14. "BDOEN,Bidirectional Transmit output enable" "0,1"
|
|
bitfld.long 0x00 13. "CRCEN,CRC Calculation Enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCNT,CRC Next Transfer" "0,1"
|
|
bitfld.long 0x00 11. "FF16,Data frame format" "0,1"
|
|
bitfld.long 0x00 10. "RO,Receive only" "0,1"
|
|
bitfld.long 0x00 9. "SWNSSEN,NSS Software Mode Selection" "0,1"
|
|
bitfld.long 0x00 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1"
|
|
bitfld.long 0x00 7. "LF,LSB First Mode" "0,1"
|
|
bitfld.long 0x00 6. "SPIEN,SPI enable" "0,1"
|
|
bitfld.long 0x00 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "MSTMOD,Master Mode Enable" "0,1"
|
|
bitfld.long 0x00 1. "CKPL,Clock polarity Selection" "0,1"
|
|
bitfld.long 0x00 0. "CKPH,Clock Phase Selection" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TBEIE,Tx buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "RBNEIE,RX buffer not empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMOD,SPI TI Mode Enable" "0,1"
|
|
bitfld.long 0x00 3. "NSSP,SPI NSS pulse mode Enable" "0,1"
|
|
bitfld.long 0x00 2. "NSSDRV,Drive NSS Output" "0,1"
|
|
bitfld.long 0x00 1. "DMATEN,Transmit Buffer DMA Enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAREN,Rx buffer DMA enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 8. "FERR,Format Error" "0,1"
|
|
rbitfld.long 0x00 7. "TRANS,Transmitting On-going Bit" "0,1"
|
|
rbitfld.long 0x00 6. "RXORERR,Reception Overrun Error Bit" "0,1"
|
|
rbitfld.long 0x00 5. "CONFERR,SPI Configuration error" "0,1"
|
|
bitfld.long 0x00 4. "CRCERR,SPI CRC Error Bit" "0,1"
|
|
rbitfld.long 0x00 3. "TXURERR,Transmission underrun error bit" "0,1"
|
|
rbitfld.long 0x00 2. "I2SCH,I2S channel side" "0,1"
|
|
rbitfld.long 0x00 1. "TBE,Transmit Buffer Empty" "0,1"
|
|
rbitfld.long 0x00 0. "RBNE,Receive Buffer Not Empty" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SPI_DATA,Data transfer register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RCRC,RX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCRC,RX CRC register"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TCRC,TX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TCRC,Tx CRC register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "I2SCTL,I2S control register"
|
|
bitfld.long 0x00 11. "I2SSEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x00 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "I2SOPMOD,I2S operation mode" "0,1,2,3"
|
|
bitfld.long 0x00 7. "PCMSMOD,PCM frame synchronization mode" "0,1"
|
|
bitfld.long 0x00 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x00 3. "CKPL,Idle state clock polarity" "0,1"
|
|
bitfld.long 0x00 1.--2. "DTLEN,Data length" "0,1,2,3"
|
|
bitfld.long 0x00 0. "CHLEN,Channel length (number of bits per audio channel)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x00 9. "MCKOEN,I2S_MCK output enable" "0,1"
|
|
bitfld.long 0x00 8. "OF,Odd factor for the prescaler" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Dividing factor for the prescaler"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "QCTL,Quad-SPI mode control register"
|
|
bitfld.long 0x00 2. "IO23_DRV,Drive IO2 and IO3 enable" "0,1"
|
|
bitfld.long 0x00 1. "QRD,Quad-SPI mode read select" "0,1"
|
|
bitfld.long 0x00 0. "QMOD,Quad-SPI mode enable" "0,1"
|
|
tree.end
|
|
tree "SEC_SPI1"
|
|
base ad:0x50003800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 15. "BDEN,Bidirectional enable" "0,1"
|
|
bitfld.long 0x00 14. "BDOEN,Bidirectional Transmit output enable" "0,1"
|
|
bitfld.long 0x00 13. "CRCEN,CRC Calculation Enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCNT,CRC Next Transfer" "0,1"
|
|
bitfld.long 0x00 11. "FF16,Data frame format" "0,1"
|
|
bitfld.long 0x00 10. "RO,Receive only" "0,1"
|
|
bitfld.long 0x00 9. "SWNSSEN,NSS Software Mode Selection" "0,1"
|
|
bitfld.long 0x00 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1"
|
|
bitfld.long 0x00 7. "LF,LSB First Mode" "0,1"
|
|
bitfld.long 0x00 6. "SPIEN,SPI enable" "0,1"
|
|
bitfld.long 0x00 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "MSTMOD,Master Mode Enable" "0,1"
|
|
bitfld.long 0x00 1. "CKPL,Clock polarity Selection" "0,1"
|
|
bitfld.long 0x00 0. "CKPH,Clock Phase Selection" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TBEIE,Tx buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "RBNEIE,RX buffer not empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMOD,SPI TI Mode Enable" "0,1"
|
|
bitfld.long 0x00 3. "NSSP,SPI NSS pulse mode Enable" "0,1"
|
|
bitfld.long 0x00 2. "NSSDRV,Drive NSS Output" "0,1"
|
|
bitfld.long 0x00 1. "DMATEN,Transmit Buffer DMA Enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAREN,Rx buffer DMA enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 8. "FERR,Format Error" "0,1"
|
|
rbitfld.long 0x00 7. "TRANS,Transmitting On-going Bit" "0,1"
|
|
rbitfld.long 0x00 6. "RXORERR,Reception Overrun Error Bit" "0,1"
|
|
rbitfld.long 0x00 5. "CONFERR,SPI Configuration error" "0,1"
|
|
bitfld.long 0x00 4. "CRCERR,SPI CRC Error Bit" "0,1"
|
|
rbitfld.long 0x00 3. "TXURERR,Transmission underrun error bit" "0,1"
|
|
rbitfld.long 0x00 2. "I2SCH,I2S channel side" "0,1"
|
|
rbitfld.long 0x00 1. "TBE,Transmit Buffer Empty" "0,1"
|
|
rbitfld.long 0x00 0. "RBNE,Receive Buffer Not Empty" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SPI_DATA,Data transfer register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RCRC,RX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCRC,RX CRC register"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TCRC,TX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TCRC,Tx CRC register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "I2SCTL,I2S control register"
|
|
bitfld.long 0x00 11. "I2SSEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x00 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "I2SOPMOD,I2S operation mode" "0,1,2,3"
|
|
bitfld.long 0x00 7. "PCMSMOD,PCM frame synchronization mode" "0,1"
|
|
bitfld.long 0x00 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x00 3. "CKPL,Idle state clock polarity" "0,1"
|
|
bitfld.long 0x00 1.--2. "DTLEN,Data length" "0,1,2,3"
|
|
bitfld.long 0x00 0. "CHLEN,Channel length (number of bits per audio channel)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x00 9. "MCKOEN,I2S_MCK output enable" "0,1"
|
|
bitfld.long 0x00 8. "OF,Odd factor for the prescaler" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Dividing factor for the prescaler"
|
|
tree.end
|
|
tree "SPI0"
|
|
base ad:0x40013000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 15. "BDEN,Bidirectional enable" "0,1"
|
|
bitfld.long 0x00 14. "BDOEN,Bidirectional Transmit output enable" "0,1"
|
|
bitfld.long 0x00 13. "CRCEN,CRC Calculation Enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCNT,CRC Next Transfer" "0,1"
|
|
bitfld.long 0x00 11. "FF16,Data frame format" "0,1"
|
|
bitfld.long 0x00 10. "RO,Receive only" "0,1"
|
|
bitfld.long 0x00 9. "SWNSSEN,NSS Software Mode Selection" "0,1"
|
|
bitfld.long 0x00 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1"
|
|
bitfld.long 0x00 7. "LF,LSB First Mode" "0,1"
|
|
bitfld.long 0x00 6. "SPIEN,SPI enable" "0,1"
|
|
bitfld.long 0x00 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "MSTMOD,Master Mode Enable" "0,1"
|
|
bitfld.long 0x00 1. "CKPL,Clock polarity Selection" "0,1"
|
|
bitfld.long 0x00 0. "CKPH,Clock Phase Selection" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TBEIE,Tx buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "RBNEIE,RX buffer not empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMOD,SPI TI Mode Enable" "0,1"
|
|
bitfld.long 0x00 3. "NSSP,SPI NSS pulse mode Enable" "0,1"
|
|
bitfld.long 0x00 2. "NSSDRV,Drive NSS Output" "0,1"
|
|
bitfld.long 0x00 1. "DMATEN,Transmit Buffer DMA Enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAREN,Rx buffer DMA enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 8. "FERR,Format Error" "0,1"
|
|
rbitfld.long 0x00 7. "TRANS,Transmitting On-going Bit" "0,1"
|
|
rbitfld.long 0x00 6. "RXORERR,Reception Overrun Error Bit" "0,1"
|
|
rbitfld.long 0x00 5. "CONFERR,SPI Configuration error" "0,1"
|
|
bitfld.long 0x00 4. "CRCERR,SPI CRC Error Bit" "0,1"
|
|
rbitfld.long 0x00 3. "TXURERR,Transmission underrun error bit" "0,1"
|
|
rbitfld.long 0x00 2. "I2SCH,I2S channel side" "0,1"
|
|
rbitfld.long 0x00 1. "TBE,Transmit Buffer Empty" "0,1"
|
|
rbitfld.long 0x00 0. "RBNE,Receive Buffer Not Empty" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SPI_DATA,Data transfer register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RCRC,RX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCRC,RX CRC register"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TCRC,TX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TCRC,Tx CRC register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "I2SCTL,I2S control register"
|
|
bitfld.long 0x00 11. "I2SSEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x00 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "I2SOPMOD,I2S operation mode" "0,1,2,3"
|
|
bitfld.long 0x00 7. "PCMSMOD,PCM frame synchronization mode" "0,1"
|
|
bitfld.long 0x00 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x00 3. "CKPL,Idle state clock polarity" "0,1"
|
|
bitfld.long 0x00 1.--2. "DTLEN,Data length" "0,1,2,3"
|
|
bitfld.long 0x00 0. "CHLEN,Channel length (number of bits per audio channel)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x00 9. "MCKOEN,I2S_MCK output enable" "0,1"
|
|
bitfld.long 0x00 8. "OF,Odd factor for the prescaler" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Dividing factor for the prescaler"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "QCTL,Quad-SPI mode control register"
|
|
bitfld.long 0x00 2. "IO23_DRV,Drive IO2 and IO3 enable" "0,1"
|
|
bitfld.long 0x00 1. "QRD,Quad-SPI mode read select" "0,1"
|
|
bitfld.long 0x00 0. "QMOD,Quad-SPI mode enable" "0,1"
|
|
tree.end
|
|
tree "SPI1"
|
|
base ad:0x40003800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 15. "BDEN,Bidirectional enable" "0,1"
|
|
bitfld.long 0x00 14. "BDOEN,Bidirectional Transmit output enable" "0,1"
|
|
bitfld.long 0x00 13. "CRCEN,CRC Calculation Enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCNT,CRC Next Transfer" "0,1"
|
|
bitfld.long 0x00 11. "FF16,Data frame format" "0,1"
|
|
bitfld.long 0x00 10. "RO,Receive only" "0,1"
|
|
bitfld.long 0x00 9. "SWNSSEN,NSS Software Mode Selection" "0,1"
|
|
bitfld.long 0x00 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1"
|
|
bitfld.long 0x00 7. "LF,LSB First Mode" "0,1"
|
|
bitfld.long 0x00 6. "SPIEN,SPI enable" "0,1"
|
|
bitfld.long 0x00 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "MSTMOD,Master Mode Enable" "0,1"
|
|
bitfld.long 0x00 1. "CKPL,Clock polarity Selection" "0,1"
|
|
bitfld.long 0x00 0. "CKPH,Clock Phase Selection" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TBEIE,Tx buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "RBNEIE,RX buffer not empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMOD,SPI TI Mode Enable" "0,1"
|
|
bitfld.long 0x00 3. "NSSP,SPI NSS pulse mode Enable" "0,1"
|
|
bitfld.long 0x00 2. "NSSDRV,Drive NSS Output" "0,1"
|
|
bitfld.long 0x00 1. "DMATEN,Transmit Buffer DMA Enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAREN,Rx buffer DMA enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 8. "FERR,Format Error" "0,1"
|
|
rbitfld.long 0x00 7. "TRANS,Transmitting On-going Bit" "0,1"
|
|
rbitfld.long 0x00 6. "RXORERR,Reception Overrun Error Bit" "0,1"
|
|
rbitfld.long 0x00 5. "CONFERR,SPI Configuration error" "0,1"
|
|
bitfld.long 0x00 4. "CRCERR,SPI CRC Error Bit" "0,1"
|
|
rbitfld.long 0x00 3. "TXURERR,Transmission underrun error bit" "0,1"
|
|
rbitfld.long 0x00 2. "I2SCH,I2S channel side" "0,1"
|
|
rbitfld.long 0x00 1. "TBE,Transmit Buffer Empty" "0,1"
|
|
rbitfld.long 0x00 0. "RBNE,Receive Buffer Not Empty" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SPI_DATA,Data transfer register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RCRC,RX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCRC,RX CRC register"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TCRC,TX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TCRC,Tx CRC register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "I2SCTL,I2S control register"
|
|
bitfld.long 0x00 11. "I2SSEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x00 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "I2SOPMOD,I2S operation mode" "0,1,2,3"
|
|
bitfld.long 0x00 7. "PCMSMOD,PCM frame synchronization mode" "0,1"
|
|
bitfld.long 0x00 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x00 3. "CKPL,Idle state clock polarity" "0,1"
|
|
bitfld.long 0x00 1.--2. "DTLEN,Data length" "0,1,2,3"
|
|
bitfld.long 0x00 0. "CHLEN,Channel length (number of bits per audio channel)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x00 9. "MCKOEN,I2S_MCK output enable" "0,1"
|
|
bitfld.long 0x00 8. "OF,Odd factor for the prescaler" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Dividing factor for the prescaler"
|
|
tree.end
|
|
tree.end
|
|
tree "SQPI (Serial/Quad Parallel Interface)"
|
|
tree "SEC_SQPI"
|
|
base ad:0x50025400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INIT,SQPI Initial Register"
|
|
bitfld.long 0x00 31. "PL,Read data sample polarity" "0,1"
|
|
bitfld.long 0x00 29.--30. "IDLEN,SQPI controller external memory ID length" "0,1,2,3"
|
|
bitfld.long 0x00 24.--28. "ADDRBIT,Bit number of SPI PSRAM address phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 18.--23. "CLKDIV,Clock divider for SQPI output clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--17. "CMDBIT,Bit number of SQPI controller command phase" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RCMD,SQPI Read Command Register"
|
|
bitfld.long 0x00 31. "RID,Send read ID command" "0,1"
|
|
bitfld.long 0x00 20.--22. "RMODE,SQPI controller read command mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--19. "RWAITCYCLE,SQPI read command waitcycle number after address phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCMD,SQPI read command for AHB read transfer"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "WCMD,Write Command Register"
|
|
bitfld.long 0x00 31. "SCMD,Send special command" "0,1"
|
|
bitfld.long 0x00 20.--22. "WMODE,SQPI controller write command mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--19. "WWAITCYCLE,SQPI write command waitcycle number after address phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "WCMD,SQPI write command for AHB write transfer"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IDL,ID Low Register"
|
|
hexmask.long 0x00 0.--31. 1. "IDL,ID Low Data saved for SQPI Read ID Command"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "IDH,ID High Register"
|
|
hexmask.long 0x00 0.--31. 1. "IDH,ID High Data saved for SQPI read ID command"
|
|
tree.end
|
|
tree "SQPI"
|
|
base ad:0x40025400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INIT,SQPI Initial Register"
|
|
bitfld.long 0x00 31. "PL,Read data sample polarity" "0,1"
|
|
bitfld.long 0x00 29.--30. "IDLEN,SQPI controller external memory ID length" "0,1,2,3"
|
|
bitfld.long 0x00 24.--28. "ADDRBIT,Bit number of SPI PSRAM address phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 18.--23. "CLKDIV,Clock divider for SQPI output clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--17. "CMDBIT,Bit number of SQPI controller command phase" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RCMD,SQPI Read Command Register"
|
|
bitfld.long 0x00 31. "RID,Send read ID command" "0,1"
|
|
bitfld.long 0x00 20.--22. "RMODE,SQPI controller read command mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--19. "RWAITCYCLE,SQPI read command waitcycle number after address phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCMD,SQPI read command for AHB read transfer"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "WCMD,Write Command Register"
|
|
bitfld.long 0x00 31. "SCMD,Send special command" "0,1"
|
|
bitfld.long 0x00 20.--22. "WMODE,SQPI controller write command mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--19. "WWAITCYCLE,SQPI write command waitcycle number after address phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "WCMD,SQPI write command for AHB write transfer"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IDL,ID Low Register"
|
|
hexmask.long 0x00 0.--31. 1. "IDL,ID Low Data saved for SQPI Read ID Command"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "IDH,ID High Register"
|
|
hexmask.long 0x00 0.--31. 1. "IDH,ID High Data saved for SQPI read ID command"
|
|
tree.end
|
|
tree.end
|
|
tree "SYSCFG (System configuration controller)"
|
|
tree "SEC_SYSCFG"
|
|
base ad:0x50013800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG0,Configuration register 0"
|
|
bitfld.long 0x00 0.--1. "BOOT_MODE,Boot mode" "0,1,2,3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "EXTISS0,EXTI sources selection register 0"
|
|
bitfld.long 0x00 12.--15. "EXTI3_SS,EXTI 3 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI2_SS,EXTI 2 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI1_SS,EXTI 1 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI0_SS,EXTI 0 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "EXTISS1,EXTI sources selection register 1"
|
|
bitfld.long 0x00 12.--15. "EXTI7_SS,EXTI 7 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI6_SS,EXTI 6 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI5_SS,EXTI 5 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI4_SS,EXTI 4 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "EXTISS2,EXTI sources selection register 2"
|
|
bitfld.long 0x00 12.--15. "EXTI11_SS,EXTI 11 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI10_SS,EXTI 10 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI9_SS,EXTI 9 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI8_SS,EXTI 8 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "EXTISS3,EXTI sources selection register 3"
|
|
bitfld.long 0x00 12.--15. "EXTI15_SS,EXTI 15 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI14_SS,EXTI 14 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI13_SS,EXTI 13 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI12_SS,EXTI 12 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CPSCTL,I/O compensation control register"
|
|
rbitfld.long 0x00 8. "CPS_RDY,I/O compensation cell is ready or not" "0,1"
|
|
bitfld.long 0x00 0. "CPS_EN,I/O compensation cell enable" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SECFG,SYSCFG secure configuration register"
|
|
bitfld.long 0x00 3. "FPUSE,FPU security" "0,1"
|
|
bitfld.long 0x00 2. "SRAM1SE,SRAM1 security" "0,1"
|
|
bitfld.long 0x00 1. "CLASSBSE,ClassB security" "0,1"
|
|
bitfld.long 0x00 0. "SYSCFGSE,SYSCFG clock control security" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "FPUINTMSK,FPU interrupt mask register"
|
|
bitfld.long 0x00 0.--5. "FPU_IE,Floating point unit interrupts enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CNSLOCK,SYSCFG CPU non-secure lock register"
|
|
bitfld.long 0x00 1. "LOCKNSMPU,Non-secure MPU registers lock" "0,1"
|
|
bitfld.long 0x00 0. "LOCKNSVTOR,VTOR_NS register lock" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CSLOCK,SYSCFG CPU secure lock register"
|
|
bitfld.long 0x00 2. "SAULK,SAU registers lock" "0,1"
|
|
bitfld.long 0x00 1. "SMPULK,Secure MPU registers lock" "0,1"
|
|
bitfld.long 0x00 0. "VTSAIRLK,VTOR_S register and AIRCR register bits lock" "0,1"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CFG1,SYSCFG configuration register 1"
|
|
bitfld.long 0x00 2. "LVD_LOCK,LVD lock enable bit" "0,1"
|
|
bitfld.long 0x00 0. "LOCKUP_LOCK,Cortex M33 LOCKUP (hardfault) output enable bit" "0,1"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SCS,SYSCFG SRAM1 control and status register"
|
|
rbitfld.long 0x00 1. "SRAM1BSY,SRAM1 busy by erase operation" "0,1"
|
|
bitfld.long 0x00 0. "SRAM1ERS,SRAM1 erase" "0,1"
|
|
wgroup.long 0x5C++0x03
|
|
line.long 0x00 "SKEY,SYSCFG SRAM1 key register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "KEY,SRAM1 write protection key for software erase"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SWP0,SYSCFG SRAM1 write protection register 0"
|
|
bitfld.long 0x00 31. "P31WP,SRAM1 1 Kbyte page 31 write protection" "0,1"
|
|
bitfld.long 0x00 30. "P30WP,SRAM1 1 Kbyte page 30 write protection" "0,1"
|
|
bitfld.long 0x00 29. "P29WP,SRAM1 1 Kbyte page 29 write protection" "0,1"
|
|
bitfld.long 0x00 28. "P28WP,SRAM1 1 Kbyte page 28 write protection" "0,1"
|
|
bitfld.long 0x00 27. "P27WP,SRAM1 1 Kbyte page 27 write protection" "0,1"
|
|
bitfld.long 0x00 26. "P26WP,SRAM1 1 Kbyte page 26 write protection" "0,1"
|
|
bitfld.long 0x00 25. "P25WP,SRAM1 1 Kbyte page 25 write protection" "0,1"
|
|
bitfld.long 0x00 24. "P24WP,SRAM1 1 Kbyte page 24 write protection" "0,1"
|
|
bitfld.long 0x00 23. "P23WP,SRAM1 1 Kbyte page 23 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "P22WP,SRAM1 1 Kbyte page 22 write protection" "0,1"
|
|
bitfld.long 0x00 21. "P21WP,SRAM1 1 Kbyte page 21 write protection" "0,1"
|
|
bitfld.long 0x00 20. "P20WP,SRAM1 1 Kbyte page 20 write protection" "0,1"
|
|
bitfld.long 0x00 19. "P19WP,SRAM1 1 Kbyte page 19 write protection" "0,1"
|
|
bitfld.long 0x00 18. "P18WP,SRAM1 1 Kbyte page 18 write protection" "0,1"
|
|
bitfld.long 0x00 17. "P17WP,SRAM1 1 Kbyte page 17 write protection" "0,1"
|
|
bitfld.long 0x00 16. "P16WP,SRAM1 1 Kbyte page 16 write protection" "0,1"
|
|
bitfld.long 0x00 15. "P15WP,SRAM1 1 Kbyte page 15 write protection" "0,1"
|
|
bitfld.long 0x00 14. "P14WP,SRAM1 1 Kbyte page 14 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "P13WP,SRAM1 1 Kbyte page 13 write protection" "0,1"
|
|
bitfld.long 0x00 12. "P12WP,SRAM1 1 Kbyte page 12 write protection" "0,1"
|
|
bitfld.long 0x00 11. "P11WP,SRAM1 1 Kbyte page 11 write protection" "0,1"
|
|
bitfld.long 0x00 10. "P10WP,SRAM1 1 Kbyte page 10 write protection" "0,1"
|
|
bitfld.long 0x00 9. "P9WP,SRAM1 1 Kbyte page 9 write protection" "0,1"
|
|
bitfld.long 0x00 8. "P8WP,SRAM1 1 Kbyte page 8 write protection" "0,1"
|
|
bitfld.long 0x00 7. "P7WP,SRAM1 1 Kbyte page 7 write protection" "0,1"
|
|
bitfld.long 0x00 6. "P6WP,SRAM1 1 Kbyte page 6 write protection" "0,1"
|
|
bitfld.long 0x00 5. "P5WP,SRAM1 1 Kbyte page 5 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "P4WP,SRAM1 1 Kbyte page 4 write protection" "0,1"
|
|
bitfld.long 0x00 3. "P3WP,SRAM1 1 Kbyte page 3 write protection" "0,1"
|
|
bitfld.long 0x00 2. "P2WP,SRAM1 1 Kbyte page 2 write protection" "0,1"
|
|
bitfld.long 0x00 1. "P1WP,SRAM1 1 Kbyte page 1 write protection" "0,1"
|
|
bitfld.long 0x00 0. "P0WP,SRAM1 1 Kbyte page 0 write protection" "0,1"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SWP1,SYSCFG SRAM1 write protection register 1"
|
|
bitfld.long 0x00 31. "P63WP,SRAM1 1 Kbyte page 63 write protection" "0,1"
|
|
bitfld.long 0x00 30. "P62WP,SRAM1 1 Kbyte page 62 write protection" "0,1"
|
|
bitfld.long 0x00 29. "P61WP,SRAM1 1 Kbyte page 61 write protection" "0,1"
|
|
bitfld.long 0x00 28. "P60WP,SRAM1 1 Kbyte page 60 write protection" "0,1"
|
|
bitfld.long 0x00 27. "P59WP,SRAM1 1 Kbyte page 59 write protection" "0,1"
|
|
bitfld.long 0x00 26. "P58WP,SRAM1 1 Kbyte page 58 write protection" "0,1"
|
|
bitfld.long 0x00 25. "P57WP,SRAM1 1 Kbyte page 57 write protection" "0,1"
|
|
bitfld.long 0x00 24. "P56WP,SRAM1 1 Kbyte page 56 write protection" "0,1"
|
|
bitfld.long 0x00 23. "P55WP,SRAM1 1 Kbyte page 55 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "P54WP,SRAM1 1 Kbyte page 54 write protection" "0,1"
|
|
bitfld.long 0x00 21. "P53WP,SRAM1 1 Kbyte page 53 write protection" "0,1"
|
|
bitfld.long 0x00 20. "P52WP,SRAM1 1 Kbyte page 52 write protection" "0,1"
|
|
bitfld.long 0x00 19. "P51WP,SRAM1 1 Kbyte page 51 write protection" "0,1"
|
|
bitfld.long 0x00 18. "P50WP,SRAM1 1 Kbyte page 50 write protection" "0,1"
|
|
bitfld.long 0x00 17. "P49WP,SRAM1 1 Kbyte page 49 write protection" "0,1"
|
|
bitfld.long 0x00 16. "P48WP,SRAM1 1 Kbyte page 48 write protection" "0,1"
|
|
bitfld.long 0x00 15. "P47WP,SRAM1 1 Kbyte page 47 write protection" "0,1"
|
|
bitfld.long 0x00 14. "P46WP,SRAM1 1 Kbyte page 46 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "P45WP,SRAM1 1 Kbyte page 45 write protection" "0,1"
|
|
bitfld.long 0x00 12. "P44WP,SRAM1 1 Kbyte page 44 write protection" "0,1"
|
|
bitfld.long 0x00 11. "P43WP,SRAM1 1 Kbyte page 43 write protection" "0,1"
|
|
bitfld.long 0x00 10. "P42WP,SRAM1 1 Kbyte page 42 write protection" "0,1"
|
|
bitfld.long 0x00 9. "P41WP,SRAM1 1 Kbyte page 41 write protection" "0,1"
|
|
bitfld.long 0x00 8. "P40WP,SRAM1 1 Kbyte page 40 write protection" "0,1"
|
|
bitfld.long 0x00 7. "P39WP,SRAM1 1 Kbyte page 39 write protection" "0,1"
|
|
bitfld.long 0x00 6. "P38WP,SRAM1 1 Kbyte page 38 write protection" "0,1"
|
|
bitfld.long 0x00 5. "P37WP,SRAM1 1 Kbyte page 37 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "P36WP,SRAM1 1 Kbyte page 36 write protection" "0,1"
|
|
bitfld.long 0x00 3. "P35WP,SRAM1 1 Kbyte page 35 write protection" "0,1"
|
|
bitfld.long 0x00 2. "P34WP,SRAM1 1 Kbyte page 34 write protection" "0,1"
|
|
bitfld.long 0x00 1. "P33WP,SRAM1 1 Kbyte page 33 write protection" "0,1"
|
|
bitfld.long 0x00 0. "P32WP,SRAM1 1 Kbyte page 32 write protection" "0,1"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "RSSCMD,SYSCFG RSS command register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RSSCMD,RSS commands"
|
|
tree.end
|
|
tree "SYSCFG"
|
|
base ad:0x40013800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG0,Configuration register 0"
|
|
bitfld.long 0x00 0.--1. "BOOT_MODE,Boot mode" "0,1,2,3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "EXTISS0,EXTI sources selection register 0"
|
|
bitfld.long 0x00 12.--15. "EXTI3_SS,EXTI 3 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI2_SS,EXTI 2 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI1_SS,EXTI 1 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI0_SS,EXTI 0 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "EXTISS1,EXTI sources selection register 1"
|
|
bitfld.long 0x00 12.--15. "EXTI7_SS,EXTI 7 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI6_SS,EXTI 6 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI5_SS,EXTI 5 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI4_SS,EXTI 4 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "EXTISS2,EXTI sources selection register 2"
|
|
bitfld.long 0x00 12.--15. "EXTI11_SS,EXTI 11 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI10_SS,EXTI 10 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI9_SS,EXTI 9 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI8_SS,EXTI 8 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "EXTISS3,EXTI sources selection register 3"
|
|
bitfld.long 0x00 12.--15. "EXTI15_SS,EXTI 15 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI14_SS,EXTI 14 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI13_SS,EXTI 13 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI12_SS,EXTI 12 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CPSCTL,I/O compensation control register"
|
|
rbitfld.long 0x00 8. "CPS_RDY,I/O compensation cell is ready or not" "0,1"
|
|
bitfld.long 0x00 0. "CPS_EN,I/O compensation cell enable" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SECFG,SYSCFG secure configuration register"
|
|
bitfld.long 0x00 3. "FPUSE,FPU security" "0,1"
|
|
bitfld.long 0x00 2. "SRAM1SE,SRAM1 security" "0,1"
|
|
bitfld.long 0x00 1. "CLASSBSE,ClassB security" "0,1"
|
|
bitfld.long 0x00 0. "SYSCFGSE,SYSCFG clock control security" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "FPUINTMSK,FPU interrupt mask register"
|
|
bitfld.long 0x00 0.--5. "FPU_IE,Floating point unit interrupts enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CNSLOCK,SYSCFG CPU non-secure lock register"
|
|
bitfld.long 0x00 1. "LOCKNSMPU,Non-secure MPU registers lock" "0,1"
|
|
bitfld.long 0x00 0. "LOCKNSVTOR,VTOR_NS register lock" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CSLOCK,SYSCFG CPU secure lock register"
|
|
bitfld.long 0x00 2. "SAULK,SAU registers lock" "0,1"
|
|
bitfld.long 0x00 1. "SMPULK,Secure MPU registers lock" "0,1"
|
|
bitfld.long 0x00 0. "VTSAIRLK,VTOR_S register and AIRCR register bits lock" "0,1"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CFG1,SYSCFG configuration register 1"
|
|
bitfld.long 0x00 2. "LVD_LOCK,LVD lock enable bit" "0,1"
|
|
bitfld.long 0x00 0. "LOCKUP_LOCK,Cortex M33 LOCKUP (hardfault) output enable bit" "0,1"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SCS,SYSCFG SRAM1 control and status register"
|
|
rbitfld.long 0x00 1. "SRAM1BSY,SRAM1 busy by erase operation" "0,1"
|
|
bitfld.long 0x00 0. "SRAM1ERS,SRAM1 erase" "0,1"
|
|
wgroup.long 0x5C++0x03
|
|
line.long 0x00 "SKEY,SYSCFG SRAM1 key register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "KEY,SRAM1 write protection key for software erase"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SWP0,SYSCFG SRAM1 write protection register 0"
|
|
bitfld.long 0x00 31. "P31WP,SRAM1 1 Kbyte page 31 write protection" "0,1"
|
|
bitfld.long 0x00 30. "P30WP,SRAM1 1 Kbyte page 30 write protection" "0,1"
|
|
bitfld.long 0x00 29. "P29WP,SRAM1 1 Kbyte page 29 write protection" "0,1"
|
|
bitfld.long 0x00 28. "P28WP,SRAM1 1 Kbyte page 28 write protection" "0,1"
|
|
bitfld.long 0x00 27. "P27WP,SRAM1 1 Kbyte page 27 write protection" "0,1"
|
|
bitfld.long 0x00 26. "P26WP,SRAM1 1 Kbyte page 26 write protection" "0,1"
|
|
bitfld.long 0x00 25. "P25WP,SRAM1 1 Kbyte page 25 write protection" "0,1"
|
|
bitfld.long 0x00 24. "P24WP,SRAM1 1 Kbyte page 24 write protection" "0,1"
|
|
bitfld.long 0x00 23. "P23WP,SRAM1 1 Kbyte page 23 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "P22WP,SRAM1 1 Kbyte page 22 write protection" "0,1"
|
|
bitfld.long 0x00 21. "P21WP,SRAM1 1 Kbyte page 21 write protection" "0,1"
|
|
bitfld.long 0x00 20. "P20WP,SRAM1 1 Kbyte page 20 write protection" "0,1"
|
|
bitfld.long 0x00 19. "P19WP,SRAM1 1 Kbyte page 19 write protection" "0,1"
|
|
bitfld.long 0x00 18. "P18WP,SRAM1 1 Kbyte page 18 write protection" "0,1"
|
|
bitfld.long 0x00 17. "P17WP,SRAM1 1 Kbyte page 17 write protection" "0,1"
|
|
bitfld.long 0x00 16. "P16WP,SRAM1 1 Kbyte page 16 write protection" "0,1"
|
|
bitfld.long 0x00 15. "P15WP,SRAM1 1 Kbyte page 15 write protection" "0,1"
|
|
bitfld.long 0x00 14. "P14WP,SRAM1 1 Kbyte page 14 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "P13WP,SRAM1 1 Kbyte page 13 write protection" "0,1"
|
|
bitfld.long 0x00 12. "P12WP,SRAM1 1 Kbyte page 12 write protection" "0,1"
|
|
bitfld.long 0x00 11. "P11WP,SRAM1 1 Kbyte page 11 write protection" "0,1"
|
|
bitfld.long 0x00 10. "P10WP,SRAM1 1 Kbyte page 10 write protection" "0,1"
|
|
bitfld.long 0x00 9. "P9WP,SRAM1 1 Kbyte page 9 write protection" "0,1"
|
|
bitfld.long 0x00 8. "P8WP,SRAM1 1 Kbyte page 8 write protection" "0,1"
|
|
bitfld.long 0x00 7. "P7WP,SRAM1 1 Kbyte page 7 write protection" "0,1"
|
|
bitfld.long 0x00 6. "P6WP,SRAM1 1 Kbyte page 6 write protection" "0,1"
|
|
bitfld.long 0x00 5. "P5WP,SRAM1 1 Kbyte page 5 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "P4WP,SRAM1 1 Kbyte page 4 write protection" "0,1"
|
|
bitfld.long 0x00 3. "P3WP,SRAM1 1 Kbyte page 3 write protection" "0,1"
|
|
bitfld.long 0x00 2. "P2WP,SRAM1 1 Kbyte page 2 write protection" "0,1"
|
|
bitfld.long 0x00 1. "P1WP,SRAM1 1 Kbyte page 1 write protection" "0,1"
|
|
bitfld.long 0x00 0. "P0WP,SRAM1 1 Kbyte page 0 write protection" "0,1"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SWP1,SYSCFG SRAM1 write protection register 1"
|
|
bitfld.long 0x00 31. "P63WP,SRAM1 1 Kbyte page 63 write protection" "0,1"
|
|
bitfld.long 0x00 30. "P62WP,SRAM1 1 Kbyte page 62 write protection" "0,1"
|
|
bitfld.long 0x00 29. "P61WP,SRAM1 1 Kbyte page 61 write protection" "0,1"
|
|
bitfld.long 0x00 28. "P60WP,SRAM1 1 Kbyte page 60 write protection" "0,1"
|
|
bitfld.long 0x00 27. "P59WP,SRAM1 1 Kbyte page 59 write protection" "0,1"
|
|
bitfld.long 0x00 26. "P58WP,SRAM1 1 Kbyte page 58 write protection" "0,1"
|
|
bitfld.long 0x00 25. "P57WP,SRAM1 1 Kbyte page 57 write protection" "0,1"
|
|
bitfld.long 0x00 24. "P56WP,SRAM1 1 Kbyte page 56 write protection" "0,1"
|
|
bitfld.long 0x00 23. "P55WP,SRAM1 1 Kbyte page 55 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "P54WP,SRAM1 1 Kbyte page 54 write protection" "0,1"
|
|
bitfld.long 0x00 21. "P53WP,SRAM1 1 Kbyte page 53 write protection" "0,1"
|
|
bitfld.long 0x00 20. "P52WP,SRAM1 1 Kbyte page 52 write protection" "0,1"
|
|
bitfld.long 0x00 19. "P51WP,SRAM1 1 Kbyte page 51 write protection" "0,1"
|
|
bitfld.long 0x00 18. "P50WP,SRAM1 1 Kbyte page 50 write protection" "0,1"
|
|
bitfld.long 0x00 17. "P49WP,SRAM1 1 Kbyte page 49 write protection" "0,1"
|
|
bitfld.long 0x00 16. "P48WP,SRAM1 1 Kbyte page 48 write protection" "0,1"
|
|
bitfld.long 0x00 15. "P47WP,SRAM1 1 Kbyte page 47 write protection" "0,1"
|
|
bitfld.long 0x00 14. "P46WP,SRAM1 1 Kbyte page 46 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "P45WP,SRAM1 1 Kbyte page 45 write protection" "0,1"
|
|
bitfld.long 0x00 12. "P44WP,SRAM1 1 Kbyte page 44 write protection" "0,1"
|
|
bitfld.long 0x00 11. "P43WP,SRAM1 1 Kbyte page 43 write protection" "0,1"
|
|
bitfld.long 0x00 10. "P42WP,SRAM1 1 Kbyte page 42 write protection" "0,1"
|
|
bitfld.long 0x00 9. "P41WP,SRAM1 1 Kbyte page 41 write protection" "0,1"
|
|
bitfld.long 0x00 8. "P40WP,SRAM1 1 Kbyte page 40 write protection" "0,1"
|
|
bitfld.long 0x00 7. "P39WP,SRAM1 1 Kbyte page 39 write protection" "0,1"
|
|
bitfld.long 0x00 6. "P38WP,SRAM1 1 Kbyte page 38 write protection" "0,1"
|
|
bitfld.long 0x00 5. "P37WP,SRAM1 1 Kbyte page 37 write protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "P36WP,SRAM1 1 Kbyte page 36 write protection" "0,1"
|
|
bitfld.long 0x00 3. "P35WP,SRAM1 1 Kbyte page 35 write protection" "0,1"
|
|
bitfld.long 0x00 2. "P34WP,SRAM1 1 Kbyte page 34 write protection" "0,1"
|
|
bitfld.long 0x00 1. "P33WP,SRAM1 1 Kbyte page 33 write protection" "0,1"
|
|
bitfld.long 0x00 0. "P32WP,SRAM1 1 Kbyte page 32 write protection" "0,1"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "RSSCMD,SYSCFG RSS command register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RSSCMD,RSS commands"
|
|
tree.end
|
|
tree.end
|
|
tree "TIMER (Timer/Counter)"
|
|
tree "SEC_TIMER0"
|
|
base ad:0x50010000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 14. "ISO3,Idle state of channel 3 output" "0,1"
|
|
bitfld.long 0x00 13. "ISO2N,Idle state of channel 2 complementary output" "0,1"
|
|
bitfld.long 0x00 12. "ISO2,Idle state of channel 2 output" "0,1"
|
|
bitfld.long 0x00 11. "ISO1N,Idle state of channel 1 complementary output" "0,1"
|
|
bitfld.long 0x00 10. "ISO1,Idle state of channel 1 output" "0,1"
|
|
bitfld.long 0x00 9. "ISO0N,Idle state of channel 0 complementary output" "0,1"
|
|
bitfld.long 0x00 8. "ISO0,Idle state of channel 0 output" "0,1"
|
|
bitfld.long 0x00 7. "TI0S,Channel 0 trigger input selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,DMA request source selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CCUC,Commutation control shadow register update control" "0,1"
|
|
bitfld.long 0x00 0. "CCSE,Commutation control shadow enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode configuration register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SCM1,Part of SMC for enable External clock mode1" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 13. "CMTDEN,Reserved" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 0 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 7. "BRKIE,Break interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "CMTIE,COM interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,status register"
|
|
bitfld.long 0x00 12. "CH3OF,Channel 3 over capture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Channel 2 over capture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Channel 1 over capture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Channel 0 over capture flag" "0,1"
|
|
bitfld.long 0x00 7. "BRKIF,Break interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CMTIF,COM interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,Software event generation register"
|
|
bitfld.long 0x00 7. "BRKG,Break event generation" "0,1"
|
|
bitfld.long 0x00 6. "TRGG,Trigger event generation" "0,1"
|
|
bitfld.long 0x00 5. "CMTG,Channel commutation event generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Channel 3's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Channel 2's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Channel 1's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Channel 0's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update event generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Channel 1 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Channel 1 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Channel 1 output compare shadow enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Channel 1 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Channel 0 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Channel 0 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Channel 0 compare output shadow enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Channel 0 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Channel 0 I/O mode selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Channel 1 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Channel 1 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Channel 0 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Channel 0 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Channel 0 mode selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Channel 3 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Channel 3 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Channel 3 output compare shadow enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Channel 3 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Channel 2 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Channel 2 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Channel 2 compare output shadow enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Channel 2 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Channel 2 I/O mode selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Channel 3 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Channel 3 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 10. "CH2NEN,Capture/Compare 2 complementary output enable" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 6. "CH1NEN,Capture/Compare 1 complementary output enable" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 2. "CH0NEN,Capture/Compare 0 complementary output enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 1 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Counter auto reload value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CREP,repetition counter register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CREP,Repetition counter value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Capture/Compare 0 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH1VAL,Capture/Compare 1 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH2VAL,Capture/Compare 2 value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH3VAL,Capture/Compare 3 value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CCHP,channel complementary protection register"
|
|
bitfld.long 0x00 15. "POEN,Primary output enable" "0,1"
|
|
bitfld.long 0x00 14. "OAEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x00 13. "BRKP,Break polarity" "0,1"
|
|
bitfld.long 0x00 12. "BRKEN,Break enable" "0,1"
|
|
bitfld.long 0x00 11. "ROS,Off-state selection for Run mode" "0,1"
|
|
bitfld.long 0x00 10. "IOS,Off-state selection for Idle mode" "0,1"
|
|
bitfld.long 0x00 8.--9. "PROT,Lock configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DTCFG,Dead-time generator setup"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA configuration register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA transfer count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA transfer access start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA transfer buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA transfer buffer"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration register"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
bitfld.long 0x00 0. "OUTSEL,The output value selection" "0,1"
|
|
tree.end
|
|
tree "SEC_TIMER1"
|
|
base ad:0x50000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long 0x00 0.--31. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long 0x00 0.--31. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long 0x00 0.--31. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "SEC_TIMER2"
|
|
base ad:0x50000400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "SEC_TIMER3"
|
|
base ad:0x50000800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long 0x00 0.--31. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long 0x00 0.--31. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long 0x00 0.--31. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "SEC_TIMER4"
|
|
base ad:0x50000C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "SEC_TIMER5"
|
|
base ad:0x50001000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,status register"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Low counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Low Auto-reload value"
|
|
tree.end
|
|
repeat 2. (list 15. 16.) (list ad:0x50018000 ad:0x50018400)
|
|
tree "SEC_TIMER$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 9. "ISO0N,Output Idle state 0" "0,1"
|
|
bitfld.long 0x00 8. "ISO0,Output Idle state 0" "0,1"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
bitfld.long 0x00 2. "CCUC,Capture/compare control update selection" "0,1"
|
|
bitfld.long 0x00 0. "CCSE,Capture/compare preloaded control" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 0 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 7. "BRKIE,Break interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "CMTIE,COM interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 7. "BRKIF,Break interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CMTIF,COM interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 7. "BRKG,Break generation" "0,1"
|
|
bitfld.long 0x00 5. "CMTG,Capture/Compare control update generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output Compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output Compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output Compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 2. "CH0NEN,Capture/Compare 0 complementary output enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Auto-reload value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CREP,repetition counter register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CREP,Repetition counter value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Capture/Compare 0 value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CCHP,break and dead-time register"
|
|
bitfld.long 0x00 15. "POEN,Main output enable" "0,1"
|
|
bitfld.long 0x00 14. "OAEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x00 13. "BRKP,Break polarity" "0,1"
|
|
bitfld.long 0x00 12. "BRKEN,Break enable" "0,1"
|
|
bitfld.long 0x00 11. "ROS,Off-state selection for Run mode" "0,1"
|
|
bitfld.long 0x00 10. "IOS,Off-state selection for Idle mode" "0,1"
|
|
bitfld.long 0x00 8.--9. "PROT,complementary register protect control" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DTCFG,Dead-time generator setup"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA configuration register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA transfer count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA transfer access start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA transfer buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,configuration register"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
bitfld.long 0x00 0. "OUTSEL,The output value selection" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree "TIMER0"
|
|
base ad:0x40010000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 14. "ISO3,Idle state of channel 3 output" "0,1"
|
|
bitfld.long 0x00 13. "ISO2N,Idle state of channel 2 complementary output" "0,1"
|
|
bitfld.long 0x00 12. "ISO2,Idle state of channel 2 output" "0,1"
|
|
bitfld.long 0x00 11. "ISO1N,Idle state of channel 1 complementary output" "0,1"
|
|
bitfld.long 0x00 10. "ISO1,Idle state of channel 1 output" "0,1"
|
|
bitfld.long 0x00 9. "ISO0N,Idle state of channel 0 complementary output" "0,1"
|
|
bitfld.long 0x00 8. "ISO0,Idle state of channel 0 output" "0,1"
|
|
bitfld.long 0x00 7. "TI0S,Channel 0 trigger input selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,DMA request source selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CCUC,Commutation control shadow register update control" "0,1"
|
|
bitfld.long 0x00 0. "CCSE,Commutation control shadow enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode configuration register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SCM1,Part of SMC for enable External clock mode1" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 13. "CMTDEN,Reserved" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 0 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 7. "BRKIE,Break interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "CMTIE,COM interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,status register"
|
|
bitfld.long 0x00 12. "CH3OF,Channel 3 over capture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Channel 2 over capture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Channel 1 over capture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Channel 0 over capture flag" "0,1"
|
|
bitfld.long 0x00 7. "BRKIF,Break interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CMTIF,COM interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,Software event generation register"
|
|
bitfld.long 0x00 7. "BRKG,Break event generation" "0,1"
|
|
bitfld.long 0x00 6. "TRGG,Trigger event generation" "0,1"
|
|
bitfld.long 0x00 5. "CMTG,Channel commutation event generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Channel 3's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Channel 2's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Channel 1's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Channel 0's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update event generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Channel 1 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Channel 1 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Channel 1 output compare shadow enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Channel 1 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Channel 0 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Channel 0 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Channel 0 compare output shadow enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Channel 0 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Channel 0 I/O mode selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Channel 1 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Channel 1 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Channel 0 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Channel 0 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Channel 0 mode selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Channel 3 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Channel 3 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Channel 3 output compare shadow enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Channel 3 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Channel 2 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Channel 2 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Channel 2 compare output shadow enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Channel 2 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Channel 2 I/O mode selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Channel 3 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Channel 3 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 10. "CH2NEN,Capture/Compare 2 complementary output enable" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 6. "CH1NEN,Capture/Compare 1 complementary output enable" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 2. "CH0NEN,Capture/Compare 0 complementary output enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 1 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Counter auto reload value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CREP,repetition counter register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CREP,Repetition counter value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Capture/Compare 0 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH1VAL,Capture/Compare 1 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH2VAL,Capture/Compare 2 value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH3VAL,Capture/Compare 3 value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CCHP,channel complementary protection register"
|
|
bitfld.long 0x00 15. "POEN,Primary output enable" "0,1"
|
|
bitfld.long 0x00 14. "OAEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x00 13. "BRKP,Break polarity" "0,1"
|
|
bitfld.long 0x00 12. "BRKEN,Break enable" "0,1"
|
|
bitfld.long 0x00 11. "ROS,Off-state selection for Run mode" "0,1"
|
|
bitfld.long 0x00 10. "IOS,Off-state selection for Idle mode" "0,1"
|
|
bitfld.long 0x00 8.--9. "PROT,Lock configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DTCFG,Dead-time generator setup"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA configuration register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA transfer count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA transfer access start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA transfer buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA transfer buffer"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration register"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
bitfld.long 0x00 0. "OUTSEL,The output value selection" "0,1"
|
|
tree.end
|
|
tree "TIMER1"
|
|
base ad:0x40000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long 0x00 0.--31. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long 0x00 0.--31. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long 0x00 0.--31. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "TIMER2"
|
|
base ad:0x40000400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "TIMER3"
|
|
base ad:0x40000800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long 0x00 0.--31. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long 0x00 0.--31. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long 0x00 0.--31. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "TIMER4"
|
|
base ad:0x40000C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "TIMER5"
|
|
base ad:0x40001000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,status register"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Low counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Low Auto-reload value"
|
|
tree.end
|
|
repeat 2. (list 15. 16.) (list ad:0x40018000 ad:0x40018400)
|
|
tree "TIMER$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 9. "ISO0N,Output Idle state 0" "0,1"
|
|
bitfld.long 0x00 8. "ISO0,Output Idle state 0" "0,1"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
bitfld.long 0x00 2. "CCUC,Capture/compare control update selection" "0,1"
|
|
bitfld.long 0x00 0. "CCSE,Capture/compare preloaded control" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 0 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 7. "BRKIE,Break interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "CMTIE,COM interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 7. "BRKIF,Break interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CMTIF,COM interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 7. "BRKG,Break generation" "0,1"
|
|
bitfld.long 0x00 5. "CMTG,Capture/Compare control update generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output Compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output Compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output Compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 2. "CH0NEN,Capture/Compare 0 complementary output enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Auto-reload value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CREP,repetition counter register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CREP,Repetition counter value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Capture/Compare 0 value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CCHP,break and dead-time register"
|
|
bitfld.long 0x00 15. "POEN,Main output enable" "0,1"
|
|
bitfld.long 0x00 14. "OAEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x00 13. "BRKP,Break polarity" "0,1"
|
|
bitfld.long 0x00 12. "BRKEN,Break enable" "0,1"
|
|
bitfld.long 0x00 11. "ROS,Off-state selection for Run mode" "0,1"
|
|
bitfld.long 0x00 10. "IOS,Off-state selection for Idle mode" "0,1"
|
|
bitfld.long 0x00 8.--9. "PROT,complementary register protect control" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DTCFG,Dead-time generator setup"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA configuration register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA transfer count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA transfer access start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA transfer buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,configuration register"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
bitfld.long 0x00 0. "OUTSEL,The output value selection" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TRNG (Ture random number generator)"
|
|
tree "SEC_TRNG"
|
|
base ad:0x5C060800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 3. "IE,Interrupt bit" "0,1"
|
|
bitfld.long 0x00 2. "TRNGEN,TRNG enable bit" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 6. "SEIF,Seed error interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CEIF,Clock error interrupt flag" "0,1"
|
|
rbitfld.long 0x00 2. "SECS,Seed error current status" "0,1"
|
|
rbitfld.long 0x00 1. "CECS,Clock error current status" "0,1"
|
|
rbitfld.long 0x00 0. "DRDY,Random data ready status bit" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long 0x00 0.--31. 1. "TRNDATA,32-bit random data"
|
|
tree.end
|
|
tree "TRNG"
|
|
base ad:0x4C060800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 3. "IE,Interrupt bit" "0,1"
|
|
bitfld.long 0x00 2. "TRNGEN,TRNG enable bit" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 6. "SEIF,Seed error interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CEIF,Clock error interrupt flag" "0,1"
|
|
rbitfld.long 0x00 2. "SECS,Seed error current status" "0,1"
|
|
rbitfld.long 0x00 1. "CECS,Clock error current status" "0,1"
|
|
rbitfld.long 0x00 0. "DRDY,Random data ready status bit" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long 0x00 0.--31. 1. "TRNDATA,32-bit random data"
|
|
tree.end
|
|
tree.end
|
|
tree "TSI (Touch sensing Interface)"
|
|
tree "SEC_TSI"
|
|
base ad:0x50024000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
bitfld.long 0x00 28.--31. "CDT,Charge transfer pulse high" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "CTDT,Charge transfer pulse low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 17.--23. 1. "ECDT,Spread spectrum deviation"
|
|
bitfld.long 0x00 16. "ECEN,Spread spectrum enable" "0,1"
|
|
bitfld.long 0x00 15. "ECDIV,Spread spectrum prescaler" "0,1"
|
|
bitfld.long 0x00 12.--14. "CTCDIV,pulse generator prescaler" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 5.--7. "MCN,Max count value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. "PINMOD,I/O Default mode" "0,1"
|
|
bitfld.long 0x00 3. "EGSEL,Edge selection" "0,1"
|
|
bitfld.long 0x00 2. "TRGMOD,Trigger mode selection" "0,1"
|
|
bitfld.long 0x00 1. "TSIS,Start a new acquisition" "0,1"
|
|
bitfld.long 0x00 0. "TSIEN,Touch sensing controller enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTEN,interrupt enable register"
|
|
bitfld.long 0x00 1. "MNERRIE,Max Cycle Number Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "CTCFIE,Charge-transfer complete flag Interrupt Enable" "0,1"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "INTC,interrupt flag clear register"
|
|
bitfld.long 0x00 1. "CMNERR,Clear max cycle number error" "0,1"
|
|
bitfld.long 0x00 0. "CCTCF,Clear charge-transfer complete flag" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 1. "MNERR,Max count error flag" "0,1"
|
|
bitfld.long 0x00 0. "CTCF,End of acquisition flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PHM,Pin hysteresis mode register"
|
|
bitfld.long 0x00 11. "G2P3,G2P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 7. "G1P3,G1P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 3. "G0P3,G0P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 Schmitt trigger hysteresis mode" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ASW,I/O analog switch register"
|
|
bitfld.long 0x00 11. "G2P3,G2P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 analog switch enable" "0,1"
|
|
bitfld.long 0x00 7. "G1P3,G1P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 analog switch enable" "0,1"
|
|
bitfld.long 0x00 3. "G0P3,G0P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 analog switch enable" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SAMPCFG,I/O sample configuration register"
|
|
bitfld.long 0x00 11. "G2P3,G2P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 sampling mode" "0,1"
|
|
bitfld.long 0x00 7. "G1P3,G1P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 sampling mode" "0,1"
|
|
bitfld.long 0x00 3. "G0P3,G0P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 sampling mode" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CHCFG,I/O channel configuration register"
|
|
bitfld.long 0x00 11. "G2P3,G2P3 channel mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 channel mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 channel mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 channel mode" "0,1"
|
|
bitfld.long 0x00 7. "G1P3,G1P3 channel mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 channel mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 channel mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 channel mode" "0,1"
|
|
bitfld.long 0x00 3. "G0P3,G0P3 channel mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 channel mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 channel mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 channel mode" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GCTL,I/O group control register"
|
|
rbitfld.long 0x00 18. "GC2,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x00 17. "GC1,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x00 16. "GC0,Analog I/O group x status" "0,1"
|
|
bitfld.long 0x00 2. "GE2,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x00 1. "GE1,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x00 0. "GE0,Analog I/O group x enable" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "G0CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "G1CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "G2CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
tree.end
|
|
tree "TSI"
|
|
base ad:0x40024000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
bitfld.long 0x00 28.--31. "CDT,Charge transfer pulse high" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "CTDT,Charge transfer pulse low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 17.--23. 1. "ECDT,Spread spectrum deviation"
|
|
bitfld.long 0x00 16. "ECEN,Spread spectrum enable" "0,1"
|
|
bitfld.long 0x00 15. "ECDIV,Spread spectrum prescaler" "0,1"
|
|
bitfld.long 0x00 12.--14. "CTCDIV,pulse generator prescaler" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 5.--7. "MCN,Max count value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. "PINMOD,I/O Default mode" "0,1"
|
|
bitfld.long 0x00 3. "EGSEL,Edge selection" "0,1"
|
|
bitfld.long 0x00 2. "TRGMOD,Trigger mode selection" "0,1"
|
|
bitfld.long 0x00 1. "TSIS,Start a new acquisition" "0,1"
|
|
bitfld.long 0x00 0. "TSIEN,Touch sensing controller enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTEN,interrupt enable register"
|
|
bitfld.long 0x00 1. "MNERRIE,Max Cycle Number Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "CTCFIE,Charge-transfer complete flag Interrupt Enable" "0,1"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "INTC,interrupt flag clear register"
|
|
bitfld.long 0x00 1. "CMNERR,Clear max cycle number error" "0,1"
|
|
bitfld.long 0x00 0. "CCTCF,Clear charge-transfer complete flag" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 1. "MNERR,Max count error flag" "0,1"
|
|
bitfld.long 0x00 0. "CTCF,End of acquisition flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PHM,Pin hysteresis mode register"
|
|
bitfld.long 0x00 11. "G2P3,G2P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 7. "G1P3,G1P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 3. "G0P3,G0P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 Schmitt trigger hysteresis mode" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ASW,I/O analog switch register"
|
|
bitfld.long 0x00 11. "G2P3,G2P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 analog switch enable" "0,1"
|
|
bitfld.long 0x00 7. "G1P3,G1P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 analog switch enable" "0,1"
|
|
bitfld.long 0x00 3. "G0P3,G0P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 analog switch enable" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SAMPCFG,I/O sample configuration register"
|
|
bitfld.long 0x00 11. "G2P3,G2P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 sampling mode" "0,1"
|
|
bitfld.long 0x00 7. "G1P3,G1P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 sampling mode" "0,1"
|
|
bitfld.long 0x00 3. "G0P3,G0P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 sampling mode" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CHCFG,I/O channel configuration register"
|
|
bitfld.long 0x00 11. "G2P3,G2P3 channel mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 channel mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 channel mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 channel mode" "0,1"
|
|
bitfld.long 0x00 7. "G1P3,G1P3 channel mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 channel mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 channel mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 channel mode" "0,1"
|
|
bitfld.long 0x00 3. "G0P3,G0P3 channel mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 channel mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 channel mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 channel mode" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GCTL,I/O group control register"
|
|
rbitfld.long 0x00 18. "GC2,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x00 17. "GC1,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x00 16. "GC0,Analog I/O group x status" "0,1"
|
|
bitfld.long 0x00 2. "GE2,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x00 1. "GE1,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x00 0. "GE0,Analog I/O group x enable" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "G0CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "G1CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "G2CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
tree.end
|
|
tree.end
|
|
tree "TZPCU (Memory protection controller - block based)"
|
|
tree "SEC_TZBMPC0"
|
|
base ad:0x500A0800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZBMPC0 control register"
|
|
bitfld.long 0x00 31. "SRWACFG,secure read/write illegal access disable" "0,1"
|
|
bitfld.long 0x00 30. "SECSTATCFG,default security state" "0,1"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VEC0,TZBMPC0 vector register 0"
|
|
bitfld.long 0x00 31. "B_31,blocks 31" "0,1"
|
|
bitfld.long 0x00 30. "B_30,blocks 30" "0,1"
|
|
bitfld.long 0x00 29. "B_29,blocks 29" "0,1"
|
|
bitfld.long 0x00 28. "B_28,blocks 28" "0,1"
|
|
bitfld.long 0x00 27. "B_27,blocks 27" "0,1"
|
|
bitfld.long 0x00 26. "B_26,blocks 26" "0,1"
|
|
bitfld.long 0x00 25. "B_25,blocks 25" "0,1"
|
|
bitfld.long 0x00 24. "B_24,blocks 24" "0,1"
|
|
bitfld.long 0x00 23. "B_23,blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "B_22,blocks 22" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_21,blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "B_20,blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "B_19,blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "B_18,blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "B_17,blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "B_16,blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "B_15,blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "B_14,blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "B_13,blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "B_12,blocks 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_11,blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "B_10,blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "B_9,blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "B_8,blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "B_7,blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "B_6,blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "B_5,blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "B_4,blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "B_3,blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "B_2,blocks 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_1,blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "B_0,blocks 0" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VEC1,TZBMPC0 vector register 1"
|
|
bitfld.long 0x00 31. "B_63,blocks 63" "0,1"
|
|
bitfld.long 0x00 30. "B_62,blocks 62" "0,1"
|
|
bitfld.long 0x00 29. "B_61,blocks 61" "0,1"
|
|
bitfld.long 0x00 28. "B_60,blocks 60" "0,1"
|
|
bitfld.long 0x00 27. "B_59,blocks 59" "0,1"
|
|
bitfld.long 0x00 26. "B_58,blocks 58" "0,1"
|
|
bitfld.long 0x00 25. "B_57,blocks 57" "0,1"
|
|
bitfld.long 0x00 24. "B_56,blocks 56" "0,1"
|
|
bitfld.long 0x00 23. "B_55,blocks 55" "0,1"
|
|
bitfld.long 0x00 22. "B_54,blocks 54" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_53,blocks 53" "0,1"
|
|
bitfld.long 0x00 20. "B_52,blocks 52" "0,1"
|
|
bitfld.long 0x00 19. "B_51,blocks 51" "0,1"
|
|
bitfld.long 0x00 18. "B_50,blocks 50" "0,1"
|
|
bitfld.long 0x00 17. "B_49,blocks 49" "0,1"
|
|
bitfld.long 0x00 16. "B_48,blocks 48" "0,1"
|
|
bitfld.long 0x00 15. "B_47,blocks 47" "0,1"
|
|
bitfld.long 0x00 14. "B_46,blocks 46" "0,1"
|
|
bitfld.long 0x00 13. "B_45,blocks 45" "0,1"
|
|
bitfld.long 0x00 12. "B_44,blocks 44" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_43,blocks 43" "0,1"
|
|
bitfld.long 0x00 10. "B_42,blocks 42" "0,1"
|
|
bitfld.long 0x00 9. "B_41,blocks 41" "0,1"
|
|
bitfld.long 0x00 8. "B_40,blocks 40" "0,1"
|
|
bitfld.long 0x00 7. "B_39,blocks 39" "0,1"
|
|
bitfld.long 0x00 6. "B_38,blocks 38" "0,1"
|
|
bitfld.long 0x00 5. "B_37,blocks 37" "0,1"
|
|
bitfld.long 0x00 4. "B_36,blocks 36" "0,1"
|
|
bitfld.long 0x00 3. "B_35,blocks 35" "0,1"
|
|
bitfld.long 0x00 2. "B_34,blocks 34" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_33,blocks 33" "0,1"
|
|
bitfld.long 0x00 0. "B_32,blocks 32" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VEC2,TZBMPC0 vector register 2"
|
|
bitfld.long 0x00 31. "B_95,blocks 95" "0,1"
|
|
bitfld.long 0x00 30. "B_94,blocks 94" "0,1"
|
|
bitfld.long 0x00 29. "B_93,blocks 93" "0,1"
|
|
bitfld.long 0x00 28. "B_92,blocks 92" "0,1"
|
|
bitfld.long 0x00 27. "B_91,blocks 91" "0,1"
|
|
bitfld.long 0x00 26. "B_90,blocks 90" "0,1"
|
|
bitfld.long 0x00 25. "B_89,blocks 89" "0,1"
|
|
bitfld.long 0x00 24. "B_88,blocks 88" "0,1"
|
|
bitfld.long 0x00 23. "B_87,blocks 87" "0,1"
|
|
bitfld.long 0x00 22. "B_86,blocks 86" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_85,blocks 85" "0,1"
|
|
bitfld.long 0x00 20. "B_84,blocks 84" "0,1"
|
|
bitfld.long 0x00 19. "B_83,blocks 83" "0,1"
|
|
bitfld.long 0x00 18. "B_82,blocks 82" "0,1"
|
|
bitfld.long 0x00 17. "B_81,blocks 81" "0,1"
|
|
bitfld.long 0x00 16. "B_80,blocks 80" "0,1"
|
|
bitfld.long 0x00 15. "B_79,blocks 79" "0,1"
|
|
bitfld.long 0x00 14. "B_78,blocks 78" "0,1"
|
|
bitfld.long 0x00 13. "B_77,blocks 77" "0,1"
|
|
bitfld.long 0x00 12. "B_76,blocks 76" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_75,blocks 75" "0,1"
|
|
bitfld.long 0x00 10. "B_74,blocks 74" "0,1"
|
|
bitfld.long 0x00 9. "B_73,blocks 73" "0,1"
|
|
bitfld.long 0x00 8. "B_72,blocks 72" "0,1"
|
|
bitfld.long 0x00 7. "B_71,blocks 71" "0,1"
|
|
bitfld.long 0x00 6. "B_70,blocks 70" "0,1"
|
|
bitfld.long 0x00 5. "B_69,blocks 69" "0,1"
|
|
bitfld.long 0x00 4. "B_68,blocks 68" "0,1"
|
|
bitfld.long 0x00 3. "B_67,blocks 67" "0,1"
|
|
bitfld.long 0x00 2. "B_66,blocks 66" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_65,blocks 65" "0,1"
|
|
bitfld.long 0x00 0. "B_64,blocks 64" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VEC3,TZBMPC0 vector register 3"
|
|
bitfld.long 0x00 31. "B_127,blocks 127" "0,1"
|
|
bitfld.long 0x00 30. "B_126,blocks 126" "0,1"
|
|
bitfld.long 0x00 29. "B_125,blocks 125" "0,1"
|
|
bitfld.long 0x00 28. "B_124,blocks 124" "0,1"
|
|
bitfld.long 0x00 27. "B_123,blocks 123" "0,1"
|
|
bitfld.long 0x00 26. "B_122,blocks 122" "0,1"
|
|
bitfld.long 0x00 25. "B_121,blocks 121" "0,1"
|
|
bitfld.long 0x00 24. "B_120,blocks 120" "0,1"
|
|
bitfld.long 0x00 23. "B_119,blocks 119" "0,1"
|
|
bitfld.long 0x00 22. "B_118,blocks 118" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_117,blocks 117" "0,1"
|
|
bitfld.long 0x00 20. "B_116,blocks 116" "0,1"
|
|
bitfld.long 0x00 19. "B_115,blocks 115" "0,1"
|
|
bitfld.long 0x00 18. "B_114,blocks 114" "0,1"
|
|
bitfld.long 0x00 17. "B_113,blocks 113" "0,1"
|
|
bitfld.long 0x00 16. "B_112,blocks 112" "0,1"
|
|
bitfld.long 0x00 15. "B_111,blocks 111" "0,1"
|
|
bitfld.long 0x00 14. "B_110,blocks 110" "0,1"
|
|
bitfld.long 0x00 13. "B_109,blocks 109" "0,1"
|
|
bitfld.long 0x00 12. "B_108,blocks 108" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_107,blocks 107" "0,1"
|
|
bitfld.long 0x00 10. "B_106,blocks 106" "0,1"
|
|
bitfld.long 0x00 9. "B_105,blocks 105" "0,1"
|
|
bitfld.long 0x00 8. "B_104,blocks 104" "0,1"
|
|
bitfld.long 0x00 7. "B_103,blocks 103" "0,1"
|
|
bitfld.long 0x00 6. "B_102,blocks 102" "0,1"
|
|
bitfld.long 0x00 5. "B_101,blocks 101" "0,1"
|
|
bitfld.long 0x00 4. "B_100,blocks 100" "0,1"
|
|
bitfld.long 0x00 3. "B_99,blocks 99" "0,1"
|
|
bitfld.long 0x00 2. "B_98,blocks 98" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_97,blocks 97" "0,1"
|
|
bitfld.long 0x00 0. "B_96,blocks 96" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VEC4,TZBMPC0 vector register 4"
|
|
bitfld.long 0x00 31. "B_159,blocks 159" "0,1"
|
|
bitfld.long 0x00 30. "B_158,blocks 158" "0,1"
|
|
bitfld.long 0x00 29. "B_157,blocks 157" "0,1"
|
|
bitfld.long 0x00 28. "B_156,blocks 156" "0,1"
|
|
bitfld.long 0x00 27. "B_155,blocks 155" "0,1"
|
|
bitfld.long 0x00 26. "B_154,blocks 154" "0,1"
|
|
bitfld.long 0x00 25. "B_153,blocks 153" "0,1"
|
|
bitfld.long 0x00 24. "B_152,blocks 152" "0,1"
|
|
bitfld.long 0x00 23. "B_151,blocks 151" "0,1"
|
|
bitfld.long 0x00 22. "B_150,blocks 150" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_149,blocks 149" "0,1"
|
|
bitfld.long 0x00 20. "B_148,blocks 148" "0,1"
|
|
bitfld.long 0x00 19. "B_147,blocks 147" "0,1"
|
|
bitfld.long 0x00 18. "B_146,blocks 146" "0,1"
|
|
bitfld.long 0x00 17. "B_145,blocks 145" "0,1"
|
|
bitfld.long 0x00 16. "B_144,blocks 144" "0,1"
|
|
bitfld.long 0x00 15. "B_143,blocks 143" "0,1"
|
|
bitfld.long 0x00 14. "B_142,blocks 142" "0,1"
|
|
bitfld.long 0x00 13. "B_141,blocks 141" "0,1"
|
|
bitfld.long 0x00 12. "B_140,blocks 140" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_139,blocks 139" "0,1"
|
|
bitfld.long 0x00 10. "B_138,blocks 138" "0,1"
|
|
bitfld.long 0x00 9. "B_137,blocks 137" "0,1"
|
|
bitfld.long 0x00 8. "B_136,blocks 136" "0,1"
|
|
bitfld.long 0x00 7. "B_135,blocks 135" "0,1"
|
|
bitfld.long 0x00 6. "B_134,blocks 134" "0,1"
|
|
bitfld.long 0x00 5. "B_133,blocks 133" "0,1"
|
|
bitfld.long 0x00 4. "B_132,blocks 132" "0,1"
|
|
bitfld.long 0x00 3. "B_131,blocks 131" "0,1"
|
|
bitfld.long 0x00 2. "B_130,blocks 130" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_129,blocks 129" "0,1"
|
|
bitfld.long 0x00 0. "B_128,blocks 128" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VEC5,TZBMPC0 vector register 5"
|
|
bitfld.long 0x00 31. "B_191,blocks 191" "0,1"
|
|
bitfld.long 0x00 30. "B_190,blocks 190" "0,1"
|
|
bitfld.long 0x00 29. "B_189,blocks 189" "0,1"
|
|
bitfld.long 0x00 28. "B_188,blocks 188" "0,1"
|
|
bitfld.long 0x00 27. "B_187,blocks 187" "0,1"
|
|
bitfld.long 0x00 26. "B_186,blocks 186" "0,1"
|
|
bitfld.long 0x00 25. "B_185,blocks 185" "0,1"
|
|
bitfld.long 0x00 24. "B_184,blocks 184" "0,1"
|
|
bitfld.long 0x00 23. "B_183,blocks 183" "0,1"
|
|
bitfld.long 0x00 22. "B_182,blocks 182" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_181,blocks 181" "0,1"
|
|
bitfld.long 0x00 20. "B_180,blocks 180" "0,1"
|
|
bitfld.long 0x00 19. "B_179,blocks 179" "0,1"
|
|
bitfld.long 0x00 18. "B_178,blocks 178" "0,1"
|
|
bitfld.long 0x00 17. "B_177,blocks 177" "0,1"
|
|
bitfld.long 0x00 16. "B_176,blocks 176" "0,1"
|
|
bitfld.long 0x00 15. "B_175,blocks 175" "0,1"
|
|
bitfld.long 0x00 14. "B_174,blocks 174" "0,1"
|
|
bitfld.long 0x00 13. "B_173,blocks 173" "0,1"
|
|
bitfld.long 0x00 12. "B_172,blocks 172" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_171,blocks 171" "0,1"
|
|
bitfld.long 0x00 10. "B_170,blocks 170" "0,1"
|
|
bitfld.long 0x00 9. "B_169,blocks 169" "0,1"
|
|
bitfld.long 0x00 8. "B_168,blocks 168" "0,1"
|
|
bitfld.long 0x00 7. "B_167,blocks 167" "0,1"
|
|
bitfld.long 0x00 6. "B_166,blocks 166" "0,1"
|
|
bitfld.long 0x00 5. "B_165,blocks 165" "0,1"
|
|
bitfld.long 0x00 4. "B_164,blocks 164" "0,1"
|
|
bitfld.long 0x00 3. "B_163,blocks 163" "0,1"
|
|
bitfld.long 0x00 2. "B_162,blocks 162" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_161,blocks 161" "0,1"
|
|
bitfld.long 0x00 0. "B_160,blocks 160" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "VEC6,TZBMPC0 vector register 6"
|
|
bitfld.long 0x00 31. "B_223,blocks 223" "0,1"
|
|
bitfld.long 0x00 30. "B_222,blocks 222" "0,1"
|
|
bitfld.long 0x00 29. "B_221,blocks 221" "0,1"
|
|
bitfld.long 0x00 28. "B_220,blocks 220" "0,1"
|
|
bitfld.long 0x00 27. "B_219,blocks 219" "0,1"
|
|
bitfld.long 0x00 26. "B_218,blocks 218" "0,1"
|
|
bitfld.long 0x00 25. "B_217,blocks 217" "0,1"
|
|
bitfld.long 0x00 24. "B_216,blocks 216" "0,1"
|
|
bitfld.long 0x00 23. "B_215,blocks 215" "0,1"
|
|
bitfld.long 0x00 22. "B_214,blocks 214" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_213,blocks 213" "0,1"
|
|
bitfld.long 0x00 20. "B_212,blocks 212" "0,1"
|
|
bitfld.long 0x00 19. "B_211,blocks 211" "0,1"
|
|
bitfld.long 0x00 18. "B_210,blocks 210" "0,1"
|
|
bitfld.long 0x00 17. "B_209,blocks 209" "0,1"
|
|
bitfld.long 0x00 16. "B_208,blocks 208" "0,1"
|
|
bitfld.long 0x00 15. "B_207,blocks 207" "0,1"
|
|
bitfld.long 0x00 14. "B_206,blocks 206" "0,1"
|
|
bitfld.long 0x00 13. "B_205,blocks 205" "0,1"
|
|
bitfld.long 0x00 12. "B_204,blocks 204" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_203,blocks 203" "0,1"
|
|
bitfld.long 0x00 10. "B_202,blocks 202" "0,1"
|
|
bitfld.long 0x00 9. "B_201,blocks 201" "0,1"
|
|
bitfld.long 0x00 8. "B_200,blocks 200" "0,1"
|
|
bitfld.long 0x00 7. "B_199,blocks 199" "0,1"
|
|
bitfld.long 0x00 6. "B_198,blocks 198" "0,1"
|
|
bitfld.long 0x00 5. "B_197,blocks 197" "0,1"
|
|
bitfld.long 0x00 4. "B_196,blocks 196" "0,1"
|
|
bitfld.long 0x00 3. "B_195,blocks 195" "0,1"
|
|
bitfld.long 0x00 2. "B_194,blocks 194" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_193,blocks 93" "0,1"
|
|
bitfld.long 0x00 0. "B_192,blocks 192" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "VEC7,TZBMPC0 vector register 7"
|
|
bitfld.long 0x00 31. "B_255,blocks 255" "0,1"
|
|
bitfld.long 0x00 30. "B_254,blocks 254" "0,1"
|
|
bitfld.long 0x00 29. "B_253,blocks 253" "0,1"
|
|
bitfld.long 0x00 28. "B_252,blocks 252" "0,1"
|
|
bitfld.long 0x00 27. "B_251,blocks 251" "0,1"
|
|
bitfld.long 0x00 26. "B_250,blocks 250" "0,1"
|
|
bitfld.long 0x00 25. "B_249,blocks 249" "0,1"
|
|
bitfld.long 0x00 24. "B_248,blocks 248" "0,1"
|
|
bitfld.long 0x00 23. "B_247,blocks 247" "0,1"
|
|
bitfld.long 0x00 22. "B_246,blocks 246" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_245,blocks 245" "0,1"
|
|
bitfld.long 0x00 20. "B_244,blocks 244" "0,1"
|
|
bitfld.long 0x00 19. "B_243,blocks 243" "0,1"
|
|
bitfld.long 0x00 18. "B_242,blocks 242" "0,1"
|
|
bitfld.long 0x00 17. "B_241,blocks 241" "0,1"
|
|
bitfld.long 0x00 16. "B_240,blocks 240" "0,1"
|
|
bitfld.long 0x00 15. "B_239,blocks 239" "0,1"
|
|
bitfld.long 0x00 14. "B_238,blocks 238" "0,1"
|
|
bitfld.long 0x00 13. "B_237,blocks 237" "0,1"
|
|
bitfld.long 0x00 12. "B_236,blocks 236" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_235,blocks 235" "0,1"
|
|
bitfld.long 0x00 10. "B_234,blocks 234" "0,1"
|
|
bitfld.long 0x00 9. "B_233,blocks 233" "0,1"
|
|
bitfld.long 0x00 8. "B_232,blocks 232" "0,1"
|
|
bitfld.long 0x00 7. "B_231,blocks 231" "0,1"
|
|
bitfld.long 0x00 6. "B_230,blocks 230" "0,1"
|
|
bitfld.long 0x00 5. "B_229,blocks 229" "0,1"
|
|
bitfld.long 0x00 4. "B_228,blocks 228" "0,1"
|
|
bitfld.long 0x00 3. "B_227,blocks 227" "0,1"
|
|
bitfld.long 0x00 2. "B_226,blocks 226" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_225,blocks 225" "0,1"
|
|
bitfld.long 0x00 0. "B_224,blocks 224" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK0,TZBMPC0 lock register 0"
|
|
bitfld.long 0x00 7. "LKUB7,lock/unlock status of secure access mode for the super-blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "LKUB6,lock/unlock status of secure access mode for the super-blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "LKUB5,lock/unlock status of secure access mode for the super-blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "LKUB4,lock/unlock status of secure access mode for the super-blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "LKUB3,lock/unlock status of secure access mode for the super-blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "LKUB2,lock/unlock status of secure access mode for the super-blocks 2" "0,1"
|
|
bitfld.long 0x00 1. "LKUB1,lock/unlock status of secure access mode for the super-blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "LKUB0,lock/unlock status of secure access mode for the super-blocks 0" "0,1"
|
|
tree.end
|
|
tree "SEC_TZBMPC1"
|
|
base ad:0x500A0C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZBMPC1 control register"
|
|
bitfld.long 0x00 31. "SRWACFG,secure read/write illegal access disable" "0,1"
|
|
bitfld.long 0x00 30. "SECSTATCFG,default security state" "0,1"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VEC0,TZBMPC1 vector register 0"
|
|
bitfld.long 0x00 31. "B_31,blocks 31" "0,1"
|
|
bitfld.long 0x00 30. "B_30,blocks 30" "0,1"
|
|
bitfld.long 0x00 29. "B_29,blocks 29" "0,1"
|
|
bitfld.long 0x00 28. "B_28,blocks 28" "0,1"
|
|
bitfld.long 0x00 27. "B_27,blocks 27" "0,1"
|
|
bitfld.long 0x00 26. "B_26,blocks 26" "0,1"
|
|
bitfld.long 0x00 25. "B_25,blocks 25" "0,1"
|
|
bitfld.long 0x00 24. "B_24,blocks 24" "0,1"
|
|
bitfld.long 0x00 23. "B_23,blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "B_22,blocks 22" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_21,blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "B_20,blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "B_19,blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "B_18,blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "B_17,blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "B_16,blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "B_15,blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "B_14,blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "B_13,blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "B_12,blocks 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_11,blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "B_10,blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "B_9,blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "B_8,blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "B_7,blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "B_6,blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "B_5,blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "B_4,blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "B_3,blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "B_2,blocks 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_1,blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "B_0,blocks 0" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VEC1,TZBMPC1 vector register 1"
|
|
bitfld.long 0x00 31. "B_63,blocks 63" "0,1"
|
|
bitfld.long 0x00 30. "B_62,blocks 62" "0,1"
|
|
bitfld.long 0x00 29. "B_61,blocks 61" "0,1"
|
|
bitfld.long 0x00 28. "B_60,blocks 60" "0,1"
|
|
bitfld.long 0x00 27. "B_59,blocks 59" "0,1"
|
|
bitfld.long 0x00 26. "B_58,blocks 58" "0,1"
|
|
bitfld.long 0x00 25. "B_57,blocks 57" "0,1"
|
|
bitfld.long 0x00 24. "B_56,blocks 56" "0,1"
|
|
bitfld.long 0x00 23. "B_55,blocks 55" "0,1"
|
|
bitfld.long 0x00 22. "B_54,blocks 54" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_53,blocks 53" "0,1"
|
|
bitfld.long 0x00 20. "B_52,blocks 52" "0,1"
|
|
bitfld.long 0x00 19. "B_51,blocks 51" "0,1"
|
|
bitfld.long 0x00 18. "B_50,blocks 50" "0,1"
|
|
bitfld.long 0x00 17. "B_49,blocks 49" "0,1"
|
|
bitfld.long 0x00 16. "B_48,blocks 48" "0,1"
|
|
bitfld.long 0x00 15. "B_47,blocks 47" "0,1"
|
|
bitfld.long 0x00 14. "B_46,blocks 46" "0,1"
|
|
bitfld.long 0x00 13. "B_45,blocks 45" "0,1"
|
|
bitfld.long 0x00 12. "B_44,blocks 44" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_43,blocks 43" "0,1"
|
|
bitfld.long 0x00 10. "B_42,blocks 42" "0,1"
|
|
bitfld.long 0x00 9. "B_41,blocks 41" "0,1"
|
|
bitfld.long 0x00 8. "B_40,blocks 40" "0,1"
|
|
bitfld.long 0x00 7. "B_39,blocks 39" "0,1"
|
|
bitfld.long 0x00 6. "B_38,blocks 38" "0,1"
|
|
bitfld.long 0x00 5. "B_37,blocks 37" "0,1"
|
|
bitfld.long 0x00 4. "B_36,blocks 36" "0,1"
|
|
bitfld.long 0x00 3. "B_35,blocks 35" "0,1"
|
|
bitfld.long 0x00 2. "B_34,blocks 34" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_33,blocks 33" "0,1"
|
|
bitfld.long 0x00 0. "B_32,blocks 32" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VEC2,TZBMPC1 vector register 2"
|
|
bitfld.long 0x00 31. "B_95,blocks 95" "0,1"
|
|
bitfld.long 0x00 30. "B_94,blocks 94" "0,1"
|
|
bitfld.long 0x00 29. "B_93,blocks 93" "0,1"
|
|
bitfld.long 0x00 28. "B_92,blocks 92" "0,1"
|
|
bitfld.long 0x00 27. "B_91,blocks 91" "0,1"
|
|
bitfld.long 0x00 26. "B_90,blocks 90" "0,1"
|
|
bitfld.long 0x00 25. "B_89,blocks 89" "0,1"
|
|
bitfld.long 0x00 24. "B_88,blocks 88" "0,1"
|
|
bitfld.long 0x00 23. "B_87,blocks 87" "0,1"
|
|
bitfld.long 0x00 22. "B_86,blocks 86" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_85,blocks 85" "0,1"
|
|
bitfld.long 0x00 20. "B_84,blocks 84" "0,1"
|
|
bitfld.long 0x00 19. "B_83,blocks 83" "0,1"
|
|
bitfld.long 0x00 18. "B_82,blocks 82" "0,1"
|
|
bitfld.long 0x00 17. "B_81,blocks 81" "0,1"
|
|
bitfld.long 0x00 16. "B_80,blocks 80" "0,1"
|
|
bitfld.long 0x00 15. "B_79,blocks 79" "0,1"
|
|
bitfld.long 0x00 14. "B_78,blocks 78" "0,1"
|
|
bitfld.long 0x00 13. "B_77,blocks 77" "0,1"
|
|
bitfld.long 0x00 12. "B_76,blocks 76" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_75,blocks 75" "0,1"
|
|
bitfld.long 0x00 10. "B_74,blocks 74" "0,1"
|
|
bitfld.long 0x00 9. "B_73,blocks 73" "0,1"
|
|
bitfld.long 0x00 8. "B_72,blocks 72" "0,1"
|
|
bitfld.long 0x00 7. "B_71,blocks 71" "0,1"
|
|
bitfld.long 0x00 6. "B_70,blocks 70" "0,1"
|
|
bitfld.long 0x00 5. "B_69,blocks 69" "0,1"
|
|
bitfld.long 0x00 4. "B_68,blocks 68" "0,1"
|
|
bitfld.long 0x00 3. "B_67,blocks 67" "0,1"
|
|
bitfld.long 0x00 2. "B_66,blocks 66" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_65,blocks 65" "0,1"
|
|
bitfld.long 0x00 0. "B_64,blocks 64" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VEC3,TZBMPC1 vector register 3"
|
|
bitfld.long 0x00 31. "B_127,blocks 127" "0,1"
|
|
bitfld.long 0x00 30. "B_126,blocks 126" "0,1"
|
|
bitfld.long 0x00 29. "B_125,blocks 125" "0,1"
|
|
bitfld.long 0x00 28. "B_124,blocks 124" "0,1"
|
|
bitfld.long 0x00 27. "B_123,blocks 123" "0,1"
|
|
bitfld.long 0x00 26. "B_122,blocks 122" "0,1"
|
|
bitfld.long 0x00 25. "B_121,blocks 121" "0,1"
|
|
bitfld.long 0x00 24. "B_120,blocks 120" "0,1"
|
|
bitfld.long 0x00 23. "B_119,blocks 119" "0,1"
|
|
bitfld.long 0x00 22. "B_118,blocks 118" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_117,blocks 117" "0,1"
|
|
bitfld.long 0x00 20. "B_116,blocks 116" "0,1"
|
|
bitfld.long 0x00 19. "B_115,blocks 115" "0,1"
|
|
bitfld.long 0x00 18. "B_114,blocks 114" "0,1"
|
|
bitfld.long 0x00 17. "B_113,blocks 113" "0,1"
|
|
bitfld.long 0x00 16. "B_112,blocks 112" "0,1"
|
|
bitfld.long 0x00 15. "B_111,blocks 111" "0,1"
|
|
bitfld.long 0x00 14. "B_110,blocks 110" "0,1"
|
|
bitfld.long 0x00 13. "B_109,blocks 109" "0,1"
|
|
bitfld.long 0x00 12. "B_108,blocks 108" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_107,blocks 107" "0,1"
|
|
bitfld.long 0x00 10. "B_106,blocks 106" "0,1"
|
|
bitfld.long 0x00 9. "B_105,blocks 105" "0,1"
|
|
bitfld.long 0x00 8. "B_104,blocks 104" "0,1"
|
|
bitfld.long 0x00 7. "B_103,blocks 103" "0,1"
|
|
bitfld.long 0x00 6. "B_102,blocks 102" "0,1"
|
|
bitfld.long 0x00 5. "B_101,blocks 101" "0,1"
|
|
bitfld.long 0x00 4. "B_100,blocks 100" "0,1"
|
|
bitfld.long 0x00 3. "B_99,blocks 99" "0,1"
|
|
bitfld.long 0x00 2. "B_98,blocks 98" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_97,blocks 97" "0,1"
|
|
bitfld.long 0x00 0. "B_96,blocks 96" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VEC4,TZBMPC1 vector register 4"
|
|
bitfld.long 0x00 31. "B_159,blocks 159" "0,1"
|
|
bitfld.long 0x00 30. "B_158,blocks 158" "0,1"
|
|
bitfld.long 0x00 29. "B_157,blocks 157" "0,1"
|
|
bitfld.long 0x00 28. "B_156,blocks 156" "0,1"
|
|
bitfld.long 0x00 27. "B_155,blocks 155" "0,1"
|
|
bitfld.long 0x00 26. "B_154,blocks 154" "0,1"
|
|
bitfld.long 0x00 25. "B_153,blocks 153" "0,1"
|
|
bitfld.long 0x00 24. "B_152,blocks 152" "0,1"
|
|
bitfld.long 0x00 23. "B_151,blocks 151" "0,1"
|
|
bitfld.long 0x00 22. "B_150,blocks 150" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_149,blocks 149" "0,1"
|
|
bitfld.long 0x00 20. "B_148,blocks 148" "0,1"
|
|
bitfld.long 0x00 19. "B_147,blocks 147" "0,1"
|
|
bitfld.long 0x00 18. "B_146,blocks 146" "0,1"
|
|
bitfld.long 0x00 17. "B_145,blocks 145" "0,1"
|
|
bitfld.long 0x00 16. "B_144,blocks 144" "0,1"
|
|
bitfld.long 0x00 15. "B_143,blocks 143" "0,1"
|
|
bitfld.long 0x00 14. "B_142,blocks 142" "0,1"
|
|
bitfld.long 0x00 13. "B_141,blocks 141" "0,1"
|
|
bitfld.long 0x00 12. "B_140,blocks 140" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_139,blocks 139" "0,1"
|
|
bitfld.long 0x00 10. "B_138,blocks 138" "0,1"
|
|
bitfld.long 0x00 9. "B_137,blocks 137" "0,1"
|
|
bitfld.long 0x00 8. "B_136,blocks 136" "0,1"
|
|
bitfld.long 0x00 7. "B_135,blocks 135" "0,1"
|
|
bitfld.long 0x00 6. "B_134,blocks 134" "0,1"
|
|
bitfld.long 0x00 5. "B_133,blocks 133" "0,1"
|
|
bitfld.long 0x00 4. "B_132,blocks 132" "0,1"
|
|
bitfld.long 0x00 3. "B_131,blocks 131" "0,1"
|
|
bitfld.long 0x00 2. "B_130,blocks 130" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_129,blocks 129" "0,1"
|
|
bitfld.long 0x00 0. "B_128,blocks 128" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VEC5,TZBMPC1 vector register 5"
|
|
bitfld.long 0x00 31. "B_191,blocks 191" "0,1"
|
|
bitfld.long 0x00 30. "B_190,blocks 190" "0,1"
|
|
bitfld.long 0x00 29. "B_189,blocks 189" "0,1"
|
|
bitfld.long 0x00 28. "B_188,blocks 188" "0,1"
|
|
bitfld.long 0x00 27. "B_187,blocks 187" "0,1"
|
|
bitfld.long 0x00 26. "B_186,blocks 186" "0,1"
|
|
bitfld.long 0x00 25. "B_185,blocks 185" "0,1"
|
|
bitfld.long 0x00 24. "B_184,blocks 184" "0,1"
|
|
bitfld.long 0x00 23. "B_183,blocks 183" "0,1"
|
|
bitfld.long 0x00 22. "B_182,blocks 182" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_181,blocks 181" "0,1"
|
|
bitfld.long 0x00 20. "B_180,blocks 180" "0,1"
|
|
bitfld.long 0x00 19. "B_179,blocks 179" "0,1"
|
|
bitfld.long 0x00 18. "B_178,blocks 178" "0,1"
|
|
bitfld.long 0x00 17. "B_177,blocks 177" "0,1"
|
|
bitfld.long 0x00 16. "B_176,blocks 176" "0,1"
|
|
bitfld.long 0x00 15. "B_175,blocks 175" "0,1"
|
|
bitfld.long 0x00 14. "B_174,blocks 174" "0,1"
|
|
bitfld.long 0x00 13. "B_173,blocks 173" "0,1"
|
|
bitfld.long 0x00 12. "B_172,blocks 172" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_171,blocks 171" "0,1"
|
|
bitfld.long 0x00 10. "B_170,blocks 170" "0,1"
|
|
bitfld.long 0x00 9. "B_169,blocks 169" "0,1"
|
|
bitfld.long 0x00 8. "B_168,blocks 168" "0,1"
|
|
bitfld.long 0x00 7. "B_167,blocks 167" "0,1"
|
|
bitfld.long 0x00 6. "B_166,blocks 166" "0,1"
|
|
bitfld.long 0x00 5. "B_165,blocks 165" "0,1"
|
|
bitfld.long 0x00 4. "B_164,blocks 164" "0,1"
|
|
bitfld.long 0x00 3. "B_163,blocks 163" "0,1"
|
|
bitfld.long 0x00 2. "B_162,blocks 162" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_161,blocks 161" "0,1"
|
|
bitfld.long 0x00 0. "B_160,blocks 160" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "VEC6,TZBMPC1 vector register 6"
|
|
bitfld.long 0x00 31. "B_223,blocks 223" "0,1"
|
|
bitfld.long 0x00 30. "B_222,blocks 222" "0,1"
|
|
bitfld.long 0x00 29. "B_221,blocks 221" "0,1"
|
|
bitfld.long 0x00 28. "B_220,blocks 220" "0,1"
|
|
bitfld.long 0x00 27. "B_219,blocks 219" "0,1"
|
|
bitfld.long 0x00 26. "B_218,blocks 218" "0,1"
|
|
bitfld.long 0x00 25. "B_217,blocks 217" "0,1"
|
|
bitfld.long 0x00 24. "B_216,blocks 216" "0,1"
|
|
bitfld.long 0x00 23. "B_215,blocks 215" "0,1"
|
|
bitfld.long 0x00 22. "B_214,blocks 214" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_213,blocks 213" "0,1"
|
|
bitfld.long 0x00 20. "B_212,blocks 212" "0,1"
|
|
bitfld.long 0x00 19. "B_211,blocks 211" "0,1"
|
|
bitfld.long 0x00 18. "B_210,blocks 210" "0,1"
|
|
bitfld.long 0x00 17. "B_209,blocks 209" "0,1"
|
|
bitfld.long 0x00 16. "B_208,blocks 208" "0,1"
|
|
bitfld.long 0x00 15. "B_207,blocks 207" "0,1"
|
|
bitfld.long 0x00 14. "B_206,blocks 206" "0,1"
|
|
bitfld.long 0x00 13. "B_205,blocks 205" "0,1"
|
|
bitfld.long 0x00 12. "B_204,blocks 204" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_203,blocks 203" "0,1"
|
|
bitfld.long 0x00 10. "B_202,blocks 202" "0,1"
|
|
bitfld.long 0x00 9. "B_201,blocks 201" "0,1"
|
|
bitfld.long 0x00 8. "B_200,blocks 200" "0,1"
|
|
bitfld.long 0x00 7. "B_199,blocks 199" "0,1"
|
|
bitfld.long 0x00 6. "B_198,blocks 198" "0,1"
|
|
bitfld.long 0x00 5. "B_197,blocks 197" "0,1"
|
|
bitfld.long 0x00 4. "B_196,blocks 196" "0,1"
|
|
bitfld.long 0x00 3. "B_195,blocks 195" "0,1"
|
|
bitfld.long 0x00 2. "B_194,blocks 194" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_193,blocks 93" "0,1"
|
|
bitfld.long 0x00 0. "B_192,blocks 192" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "VEC7,TZBMPC1 vector register 7"
|
|
bitfld.long 0x00 31. "B_255,blocks 255" "0,1"
|
|
bitfld.long 0x00 30. "B_254,blocks 254" "0,1"
|
|
bitfld.long 0x00 29. "B_253,blocks 253" "0,1"
|
|
bitfld.long 0x00 28. "B_252,blocks 252" "0,1"
|
|
bitfld.long 0x00 27. "B_251,blocks 251" "0,1"
|
|
bitfld.long 0x00 26. "B_250,blocks 250" "0,1"
|
|
bitfld.long 0x00 25. "B_249,blocks 249" "0,1"
|
|
bitfld.long 0x00 24. "B_248,blocks 248" "0,1"
|
|
bitfld.long 0x00 23. "B_247,blocks 247" "0,1"
|
|
bitfld.long 0x00 22. "B_246,blocks 246" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_245,blocks 245" "0,1"
|
|
bitfld.long 0x00 20. "B_244,blocks 244" "0,1"
|
|
bitfld.long 0x00 19. "B_243,blocks 243" "0,1"
|
|
bitfld.long 0x00 18. "B_242,blocks 242" "0,1"
|
|
bitfld.long 0x00 17. "B_241,blocks 241" "0,1"
|
|
bitfld.long 0x00 16. "B_240,blocks 240" "0,1"
|
|
bitfld.long 0x00 15. "B_239,blocks 239" "0,1"
|
|
bitfld.long 0x00 14. "B_238,blocks 238" "0,1"
|
|
bitfld.long 0x00 13. "B_237,blocks 237" "0,1"
|
|
bitfld.long 0x00 12. "B_236,blocks 236" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_235,blocks 235" "0,1"
|
|
bitfld.long 0x00 10. "B_234,blocks 234" "0,1"
|
|
bitfld.long 0x00 9. "B_233,blocks 233" "0,1"
|
|
bitfld.long 0x00 8. "B_232,blocks 232" "0,1"
|
|
bitfld.long 0x00 7. "B_231,blocks 231" "0,1"
|
|
bitfld.long 0x00 6. "B_230,blocks 230" "0,1"
|
|
bitfld.long 0x00 5. "B_229,blocks 229" "0,1"
|
|
bitfld.long 0x00 4. "B_228,blocks 228" "0,1"
|
|
bitfld.long 0x00 3. "B_227,blocks 227" "0,1"
|
|
bitfld.long 0x00 2. "B_226,blocks 226" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_225,blocks 225" "0,1"
|
|
bitfld.long 0x00 0. "B_224,blocks 224" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK0,TZBMPC1 lock register0"
|
|
bitfld.long 0x00 7. "LKUB7,lock/unlock status of secure access mode for the super-blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "LKUB6,lock/unlock status of secure access mode for the super-blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "LKUB5,lock/unlock status of secure access mode for the super-blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "LKUB4,lock/unlock status of secure access mode for the super-blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "LKUB3,lock/unlock status of secure access mode for the super-blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "LKUB2,lock/unlock status of secure access mode for the super-blocks 2" "0,1"
|
|
bitfld.long 0x00 1. "LKUB1,lock/unlock status of secure access mode for the super-blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "LKUB0,lock/unlock status of secure access mode for the super-blocks 0" "0,1"
|
|
tree.end
|
|
tree "SEC_TZBMPC2"
|
|
base ad:0x500B0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZBMPC2 control register"
|
|
bitfld.long 0x00 31. "SRWACFG,secure read/write illegal access disable" "0,1"
|
|
bitfld.long 0x00 30. "SECSTATCFG,default security state" "0,1"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VEC0,TZBMPC2 vector register 0"
|
|
bitfld.long 0x00 31. "B_31,blocks 31" "0,1"
|
|
bitfld.long 0x00 30. "B_30,blocks 30" "0,1"
|
|
bitfld.long 0x00 29. "B_29,blocks 29" "0,1"
|
|
bitfld.long 0x00 28. "B_28,blocks 28" "0,1"
|
|
bitfld.long 0x00 27. "B_27,blocks 27" "0,1"
|
|
bitfld.long 0x00 26. "B_26,blocks 26" "0,1"
|
|
bitfld.long 0x00 25. "B_25,blocks 25" "0,1"
|
|
bitfld.long 0x00 24. "B_24,blocks 24" "0,1"
|
|
bitfld.long 0x00 23. "B_23,blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "B_22,blocks 22" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_21,blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "B_20,blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "B_19,blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "B_18,blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "B_17,blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "B_16,blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "B_15,blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "B_14,blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "B_13,blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "B_12,blocks 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_11,blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "B_10,blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "B_9,blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "B_8,blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "B_7,blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "B_6,blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "B_5,blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "B_4,blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "B_3,blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "B_2,blocks 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_1,blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "B_0,blocks 0" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VEC1,TZBMPC2 vector register 1"
|
|
bitfld.long 0x00 31. "B_63,blocks 63" "0,1"
|
|
bitfld.long 0x00 30. "B_62,blocks 62" "0,1"
|
|
bitfld.long 0x00 29. "B_61,blocks 61" "0,1"
|
|
bitfld.long 0x00 28. "B_60,blocks 60" "0,1"
|
|
bitfld.long 0x00 27. "B_59,blocks 59" "0,1"
|
|
bitfld.long 0x00 26. "B_58,blocks 58" "0,1"
|
|
bitfld.long 0x00 25. "B_57,blocks 57" "0,1"
|
|
bitfld.long 0x00 24. "B_56,blocks 56" "0,1"
|
|
bitfld.long 0x00 23. "B_55,blocks 55" "0,1"
|
|
bitfld.long 0x00 22. "B_54,blocks 54" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_53,blocks 53" "0,1"
|
|
bitfld.long 0x00 20. "B_52,blocks 52" "0,1"
|
|
bitfld.long 0x00 19. "B_51,blocks 51" "0,1"
|
|
bitfld.long 0x00 18. "B_50,blocks 50" "0,1"
|
|
bitfld.long 0x00 17. "B_49,blocks 49" "0,1"
|
|
bitfld.long 0x00 16. "B_48,blocks 48" "0,1"
|
|
bitfld.long 0x00 15. "B_47,blocks 47" "0,1"
|
|
bitfld.long 0x00 14. "B_46,blocks 46" "0,1"
|
|
bitfld.long 0x00 13. "B_45,blocks 45" "0,1"
|
|
bitfld.long 0x00 12. "B_44,blocks 44" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_43,blocks 43" "0,1"
|
|
bitfld.long 0x00 10. "B_42,blocks 42" "0,1"
|
|
bitfld.long 0x00 9. "B_41,blocks 41" "0,1"
|
|
bitfld.long 0x00 8. "B_40,blocks 40" "0,1"
|
|
bitfld.long 0x00 7. "B_39,blocks 39" "0,1"
|
|
bitfld.long 0x00 6. "B_38,blocks 38" "0,1"
|
|
bitfld.long 0x00 5. "B_37,blocks 37" "0,1"
|
|
bitfld.long 0x00 4. "B_36,blocks 36" "0,1"
|
|
bitfld.long 0x00 3. "B_35,blocks 35" "0,1"
|
|
bitfld.long 0x00 2. "B_34,blocks 34" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_33,blocks 33" "0,1"
|
|
bitfld.long 0x00 0. "B_32,blocks 32" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VEC2,TZBMPC2 vector register 2"
|
|
bitfld.long 0x00 31. "B_95,blocks 95" "0,1"
|
|
bitfld.long 0x00 30. "B_94,blocks 94" "0,1"
|
|
bitfld.long 0x00 29. "B_93,blocks 93" "0,1"
|
|
bitfld.long 0x00 28. "B_92,blocks 92" "0,1"
|
|
bitfld.long 0x00 27. "B_91,blocks 91" "0,1"
|
|
bitfld.long 0x00 26. "B_90,blocks 90" "0,1"
|
|
bitfld.long 0x00 25. "B_89,blocks 89" "0,1"
|
|
bitfld.long 0x00 24. "B_88,blocks 88" "0,1"
|
|
bitfld.long 0x00 23. "B_87,blocks 87" "0,1"
|
|
bitfld.long 0x00 22. "B_86,blocks 86" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_85,blocks 85" "0,1"
|
|
bitfld.long 0x00 20. "B_84,blocks 84" "0,1"
|
|
bitfld.long 0x00 19. "B_83,blocks 83" "0,1"
|
|
bitfld.long 0x00 18. "B_82,blocks 82" "0,1"
|
|
bitfld.long 0x00 17. "B_81,blocks 81" "0,1"
|
|
bitfld.long 0x00 16. "B_80,blocks 80" "0,1"
|
|
bitfld.long 0x00 15. "B_79,blocks 79" "0,1"
|
|
bitfld.long 0x00 14. "B_78,blocks 78" "0,1"
|
|
bitfld.long 0x00 13. "B_77,blocks 77" "0,1"
|
|
bitfld.long 0x00 12. "B_76,blocks 76" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_75,blocks 75" "0,1"
|
|
bitfld.long 0x00 10. "B_74,blocks 74" "0,1"
|
|
bitfld.long 0x00 9. "B_73,blocks 73" "0,1"
|
|
bitfld.long 0x00 8. "B_72,blocks 72" "0,1"
|
|
bitfld.long 0x00 7. "B_71,blocks 71" "0,1"
|
|
bitfld.long 0x00 6. "B_70,blocks 70" "0,1"
|
|
bitfld.long 0x00 5. "B_69,blocks 69" "0,1"
|
|
bitfld.long 0x00 4. "B_68,blocks 68" "0,1"
|
|
bitfld.long 0x00 3. "B_67,blocks 67" "0,1"
|
|
bitfld.long 0x00 2. "B_66,blocks 66" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_65,blocks 65" "0,1"
|
|
bitfld.long 0x00 0. "B_64,blocks 64" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VEC3,TZBMPC2 vector register 3"
|
|
bitfld.long 0x00 31. "B_127,blocks 127" "0,1"
|
|
bitfld.long 0x00 30. "B_126,blocks 126" "0,1"
|
|
bitfld.long 0x00 29. "B_125,blocks 125" "0,1"
|
|
bitfld.long 0x00 28. "B_124,blocks 124" "0,1"
|
|
bitfld.long 0x00 27. "B_123,blocks 123" "0,1"
|
|
bitfld.long 0x00 26. "B_122,blocks 122" "0,1"
|
|
bitfld.long 0x00 25. "B_121,blocks 121" "0,1"
|
|
bitfld.long 0x00 24. "B_120,blocks 120" "0,1"
|
|
bitfld.long 0x00 23. "B_119,blocks 119" "0,1"
|
|
bitfld.long 0x00 22. "B_118,blocks 118" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_117,blocks 117" "0,1"
|
|
bitfld.long 0x00 20. "B_116,blocks 116" "0,1"
|
|
bitfld.long 0x00 19. "B_115,blocks 115" "0,1"
|
|
bitfld.long 0x00 18. "B_114,blocks 114" "0,1"
|
|
bitfld.long 0x00 17. "B_113,blocks 113" "0,1"
|
|
bitfld.long 0x00 16. "B_112,blocks 112" "0,1"
|
|
bitfld.long 0x00 15. "B_111,blocks 111" "0,1"
|
|
bitfld.long 0x00 14. "B_110,blocks 110" "0,1"
|
|
bitfld.long 0x00 13. "B_109,blocks 109" "0,1"
|
|
bitfld.long 0x00 12. "B_108,blocks 108" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_107,blocks 107" "0,1"
|
|
bitfld.long 0x00 10. "B_106,blocks 106" "0,1"
|
|
bitfld.long 0x00 9. "B_105,blocks 105" "0,1"
|
|
bitfld.long 0x00 8. "B_104,blocks 104" "0,1"
|
|
bitfld.long 0x00 7. "B_103,blocks 103" "0,1"
|
|
bitfld.long 0x00 6. "B_102,blocks 102" "0,1"
|
|
bitfld.long 0x00 5. "B_101,blocks 101" "0,1"
|
|
bitfld.long 0x00 4. "B_100,blocks 100" "0,1"
|
|
bitfld.long 0x00 3. "B_99,blocks 99" "0,1"
|
|
bitfld.long 0x00 2. "B_98,blocks 98" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_97,blocks 97" "0,1"
|
|
bitfld.long 0x00 0. "B_96,blocks 96" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VEC4,TZBMPC2 vector register 4"
|
|
bitfld.long 0x00 31. "B_159,blocks 159" "0,1"
|
|
bitfld.long 0x00 30. "B_158,blocks 158" "0,1"
|
|
bitfld.long 0x00 29. "B_157,blocks 157" "0,1"
|
|
bitfld.long 0x00 28. "B_156,blocks 156" "0,1"
|
|
bitfld.long 0x00 27. "B_155,blocks 155" "0,1"
|
|
bitfld.long 0x00 26. "B_154,blocks 154" "0,1"
|
|
bitfld.long 0x00 25. "B_153,blocks 153" "0,1"
|
|
bitfld.long 0x00 24. "B_152,blocks 152" "0,1"
|
|
bitfld.long 0x00 23. "B_151,blocks 151" "0,1"
|
|
bitfld.long 0x00 22. "B_150,blocks 150" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_149,blocks 149" "0,1"
|
|
bitfld.long 0x00 20. "B_148,blocks 148" "0,1"
|
|
bitfld.long 0x00 19. "B_147,blocks 147" "0,1"
|
|
bitfld.long 0x00 18. "B_146,blocks 146" "0,1"
|
|
bitfld.long 0x00 17. "B_145,blocks 145" "0,1"
|
|
bitfld.long 0x00 16. "B_144,blocks 144" "0,1"
|
|
bitfld.long 0x00 15. "B_143,blocks 143" "0,1"
|
|
bitfld.long 0x00 14. "B_142,blocks 142" "0,1"
|
|
bitfld.long 0x00 13. "B_141,blocks 141" "0,1"
|
|
bitfld.long 0x00 12. "B_140,blocks 140" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_139,blocks 139" "0,1"
|
|
bitfld.long 0x00 10. "B_138,blocks 138" "0,1"
|
|
bitfld.long 0x00 9. "B_137,blocks 137" "0,1"
|
|
bitfld.long 0x00 8. "B_136,blocks 136" "0,1"
|
|
bitfld.long 0x00 7. "B_135,blocks 135" "0,1"
|
|
bitfld.long 0x00 6. "B_134,blocks 134" "0,1"
|
|
bitfld.long 0x00 5. "B_133,blocks 133" "0,1"
|
|
bitfld.long 0x00 4. "B_132,blocks 132" "0,1"
|
|
bitfld.long 0x00 3. "B_131,blocks 131" "0,1"
|
|
bitfld.long 0x00 2. "B_130,blocks 130" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_129,blocks 129" "0,1"
|
|
bitfld.long 0x00 0. "B_128,blocks 128" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VEC5,TZBMPC2 vector register 5"
|
|
bitfld.long 0x00 31. "B_191,blocks 191" "0,1"
|
|
bitfld.long 0x00 30. "B_190,blocks 190" "0,1"
|
|
bitfld.long 0x00 29. "B_189,blocks 189" "0,1"
|
|
bitfld.long 0x00 28. "B_188,blocks 188" "0,1"
|
|
bitfld.long 0x00 27. "B_187,blocks 187" "0,1"
|
|
bitfld.long 0x00 26. "B_186,blocks 186" "0,1"
|
|
bitfld.long 0x00 25. "B_185,blocks 185" "0,1"
|
|
bitfld.long 0x00 24. "B_184,blocks 184" "0,1"
|
|
bitfld.long 0x00 23. "B_183,blocks 183" "0,1"
|
|
bitfld.long 0x00 22. "B_182,blocks 182" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_181,blocks 181" "0,1"
|
|
bitfld.long 0x00 20. "B_180,blocks 180" "0,1"
|
|
bitfld.long 0x00 19. "B_179,blocks 179" "0,1"
|
|
bitfld.long 0x00 18. "B_178,blocks 178" "0,1"
|
|
bitfld.long 0x00 17. "B_177,blocks 177" "0,1"
|
|
bitfld.long 0x00 16. "B_176,blocks 176" "0,1"
|
|
bitfld.long 0x00 15. "B_175,blocks 175" "0,1"
|
|
bitfld.long 0x00 14. "B_174,blocks 174" "0,1"
|
|
bitfld.long 0x00 13. "B_173,blocks 173" "0,1"
|
|
bitfld.long 0x00 12. "B_172,blocks 172" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_171,blocks 171" "0,1"
|
|
bitfld.long 0x00 10. "B_170,blocks 170" "0,1"
|
|
bitfld.long 0x00 9. "B_169,blocks 169" "0,1"
|
|
bitfld.long 0x00 8. "B_168,blocks 168" "0,1"
|
|
bitfld.long 0x00 7. "B_167,blocks 167" "0,1"
|
|
bitfld.long 0x00 6. "B_166,blocks 166" "0,1"
|
|
bitfld.long 0x00 5. "B_165,blocks 165" "0,1"
|
|
bitfld.long 0x00 4. "B_164,blocks 164" "0,1"
|
|
bitfld.long 0x00 3. "B_163,blocks 163" "0,1"
|
|
bitfld.long 0x00 2. "B_162,blocks 162" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_161,blocks 161" "0,1"
|
|
bitfld.long 0x00 0. "B_160,blocks 160" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "VEC6,TZBMPC2 vector register 6"
|
|
bitfld.long 0x00 31. "B_223,blocks 223" "0,1"
|
|
bitfld.long 0x00 30. "B_222,blocks 222" "0,1"
|
|
bitfld.long 0x00 29. "B_221,blocks 221" "0,1"
|
|
bitfld.long 0x00 28. "B_220,blocks 220" "0,1"
|
|
bitfld.long 0x00 27. "B_219,blocks 219" "0,1"
|
|
bitfld.long 0x00 26. "B_218,blocks 218" "0,1"
|
|
bitfld.long 0x00 25. "B_217,blocks 217" "0,1"
|
|
bitfld.long 0x00 24. "B_216,blocks 216" "0,1"
|
|
bitfld.long 0x00 23. "B_215,blocks 215" "0,1"
|
|
bitfld.long 0x00 22. "B_214,blocks 214" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_213,blocks 213" "0,1"
|
|
bitfld.long 0x00 20. "B_212,blocks 212" "0,1"
|
|
bitfld.long 0x00 19. "B_211,blocks 211" "0,1"
|
|
bitfld.long 0x00 18. "B_210,blocks 210" "0,1"
|
|
bitfld.long 0x00 17. "B_209,blocks 209" "0,1"
|
|
bitfld.long 0x00 16. "B_208,blocks 208" "0,1"
|
|
bitfld.long 0x00 15. "B_207,blocks 207" "0,1"
|
|
bitfld.long 0x00 14. "B_206,blocks 206" "0,1"
|
|
bitfld.long 0x00 13. "B_205,blocks 205" "0,1"
|
|
bitfld.long 0x00 12. "B_204,blocks 204" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_203,blocks 203" "0,1"
|
|
bitfld.long 0x00 10. "B_202,blocks 202" "0,1"
|
|
bitfld.long 0x00 9. "B_201,blocks 201" "0,1"
|
|
bitfld.long 0x00 8. "B_200,blocks 200" "0,1"
|
|
bitfld.long 0x00 7. "B_199,blocks 199" "0,1"
|
|
bitfld.long 0x00 6. "B_198,blocks 198" "0,1"
|
|
bitfld.long 0x00 5. "B_197,blocks 197" "0,1"
|
|
bitfld.long 0x00 4. "B_196,blocks 196" "0,1"
|
|
bitfld.long 0x00 3. "B_195,blocks 195" "0,1"
|
|
bitfld.long 0x00 2. "B_194,blocks 194" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_193,blocks 93" "0,1"
|
|
bitfld.long 0x00 0. "B_192,blocks 192" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "VEC7,TZBMPC2 vector register 7"
|
|
bitfld.long 0x00 31. "B_255,blocks 255" "0,1"
|
|
bitfld.long 0x00 30. "B_254,blocks 254" "0,1"
|
|
bitfld.long 0x00 29. "B_253,blocks 253" "0,1"
|
|
bitfld.long 0x00 28. "B_252,blocks 252" "0,1"
|
|
bitfld.long 0x00 27. "B_251,blocks 251" "0,1"
|
|
bitfld.long 0x00 26. "B_250,blocks 250" "0,1"
|
|
bitfld.long 0x00 25. "B_249,blocks 249" "0,1"
|
|
bitfld.long 0x00 24. "B_248,blocks 248" "0,1"
|
|
bitfld.long 0x00 23. "B_247,blocks 247" "0,1"
|
|
bitfld.long 0x00 22. "B_246,blocks 246" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_245,blocks 245" "0,1"
|
|
bitfld.long 0x00 20. "B_244,blocks 244" "0,1"
|
|
bitfld.long 0x00 19. "B_243,blocks 243" "0,1"
|
|
bitfld.long 0x00 18. "B_242,blocks 242" "0,1"
|
|
bitfld.long 0x00 17. "B_241,blocks 241" "0,1"
|
|
bitfld.long 0x00 16. "B_240,blocks 240" "0,1"
|
|
bitfld.long 0x00 15. "B_239,blocks 239" "0,1"
|
|
bitfld.long 0x00 14. "B_238,blocks 238" "0,1"
|
|
bitfld.long 0x00 13. "B_237,blocks 237" "0,1"
|
|
bitfld.long 0x00 12. "B_236,blocks 236" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_235,blocks 235" "0,1"
|
|
bitfld.long 0x00 10. "B_234,blocks 234" "0,1"
|
|
bitfld.long 0x00 9. "B_233,blocks 233" "0,1"
|
|
bitfld.long 0x00 8. "B_232,blocks 232" "0,1"
|
|
bitfld.long 0x00 7. "B_231,blocks 231" "0,1"
|
|
bitfld.long 0x00 6. "B_230,blocks 230" "0,1"
|
|
bitfld.long 0x00 5. "B_229,blocks 229" "0,1"
|
|
bitfld.long 0x00 4. "B_228,blocks 228" "0,1"
|
|
bitfld.long 0x00 3. "B_227,blocks 227" "0,1"
|
|
bitfld.long 0x00 2. "B_226,blocks 226" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_225,blocks 225" "0,1"
|
|
bitfld.long 0x00 0. "B_224,blocks 224" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "VEC8,TZBMPC2 vector register 8"
|
|
bitfld.long 0x00 31. "B_287,blocks 287" "0,1"
|
|
bitfld.long 0x00 30. "B_286,blocks 286" "0,1"
|
|
bitfld.long 0x00 29. "B_285,blocks 285" "0,1"
|
|
bitfld.long 0x00 28. "B_284,blocks 284" "0,1"
|
|
bitfld.long 0x00 27. "B_283,blocks 283" "0,1"
|
|
bitfld.long 0x00 26. "B_282,blocks 282" "0,1"
|
|
bitfld.long 0x00 25. "B_281,blocks 281" "0,1"
|
|
bitfld.long 0x00 24. "B_280,blocks 280" "0,1"
|
|
bitfld.long 0x00 23. "B_279,blocks 279" "0,1"
|
|
bitfld.long 0x00 22. "B_278,blocks 278" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_277,blocks 277" "0,1"
|
|
bitfld.long 0x00 20. "B_276,blocks 276" "0,1"
|
|
bitfld.long 0x00 19. "B_275,blocks 275" "0,1"
|
|
bitfld.long 0x00 18. "B_274,blocks 274" "0,1"
|
|
bitfld.long 0x00 17. "B_273,blocks 273" "0,1"
|
|
bitfld.long 0x00 16. "B_272,blocks 272" "0,1"
|
|
bitfld.long 0x00 15. "B_271,blocks 271" "0,1"
|
|
bitfld.long 0x00 14. "B_270,blocks 270" "0,1"
|
|
bitfld.long 0x00 13. "B_269,blocks 269" "0,1"
|
|
bitfld.long 0x00 12. "B_268,blocks 268" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_267,blocks 267" "0,1"
|
|
bitfld.long 0x00 10. "B_266,blocks 266" "0,1"
|
|
bitfld.long 0x00 9. "B_265,blocks 265" "0,1"
|
|
bitfld.long 0x00 8. "B_264,blocks 264" "0,1"
|
|
bitfld.long 0x00 7. "B_263,blocks 263" "0,1"
|
|
bitfld.long 0x00 6. "B_262,blocks 262" "0,1"
|
|
bitfld.long 0x00 5. "B_261,blocks 261" "0,1"
|
|
bitfld.long 0x00 4. "B_260,blocks 260" "0,1"
|
|
bitfld.long 0x00 3. "B_259,blocks 259" "0,1"
|
|
bitfld.long 0x00 2. "B_258,blocks 258" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_257,blocks 257" "0,1"
|
|
bitfld.long 0x00 0. "B_256,blocks 256" "0,1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "VEC9,TZBMPC2 vector register 9"
|
|
bitfld.long 0x00 31. "B_319,blocks319" "0,1"
|
|
bitfld.long 0x00 30. "B_318,blocks318" "0,1"
|
|
bitfld.long 0x00 29. "B_317,blocks317" "0,1"
|
|
bitfld.long 0x00 28. "B_316,blocks316" "0,1"
|
|
bitfld.long 0x00 27. "B_315,blocks315" "0,1"
|
|
bitfld.long 0x00 26. "B_314,blocks314" "0,1"
|
|
bitfld.long 0x00 25. "B_313,blocks313" "0,1"
|
|
bitfld.long 0x00 24. "B_312,blocks312" "0,1"
|
|
bitfld.long 0x00 23. "B_311,blocks311" "0,1"
|
|
bitfld.long 0x00 22. "B_310,blocks310" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_309,blocks309" "0,1"
|
|
bitfld.long 0x00 20. "B_308,blocks308" "0,1"
|
|
bitfld.long 0x00 19. "B_307,blocks307" "0,1"
|
|
bitfld.long 0x00 18. "B_306,blocks306" "0,1"
|
|
bitfld.long 0x00 17. "B_305,blocks305" "0,1"
|
|
bitfld.long 0x00 16. "B_304,blocks304" "0,1"
|
|
bitfld.long 0x00 15. "B_303,blocks303" "0,1"
|
|
bitfld.long 0x00 14. "B_302,blocks302" "0,1"
|
|
bitfld.long 0x00 13. "B_301,blocks301" "0,1"
|
|
bitfld.long 0x00 12. "B_300,blocks300" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_299,blocks299" "0,1"
|
|
bitfld.long 0x00 10. "B_298,blocks298" "0,1"
|
|
bitfld.long 0x00 9. "B_297,blocks297" "0,1"
|
|
bitfld.long 0x00 8. "B_296,blocks296" "0,1"
|
|
bitfld.long 0x00 7. "B_295,blocks295" "0,1"
|
|
bitfld.long 0x00 6. "B_294,blocks294" "0,1"
|
|
bitfld.long 0x00 5. "B_293,blocks293" "0,1"
|
|
bitfld.long 0x00 4. "B_292,blocks292" "0,1"
|
|
bitfld.long 0x00 3. "B_291,blocks291" "0,1"
|
|
bitfld.long 0x00 2. "B_290,blocks290" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_289,blocks 289" "0,1"
|
|
bitfld.long 0x00 0. "B_288,blocks 288" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "VEC10,TZBMPC2 vector register 10"
|
|
bitfld.long 0x00 31. "B_351,blocks351" "0,1"
|
|
bitfld.long 0x00 30. "B_350,blocks350" "0,1"
|
|
bitfld.long 0x00 29. "B_349,blocks349" "0,1"
|
|
bitfld.long 0x00 28. "B_348,blocks348" "0,1"
|
|
bitfld.long 0x00 27. "B_347,blocks347" "0,1"
|
|
bitfld.long 0x00 26. "B_346,blocks346" "0,1"
|
|
bitfld.long 0x00 25. "B_345,blocks345" "0,1"
|
|
bitfld.long 0x00 24. "B_344,blocks344" "0,1"
|
|
bitfld.long 0x00 23. "B_343,blocks343" "0,1"
|
|
bitfld.long 0x00 22. "B_342,blocks342" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_341,blocks341" "0,1"
|
|
bitfld.long 0x00 20. "B_340,blocks340" "0,1"
|
|
bitfld.long 0x00 19. "B_339,blocks339" "0,1"
|
|
bitfld.long 0x00 18. "B_338,blocks338" "0,1"
|
|
bitfld.long 0x00 17. "B_337,blocks337" "0,1"
|
|
bitfld.long 0x00 16. "B_336,blocks336" "0,1"
|
|
bitfld.long 0x00 15. "B_335,blocks335" "0,1"
|
|
bitfld.long 0x00 14. "B_334,blocks334" "0,1"
|
|
bitfld.long 0x00 13. "B_333,blocks333" "0,1"
|
|
bitfld.long 0x00 12. "B_332,blocks332" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_331,blocks331" "0,1"
|
|
bitfld.long 0x00 10. "B_330,blocks330" "0,1"
|
|
bitfld.long 0x00 9. "B_329,blocks329" "0,1"
|
|
bitfld.long 0x00 8. "B_328,blocks328" "0,1"
|
|
bitfld.long 0x00 7. "B_327,blocks327" "0,1"
|
|
bitfld.long 0x00 6. "B_326,blocks326" "0,1"
|
|
bitfld.long 0x00 5. "B_325,blocks325" "0,1"
|
|
bitfld.long 0x00 4. "B_324,blocks324" "0,1"
|
|
bitfld.long 0x00 3. "B_323,blocks323" "0,1"
|
|
bitfld.long 0x00 2. "B_322,blocks322" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_321,blocks 321" "0,1"
|
|
bitfld.long 0x00 0. "B_320,blocks 320" "0,1"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "VEC11,TZBMPC2 vector register 11"
|
|
bitfld.long 0x00 31. "B_383,blocks383" "0,1"
|
|
bitfld.long 0x00 30. "B_382,blocks382" "0,1"
|
|
bitfld.long 0x00 29. "B_381,blocks381" "0,1"
|
|
bitfld.long 0x00 28. "B_380,blocks380" "0,1"
|
|
bitfld.long 0x00 27. "B_379,blocks379" "0,1"
|
|
bitfld.long 0x00 26. "B_378,blocks378" "0,1"
|
|
bitfld.long 0x00 25. "B_377,blocks377" "0,1"
|
|
bitfld.long 0x00 24. "B_376,blocks376" "0,1"
|
|
bitfld.long 0x00 23. "B_375,blocks375" "0,1"
|
|
bitfld.long 0x00 22. "B_374,blocks374" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_373,blocks373" "0,1"
|
|
bitfld.long 0x00 20. "B_372,blocks372" "0,1"
|
|
bitfld.long 0x00 19. "B_371,blocks371" "0,1"
|
|
bitfld.long 0x00 18. "B_370,blocks370" "0,1"
|
|
bitfld.long 0x00 17. "B_369,blocks369" "0,1"
|
|
bitfld.long 0x00 16. "B_368,blocks368" "0,1"
|
|
bitfld.long 0x00 15. "B_367,blocks367" "0,1"
|
|
bitfld.long 0x00 14. "B_366,blocks366" "0,1"
|
|
bitfld.long 0x00 13. "B_365,blocks365" "0,1"
|
|
bitfld.long 0x00 12. "B_364,blocks364" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_363,blocks363" "0,1"
|
|
bitfld.long 0x00 10. "B_362,blocks362" "0,1"
|
|
bitfld.long 0x00 9. "B_361,blocks361" "0,1"
|
|
bitfld.long 0x00 8. "B_360,blocks360" "0,1"
|
|
bitfld.long 0x00 7. "B_359,blocks359" "0,1"
|
|
bitfld.long 0x00 6. "B_358,blocks358" "0,1"
|
|
bitfld.long 0x00 5. "B_357,blocks357" "0,1"
|
|
bitfld.long 0x00 4. "B_356,blocks356" "0,1"
|
|
bitfld.long 0x00 3. "B_355,blocks355" "0,1"
|
|
bitfld.long 0x00 2. "B_354,blocks354" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_353,blocks 353" "0,1"
|
|
bitfld.long 0x00 0. "B_352,blocks 352" "0,1"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "VEC12,TZBMPC2 vector register 12"
|
|
bitfld.long 0x00 31. "B_415,blocks415" "0,1"
|
|
bitfld.long 0x00 30. "B_414,blocks414" "0,1"
|
|
bitfld.long 0x00 29. "B_413,blocks413" "0,1"
|
|
bitfld.long 0x00 28. "B_412,blocks412" "0,1"
|
|
bitfld.long 0x00 27. "B_411,blocks411" "0,1"
|
|
bitfld.long 0x00 26. "B_410,blocks410" "0,1"
|
|
bitfld.long 0x00 25. "B_409,blocks409" "0,1"
|
|
bitfld.long 0x00 24. "B_408,blocks408" "0,1"
|
|
bitfld.long 0x00 23. "B_407,blocks407" "0,1"
|
|
bitfld.long 0x00 22. "B_406,blocks406" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_405,blocks405" "0,1"
|
|
bitfld.long 0x00 20. "B_404,blocks404" "0,1"
|
|
bitfld.long 0x00 19. "B_403,blocks403" "0,1"
|
|
bitfld.long 0x00 18. "B_402,blocks402" "0,1"
|
|
bitfld.long 0x00 17. "B_401,blocks401" "0,1"
|
|
bitfld.long 0x00 16. "B_400,blocks400" "0,1"
|
|
bitfld.long 0x00 15. "B_399,blocks399" "0,1"
|
|
bitfld.long 0x00 14. "B_398,blocks398" "0,1"
|
|
bitfld.long 0x00 13. "B_397,blocks397" "0,1"
|
|
bitfld.long 0x00 12. "B_396,blocks396" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_395,blocks395" "0,1"
|
|
bitfld.long 0x00 10. "B_394,blocks394" "0,1"
|
|
bitfld.long 0x00 9. "B_393,blocks393" "0,1"
|
|
bitfld.long 0x00 8. "B_392,blocks392" "0,1"
|
|
bitfld.long 0x00 7. "B_391,blocks391" "0,1"
|
|
bitfld.long 0x00 6. "B_390,blocks390" "0,1"
|
|
bitfld.long 0x00 5. "B_389,blocks389" "0,1"
|
|
bitfld.long 0x00 4. "B_388,blocks388" "0,1"
|
|
bitfld.long 0x00 3. "B_387,blocks387" "0,1"
|
|
bitfld.long 0x00 2. "B_386,blocks386" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_385,blocks 385" "0,1"
|
|
bitfld.long 0x00 0. "B_384,blocks 384" "0,1"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "VEC13,TZBMPC2 vector register 13"
|
|
bitfld.long 0x00 31. "B_447,blocks447" "0,1"
|
|
bitfld.long 0x00 30. "B_446,blocks446" "0,1"
|
|
bitfld.long 0x00 29. "B_445,blocks445" "0,1"
|
|
bitfld.long 0x00 28. "B_444,blocks444" "0,1"
|
|
bitfld.long 0x00 27. "B_443,blocks443" "0,1"
|
|
bitfld.long 0x00 26. "B_442,blocks442" "0,1"
|
|
bitfld.long 0x00 25. "B_441,blocks441" "0,1"
|
|
bitfld.long 0x00 24. "B_440,blocks440" "0,1"
|
|
bitfld.long 0x00 23. "B_439,blocks439" "0,1"
|
|
bitfld.long 0x00 22. "B_438,blocks438" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_437,blocks437" "0,1"
|
|
bitfld.long 0x00 20. "B_436,blocks436" "0,1"
|
|
bitfld.long 0x00 19. "B_435,blocks435" "0,1"
|
|
bitfld.long 0x00 18. "B_434,blocks434" "0,1"
|
|
bitfld.long 0x00 17. "B_433,blocks433" "0,1"
|
|
bitfld.long 0x00 16. "B_432,blocks432" "0,1"
|
|
bitfld.long 0x00 15. "B_431,blocks431" "0,1"
|
|
bitfld.long 0x00 14. "B_430,blocks430" "0,1"
|
|
bitfld.long 0x00 13. "B_429,blocks429" "0,1"
|
|
bitfld.long 0x00 12. "B_428,blocks428" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_427,blocks427" "0,1"
|
|
bitfld.long 0x00 10. "B_426,blocks426" "0,1"
|
|
bitfld.long 0x00 9. "B_425,blocks425" "0,1"
|
|
bitfld.long 0x00 8. "B_424,blocks424" "0,1"
|
|
bitfld.long 0x00 7. "B_423,blocks423" "0,1"
|
|
bitfld.long 0x00 6. "B_422,blocks422" "0,1"
|
|
bitfld.long 0x00 5. "B_421,blocks421" "0,1"
|
|
bitfld.long 0x00 4. "B_420,blocks420" "0,1"
|
|
bitfld.long 0x00 3. "B_419,blocks419" "0,1"
|
|
bitfld.long 0x00 2. "B_418,blocks418" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_417,blocks 417" "0,1"
|
|
bitfld.long 0x00 0. "B_416,blocks 416" "0,1"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "VEC14,TZBMPC2 vector register 14"
|
|
bitfld.long 0x00 31. "B_479,blocks479" "0,1"
|
|
bitfld.long 0x00 30. "B_478,blocks478" "0,1"
|
|
bitfld.long 0x00 29. "B_477,blocks477" "0,1"
|
|
bitfld.long 0x00 28. "B_476,blocks476" "0,1"
|
|
bitfld.long 0x00 27. "B_475,blocks475" "0,1"
|
|
bitfld.long 0x00 26. "B_474,blocks474" "0,1"
|
|
bitfld.long 0x00 25. "B_473,blocks473" "0,1"
|
|
bitfld.long 0x00 24. "B_472,blocks472" "0,1"
|
|
bitfld.long 0x00 23. "B_471,blocks471" "0,1"
|
|
bitfld.long 0x00 22. "B_470,blocks470" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_469,blocks469" "0,1"
|
|
bitfld.long 0x00 20. "B_468,blocks468" "0,1"
|
|
bitfld.long 0x00 19. "B_467,blocks467" "0,1"
|
|
bitfld.long 0x00 18. "B_466,blocks466" "0,1"
|
|
bitfld.long 0x00 17. "B_465,blocks465" "0,1"
|
|
bitfld.long 0x00 16. "B_464,blocks464" "0,1"
|
|
bitfld.long 0x00 15. "B_463,blocks463" "0,1"
|
|
bitfld.long 0x00 14. "B_462,blocks462" "0,1"
|
|
bitfld.long 0x00 13. "B_461,blocks461" "0,1"
|
|
bitfld.long 0x00 12. "B_460,blocks460" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_459,blocks459" "0,1"
|
|
bitfld.long 0x00 10. "B_458,blocks458" "0,1"
|
|
bitfld.long 0x00 9. "B_457,blocks457" "0,1"
|
|
bitfld.long 0x00 8. "B_456,blocks456" "0,1"
|
|
bitfld.long 0x00 7. "B_455,blocks455" "0,1"
|
|
bitfld.long 0x00 6. "B_454,blocks454" "0,1"
|
|
bitfld.long 0x00 5. "B_453,blocks453" "0,1"
|
|
bitfld.long 0x00 4. "B_452,blocks452" "0,1"
|
|
bitfld.long 0x00 3. "B_451,blocks451" "0,1"
|
|
bitfld.long 0x00 2. "B_450,blocks450" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_449,blocks 449" "0,1"
|
|
bitfld.long 0x00 0. "B_448,blocks 448" "0,1"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "VEC15,TZBMPC2 vector register 15"
|
|
bitfld.long 0x00 31. "B_511,blocks511" "0,1"
|
|
bitfld.long 0x00 30. "B_510,blocks510" "0,1"
|
|
bitfld.long 0x00 29. "B_509,blocks509" "0,1"
|
|
bitfld.long 0x00 28. "B_508,blocks508" "0,1"
|
|
bitfld.long 0x00 27. "B_507,blocks507" "0,1"
|
|
bitfld.long 0x00 26. "B_506,blocks506" "0,1"
|
|
bitfld.long 0x00 25. "B_505,blocks505" "0,1"
|
|
bitfld.long 0x00 24. "B_504,blocks504" "0,1"
|
|
bitfld.long 0x00 23. "B_503,blocks503" "0,1"
|
|
bitfld.long 0x00 22. "B_502,blocks502" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_501,blocks501" "0,1"
|
|
bitfld.long 0x00 20. "B_500,blocks500" "0,1"
|
|
bitfld.long 0x00 19. "B_499,blocks499" "0,1"
|
|
bitfld.long 0x00 18. "B_498,blocks498" "0,1"
|
|
bitfld.long 0x00 17. "B_497,blocks497" "0,1"
|
|
bitfld.long 0x00 16. "B_496,blocks496" "0,1"
|
|
bitfld.long 0x00 15. "B_495,blocks495" "0,1"
|
|
bitfld.long 0x00 14. "B_494,blocks494" "0,1"
|
|
bitfld.long 0x00 13. "B_493,blocks493" "0,1"
|
|
bitfld.long 0x00 12. "B_492,blocks492" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_491,blocks491" "0,1"
|
|
bitfld.long 0x00 10. "B_490,blocks490" "0,1"
|
|
bitfld.long 0x00 9. "B_489,blocks489" "0,1"
|
|
bitfld.long 0x00 8. "B_488,blocks488" "0,1"
|
|
bitfld.long 0x00 7. "B_487,blocks487" "0,1"
|
|
bitfld.long 0x00 6. "B_486,blocks486" "0,1"
|
|
bitfld.long 0x00 5. "B_485,blocks485" "0,1"
|
|
bitfld.long 0x00 4. "B_484,blocks484" "0,1"
|
|
bitfld.long 0x00 3. "B_483,blocks483" "0,1"
|
|
bitfld.long 0x00 2. "B_482,blocks482" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_481,blocks 481" "0,1"
|
|
bitfld.long 0x00 0. "B_480,blocks 480" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK0,TZBMPC2 lock register 0"
|
|
bitfld.long 0x00 15. "LKUB15,lock/unlock status of secure access mode for the super-blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "LKUB14,lock/unlock status of secure access mode for the super-blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "LKUB13,lock/unlock status of secure access mode for the super-blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "LKUB12,lock/unlock status of secure access mode for the super-blocks 12" "0,1"
|
|
bitfld.long 0x00 11. "LKUB11,lock/unlock status of secure access mode for the super-blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "LKUB10,lock/unlock status of secure access mode for the super-blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "LKUB9,lock/unlock status of secure access mode for the super-blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "LKUB8,lock/unlock status of secure access mode for the super-blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "LKUB7,lock/unlock status of secure access mode for the super-blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "LKUB6,lock/unlock status of secure access mode for the super-blocks 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "LKUB5,lock/unlock status of secure access mode for the super-blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "LKUB4,lock/unlock status of secure access mode for the super-blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "LKUB3,lock/unlock status of secure access mode for the super-blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "LKUB2,lock/unlock status of secure access mode for the super-blocks 2" "0,1"
|
|
bitfld.long 0x00 1. "LKUB1,lock/unlock status of secure access mode for the super-blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "LKUB0,lock/unlock status of secure access mode for the super-blocks 0" "0,1"
|
|
tree.end
|
|
tree "SEC_TZBMPC3"
|
|
base ad:0x500B0400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZBMPC2 control register"
|
|
bitfld.long 0x00 31. "SRWACFG,secure read/write illegal access disable" "0,1"
|
|
bitfld.long 0x00 30. "SECSTATCFG,default security state" "0,1"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VEC0,TZBMPC3 vector register 0"
|
|
bitfld.long 0x00 31. "B_31,blocks 31" "0,1"
|
|
bitfld.long 0x00 30. "B_30,blocks 30" "0,1"
|
|
bitfld.long 0x00 29. "B_29,blocks 29" "0,1"
|
|
bitfld.long 0x00 28. "B_28,blocks 28" "0,1"
|
|
bitfld.long 0x00 27. "B_27,blocks 27" "0,1"
|
|
bitfld.long 0x00 26. "B_26,blocks 26" "0,1"
|
|
bitfld.long 0x00 25. "B_25,blocks 25" "0,1"
|
|
bitfld.long 0x00 24. "B_24,blocks 24" "0,1"
|
|
bitfld.long 0x00 23. "B_23,blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "B_22,blocks 22" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_21,blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "B_20,blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "B_19,blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "B_18,blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "B_17,blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "B_16,blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "B_15,blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "B_14,blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "B_13,blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "B_12,blocks 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_11,blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "B_10,blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "B_9,blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "B_8,blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "B_7,blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "B_6,blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "B_5,blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "B_4,blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "B_3,blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "B_2,blocks 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_1,blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "B_0,blocks 0" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VEC1,TZBMPC3 vector register 1"
|
|
bitfld.long 0x00 31. "B_63,blocks 63" "0,1"
|
|
bitfld.long 0x00 30. "B_62,blocks 62" "0,1"
|
|
bitfld.long 0x00 29. "B_61,blocks 61" "0,1"
|
|
bitfld.long 0x00 28. "B_60,blocks 60" "0,1"
|
|
bitfld.long 0x00 27. "B_59,blocks 59" "0,1"
|
|
bitfld.long 0x00 26. "B_58,blocks 58" "0,1"
|
|
bitfld.long 0x00 25. "B_57,blocks 57" "0,1"
|
|
bitfld.long 0x00 24. "B_56,blocks 56" "0,1"
|
|
bitfld.long 0x00 23. "B_55,blocks 55" "0,1"
|
|
bitfld.long 0x00 22. "B_54,blocks 54" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_53,blocks 53" "0,1"
|
|
bitfld.long 0x00 20. "B_52,blocks 52" "0,1"
|
|
bitfld.long 0x00 19. "B_51,blocks 51" "0,1"
|
|
bitfld.long 0x00 18. "B_50,blocks 50" "0,1"
|
|
bitfld.long 0x00 17. "B_49,blocks 49" "0,1"
|
|
bitfld.long 0x00 16. "B_48,blocks 48" "0,1"
|
|
bitfld.long 0x00 15. "B_47,blocks 47" "0,1"
|
|
bitfld.long 0x00 14. "B_46,blocks 46" "0,1"
|
|
bitfld.long 0x00 13. "B_45,blocks 45" "0,1"
|
|
bitfld.long 0x00 12. "B_44,blocks 44" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_43,blocks 43" "0,1"
|
|
bitfld.long 0x00 10. "B_42,blocks 42" "0,1"
|
|
bitfld.long 0x00 9. "B_41,blocks 41" "0,1"
|
|
bitfld.long 0x00 8. "B_40,blocks 40" "0,1"
|
|
bitfld.long 0x00 7. "B_39,blocks 39" "0,1"
|
|
bitfld.long 0x00 6. "B_38,blocks 38" "0,1"
|
|
bitfld.long 0x00 5. "B_37,blocks 37" "0,1"
|
|
bitfld.long 0x00 4. "B_36,blocks 36" "0,1"
|
|
bitfld.long 0x00 3. "B_35,blocks 35" "0,1"
|
|
bitfld.long 0x00 2. "B_34,blocks 34" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_33,blocks 33" "0,1"
|
|
bitfld.long 0x00 0. "B_32,blocks 32" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VEC2,TZBMPC3 vector register 2"
|
|
bitfld.long 0x00 31. "B_95,blocks 95" "0,1"
|
|
bitfld.long 0x00 30. "B_94,blocks 94" "0,1"
|
|
bitfld.long 0x00 29. "B_93,blocks 93" "0,1"
|
|
bitfld.long 0x00 28. "B_92,blocks 92" "0,1"
|
|
bitfld.long 0x00 27. "B_91,blocks 91" "0,1"
|
|
bitfld.long 0x00 26. "B_90,blocks 90" "0,1"
|
|
bitfld.long 0x00 25. "B_89,blocks 89" "0,1"
|
|
bitfld.long 0x00 24. "B_88,blocks 88" "0,1"
|
|
bitfld.long 0x00 23. "B_87,blocks 87" "0,1"
|
|
bitfld.long 0x00 22. "B_86,blocks 86" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_85,blocks 85" "0,1"
|
|
bitfld.long 0x00 20. "B_84,blocks 84" "0,1"
|
|
bitfld.long 0x00 19. "B_83,blocks 83" "0,1"
|
|
bitfld.long 0x00 18. "B_82,blocks 82" "0,1"
|
|
bitfld.long 0x00 17. "B_81,blocks 81" "0,1"
|
|
bitfld.long 0x00 16. "B_80,blocks 80" "0,1"
|
|
bitfld.long 0x00 15. "B_79,blocks 79" "0,1"
|
|
bitfld.long 0x00 14. "B_78,blocks 78" "0,1"
|
|
bitfld.long 0x00 13. "B_77,blocks 77" "0,1"
|
|
bitfld.long 0x00 12. "B_76,blocks 76" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_75,blocks 75" "0,1"
|
|
bitfld.long 0x00 10. "B_74,blocks 74" "0,1"
|
|
bitfld.long 0x00 9. "B_73,blocks 73" "0,1"
|
|
bitfld.long 0x00 8. "B_72,blocks 72" "0,1"
|
|
bitfld.long 0x00 7. "B_71,blocks 71" "0,1"
|
|
bitfld.long 0x00 6. "B_70,blocks 70" "0,1"
|
|
bitfld.long 0x00 5. "B_69,blocks 69" "0,1"
|
|
bitfld.long 0x00 4. "B_68,blocks 68" "0,1"
|
|
bitfld.long 0x00 3. "B_67,blocks 67" "0,1"
|
|
bitfld.long 0x00 2. "B_66,blocks 66" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_65,blocks 65" "0,1"
|
|
bitfld.long 0x00 0. "B_64,blocks 64" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VEC3,TZBMPC3 vector register 3"
|
|
bitfld.long 0x00 31. "B_127,blocks 127" "0,1"
|
|
bitfld.long 0x00 30. "B_126,blocks 126" "0,1"
|
|
bitfld.long 0x00 29. "B_125,blocks 125" "0,1"
|
|
bitfld.long 0x00 28. "B_124,blocks 124" "0,1"
|
|
bitfld.long 0x00 27. "B_123,blocks 123" "0,1"
|
|
bitfld.long 0x00 26. "B_122,blocks 122" "0,1"
|
|
bitfld.long 0x00 25. "B_121,blocks 121" "0,1"
|
|
bitfld.long 0x00 24. "B_120,blocks 120" "0,1"
|
|
bitfld.long 0x00 23. "B_119,blocks 119" "0,1"
|
|
bitfld.long 0x00 22. "B_118,blocks 118" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_117,blocks 117" "0,1"
|
|
bitfld.long 0x00 20. "B_116,blocks 116" "0,1"
|
|
bitfld.long 0x00 19. "B_115,blocks 115" "0,1"
|
|
bitfld.long 0x00 18. "B_114,blocks 114" "0,1"
|
|
bitfld.long 0x00 17. "B_113,blocks 113" "0,1"
|
|
bitfld.long 0x00 16. "B_112,blocks 112" "0,1"
|
|
bitfld.long 0x00 15. "B_111,blocks 111" "0,1"
|
|
bitfld.long 0x00 14. "B_110,blocks 110" "0,1"
|
|
bitfld.long 0x00 13. "B_109,blocks 109" "0,1"
|
|
bitfld.long 0x00 12. "B_108,blocks 108" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_107,blocks 107" "0,1"
|
|
bitfld.long 0x00 10. "B_106,blocks 106" "0,1"
|
|
bitfld.long 0x00 9. "B_105,blocks 105" "0,1"
|
|
bitfld.long 0x00 8. "B_104,blocks 104" "0,1"
|
|
bitfld.long 0x00 7. "B_103,blocks 103" "0,1"
|
|
bitfld.long 0x00 6. "B_102,blocks 102" "0,1"
|
|
bitfld.long 0x00 5. "B_101,blocks 101" "0,1"
|
|
bitfld.long 0x00 4. "B_100,blocks 100" "0,1"
|
|
bitfld.long 0x00 3. "B_99,blocks 99" "0,1"
|
|
bitfld.long 0x00 2. "B_98,blocks 98" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_97,blocks 97" "0,1"
|
|
bitfld.long 0x00 0. "B_96,blocks 96" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VEC4,TZBMPC3 vector register 4"
|
|
bitfld.long 0x00 31. "B_159,blocks 159" "0,1"
|
|
bitfld.long 0x00 30. "B_158,blocks 158" "0,1"
|
|
bitfld.long 0x00 29. "B_157,blocks 157" "0,1"
|
|
bitfld.long 0x00 28. "B_156,blocks 156" "0,1"
|
|
bitfld.long 0x00 27. "B_155,blocks 155" "0,1"
|
|
bitfld.long 0x00 26. "B_154,blocks 154" "0,1"
|
|
bitfld.long 0x00 25. "B_153,blocks 153" "0,1"
|
|
bitfld.long 0x00 24. "B_152,blocks 152" "0,1"
|
|
bitfld.long 0x00 23. "B_151,blocks 151" "0,1"
|
|
bitfld.long 0x00 22. "B_150,blocks 150" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_149,blocks 149" "0,1"
|
|
bitfld.long 0x00 20. "B_148,blocks 148" "0,1"
|
|
bitfld.long 0x00 19. "B_147,blocks 147" "0,1"
|
|
bitfld.long 0x00 18. "B_146,blocks 146" "0,1"
|
|
bitfld.long 0x00 17. "B_145,blocks 145" "0,1"
|
|
bitfld.long 0x00 16. "B_144,blocks 144" "0,1"
|
|
bitfld.long 0x00 15. "B_143,blocks 143" "0,1"
|
|
bitfld.long 0x00 14. "B_142,blocks 142" "0,1"
|
|
bitfld.long 0x00 13. "B_141,blocks 141" "0,1"
|
|
bitfld.long 0x00 12. "B_140,blocks 140" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_139,blocks 139" "0,1"
|
|
bitfld.long 0x00 10. "B_138,blocks 138" "0,1"
|
|
bitfld.long 0x00 9. "B_137,blocks 137" "0,1"
|
|
bitfld.long 0x00 8. "B_136,blocks 136" "0,1"
|
|
bitfld.long 0x00 7. "B_135,blocks 135" "0,1"
|
|
bitfld.long 0x00 6. "B_134,blocks 134" "0,1"
|
|
bitfld.long 0x00 5. "B_133,blocks 133" "0,1"
|
|
bitfld.long 0x00 4. "B_132,blocks 132" "0,1"
|
|
bitfld.long 0x00 3. "B_131,blocks 131" "0,1"
|
|
bitfld.long 0x00 2. "B_130,blocks 130" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_129,blocks 129" "0,1"
|
|
bitfld.long 0x00 0. "B_128,blocks 128" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VEC5,TZBMPC3 vector register 5"
|
|
bitfld.long 0x00 31. "B_191,blocks 191" "0,1"
|
|
bitfld.long 0x00 30. "B_190,blocks 190" "0,1"
|
|
bitfld.long 0x00 29. "B_189,blocks 189" "0,1"
|
|
bitfld.long 0x00 28. "B_188,blocks 188" "0,1"
|
|
bitfld.long 0x00 27. "B_187,blocks 187" "0,1"
|
|
bitfld.long 0x00 26. "B_186,blocks 186" "0,1"
|
|
bitfld.long 0x00 25. "B_185,blocks 185" "0,1"
|
|
bitfld.long 0x00 24. "B_184,blocks 184" "0,1"
|
|
bitfld.long 0x00 23. "B_183,blocks 183" "0,1"
|
|
bitfld.long 0x00 22. "B_182,blocks 182" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_181,blocks 181" "0,1"
|
|
bitfld.long 0x00 20. "B_180,blocks 180" "0,1"
|
|
bitfld.long 0x00 19. "B_179,blocks 179" "0,1"
|
|
bitfld.long 0x00 18. "B_178,blocks 178" "0,1"
|
|
bitfld.long 0x00 17. "B_177,blocks 177" "0,1"
|
|
bitfld.long 0x00 16. "B_176,blocks 176" "0,1"
|
|
bitfld.long 0x00 15. "B_175,blocks 175" "0,1"
|
|
bitfld.long 0x00 14. "B_174,blocks 174" "0,1"
|
|
bitfld.long 0x00 13. "B_173,blocks 173" "0,1"
|
|
bitfld.long 0x00 12. "B_172,blocks 172" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_171,blocks 171" "0,1"
|
|
bitfld.long 0x00 10. "B_170,blocks 170" "0,1"
|
|
bitfld.long 0x00 9. "B_169,blocks 169" "0,1"
|
|
bitfld.long 0x00 8. "B_168,blocks 168" "0,1"
|
|
bitfld.long 0x00 7. "B_167,blocks 167" "0,1"
|
|
bitfld.long 0x00 6. "B_166,blocks 166" "0,1"
|
|
bitfld.long 0x00 5. "B_165,blocks 165" "0,1"
|
|
bitfld.long 0x00 4. "B_164,blocks 164" "0,1"
|
|
bitfld.long 0x00 3. "B_163,blocks 163" "0,1"
|
|
bitfld.long 0x00 2. "B_162,blocks 162" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_161,blocks 161" "0,1"
|
|
bitfld.long 0x00 0. "B_160,blocks 160" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "VEC6,TZBMPC3 vector register 6"
|
|
bitfld.long 0x00 31. "B_223,blocks 223" "0,1"
|
|
bitfld.long 0x00 30. "B_222,blocks 222" "0,1"
|
|
bitfld.long 0x00 29. "B_221,blocks 221" "0,1"
|
|
bitfld.long 0x00 28. "B_220,blocks 220" "0,1"
|
|
bitfld.long 0x00 27. "B_219,blocks 219" "0,1"
|
|
bitfld.long 0x00 26. "B_218,blocks 218" "0,1"
|
|
bitfld.long 0x00 25. "B_217,blocks 217" "0,1"
|
|
bitfld.long 0x00 24. "B_216,blocks 216" "0,1"
|
|
bitfld.long 0x00 23. "B_215,blocks 215" "0,1"
|
|
bitfld.long 0x00 22. "B_214,blocks 214" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_213,blocks 213" "0,1"
|
|
bitfld.long 0x00 20. "B_212,blocks 212" "0,1"
|
|
bitfld.long 0x00 19. "B_211,blocks 211" "0,1"
|
|
bitfld.long 0x00 18. "B_210,blocks 210" "0,1"
|
|
bitfld.long 0x00 17. "B_209,blocks 209" "0,1"
|
|
bitfld.long 0x00 16. "B_208,blocks 208" "0,1"
|
|
bitfld.long 0x00 15. "B_207,blocks 207" "0,1"
|
|
bitfld.long 0x00 14. "B_206,blocks 206" "0,1"
|
|
bitfld.long 0x00 13. "B_205,blocks 205" "0,1"
|
|
bitfld.long 0x00 12. "B_204,blocks 204" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_203,blocks 203" "0,1"
|
|
bitfld.long 0x00 10. "B_202,blocks 202" "0,1"
|
|
bitfld.long 0x00 9. "B_201,blocks 201" "0,1"
|
|
bitfld.long 0x00 8. "B_200,blocks 200" "0,1"
|
|
bitfld.long 0x00 7. "B_199,blocks 199" "0,1"
|
|
bitfld.long 0x00 6. "B_198,blocks 198" "0,1"
|
|
bitfld.long 0x00 5. "B_197,blocks 197" "0,1"
|
|
bitfld.long 0x00 4. "B_196,blocks 196" "0,1"
|
|
bitfld.long 0x00 3. "B_195,blocks 195" "0,1"
|
|
bitfld.long 0x00 2. "B_194,blocks 194" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_193,blocks 93" "0,1"
|
|
bitfld.long 0x00 0. "B_192,blocks 192" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "VEC7,TZBMPC3 vector register 7"
|
|
bitfld.long 0x00 31. "B_255,blocks 255" "0,1"
|
|
bitfld.long 0x00 30. "B_254,blocks 254" "0,1"
|
|
bitfld.long 0x00 29. "B_253,blocks 253" "0,1"
|
|
bitfld.long 0x00 28. "B_252,blocks 252" "0,1"
|
|
bitfld.long 0x00 27. "B_251,blocks 251" "0,1"
|
|
bitfld.long 0x00 26. "B_250,blocks 250" "0,1"
|
|
bitfld.long 0x00 25. "B_249,blocks 249" "0,1"
|
|
bitfld.long 0x00 24. "B_248,blocks 248" "0,1"
|
|
bitfld.long 0x00 23. "B_247,blocks 247" "0,1"
|
|
bitfld.long 0x00 22. "B_246,blocks 246" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_245,blocks 245" "0,1"
|
|
bitfld.long 0x00 20. "B_244,blocks 244" "0,1"
|
|
bitfld.long 0x00 19. "B_243,blocks 243" "0,1"
|
|
bitfld.long 0x00 18. "B_242,blocks 242" "0,1"
|
|
bitfld.long 0x00 17. "B_241,blocks 241" "0,1"
|
|
bitfld.long 0x00 16. "B_240,blocks 240" "0,1"
|
|
bitfld.long 0x00 15. "B_239,blocks 239" "0,1"
|
|
bitfld.long 0x00 14. "B_238,blocks 238" "0,1"
|
|
bitfld.long 0x00 13. "B_237,blocks 237" "0,1"
|
|
bitfld.long 0x00 12. "B_236,blocks 236" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_235,blocks 235" "0,1"
|
|
bitfld.long 0x00 10. "B_234,blocks 234" "0,1"
|
|
bitfld.long 0x00 9. "B_233,blocks 233" "0,1"
|
|
bitfld.long 0x00 8. "B_232,blocks 232" "0,1"
|
|
bitfld.long 0x00 7. "B_231,blocks 231" "0,1"
|
|
bitfld.long 0x00 6. "B_230,blocks 230" "0,1"
|
|
bitfld.long 0x00 5. "B_229,blocks 229" "0,1"
|
|
bitfld.long 0x00 4. "B_228,blocks 228" "0,1"
|
|
bitfld.long 0x00 3. "B_227,blocks 227" "0,1"
|
|
bitfld.long 0x00 2. "B_226,blocks 226" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_225,blocks 225" "0,1"
|
|
bitfld.long 0x00 0. "B_224,blocks 224" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "VEC8,TZBMPC3 vector register 8"
|
|
bitfld.long 0x00 31. "B_287,blocks 287" "0,1"
|
|
bitfld.long 0x00 30. "B_286,blocks 286" "0,1"
|
|
bitfld.long 0x00 29. "B_285,blocks 285" "0,1"
|
|
bitfld.long 0x00 28. "B_284,blocks 284" "0,1"
|
|
bitfld.long 0x00 27. "B_283,blocks 283" "0,1"
|
|
bitfld.long 0x00 26. "B_282,blocks 282" "0,1"
|
|
bitfld.long 0x00 25. "B_281,blocks 281" "0,1"
|
|
bitfld.long 0x00 24. "B_280,blocks 280" "0,1"
|
|
bitfld.long 0x00 23. "B_279,blocks 279" "0,1"
|
|
bitfld.long 0x00 22. "B_278,blocks 278" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_277,blocks 277" "0,1"
|
|
bitfld.long 0x00 20. "B_276,blocks 276" "0,1"
|
|
bitfld.long 0x00 19. "B_275,blocks 275" "0,1"
|
|
bitfld.long 0x00 18. "B_274,blocks 274" "0,1"
|
|
bitfld.long 0x00 17. "B_273,blocks 273" "0,1"
|
|
bitfld.long 0x00 16. "B_272,blocks 272" "0,1"
|
|
bitfld.long 0x00 15. "B_271,blocks 271" "0,1"
|
|
bitfld.long 0x00 14. "B_270,blocks 270" "0,1"
|
|
bitfld.long 0x00 13. "B_269,blocks 269" "0,1"
|
|
bitfld.long 0x00 12. "B_268,blocks 268" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_267,blocks 267" "0,1"
|
|
bitfld.long 0x00 10. "B_266,blocks 266" "0,1"
|
|
bitfld.long 0x00 9. "B_265,blocks 265" "0,1"
|
|
bitfld.long 0x00 8. "B_264,blocks 264" "0,1"
|
|
bitfld.long 0x00 7. "B_263,blocks 263" "0,1"
|
|
bitfld.long 0x00 6. "B_262,blocks 262" "0,1"
|
|
bitfld.long 0x00 5. "B_261,blocks 261" "0,1"
|
|
bitfld.long 0x00 4. "B_260,blocks 260" "0,1"
|
|
bitfld.long 0x00 3. "B_259,blocks 259" "0,1"
|
|
bitfld.long 0x00 2. "B_258,blocks 258" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_257,blocks 257" "0,1"
|
|
bitfld.long 0x00 0. "B_256,blocks 256" "0,1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "VEC9,TZBMPC3 vector register 9"
|
|
bitfld.long 0x00 31. "B_319,blocks319" "0,1"
|
|
bitfld.long 0x00 30. "B_318,blocks318" "0,1"
|
|
bitfld.long 0x00 29. "B_317,blocks317" "0,1"
|
|
bitfld.long 0x00 28. "B_316,blocks316" "0,1"
|
|
bitfld.long 0x00 27. "B_315,blocks315" "0,1"
|
|
bitfld.long 0x00 26. "B_314,blocks314" "0,1"
|
|
bitfld.long 0x00 25. "B_313,blocks313" "0,1"
|
|
bitfld.long 0x00 24. "B_312,blocks312" "0,1"
|
|
bitfld.long 0x00 23. "B_311,blocks311" "0,1"
|
|
bitfld.long 0x00 22. "B_310,blocks310" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_309,blocks309" "0,1"
|
|
bitfld.long 0x00 20. "B_308,blocks308" "0,1"
|
|
bitfld.long 0x00 19. "B_307,blocks307" "0,1"
|
|
bitfld.long 0x00 18. "B_306,blocks306" "0,1"
|
|
bitfld.long 0x00 17. "B_305,blocks305" "0,1"
|
|
bitfld.long 0x00 16. "B_304,blocks304" "0,1"
|
|
bitfld.long 0x00 15. "B_303,blocks303" "0,1"
|
|
bitfld.long 0x00 14. "B_302,blocks302" "0,1"
|
|
bitfld.long 0x00 13. "B_301,blocks301" "0,1"
|
|
bitfld.long 0x00 12. "B_300,blocks300" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_299,blocks299" "0,1"
|
|
bitfld.long 0x00 10. "B_298,blocks298" "0,1"
|
|
bitfld.long 0x00 9. "B_297,blocks297" "0,1"
|
|
bitfld.long 0x00 8. "B_296,blocks296" "0,1"
|
|
bitfld.long 0x00 7. "B_295,blocks295" "0,1"
|
|
bitfld.long 0x00 6. "B_294,blocks294" "0,1"
|
|
bitfld.long 0x00 5. "B_293,blocks293" "0,1"
|
|
bitfld.long 0x00 4. "B_292,blocks292" "0,1"
|
|
bitfld.long 0x00 3. "B_291,blocks291" "0,1"
|
|
bitfld.long 0x00 2. "B_290,blocks290" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_289,blocks 289" "0,1"
|
|
bitfld.long 0x00 0. "B_288,blocks 288" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "VEC10,TZBMPC3 vector register 10"
|
|
bitfld.long 0x00 31. "B_351,blocks351" "0,1"
|
|
bitfld.long 0x00 30. "B_350,blocks350" "0,1"
|
|
bitfld.long 0x00 29. "B_349,blocks349" "0,1"
|
|
bitfld.long 0x00 28. "B_348,blocks348" "0,1"
|
|
bitfld.long 0x00 27. "B_347,blocks347" "0,1"
|
|
bitfld.long 0x00 26. "B_346,blocks346" "0,1"
|
|
bitfld.long 0x00 25. "B_345,blocks345" "0,1"
|
|
bitfld.long 0x00 24. "B_344,blocks344" "0,1"
|
|
bitfld.long 0x00 23. "B_343,blocks343" "0,1"
|
|
bitfld.long 0x00 22. "B_342,blocks342" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_341,blocks341" "0,1"
|
|
bitfld.long 0x00 20. "B_340,blocks340" "0,1"
|
|
bitfld.long 0x00 19. "B_339,blocks339" "0,1"
|
|
bitfld.long 0x00 18. "B_338,blocks338" "0,1"
|
|
bitfld.long 0x00 17. "B_337,blocks337" "0,1"
|
|
bitfld.long 0x00 16. "B_336,blocks336" "0,1"
|
|
bitfld.long 0x00 15. "B_335,blocks335" "0,1"
|
|
bitfld.long 0x00 14. "B_334,blocks334" "0,1"
|
|
bitfld.long 0x00 13. "B_333,blocks333" "0,1"
|
|
bitfld.long 0x00 12. "B_332,blocks332" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_331,blocks331" "0,1"
|
|
bitfld.long 0x00 10. "B_330,blocks330" "0,1"
|
|
bitfld.long 0x00 9. "B_329,blocks329" "0,1"
|
|
bitfld.long 0x00 8. "B_328,blocks328" "0,1"
|
|
bitfld.long 0x00 7. "B_327,blocks327" "0,1"
|
|
bitfld.long 0x00 6. "B_326,blocks326" "0,1"
|
|
bitfld.long 0x00 5. "B_325,blocks325" "0,1"
|
|
bitfld.long 0x00 4. "B_324,blocks324" "0,1"
|
|
bitfld.long 0x00 3. "B_323,blocks323" "0,1"
|
|
bitfld.long 0x00 2. "B_322,blocks322" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_321,blocks 321" "0,1"
|
|
bitfld.long 0x00 0. "B_320,blocks 320" "0,1"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "VEC11,TZBMPC3 vector register 11"
|
|
bitfld.long 0x00 31. "B_383,blocks383" "0,1"
|
|
bitfld.long 0x00 30. "B_382,blocks382" "0,1"
|
|
bitfld.long 0x00 29. "B_381,blocks381" "0,1"
|
|
bitfld.long 0x00 28. "B_380,blocks380" "0,1"
|
|
bitfld.long 0x00 27. "B_379,blocks379" "0,1"
|
|
bitfld.long 0x00 26. "B_378,blocks378" "0,1"
|
|
bitfld.long 0x00 25. "B_377,blocks377" "0,1"
|
|
bitfld.long 0x00 24. "B_376,blocks376" "0,1"
|
|
bitfld.long 0x00 23. "B_375,blocks375" "0,1"
|
|
bitfld.long 0x00 22. "B_374,blocks374" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_373,blocks373" "0,1"
|
|
bitfld.long 0x00 20. "B_372,blocks372" "0,1"
|
|
bitfld.long 0x00 19. "B_371,blocks371" "0,1"
|
|
bitfld.long 0x00 18. "B_370,blocks370" "0,1"
|
|
bitfld.long 0x00 17. "B_369,blocks369" "0,1"
|
|
bitfld.long 0x00 16. "B_368,blocks368" "0,1"
|
|
bitfld.long 0x00 15. "B_367,blocks367" "0,1"
|
|
bitfld.long 0x00 14. "B_366,blocks366" "0,1"
|
|
bitfld.long 0x00 13. "B_365,blocks365" "0,1"
|
|
bitfld.long 0x00 12. "B_364,blocks364" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_363,blocks363" "0,1"
|
|
bitfld.long 0x00 10. "B_362,blocks362" "0,1"
|
|
bitfld.long 0x00 9. "B_361,blocks361" "0,1"
|
|
bitfld.long 0x00 8. "B_360,blocks360" "0,1"
|
|
bitfld.long 0x00 7. "B_359,blocks359" "0,1"
|
|
bitfld.long 0x00 6. "B_358,blocks358" "0,1"
|
|
bitfld.long 0x00 5. "B_357,blocks357" "0,1"
|
|
bitfld.long 0x00 4. "B_356,blocks356" "0,1"
|
|
bitfld.long 0x00 3. "B_355,blocks355" "0,1"
|
|
bitfld.long 0x00 2. "B_354,blocks354" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_353,blocks 353" "0,1"
|
|
bitfld.long 0x00 0. "B_352,blocks 352" "0,1"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "VEC12,TZBMPC3 vector register 12"
|
|
bitfld.long 0x00 31. "B_415,blocks415" "0,1"
|
|
bitfld.long 0x00 30. "B_414,blocks414" "0,1"
|
|
bitfld.long 0x00 29. "B_413,blocks413" "0,1"
|
|
bitfld.long 0x00 28. "B_412,blocks412" "0,1"
|
|
bitfld.long 0x00 27. "B_411,blocks411" "0,1"
|
|
bitfld.long 0x00 26. "B_410,blocks410" "0,1"
|
|
bitfld.long 0x00 25. "B_409,blocks409" "0,1"
|
|
bitfld.long 0x00 24. "B_408,blocks408" "0,1"
|
|
bitfld.long 0x00 23. "B_407,blocks407" "0,1"
|
|
bitfld.long 0x00 22. "B_406,blocks406" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_405,blocks405" "0,1"
|
|
bitfld.long 0x00 20. "B_404,blocks404" "0,1"
|
|
bitfld.long 0x00 19. "B_403,blocks403" "0,1"
|
|
bitfld.long 0x00 18. "B_402,blocks402" "0,1"
|
|
bitfld.long 0x00 17. "B_401,blocks401" "0,1"
|
|
bitfld.long 0x00 16. "B_400,blocks400" "0,1"
|
|
bitfld.long 0x00 15. "B_399,blocks399" "0,1"
|
|
bitfld.long 0x00 14. "B_398,blocks398" "0,1"
|
|
bitfld.long 0x00 13. "B_397,blocks397" "0,1"
|
|
bitfld.long 0x00 12. "B_396,blocks396" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_395,blocks395" "0,1"
|
|
bitfld.long 0x00 10. "B_394,blocks394" "0,1"
|
|
bitfld.long 0x00 9. "B_393,blocks393" "0,1"
|
|
bitfld.long 0x00 8. "B_392,blocks392" "0,1"
|
|
bitfld.long 0x00 7. "B_391,blocks391" "0,1"
|
|
bitfld.long 0x00 6. "B_390,blocks390" "0,1"
|
|
bitfld.long 0x00 5. "B_389,blocks389" "0,1"
|
|
bitfld.long 0x00 4. "B_388,blocks388" "0,1"
|
|
bitfld.long 0x00 3. "B_387,blocks387" "0,1"
|
|
bitfld.long 0x00 2. "B_386,blocks386" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_385,blocks 385" "0,1"
|
|
bitfld.long 0x00 0. "B_384,blocks 384" "0,1"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "VEC13,TZBMPC3 vector register 13"
|
|
bitfld.long 0x00 31. "B_447,blocks447" "0,1"
|
|
bitfld.long 0x00 30. "B_446,blocks446" "0,1"
|
|
bitfld.long 0x00 29. "B_445,blocks445" "0,1"
|
|
bitfld.long 0x00 28. "B_444,blocks444" "0,1"
|
|
bitfld.long 0x00 27. "B_443,blocks443" "0,1"
|
|
bitfld.long 0x00 26. "B_442,blocks442" "0,1"
|
|
bitfld.long 0x00 25. "B_441,blocks441" "0,1"
|
|
bitfld.long 0x00 24. "B_440,blocks440" "0,1"
|
|
bitfld.long 0x00 23. "B_439,blocks439" "0,1"
|
|
bitfld.long 0x00 22. "B_438,blocks438" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_437,blocks437" "0,1"
|
|
bitfld.long 0x00 20. "B_436,blocks436" "0,1"
|
|
bitfld.long 0x00 19. "B_435,blocks435" "0,1"
|
|
bitfld.long 0x00 18. "B_434,blocks434" "0,1"
|
|
bitfld.long 0x00 17. "B_433,blocks433" "0,1"
|
|
bitfld.long 0x00 16. "B_432,blocks432" "0,1"
|
|
bitfld.long 0x00 15. "B_431,blocks431" "0,1"
|
|
bitfld.long 0x00 14. "B_430,blocks430" "0,1"
|
|
bitfld.long 0x00 13. "B_429,blocks429" "0,1"
|
|
bitfld.long 0x00 12. "B_428,blocks428" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_427,blocks427" "0,1"
|
|
bitfld.long 0x00 10. "B_426,blocks426" "0,1"
|
|
bitfld.long 0x00 9. "B_425,blocks425" "0,1"
|
|
bitfld.long 0x00 8. "B_424,blocks424" "0,1"
|
|
bitfld.long 0x00 7. "B_423,blocks423" "0,1"
|
|
bitfld.long 0x00 6. "B_422,blocks422" "0,1"
|
|
bitfld.long 0x00 5. "B_421,blocks421" "0,1"
|
|
bitfld.long 0x00 4. "B_420,blocks420" "0,1"
|
|
bitfld.long 0x00 3. "B_419,blocks419" "0,1"
|
|
bitfld.long 0x00 2. "B_418,blocks418" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_417,blocks 417" "0,1"
|
|
bitfld.long 0x00 0. "B_416,blocks 416" "0,1"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "VEC14,TZBMPC3 vector register 14"
|
|
bitfld.long 0x00 31. "B_479,blocks479" "0,1"
|
|
bitfld.long 0x00 30. "B_478,blocks478" "0,1"
|
|
bitfld.long 0x00 29. "B_477,blocks477" "0,1"
|
|
bitfld.long 0x00 28. "B_476,blocks476" "0,1"
|
|
bitfld.long 0x00 27. "B_475,blocks475" "0,1"
|
|
bitfld.long 0x00 26. "B_474,blocks474" "0,1"
|
|
bitfld.long 0x00 25. "B_473,blocks473" "0,1"
|
|
bitfld.long 0x00 24. "B_472,blocks472" "0,1"
|
|
bitfld.long 0x00 23. "B_471,blocks471" "0,1"
|
|
bitfld.long 0x00 22. "B_470,blocks470" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_469,blocks469" "0,1"
|
|
bitfld.long 0x00 20. "B_468,blocks468" "0,1"
|
|
bitfld.long 0x00 19. "B_467,blocks467" "0,1"
|
|
bitfld.long 0x00 18. "B_466,blocks466" "0,1"
|
|
bitfld.long 0x00 17. "B_465,blocks465" "0,1"
|
|
bitfld.long 0x00 16. "B_464,blocks464" "0,1"
|
|
bitfld.long 0x00 15. "B_463,blocks463" "0,1"
|
|
bitfld.long 0x00 14. "B_462,blocks462" "0,1"
|
|
bitfld.long 0x00 13. "B_461,blocks461" "0,1"
|
|
bitfld.long 0x00 12. "B_460,blocks460" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_459,blocks459" "0,1"
|
|
bitfld.long 0x00 10. "B_458,blocks458" "0,1"
|
|
bitfld.long 0x00 9. "B_457,blocks457" "0,1"
|
|
bitfld.long 0x00 8. "B_456,blocks456" "0,1"
|
|
bitfld.long 0x00 7. "B_455,blocks455" "0,1"
|
|
bitfld.long 0x00 6. "B_454,blocks454" "0,1"
|
|
bitfld.long 0x00 5. "B_453,blocks453" "0,1"
|
|
bitfld.long 0x00 4. "B_452,blocks452" "0,1"
|
|
bitfld.long 0x00 3. "B_451,blocks451" "0,1"
|
|
bitfld.long 0x00 2. "B_450,blocks450" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_449,blocks 449" "0,1"
|
|
bitfld.long 0x00 0. "B_448,blocks 448" "0,1"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "VEC15,TZBMPC3 vector register 15"
|
|
bitfld.long 0x00 31. "B_511,blocks511" "0,1"
|
|
bitfld.long 0x00 30. "B_510,blocks510" "0,1"
|
|
bitfld.long 0x00 29. "B_509,blocks509" "0,1"
|
|
bitfld.long 0x00 28. "B_508,blocks508" "0,1"
|
|
bitfld.long 0x00 27. "B_507,blocks507" "0,1"
|
|
bitfld.long 0x00 26. "B_506,blocks506" "0,1"
|
|
bitfld.long 0x00 25. "B_505,blocks505" "0,1"
|
|
bitfld.long 0x00 24. "B_504,blocks504" "0,1"
|
|
bitfld.long 0x00 23. "B_503,blocks503" "0,1"
|
|
bitfld.long 0x00 22. "B_502,blocks502" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_501,blocks501" "0,1"
|
|
bitfld.long 0x00 20. "B_500,blocks500" "0,1"
|
|
bitfld.long 0x00 19. "B_499,blocks499" "0,1"
|
|
bitfld.long 0x00 18. "B_498,blocks498" "0,1"
|
|
bitfld.long 0x00 17. "B_497,blocks497" "0,1"
|
|
bitfld.long 0x00 16. "B_496,blocks496" "0,1"
|
|
bitfld.long 0x00 15. "B_495,blocks495" "0,1"
|
|
bitfld.long 0x00 14. "B_494,blocks494" "0,1"
|
|
bitfld.long 0x00 13. "B_493,blocks493" "0,1"
|
|
bitfld.long 0x00 12. "B_492,blocks492" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_491,blocks491" "0,1"
|
|
bitfld.long 0x00 10. "B_490,blocks490" "0,1"
|
|
bitfld.long 0x00 9. "B_489,blocks489" "0,1"
|
|
bitfld.long 0x00 8. "B_488,blocks488" "0,1"
|
|
bitfld.long 0x00 7. "B_487,blocks487" "0,1"
|
|
bitfld.long 0x00 6. "B_486,blocks486" "0,1"
|
|
bitfld.long 0x00 5. "B_485,blocks485" "0,1"
|
|
bitfld.long 0x00 4. "B_484,blocks484" "0,1"
|
|
bitfld.long 0x00 3. "B_483,blocks483" "0,1"
|
|
bitfld.long 0x00 2. "B_482,blocks482" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_481,blocks 481" "0,1"
|
|
bitfld.long 0x00 0. "B_480,blocks 480" "0,1"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "VEC16,TZBMPC3 vector register 16"
|
|
bitfld.long 0x00 31. "B_543,blocks543" "0,1"
|
|
bitfld.long 0x00 30. "B_542,blocks542" "0,1"
|
|
bitfld.long 0x00 29. "B_541,blocks541" "0,1"
|
|
bitfld.long 0x00 28. "B_540,blocks540" "0,1"
|
|
bitfld.long 0x00 27. "B_539,blocks539" "0,1"
|
|
bitfld.long 0x00 26. "B_538,blocks538" "0,1"
|
|
bitfld.long 0x00 25. "B_537,blocks537" "0,1"
|
|
bitfld.long 0x00 24. "B_536,blocks536" "0,1"
|
|
bitfld.long 0x00 23. "B_535,blocks535" "0,1"
|
|
bitfld.long 0x00 22. "B_534,blocks534" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_533,blocks533" "0,1"
|
|
bitfld.long 0x00 20. "B_532,blocks532" "0,1"
|
|
bitfld.long 0x00 19. "B_531,blocks531" "0,1"
|
|
bitfld.long 0x00 18. "B_530,blocks530" "0,1"
|
|
bitfld.long 0x00 17. "B_529,blocks529" "0,1"
|
|
bitfld.long 0x00 16. "B_528,blocks528" "0,1"
|
|
bitfld.long 0x00 15. "B_527,blocks527" "0,1"
|
|
bitfld.long 0x00 14. "B_526,blocks526" "0,1"
|
|
bitfld.long 0x00 13. "B_525,blocks525" "0,1"
|
|
bitfld.long 0x00 12. "B_524,blocks524" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_523,blocks523" "0,1"
|
|
bitfld.long 0x00 10. "B_522,blocks522" "0,1"
|
|
bitfld.long 0x00 9. "B_521,blocks521" "0,1"
|
|
bitfld.long 0x00 8. "B_520,blocks520" "0,1"
|
|
bitfld.long 0x00 7. "B_519,blocks519" "0,1"
|
|
bitfld.long 0x00 6. "B_518,blocks518" "0,1"
|
|
bitfld.long 0x00 5. "B_517,blocks517" "0,1"
|
|
bitfld.long 0x00 4. "B_516,blocks516" "0,1"
|
|
bitfld.long 0x00 3. "B_515,blocks515" "0,1"
|
|
bitfld.long 0x00 2. "B_514,blocks514" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_513,blocks 513" "0,1"
|
|
bitfld.long 0x00 0. "B_512,blocks 512" "0,1"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "VEC17,TZBMPC3 vector register 17"
|
|
bitfld.long 0x00 31. "B_575,blocks575" "0,1"
|
|
bitfld.long 0x00 30. "B_574,blocks574" "0,1"
|
|
bitfld.long 0x00 29. "B_573,blocks573" "0,1"
|
|
bitfld.long 0x00 28. "B_572,blocks572" "0,1"
|
|
bitfld.long 0x00 27. "B_571,blocks571" "0,1"
|
|
bitfld.long 0x00 26. "B_570,blocks570" "0,1"
|
|
bitfld.long 0x00 25. "B_569,blocks569" "0,1"
|
|
bitfld.long 0x00 24. "B_568,blocks568" "0,1"
|
|
bitfld.long 0x00 23. "B_567,blocks567" "0,1"
|
|
bitfld.long 0x00 22. "B_566,blocks566" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_565,blocks565" "0,1"
|
|
bitfld.long 0x00 20. "B_564,blocks564" "0,1"
|
|
bitfld.long 0x00 19. "B_563,blocks563" "0,1"
|
|
bitfld.long 0x00 18. "B_562,blocks562" "0,1"
|
|
bitfld.long 0x00 17. "B_561,blocks561" "0,1"
|
|
bitfld.long 0x00 16. "B_560,blocks560" "0,1"
|
|
bitfld.long 0x00 15. "B_559,blocks559" "0,1"
|
|
bitfld.long 0x00 14. "B_558,blocks558" "0,1"
|
|
bitfld.long 0x00 13. "B_557,blocks557" "0,1"
|
|
bitfld.long 0x00 12. "B_556,blocks556" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_555,blocks555" "0,1"
|
|
bitfld.long 0x00 10. "B_554,blocks554" "0,1"
|
|
bitfld.long 0x00 9. "B_553,blocks553" "0,1"
|
|
bitfld.long 0x00 8. "B_552,blocks552" "0,1"
|
|
bitfld.long 0x00 7. "B_551,blocks551" "0,1"
|
|
bitfld.long 0x00 6. "B_550,blocks550" "0,1"
|
|
bitfld.long 0x00 5. "B_549,blocks549" "0,1"
|
|
bitfld.long 0x00 4. "B_548,blocks548" "0,1"
|
|
bitfld.long 0x00 3. "B_547,blocks547" "0,1"
|
|
bitfld.long 0x00 2. "B_546,blocks546" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_545,blocks 545" "0,1"
|
|
bitfld.long 0x00 0. "B_544,blocks 544" "0,1"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "VEC18,TZBMPC3 vector register 18"
|
|
bitfld.long 0x00 31. "B_607,blocks607" "0,1"
|
|
bitfld.long 0x00 30. "B_606,blocks606" "0,1"
|
|
bitfld.long 0x00 29. "B_605,blocks605" "0,1"
|
|
bitfld.long 0x00 28. "B_604,blocks604" "0,1"
|
|
bitfld.long 0x00 27. "B_603,blocks603" "0,1"
|
|
bitfld.long 0x00 26. "B_602,blocks602" "0,1"
|
|
bitfld.long 0x00 25. "B_601,blocks601" "0,1"
|
|
bitfld.long 0x00 24. "B_600,blocks600" "0,1"
|
|
bitfld.long 0x00 23. "B_599,blocks599" "0,1"
|
|
bitfld.long 0x00 22. "B_598,blocks598" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_597,blocks597" "0,1"
|
|
bitfld.long 0x00 20. "B_596,blocks596" "0,1"
|
|
bitfld.long 0x00 19. "B_595,blocks595" "0,1"
|
|
bitfld.long 0x00 18. "B_594,blocks594" "0,1"
|
|
bitfld.long 0x00 17. "B_593,blocks593" "0,1"
|
|
bitfld.long 0x00 16. "B_592,blocks592" "0,1"
|
|
bitfld.long 0x00 15. "B_591,blocks591" "0,1"
|
|
bitfld.long 0x00 14. "B_590,blocks590" "0,1"
|
|
bitfld.long 0x00 13. "B_589,blocks589" "0,1"
|
|
bitfld.long 0x00 12. "B_588,blocks588" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_587,blocks587" "0,1"
|
|
bitfld.long 0x00 10. "B_586,blocks586" "0,1"
|
|
bitfld.long 0x00 9. "B_585,blocks585" "0,1"
|
|
bitfld.long 0x00 8. "B_584,blocks584" "0,1"
|
|
bitfld.long 0x00 7. "B_583,blocks583" "0,1"
|
|
bitfld.long 0x00 6. "B_582,blocks582" "0,1"
|
|
bitfld.long 0x00 5. "B_581,blocks581" "0,1"
|
|
bitfld.long 0x00 4. "B_580,blocks580" "0,1"
|
|
bitfld.long 0x00 3. "B_579,blocks579" "0,1"
|
|
bitfld.long 0x00 2. "B_578,blocks578" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_577,blocks 577" "0,1"
|
|
bitfld.long 0x00 0. "B_576,blocks 576" "0,1"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "VEC19,TZBMPC3 vector register 19"
|
|
bitfld.long 0x00 31. "B_639,blocks639" "0,1"
|
|
bitfld.long 0x00 30. "B_638,blocks638" "0,1"
|
|
bitfld.long 0x00 29. "B_637,blocks637" "0,1"
|
|
bitfld.long 0x00 28. "B_636,blocks636" "0,1"
|
|
bitfld.long 0x00 27. "B_635,blocks635" "0,1"
|
|
bitfld.long 0x00 26. "B_634,blocks634" "0,1"
|
|
bitfld.long 0x00 25. "B_633,blocks633" "0,1"
|
|
bitfld.long 0x00 24. "B_632,blocks632" "0,1"
|
|
bitfld.long 0x00 23. "B_631,blocks631" "0,1"
|
|
bitfld.long 0x00 22. "B_630,blocks630" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_629,blocks629" "0,1"
|
|
bitfld.long 0x00 20. "B_628,blocks628" "0,1"
|
|
bitfld.long 0x00 19. "B_627,blocks627" "0,1"
|
|
bitfld.long 0x00 18. "B_626,blocks626" "0,1"
|
|
bitfld.long 0x00 17. "B_625,blocks625" "0,1"
|
|
bitfld.long 0x00 16. "B_624,blocks624" "0,1"
|
|
bitfld.long 0x00 15. "B_623,blocks623" "0,1"
|
|
bitfld.long 0x00 14. "B_622,blocks622" "0,1"
|
|
bitfld.long 0x00 13. "B_621,blocks621" "0,1"
|
|
bitfld.long 0x00 12. "B_620,blocks620" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_619,blocks619" "0,1"
|
|
bitfld.long 0x00 10. "B_618,blocks618" "0,1"
|
|
bitfld.long 0x00 9. "B_617,blocks617" "0,1"
|
|
bitfld.long 0x00 8. "B_616,blocks616" "0,1"
|
|
bitfld.long 0x00 7. "B_615,blocks615" "0,1"
|
|
bitfld.long 0x00 6. "B_614,blocks614" "0,1"
|
|
bitfld.long 0x00 5. "B_613,blocks613" "0,1"
|
|
bitfld.long 0x00 4. "B_612,blocks612" "0,1"
|
|
bitfld.long 0x00 3. "B_611,blocks611" "0,1"
|
|
bitfld.long 0x00 2. "B_610,blocks610" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_609,blocks 609" "0,1"
|
|
bitfld.long 0x00 0. "B_608,blocks 608" "0,1"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "VEC20,TZBMPC3 vector register 20"
|
|
bitfld.long 0x00 31. "B_671,blocks671" "0,1"
|
|
bitfld.long 0x00 30. "B_670,blocks670" "0,1"
|
|
bitfld.long 0x00 29. "B_669,blocks669" "0,1"
|
|
bitfld.long 0x00 28. "B_668,blocks668" "0,1"
|
|
bitfld.long 0x00 27. "B_667,blocks667" "0,1"
|
|
bitfld.long 0x00 26. "B_666,blocks666" "0,1"
|
|
bitfld.long 0x00 25. "B_665,blocks665" "0,1"
|
|
bitfld.long 0x00 24. "B_664,blocks664" "0,1"
|
|
bitfld.long 0x00 23. "B_663,blocks663" "0,1"
|
|
bitfld.long 0x00 22. "B_662,blocks662" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_661,blocks661" "0,1"
|
|
bitfld.long 0x00 20. "B_660,blocks660" "0,1"
|
|
bitfld.long 0x00 19. "B_659,blocks659" "0,1"
|
|
bitfld.long 0x00 18. "B_658,blocks658" "0,1"
|
|
bitfld.long 0x00 17. "B_657,blocks657" "0,1"
|
|
bitfld.long 0x00 16. "B_656,blocks656" "0,1"
|
|
bitfld.long 0x00 15. "B_655,blocks655" "0,1"
|
|
bitfld.long 0x00 14. "B_654,blocks654" "0,1"
|
|
bitfld.long 0x00 13. "B_653,blocks653" "0,1"
|
|
bitfld.long 0x00 12. "B_652,blocks652" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_651,blocks651" "0,1"
|
|
bitfld.long 0x00 10. "B_650,blocks650" "0,1"
|
|
bitfld.long 0x00 9. "B_649,blocks649" "0,1"
|
|
bitfld.long 0x00 8. "B_648,blocks648" "0,1"
|
|
bitfld.long 0x00 7. "B_647,blocks647" "0,1"
|
|
bitfld.long 0x00 6. "B_646,blocks646" "0,1"
|
|
bitfld.long 0x00 5. "B_645,blocks645" "0,1"
|
|
bitfld.long 0x00 4. "B_644,blocks644" "0,1"
|
|
bitfld.long 0x00 3. "B_643,blocks643" "0,1"
|
|
bitfld.long 0x00 2. "B_642,blocks642" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_641,blocks 641" "0,1"
|
|
bitfld.long 0x00 0. "B_640,blocks 640" "0,1"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "VEC21,TZBMPC3 vector register 21"
|
|
bitfld.long 0x00 31. "B_703,blocks703" "0,1"
|
|
bitfld.long 0x00 30. "B_702,blocks702" "0,1"
|
|
bitfld.long 0x00 29. "B_701,blocks701" "0,1"
|
|
bitfld.long 0x00 28. "B_700,blocks700" "0,1"
|
|
bitfld.long 0x00 27. "B_699,blocks699" "0,1"
|
|
bitfld.long 0x00 26. "B_698,blocks698" "0,1"
|
|
bitfld.long 0x00 25. "B_697,blocks697" "0,1"
|
|
bitfld.long 0x00 24. "B_696,blocks696" "0,1"
|
|
bitfld.long 0x00 23. "B_695,blocks695" "0,1"
|
|
bitfld.long 0x00 22. "B_694,blocks694" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_693,blocks693" "0,1"
|
|
bitfld.long 0x00 20. "B_692,blocks692" "0,1"
|
|
bitfld.long 0x00 19. "B_691,blocks691" "0,1"
|
|
bitfld.long 0x00 18. "B_690,blocks690" "0,1"
|
|
bitfld.long 0x00 17. "B_689,blocks689" "0,1"
|
|
bitfld.long 0x00 16. "B_688,blocks688" "0,1"
|
|
bitfld.long 0x00 15. "B_687,blocks687" "0,1"
|
|
bitfld.long 0x00 14. "B_686,blocks686" "0,1"
|
|
bitfld.long 0x00 13. "B_685,blocks685" "0,1"
|
|
bitfld.long 0x00 12. "B_684,blocks684" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_683,blocks683" "0,1"
|
|
bitfld.long 0x00 10. "B_682,blocks682" "0,1"
|
|
bitfld.long 0x00 9. "B_681,blocks681" "0,1"
|
|
bitfld.long 0x00 8. "B_680,blocks680" "0,1"
|
|
bitfld.long 0x00 7. "B_679,blocks679" "0,1"
|
|
bitfld.long 0x00 6. "B_678,blocks678" "0,1"
|
|
bitfld.long 0x00 5. "B_677,blocks677" "0,1"
|
|
bitfld.long 0x00 4. "B_676,blocks676" "0,1"
|
|
bitfld.long 0x00 3. "B_675,blocks675" "0,1"
|
|
bitfld.long 0x00 2. "B_674,blocks674" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_673,blocks 673" "0,1"
|
|
bitfld.long 0x00 0. "B_672,blocks 672" "0,1"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "VEC22,TZBMPC3 vector register 22"
|
|
bitfld.long 0x00 31. "B_735,blocks735" "0,1"
|
|
bitfld.long 0x00 30. "B_734,blocks734" "0,1"
|
|
bitfld.long 0x00 29. "B_733,blocks733" "0,1"
|
|
bitfld.long 0x00 28. "B_732,blocks732" "0,1"
|
|
bitfld.long 0x00 27. "B_731,blocks731" "0,1"
|
|
bitfld.long 0x00 26. "B_730,blocks730" "0,1"
|
|
bitfld.long 0x00 25. "B_729,blocks729" "0,1"
|
|
bitfld.long 0x00 24. "B_728,blocks728" "0,1"
|
|
bitfld.long 0x00 23. "B_727,blocks727" "0,1"
|
|
bitfld.long 0x00 22. "B_726,blocks726" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_725,blocks725" "0,1"
|
|
bitfld.long 0x00 20. "B_724,blocks724" "0,1"
|
|
bitfld.long 0x00 19. "B_723,blocks723" "0,1"
|
|
bitfld.long 0x00 18. "B_722,blocks722" "0,1"
|
|
bitfld.long 0x00 17. "B_721,blocks721" "0,1"
|
|
bitfld.long 0x00 16. "B_720,blocks720" "0,1"
|
|
bitfld.long 0x00 15. "B_719,blocks719" "0,1"
|
|
bitfld.long 0x00 14. "B_718,blocks718" "0,1"
|
|
bitfld.long 0x00 13. "B_717,blocks717" "0,1"
|
|
bitfld.long 0x00 12. "B_716,blocks716" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_715,blocks715" "0,1"
|
|
bitfld.long 0x00 10. "B_714,blocks714" "0,1"
|
|
bitfld.long 0x00 9. "B_713,blocks713" "0,1"
|
|
bitfld.long 0x00 8. "B_712,blocks712" "0,1"
|
|
bitfld.long 0x00 7. "B_711,blocks711" "0,1"
|
|
bitfld.long 0x00 6. "B_710,blocks710" "0,1"
|
|
bitfld.long 0x00 5. "B_709,blocks709" "0,1"
|
|
bitfld.long 0x00 4. "B_708,blocks708" "0,1"
|
|
bitfld.long 0x00 3. "B_707,blocks707" "0,1"
|
|
bitfld.long 0x00 2. "B_706,blocks706" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_705,blocks 705" "0,1"
|
|
bitfld.long 0x00 0. "B_704,blocks 704" "0,1"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "VEC23,TZBMPC3 vector register 23"
|
|
bitfld.long 0x00 31. "B_767,blocks767" "0,1"
|
|
bitfld.long 0x00 30. "B_766,blocks766" "0,1"
|
|
bitfld.long 0x00 29. "B_765,blocks765" "0,1"
|
|
bitfld.long 0x00 28. "B_764,blocks764" "0,1"
|
|
bitfld.long 0x00 27. "B_763,blocks763" "0,1"
|
|
bitfld.long 0x00 26. "B_762,blocks762" "0,1"
|
|
bitfld.long 0x00 25. "B_761,blocks761" "0,1"
|
|
bitfld.long 0x00 24. "B_760,blocks760" "0,1"
|
|
bitfld.long 0x00 23. "B_759,blocks759" "0,1"
|
|
bitfld.long 0x00 22. "B_758,blocks758" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_757,blocks757" "0,1"
|
|
bitfld.long 0x00 20. "B_756,blocks756" "0,1"
|
|
bitfld.long 0x00 19. "B_755,blocks755" "0,1"
|
|
bitfld.long 0x00 18. "B_754,blocks754" "0,1"
|
|
bitfld.long 0x00 17. "B_753,blocks753" "0,1"
|
|
bitfld.long 0x00 16. "B_752,blocks752" "0,1"
|
|
bitfld.long 0x00 15. "B_751,blocks751" "0,1"
|
|
bitfld.long 0x00 14. "B_750,blocks750" "0,1"
|
|
bitfld.long 0x00 13. "B_749,blocks749" "0,1"
|
|
bitfld.long 0x00 12. "B_748,blocks748" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_747,blocks747" "0,1"
|
|
bitfld.long 0x00 10. "B_746,blocks746" "0,1"
|
|
bitfld.long 0x00 9. "B_745,blocks745" "0,1"
|
|
bitfld.long 0x00 8. "B_744,blocks744" "0,1"
|
|
bitfld.long 0x00 7. "B_743,blocks743" "0,1"
|
|
bitfld.long 0x00 6. "B_742,blocks742" "0,1"
|
|
bitfld.long 0x00 5. "B_741,blocks741" "0,1"
|
|
bitfld.long 0x00 4. "B_740,blocks740" "0,1"
|
|
bitfld.long 0x00 3. "B_739,blocks739" "0,1"
|
|
bitfld.long 0x00 2. "B_738,blocks738" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_737,blocks 737" "0,1"
|
|
bitfld.long 0x00 0. "B_736,blocks 736" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK0,TZBMPC1 lock register0"
|
|
bitfld.long 0x00 23. "LKUB23,lock/unlock status of secure access mode for the super-blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "LKUB22,lock/unlock status of secure access mode for the super-blocks 22" "0,1"
|
|
bitfld.long 0x00 21. "LKUB21,lock/unlock status of secure access mode for the super-blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "LKUB20,lock/unlock status of secure access mode for the super-blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "LKUB19,lock/unlock status of secure access mode for the super-blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "LKUB18,lock/unlock status of secure access mode for the super-blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "LKUB17,lock/unlock status of secure access mode for the super-blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "LKUB16,lock/unlock status of secure access mode for the super-blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "LKUB15,lock/unlock status of secure access mode for the super-blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "LKUB14,lock/unlock status of secure access mode for the super-blocks 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "LKUB13,lock/unlock status of secure access mode for the super-blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "LKUB12,lock/unlock status of secure access mode for the super-blocks 12" "0,1"
|
|
bitfld.long 0x00 11. "LKUB11,lock/unlock status of secure access mode for the super-blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "LKUB10,lock/unlock status of secure access mode for the super-blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "LKUB9,lock/unlock status of secure access mode for the super-blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "LKUB8,lock/unlock status of secure access mode for the super-blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "LKUB7,lock/unlock status of secure access mode for the super-blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "LKUB6,lock/unlock status of secure access mode for the super-blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "LKUB5,lock/unlock status of secure access mode for the super-blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "LKUB4,lock/unlock status of secure access mode for the super-blocks 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "LKUB3,lock/unlock status of secure access mode for the super-blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "LKUB2,lock/unlock status of secure access mode for the super-blocks 2" "0,1"
|
|
bitfld.long 0x00 1. "LKUB1,lock/unlock status of secure access mode for the super-blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "LKUB0,lock/unlock status of secure access mode for the super-blocks 0" "0,1"
|
|
tree.end
|
|
tree "SEC_TZIAC"
|
|
base ad:0x500A0400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INTEN0,TZIAC interrupt enable register 0"
|
|
bitfld.long 0x00 31. "SPI0IE,SPI0 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0IE,TIMER0 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSIE,USBFS illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1IE,I2C1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0IE,I2C0 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2IE,USART2 illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "USART1IE,USART1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 8. "SPI1IE,SPI1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGIE,FWDG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGIE,WWDG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5IE,TIMER5 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4IE,TIMER4 illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TIMER3IE,TIMER3 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2IE,TIMER2 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1IE,TIMER1 illegal access interrupt enable bit" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTEN1,TZIAC interrupt enable register 1"
|
|
bitfld.long 0x00 28. "EXTIIE,EXTI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIE,FLASH REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIE,FLASH illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIE,RCU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IE,DMA1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IE,DMA0 illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSCFGIE,SYSCFG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIE,PWR illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIE,RTC illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIE,SDIO illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIE,PKCAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 14. "RNGIE,RNG illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIE,HAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIE,CAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIE,ADC illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEIE,ICACHE_REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIE,TSI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCIE,CRC illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER16IE,TIMER16 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IE,TIMER15 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IE,USART0 illegal access interrupt enable bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTEN1,TZIAC interrupt enable register 1"
|
|
bitfld.long 0x00 28. "EXTIIE,EXTI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIE,FLASH REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIE,FLASH illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIE,RCU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IE,DMA1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IE,DMA0 illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSCFGIE,SYSCFG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIE,PWR illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIE,RTC illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIE,SDIO illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIE,PKCAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 14. "RNGIE,RNG illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIE,HAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIE,CAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIE,ADC illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEIE,ICACHE_REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIE,TSI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCIE,CRC illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "HPDFIE,HPDF illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16IE,TIMER16 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IE,TIMER15 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IE,USART0 illegal access interrupt enable bit" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTEN2,TZIAC interrupt enable register 2"
|
|
bitfld.long 0x00 31. "WIAN11NIE,WIAN11N illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 30. "DCMIIE,DCMI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 29. "I2SADDIE,I2SADD illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFIE,WIFI RF illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGIE,QSPI FLASHREG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGIE,SQPI PSRAMREG illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "QSPI_FLASHIE,QSPI FLASH illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 24. "SQPI_PSRAMIE,SQPI PSRAM illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSEIE,EFUSE illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 11. "TZBMPC3_REGIE,TZBMPC3 REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "SRAM3IE,SRAM3 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 9. "TZBMPC2_REGIE,TZBMPC2 REG illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SRAM2IE,SRAM2 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 7. "TZBMPC1_REGIE,TZBMPC1 REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1IE,SRAM1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 5. "TZBMPC0_REGIE,TZBMPC0 REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 4. "SRAM0IE,SRAM0 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 1. "TZIACIE,TZIAC illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TZSPCIE,TZSPC illegal access interrupt enable bit" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "STAT0,TZIAC status register 0"
|
|
bitfld.long 0x00 31. "SPI0IAF,SPI0 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0IAF,TIMER0 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSIAF,USBFS illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1IAF,I2C1 illegal access flag bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0IAF,I2C0 illegal access flag bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2IAF,USART2 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "USART1IAF,USART1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 8. "SPI1IAF,SPI1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGIAF,FWDG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGIAF,WWDG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5IAF,TIMER5 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4IAF,TIMER4 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TIMER3IAF,TIMER3 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2IAF,TIMER2 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1IAF,TIMER1 illegal access event flag bit" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "STAT1,TZIAC status register 1"
|
|
bitfld.long 0x00 28. "EXTIIAF,EXTI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIAF,FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIAF,FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIAF,RCU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IAF,DMA1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IAF,DMA0 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSCCFGIAF,SYSCFG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIAF,PMU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIAF,RTC illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIAF,SDIO illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIAF,PKCAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGIAF,TRNG illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIAF,HAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIAF,CAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIAF,ADC illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHHEIAF,ICACHE illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIAF,TSI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16IAF,TIMER16 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TIMER15IAF,TIMER15 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IAF,USART0 illegal access event flag bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "STAT1,TZIAC status register 1"
|
|
bitfld.long 0x00 28. "EXTIIAF,EXTI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIAF,FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIAF,FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIAF,RCU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IAF,DMA1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IAF,DMA0 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSCCFGIAF,SYSCFG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIAF,PMU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIAF,RTC illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIAF,SDIO illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIAF,PKCAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGIAF,TRNG illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIAF,HAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIAF,CAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIAF,ADC illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHHEIAF,ICACHE illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIAF,TSI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 7. "HPDFIAF,HPDF illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER16IAF,TIMER16 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IAF,TIMER15 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IAF,USART0 illegal access event flag bit" "0,1"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "STAT2,TZIAC status register 2"
|
|
bitfld.long 0x00 31. "WIFIIAF,WIFI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 30. "DCMIIAF,DCMI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 29. "I2SADDIAF,I2SADD illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFIAF,EIFI RF illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGIAF,QSPI FLASHREG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGIAF,SQSPI PSRAMREG illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "QSPI_FLASHIAF,QSPI FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 24. "SQPI_PSRAMIAF,SQPI PSRAM illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSEIAF,EFUSE illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 11. "TZBMPC3_REGIAF,TZBMPC3 REG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 10. "SRAM3IAF,SRAM3 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 9. "TZBMPC2_REGIAF,TZBMPC2 REG illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SRAM2IAF,SRAM2 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 7. "TZBMPC1_REGIAF,TZBMPC2 REG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1IAF,SRAM1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 5. "TZBMPC0_REGIAF,TZBMPC1 REG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 4. "SRAM0IAF,SRAM0 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 1. "TZIACIAF,TZIAC illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TZSPCIAF,TZSPC illegal access event flag bit" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "STATC0,TZIAC flag clear register 0"
|
|
bitfld.long 0x00 31. "SPI0IAFC,SPI0 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0IAFC,TIMER0 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSIAFC,USBFS illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1IAFC,I2C1 illegal access flag clear bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0IAFC,I2C0 illegal access flag clear bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2IAFC,USART2 illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "USART1IAFC,USART1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 8. "SPI1IAFC,SPI1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGIAFC,FWDG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGIAFC,WWDG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5IAFC,TIMER5 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4IAFC,TIMER4 illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TIMER3IAFC,TIMER3 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2IAFC,TIMER2 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1IAFC,TIMER1 illegal access event flag clear bit" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "STATC1,TZIAC flag clear register 1"
|
|
bitfld.long 0x00 28. "EXTIIAFC,EXTI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIAFC,FMC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIAFC,FLASH illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIAFC,RCU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IAFC,DMA1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IAFC,DMA0 illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSC_CFGIAFC,SYS CFG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIAFC,PMU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIAFC,RTC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIAFC,SDIO illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIAFC,PKCAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGIAFC,TRNG illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIAFC,HAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIAFC,CAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIAFC,ADC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEIAFC,ICACHE illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIAFC,TSI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCIAFC,CRC illegal access flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER16IAFC,TIMER16 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IAFC,TIMER15 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IAFC,USART0 illegal access event flag clear bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "STATC1,TZIAC flag clear register 1"
|
|
bitfld.long 0x00 28. "EXTIIAFC,EXTI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIAFC,FMC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIAFC,FLASH illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIAFC,RCU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IAFC,DMA1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IAFC,DMA0 illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSC_CFGIAFC,SYS CFG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIAFC,PMU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIAFC,RTC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIAFC,SDIO illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIAFC,PKCAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGIAFC,TRNG illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIAFC,HAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIAFC,CAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIAFC,ADC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEIAFC,ICACHE illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIAFC,TSI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCIAFC,CRC illegal access flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "HPDFIAFC,HPDF illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16IAFC,TIMER16 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IAFC,TIMER15 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IAFC,USART0 illegal access event flag clear bit" "0,1"
|
|
endif
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "STATC2,TZIAC flag clear register 2"
|
|
bitfld.long 0x00 31. "WIFINIAFC,WIFI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 30. "DCMIIAFC,DCMI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 29. "I2SADDIAFC,I2SADD illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFIAFC,EIFI RF illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGIAFC,QSPI FLASHREG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGIAFC,SQSPI PSRAMREG illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "QSPI_FLASHIAFC,QSPI FLASH illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 24. "SQPI_PSRAMIAFC,SQPI PSRAM illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSEIAFC,EFUSE illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 11. "TZBMPC3_REGIAFC,TZBMPC3 REG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 10. "SRAM3IAFC,SRAM3 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 9. "TZBMPC2_REGIAFC,TZBMPC2 REG illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SRAM2IAFC,SRAM2 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 7. "TZBMPC1_REGIAFC,TZBMPC2 REG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1IAFC,SRAM1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 5. "TZBMPC0_REGIAFC,TZBMPC1 REG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 4. "SRAM0IAFC,SRAM0 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "TZIACIAF,TZIAC illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TZSPCIAFC,TZSPC illegal access event flag clear bit" "0,1"
|
|
tree.end
|
|
tree "SEC_TZSPC"
|
|
base ad:0x500A0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZSPC control register"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SAM_CFG0,TZSPC secure access mode configuration register 0"
|
|
bitfld.long 0x00 31. "SPI0SAM,SPI0 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0SAM,TIMER0 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSSAM,USBFS secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1SAM,I2C1 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0SAM,I2C0 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2SAM,USART2 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "USART1SAM,USART1 secure access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SPI1SAM,SPI1 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGSAM,FWDG secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGSAM,WWDG secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5SAM,TIMER5 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4SAM,TIMER4 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3SAM,TIMER3 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2SAM,TIMER2 secure access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TIMER1SAM,TIMER1 secure access mode configuration bit" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SAM_CFG1,TZSPC secure access mode configuration register 1"
|
|
bitfld.long 0x00 16. "SDIOSAM,SDIO secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUSAM,PKCAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGSAM,TRNG secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 13. "HAUSAM,HAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUSAM,CAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCSAM,ADC secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHESAM,ICACHE secure access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TSISAM,TSI secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCSAM,CRC secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16SAM,TIMER16 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15SAM,TIMER15 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0SAM,USART0 secure access mode configuration bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SAM_CFG1,TZSPC secure access mode configuration register 1"
|
|
bitfld.long 0x00 16. "SDIOSAM,SDIO secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUSAM,PKCAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGSAM,TRNG secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 13. "HAUSAM,HAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUSAM,CAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCSAM,ADC secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHESAM,ICACHE secure access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TSISAM,TSI secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCSAM,CRC secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 7. "HPDFSAM,HPDF secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16SAM,TIMER16 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15SAM,TIMER15 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0SAM,USART0 secure access mode configuration bit" "0,1"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SAM_CFG2,TZSPC secure access mode configuration register 2"
|
|
bitfld.long 0x00 31. "WIFISAM,WIFI secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 30. "DCMISAM,DCMI secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 29. "I2S1ADDSAM,I2S1ADD secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFSAM,WIFI RF secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGSAM,QSPI flash register secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGSAM,SQPI PSRAM register secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSESAM,EFUSE register secure access mode configuration bit" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PAM_CFG0,TZSPC privilege access mode configuration register1"
|
|
bitfld.long 0x00 31. "SPI0PAM,SPI0 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0PAM,TIMER0 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSPAM,USBFS privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1PAM,I2C1 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0PAM,I2C0 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2PAM,USART2 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "USART1PAM,USART1 privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SPI1PAM,SPI1 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGPAM,FWDG privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGPAM,WWDG privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5PAM,TIMER5 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4PAM,TIMER4 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3PAM,TIMER3 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2PAM,TIMER2 privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TIMER1PAM,TIMER1 privilege access mode configuration bit" "0,1"
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PAM_CFG1,TZSPC privilege access mode configuration register 1"
|
|
bitfld.long 0x00 16. "SDIOPAM,SDIO privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUPAM,PKCAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGPAM,TRNG privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 13. "HAUPAM,HAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUPAM,CAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCPAM,ADC privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEPAM,ICACHE register privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TSIPAM,TSI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCPAM,CRC privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 7. "HPDFPAM,HPDF privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16PAM,TIMER16 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15PAM,TIMER15 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0PAM,USART0 privilege access mode configuration bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PAM_CFG1,TZSPC privilege access mode configuration register 1"
|
|
bitfld.long 0x00 16. "SDIOPAM,SDIO privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUPAM,PKCAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGPAM,TRNG privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 13. "HAUPAM,HAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUPAM,CAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCPAM,ADC privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEPAM,ICACHE register privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TSIPAM,TSI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCPAM,CRC privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16PAM,TIMER16 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15PAM,TIMER15 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0PAM,USART0 privilege access mode configuration bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PAM_CFG2,TZSPC privilege access mode configuration register 2"
|
|
bitfld.long 0x00 31. "WIFIPAM,WIFI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 30. "DCIPAM,DCI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 29. "I2S1ADDPAM,I2S1ADD privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFPAM,WIFI RF privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGPAM,QSPI flash register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGPAM,SQPI PSRAM register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 25. "DBGPAM,DBG register privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "EFUSEPAM,EFUSE register privilege access mode configuration bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PAM_CFG2,TZSPC privilege access mode configuration register 2"
|
|
bitfld.long 0x00 31. "WIFIPAM,WIFI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 29. "I2S1ADDPAM,I2S1ADD privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFPAM,WIFI RF privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGPAM,QSPI flash register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGPAM,SQPI PSRAM register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 25. "DBGPAM,DBG register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSEPAM,EFUSE register privilege access mode configuration bit" "0,1"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TZMMPC0_NSM0,TZSPC external memory 0 non-secure mark register 0"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM0_LEN,Length of the first non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM0_SADD,The non-secure area (multiple of 8 Kbytes) start address of TZBPC0"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TZMMPC0_NSM1,TZSPC external memory 0 non-secure mark register 1"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM1_LEN,Length of the first non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM1_SADD,The first non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TZMPC0_NSM2,TZSPC external memory 0 non-secure mark register 2"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM2_LEN,Length of the non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM2_SADD,The non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TZMPC0_NSM3,TZSPC external memory 0 non-secure mark register 3"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM3_LEN,Length of the first non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM3_SADD,The first non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TZMMPC1_NSM0,TZSPC external memory 1 non-secure mark register 0"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM0_LEN,Length of the non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM0_SADD,The non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TZMMPC1_NSM1,TZSPC external memory 1 non-secure mark register 1"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM1_LEN,Length of the non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM1_SADD,The non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "DBG_CFG,TZSPC debug configuration register"
|
|
bitfld.long 0x00 3. "SPNIDEN,Secure non-invasive debug enable bit" "0,1"
|
|
bitfld.long 0x00 2. "SPIDEN,Secure invasive debug enable bit" "0,1"
|
|
bitfld.long 0x00 1. "NIDEN,Non-invasive debug enable bit" "0,1"
|
|
bitfld.long 0x00 0. "IDEN,Invasive debug enable bit" "0,1"
|
|
tree.end
|
|
tree "TZBMPC0"
|
|
base ad:0x400A0800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZBMPC0 control register"
|
|
bitfld.long 0x00 31. "SRWACFG,secure read/write illegal access disable" "0,1"
|
|
bitfld.long 0x00 30. "SECSTATCFG,default security state" "0,1"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VEC0,TZBMPC0 vector register 0"
|
|
bitfld.long 0x00 31. "B_31,blocks 31" "0,1"
|
|
bitfld.long 0x00 30. "B_30,blocks 30" "0,1"
|
|
bitfld.long 0x00 29. "B_29,blocks 29" "0,1"
|
|
bitfld.long 0x00 28. "B_28,blocks 28" "0,1"
|
|
bitfld.long 0x00 27. "B_27,blocks 27" "0,1"
|
|
bitfld.long 0x00 26. "B_26,blocks 26" "0,1"
|
|
bitfld.long 0x00 25. "B_25,blocks 25" "0,1"
|
|
bitfld.long 0x00 24. "B_24,blocks 24" "0,1"
|
|
bitfld.long 0x00 23. "B_23,blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "B_22,blocks 22" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_21,blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "B_20,blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "B_19,blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "B_18,blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "B_17,blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "B_16,blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "B_15,blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "B_14,blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "B_13,blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "B_12,blocks 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_11,blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "B_10,blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "B_9,blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "B_8,blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "B_7,blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "B_6,blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "B_5,blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "B_4,blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "B_3,blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "B_2,blocks 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_1,blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "B_0,blocks 0" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VEC1,TZBMPC0 vector register 1"
|
|
bitfld.long 0x00 31. "B_63,blocks 63" "0,1"
|
|
bitfld.long 0x00 30. "B_62,blocks 62" "0,1"
|
|
bitfld.long 0x00 29. "B_61,blocks 61" "0,1"
|
|
bitfld.long 0x00 28. "B_60,blocks 60" "0,1"
|
|
bitfld.long 0x00 27. "B_59,blocks 59" "0,1"
|
|
bitfld.long 0x00 26. "B_58,blocks 58" "0,1"
|
|
bitfld.long 0x00 25. "B_57,blocks 57" "0,1"
|
|
bitfld.long 0x00 24. "B_56,blocks 56" "0,1"
|
|
bitfld.long 0x00 23. "B_55,blocks 55" "0,1"
|
|
bitfld.long 0x00 22. "B_54,blocks 54" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_53,blocks 53" "0,1"
|
|
bitfld.long 0x00 20. "B_52,blocks 52" "0,1"
|
|
bitfld.long 0x00 19. "B_51,blocks 51" "0,1"
|
|
bitfld.long 0x00 18. "B_50,blocks 50" "0,1"
|
|
bitfld.long 0x00 17. "B_49,blocks 49" "0,1"
|
|
bitfld.long 0x00 16. "B_48,blocks 48" "0,1"
|
|
bitfld.long 0x00 15. "B_47,blocks 47" "0,1"
|
|
bitfld.long 0x00 14. "B_46,blocks 46" "0,1"
|
|
bitfld.long 0x00 13. "B_45,blocks 45" "0,1"
|
|
bitfld.long 0x00 12. "B_44,blocks 44" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_43,blocks 43" "0,1"
|
|
bitfld.long 0x00 10. "B_42,blocks 42" "0,1"
|
|
bitfld.long 0x00 9. "B_41,blocks 41" "0,1"
|
|
bitfld.long 0x00 8. "B_40,blocks 40" "0,1"
|
|
bitfld.long 0x00 7. "B_39,blocks 39" "0,1"
|
|
bitfld.long 0x00 6. "B_38,blocks 38" "0,1"
|
|
bitfld.long 0x00 5. "B_37,blocks 37" "0,1"
|
|
bitfld.long 0x00 4. "B_36,blocks 36" "0,1"
|
|
bitfld.long 0x00 3. "B_35,blocks 35" "0,1"
|
|
bitfld.long 0x00 2. "B_34,blocks 34" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_33,blocks 33" "0,1"
|
|
bitfld.long 0x00 0. "B_32,blocks 32" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VEC2,TZBMPC0 vector register 2"
|
|
bitfld.long 0x00 31. "B_95,blocks 95" "0,1"
|
|
bitfld.long 0x00 30. "B_94,blocks 94" "0,1"
|
|
bitfld.long 0x00 29. "B_93,blocks 93" "0,1"
|
|
bitfld.long 0x00 28. "B_92,blocks 92" "0,1"
|
|
bitfld.long 0x00 27. "B_91,blocks 91" "0,1"
|
|
bitfld.long 0x00 26. "B_90,blocks 90" "0,1"
|
|
bitfld.long 0x00 25. "B_89,blocks 89" "0,1"
|
|
bitfld.long 0x00 24. "B_88,blocks 88" "0,1"
|
|
bitfld.long 0x00 23. "B_87,blocks 87" "0,1"
|
|
bitfld.long 0x00 22. "B_86,blocks 86" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_85,blocks 85" "0,1"
|
|
bitfld.long 0x00 20. "B_84,blocks 84" "0,1"
|
|
bitfld.long 0x00 19. "B_83,blocks 83" "0,1"
|
|
bitfld.long 0x00 18. "B_82,blocks 82" "0,1"
|
|
bitfld.long 0x00 17. "B_81,blocks 81" "0,1"
|
|
bitfld.long 0x00 16. "B_80,blocks 80" "0,1"
|
|
bitfld.long 0x00 15. "B_79,blocks 79" "0,1"
|
|
bitfld.long 0x00 14. "B_78,blocks 78" "0,1"
|
|
bitfld.long 0x00 13. "B_77,blocks 77" "0,1"
|
|
bitfld.long 0x00 12. "B_76,blocks 76" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_75,blocks 75" "0,1"
|
|
bitfld.long 0x00 10. "B_74,blocks 74" "0,1"
|
|
bitfld.long 0x00 9. "B_73,blocks 73" "0,1"
|
|
bitfld.long 0x00 8. "B_72,blocks 72" "0,1"
|
|
bitfld.long 0x00 7. "B_71,blocks 71" "0,1"
|
|
bitfld.long 0x00 6. "B_70,blocks 70" "0,1"
|
|
bitfld.long 0x00 5. "B_69,blocks 69" "0,1"
|
|
bitfld.long 0x00 4. "B_68,blocks 68" "0,1"
|
|
bitfld.long 0x00 3. "B_67,blocks 67" "0,1"
|
|
bitfld.long 0x00 2. "B_66,blocks 66" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_65,blocks 65" "0,1"
|
|
bitfld.long 0x00 0. "B_64,blocks 64" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VEC3,TZBMPC0 vector register 3"
|
|
bitfld.long 0x00 31. "B_127,blocks 127" "0,1"
|
|
bitfld.long 0x00 30. "B_126,blocks 126" "0,1"
|
|
bitfld.long 0x00 29. "B_125,blocks 125" "0,1"
|
|
bitfld.long 0x00 28. "B_124,blocks 124" "0,1"
|
|
bitfld.long 0x00 27. "B_123,blocks 123" "0,1"
|
|
bitfld.long 0x00 26. "B_122,blocks 122" "0,1"
|
|
bitfld.long 0x00 25. "B_121,blocks 121" "0,1"
|
|
bitfld.long 0x00 24. "B_120,blocks 120" "0,1"
|
|
bitfld.long 0x00 23. "B_119,blocks 119" "0,1"
|
|
bitfld.long 0x00 22. "B_118,blocks 118" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_117,blocks 117" "0,1"
|
|
bitfld.long 0x00 20. "B_116,blocks 116" "0,1"
|
|
bitfld.long 0x00 19. "B_115,blocks 115" "0,1"
|
|
bitfld.long 0x00 18. "B_114,blocks 114" "0,1"
|
|
bitfld.long 0x00 17. "B_113,blocks 113" "0,1"
|
|
bitfld.long 0x00 16. "B_112,blocks 112" "0,1"
|
|
bitfld.long 0x00 15. "B_111,blocks 111" "0,1"
|
|
bitfld.long 0x00 14. "B_110,blocks 110" "0,1"
|
|
bitfld.long 0x00 13. "B_109,blocks 109" "0,1"
|
|
bitfld.long 0x00 12. "B_108,blocks 108" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_107,blocks 107" "0,1"
|
|
bitfld.long 0x00 10. "B_106,blocks 106" "0,1"
|
|
bitfld.long 0x00 9. "B_105,blocks 105" "0,1"
|
|
bitfld.long 0x00 8. "B_104,blocks 104" "0,1"
|
|
bitfld.long 0x00 7. "B_103,blocks 103" "0,1"
|
|
bitfld.long 0x00 6. "B_102,blocks 102" "0,1"
|
|
bitfld.long 0x00 5. "B_101,blocks 101" "0,1"
|
|
bitfld.long 0x00 4. "B_100,blocks 100" "0,1"
|
|
bitfld.long 0x00 3. "B_99,blocks 99" "0,1"
|
|
bitfld.long 0x00 2. "B_98,blocks 98" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_97,blocks 97" "0,1"
|
|
bitfld.long 0x00 0. "B_96,blocks 96" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VEC4,TZBMPC0 vector register 4"
|
|
bitfld.long 0x00 31. "B_159,blocks 159" "0,1"
|
|
bitfld.long 0x00 30. "B_158,blocks 158" "0,1"
|
|
bitfld.long 0x00 29. "B_157,blocks 157" "0,1"
|
|
bitfld.long 0x00 28. "B_156,blocks 156" "0,1"
|
|
bitfld.long 0x00 27. "B_155,blocks 155" "0,1"
|
|
bitfld.long 0x00 26. "B_154,blocks 154" "0,1"
|
|
bitfld.long 0x00 25. "B_153,blocks 153" "0,1"
|
|
bitfld.long 0x00 24. "B_152,blocks 152" "0,1"
|
|
bitfld.long 0x00 23. "B_151,blocks 151" "0,1"
|
|
bitfld.long 0x00 22. "B_150,blocks 150" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_149,blocks 149" "0,1"
|
|
bitfld.long 0x00 20. "B_148,blocks 148" "0,1"
|
|
bitfld.long 0x00 19. "B_147,blocks 147" "0,1"
|
|
bitfld.long 0x00 18. "B_146,blocks 146" "0,1"
|
|
bitfld.long 0x00 17. "B_145,blocks 145" "0,1"
|
|
bitfld.long 0x00 16. "B_144,blocks 144" "0,1"
|
|
bitfld.long 0x00 15. "B_143,blocks 143" "0,1"
|
|
bitfld.long 0x00 14. "B_142,blocks 142" "0,1"
|
|
bitfld.long 0x00 13. "B_141,blocks 141" "0,1"
|
|
bitfld.long 0x00 12. "B_140,blocks 140" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_139,blocks 139" "0,1"
|
|
bitfld.long 0x00 10. "B_138,blocks 138" "0,1"
|
|
bitfld.long 0x00 9. "B_137,blocks 137" "0,1"
|
|
bitfld.long 0x00 8. "B_136,blocks 136" "0,1"
|
|
bitfld.long 0x00 7. "B_135,blocks 135" "0,1"
|
|
bitfld.long 0x00 6. "B_134,blocks 134" "0,1"
|
|
bitfld.long 0x00 5. "B_133,blocks 133" "0,1"
|
|
bitfld.long 0x00 4. "B_132,blocks 132" "0,1"
|
|
bitfld.long 0x00 3. "B_131,blocks 131" "0,1"
|
|
bitfld.long 0x00 2. "B_130,blocks 130" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_129,blocks 129" "0,1"
|
|
bitfld.long 0x00 0. "B_128,blocks 128" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VEC5,TZBMPC0 vector register 5"
|
|
bitfld.long 0x00 31. "B_191,blocks 191" "0,1"
|
|
bitfld.long 0x00 30. "B_190,blocks 190" "0,1"
|
|
bitfld.long 0x00 29. "B_189,blocks 189" "0,1"
|
|
bitfld.long 0x00 28. "B_188,blocks 188" "0,1"
|
|
bitfld.long 0x00 27. "B_187,blocks 187" "0,1"
|
|
bitfld.long 0x00 26. "B_186,blocks 186" "0,1"
|
|
bitfld.long 0x00 25. "B_185,blocks 185" "0,1"
|
|
bitfld.long 0x00 24. "B_184,blocks 184" "0,1"
|
|
bitfld.long 0x00 23. "B_183,blocks 183" "0,1"
|
|
bitfld.long 0x00 22. "B_182,blocks 182" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_181,blocks 181" "0,1"
|
|
bitfld.long 0x00 20. "B_180,blocks 180" "0,1"
|
|
bitfld.long 0x00 19. "B_179,blocks 179" "0,1"
|
|
bitfld.long 0x00 18. "B_178,blocks 178" "0,1"
|
|
bitfld.long 0x00 17. "B_177,blocks 177" "0,1"
|
|
bitfld.long 0x00 16. "B_176,blocks 176" "0,1"
|
|
bitfld.long 0x00 15. "B_175,blocks 175" "0,1"
|
|
bitfld.long 0x00 14. "B_174,blocks 174" "0,1"
|
|
bitfld.long 0x00 13. "B_173,blocks 173" "0,1"
|
|
bitfld.long 0x00 12. "B_172,blocks 172" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_171,blocks 171" "0,1"
|
|
bitfld.long 0x00 10. "B_170,blocks 170" "0,1"
|
|
bitfld.long 0x00 9. "B_169,blocks 169" "0,1"
|
|
bitfld.long 0x00 8. "B_168,blocks 168" "0,1"
|
|
bitfld.long 0x00 7. "B_167,blocks 167" "0,1"
|
|
bitfld.long 0x00 6. "B_166,blocks 166" "0,1"
|
|
bitfld.long 0x00 5. "B_165,blocks 165" "0,1"
|
|
bitfld.long 0x00 4. "B_164,blocks 164" "0,1"
|
|
bitfld.long 0x00 3. "B_163,blocks 163" "0,1"
|
|
bitfld.long 0x00 2. "B_162,blocks 162" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_161,blocks 161" "0,1"
|
|
bitfld.long 0x00 0. "B_160,blocks 160" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "VEC6,TZBMPC0 vector register 6"
|
|
bitfld.long 0x00 31. "B_223,blocks 223" "0,1"
|
|
bitfld.long 0x00 30. "B_222,blocks 222" "0,1"
|
|
bitfld.long 0x00 29. "B_221,blocks 221" "0,1"
|
|
bitfld.long 0x00 28. "B_220,blocks 220" "0,1"
|
|
bitfld.long 0x00 27. "B_219,blocks 219" "0,1"
|
|
bitfld.long 0x00 26. "B_218,blocks 218" "0,1"
|
|
bitfld.long 0x00 25. "B_217,blocks 217" "0,1"
|
|
bitfld.long 0x00 24. "B_216,blocks 216" "0,1"
|
|
bitfld.long 0x00 23. "B_215,blocks 215" "0,1"
|
|
bitfld.long 0x00 22. "B_214,blocks 214" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_213,blocks 213" "0,1"
|
|
bitfld.long 0x00 20. "B_212,blocks 212" "0,1"
|
|
bitfld.long 0x00 19. "B_211,blocks 211" "0,1"
|
|
bitfld.long 0x00 18. "B_210,blocks 210" "0,1"
|
|
bitfld.long 0x00 17. "B_209,blocks 209" "0,1"
|
|
bitfld.long 0x00 16. "B_208,blocks 208" "0,1"
|
|
bitfld.long 0x00 15. "B_207,blocks 207" "0,1"
|
|
bitfld.long 0x00 14. "B_206,blocks 206" "0,1"
|
|
bitfld.long 0x00 13. "B_205,blocks 205" "0,1"
|
|
bitfld.long 0x00 12. "B_204,blocks 204" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_203,blocks 203" "0,1"
|
|
bitfld.long 0x00 10. "B_202,blocks 202" "0,1"
|
|
bitfld.long 0x00 9. "B_201,blocks 201" "0,1"
|
|
bitfld.long 0x00 8. "B_200,blocks 200" "0,1"
|
|
bitfld.long 0x00 7. "B_199,blocks 199" "0,1"
|
|
bitfld.long 0x00 6. "B_198,blocks 198" "0,1"
|
|
bitfld.long 0x00 5. "B_197,blocks 197" "0,1"
|
|
bitfld.long 0x00 4. "B_196,blocks 196" "0,1"
|
|
bitfld.long 0x00 3. "B_195,blocks 195" "0,1"
|
|
bitfld.long 0x00 2. "B_194,blocks 194" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_193,blocks 93" "0,1"
|
|
bitfld.long 0x00 0. "B_192,blocks 192" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "VEC7,TZBMPC0 vector register 7"
|
|
bitfld.long 0x00 31. "B_255,blocks 255" "0,1"
|
|
bitfld.long 0x00 30. "B_254,blocks 254" "0,1"
|
|
bitfld.long 0x00 29. "B_253,blocks 253" "0,1"
|
|
bitfld.long 0x00 28. "B_252,blocks 252" "0,1"
|
|
bitfld.long 0x00 27. "B_251,blocks 251" "0,1"
|
|
bitfld.long 0x00 26. "B_250,blocks 250" "0,1"
|
|
bitfld.long 0x00 25. "B_249,blocks 249" "0,1"
|
|
bitfld.long 0x00 24. "B_248,blocks 248" "0,1"
|
|
bitfld.long 0x00 23. "B_247,blocks 247" "0,1"
|
|
bitfld.long 0x00 22. "B_246,blocks 246" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_245,blocks 245" "0,1"
|
|
bitfld.long 0x00 20. "B_244,blocks 244" "0,1"
|
|
bitfld.long 0x00 19. "B_243,blocks 243" "0,1"
|
|
bitfld.long 0x00 18. "B_242,blocks 242" "0,1"
|
|
bitfld.long 0x00 17. "B_241,blocks 241" "0,1"
|
|
bitfld.long 0x00 16. "B_240,blocks 240" "0,1"
|
|
bitfld.long 0x00 15. "B_239,blocks 239" "0,1"
|
|
bitfld.long 0x00 14. "B_238,blocks 238" "0,1"
|
|
bitfld.long 0x00 13. "B_237,blocks 237" "0,1"
|
|
bitfld.long 0x00 12. "B_236,blocks 236" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_235,blocks 235" "0,1"
|
|
bitfld.long 0x00 10. "B_234,blocks 234" "0,1"
|
|
bitfld.long 0x00 9. "B_233,blocks 233" "0,1"
|
|
bitfld.long 0x00 8. "B_232,blocks 232" "0,1"
|
|
bitfld.long 0x00 7. "B_231,blocks 231" "0,1"
|
|
bitfld.long 0x00 6. "B_230,blocks 230" "0,1"
|
|
bitfld.long 0x00 5. "B_229,blocks 229" "0,1"
|
|
bitfld.long 0x00 4. "B_228,blocks 228" "0,1"
|
|
bitfld.long 0x00 3. "B_227,blocks 227" "0,1"
|
|
bitfld.long 0x00 2. "B_226,blocks 226" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_225,blocks 225" "0,1"
|
|
bitfld.long 0x00 0. "B_224,blocks 224" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK0,TZBMPC0 lock register 0"
|
|
bitfld.long 0x00 7. "LKUB7,lock/unlock status of secure access mode for the super-blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "LKUB6,lock/unlock status of secure access mode for the super-blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "LKUB5,lock/unlock status of secure access mode for the super-blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "LKUB4,lock/unlock status of secure access mode for the super-blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "LKUB3,lock/unlock status of secure access mode for the super-blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "LKUB2,lock/unlock status of secure access mode for the super-blocks 2" "0,1"
|
|
bitfld.long 0x00 1. "LKUB1,lock/unlock status of secure access mode for the super-blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "LKUB0,lock/unlock status of secure access mode for the super-blocks 0" "0,1"
|
|
tree.end
|
|
tree "TZBMPC1"
|
|
base ad:0x400A0C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZBMPC1 control register"
|
|
bitfld.long 0x00 31. "SRWACFG,secure read/write illegal access disable" "0,1"
|
|
bitfld.long 0x00 30. "SECSTATCFG,default security state" "0,1"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VEC0,TZBMPC1 vector register 0"
|
|
bitfld.long 0x00 31. "B_31,blocks 31" "0,1"
|
|
bitfld.long 0x00 30. "B_30,blocks 30" "0,1"
|
|
bitfld.long 0x00 29. "B_29,blocks 29" "0,1"
|
|
bitfld.long 0x00 28. "B_28,blocks 28" "0,1"
|
|
bitfld.long 0x00 27. "B_27,blocks 27" "0,1"
|
|
bitfld.long 0x00 26. "B_26,blocks 26" "0,1"
|
|
bitfld.long 0x00 25. "B_25,blocks 25" "0,1"
|
|
bitfld.long 0x00 24. "B_24,blocks 24" "0,1"
|
|
bitfld.long 0x00 23. "B_23,blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "B_22,blocks 22" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_21,blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "B_20,blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "B_19,blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "B_18,blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "B_17,blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "B_16,blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "B_15,blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "B_14,blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "B_13,blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "B_12,blocks 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_11,blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "B_10,blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "B_9,blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "B_8,blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "B_7,blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "B_6,blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "B_5,blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "B_4,blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "B_3,blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "B_2,blocks 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_1,blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "B_0,blocks 0" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VEC1,TZBMPC1 vector register 1"
|
|
bitfld.long 0x00 31. "B_63,blocks 63" "0,1"
|
|
bitfld.long 0x00 30. "B_62,blocks 62" "0,1"
|
|
bitfld.long 0x00 29. "B_61,blocks 61" "0,1"
|
|
bitfld.long 0x00 28. "B_60,blocks 60" "0,1"
|
|
bitfld.long 0x00 27. "B_59,blocks 59" "0,1"
|
|
bitfld.long 0x00 26. "B_58,blocks 58" "0,1"
|
|
bitfld.long 0x00 25. "B_57,blocks 57" "0,1"
|
|
bitfld.long 0x00 24. "B_56,blocks 56" "0,1"
|
|
bitfld.long 0x00 23. "B_55,blocks 55" "0,1"
|
|
bitfld.long 0x00 22. "B_54,blocks 54" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_53,blocks 53" "0,1"
|
|
bitfld.long 0x00 20. "B_52,blocks 52" "0,1"
|
|
bitfld.long 0x00 19. "B_51,blocks 51" "0,1"
|
|
bitfld.long 0x00 18. "B_50,blocks 50" "0,1"
|
|
bitfld.long 0x00 17. "B_49,blocks 49" "0,1"
|
|
bitfld.long 0x00 16. "B_48,blocks 48" "0,1"
|
|
bitfld.long 0x00 15. "B_47,blocks 47" "0,1"
|
|
bitfld.long 0x00 14. "B_46,blocks 46" "0,1"
|
|
bitfld.long 0x00 13. "B_45,blocks 45" "0,1"
|
|
bitfld.long 0x00 12. "B_44,blocks 44" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_43,blocks 43" "0,1"
|
|
bitfld.long 0x00 10. "B_42,blocks 42" "0,1"
|
|
bitfld.long 0x00 9. "B_41,blocks 41" "0,1"
|
|
bitfld.long 0x00 8. "B_40,blocks 40" "0,1"
|
|
bitfld.long 0x00 7. "B_39,blocks 39" "0,1"
|
|
bitfld.long 0x00 6. "B_38,blocks 38" "0,1"
|
|
bitfld.long 0x00 5. "B_37,blocks 37" "0,1"
|
|
bitfld.long 0x00 4. "B_36,blocks 36" "0,1"
|
|
bitfld.long 0x00 3. "B_35,blocks 35" "0,1"
|
|
bitfld.long 0x00 2. "B_34,blocks 34" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_33,blocks 33" "0,1"
|
|
bitfld.long 0x00 0. "B_32,blocks 32" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VEC2,TZBMPC1 vector register 2"
|
|
bitfld.long 0x00 31. "B_95,blocks 95" "0,1"
|
|
bitfld.long 0x00 30. "B_94,blocks 94" "0,1"
|
|
bitfld.long 0x00 29. "B_93,blocks 93" "0,1"
|
|
bitfld.long 0x00 28. "B_92,blocks 92" "0,1"
|
|
bitfld.long 0x00 27. "B_91,blocks 91" "0,1"
|
|
bitfld.long 0x00 26. "B_90,blocks 90" "0,1"
|
|
bitfld.long 0x00 25. "B_89,blocks 89" "0,1"
|
|
bitfld.long 0x00 24. "B_88,blocks 88" "0,1"
|
|
bitfld.long 0x00 23. "B_87,blocks 87" "0,1"
|
|
bitfld.long 0x00 22. "B_86,blocks 86" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_85,blocks 85" "0,1"
|
|
bitfld.long 0x00 20. "B_84,blocks 84" "0,1"
|
|
bitfld.long 0x00 19. "B_83,blocks 83" "0,1"
|
|
bitfld.long 0x00 18. "B_82,blocks 82" "0,1"
|
|
bitfld.long 0x00 17. "B_81,blocks 81" "0,1"
|
|
bitfld.long 0x00 16. "B_80,blocks 80" "0,1"
|
|
bitfld.long 0x00 15. "B_79,blocks 79" "0,1"
|
|
bitfld.long 0x00 14. "B_78,blocks 78" "0,1"
|
|
bitfld.long 0x00 13. "B_77,blocks 77" "0,1"
|
|
bitfld.long 0x00 12. "B_76,blocks 76" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_75,blocks 75" "0,1"
|
|
bitfld.long 0x00 10. "B_74,blocks 74" "0,1"
|
|
bitfld.long 0x00 9. "B_73,blocks 73" "0,1"
|
|
bitfld.long 0x00 8. "B_72,blocks 72" "0,1"
|
|
bitfld.long 0x00 7. "B_71,blocks 71" "0,1"
|
|
bitfld.long 0x00 6. "B_70,blocks 70" "0,1"
|
|
bitfld.long 0x00 5. "B_69,blocks 69" "0,1"
|
|
bitfld.long 0x00 4. "B_68,blocks 68" "0,1"
|
|
bitfld.long 0x00 3. "B_67,blocks 67" "0,1"
|
|
bitfld.long 0x00 2. "B_66,blocks 66" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_65,blocks 65" "0,1"
|
|
bitfld.long 0x00 0. "B_64,blocks 64" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VEC3,TZBMPC1 vector register 3"
|
|
bitfld.long 0x00 31. "B_127,blocks 127" "0,1"
|
|
bitfld.long 0x00 30. "B_126,blocks 126" "0,1"
|
|
bitfld.long 0x00 29. "B_125,blocks 125" "0,1"
|
|
bitfld.long 0x00 28. "B_124,blocks 124" "0,1"
|
|
bitfld.long 0x00 27. "B_123,blocks 123" "0,1"
|
|
bitfld.long 0x00 26. "B_122,blocks 122" "0,1"
|
|
bitfld.long 0x00 25. "B_121,blocks 121" "0,1"
|
|
bitfld.long 0x00 24. "B_120,blocks 120" "0,1"
|
|
bitfld.long 0x00 23. "B_119,blocks 119" "0,1"
|
|
bitfld.long 0x00 22. "B_118,blocks 118" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_117,blocks 117" "0,1"
|
|
bitfld.long 0x00 20. "B_116,blocks 116" "0,1"
|
|
bitfld.long 0x00 19. "B_115,blocks 115" "0,1"
|
|
bitfld.long 0x00 18. "B_114,blocks 114" "0,1"
|
|
bitfld.long 0x00 17. "B_113,blocks 113" "0,1"
|
|
bitfld.long 0x00 16. "B_112,blocks 112" "0,1"
|
|
bitfld.long 0x00 15. "B_111,blocks 111" "0,1"
|
|
bitfld.long 0x00 14. "B_110,blocks 110" "0,1"
|
|
bitfld.long 0x00 13. "B_109,blocks 109" "0,1"
|
|
bitfld.long 0x00 12. "B_108,blocks 108" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_107,blocks 107" "0,1"
|
|
bitfld.long 0x00 10. "B_106,blocks 106" "0,1"
|
|
bitfld.long 0x00 9. "B_105,blocks 105" "0,1"
|
|
bitfld.long 0x00 8. "B_104,blocks 104" "0,1"
|
|
bitfld.long 0x00 7. "B_103,blocks 103" "0,1"
|
|
bitfld.long 0x00 6. "B_102,blocks 102" "0,1"
|
|
bitfld.long 0x00 5. "B_101,blocks 101" "0,1"
|
|
bitfld.long 0x00 4. "B_100,blocks 100" "0,1"
|
|
bitfld.long 0x00 3. "B_99,blocks 99" "0,1"
|
|
bitfld.long 0x00 2. "B_98,blocks 98" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_97,blocks 97" "0,1"
|
|
bitfld.long 0x00 0. "B_96,blocks 96" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VEC4,TZBMPC1 vector register 4"
|
|
bitfld.long 0x00 31. "B_159,blocks 159" "0,1"
|
|
bitfld.long 0x00 30. "B_158,blocks 158" "0,1"
|
|
bitfld.long 0x00 29. "B_157,blocks 157" "0,1"
|
|
bitfld.long 0x00 28. "B_156,blocks 156" "0,1"
|
|
bitfld.long 0x00 27. "B_155,blocks 155" "0,1"
|
|
bitfld.long 0x00 26. "B_154,blocks 154" "0,1"
|
|
bitfld.long 0x00 25. "B_153,blocks 153" "0,1"
|
|
bitfld.long 0x00 24. "B_152,blocks 152" "0,1"
|
|
bitfld.long 0x00 23. "B_151,blocks 151" "0,1"
|
|
bitfld.long 0x00 22. "B_150,blocks 150" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_149,blocks 149" "0,1"
|
|
bitfld.long 0x00 20. "B_148,blocks 148" "0,1"
|
|
bitfld.long 0x00 19. "B_147,blocks 147" "0,1"
|
|
bitfld.long 0x00 18. "B_146,blocks 146" "0,1"
|
|
bitfld.long 0x00 17. "B_145,blocks 145" "0,1"
|
|
bitfld.long 0x00 16. "B_144,blocks 144" "0,1"
|
|
bitfld.long 0x00 15. "B_143,blocks 143" "0,1"
|
|
bitfld.long 0x00 14. "B_142,blocks 142" "0,1"
|
|
bitfld.long 0x00 13. "B_141,blocks 141" "0,1"
|
|
bitfld.long 0x00 12. "B_140,blocks 140" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_139,blocks 139" "0,1"
|
|
bitfld.long 0x00 10. "B_138,blocks 138" "0,1"
|
|
bitfld.long 0x00 9. "B_137,blocks 137" "0,1"
|
|
bitfld.long 0x00 8. "B_136,blocks 136" "0,1"
|
|
bitfld.long 0x00 7. "B_135,blocks 135" "0,1"
|
|
bitfld.long 0x00 6. "B_134,blocks 134" "0,1"
|
|
bitfld.long 0x00 5. "B_133,blocks 133" "0,1"
|
|
bitfld.long 0x00 4. "B_132,blocks 132" "0,1"
|
|
bitfld.long 0x00 3. "B_131,blocks 131" "0,1"
|
|
bitfld.long 0x00 2. "B_130,blocks 130" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_129,blocks 129" "0,1"
|
|
bitfld.long 0x00 0. "B_128,blocks 128" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VEC5,TZBMPC1 vector register 5"
|
|
bitfld.long 0x00 31. "B_191,blocks 191" "0,1"
|
|
bitfld.long 0x00 30. "B_190,blocks 190" "0,1"
|
|
bitfld.long 0x00 29. "B_189,blocks 189" "0,1"
|
|
bitfld.long 0x00 28. "B_188,blocks 188" "0,1"
|
|
bitfld.long 0x00 27. "B_187,blocks 187" "0,1"
|
|
bitfld.long 0x00 26. "B_186,blocks 186" "0,1"
|
|
bitfld.long 0x00 25. "B_185,blocks 185" "0,1"
|
|
bitfld.long 0x00 24. "B_184,blocks 184" "0,1"
|
|
bitfld.long 0x00 23. "B_183,blocks 183" "0,1"
|
|
bitfld.long 0x00 22. "B_182,blocks 182" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_181,blocks 181" "0,1"
|
|
bitfld.long 0x00 20. "B_180,blocks 180" "0,1"
|
|
bitfld.long 0x00 19. "B_179,blocks 179" "0,1"
|
|
bitfld.long 0x00 18. "B_178,blocks 178" "0,1"
|
|
bitfld.long 0x00 17. "B_177,blocks 177" "0,1"
|
|
bitfld.long 0x00 16. "B_176,blocks 176" "0,1"
|
|
bitfld.long 0x00 15. "B_175,blocks 175" "0,1"
|
|
bitfld.long 0x00 14. "B_174,blocks 174" "0,1"
|
|
bitfld.long 0x00 13. "B_173,blocks 173" "0,1"
|
|
bitfld.long 0x00 12. "B_172,blocks 172" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_171,blocks 171" "0,1"
|
|
bitfld.long 0x00 10. "B_170,blocks 170" "0,1"
|
|
bitfld.long 0x00 9. "B_169,blocks 169" "0,1"
|
|
bitfld.long 0x00 8. "B_168,blocks 168" "0,1"
|
|
bitfld.long 0x00 7. "B_167,blocks 167" "0,1"
|
|
bitfld.long 0x00 6. "B_166,blocks 166" "0,1"
|
|
bitfld.long 0x00 5. "B_165,blocks 165" "0,1"
|
|
bitfld.long 0x00 4. "B_164,blocks 164" "0,1"
|
|
bitfld.long 0x00 3. "B_163,blocks 163" "0,1"
|
|
bitfld.long 0x00 2. "B_162,blocks 162" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_161,blocks 161" "0,1"
|
|
bitfld.long 0x00 0. "B_160,blocks 160" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "VEC6,TZBMPC1 vector register 6"
|
|
bitfld.long 0x00 31. "B_223,blocks 223" "0,1"
|
|
bitfld.long 0x00 30. "B_222,blocks 222" "0,1"
|
|
bitfld.long 0x00 29. "B_221,blocks 221" "0,1"
|
|
bitfld.long 0x00 28. "B_220,blocks 220" "0,1"
|
|
bitfld.long 0x00 27. "B_219,blocks 219" "0,1"
|
|
bitfld.long 0x00 26. "B_218,blocks 218" "0,1"
|
|
bitfld.long 0x00 25. "B_217,blocks 217" "0,1"
|
|
bitfld.long 0x00 24. "B_216,blocks 216" "0,1"
|
|
bitfld.long 0x00 23. "B_215,blocks 215" "0,1"
|
|
bitfld.long 0x00 22. "B_214,blocks 214" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_213,blocks 213" "0,1"
|
|
bitfld.long 0x00 20. "B_212,blocks 212" "0,1"
|
|
bitfld.long 0x00 19. "B_211,blocks 211" "0,1"
|
|
bitfld.long 0x00 18. "B_210,blocks 210" "0,1"
|
|
bitfld.long 0x00 17. "B_209,blocks 209" "0,1"
|
|
bitfld.long 0x00 16. "B_208,blocks 208" "0,1"
|
|
bitfld.long 0x00 15. "B_207,blocks 207" "0,1"
|
|
bitfld.long 0x00 14. "B_206,blocks 206" "0,1"
|
|
bitfld.long 0x00 13. "B_205,blocks 205" "0,1"
|
|
bitfld.long 0x00 12. "B_204,blocks 204" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_203,blocks 203" "0,1"
|
|
bitfld.long 0x00 10. "B_202,blocks 202" "0,1"
|
|
bitfld.long 0x00 9. "B_201,blocks 201" "0,1"
|
|
bitfld.long 0x00 8. "B_200,blocks 200" "0,1"
|
|
bitfld.long 0x00 7. "B_199,blocks 199" "0,1"
|
|
bitfld.long 0x00 6. "B_198,blocks 198" "0,1"
|
|
bitfld.long 0x00 5. "B_197,blocks 197" "0,1"
|
|
bitfld.long 0x00 4. "B_196,blocks 196" "0,1"
|
|
bitfld.long 0x00 3. "B_195,blocks 195" "0,1"
|
|
bitfld.long 0x00 2. "B_194,blocks 194" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_193,blocks 93" "0,1"
|
|
bitfld.long 0x00 0. "B_192,blocks 192" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "VEC7,TZBMPC1 vector register 7"
|
|
bitfld.long 0x00 31. "B_255,blocks 255" "0,1"
|
|
bitfld.long 0x00 30. "B_254,blocks 254" "0,1"
|
|
bitfld.long 0x00 29. "B_253,blocks 253" "0,1"
|
|
bitfld.long 0x00 28. "B_252,blocks 252" "0,1"
|
|
bitfld.long 0x00 27. "B_251,blocks 251" "0,1"
|
|
bitfld.long 0x00 26. "B_250,blocks 250" "0,1"
|
|
bitfld.long 0x00 25. "B_249,blocks 249" "0,1"
|
|
bitfld.long 0x00 24. "B_248,blocks 248" "0,1"
|
|
bitfld.long 0x00 23. "B_247,blocks 247" "0,1"
|
|
bitfld.long 0x00 22. "B_246,blocks 246" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_245,blocks 245" "0,1"
|
|
bitfld.long 0x00 20. "B_244,blocks 244" "0,1"
|
|
bitfld.long 0x00 19. "B_243,blocks 243" "0,1"
|
|
bitfld.long 0x00 18. "B_242,blocks 242" "0,1"
|
|
bitfld.long 0x00 17. "B_241,blocks 241" "0,1"
|
|
bitfld.long 0x00 16. "B_240,blocks 240" "0,1"
|
|
bitfld.long 0x00 15. "B_239,blocks 239" "0,1"
|
|
bitfld.long 0x00 14. "B_238,blocks 238" "0,1"
|
|
bitfld.long 0x00 13. "B_237,blocks 237" "0,1"
|
|
bitfld.long 0x00 12. "B_236,blocks 236" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_235,blocks 235" "0,1"
|
|
bitfld.long 0x00 10. "B_234,blocks 234" "0,1"
|
|
bitfld.long 0x00 9. "B_233,blocks 233" "0,1"
|
|
bitfld.long 0x00 8. "B_232,blocks 232" "0,1"
|
|
bitfld.long 0x00 7. "B_231,blocks 231" "0,1"
|
|
bitfld.long 0x00 6. "B_230,blocks 230" "0,1"
|
|
bitfld.long 0x00 5. "B_229,blocks 229" "0,1"
|
|
bitfld.long 0x00 4. "B_228,blocks 228" "0,1"
|
|
bitfld.long 0x00 3. "B_227,blocks 227" "0,1"
|
|
bitfld.long 0x00 2. "B_226,blocks 226" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_225,blocks 225" "0,1"
|
|
bitfld.long 0x00 0. "B_224,blocks 224" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK0,TZBMPC1 lock register0"
|
|
bitfld.long 0x00 7. "LKUB7,lock/unlock status of secure access mode for the super-blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "LKUB6,lock/unlock status of secure access mode for the super-blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "LKUB5,lock/unlock status of secure access mode for the super-blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "LKUB4,lock/unlock status of secure access mode for the super-blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "LKUB3,lock/unlock status of secure access mode for the super-blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "LKUB2,lock/unlock status of secure access mode for the super-blocks 2" "0,1"
|
|
bitfld.long 0x00 1. "LKUB1,lock/unlock status of secure access mode for the super-blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "LKUB0,lock/unlock status of secure access mode for the super-blocks 0" "0,1"
|
|
tree.end
|
|
tree "TZBMPC2"
|
|
base ad:0x400B0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZBMPC2 control register"
|
|
bitfld.long 0x00 31. "SRWACFG,secure read/write illegal access disable" "0,1"
|
|
bitfld.long 0x00 30. "SECSTATCFG,default security state" "0,1"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VEC0,TZBMPC2 vector register 0"
|
|
bitfld.long 0x00 31. "B_31,blocks 31" "0,1"
|
|
bitfld.long 0x00 30. "B_30,blocks 30" "0,1"
|
|
bitfld.long 0x00 29. "B_29,blocks 29" "0,1"
|
|
bitfld.long 0x00 28. "B_28,blocks 28" "0,1"
|
|
bitfld.long 0x00 27. "B_27,blocks 27" "0,1"
|
|
bitfld.long 0x00 26. "B_26,blocks 26" "0,1"
|
|
bitfld.long 0x00 25. "B_25,blocks 25" "0,1"
|
|
bitfld.long 0x00 24. "B_24,blocks 24" "0,1"
|
|
bitfld.long 0x00 23. "B_23,blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "B_22,blocks 22" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_21,blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "B_20,blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "B_19,blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "B_18,blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "B_17,blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "B_16,blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "B_15,blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "B_14,blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "B_13,blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "B_12,blocks 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_11,blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "B_10,blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "B_9,blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "B_8,blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "B_7,blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "B_6,blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "B_5,blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "B_4,blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "B_3,blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "B_2,blocks 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_1,blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "B_0,blocks 0" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VEC1,TZBMPC2 vector register 1"
|
|
bitfld.long 0x00 31. "B_63,blocks 63" "0,1"
|
|
bitfld.long 0x00 30. "B_62,blocks 62" "0,1"
|
|
bitfld.long 0x00 29. "B_61,blocks 61" "0,1"
|
|
bitfld.long 0x00 28. "B_60,blocks 60" "0,1"
|
|
bitfld.long 0x00 27. "B_59,blocks 59" "0,1"
|
|
bitfld.long 0x00 26. "B_58,blocks 58" "0,1"
|
|
bitfld.long 0x00 25. "B_57,blocks 57" "0,1"
|
|
bitfld.long 0x00 24. "B_56,blocks 56" "0,1"
|
|
bitfld.long 0x00 23. "B_55,blocks 55" "0,1"
|
|
bitfld.long 0x00 22. "B_54,blocks 54" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_53,blocks 53" "0,1"
|
|
bitfld.long 0x00 20. "B_52,blocks 52" "0,1"
|
|
bitfld.long 0x00 19. "B_51,blocks 51" "0,1"
|
|
bitfld.long 0x00 18. "B_50,blocks 50" "0,1"
|
|
bitfld.long 0x00 17. "B_49,blocks 49" "0,1"
|
|
bitfld.long 0x00 16. "B_48,blocks 48" "0,1"
|
|
bitfld.long 0x00 15. "B_47,blocks 47" "0,1"
|
|
bitfld.long 0x00 14. "B_46,blocks 46" "0,1"
|
|
bitfld.long 0x00 13. "B_45,blocks 45" "0,1"
|
|
bitfld.long 0x00 12. "B_44,blocks 44" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_43,blocks 43" "0,1"
|
|
bitfld.long 0x00 10. "B_42,blocks 42" "0,1"
|
|
bitfld.long 0x00 9. "B_41,blocks 41" "0,1"
|
|
bitfld.long 0x00 8. "B_40,blocks 40" "0,1"
|
|
bitfld.long 0x00 7. "B_39,blocks 39" "0,1"
|
|
bitfld.long 0x00 6. "B_38,blocks 38" "0,1"
|
|
bitfld.long 0x00 5. "B_37,blocks 37" "0,1"
|
|
bitfld.long 0x00 4. "B_36,blocks 36" "0,1"
|
|
bitfld.long 0x00 3. "B_35,blocks 35" "0,1"
|
|
bitfld.long 0x00 2. "B_34,blocks 34" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_33,blocks 33" "0,1"
|
|
bitfld.long 0x00 0. "B_32,blocks 32" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VEC2,TZBMPC2 vector register 2"
|
|
bitfld.long 0x00 31. "B_95,blocks 95" "0,1"
|
|
bitfld.long 0x00 30. "B_94,blocks 94" "0,1"
|
|
bitfld.long 0x00 29. "B_93,blocks 93" "0,1"
|
|
bitfld.long 0x00 28. "B_92,blocks 92" "0,1"
|
|
bitfld.long 0x00 27. "B_91,blocks 91" "0,1"
|
|
bitfld.long 0x00 26. "B_90,blocks 90" "0,1"
|
|
bitfld.long 0x00 25. "B_89,blocks 89" "0,1"
|
|
bitfld.long 0x00 24. "B_88,blocks 88" "0,1"
|
|
bitfld.long 0x00 23. "B_87,blocks 87" "0,1"
|
|
bitfld.long 0x00 22. "B_86,blocks 86" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_85,blocks 85" "0,1"
|
|
bitfld.long 0x00 20. "B_84,blocks 84" "0,1"
|
|
bitfld.long 0x00 19. "B_83,blocks 83" "0,1"
|
|
bitfld.long 0x00 18. "B_82,blocks 82" "0,1"
|
|
bitfld.long 0x00 17. "B_81,blocks 81" "0,1"
|
|
bitfld.long 0x00 16. "B_80,blocks 80" "0,1"
|
|
bitfld.long 0x00 15. "B_79,blocks 79" "0,1"
|
|
bitfld.long 0x00 14. "B_78,blocks 78" "0,1"
|
|
bitfld.long 0x00 13. "B_77,blocks 77" "0,1"
|
|
bitfld.long 0x00 12. "B_76,blocks 76" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_75,blocks 75" "0,1"
|
|
bitfld.long 0x00 10. "B_74,blocks 74" "0,1"
|
|
bitfld.long 0x00 9. "B_73,blocks 73" "0,1"
|
|
bitfld.long 0x00 8. "B_72,blocks 72" "0,1"
|
|
bitfld.long 0x00 7. "B_71,blocks 71" "0,1"
|
|
bitfld.long 0x00 6. "B_70,blocks 70" "0,1"
|
|
bitfld.long 0x00 5. "B_69,blocks 69" "0,1"
|
|
bitfld.long 0x00 4. "B_68,blocks 68" "0,1"
|
|
bitfld.long 0x00 3. "B_67,blocks 67" "0,1"
|
|
bitfld.long 0x00 2. "B_66,blocks 66" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_65,blocks 65" "0,1"
|
|
bitfld.long 0x00 0. "B_64,blocks 64" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VEC3,TZBMPC2 vector register 3"
|
|
bitfld.long 0x00 31. "B_127,blocks 127" "0,1"
|
|
bitfld.long 0x00 30. "B_126,blocks 126" "0,1"
|
|
bitfld.long 0x00 29. "B_125,blocks 125" "0,1"
|
|
bitfld.long 0x00 28. "B_124,blocks 124" "0,1"
|
|
bitfld.long 0x00 27. "B_123,blocks 123" "0,1"
|
|
bitfld.long 0x00 26. "B_122,blocks 122" "0,1"
|
|
bitfld.long 0x00 25. "B_121,blocks 121" "0,1"
|
|
bitfld.long 0x00 24. "B_120,blocks 120" "0,1"
|
|
bitfld.long 0x00 23. "B_119,blocks 119" "0,1"
|
|
bitfld.long 0x00 22. "B_118,blocks 118" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_117,blocks 117" "0,1"
|
|
bitfld.long 0x00 20. "B_116,blocks 116" "0,1"
|
|
bitfld.long 0x00 19. "B_115,blocks 115" "0,1"
|
|
bitfld.long 0x00 18. "B_114,blocks 114" "0,1"
|
|
bitfld.long 0x00 17. "B_113,blocks 113" "0,1"
|
|
bitfld.long 0x00 16. "B_112,blocks 112" "0,1"
|
|
bitfld.long 0x00 15. "B_111,blocks 111" "0,1"
|
|
bitfld.long 0x00 14. "B_110,blocks 110" "0,1"
|
|
bitfld.long 0x00 13. "B_109,blocks 109" "0,1"
|
|
bitfld.long 0x00 12. "B_108,blocks 108" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_107,blocks 107" "0,1"
|
|
bitfld.long 0x00 10. "B_106,blocks 106" "0,1"
|
|
bitfld.long 0x00 9. "B_105,blocks 105" "0,1"
|
|
bitfld.long 0x00 8. "B_104,blocks 104" "0,1"
|
|
bitfld.long 0x00 7. "B_103,blocks 103" "0,1"
|
|
bitfld.long 0x00 6. "B_102,blocks 102" "0,1"
|
|
bitfld.long 0x00 5. "B_101,blocks 101" "0,1"
|
|
bitfld.long 0x00 4. "B_100,blocks 100" "0,1"
|
|
bitfld.long 0x00 3. "B_99,blocks 99" "0,1"
|
|
bitfld.long 0x00 2. "B_98,blocks 98" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_97,blocks 97" "0,1"
|
|
bitfld.long 0x00 0. "B_96,blocks 96" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VEC4,TZBMPC2 vector register 4"
|
|
bitfld.long 0x00 31. "B_159,blocks 159" "0,1"
|
|
bitfld.long 0x00 30. "B_158,blocks 158" "0,1"
|
|
bitfld.long 0x00 29. "B_157,blocks 157" "0,1"
|
|
bitfld.long 0x00 28. "B_156,blocks 156" "0,1"
|
|
bitfld.long 0x00 27. "B_155,blocks 155" "0,1"
|
|
bitfld.long 0x00 26. "B_154,blocks 154" "0,1"
|
|
bitfld.long 0x00 25. "B_153,blocks 153" "0,1"
|
|
bitfld.long 0x00 24. "B_152,blocks 152" "0,1"
|
|
bitfld.long 0x00 23. "B_151,blocks 151" "0,1"
|
|
bitfld.long 0x00 22. "B_150,blocks 150" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_149,blocks 149" "0,1"
|
|
bitfld.long 0x00 20. "B_148,blocks 148" "0,1"
|
|
bitfld.long 0x00 19. "B_147,blocks 147" "0,1"
|
|
bitfld.long 0x00 18. "B_146,blocks 146" "0,1"
|
|
bitfld.long 0x00 17. "B_145,blocks 145" "0,1"
|
|
bitfld.long 0x00 16. "B_144,blocks 144" "0,1"
|
|
bitfld.long 0x00 15. "B_143,blocks 143" "0,1"
|
|
bitfld.long 0x00 14. "B_142,blocks 142" "0,1"
|
|
bitfld.long 0x00 13. "B_141,blocks 141" "0,1"
|
|
bitfld.long 0x00 12. "B_140,blocks 140" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_139,blocks 139" "0,1"
|
|
bitfld.long 0x00 10. "B_138,blocks 138" "0,1"
|
|
bitfld.long 0x00 9. "B_137,blocks 137" "0,1"
|
|
bitfld.long 0x00 8. "B_136,blocks 136" "0,1"
|
|
bitfld.long 0x00 7. "B_135,blocks 135" "0,1"
|
|
bitfld.long 0x00 6. "B_134,blocks 134" "0,1"
|
|
bitfld.long 0x00 5. "B_133,blocks 133" "0,1"
|
|
bitfld.long 0x00 4. "B_132,blocks 132" "0,1"
|
|
bitfld.long 0x00 3. "B_131,blocks 131" "0,1"
|
|
bitfld.long 0x00 2. "B_130,blocks 130" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_129,blocks 129" "0,1"
|
|
bitfld.long 0x00 0. "B_128,blocks 128" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VEC5,TZBMPC2 vector register 5"
|
|
bitfld.long 0x00 31. "B_191,blocks 191" "0,1"
|
|
bitfld.long 0x00 30. "B_190,blocks 190" "0,1"
|
|
bitfld.long 0x00 29. "B_189,blocks 189" "0,1"
|
|
bitfld.long 0x00 28. "B_188,blocks 188" "0,1"
|
|
bitfld.long 0x00 27. "B_187,blocks 187" "0,1"
|
|
bitfld.long 0x00 26. "B_186,blocks 186" "0,1"
|
|
bitfld.long 0x00 25. "B_185,blocks 185" "0,1"
|
|
bitfld.long 0x00 24. "B_184,blocks 184" "0,1"
|
|
bitfld.long 0x00 23. "B_183,blocks 183" "0,1"
|
|
bitfld.long 0x00 22. "B_182,blocks 182" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_181,blocks 181" "0,1"
|
|
bitfld.long 0x00 20. "B_180,blocks 180" "0,1"
|
|
bitfld.long 0x00 19. "B_179,blocks 179" "0,1"
|
|
bitfld.long 0x00 18. "B_178,blocks 178" "0,1"
|
|
bitfld.long 0x00 17. "B_177,blocks 177" "0,1"
|
|
bitfld.long 0x00 16. "B_176,blocks 176" "0,1"
|
|
bitfld.long 0x00 15. "B_175,blocks 175" "0,1"
|
|
bitfld.long 0x00 14. "B_174,blocks 174" "0,1"
|
|
bitfld.long 0x00 13. "B_173,blocks 173" "0,1"
|
|
bitfld.long 0x00 12. "B_172,blocks 172" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_171,blocks 171" "0,1"
|
|
bitfld.long 0x00 10. "B_170,blocks 170" "0,1"
|
|
bitfld.long 0x00 9. "B_169,blocks 169" "0,1"
|
|
bitfld.long 0x00 8. "B_168,blocks 168" "0,1"
|
|
bitfld.long 0x00 7. "B_167,blocks 167" "0,1"
|
|
bitfld.long 0x00 6. "B_166,blocks 166" "0,1"
|
|
bitfld.long 0x00 5. "B_165,blocks 165" "0,1"
|
|
bitfld.long 0x00 4. "B_164,blocks 164" "0,1"
|
|
bitfld.long 0x00 3. "B_163,blocks 163" "0,1"
|
|
bitfld.long 0x00 2. "B_162,blocks 162" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_161,blocks 161" "0,1"
|
|
bitfld.long 0x00 0. "B_160,blocks 160" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "VEC6,TZBMPC2 vector register 6"
|
|
bitfld.long 0x00 31. "B_223,blocks 223" "0,1"
|
|
bitfld.long 0x00 30. "B_222,blocks 222" "0,1"
|
|
bitfld.long 0x00 29. "B_221,blocks 221" "0,1"
|
|
bitfld.long 0x00 28. "B_220,blocks 220" "0,1"
|
|
bitfld.long 0x00 27. "B_219,blocks 219" "0,1"
|
|
bitfld.long 0x00 26. "B_218,blocks 218" "0,1"
|
|
bitfld.long 0x00 25. "B_217,blocks 217" "0,1"
|
|
bitfld.long 0x00 24. "B_216,blocks 216" "0,1"
|
|
bitfld.long 0x00 23. "B_215,blocks 215" "0,1"
|
|
bitfld.long 0x00 22. "B_214,blocks 214" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_213,blocks 213" "0,1"
|
|
bitfld.long 0x00 20. "B_212,blocks 212" "0,1"
|
|
bitfld.long 0x00 19. "B_211,blocks 211" "0,1"
|
|
bitfld.long 0x00 18. "B_210,blocks 210" "0,1"
|
|
bitfld.long 0x00 17. "B_209,blocks 209" "0,1"
|
|
bitfld.long 0x00 16. "B_208,blocks 208" "0,1"
|
|
bitfld.long 0x00 15. "B_207,blocks 207" "0,1"
|
|
bitfld.long 0x00 14. "B_206,blocks 206" "0,1"
|
|
bitfld.long 0x00 13. "B_205,blocks 205" "0,1"
|
|
bitfld.long 0x00 12. "B_204,blocks 204" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_203,blocks 203" "0,1"
|
|
bitfld.long 0x00 10. "B_202,blocks 202" "0,1"
|
|
bitfld.long 0x00 9. "B_201,blocks 201" "0,1"
|
|
bitfld.long 0x00 8. "B_200,blocks 200" "0,1"
|
|
bitfld.long 0x00 7. "B_199,blocks 199" "0,1"
|
|
bitfld.long 0x00 6. "B_198,blocks 198" "0,1"
|
|
bitfld.long 0x00 5. "B_197,blocks 197" "0,1"
|
|
bitfld.long 0x00 4. "B_196,blocks 196" "0,1"
|
|
bitfld.long 0x00 3. "B_195,blocks 195" "0,1"
|
|
bitfld.long 0x00 2. "B_194,blocks 194" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_193,blocks 93" "0,1"
|
|
bitfld.long 0x00 0. "B_192,blocks 192" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "VEC7,TZBMPC2 vector register 7"
|
|
bitfld.long 0x00 31. "B_255,blocks 255" "0,1"
|
|
bitfld.long 0x00 30. "B_254,blocks 254" "0,1"
|
|
bitfld.long 0x00 29. "B_253,blocks 253" "0,1"
|
|
bitfld.long 0x00 28. "B_252,blocks 252" "0,1"
|
|
bitfld.long 0x00 27. "B_251,blocks 251" "0,1"
|
|
bitfld.long 0x00 26. "B_250,blocks 250" "0,1"
|
|
bitfld.long 0x00 25. "B_249,blocks 249" "0,1"
|
|
bitfld.long 0x00 24. "B_248,blocks 248" "0,1"
|
|
bitfld.long 0x00 23. "B_247,blocks 247" "0,1"
|
|
bitfld.long 0x00 22. "B_246,blocks 246" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_245,blocks 245" "0,1"
|
|
bitfld.long 0x00 20. "B_244,blocks 244" "0,1"
|
|
bitfld.long 0x00 19. "B_243,blocks 243" "0,1"
|
|
bitfld.long 0x00 18. "B_242,blocks 242" "0,1"
|
|
bitfld.long 0x00 17. "B_241,blocks 241" "0,1"
|
|
bitfld.long 0x00 16. "B_240,blocks 240" "0,1"
|
|
bitfld.long 0x00 15. "B_239,blocks 239" "0,1"
|
|
bitfld.long 0x00 14. "B_238,blocks 238" "0,1"
|
|
bitfld.long 0x00 13. "B_237,blocks 237" "0,1"
|
|
bitfld.long 0x00 12. "B_236,blocks 236" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_235,blocks 235" "0,1"
|
|
bitfld.long 0x00 10. "B_234,blocks 234" "0,1"
|
|
bitfld.long 0x00 9. "B_233,blocks 233" "0,1"
|
|
bitfld.long 0x00 8. "B_232,blocks 232" "0,1"
|
|
bitfld.long 0x00 7. "B_231,blocks 231" "0,1"
|
|
bitfld.long 0x00 6. "B_230,blocks 230" "0,1"
|
|
bitfld.long 0x00 5. "B_229,blocks 229" "0,1"
|
|
bitfld.long 0x00 4. "B_228,blocks 228" "0,1"
|
|
bitfld.long 0x00 3. "B_227,blocks 227" "0,1"
|
|
bitfld.long 0x00 2. "B_226,blocks 226" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_225,blocks 225" "0,1"
|
|
bitfld.long 0x00 0. "B_224,blocks 224" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "VEC8,TZBMPC2 vector register 8"
|
|
bitfld.long 0x00 31. "B_287,blocks 287" "0,1"
|
|
bitfld.long 0x00 30. "B_286,blocks 286" "0,1"
|
|
bitfld.long 0x00 29. "B_285,blocks 285" "0,1"
|
|
bitfld.long 0x00 28. "B_284,blocks 284" "0,1"
|
|
bitfld.long 0x00 27. "B_283,blocks 283" "0,1"
|
|
bitfld.long 0x00 26. "B_282,blocks 282" "0,1"
|
|
bitfld.long 0x00 25. "B_281,blocks 281" "0,1"
|
|
bitfld.long 0x00 24. "B_280,blocks 280" "0,1"
|
|
bitfld.long 0x00 23. "B_279,blocks 279" "0,1"
|
|
bitfld.long 0x00 22. "B_278,blocks 278" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_277,blocks 277" "0,1"
|
|
bitfld.long 0x00 20. "B_276,blocks 276" "0,1"
|
|
bitfld.long 0x00 19. "B_275,blocks 275" "0,1"
|
|
bitfld.long 0x00 18. "B_274,blocks 274" "0,1"
|
|
bitfld.long 0x00 17. "B_273,blocks 273" "0,1"
|
|
bitfld.long 0x00 16. "B_272,blocks 272" "0,1"
|
|
bitfld.long 0x00 15. "B_271,blocks 271" "0,1"
|
|
bitfld.long 0x00 14. "B_270,blocks 270" "0,1"
|
|
bitfld.long 0x00 13. "B_269,blocks 269" "0,1"
|
|
bitfld.long 0x00 12. "B_268,blocks 268" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_267,blocks 267" "0,1"
|
|
bitfld.long 0x00 10. "B_266,blocks 266" "0,1"
|
|
bitfld.long 0x00 9. "B_265,blocks 265" "0,1"
|
|
bitfld.long 0x00 8. "B_264,blocks 264" "0,1"
|
|
bitfld.long 0x00 7. "B_263,blocks 263" "0,1"
|
|
bitfld.long 0x00 6. "B_262,blocks 262" "0,1"
|
|
bitfld.long 0x00 5. "B_261,blocks 261" "0,1"
|
|
bitfld.long 0x00 4. "B_260,blocks 260" "0,1"
|
|
bitfld.long 0x00 3. "B_259,blocks 259" "0,1"
|
|
bitfld.long 0x00 2. "B_258,blocks 258" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_257,blocks 257" "0,1"
|
|
bitfld.long 0x00 0. "B_256,blocks 256" "0,1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "VEC9,TZBMPC2 vector register 9"
|
|
bitfld.long 0x00 31. "B_319,blocks319" "0,1"
|
|
bitfld.long 0x00 30. "B_318,blocks318" "0,1"
|
|
bitfld.long 0x00 29. "B_317,blocks317" "0,1"
|
|
bitfld.long 0x00 28. "B_316,blocks316" "0,1"
|
|
bitfld.long 0x00 27. "B_315,blocks315" "0,1"
|
|
bitfld.long 0x00 26. "B_314,blocks314" "0,1"
|
|
bitfld.long 0x00 25. "B_313,blocks313" "0,1"
|
|
bitfld.long 0x00 24. "B_312,blocks312" "0,1"
|
|
bitfld.long 0x00 23. "B_311,blocks311" "0,1"
|
|
bitfld.long 0x00 22. "B_310,blocks310" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_309,blocks309" "0,1"
|
|
bitfld.long 0x00 20. "B_308,blocks308" "0,1"
|
|
bitfld.long 0x00 19. "B_307,blocks307" "0,1"
|
|
bitfld.long 0x00 18. "B_306,blocks306" "0,1"
|
|
bitfld.long 0x00 17. "B_305,blocks305" "0,1"
|
|
bitfld.long 0x00 16. "B_304,blocks304" "0,1"
|
|
bitfld.long 0x00 15. "B_303,blocks303" "0,1"
|
|
bitfld.long 0x00 14. "B_302,blocks302" "0,1"
|
|
bitfld.long 0x00 13. "B_301,blocks301" "0,1"
|
|
bitfld.long 0x00 12. "B_300,blocks300" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_299,blocks299" "0,1"
|
|
bitfld.long 0x00 10. "B_298,blocks298" "0,1"
|
|
bitfld.long 0x00 9. "B_297,blocks297" "0,1"
|
|
bitfld.long 0x00 8. "B_296,blocks296" "0,1"
|
|
bitfld.long 0x00 7. "B_295,blocks295" "0,1"
|
|
bitfld.long 0x00 6. "B_294,blocks294" "0,1"
|
|
bitfld.long 0x00 5. "B_293,blocks293" "0,1"
|
|
bitfld.long 0x00 4. "B_292,blocks292" "0,1"
|
|
bitfld.long 0x00 3. "B_291,blocks291" "0,1"
|
|
bitfld.long 0x00 2. "B_290,blocks290" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_289,blocks 289" "0,1"
|
|
bitfld.long 0x00 0. "B_288,blocks 288" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "VEC10,TZBMPC2 vector register 10"
|
|
bitfld.long 0x00 31. "B_351,blocks351" "0,1"
|
|
bitfld.long 0x00 30. "B_350,blocks350" "0,1"
|
|
bitfld.long 0x00 29. "B_349,blocks349" "0,1"
|
|
bitfld.long 0x00 28. "B_348,blocks348" "0,1"
|
|
bitfld.long 0x00 27. "B_347,blocks347" "0,1"
|
|
bitfld.long 0x00 26. "B_346,blocks346" "0,1"
|
|
bitfld.long 0x00 25. "B_345,blocks345" "0,1"
|
|
bitfld.long 0x00 24. "B_344,blocks344" "0,1"
|
|
bitfld.long 0x00 23. "B_343,blocks343" "0,1"
|
|
bitfld.long 0x00 22. "B_342,blocks342" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_341,blocks341" "0,1"
|
|
bitfld.long 0x00 20. "B_340,blocks340" "0,1"
|
|
bitfld.long 0x00 19. "B_339,blocks339" "0,1"
|
|
bitfld.long 0x00 18. "B_338,blocks338" "0,1"
|
|
bitfld.long 0x00 17. "B_337,blocks337" "0,1"
|
|
bitfld.long 0x00 16. "B_336,blocks336" "0,1"
|
|
bitfld.long 0x00 15. "B_335,blocks335" "0,1"
|
|
bitfld.long 0x00 14. "B_334,blocks334" "0,1"
|
|
bitfld.long 0x00 13. "B_333,blocks333" "0,1"
|
|
bitfld.long 0x00 12. "B_332,blocks332" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_331,blocks331" "0,1"
|
|
bitfld.long 0x00 10. "B_330,blocks330" "0,1"
|
|
bitfld.long 0x00 9. "B_329,blocks329" "0,1"
|
|
bitfld.long 0x00 8. "B_328,blocks328" "0,1"
|
|
bitfld.long 0x00 7. "B_327,blocks327" "0,1"
|
|
bitfld.long 0x00 6. "B_326,blocks326" "0,1"
|
|
bitfld.long 0x00 5. "B_325,blocks325" "0,1"
|
|
bitfld.long 0x00 4. "B_324,blocks324" "0,1"
|
|
bitfld.long 0x00 3. "B_323,blocks323" "0,1"
|
|
bitfld.long 0x00 2. "B_322,blocks322" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_321,blocks 321" "0,1"
|
|
bitfld.long 0x00 0. "B_320,blocks 320" "0,1"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "VEC11,TZBMPC2 vector register 11"
|
|
bitfld.long 0x00 31. "B_383,blocks383" "0,1"
|
|
bitfld.long 0x00 30. "B_382,blocks382" "0,1"
|
|
bitfld.long 0x00 29. "B_381,blocks381" "0,1"
|
|
bitfld.long 0x00 28. "B_380,blocks380" "0,1"
|
|
bitfld.long 0x00 27. "B_379,blocks379" "0,1"
|
|
bitfld.long 0x00 26. "B_378,blocks378" "0,1"
|
|
bitfld.long 0x00 25. "B_377,blocks377" "0,1"
|
|
bitfld.long 0x00 24. "B_376,blocks376" "0,1"
|
|
bitfld.long 0x00 23. "B_375,blocks375" "0,1"
|
|
bitfld.long 0x00 22. "B_374,blocks374" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_373,blocks373" "0,1"
|
|
bitfld.long 0x00 20. "B_372,blocks372" "0,1"
|
|
bitfld.long 0x00 19. "B_371,blocks371" "0,1"
|
|
bitfld.long 0x00 18. "B_370,blocks370" "0,1"
|
|
bitfld.long 0x00 17. "B_369,blocks369" "0,1"
|
|
bitfld.long 0x00 16. "B_368,blocks368" "0,1"
|
|
bitfld.long 0x00 15. "B_367,blocks367" "0,1"
|
|
bitfld.long 0x00 14. "B_366,blocks366" "0,1"
|
|
bitfld.long 0x00 13. "B_365,blocks365" "0,1"
|
|
bitfld.long 0x00 12. "B_364,blocks364" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_363,blocks363" "0,1"
|
|
bitfld.long 0x00 10. "B_362,blocks362" "0,1"
|
|
bitfld.long 0x00 9. "B_361,blocks361" "0,1"
|
|
bitfld.long 0x00 8. "B_360,blocks360" "0,1"
|
|
bitfld.long 0x00 7. "B_359,blocks359" "0,1"
|
|
bitfld.long 0x00 6. "B_358,blocks358" "0,1"
|
|
bitfld.long 0x00 5. "B_357,blocks357" "0,1"
|
|
bitfld.long 0x00 4. "B_356,blocks356" "0,1"
|
|
bitfld.long 0x00 3. "B_355,blocks355" "0,1"
|
|
bitfld.long 0x00 2. "B_354,blocks354" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_353,blocks 353" "0,1"
|
|
bitfld.long 0x00 0. "B_352,blocks 352" "0,1"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "VEC12,TZBMPC2 vector register 12"
|
|
bitfld.long 0x00 31. "B_415,blocks415" "0,1"
|
|
bitfld.long 0x00 30. "B_414,blocks414" "0,1"
|
|
bitfld.long 0x00 29. "B_413,blocks413" "0,1"
|
|
bitfld.long 0x00 28. "B_412,blocks412" "0,1"
|
|
bitfld.long 0x00 27. "B_411,blocks411" "0,1"
|
|
bitfld.long 0x00 26. "B_410,blocks410" "0,1"
|
|
bitfld.long 0x00 25. "B_409,blocks409" "0,1"
|
|
bitfld.long 0x00 24. "B_408,blocks408" "0,1"
|
|
bitfld.long 0x00 23. "B_407,blocks407" "0,1"
|
|
bitfld.long 0x00 22. "B_406,blocks406" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_405,blocks405" "0,1"
|
|
bitfld.long 0x00 20. "B_404,blocks404" "0,1"
|
|
bitfld.long 0x00 19. "B_403,blocks403" "0,1"
|
|
bitfld.long 0x00 18. "B_402,blocks402" "0,1"
|
|
bitfld.long 0x00 17. "B_401,blocks401" "0,1"
|
|
bitfld.long 0x00 16. "B_400,blocks400" "0,1"
|
|
bitfld.long 0x00 15. "B_399,blocks399" "0,1"
|
|
bitfld.long 0x00 14. "B_398,blocks398" "0,1"
|
|
bitfld.long 0x00 13. "B_397,blocks397" "0,1"
|
|
bitfld.long 0x00 12. "B_396,blocks396" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_395,blocks395" "0,1"
|
|
bitfld.long 0x00 10. "B_394,blocks394" "0,1"
|
|
bitfld.long 0x00 9. "B_393,blocks393" "0,1"
|
|
bitfld.long 0x00 8. "B_392,blocks392" "0,1"
|
|
bitfld.long 0x00 7. "B_391,blocks391" "0,1"
|
|
bitfld.long 0x00 6. "B_390,blocks390" "0,1"
|
|
bitfld.long 0x00 5. "B_389,blocks389" "0,1"
|
|
bitfld.long 0x00 4. "B_388,blocks388" "0,1"
|
|
bitfld.long 0x00 3. "B_387,blocks387" "0,1"
|
|
bitfld.long 0x00 2. "B_386,blocks386" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_385,blocks 385" "0,1"
|
|
bitfld.long 0x00 0. "B_384,blocks 384" "0,1"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "VEC13,TZBMPC2 vector register 13"
|
|
bitfld.long 0x00 31. "B_447,blocks447" "0,1"
|
|
bitfld.long 0x00 30. "B_446,blocks446" "0,1"
|
|
bitfld.long 0x00 29. "B_445,blocks445" "0,1"
|
|
bitfld.long 0x00 28. "B_444,blocks444" "0,1"
|
|
bitfld.long 0x00 27. "B_443,blocks443" "0,1"
|
|
bitfld.long 0x00 26. "B_442,blocks442" "0,1"
|
|
bitfld.long 0x00 25. "B_441,blocks441" "0,1"
|
|
bitfld.long 0x00 24. "B_440,blocks440" "0,1"
|
|
bitfld.long 0x00 23. "B_439,blocks439" "0,1"
|
|
bitfld.long 0x00 22. "B_438,blocks438" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_437,blocks437" "0,1"
|
|
bitfld.long 0x00 20. "B_436,blocks436" "0,1"
|
|
bitfld.long 0x00 19. "B_435,blocks435" "0,1"
|
|
bitfld.long 0x00 18. "B_434,blocks434" "0,1"
|
|
bitfld.long 0x00 17. "B_433,blocks433" "0,1"
|
|
bitfld.long 0x00 16. "B_432,blocks432" "0,1"
|
|
bitfld.long 0x00 15. "B_431,blocks431" "0,1"
|
|
bitfld.long 0x00 14. "B_430,blocks430" "0,1"
|
|
bitfld.long 0x00 13. "B_429,blocks429" "0,1"
|
|
bitfld.long 0x00 12. "B_428,blocks428" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_427,blocks427" "0,1"
|
|
bitfld.long 0x00 10. "B_426,blocks426" "0,1"
|
|
bitfld.long 0x00 9. "B_425,blocks425" "0,1"
|
|
bitfld.long 0x00 8. "B_424,blocks424" "0,1"
|
|
bitfld.long 0x00 7. "B_423,blocks423" "0,1"
|
|
bitfld.long 0x00 6. "B_422,blocks422" "0,1"
|
|
bitfld.long 0x00 5. "B_421,blocks421" "0,1"
|
|
bitfld.long 0x00 4. "B_420,blocks420" "0,1"
|
|
bitfld.long 0x00 3. "B_419,blocks419" "0,1"
|
|
bitfld.long 0x00 2. "B_418,blocks418" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_417,blocks 417" "0,1"
|
|
bitfld.long 0x00 0. "B_416,blocks 416" "0,1"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "VEC14,TZBMPC2 vector register 14"
|
|
bitfld.long 0x00 31. "B_479,blocks479" "0,1"
|
|
bitfld.long 0x00 30. "B_478,blocks478" "0,1"
|
|
bitfld.long 0x00 29. "B_477,blocks477" "0,1"
|
|
bitfld.long 0x00 28. "B_476,blocks476" "0,1"
|
|
bitfld.long 0x00 27. "B_475,blocks475" "0,1"
|
|
bitfld.long 0x00 26. "B_474,blocks474" "0,1"
|
|
bitfld.long 0x00 25. "B_473,blocks473" "0,1"
|
|
bitfld.long 0x00 24. "B_472,blocks472" "0,1"
|
|
bitfld.long 0x00 23. "B_471,blocks471" "0,1"
|
|
bitfld.long 0x00 22. "B_470,blocks470" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_469,blocks469" "0,1"
|
|
bitfld.long 0x00 20. "B_468,blocks468" "0,1"
|
|
bitfld.long 0x00 19. "B_467,blocks467" "0,1"
|
|
bitfld.long 0x00 18. "B_466,blocks466" "0,1"
|
|
bitfld.long 0x00 17. "B_465,blocks465" "0,1"
|
|
bitfld.long 0x00 16. "B_464,blocks464" "0,1"
|
|
bitfld.long 0x00 15. "B_463,blocks463" "0,1"
|
|
bitfld.long 0x00 14. "B_462,blocks462" "0,1"
|
|
bitfld.long 0x00 13. "B_461,blocks461" "0,1"
|
|
bitfld.long 0x00 12. "B_460,blocks460" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_459,blocks459" "0,1"
|
|
bitfld.long 0x00 10. "B_458,blocks458" "0,1"
|
|
bitfld.long 0x00 9. "B_457,blocks457" "0,1"
|
|
bitfld.long 0x00 8. "B_456,blocks456" "0,1"
|
|
bitfld.long 0x00 7. "B_455,blocks455" "0,1"
|
|
bitfld.long 0x00 6. "B_454,blocks454" "0,1"
|
|
bitfld.long 0x00 5. "B_453,blocks453" "0,1"
|
|
bitfld.long 0x00 4. "B_452,blocks452" "0,1"
|
|
bitfld.long 0x00 3. "B_451,blocks451" "0,1"
|
|
bitfld.long 0x00 2. "B_450,blocks450" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_449,blocks 449" "0,1"
|
|
bitfld.long 0x00 0. "B_448,blocks 448" "0,1"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "VEC15,TZBMPC2 vector register 15"
|
|
bitfld.long 0x00 31. "B_511,blocks511" "0,1"
|
|
bitfld.long 0x00 30. "B_510,blocks510" "0,1"
|
|
bitfld.long 0x00 29. "B_509,blocks509" "0,1"
|
|
bitfld.long 0x00 28. "B_508,blocks508" "0,1"
|
|
bitfld.long 0x00 27. "B_507,blocks507" "0,1"
|
|
bitfld.long 0x00 26. "B_506,blocks506" "0,1"
|
|
bitfld.long 0x00 25. "B_505,blocks505" "0,1"
|
|
bitfld.long 0x00 24. "B_504,blocks504" "0,1"
|
|
bitfld.long 0x00 23. "B_503,blocks503" "0,1"
|
|
bitfld.long 0x00 22. "B_502,blocks502" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_501,blocks501" "0,1"
|
|
bitfld.long 0x00 20. "B_500,blocks500" "0,1"
|
|
bitfld.long 0x00 19. "B_499,blocks499" "0,1"
|
|
bitfld.long 0x00 18. "B_498,blocks498" "0,1"
|
|
bitfld.long 0x00 17. "B_497,blocks497" "0,1"
|
|
bitfld.long 0x00 16. "B_496,blocks496" "0,1"
|
|
bitfld.long 0x00 15. "B_495,blocks495" "0,1"
|
|
bitfld.long 0x00 14. "B_494,blocks494" "0,1"
|
|
bitfld.long 0x00 13. "B_493,blocks493" "0,1"
|
|
bitfld.long 0x00 12. "B_492,blocks492" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_491,blocks491" "0,1"
|
|
bitfld.long 0x00 10. "B_490,blocks490" "0,1"
|
|
bitfld.long 0x00 9. "B_489,blocks489" "0,1"
|
|
bitfld.long 0x00 8. "B_488,blocks488" "0,1"
|
|
bitfld.long 0x00 7. "B_487,blocks487" "0,1"
|
|
bitfld.long 0x00 6. "B_486,blocks486" "0,1"
|
|
bitfld.long 0x00 5. "B_485,blocks485" "0,1"
|
|
bitfld.long 0x00 4. "B_484,blocks484" "0,1"
|
|
bitfld.long 0x00 3. "B_483,blocks483" "0,1"
|
|
bitfld.long 0x00 2. "B_482,blocks482" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_481,blocks 481" "0,1"
|
|
bitfld.long 0x00 0. "B_480,blocks 480" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK0,TZBMPC2 lock register 0"
|
|
bitfld.long 0x00 15. "LKUB15,lock/unlock status of secure access mode for the super-blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "LKUB14,lock/unlock status of secure access mode for the super-blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "LKUB13,lock/unlock status of secure access mode for the super-blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "LKUB12,lock/unlock status of secure access mode for the super-blocks 12" "0,1"
|
|
bitfld.long 0x00 11. "LKUB11,lock/unlock status of secure access mode for the super-blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "LKUB10,lock/unlock status of secure access mode for the super-blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "LKUB9,lock/unlock status of secure access mode for the super-blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "LKUB8,lock/unlock status of secure access mode for the super-blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "LKUB7,lock/unlock status of secure access mode for the super-blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "LKUB6,lock/unlock status of secure access mode for the super-blocks 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "LKUB5,lock/unlock status of secure access mode for the super-blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "LKUB4,lock/unlock status of secure access mode for the super-blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "LKUB3,lock/unlock status of secure access mode for the super-blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "LKUB2,lock/unlock status of secure access mode for the super-blocks 2" "0,1"
|
|
bitfld.long 0x00 1. "LKUB1,lock/unlock status of secure access mode for the super-blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "LKUB0,lock/unlock status of secure access mode for the super-blocks 0" "0,1"
|
|
tree.end
|
|
tree "TZBMPC3"
|
|
base ad:0x400B0400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZBMPC2 control register"
|
|
bitfld.long 0x00 31. "SRWACFG,secure read/write illegal access disable" "0,1"
|
|
bitfld.long 0x00 30. "SECSTATCFG,default security state" "0,1"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VEC0,TZBMPC3 vector register 0"
|
|
bitfld.long 0x00 31. "B_31,blocks 31" "0,1"
|
|
bitfld.long 0x00 30. "B_30,blocks 30" "0,1"
|
|
bitfld.long 0x00 29. "B_29,blocks 29" "0,1"
|
|
bitfld.long 0x00 28. "B_28,blocks 28" "0,1"
|
|
bitfld.long 0x00 27. "B_27,blocks 27" "0,1"
|
|
bitfld.long 0x00 26. "B_26,blocks 26" "0,1"
|
|
bitfld.long 0x00 25. "B_25,blocks 25" "0,1"
|
|
bitfld.long 0x00 24. "B_24,blocks 24" "0,1"
|
|
bitfld.long 0x00 23. "B_23,blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "B_22,blocks 22" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_21,blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "B_20,blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "B_19,blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "B_18,blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "B_17,blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "B_16,blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "B_15,blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "B_14,blocks 14" "0,1"
|
|
bitfld.long 0x00 13. "B_13,blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "B_12,blocks 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_11,blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "B_10,blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "B_9,blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "B_8,blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "B_7,blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "B_6,blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "B_5,blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "B_4,blocks 4" "0,1"
|
|
bitfld.long 0x00 3. "B_3,blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "B_2,blocks 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_1,blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "B_0,blocks 0" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VEC1,TZBMPC3 vector register 1"
|
|
bitfld.long 0x00 31. "B_63,blocks 63" "0,1"
|
|
bitfld.long 0x00 30. "B_62,blocks 62" "0,1"
|
|
bitfld.long 0x00 29. "B_61,blocks 61" "0,1"
|
|
bitfld.long 0x00 28. "B_60,blocks 60" "0,1"
|
|
bitfld.long 0x00 27. "B_59,blocks 59" "0,1"
|
|
bitfld.long 0x00 26. "B_58,blocks 58" "0,1"
|
|
bitfld.long 0x00 25. "B_57,blocks 57" "0,1"
|
|
bitfld.long 0x00 24. "B_56,blocks 56" "0,1"
|
|
bitfld.long 0x00 23. "B_55,blocks 55" "0,1"
|
|
bitfld.long 0x00 22. "B_54,blocks 54" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_53,blocks 53" "0,1"
|
|
bitfld.long 0x00 20. "B_52,blocks 52" "0,1"
|
|
bitfld.long 0x00 19. "B_51,blocks 51" "0,1"
|
|
bitfld.long 0x00 18. "B_50,blocks 50" "0,1"
|
|
bitfld.long 0x00 17. "B_49,blocks 49" "0,1"
|
|
bitfld.long 0x00 16. "B_48,blocks 48" "0,1"
|
|
bitfld.long 0x00 15. "B_47,blocks 47" "0,1"
|
|
bitfld.long 0x00 14. "B_46,blocks 46" "0,1"
|
|
bitfld.long 0x00 13. "B_45,blocks 45" "0,1"
|
|
bitfld.long 0x00 12. "B_44,blocks 44" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_43,blocks 43" "0,1"
|
|
bitfld.long 0x00 10. "B_42,blocks 42" "0,1"
|
|
bitfld.long 0x00 9. "B_41,blocks 41" "0,1"
|
|
bitfld.long 0x00 8. "B_40,blocks 40" "0,1"
|
|
bitfld.long 0x00 7. "B_39,blocks 39" "0,1"
|
|
bitfld.long 0x00 6. "B_38,blocks 38" "0,1"
|
|
bitfld.long 0x00 5. "B_37,blocks 37" "0,1"
|
|
bitfld.long 0x00 4. "B_36,blocks 36" "0,1"
|
|
bitfld.long 0x00 3. "B_35,blocks 35" "0,1"
|
|
bitfld.long 0x00 2. "B_34,blocks 34" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_33,blocks 33" "0,1"
|
|
bitfld.long 0x00 0. "B_32,blocks 32" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VEC2,TZBMPC3 vector register 2"
|
|
bitfld.long 0x00 31. "B_95,blocks 95" "0,1"
|
|
bitfld.long 0x00 30. "B_94,blocks 94" "0,1"
|
|
bitfld.long 0x00 29. "B_93,blocks 93" "0,1"
|
|
bitfld.long 0x00 28. "B_92,blocks 92" "0,1"
|
|
bitfld.long 0x00 27. "B_91,blocks 91" "0,1"
|
|
bitfld.long 0x00 26. "B_90,blocks 90" "0,1"
|
|
bitfld.long 0x00 25. "B_89,blocks 89" "0,1"
|
|
bitfld.long 0x00 24. "B_88,blocks 88" "0,1"
|
|
bitfld.long 0x00 23. "B_87,blocks 87" "0,1"
|
|
bitfld.long 0x00 22. "B_86,blocks 86" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_85,blocks 85" "0,1"
|
|
bitfld.long 0x00 20. "B_84,blocks 84" "0,1"
|
|
bitfld.long 0x00 19. "B_83,blocks 83" "0,1"
|
|
bitfld.long 0x00 18. "B_82,blocks 82" "0,1"
|
|
bitfld.long 0x00 17. "B_81,blocks 81" "0,1"
|
|
bitfld.long 0x00 16. "B_80,blocks 80" "0,1"
|
|
bitfld.long 0x00 15. "B_79,blocks 79" "0,1"
|
|
bitfld.long 0x00 14. "B_78,blocks 78" "0,1"
|
|
bitfld.long 0x00 13. "B_77,blocks 77" "0,1"
|
|
bitfld.long 0x00 12. "B_76,blocks 76" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_75,blocks 75" "0,1"
|
|
bitfld.long 0x00 10. "B_74,blocks 74" "0,1"
|
|
bitfld.long 0x00 9. "B_73,blocks 73" "0,1"
|
|
bitfld.long 0x00 8. "B_72,blocks 72" "0,1"
|
|
bitfld.long 0x00 7. "B_71,blocks 71" "0,1"
|
|
bitfld.long 0x00 6. "B_70,blocks 70" "0,1"
|
|
bitfld.long 0x00 5. "B_69,blocks 69" "0,1"
|
|
bitfld.long 0x00 4. "B_68,blocks 68" "0,1"
|
|
bitfld.long 0x00 3. "B_67,blocks 67" "0,1"
|
|
bitfld.long 0x00 2. "B_66,blocks 66" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_65,blocks 65" "0,1"
|
|
bitfld.long 0x00 0. "B_64,blocks 64" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VEC3,TZBMPC3 vector register 3"
|
|
bitfld.long 0x00 31. "B_127,blocks 127" "0,1"
|
|
bitfld.long 0x00 30. "B_126,blocks 126" "0,1"
|
|
bitfld.long 0x00 29. "B_125,blocks 125" "0,1"
|
|
bitfld.long 0x00 28. "B_124,blocks 124" "0,1"
|
|
bitfld.long 0x00 27. "B_123,blocks 123" "0,1"
|
|
bitfld.long 0x00 26. "B_122,blocks 122" "0,1"
|
|
bitfld.long 0x00 25. "B_121,blocks 121" "0,1"
|
|
bitfld.long 0x00 24. "B_120,blocks 120" "0,1"
|
|
bitfld.long 0x00 23. "B_119,blocks 119" "0,1"
|
|
bitfld.long 0x00 22. "B_118,blocks 118" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_117,blocks 117" "0,1"
|
|
bitfld.long 0x00 20. "B_116,blocks 116" "0,1"
|
|
bitfld.long 0x00 19. "B_115,blocks 115" "0,1"
|
|
bitfld.long 0x00 18. "B_114,blocks 114" "0,1"
|
|
bitfld.long 0x00 17. "B_113,blocks 113" "0,1"
|
|
bitfld.long 0x00 16. "B_112,blocks 112" "0,1"
|
|
bitfld.long 0x00 15. "B_111,blocks 111" "0,1"
|
|
bitfld.long 0x00 14. "B_110,blocks 110" "0,1"
|
|
bitfld.long 0x00 13. "B_109,blocks 109" "0,1"
|
|
bitfld.long 0x00 12. "B_108,blocks 108" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_107,blocks 107" "0,1"
|
|
bitfld.long 0x00 10. "B_106,blocks 106" "0,1"
|
|
bitfld.long 0x00 9. "B_105,blocks 105" "0,1"
|
|
bitfld.long 0x00 8. "B_104,blocks 104" "0,1"
|
|
bitfld.long 0x00 7. "B_103,blocks 103" "0,1"
|
|
bitfld.long 0x00 6. "B_102,blocks 102" "0,1"
|
|
bitfld.long 0x00 5. "B_101,blocks 101" "0,1"
|
|
bitfld.long 0x00 4. "B_100,blocks 100" "0,1"
|
|
bitfld.long 0x00 3. "B_99,blocks 99" "0,1"
|
|
bitfld.long 0x00 2. "B_98,blocks 98" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_97,blocks 97" "0,1"
|
|
bitfld.long 0x00 0. "B_96,blocks 96" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VEC4,TZBMPC3 vector register 4"
|
|
bitfld.long 0x00 31. "B_159,blocks 159" "0,1"
|
|
bitfld.long 0x00 30. "B_158,blocks 158" "0,1"
|
|
bitfld.long 0x00 29. "B_157,blocks 157" "0,1"
|
|
bitfld.long 0x00 28. "B_156,blocks 156" "0,1"
|
|
bitfld.long 0x00 27. "B_155,blocks 155" "0,1"
|
|
bitfld.long 0x00 26. "B_154,blocks 154" "0,1"
|
|
bitfld.long 0x00 25. "B_153,blocks 153" "0,1"
|
|
bitfld.long 0x00 24. "B_152,blocks 152" "0,1"
|
|
bitfld.long 0x00 23. "B_151,blocks 151" "0,1"
|
|
bitfld.long 0x00 22. "B_150,blocks 150" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_149,blocks 149" "0,1"
|
|
bitfld.long 0x00 20. "B_148,blocks 148" "0,1"
|
|
bitfld.long 0x00 19. "B_147,blocks 147" "0,1"
|
|
bitfld.long 0x00 18. "B_146,blocks 146" "0,1"
|
|
bitfld.long 0x00 17. "B_145,blocks 145" "0,1"
|
|
bitfld.long 0x00 16. "B_144,blocks 144" "0,1"
|
|
bitfld.long 0x00 15. "B_143,blocks 143" "0,1"
|
|
bitfld.long 0x00 14. "B_142,blocks 142" "0,1"
|
|
bitfld.long 0x00 13. "B_141,blocks 141" "0,1"
|
|
bitfld.long 0x00 12. "B_140,blocks 140" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_139,blocks 139" "0,1"
|
|
bitfld.long 0x00 10. "B_138,blocks 138" "0,1"
|
|
bitfld.long 0x00 9. "B_137,blocks 137" "0,1"
|
|
bitfld.long 0x00 8. "B_136,blocks 136" "0,1"
|
|
bitfld.long 0x00 7. "B_135,blocks 135" "0,1"
|
|
bitfld.long 0x00 6. "B_134,blocks 134" "0,1"
|
|
bitfld.long 0x00 5. "B_133,blocks 133" "0,1"
|
|
bitfld.long 0x00 4. "B_132,blocks 132" "0,1"
|
|
bitfld.long 0x00 3. "B_131,blocks 131" "0,1"
|
|
bitfld.long 0x00 2. "B_130,blocks 130" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_129,blocks 129" "0,1"
|
|
bitfld.long 0x00 0. "B_128,blocks 128" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VEC5,TZBMPC3 vector register 5"
|
|
bitfld.long 0x00 31. "B_191,blocks 191" "0,1"
|
|
bitfld.long 0x00 30. "B_190,blocks 190" "0,1"
|
|
bitfld.long 0x00 29. "B_189,blocks 189" "0,1"
|
|
bitfld.long 0x00 28. "B_188,blocks 188" "0,1"
|
|
bitfld.long 0x00 27. "B_187,blocks 187" "0,1"
|
|
bitfld.long 0x00 26. "B_186,blocks 186" "0,1"
|
|
bitfld.long 0x00 25. "B_185,blocks 185" "0,1"
|
|
bitfld.long 0x00 24. "B_184,blocks 184" "0,1"
|
|
bitfld.long 0x00 23. "B_183,blocks 183" "0,1"
|
|
bitfld.long 0x00 22. "B_182,blocks 182" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_181,blocks 181" "0,1"
|
|
bitfld.long 0x00 20. "B_180,blocks 180" "0,1"
|
|
bitfld.long 0x00 19. "B_179,blocks 179" "0,1"
|
|
bitfld.long 0x00 18. "B_178,blocks 178" "0,1"
|
|
bitfld.long 0x00 17. "B_177,blocks 177" "0,1"
|
|
bitfld.long 0x00 16. "B_176,blocks 176" "0,1"
|
|
bitfld.long 0x00 15. "B_175,blocks 175" "0,1"
|
|
bitfld.long 0x00 14. "B_174,blocks 174" "0,1"
|
|
bitfld.long 0x00 13. "B_173,blocks 173" "0,1"
|
|
bitfld.long 0x00 12. "B_172,blocks 172" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_171,blocks 171" "0,1"
|
|
bitfld.long 0x00 10. "B_170,blocks 170" "0,1"
|
|
bitfld.long 0x00 9. "B_169,blocks 169" "0,1"
|
|
bitfld.long 0x00 8. "B_168,blocks 168" "0,1"
|
|
bitfld.long 0x00 7. "B_167,blocks 167" "0,1"
|
|
bitfld.long 0x00 6. "B_166,blocks 166" "0,1"
|
|
bitfld.long 0x00 5. "B_165,blocks 165" "0,1"
|
|
bitfld.long 0x00 4. "B_164,blocks 164" "0,1"
|
|
bitfld.long 0x00 3. "B_163,blocks 163" "0,1"
|
|
bitfld.long 0x00 2. "B_162,blocks 162" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_161,blocks 161" "0,1"
|
|
bitfld.long 0x00 0. "B_160,blocks 160" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "VEC6,TZBMPC3 vector register 6"
|
|
bitfld.long 0x00 31. "B_223,blocks 223" "0,1"
|
|
bitfld.long 0x00 30. "B_222,blocks 222" "0,1"
|
|
bitfld.long 0x00 29. "B_221,blocks 221" "0,1"
|
|
bitfld.long 0x00 28. "B_220,blocks 220" "0,1"
|
|
bitfld.long 0x00 27. "B_219,blocks 219" "0,1"
|
|
bitfld.long 0x00 26. "B_218,blocks 218" "0,1"
|
|
bitfld.long 0x00 25. "B_217,blocks 217" "0,1"
|
|
bitfld.long 0x00 24. "B_216,blocks 216" "0,1"
|
|
bitfld.long 0x00 23. "B_215,blocks 215" "0,1"
|
|
bitfld.long 0x00 22. "B_214,blocks 214" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_213,blocks 213" "0,1"
|
|
bitfld.long 0x00 20. "B_212,blocks 212" "0,1"
|
|
bitfld.long 0x00 19. "B_211,blocks 211" "0,1"
|
|
bitfld.long 0x00 18. "B_210,blocks 210" "0,1"
|
|
bitfld.long 0x00 17. "B_209,blocks 209" "0,1"
|
|
bitfld.long 0x00 16. "B_208,blocks 208" "0,1"
|
|
bitfld.long 0x00 15. "B_207,blocks 207" "0,1"
|
|
bitfld.long 0x00 14. "B_206,blocks 206" "0,1"
|
|
bitfld.long 0x00 13. "B_205,blocks 205" "0,1"
|
|
bitfld.long 0x00 12. "B_204,blocks 204" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_203,blocks 203" "0,1"
|
|
bitfld.long 0x00 10. "B_202,blocks 202" "0,1"
|
|
bitfld.long 0x00 9. "B_201,blocks 201" "0,1"
|
|
bitfld.long 0x00 8. "B_200,blocks 200" "0,1"
|
|
bitfld.long 0x00 7. "B_199,blocks 199" "0,1"
|
|
bitfld.long 0x00 6. "B_198,blocks 198" "0,1"
|
|
bitfld.long 0x00 5. "B_197,blocks 197" "0,1"
|
|
bitfld.long 0x00 4. "B_196,blocks 196" "0,1"
|
|
bitfld.long 0x00 3. "B_195,blocks 195" "0,1"
|
|
bitfld.long 0x00 2. "B_194,blocks 194" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_193,blocks 93" "0,1"
|
|
bitfld.long 0x00 0. "B_192,blocks 192" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "VEC7,TZBMPC3 vector register 7"
|
|
bitfld.long 0x00 31. "B_255,blocks 255" "0,1"
|
|
bitfld.long 0x00 30. "B_254,blocks 254" "0,1"
|
|
bitfld.long 0x00 29. "B_253,blocks 253" "0,1"
|
|
bitfld.long 0x00 28. "B_252,blocks 252" "0,1"
|
|
bitfld.long 0x00 27. "B_251,blocks 251" "0,1"
|
|
bitfld.long 0x00 26. "B_250,blocks 250" "0,1"
|
|
bitfld.long 0x00 25. "B_249,blocks 249" "0,1"
|
|
bitfld.long 0x00 24. "B_248,blocks 248" "0,1"
|
|
bitfld.long 0x00 23. "B_247,blocks 247" "0,1"
|
|
bitfld.long 0x00 22. "B_246,blocks 246" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_245,blocks 245" "0,1"
|
|
bitfld.long 0x00 20. "B_244,blocks 244" "0,1"
|
|
bitfld.long 0x00 19. "B_243,blocks 243" "0,1"
|
|
bitfld.long 0x00 18. "B_242,blocks 242" "0,1"
|
|
bitfld.long 0x00 17. "B_241,blocks 241" "0,1"
|
|
bitfld.long 0x00 16. "B_240,blocks 240" "0,1"
|
|
bitfld.long 0x00 15. "B_239,blocks 239" "0,1"
|
|
bitfld.long 0x00 14. "B_238,blocks 238" "0,1"
|
|
bitfld.long 0x00 13. "B_237,blocks 237" "0,1"
|
|
bitfld.long 0x00 12. "B_236,blocks 236" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_235,blocks 235" "0,1"
|
|
bitfld.long 0x00 10. "B_234,blocks 234" "0,1"
|
|
bitfld.long 0x00 9. "B_233,blocks 233" "0,1"
|
|
bitfld.long 0x00 8. "B_232,blocks 232" "0,1"
|
|
bitfld.long 0x00 7. "B_231,blocks 231" "0,1"
|
|
bitfld.long 0x00 6. "B_230,blocks 230" "0,1"
|
|
bitfld.long 0x00 5. "B_229,blocks 229" "0,1"
|
|
bitfld.long 0x00 4. "B_228,blocks 228" "0,1"
|
|
bitfld.long 0x00 3. "B_227,blocks 227" "0,1"
|
|
bitfld.long 0x00 2. "B_226,blocks 226" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_225,blocks 225" "0,1"
|
|
bitfld.long 0x00 0. "B_224,blocks 224" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "VEC8,TZBMPC3 vector register 8"
|
|
bitfld.long 0x00 31. "B_287,blocks 287" "0,1"
|
|
bitfld.long 0x00 30. "B_286,blocks 286" "0,1"
|
|
bitfld.long 0x00 29. "B_285,blocks 285" "0,1"
|
|
bitfld.long 0x00 28. "B_284,blocks 284" "0,1"
|
|
bitfld.long 0x00 27. "B_283,blocks 283" "0,1"
|
|
bitfld.long 0x00 26. "B_282,blocks 282" "0,1"
|
|
bitfld.long 0x00 25. "B_281,blocks 281" "0,1"
|
|
bitfld.long 0x00 24. "B_280,blocks 280" "0,1"
|
|
bitfld.long 0x00 23. "B_279,blocks 279" "0,1"
|
|
bitfld.long 0x00 22. "B_278,blocks 278" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_277,blocks 277" "0,1"
|
|
bitfld.long 0x00 20. "B_276,blocks 276" "0,1"
|
|
bitfld.long 0x00 19. "B_275,blocks 275" "0,1"
|
|
bitfld.long 0x00 18. "B_274,blocks 274" "0,1"
|
|
bitfld.long 0x00 17. "B_273,blocks 273" "0,1"
|
|
bitfld.long 0x00 16. "B_272,blocks 272" "0,1"
|
|
bitfld.long 0x00 15. "B_271,blocks 271" "0,1"
|
|
bitfld.long 0x00 14. "B_270,blocks 270" "0,1"
|
|
bitfld.long 0x00 13. "B_269,blocks 269" "0,1"
|
|
bitfld.long 0x00 12. "B_268,blocks 268" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_267,blocks 267" "0,1"
|
|
bitfld.long 0x00 10. "B_266,blocks 266" "0,1"
|
|
bitfld.long 0x00 9. "B_265,blocks 265" "0,1"
|
|
bitfld.long 0x00 8. "B_264,blocks 264" "0,1"
|
|
bitfld.long 0x00 7. "B_263,blocks 263" "0,1"
|
|
bitfld.long 0x00 6. "B_262,blocks 262" "0,1"
|
|
bitfld.long 0x00 5. "B_261,blocks 261" "0,1"
|
|
bitfld.long 0x00 4. "B_260,blocks 260" "0,1"
|
|
bitfld.long 0x00 3. "B_259,blocks 259" "0,1"
|
|
bitfld.long 0x00 2. "B_258,blocks 258" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_257,blocks 257" "0,1"
|
|
bitfld.long 0x00 0. "B_256,blocks 256" "0,1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "VEC9,TZBMPC3 vector register 9"
|
|
bitfld.long 0x00 31. "B_319,blocks319" "0,1"
|
|
bitfld.long 0x00 30. "B_318,blocks318" "0,1"
|
|
bitfld.long 0x00 29. "B_317,blocks317" "0,1"
|
|
bitfld.long 0x00 28. "B_316,blocks316" "0,1"
|
|
bitfld.long 0x00 27. "B_315,blocks315" "0,1"
|
|
bitfld.long 0x00 26. "B_314,blocks314" "0,1"
|
|
bitfld.long 0x00 25. "B_313,blocks313" "0,1"
|
|
bitfld.long 0x00 24. "B_312,blocks312" "0,1"
|
|
bitfld.long 0x00 23. "B_311,blocks311" "0,1"
|
|
bitfld.long 0x00 22. "B_310,blocks310" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_309,blocks309" "0,1"
|
|
bitfld.long 0x00 20. "B_308,blocks308" "0,1"
|
|
bitfld.long 0x00 19. "B_307,blocks307" "0,1"
|
|
bitfld.long 0x00 18. "B_306,blocks306" "0,1"
|
|
bitfld.long 0x00 17. "B_305,blocks305" "0,1"
|
|
bitfld.long 0x00 16. "B_304,blocks304" "0,1"
|
|
bitfld.long 0x00 15. "B_303,blocks303" "0,1"
|
|
bitfld.long 0x00 14. "B_302,blocks302" "0,1"
|
|
bitfld.long 0x00 13. "B_301,blocks301" "0,1"
|
|
bitfld.long 0x00 12. "B_300,blocks300" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_299,blocks299" "0,1"
|
|
bitfld.long 0x00 10. "B_298,blocks298" "0,1"
|
|
bitfld.long 0x00 9. "B_297,blocks297" "0,1"
|
|
bitfld.long 0x00 8. "B_296,blocks296" "0,1"
|
|
bitfld.long 0x00 7. "B_295,blocks295" "0,1"
|
|
bitfld.long 0x00 6. "B_294,blocks294" "0,1"
|
|
bitfld.long 0x00 5. "B_293,blocks293" "0,1"
|
|
bitfld.long 0x00 4. "B_292,blocks292" "0,1"
|
|
bitfld.long 0x00 3. "B_291,blocks291" "0,1"
|
|
bitfld.long 0x00 2. "B_290,blocks290" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_289,blocks 289" "0,1"
|
|
bitfld.long 0x00 0. "B_288,blocks 288" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "VEC10,TZBMPC3 vector register 10"
|
|
bitfld.long 0x00 31. "B_351,blocks351" "0,1"
|
|
bitfld.long 0x00 30. "B_350,blocks350" "0,1"
|
|
bitfld.long 0x00 29. "B_349,blocks349" "0,1"
|
|
bitfld.long 0x00 28. "B_348,blocks348" "0,1"
|
|
bitfld.long 0x00 27. "B_347,blocks347" "0,1"
|
|
bitfld.long 0x00 26. "B_346,blocks346" "0,1"
|
|
bitfld.long 0x00 25. "B_345,blocks345" "0,1"
|
|
bitfld.long 0x00 24. "B_344,blocks344" "0,1"
|
|
bitfld.long 0x00 23. "B_343,blocks343" "0,1"
|
|
bitfld.long 0x00 22. "B_342,blocks342" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_341,blocks341" "0,1"
|
|
bitfld.long 0x00 20. "B_340,blocks340" "0,1"
|
|
bitfld.long 0x00 19. "B_339,blocks339" "0,1"
|
|
bitfld.long 0x00 18. "B_338,blocks338" "0,1"
|
|
bitfld.long 0x00 17. "B_337,blocks337" "0,1"
|
|
bitfld.long 0x00 16. "B_336,blocks336" "0,1"
|
|
bitfld.long 0x00 15. "B_335,blocks335" "0,1"
|
|
bitfld.long 0x00 14. "B_334,blocks334" "0,1"
|
|
bitfld.long 0x00 13. "B_333,blocks333" "0,1"
|
|
bitfld.long 0x00 12. "B_332,blocks332" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_331,blocks331" "0,1"
|
|
bitfld.long 0x00 10. "B_330,blocks330" "0,1"
|
|
bitfld.long 0x00 9. "B_329,blocks329" "0,1"
|
|
bitfld.long 0x00 8. "B_328,blocks328" "0,1"
|
|
bitfld.long 0x00 7. "B_327,blocks327" "0,1"
|
|
bitfld.long 0x00 6. "B_326,blocks326" "0,1"
|
|
bitfld.long 0x00 5. "B_325,blocks325" "0,1"
|
|
bitfld.long 0x00 4. "B_324,blocks324" "0,1"
|
|
bitfld.long 0x00 3. "B_323,blocks323" "0,1"
|
|
bitfld.long 0x00 2. "B_322,blocks322" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_321,blocks 321" "0,1"
|
|
bitfld.long 0x00 0. "B_320,blocks 320" "0,1"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "VEC11,TZBMPC3 vector register 11"
|
|
bitfld.long 0x00 31. "B_383,blocks383" "0,1"
|
|
bitfld.long 0x00 30. "B_382,blocks382" "0,1"
|
|
bitfld.long 0x00 29. "B_381,blocks381" "0,1"
|
|
bitfld.long 0x00 28. "B_380,blocks380" "0,1"
|
|
bitfld.long 0x00 27. "B_379,blocks379" "0,1"
|
|
bitfld.long 0x00 26. "B_378,blocks378" "0,1"
|
|
bitfld.long 0x00 25. "B_377,blocks377" "0,1"
|
|
bitfld.long 0x00 24. "B_376,blocks376" "0,1"
|
|
bitfld.long 0x00 23. "B_375,blocks375" "0,1"
|
|
bitfld.long 0x00 22. "B_374,blocks374" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_373,blocks373" "0,1"
|
|
bitfld.long 0x00 20. "B_372,blocks372" "0,1"
|
|
bitfld.long 0x00 19. "B_371,blocks371" "0,1"
|
|
bitfld.long 0x00 18. "B_370,blocks370" "0,1"
|
|
bitfld.long 0x00 17. "B_369,blocks369" "0,1"
|
|
bitfld.long 0x00 16. "B_368,blocks368" "0,1"
|
|
bitfld.long 0x00 15. "B_367,blocks367" "0,1"
|
|
bitfld.long 0x00 14. "B_366,blocks366" "0,1"
|
|
bitfld.long 0x00 13. "B_365,blocks365" "0,1"
|
|
bitfld.long 0x00 12. "B_364,blocks364" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_363,blocks363" "0,1"
|
|
bitfld.long 0x00 10. "B_362,blocks362" "0,1"
|
|
bitfld.long 0x00 9. "B_361,blocks361" "0,1"
|
|
bitfld.long 0x00 8. "B_360,blocks360" "0,1"
|
|
bitfld.long 0x00 7. "B_359,blocks359" "0,1"
|
|
bitfld.long 0x00 6. "B_358,blocks358" "0,1"
|
|
bitfld.long 0x00 5. "B_357,blocks357" "0,1"
|
|
bitfld.long 0x00 4. "B_356,blocks356" "0,1"
|
|
bitfld.long 0x00 3. "B_355,blocks355" "0,1"
|
|
bitfld.long 0x00 2. "B_354,blocks354" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_353,blocks 353" "0,1"
|
|
bitfld.long 0x00 0. "B_352,blocks 352" "0,1"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "VEC12,TZBMPC3 vector register 12"
|
|
bitfld.long 0x00 31. "B_415,blocks415" "0,1"
|
|
bitfld.long 0x00 30. "B_414,blocks414" "0,1"
|
|
bitfld.long 0x00 29. "B_413,blocks413" "0,1"
|
|
bitfld.long 0x00 28. "B_412,blocks412" "0,1"
|
|
bitfld.long 0x00 27. "B_411,blocks411" "0,1"
|
|
bitfld.long 0x00 26. "B_410,blocks410" "0,1"
|
|
bitfld.long 0x00 25. "B_409,blocks409" "0,1"
|
|
bitfld.long 0x00 24. "B_408,blocks408" "0,1"
|
|
bitfld.long 0x00 23. "B_407,blocks407" "0,1"
|
|
bitfld.long 0x00 22. "B_406,blocks406" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_405,blocks405" "0,1"
|
|
bitfld.long 0x00 20. "B_404,blocks404" "0,1"
|
|
bitfld.long 0x00 19. "B_403,blocks403" "0,1"
|
|
bitfld.long 0x00 18. "B_402,blocks402" "0,1"
|
|
bitfld.long 0x00 17. "B_401,blocks401" "0,1"
|
|
bitfld.long 0x00 16. "B_400,blocks400" "0,1"
|
|
bitfld.long 0x00 15. "B_399,blocks399" "0,1"
|
|
bitfld.long 0x00 14. "B_398,blocks398" "0,1"
|
|
bitfld.long 0x00 13. "B_397,blocks397" "0,1"
|
|
bitfld.long 0x00 12. "B_396,blocks396" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_395,blocks395" "0,1"
|
|
bitfld.long 0x00 10. "B_394,blocks394" "0,1"
|
|
bitfld.long 0x00 9. "B_393,blocks393" "0,1"
|
|
bitfld.long 0x00 8. "B_392,blocks392" "0,1"
|
|
bitfld.long 0x00 7. "B_391,blocks391" "0,1"
|
|
bitfld.long 0x00 6. "B_390,blocks390" "0,1"
|
|
bitfld.long 0x00 5. "B_389,blocks389" "0,1"
|
|
bitfld.long 0x00 4. "B_388,blocks388" "0,1"
|
|
bitfld.long 0x00 3. "B_387,blocks387" "0,1"
|
|
bitfld.long 0x00 2. "B_386,blocks386" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_385,blocks 385" "0,1"
|
|
bitfld.long 0x00 0. "B_384,blocks 384" "0,1"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "VEC13,TZBMPC3 vector register 13"
|
|
bitfld.long 0x00 31. "B_447,blocks447" "0,1"
|
|
bitfld.long 0x00 30. "B_446,blocks446" "0,1"
|
|
bitfld.long 0x00 29. "B_445,blocks445" "0,1"
|
|
bitfld.long 0x00 28. "B_444,blocks444" "0,1"
|
|
bitfld.long 0x00 27. "B_443,blocks443" "0,1"
|
|
bitfld.long 0x00 26. "B_442,blocks442" "0,1"
|
|
bitfld.long 0x00 25. "B_441,blocks441" "0,1"
|
|
bitfld.long 0x00 24. "B_440,blocks440" "0,1"
|
|
bitfld.long 0x00 23. "B_439,blocks439" "0,1"
|
|
bitfld.long 0x00 22. "B_438,blocks438" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_437,blocks437" "0,1"
|
|
bitfld.long 0x00 20. "B_436,blocks436" "0,1"
|
|
bitfld.long 0x00 19. "B_435,blocks435" "0,1"
|
|
bitfld.long 0x00 18. "B_434,blocks434" "0,1"
|
|
bitfld.long 0x00 17. "B_433,blocks433" "0,1"
|
|
bitfld.long 0x00 16. "B_432,blocks432" "0,1"
|
|
bitfld.long 0x00 15. "B_431,blocks431" "0,1"
|
|
bitfld.long 0x00 14. "B_430,blocks430" "0,1"
|
|
bitfld.long 0x00 13. "B_429,blocks429" "0,1"
|
|
bitfld.long 0x00 12. "B_428,blocks428" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_427,blocks427" "0,1"
|
|
bitfld.long 0x00 10. "B_426,blocks426" "0,1"
|
|
bitfld.long 0x00 9. "B_425,blocks425" "0,1"
|
|
bitfld.long 0x00 8. "B_424,blocks424" "0,1"
|
|
bitfld.long 0x00 7. "B_423,blocks423" "0,1"
|
|
bitfld.long 0x00 6. "B_422,blocks422" "0,1"
|
|
bitfld.long 0x00 5. "B_421,blocks421" "0,1"
|
|
bitfld.long 0x00 4. "B_420,blocks420" "0,1"
|
|
bitfld.long 0x00 3. "B_419,blocks419" "0,1"
|
|
bitfld.long 0x00 2. "B_418,blocks418" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_417,blocks 417" "0,1"
|
|
bitfld.long 0x00 0. "B_416,blocks 416" "0,1"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "VEC14,TZBMPC3 vector register 14"
|
|
bitfld.long 0x00 31. "B_479,blocks479" "0,1"
|
|
bitfld.long 0x00 30. "B_478,blocks478" "0,1"
|
|
bitfld.long 0x00 29. "B_477,blocks477" "0,1"
|
|
bitfld.long 0x00 28. "B_476,blocks476" "0,1"
|
|
bitfld.long 0x00 27. "B_475,blocks475" "0,1"
|
|
bitfld.long 0x00 26. "B_474,blocks474" "0,1"
|
|
bitfld.long 0x00 25. "B_473,blocks473" "0,1"
|
|
bitfld.long 0x00 24. "B_472,blocks472" "0,1"
|
|
bitfld.long 0x00 23. "B_471,blocks471" "0,1"
|
|
bitfld.long 0x00 22. "B_470,blocks470" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_469,blocks469" "0,1"
|
|
bitfld.long 0x00 20. "B_468,blocks468" "0,1"
|
|
bitfld.long 0x00 19. "B_467,blocks467" "0,1"
|
|
bitfld.long 0x00 18. "B_466,blocks466" "0,1"
|
|
bitfld.long 0x00 17. "B_465,blocks465" "0,1"
|
|
bitfld.long 0x00 16. "B_464,blocks464" "0,1"
|
|
bitfld.long 0x00 15. "B_463,blocks463" "0,1"
|
|
bitfld.long 0x00 14. "B_462,blocks462" "0,1"
|
|
bitfld.long 0x00 13. "B_461,blocks461" "0,1"
|
|
bitfld.long 0x00 12. "B_460,blocks460" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_459,blocks459" "0,1"
|
|
bitfld.long 0x00 10. "B_458,blocks458" "0,1"
|
|
bitfld.long 0x00 9. "B_457,blocks457" "0,1"
|
|
bitfld.long 0x00 8. "B_456,blocks456" "0,1"
|
|
bitfld.long 0x00 7. "B_455,blocks455" "0,1"
|
|
bitfld.long 0x00 6. "B_454,blocks454" "0,1"
|
|
bitfld.long 0x00 5. "B_453,blocks453" "0,1"
|
|
bitfld.long 0x00 4. "B_452,blocks452" "0,1"
|
|
bitfld.long 0x00 3. "B_451,blocks451" "0,1"
|
|
bitfld.long 0x00 2. "B_450,blocks450" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_449,blocks 449" "0,1"
|
|
bitfld.long 0x00 0. "B_448,blocks 448" "0,1"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "VEC15,TZBMPC3 vector register 15"
|
|
bitfld.long 0x00 31. "B_511,blocks511" "0,1"
|
|
bitfld.long 0x00 30. "B_510,blocks510" "0,1"
|
|
bitfld.long 0x00 29. "B_509,blocks509" "0,1"
|
|
bitfld.long 0x00 28. "B_508,blocks508" "0,1"
|
|
bitfld.long 0x00 27. "B_507,blocks507" "0,1"
|
|
bitfld.long 0x00 26. "B_506,blocks506" "0,1"
|
|
bitfld.long 0x00 25. "B_505,blocks505" "0,1"
|
|
bitfld.long 0x00 24. "B_504,blocks504" "0,1"
|
|
bitfld.long 0x00 23. "B_503,blocks503" "0,1"
|
|
bitfld.long 0x00 22. "B_502,blocks502" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_501,blocks501" "0,1"
|
|
bitfld.long 0x00 20. "B_500,blocks500" "0,1"
|
|
bitfld.long 0x00 19. "B_499,blocks499" "0,1"
|
|
bitfld.long 0x00 18. "B_498,blocks498" "0,1"
|
|
bitfld.long 0x00 17. "B_497,blocks497" "0,1"
|
|
bitfld.long 0x00 16. "B_496,blocks496" "0,1"
|
|
bitfld.long 0x00 15. "B_495,blocks495" "0,1"
|
|
bitfld.long 0x00 14. "B_494,blocks494" "0,1"
|
|
bitfld.long 0x00 13. "B_493,blocks493" "0,1"
|
|
bitfld.long 0x00 12. "B_492,blocks492" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_491,blocks491" "0,1"
|
|
bitfld.long 0x00 10. "B_490,blocks490" "0,1"
|
|
bitfld.long 0x00 9. "B_489,blocks489" "0,1"
|
|
bitfld.long 0x00 8. "B_488,blocks488" "0,1"
|
|
bitfld.long 0x00 7. "B_487,blocks487" "0,1"
|
|
bitfld.long 0x00 6. "B_486,blocks486" "0,1"
|
|
bitfld.long 0x00 5. "B_485,blocks485" "0,1"
|
|
bitfld.long 0x00 4. "B_484,blocks484" "0,1"
|
|
bitfld.long 0x00 3. "B_483,blocks483" "0,1"
|
|
bitfld.long 0x00 2. "B_482,blocks482" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_481,blocks 481" "0,1"
|
|
bitfld.long 0x00 0. "B_480,blocks 480" "0,1"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "VEC16,TZBMPC3 vector register 16"
|
|
bitfld.long 0x00 31. "B_543,blocks543" "0,1"
|
|
bitfld.long 0x00 30. "B_542,blocks542" "0,1"
|
|
bitfld.long 0x00 29. "B_541,blocks541" "0,1"
|
|
bitfld.long 0x00 28. "B_540,blocks540" "0,1"
|
|
bitfld.long 0x00 27. "B_539,blocks539" "0,1"
|
|
bitfld.long 0x00 26. "B_538,blocks538" "0,1"
|
|
bitfld.long 0x00 25. "B_537,blocks537" "0,1"
|
|
bitfld.long 0x00 24. "B_536,blocks536" "0,1"
|
|
bitfld.long 0x00 23. "B_535,blocks535" "0,1"
|
|
bitfld.long 0x00 22. "B_534,blocks534" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_533,blocks533" "0,1"
|
|
bitfld.long 0x00 20. "B_532,blocks532" "0,1"
|
|
bitfld.long 0x00 19. "B_531,blocks531" "0,1"
|
|
bitfld.long 0x00 18. "B_530,blocks530" "0,1"
|
|
bitfld.long 0x00 17. "B_529,blocks529" "0,1"
|
|
bitfld.long 0x00 16. "B_528,blocks528" "0,1"
|
|
bitfld.long 0x00 15. "B_527,blocks527" "0,1"
|
|
bitfld.long 0x00 14. "B_526,blocks526" "0,1"
|
|
bitfld.long 0x00 13. "B_525,blocks525" "0,1"
|
|
bitfld.long 0x00 12. "B_524,blocks524" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_523,blocks523" "0,1"
|
|
bitfld.long 0x00 10. "B_522,blocks522" "0,1"
|
|
bitfld.long 0x00 9. "B_521,blocks521" "0,1"
|
|
bitfld.long 0x00 8. "B_520,blocks520" "0,1"
|
|
bitfld.long 0x00 7. "B_519,blocks519" "0,1"
|
|
bitfld.long 0x00 6. "B_518,blocks518" "0,1"
|
|
bitfld.long 0x00 5. "B_517,blocks517" "0,1"
|
|
bitfld.long 0x00 4. "B_516,blocks516" "0,1"
|
|
bitfld.long 0x00 3. "B_515,blocks515" "0,1"
|
|
bitfld.long 0x00 2. "B_514,blocks514" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_513,blocks 513" "0,1"
|
|
bitfld.long 0x00 0. "B_512,blocks 512" "0,1"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "VEC17,TZBMPC3 vector register 17"
|
|
bitfld.long 0x00 31. "B_575,blocks575" "0,1"
|
|
bitfld.long 0x00 30. "B_574,blocks574" "0,1"
|
|
bitfld.long 0x00 29. "B_573,blocks573" "0,1"
|
|
bitfld.long 0x00 28. "B_572,blocks572" "0,1"
|
|
bitfld.long 0x00 27. "B_571,blocks571" "0,1"
|
|
bitfld.long 0x00 26. "B_570,blocks570" "0,1"
|
|
bitfld.long 0x00 25. "B_569,blocks569" "0,1"
|
|
bitfld.long 0x00 24. "B_568,blocks568" "0,1"
|
|
bitfld.long 0x00 23. "B_567,blocks567" "0,1"
|
|
bitfld.long 0x00 22. "B_566,blocks566" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_565,blocks565" "0,1"
|
|
bitfld.long 0x00 20. "B_564,blocks564" "0,1"
|
|
bitfld.long 0x00 19. "B_563,blocks563" "0,1"
|
|
bitfld.long 0x00 18. "B_562,blocks562" "0,1"
|
|
bitfld.long 0x00 17. "B_561,blocks561" "0,1"
|
|
bitfld.long 0x00 16. "B_560,blocks560" "0,1"
|
|
bitfld.long 0x00 15. "B_559,blocks559" "0,1"
|
|
bitfld.long 0x00 14. "B_558,blocks558" "0,1"
|
|
bitfld.long 0x00 13. "B_557,blocks557" "0,1"
|
|
bitfld.long 0x00 12. "B_556,blocks556" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_555,blocks555" "0,1"
|
|
bitfld.long 0x00 10. "B_554,blocks554" "0,1"
|
|
bitfld.long 0x00 9. "B_553,blocks553" "0,1"
|
|
bitfld.long 0x00 8. "B_552,blocks552" "0,1"
|
|
bitfld.long 0x00 7. "B_551,blocks551" "0,1"
|
|
bitfld.long 0x00 6. "B_550,blocks550" "0,1"
|
|
bitfld.long 0x00 5. "B_549,blocks549" "0,1"
|
|
bitfld.long 0x00 4. "B_548,blocks548" "0,1"
|
|
bitfld.long 0x00 3. "B_547,blocks547" "0,1"
|
|
bitfld.long 0x00 2. "B_546,blocks546" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_545,blocks 545" "0,1"
|
|
bitfld.long 0x00 0. "B_544,blocks 544" "0,1"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "VEC18,TZBMPC3 vector register 18"
|
|
bitfld.long 0x00 31. "B_607,blocks607" "0,1"
|
|
bitfld.long 0x00 30. "B_606,blocks606" "0,1"
|
|
bitfld.long 0x00 29. "B_605,blocks605" "0,1"
|
|
bitfld.long 0x00 28. "B_604,blocks604" "0,1"
|
|
bitfld.long 0x00 27. "B_603,blocks603" "0,1"
|
|
bitfld.long 0x00 26. "B_602,blocks602" "0,1"
|
|
bitfld.long 0x00 25. "B_601,blocks601" "0,1"
|
|
bitfld.long 0x00 24. "B_600,blocks600" "0,1"
|
|
bitfld.long 0x00 23. "B_599,blocks599" "0,1"
|
|
bitfld.long 0x00 22. "B_598,blocks598" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_597,blocks597" "0,1"
|
|
bitfld.long 0x00 20. "B_596,blocks596" "0,1"
|
|
bitfld.long 0x00 19. "B_595,blocks595" "0,1"
|
|
bitfld.long 0x00 18. "B_594,blocks594" "0,1"
|
|
bitfld.long 0x00 17. "B_593,blocks593" "0,1"
|
|
bitfld.long 0x00 16. "B_592,blocks592" "0,1"
|
|
bitfld.long 0x00 15. "B_591,blocks591" "0,1"
|
|
bitfld.long 0x00 14. "B_590,blocks590" "0,1"
|
|
bitfld.long 0x00 13. "B_589,blocks589" "0,1"
|
|
bitfld.long 0x00 12. "B_588,blocks588" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_587,blocks587" "0,1"
|
|
bitfld.long 0x00 10. "B_586,blocks586" "0,1"
|
|
bitfld.long 0x00 9. "B_585,blocks585" "0,1"
|
|
bitfld.long 0x00 8. "B_584,blocks584" "0,1"
|
|
bitfld.long 0x00 7. "B_583,blocks583" "0,1"
|
|
bitfld.long 0x00 6. "B_582,blocks582" "0,1"
|
|
bitfld.long 0x00 5. "B_581,blocks581" "0,1"
|
|
bitfld.long 0x00 4. "B_580,blocks580" "0,1"
|
|
bitfld.long 0x00 3. "B_579,blocks579" "0,1"
|
|
bitfld.long 0x00 2. "B_578,blocks578" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_577,blocks 577" "0,1"
|
|
bitfld.long 0x00 0. "B_576,blocks 576" "0,1"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "VEC19,TZBMPC3 vector register 19"
|
|
bitfld.long 0x00 31. "B_639,blocks639" "0,1"
|
|
bitfld.long 0x00 30. "B_638,blocks638" "0,1"
|
|
bitfld.long 0x00 29. "B_637,blocks637" "0,1"
|
|
bitfld.long 0x00 28. "B_636,blocks636" "0,1"
|
|
bitfld.long 0x00 27. "B_635,blocks635" "0,1"
|
|
bitfld.long 0x00 26. "B_634,blocks634" "0,1"
|
|
bitfld.long 0x00 25. "B_633,blocks633" "0,1"
|
|
bitfld.long 0x00 24. "B_632,blocks632" "0,1"
|
|
bitfld.long 0x00 23. "B_631,blocks631" "0,1"
|
|
bitfld.long 0x00 22. "B_630,blocks630" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_629,blocks629" "0,1"
|
|
bitfld.long 0x00 20. "B_628,blocks628" "0,1"
|
|
bitfld.long 0x00 19. "B_627,blocks627" "0,1"
|
|
bitfld.long 0x00 18. "B_626,blocks626" "0,1"
|
|
bitfld.long 0x00 17. "B_625,blocks625" "0,1"
|
|
bitfld.long 0x00 16. "B_624,blocks624" "0,1"
|
|
bitfld.long 0x00 15. "B_623,blocks623" "0,1"
|
|
bitfld.long 0x00 14. "B_622,blocks622" "0,1"
|
|
bitfld.long 0x00 13. "B_621,blocks621" "0,1"
|
|
bitfld.long 0x00 12. "B_620,blocks620" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_619,blocks619" "0,1"
|
|
bitfld.long 0x00 10. "B_618,blocks618" "0,1"
|
|
bitfld.long 0x00 9. "B_617,blocks617" "0,1"
|
|
bitfld.long 0x00 8. "B_616,blocks616" "0,1"
|
|
bitfld.long 0x00 7. "B_615,blocks615" "0,1"
|
|
bitfld.long 0x00 6. "B_614,blocks614" "0,1"
|
|
bitfld.long 0x00 5. "B_613,blocks613" "0,1"
|
|
bitfld.long 0x00 4. "B_612,blocks612" "0,1"
|
|
bitfld.long 0x00 3. "B_611,blocks611" "0,1"
|
|
bitfld.long 0x00 2. "B_610,blocks610" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_609,blocks 609" "0,1"
|
|
bitfld.long 0x00 0. "B_608,blocks 608" "0,1"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "VEC20,TZBMPC3 vector register 20"
|
|
bitfld.long 0x00 31. "B_671,blocks671" "0,1"
|
|
bitfld.long 0x00 30. "B_670,blocks670" "0,1"
|
|
bitfld.long 0x00 29. "B_669,blocks669" "0,1"
|
|
bitfld.long 0x00 28. "B_668,blocks668" "0,1"
|
|
bitfld.long 0x00 27. "B_667,blocks667" "0,1"
|
|
bitfld.long 0x00 26. "B_666,blocks666" "0,1"
|
|
bitfld.long 0x00 25. "B_665,blocks665" "0,1"
|
|
bitfld.long 0x00 24. "B_664,blocks664" "0,1"
|
|
bitfld.long 0x00 23. "B_663,blocks663" "0,1"
|
|
bitfld.long 0x00 22. "B_662,blocks662" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_661,blocks661" "0,1"
|
|
bitfld.long 0x00 20. "B_660,blocks660" "0,1"
|
|
bitfld.long 0x00 19. "B_659,blocks659" "0,1"
|
|
bitfld.long 0x00 18. "B_658,blocks658" "0,1"
|
|
bitfld.long 0x00 17. "B_657,blocks657" "0,1"
|
|
bitfld.long 0x00 16. "B_656,blocks656" "0,1"
|
|
bitfld.long 0x00 15. "B_655,blocks655" "0,1"
|
|
bitfld.long 0x00 14. "B_654,blocks654" "0,1"
|
|
bitfld.long 0x00 13. "B_653,blocks653" "0,1"
|
|
bitfld.long 0x00 12. "B_652,blocks652" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_651,blocks651" "0,1"
|
|
bitfld.long 0x00 10. "B_650,blocks650" "0,1"
|
|
bitfld.long 0x00 9. "B_649,blocks649" "0,1"
|
|
bitfld.long 0x00 8. "B_648,blocks648" "0,1"
|
|
bitfld.long 0x00 7. "B_647,blocks647" "0,1"
|
|
bitfld.long 0x00 6. "B_646,blocks646" "0,1"
|
|
bitfld.long 0x00 5. "B_645,blocks645" "0,1"
|
|
bitfld.long 0x00 4. "B_644,blocks644" "0,1"
|
|
bitfld.long 0x00 3. "B_643,blocks643" "0,1"
|
|
bitfld.long 0x00 2. "B_642,blocks642" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_641,blocks 641" "0,1"
|
|
bitfld.long 0x00 0. "B_640,blocks 640" "0,1"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "VEC21,TZBMPC3 vector register 21"
|
|
bitfld.long 0x00 31. "B_703,blocks703" "0,1"
|
|
bitfld.long 0x00 30. "B_702,blocks702" "0,1"
|
|
bitfld.long 0x00 29. "B_701,blocks701" "0,1"
|
|
bitfld.long 0x00 28. "B_700,blocks700" "0,1"
|
|
bitfld.long 0x00 27. "B_699,blocks699" "0,1"
|
|
bitfld.long 0x00 26. "B_698,blocks698" "0,1"
|
|
bitfld.long 0x00 25. "B_697,blocks697" "0,1"
|
|
bitfld.long 0x00 24. "B_696,blocks696" "0,1"
|
|
bitfld.long 0x00 23. "B_695,blocks695" "0,1"
|
|
bitfld.long 0x00 22. "B_694,blocks694" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_693,blocks693" "0,1"
|
|
bitfld.long 0x00 20. "B_692,blocks692" "0,1"
|
|
bitfld.long 0x00 19. "B_691,blocks691" "0,1"
|
|
bitfld.long 0x00 18. "B_690,blocks690" "0,1"
|
|
bitfld.long 0x00 17. "B_689,blocks689" "0,1"
|
|
bitfld.long 0x00 16. "B_688,blocks688" "0,1"
|
|
bitfld.long 0x00 15. "B_687,blocks687" "0,1"
|
|
bitfld.long 0x00 14. "B_686,blocks686" "0,1"
|
|
bitfld.long 0x00 13. "B_685,blocks685" "0,1"
|
|
bitfld.long 0x00 12. "B_684,blocks684" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_683,blocks683" "0,1"
|
|
bitfld.long 0x00 10. "B_682,blocks682" "0,1"
|
|
bitfld.long 0x00 9. "B_681,blocks681" "0,1"
|
|
bitfld.long 0x00 8. "B_680,blocks680" "0,1"
|
|
bitfld.long 0x00 7. "B_679,blocks679" "0,1"
|
|
bitfld.long 0x00 6. "B_678,blocks678" "0,1"
|
|
bitfld.long 0x00 5. "B_677,blocks677" "0,1"
|
|
bitfld.long 0x00 4. "B_676,blocks676" "0,1"
|
|
bitfld.long 0x00 3. "B_675,blocks675" "0,1"
|
|
bitfld.long 0x00 2. "B_674,blocks674" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_673,blocks 673" "0,1"
|
|
bitfld.long 0x00 0. "B_672,blocks 672" "0,1"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "VEC22,TZBMPC3 vector register 22"
|
|
bitfld.long 0x00 31. "B_735,blocks735" "0,1"
|
|
bitfld.long 0x00 30. "B_734,blocks734" "0,1"
|
|
bitfld.long 0x00 29. "B_733,blocks733" "0,1"
|
|
bitfld.long 0x00 28. "B_732,blocks732" "0,1"
|
|
bitfld.long 0x00 27. "B_731,blocks731" "0,1"
|
|
bitfld.long 0x00 26. "B_730,blocks730" "0,1"
|
|
bitfld.long 0x00 25. "B_729,blocks729" "0,1"
|
|
bitfld.long 0x00 24. "B_728,blocks728" "0,1"
|
|
bitfld.long 0x00 23. "B_727,blocks727" "0,1"
|
|
bitfld.long 0x00 22. "B_726,blocks726" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_725,blocks725" "0,1"
|
|
bitfld.long 0x00 20. "B_724,blocks724" "0,1"
|
|
bitfld.long 0x00 19. "B_723,blocks723" "0,1"
|
|
bitfld.long 0x00 18. "B_722,blocks722" "0,1"
|
|
bitfld.long 0x00 17. "B_721,blocks721" "0,1"
|
|
bitfld.long 0x00 16. "B_720,blocks720" "0,1"
|
|
bitfld.long 0x00 15. "B_719,blocks719" "0,1"
|
|
bitfld.long 0x00 14. "B_718,blocks718" "0,1"
|
|
bitfld.long 0x00 13. "B_717,blocks717" "0,1"
|
|
bitfld.long 0x00 12. "B_716,blocks716" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_715,blocks715" "0,1"
|
|
bitfld.long 0x00 10. "B_714,blocks714" "0,1"
|
|
bitfld.long 0x00 9. "B_713,blocks713" "0,1"
|
|
bitfld.long 0x00 8. "B_712,blocks712" "0,1"
|
|
bitfld.long 0x00 7. "B_711,blocks711" "0,1"
|
|
bitfld.long 0x00 6. "B_710,blocks710" "0,1"
|
|
bitfld.long 0x00 5. "B_709,blocks709" "0,1"
|
|
bitfld.long 0x00 4. "B_708,blocks708" "0,1"
|
|
bitfld.long 0x00 3. "B_707,blocks707" "0,1"
|
|
bitfld.long 0x00 2. "B_706,blocks706" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_705,blocks 705" "0,1"
|
|
bitfld.long 0x00 0. "B_704,blocks 704" "0,1"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "VEC23,TZBMPC3 vector register 23"
|
|
bitfld.long 0x00 31. "B_767,blocks767" "0,1"
|
|
bitfld.long 0x00 30. "B_766,blocks766" "0,1"
|
|
bitfld.long 0x00 29. "B_765,blocks765" "0,1"
|
|
bitfld.long 0x00 28. "B_764,blocks764" "0,1"
|
|
bitfld.long 0x00 27. "B_763,blocks763" "0,1"
|
|
bitfld.long 0x00 26. "B_762,blocks762" "0,1"
|
|
bitfld.long 0x00 25. "B_761,blocks761" "0,1"
|
|
bitfld.long 0x00 24. "B_760,blocks760" "0,1"
|
|
bitfld.long 0x00 23. "B_759,blocks759" "0,1"
|
|
bitfld.long 0x00 22. "B_758,blocks758" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "B_757,blocks757" "0,1"
|
|
bitfld.long 0x00 20. "B_756,blocks756" "0,1"
|
|
bitfld.long 0x00 19. "B_755,blocks755" "0,1"
|
|
bitfld.long 0x00 18. "B_754,blocks754" "0,1"
|
|
bitfld.long 0x00 17. "B_753,blocks753" "0,1"
|
|
bitfld.long 0x00 16. "B_752,blocks752" "0,1"
|
|
bitfld.long 0x00 15. "B_751,blocks751" "0,1"
|
|
bitfld.long 0x00 14. "B_750,blocks750" "0,1"
|
|
bitfld.long 0x00 13. "B_749,blocks749" "0,1"
|
|
bitfld.long 0x00 12. "B_748,blocks748" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "B_747,blocks747" "0,1"
|
|
bitfld.long 0x00 10. "B_746,blocks746" "0,1"
|
|
bitfld.long 0x00 9. "B_745,blocks745" "0,1"
|
|
bitfld.long 0x00 8. "B_744,blocks744" "0,1"
|
|
bitfld.long 0x00 7. "B_743,blocks743" "0,1"
|
|
bitfld.long 0x00 6. "B_742,blocks742" "0,1"
|
|
bitfld.long 0x00 5. "B_741,blocks741" "0,1"
|
|
bitfld.long 0x00 4. "B_740,blocks740" "0,1"
|
|
bitfld.long 0x00 3. "B_739,blocks739" "0,1"
|
|
bitfld.long 0x00 2. "B_738,blocks738" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "B_737,blocks 737" "0,1"
|
|
bitfld.long 0x00 0. "B_736,blocks 736" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK0,TZBMPC1 lock register0"
|
|
bitfld.long 0x00 23. "LKUB23,lock/unlock status of secure access mode for the super-blocks 23" "0,1"
|
|
bitfld.long 0x00 22. "LKUB22,lock/unlock status of secure access mode for the super-blocks 22" "0,1"
|
|
bitfld.long 0x00 21. "LKUB21,lock/unlock status of secure access mode for the super-blocks 21" "0,1"
|
|
bitfld.long 0x00 20. "LKUB20,lock/unlock status of secure access mode for the super-blocks 20" "0,1"
|
|
bitfld.long 0x00 19. "LKUB19,lock/unlock status of secure access mode for the super-blocks 19" "0,1"
|
|
bitfld.long 0x00 18. "LKUB18,lock/unlock status of secure access mode for the super-blocks 18" "0,1"
|
|
bitfld.long 0x00 17. "LKUB17,lock/unlock status of secure access mode for the super-blocks 17" "0,1"
|
|
bitfld.long 0x00 16. "LKUB16,lock/unlock status of secure access mode for the super-blocks 16" "0,1"
|
|
bitfld.long 0x00 15. "LKUB15,lock/unlock status of secure access mode for the super-blocks 15" "0,1"
|
|
bitfld.long 0x00 14. "LKUB14,lock/unlock status of secure access mode for the super-blocks 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "LKUB13,lock/unlock status of secure access mode for the super-blocks 13" "0,1"
|
|
bitfld.long 0x00 12. "LKUB12,lock/unlock status of secure access mode for the super-blocks 12" "0,1"
|
|
bitfld.long 0x00 11. "LKUB11,lock/unlock status of secure access mode for the super-blocks 11" "0,1"
|
|
bitfld.long 0x00 10. "LKUB10,lock/unlock status of secure access mode for the super-blocks 10" "0,1"
|
|
bitfld.long 0x00 9. "LKUB9,lock/unlock status of secure access mode for the super-blocks 9" "0,1"
|
|
bitfld.long 0x00 8. "LKUB8,lock/unlock status of secure access mode for the super-blocks 8" "0,1"
|
|
bitfld.long 0x00 7. "LKUB7,lock/unlock status of secure access mode for the super-blocks 7" "0,1"
|
|
bitfld.long 0x00 6. "LKUB6,lock/unlock status of secure access mode for the super-blocks 6" "0,1"
|
|
bitfld.long 0x00 5. "LKUB5,lock/unlock status of secure access mode for the super-blocks 5" "0,1"
|
|
bitfld.long 0x00 4. "LKUB4,lock/unlock status of secure access mode for the super-blocks 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "LKUB3,lock/unlock status of secure access mode for the super-blocks 3" "0,1"
|
|
bitfld.long 0x00 2. "LKUB2,lock/unlock status of secure access mode for the super-blocks 2" "0,1"
|
|
bitfld.long 0x00 1. "LKUB1,lock/unlock status of secure access mode for the super-blocks 1" "0,1"
|
|
bitfld.long 0x00 0. "LKUB0,lock/unlock status of secure access mode for the super-blocks 0" "0,1"
|
|
tree.end
|
|
tree "TZIAC"
|
|
base ad:0x400A0400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INTEN0,TZIAC interrupt enable register 0"
|
|
bitfld.long 0x00 31. "SPI0IE,SPI0 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0IE,TIMER0 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSIE,USBFS illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1IE,I2C1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0IE,I2C0 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2IE,USART2 illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "USART1IE,USART1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 8. "SPI1IE,SPI1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGIE,FWDG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGIE,WWDG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5IE,TIMER5 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4IE,TIMER4 illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TIMER3IE,TIMER3 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2IE,TIMER2 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1IE,TIMER1 illegal access interrupt enable bit" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTEN1,TZIAC interrupt enable register 1"
|
|
bitfld.long 0x00 28. "EXTIIE,EXTI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIE,FLASH REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIE,FLASH illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIE,RCU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IE,DMA1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IE,DMA0 illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSCFGIE,SYSCFG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIE,PWR illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIE,RTC illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIE,SDIO illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIE,PKCAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 14. "RNGIE,RNG illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIE,HAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIE,CAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIE,ADC illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEIE,ICACHE_REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIE,TSI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCIE,CRC illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER16IE,TIMER16 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IE,TIMER15 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IE,USART0 illegal access interrupt enable bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTEN1,TZIAC interrupt enable register 1"
|
|
bitfld.long 0x00 28. "EXTIIE,EXTI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIE,FLASH REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIE,FLASH illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIE,RCU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IE,DMA1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IE,DMA0 illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSCFGIE,SYSCFG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIE,PWR illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIE,RTC illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIE,SDIO illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIE,PKCAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 14. "RNGIE,RNG illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIE,HAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIE,CAU illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIE,ADC illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEIE,ICACHE_REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIE,TSI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCIE,CRC illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "HPDFIE,HPDF illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16IE,TIMER16 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IE,TIMER15 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IE,USART0 illegal access interrupt enable bit" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTEN2,TZIAC interrupt enable register 2"
|
|
bitfld.long 0x00 31. "WIAN11NIE,WIAN11N illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 30. "DCMIIE,DCMI illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 29. "I2SADDIE,I2SADD illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFIE,WIFI RF illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGIE,QSPI FLASHREG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGIE,SQPI PSRAMREG illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "QSPI_FLASHIE,QSPI FLASH illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 24. "SQPI_PSRAMIE,SQPI PSRAM illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSEIE,EFUSE illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 11. "TZBMPC3_REGIE,TZBMPC3 REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 10. "SRAM3IE,SRAM3 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 9. "TZBMPC2_REGIE,TZBMPC2 REG illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SRAM2IE,SRAM2 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 7. "TZBMPC1_REGIE,TZBMPC1 REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1IE,SRAM1 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 5. "TZBMPC0_REGIE,TZBMPC0 REG illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 4. "SRAM0IE,SRAM0 illegal access interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 1. "TZIACIE,TZIAC illegal access interrupt enable bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TZSPCIE,TZSPC illegal access interrupt enable bit" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "STAT0,TZIAC status register 0"
|
|
bitfld.long 0x00 31. "SPI0IAF,SPI0 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0IAF,TIMER0 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSIAF,USBFS illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1IAF,I2C1 illegal access flag bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0IAF,I2C0 illegal access flag bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2IAF,USART2 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "USART1IAF,USART1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 8. "SPI1IAF,SPI1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGIAF,FWDG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGIAF,WWDG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5IAF,TIMER5 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4IAF,TIMER4 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TIMER3IAF,TIMER3 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2IAF,TIMER2 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1IAF,TIMER1 illegal access event flag bit" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "STAT1,TZIAC status register 1"
|
|
bitfld.long 0x00 28. "EXTIIAF,EXTI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIAF,FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIAF,FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIAF,RCU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IAF,DMA1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IAF,DMA0 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSCCFGIAF,SYSCFG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIAF,PMU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIAF,RTC illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIAF,SDIO illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIAF,PKCAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGIAF,TRNG illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIAF,HAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIAF,CAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIAF,ADC illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHHEIAF,ICACHE illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIAF,TSI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16IAF,TIMER16 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TIMER15IAF,TIMER15 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IAF,USART0 illegal access event flag bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "STAT1,TZIAC status register 1"
|
|
bitfld.long 0x00 28. "EXTIIAF,EXTI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIAF,FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIAF,FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIAF,RCU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IAF,DMA1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IAF,DMA0 illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSCCFGIAF,SYSCFG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIAF,PMU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIAF,RTC illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIAF,SDIO illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIAF,PKCAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGIAF,TRNG illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIAF,HAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIAF,CAU illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIAF,ADC illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHHEIAF,ICACHE illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIAF,TSI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 7. "HPDFIAF,HPDF illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER16IAF,TIMER16 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IAF,TIMER15 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IAF,USART0 illegal access event flag bit" "0,1"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "STAT2,TZIAC status register 2"
|
|
bitfld.long 0x00 31. "WIFIIAF,WIFI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 30. "DCMIIAF,DCMI illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 29. "I2SADDIAF,I2SADD illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFIAF,EIFI RF illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGIAF,QSPI FLASHREG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGIAF,SQSPI PSRAMREG illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "QSPI_FLASHIAF,QSPI FLASH illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 24. "SQPI_PSRAMIAF,SQPI PSRAM illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSEIAF,EFUSE illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 11. "TZBMPC3_REGIAF,TZBMPC3 REG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 10. "SRAM3IAF,SRAM3 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 9. "TZBMPC2_REGIAF,TZBMPC2 REG illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SRAM2IAF,SRAM2 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 7. "TZBMPC1_REGIAF,TZBMPC2 REG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1IAF,SRAM1 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 5. "TZBMPC0_REGIAF,TZBMPC1 REG illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 4. "SRAM0IAF,SRAM0 illegal access event flag bit" "0,1"
|
|
bitfld.long 0x00 1. "TZIACIAF,TZIAC illegal access event flag bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TZSPCIAF,TZSPC illegal access event flag bit" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "STATC0,TZIAC flag clear register 0"
|
|
bitfld.long 0x00 31. "SPI0IAFC,SPI0 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0IAFC,TIMER0 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSIAFC,USBFS illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1IAFC,I2C1 illegal access flag clear bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0IAFC,I2C0 illegal access flag clear bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2IAFC,USART2 illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "USART1IAFC,USART1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 8. "SPI1IAFC,SPI1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGIAFC,FWDG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGIAFC,WWDG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5IAFC,TIMER5 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4IAFC,TIMER4 illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TIMER3IAFC,TIMER3 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2IAFC,TIMER2 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1IAFC,TIMER1 illegal access event flag clear bit" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "STATC1,TZIAC flag clear register 1"
|
|
bitfld.long 0x00 28. "EXTIIAFC,EXTI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIAFC,FMC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIAFC,FLASH illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIAFC,RCU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IAFC,DMA1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IAFC,DMA0 illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSC_CFGIAFC,SYS CFG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIAFC,PMU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIAFC,RTC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIAFC,SDIO illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIAFC,PKCAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGIAFC,TRNG illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIAFC,HAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIAFC,CAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIAFC,ADC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEIAFC,ICACHE illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIAFC,TSI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCIAFC,CRC illegal access flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER16IAFC,TIMER16 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IAFC,TIMER15 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IAFC,USART0 illegal access event flag clear bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "STATC1,TZIAC flag clear register 1"
|
|
bitfld.long 0x00 28. "EXTIIAFC,EXTI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 27. "FMCIAFC,FMC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 26. "FLASHIAFC,FLASH illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 25. "RCUIAFC,RCU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 23. "DMA1IAFC,DMA1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 22. "DMA0IAFC,DMA0 illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SYSC_CFGIAFC,SYS CFG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 20. "PMUIAFC,PMU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 19. "RTCIAFC,RTC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 16. "SDIOIAFC,SDIO illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUIAFC,PKCAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGIAFC,TRNG illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HAUIAFC,HAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUIAFC,CAU illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCIAFC,ADC illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEIAFC,ICACHE illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 9. "TSIIAFC,TSI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCIAFC,CRC illegal access flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "HPDFIAFC,HPDF illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16IAFC,TIMER16 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15IAFC,TIMER15 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0IAFC,USART0 illegal access event flag clear bit" "0,1"
|
|
endif
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "STATC2,TZIAC flag clear register 2"
|
|
bitfld.long 0x00 31. "WIFINIAFC,WIFI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 30. "DCMIIAFC,DCMI illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 29. "I2SADDIAFC,I2SADD illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFIAFC,EIFI RF illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGIAFC,QSPI FLASHREG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGIAFC,SQSPI PSRAMREG illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "QSPI_FLASHIAFC,QSPI FLASH illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 24. "SQPI_PSRAMIAFC,SQPI PSRAM illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSEIAFC,EFUSE illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 11. "TZBMPC3_REGIAFC,TZBMPC3 REG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 10. "SRAM3IAFC,SRAM3 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 9. "TZBMPC2_REGIAFC,TZBMPC2 REG illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SRAM2IAFC,SRAM2 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 7. "TZBMPC1_REGIAFC,TZBMPC2 REG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 6. "SRAM1IAFC,SRAM1 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 5. "TZBMPC0_REGIAFC,TZBMPC1 REG illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 4. "SRAM0IAFC,SRAM0 illegal access event flag clear bit" "0,1"
|
|
bitfld.long 0x00 1. "TZIACIAF,TZIAC illegal access event flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TZSPCIAFC,TZSPC illegal access event flag clear bit" "0,1"
|
|
tree.end
|
|
tree "TZSPC"
|
|
base ad:0x400A0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,TZSPC control register"
|
|
bitfld.long 0x00 0. "LK,TZSPC items lock configuration bit" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SAM_CFG0,TZSPC secure access mode configuration register 0"
|
|
bitfld.long 0x00 31. "SPI0SAM,SPI0 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0SAM,TIMER0 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSSAM,USBFS secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1SAM,I2C1 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0SAM,I2C0 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2SAM,USART2 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "USART1SAM,USART1 secure access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SPI1SAM,SPI1 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGSAM,FWDG secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGSAM,WWDG secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5SAM,TIMER5 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4SAM,TIMER4 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3SAM,TIMER3 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2SAM,TIMER2 secure access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TIMER1SAM,TIMER1 secure access mode configuration bit" "0,1"
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SAM_CFG1,TZSPC secure access mode configuration register 1"
|
|
bitfld.long 0x00 16. "SDIOSAM,SDIO secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUSAM,PKCAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGSAM,TRNG secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 13. "HAUSAM,HAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUSAM,CAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCSAM,ADC secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHESAM,ICACHE secure access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TSISAM,TSI secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCSAM,CRC secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16SAM,TIMER16 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15SAM,TIMER15 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0SAM,USART0 secure access mode configuration bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SAM_CFG1,TZSPC secure access mode configuration register 1"
|
|
bitfld.long 0x00 16. "SDIOSAM,SDIO secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUSAM,PKCAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGSAM,TRNG secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 13. "HAUSAM,HAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUSAM,CAU secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCSAM,ADC secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHESAM,ICACHE secure access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TSISAM,TSI secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCSAM,CRC secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 7. "HPDFSAM,HPDF secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16SAM,TIMER16 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15SAM,TIMER15 secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0SAM,USART0 secure access mode configuration bit" "0,1"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SAM_CFG2,TZSPC secure access mode configuration register 2"
|
|
bitfld.long 0x00 31. "WIFISAM,WIFI secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 30. "DCMISAM,DCMI secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 29. "I2S1ADDSAM,I2S1ADD secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFSAM,WIFI RF secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGSAM,QSPI flash register secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGSAM,SQPI PSRAM register secure access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSESAM,EFUSE register secure access mode configuration bit" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PAM_CFG0,TZSPC privilege access mode configuration register1"
|
|
bitfld.long 0x00 31. "SPI0PAM,SPI0 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 30. "TIMER0PAM,TIMER0 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "USBFSPAM,USBFS privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "I2C1PAM,I2C1 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C0PAM,I2C0 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "USART2PAM,USART2 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "USART1PAM,USART1 privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SPI1PAM,SPI1 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 7. "FWDGPAM,FWDG privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 6. "WWDGPAM,WWDG privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5PAM,TIMER5 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER4PAM,TIMER4 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 2. "TIMER3PAM,TIMER3 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2PAM,TIMER2 privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TIMER1PAM,TIMER1 privilege access mode configuration bit" "0,1"
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PAM_CFG1,TZSPC privilege access mode configuration register 1"
|
|
bitfld.long 0x00 16. "SDIOPAM,SDIO privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUPAM,PKCAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGPAM,TRNG privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 13. "HAUPAM,HAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUPAM,CAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCPAM,ADC privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEPAM,ICACHE register privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TSIPAM,TSI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCPAM,CRC privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 7. "HPDFPAM,HPDF privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16PAM,TIMER16 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15PAM,TIMER15 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0PAM,USART0 privilege access mode configuration bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PAM_CFG1,TZSPC privilege access mode configuration register 1"
|
|
bitfld.long 0x00 16. "SDIOPAM,SDIO privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 15. "PKCAUPAM,PKCAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 14. "TRNGPAM,TRNG privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 13. "HAUPAM,HAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 12. "CAUPAM,CAU privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 11. "ADCPAM,ADC privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 10. "ICACHEPAM,ICACHE register privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TSIPAM,TSI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 8. "CRCPAM,CRC privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 4. "TIMER16PAM,TIMER16 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 3. "TIMER15PAM,TIMER15 privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 1. "USART0PAM,USART0 privilege access mode configuration bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515P*")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PAM_CFG2,TZSPC privilege access mode configuration register 2"
|
|
bitfld.long 0x00 31. "WIFIPAM,WIFI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 30. "DCIPAM,DCI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 29. "I2S1ADDPAM,I2S1ADD privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFPAM,WIFI RF privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGPAM,QSPI flash register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGPAM,SQPI PSRAM register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 25. "DBGPAM,DBG register privilege access mode configuration bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "EFUSEPAM,EFUSE register privilege access mode configuration bit" "0,1"
|
|
endif
|
|
sif cpuis("GD32W515T*")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PAM_CFG2,TZSPC privilege access mode configuration register 2"
|
|
bitfld.long 0x00 31. "WIFIPAM,WIFI privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 29. "I2S1ADDPAM,I2S1ADD privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 28. "WIFI_RFPAM,WIFI RF privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 27. "QSPI_FLASHREGPAM,QSPI flash register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 26. "SQPI_PSRAMREGPAM,SQPI PSRAM register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 25. "DBGPAM,DBG register privilege access mode configuration bit" "0,1"
|
|
bitfld.long 0x00 23. "EFUSEPAM,EFUSE register privilege access mode configuration bit" "0,1"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TZMMPC0_NSM0,TZSPC external memory 0 non-secure mark register 0"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM0_LEN,Length of the first non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM0_SADD,The non-secure area (multiple of 8 Kbytes) start address of TZBPC0"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TZMMPC0_NSM1,TZSPC external memory 0 non-secure mark register 1"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM1_LEN,Length of the first non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM1_SADD,The first non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TZMPC0_NSM2,TZSPC external memory 0 non-secure mark register 2"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM2_LEN,Length of the non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM2_SADD,The non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TZMPC0_NSM3,TZSPC external memory 0 non-secure mark register 3"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM3_LEN,Length of the first non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM3_SADD,The first non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TZMMPC1_NSM0,TZSPC external memory 1 non-secure mark register 0"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM0_LEN,Length of the non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM0_SADD,The non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TZMMPC1_NSM1,TZSPC external memory 1 non-secure mark register 1"
|
|
hexmask.long.word 0x00 16.--30. 1. "NSM1_LEN,Length of the non-secure area"
|
|
hexmask.long.word 0x00 0.--13. 1. "NSM1_SADD,The non-secure area (multiple of 8 Kbytes) start address"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "DBG_CFG,TZSPC debug configuration register"
|
|
bitfld.long 0x00 3. "SPNIDEN,Secure non-invasive debug enable bit" "0,1"
|
|
bitfld.long 0x00 2. "SPIDEN,Secure invasive debug enable bit" "0,1"
|
|
bitfld.long 0x00 1. "NIDEN,Non-invasive debug enable bit" "0,1"
|
|
bitfld.long 0x00 0. "IDEN,Invasive debug enable bit" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "USART (Universal synchronous asynchronous receiver transmitter)"
|
|
tree "SEC_USART0"
|
|
base ad:0x50004800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 27. "EBIE,End of Block interrupt enable" "0,1"
|
|
bitfld.long 0x00 26. "RTIE,Receiver timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 21.--25. "DEA,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "DED,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "OVSMOD,Oversampling mode" "0,1"
|
|
bitfld.long 0x00 14. "AMIE,Character match interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "MEN,Mute mode enable" "0,1"
|
|
bitfld.long 0x00 12. "WL,Word length" "0,1"
|
|
bitfld.long 0x00 11. "WM,Receiver wakeup method" "0,1"
|
|
bitfld.long 0x00 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0x00 9. "PM,Parity selection" "0,1"
|
|
bitfld.long 0x00 8. "PERRIE,PE interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TBEIE,interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transmission complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "RBNEIE,RXNE interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "IDLEIE,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0x00 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0x00 1. "UESM,USART enable in Stop mode" "0,1"
|
|
bitfld.long 0x00 0. "UEN,USART enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "ADDR,Address of the USART terminal"
|
|
bitfld.long 0x00 23. "RTEN,Receiver timeout enable" "0,1"
|
|
bitfld.long 0x00 21.--22. "ABDM,Auto baud rate mode" "0,1,2,3"
|
|
bitfld.long 0x00 20. "ABDEN,Auto baud rate enable" "0,1"
|
|
bitfld.long 0x00 19. "MSBF,Most significant bit first" "0,1"
|
|
bitfld.long 0x00 18. "DINV,Data bit level inversion" "0,1"
|
|
bitfld.long 0x00 17. "TINV,TX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 16. "RINV,RX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 15. "STRP,Swap TX/RX pins" "0,1"
|
|
bitfld.long 0x00 14. "LMEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "STB,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x00 11. "CKEN,Clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CPL,Clock polarity" "0,1"
|
|
bitfld.long 0x00 9. "CPH,Clock phase" "0,1"
|
|
bitfld.long 0x00 8. "CLEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x00 6. "LBDIE,LIN break detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "LBLEN,LIN break detection length" "0,1"
|
|
bitfld.long 0x00 4. "ADDM,7-bit Address Detection/4-bit Address Detection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
bitfld.long 0x00 22. "WUIE,Wakeup from Stop mode interrupt enable" "0,1"
|
|
bitfld.long 0x00 20.--21. "WUM,Wakeup from Stop mode interrupt flag selection" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "SCRTNUM,Smartcard auto-retry count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "DEP,Driver enable polarity selection" "0,1"
|
|
bitfld.long 0x00 14. "DEM,Driver enable mode" "0,1"
|
|
bitfld.long 0x00 13. "DDRE,DMA Disable on Reception Error" "0,1"
|
|
bitfld.long 0x00 12. "OVRD,Overrun Disable" "0,1"
|
|
bitfld.long 0x00 11. "OSB,One sample bit method enable" "0,1"
|
|
bitfld.long 0x00 10. "CTSIE,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x00 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x00 7. "DENT,DMA enable transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "DENR,DMA enable receiver" "0,1"
|
|
bitfld.long 0x00 5. "SCEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x00 4. "NKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x00 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x00 2. "IRLP,IrDA low-power" "0,1"
|
|
bitfld.long 0x00 1. "IREN,IrDA mode enable" "0,1"
|
|
bitfld.long 0x00 0. "ERRIE,Error interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BAUD,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. "BRR_INT,integer of baud-rate divider"
|
|
bitfld.long 0x00 0.--3. "BRR_FRA,integer of baud-rate divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GP,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "GUAT,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PSC,Prescaler value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RT,Receiver timeout register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "BL,Block Length"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "RT,Receiver timeout value"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD,Command register"
|
|
bitfld.long 0x00 4. "TXFCMD,Transmit data flush request" "0,1"
|
|
bitfld.long 0x00 3. "RXFCMD,Receive data flush request" "0,1"
|
|
bitfld.long 0x00 2. "MMCMD,Mute mode request" "0,1"
|
|
bitfld.long 0x00 1. "SBKCMD,Send break request" "0,1"
|
|
bitfld.long 0x00 0. "ABDCMD,Auto baud rate request" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STAT,Interrupt & status register"
|
|
bitfld.long 0x00 22. "REA,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 21. "TEA,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 20. "WUF,Wakeup from Stop mode flag" "0,1"
|
|
bitfld.long 0x00 19. "RWU,Receiver wakeup from Mute mode" "0,1"
|
|
bitfld.long 0x00 18. "SBF,Send break flag" "0,1"
|
|
bitfld.long 0x00 17. "AMF,character match flag" "0,1"
|
|
bitfld.long 0x00 16. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 15. "ABDF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x00 14. "ABDE,Auto baud rate error" "0,1"
|
|
bitfld.long 0x00 12. "EBF,End of block flag" "0,1"
|
|
bitfld.long 0x00 11. "RTF,Receiver timeout" "0,1"
|
|
bitfld.long 0x00 10. "CTS,CTS flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CTSF,CTS interrupt flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDF,LIN break detection flag" "0,1"
|
|
bitfld.long 0x00 7. "TBE,Transmit data register empty" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transmission complete" "0,1"
|
|
bitfld.long 0x00 5. "RBNE,Read data register not empty" "0,1"
|
|
bitfld.long 0x00 4. "IDLEF,Idle line detected" "0,1"
|
|
bitfld.long 0x00 3. "ORERR,Overrun error" "0,1"
|
|
bitfld.long 0x00 2. "NERR,Noise detected flag" "0,1"
|
|
bitfld.long 0x00 1. "FERR,Framing error" "0,1"
|
|
bitfld.long 0x00 0. "PERR,Parity error" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. "WUC,Wakeup from Stop mode clear flag" "0,1"
|
|
bitfld.long 0x00 17. "AMC,Character match clear flag" "0,1"
|
|
bitfld.long 0x00 12. "EBC,End of timeout clear flag" "0,1"
|
|
bitfld.long 0x00 11. "RTC,Receiver timeout clear flag" "0,1"
|
|
bitfld.long 0x00 9. "CTSC,CTS clear flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDC,LIN break detection clear flag" "0,1"
|
|
bitfld.long 0x00 6. "TCC,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x00 4. "IDLEC,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x00 3. "OREC,Overrun error clear flag" "0,1"
|
|
bitfld.long 0x00 2. "NEC,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x00 1. "FEC,Frame error clear flag" "0,1"
|
|
bitfld.long 0x00 0. "PEC,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDATA,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "TDATA,Transmit data value"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CHC,coherence control register"
|
|
bitfld.long 0x00 8. "EPERR,Early parity error flag" "0,1"
|
|
bitfld.long 0x00 0. "HCM,Hardware flow control coherence mode" "0,1"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "RFCS,USART receive FIFO control and status register"
|
|
bitfld.long 0x00 15. "RFFINT,Receive FIFO full interrupt flag" "0,1"
|
|
rbitfld.long 0x00 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 11. "RFF,Receive FIFO full flag" "0,1"
|
|
rbitfld.long 0x00 10. "RFE,Receive FIFO empty flag" "0,1"
|
|
bitfld.long 0x00 9. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "RFEN,Receive FIFO enable" "0,1"
|
|
bitfld.long 0x00 0. "ELNACK,Early NKEN when smartcard mode is selected" "0,1"
|
|
tree.end
|
|
tree "SEC_USART1"
|
|
base ad:0x50004400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 21.--25. "DEA,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "DED,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "OVSMOD,Oversampling mode" "0,1"
|
|
bitfld.long 0x00 14. "AMIE,Character match interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "MEN,Mute mode enable" "0,1"
|
|
bitfld.long 0x00 12. "WL,Word length" "0,1"
|
|
bitfld.long 0x00 11. "WM,Receiver wakeup method" "0,1"
|
|
bitfld.long 0x00 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0x00 9. "PM,Parity selection" "0,1"
|
|
bitfld.long 0x00 8. "PERRIE,PE interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "TBEIE,interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transmission complete interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RBNEIE,RXNE interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "IDLEIE,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0x00 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0x00 0. "UEN,USART enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "ADDR,Address of the USART terminal"
|
|
bitfld.long 0x00 19. "MSBF,Most significant bit first" "0,1"
|
|
bitfld.long 0x00 18. "DINV,Data bit level inversion" "0,1"
|
|
bitfld.long 0x00 17. "TINV,TX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 16. "RINV,RX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 15. "STRP,Swap TX/RX pins" "0,1"
|
|
bitfld.long 0x00 12.--13. "STB,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x00 10. "CPL,Clock polarity" "0,1"
|
|
bitfld.long 0x00 9. "CPH,Clock phase" "0,1"
|
|
bitfld.long 0x00 8. "CLEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x00 4. "ADDM,7-bit Address Detection/4-bit Address Detection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
bitfld.long 0x00 15. "DEP,Driver enable polarity selection" "0,1"
|
|
bitfld.long 0x00 14. "DEM,Driver enable mode" "0,1"
|
|
bitfld.long 0x00 13. "DDRE,DMA Disable on Reception Error" "0,1"
|
|
bitfld.long 0x00 12. "OVRD,Overrun Disable" "0,1"
|
|
bitfld.long 0x00 11. "OSB,One sample bit method enable" "0,1"
|
|
bitfld.long 0x00 10. "CTSIE,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x00 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x00 7. "DENT,DMA enable transmitter" "0,1"
|
|
bitfld.long 0x00 6. "DENR,DMA enable receiver" "0,1"
|
|
bitfld.long 0x00 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x00 2. "IRLP,IrDA low-power" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ERRIE,Error interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BAUD,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. "BRR_INT,integer of baud-rate divider"
|
|
bitfld.long 0x00 0.--3. "BRR_FRA,integer of baud-rate divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD,Command register"
|
|
bitfld.long 0x00 3. "RXFCMD,Receive data flush request" "0,1"
|
|
bitfld.long 0x00 2. "MMCMD,Mute mode request" "0,1"
|
|
bitfld.long 0x00 1. "SBKCMD,Send break request" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STAT,Interrupt & status register"
|
|
bitfld.long 0x00 22. "REA,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 21. "TEA,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 19. "RWU,Receiver wakeup from Mute mode" "0,1"
|
|
bitfld.long 0x00 18. "SBF,Send break flag" "0,1"
|
|
bitfld.long 0x00 17. "AMF,character match flag" "0,1"
|
|
bitfld.long 0x00 16. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 10. "CTS,CTS flag" "0,1"
|
|
bitfld.long 0x00 9. "CTSF,CTS interrupt flag" "0,1"
|
|
bitfld.long 0x00 7. "TBE,Transmit data register empty" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transmission complete" "0,1"
|
|
bitfld.long 0x00 5. "RBNE,Read data register not empty" "0,1"
|
|
bitfld.long 0x00 4. "IDLEF,Idle line detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ORERR,Overrun error" "0,1"
|
|
bitfld.long 0x00 2. "NERR,Noise detected flag" "0,1"
|
|
bitfld.long 0x00 1. "FERR,Framing error" "0,1"
|
|
bitfld.long 0x00 0. "PERR,Parity error" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 17. "AMC,Character match clear flag" "0,1"
|
|
bitfld.long 0x00 9. "CTSC,CTS clear flag" "0,1"
|
|
bitfld.long 0x00 6. "TCC,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x00 4. "IDLEC,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x00 3. "OREC,Overrun error clear flag" "0,1"
|
|
bitfld.long 0x00 2. "NEC,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x00 1. "FEC,Frame error clear flag" "0,1"
|
|
bitfld.long 0x00 0. "PEC,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDATA,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "TDATA,Transmit data value"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CHC,coherence control register"
|
|
bitfld.long 0x00 8. "EPERR,Early parity error flag" "0,1"
|
|
bitfld.long 0x00 0. "HCM,Hardware flow control coherence mode" "0,1"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "RFCS,USART receive FIFO control and status register"
|
|
bitfld.long 0x00 15. "RFFINT,Receive FIFO full interrupt flag" "0,1"
|
|
rbitfld.long 0x00 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 11. "RFF,Receive FIFO full flag" "0,1"
|
|
rbitfld.long 0x00 10. "RFE,Receive FIFO empty flag" "0,1"
|
|
bitfld.long 0x00 9. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "RFEN,Receive FIFO enable" "0,1"
|
|
tree.end
|
|
tree "SEC_USART2"
|
|
base ad:0x50011000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 27. "EBIE,End of Block interrupt enable" "0,1"
|
|
bitfld.long 0x00 26. "RTIE,Receiver timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 21.--25. "DEA,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "DED,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "OVSMOD,Oversampling mode" "0,1"
|
|
bitfld.long 0x00 14. "AMIE,Character match interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "MEN,Mute mode enable" "0,1"
|
|
bitfld.long 0x00 12. "WL,Word length" "0,1"
|
|
bitfld.long 0x00 11. "WM,Receiver wakeup method" "0,1"
|
|
bitfld.long 0x00 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0x00 9. "PM,Parity selection" "0,1"
|
|
bitfld.long 0x00 8. "PERRIE,PE interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TBEIE,interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transmission complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "RBNEIE,RXNE interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "IDLEIE,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0x00 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0x00 1. "UESM,USART enable in Stop mode" "0,1"
|
|
bitfld.long 0x00 0. "UEN,USART enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "ADDR,Address of the USART terminal"
|
|
bitfld.long 0x00 23. "RTEN,Receiver timeout enable" "0,1"
|
|
bitfld.long 0x00 21.--22. "ABDM,Auto baud rate mode" "0,1,2,3"
|
|
bitfld.long 0x00 20. "ABDEN,Auto baud rate enable" "0,1"
|
|
bitfld.long 0x00 19. "MSBF,Most significant bit first" "0,1"
|
|
bitfld.long 0x00 18. "DINV,Data bit level inversion" "0,1"
|
|
bitfld.long 0x00 17. "TINV,TX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 16. "RINV,RX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 15. "STRP,Swap TX/RX pins" "0,1"
|
|
bitfld.long 0x00 14. "LMEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "STB,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x00 11. "CKEN,Clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CPL,Clock polarity" "0,1"
|
|
bitfld.long 0x00 9. "CPH,Clock phase" "0,1"
|
|
bitfld.long 0x00 8. "CLEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x00 6. "LBDIE,LIN break detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "LBLEN,LIN break detection length" "0,1"
|
|
bitfld.long 0x00 4. "ADDM,7-bit Address Detection/4-bit Address Detection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
bitfld.long 0x00 22. "WUIE,Wakeup from Stop mode interrupt enable" "0,1"
|
|
bitfld.long 0x00 20.--21. "WUM,Wakeup from Stop mode interrupt flag selection" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "SCRTNUM,Smartcard auto-retry count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "DEP,Driver enable polarity selection" "0,1"
|
|
bitfld.long 0x00 14. "DEM,Driver enable mode" "0,1"
|
|
bitfld.long 0x00 13. "DDRE,DMA Disable on Reception Error" "0,1"
|
|
bitfld.long 0x00 12. "OVRD,Overrun Disable" "0,1"
|
|
bitfld.long 0x00 11. "OSB,One sample bit method enable" "0,1"
|
|
bitfld.long 0x00 10. "CTSIE,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x00 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x00 7. "DENT,DMA enable transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "DENR,DMA enable receiver" "0,1"
|
|
bitfld.long 0x00 5. "SCEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x00 4. "NKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x00 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x00 2. "IRLP,IrDA low-power" "0,1"
|
|
bitfld.long 0x00 1. "IREN,IrDA mode enable" "0,1"
|
|
bitfld.long 0x00 0. "ERRIE,Error interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BAUD,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. "BRR_INT,integer of baud-rate divider"
|
|
bitfld.long 0x00 0.--3. "BRR_FRA,integer of baud-rate divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GP,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "GUAT,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PSC,Prescaler value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RT,Receiver timeout register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "BL,Block Length"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "RT,Receiver timeout value"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD,Command register"
|
|
bitfld.long 0x00 4. "TXFCMD,Transmit data flush request" "0,1"
|
|
bitfld.long 0x00 3. "RXFCMD,Receive data flush request" "0,1"
|
|
bitfld.long 0x00 2. "MMCMD,Mute mode request" "0,1"
|
|
bitfld.long 0x00 1. "SBKCMD,Send break request" "0,1"
|
|
bitfld.long 0x00 0. "ABDCMD,Auto baud rate request" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STAT,Interrupt & status register"
|
|
bitfld.long 0x00 22. "REA,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 21. "TEA,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 20. "WUF,Wakeup from Stop mode flag" "0,1"
|
|
bitfld.long 0x00 19. "RWU,Receiver wakeup from Mute mode" "0,1"
|
|
bitfld.long 0x00 18. "SBF,Send break flag" "0,1"
|
|
bitfld.long 0x00 17. "AMF,character match flag" "0,1"
|
|
bitfld.long 0x00 16. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 15. "ABDF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x00 14. "ABDE,Auto baud rate error" "0,1"
|
|
bitfld.long 0x00 12. "EBF,End of block flag" "0,1"
|
|
bitfld.long 0x00 11. "RTF,Receiver timeout" "0,1"
|
|
bitfld.long 0x00 10. "CTS,CTS flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CTSF,CTS interrupt flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDF,LIN break detection flag" "0,1"
|
|
bitfld.long 0x00 7. "TBE,Transmit data register empty" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transmission complete" "0,1"
|
|
bitfld.long 0x00 5. "RBNE,Read data register not empty" "0,1"
|
|
bitfld.long 0x00 4. "IDLEF,Idle line detected" "0,1"
|
|
bitfld.long 0x00 3. "ORERR,Overrun error" "0,1"
|
|
bitfld.long 0x00 2. "NERR,Noise detected flag" "0,1"
|
|
bitfld.long 0x00 1. "FERR,Framing error" "0,1"
|
|
bitfld.long 0x00 0. "PERR,Parity error" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. "WUC,Wakeup from Stop mode clear flag" "0,1"
|
|
bitfld.long 0x00 17. "AMC,Character match clear flag" "0,1"
|
|
bitfld.long 0x00 12. "EBC,End of timeout clear flag" "0,1"
|
|
bitfld.long 0x00 11. "RTC,Receiver timeout clear flag" "0,1"
|
|
bitfld.long 0x00 9. "CTSC,CTS clear flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDC,LIN break detection clear flag" "0,1"
|
|
bitfld.long 0x00 6. "TCC,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x00 4. "IDLEC,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x00 3. "OREC,Overrun error clear flag" "0,1"
|
|
bitfld.long 0x00 2. "NEC,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x00 1. "FEC,Frame error clear flag" "0,1"
|
|
bitfld.long 0x00 0. "PEC,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDATA,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "TDATA,Transmit data value"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CHC,coherence control register"
|
|
bitfld.long 0x00 8. "EPERR,Early parity error flag" "0,1"
|
|
bitfld.long 0x00 0. "HCM,Hardware flow control coherence mode" "0,1"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "RFCS,USART receive FIFO control and status register"
|
|
bitfld.long 0x00 15. "RFFINT,Receive FIFO full interrupt flag" "0,1"
|
|
rbitfld.long 0x00 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 11. "RFF,Receive FIFO full flag" "0,1"
|
|
rbitfld.long 0x00 10. "RFE,Receive FIFO empty flag" "0,1"
|
|
bitfld.long 0x00 9. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "RFEN,Receive FIFO enable" "0,1"
|
|
bitfld.long 0x00 0. "ELNACK,Early NKEN when smartcard mode is selected" "0,1"
|
|
tree.end
|
|
tree "USART0"
|
|
base ad:0x40004800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 27. "EBIE,End of Block interrupt enable" "0,1"
|
|
bitfld.long 0x00 26. "RTIE,Receiver timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 21.--25. "DEA,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "DED,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "OVSMOD,Oversampling mode" "0,1"
|
|
bitfld.long 0x00 14. "AMIE,Character match interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "MEN,Mute mode enable" "0,1"
|
|
bitfld.long 0x00 12. "WL,Word length" "0,1"
|
|
bitfld.long 0x00 11. "WM,Receiver wakeup method" "0,1"
|
|
bitfld.long 0x00 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0x00 9. "PM,Parity selection" "0,1"
|
|
bitfld.long 0x00 8. "PERRIE,PE interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TBEIE,interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transmission complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "RBNEIE,RXNE interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "IDLEIE,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0x00 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0x00 1. "UESM,USART enable in Stop mode" "0,1"
|
|
bitfld.long 0x00 0. "UEN,USART enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "ADDR,Address of the USART terminal"
|
|
bitfld.long 0x00 23. "RTEN,Receiver timeout enable" "0,1"
|
|
bitfld.long 0x00 21.--22. "ABDM,Auto baud rate mode" "0,1,2,3"
|
|
bitfld.long 0x00 20. "ABDEN,Auto baud rate enable" "0,1"
|
|
bitfld.long 0x00 19. "MSBF,Most significant bit first" "0,1"
|
|
bitfld.long 0x00 18. "DINV,Data bit level inversion" "0,1"
|
|
bitfld.long 0x00 17. "TINV,TX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 16. "RINV,RX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 15. "STRP,Swap TX/RX pins" "0,1"
|
|
bitfld.long 0x00 14. "LMEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "STB,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x00 11. "CKEN,Clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CPL,Clock polarity" "0,1"
|
|
bitfld.long 0x00 9. "CPH,Clock phase" "0,1"
|
|
bitfld.long 0x00 8. "CLEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x00 6. "LBDIE,LIN break detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "LBLEN,LIN break detection length" "0,1"
|
|
bitfld.long 0x00 4. "ADDM,7-bit Address Detection/4-bit Address Detection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
bitfld.long 0x00 22. "WUIE,Wakeup from Stop mode interrupt enable" "0,1"
|
|
bitfld.long 0x00 20.--21. "WUM,Wakeup from Stop mode interrupt flag selection" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "SCRTNUM,Smartcard auto-retry count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "DEP,Driver enable polarity selection" "0,1"
|
|
bitfld.long 0x00 14. "DEM,Driver enable mode" "0,1"
|
|
bitfld.long 0x00 13. "DDRE,DMA Disable on Reception Error" "0,1"
|
|
bitfld.long 0x00 12. "OVRD,Overrun Disable" "0,1"
|
|
bitfld.long 0x00 11. "OSB,One sample bit method enable" "0,1"
|
|
bitfld.long 0x00 10. "CTSIE,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x00 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x00 7. "DENT,DMA enable transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "DENR,DMA enable receiver" "0,1"
|
|
bitfld.long 0x00 5. "SCEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x00 4. "NKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x00 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x00 2. "IRLP,IrDA low-power" "0,1"
|
|
bitfld.long 0x00 1. "IREN,IrDA mode enable" "0,1"
|
|
bitfld.long 0x00 0. "ERRIE,Error interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BAUD,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. "BRR_INT,integer of baud-rate divider"
|
|
bitfld.long 0x00 0.--3. "BRR_FRA,integer of baud-rate divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GP,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "GUAT,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PSC,Prescaler value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RT,Receiver timeout register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "BL,Block Length"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "RT,Receiver timeout value"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD,Command register"
|
|
bitfld.long 0x00 4. "TXFCMD,Transmit data flush request" "0,1"
|
|
bitfld.long 0x00 3. "RXFCMD,Receive data flush request" "0,1"
|
|
bitfld.long 0x00 2. "MMCMD,Mute mode request" "0,1"
|
|
bitfld.long 0x00 1. "SBKCMD,Send break request" "0,1"
|
|
bitfld.long 0x00 0. "ABDCMD,Auto baud rate request" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STAT,Interrupt & status register"
|
|
bitfld.long 0x00 22. "REA,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 21. "TEA,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 20. "WUF,Wakeup from Stop mode flag" "0,1"
|
|
bitfld.long 0x00 19. "RWU,Receiver wakeup from Mute mode" "0,1"
|
|
bitfld.long 0x00 18. "SBF,Send break flag" "0,1"
|
|
bitfld.long 0x00 17. "AMF,character match flag" "0,1"
|
|
bitfld.long 0x00 16. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 15. "ABDF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x00 14. "ABDE,Auto baud rate error" "0,1"
|
|
bitfld.long 0x00 12. "EBF,End of block flag" "0,1"
|
|
bitfld.long 0x00 11. "RTF,Receiver timeout" "0,1"
|
|
bitfld.long 0x00 10. "CTS,CTS flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CTSF,CTS interrupt flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDF,LIN break detection flag" "0,1"
|
|
bitfld.long 0x00 7. "TBE,Transmit data register empty" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transmission complete" "0,1"
|
|
bitfld.long 0x00 5. "RBNE,Read data register not empty" "0,1"
|
|
bitfld.long 0x00 4. "IDLEF,Idle line detected" "0,1"
|
|
bitfld.long 0x00 3. "ORERR,Overrun error" "0,1"
|
|
bitfld.long 0x00 2. "NERR,Noise detected flag" "0,1"
|
|
bitfld.long 0x00 1. "FERR,Framing error" "0,1"
|
|
bitfld.long 0x00 0. "PERR,Parity error" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. "WUC,Wakeup from Stop mode clear flag" "0,1"
|
|
bitfld.long 0x00 17. "AMC,Character match clear flag" "0,1"
|
|
bitfld.long 0x00 12. "EBC,End of timeout clear flag" "0,1"
|
|
bitfld.long 0x00 11. "RTC,Receiver timeout clear flag" "0,1"
|
|
bitfld.long 0x00 9. "CTSC,CTS clear flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDC,LIN break detection clear flag" "0,1"
|
|
bitfld.long 0x00 6. "TCC,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x00 4. "IDLEC,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x00 3. "OREC,Overrun error clear flag" "0,1"
|
|
bitfld.long 0x00 2. "NEC,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x00 1. "FEC,Frame error clear flag" "0,1"
|
|
bitfld.long 0x00 0. "PEC,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDATA,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "TDATA,Transmit data value"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CHC,coherence control register"
|
|
bitfld.long 0x00 8. "EPERR,Early parity error flag" "0,1"
|
|
bitfld.long 0x00 0. "HCM,Hardware flow control coherence mode" "0,1"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "RFCS,USART receive FIFO control and status register"
|
|
bitfld.long 0x00 15. "RFFINT,Receive FIFO full interrupt flag" "0,1"
|
|
rbitfld.long 0x00 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 11. "RFF,Receive FIFO full flag" "0,1"
|
|
rbitfld.long 0x00 10. "RFE,Receive FIFO empty flag" "0,1"
|
|
bitfld.long 0x00 9. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "RFEN,Receive FIFO enable" "0,1"
|
|
bitfld.long 0x00 0. "ELNACK,Early NKEN when smartcard mode is selected" "0,1"
|
|
tree.end
|
|
tree "USART1"
|
|
base ad:0x40004400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 21.--25. "DEA,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "DED,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "OVSMOD,Oversampling mode" "0,1"
|
|
bitfld.long 0x00 14. "AMIE,Character match interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "MEN,Mute mode enable" "0,1"
|
|
bitfld.long 0x00 12. "WL,Word length" "0,1"
|
|
bitfld.long 0x00 11. "WM,Receiver wakeup method" "0,1"
|
|
bitfld.long 0x00 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0x00 9. "PM,Parity selection" "0,1"
|
|
bitfld.long 0x00 8. "PERRIE,PE interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "TBEIE,interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transmission complete interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RBNEIE,RXNE interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "IDLEIE,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0x00 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0x00 0. "UEN,USART enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "ADDR,Address of the USART terminal"
|
|
bitfld.long 0x00 19. "MSBF,Most significant bit first" "0,1"
|
|
bitfld.long 0x00 18. "DINV,Data bit level inversion" "0,1"
|
|
bitfld.long 0x00 17. "TINV,TX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 16. "RINV,RX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 15. "STRP,Swap TX/RX pins" "0,1"
|
|
bitfld.long 0x00 12.--13. "STB,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x00 10. "CPL,Clock polarity" "0,1"
|
|
bitfld.long 0x00 9. "CPH,Clock phase" "0,1"
|
|
bitfld.long 0x00 8. "CLEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x00 4. "ADDM,7-bit Address Detection/4-bit Address Detection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
bitfld.long 0x00 15. "DEP,Driver enable polarity selection" "0,1"
|
|
bitfld.long 0x00 14. "DEM,Driver enable mode" "0,1"
|
|
bitfld.long 0x00 13. "DDRE,DMA Disable on Reception Error" "0,1"
|
|
bitfld.long 0x00 12. "OVRD,Overrun Disable" "0,1"
|
|
bitfld.long 0x00 11. "OSB,One sample bit method enable" "0,1"
|
|
bitfld.long 0x00 10. "CTSIE,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x00 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x00 7. "DENT,DMA enable transmitter" "0,1"
|
|
bitfld.long 0x00 6. "DENR,DMA enable receiver" "0,1"
|
|
bitfld.long 0x00 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x00 2. "IRLP,IrDA low-power" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ERRIE,Error interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BAUD,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. "BRR_INT,integer of baud-rate divider"
|
|
bitfld.long 0x00 0.--3. "BRR_FRA,integer of baud-rate divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD,Command register"
|
|
bitfld.long 0x00 3. "RXFCMD,Receive data flush request" "0,1"
|
|
bitfld.long 0x00 2. "MMCMD,Mute mode request" "0,1"
|
|
bitfld.long 0x00 1. "SBKCMD,Send break request" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STAT,Interrupt & status register"
|
|
bitfld.long 0x00 22. "REA,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 21. "TEA,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 19. "RWU,Receiver wakeup from Mute mode" "0,1"
|
|
bitfld.long 0x00 18. "SBF,Send break flag" "0,1"
|
|
bitfld.long 0x00 17. "AMF,character match flag" "0,1"
|
|
bitfld.long 0x00 16. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 10. "CTS,CTS flag" "0,1"
|
|
bitfld.long 0x00 9. "CTSF,CTS interrupt flag" "0,1"
|
|
bitfld.long 0x00 7. "TBE,Transmit data register empty" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transmission complete" "0,1"
|
|
bitfld.long 0x00 5. "RBNE,Read data register not empty" "0,1"
|
|
bitfld.long 0x00 4. "IDLEF,Idle line detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ORERR,Overrun error" "0,1"
|
|
bitfld.long 0x00 2. "NERR,Noise detected flag" "0,1"
|
|
bitfld.long 0x00 1. "FERR,Framing error" "0,1"
|
|
bitfld.long 0x00 0. "PERR,Parity error" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 17. "AMC,Character match clear flag" "0,1"
|
|
bitfld.long 0x00 9. "CTSC,CTS clear flag" "0,1"
|
|
bitfld.long 0x00 6. "TCC,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x00 4. "IDLEC,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x00 3. "OREC,Overrun error clear flag" "0,1"
|
|
bitfld.long 0x00 2. "NEC,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x00 1. "FEC,Frame error clear flag" "0,1"
|
|
bitfld.long 0x00 0. "PEC,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDATA,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "TDATA,Transmit data value"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CHC,coherence control register"
|
|
bitfld.long 0x00 8. "EPERR,Early parity error flag" "0,1"
|
|
bitfld.long 0x00 0. "HCM,Hardware flow control coherence mode" "0,1"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "RFCS,USART receive FIFO control and status register"
|
|
bitfld.long 0x00 15. "RFFINT,Receive FIFO full interrupt flag" "0,1"
|
|
rbitfld.long 0x00 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 11. "RFF,Receive FIFO full flag" "0,1"
|
|
rbitfld.long 0x00 10. "RFE,Receive FIFO empty flag" "0,1"
|
|
bitfld.long 0x00 9. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "RFEN,Receive FIFO enable" "0,1"
|
|
tree.end
|
|
tree "USART2"
|
|
base ad:0x40011000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 27. "EBIE,End of Block interrupt enable" "0,1"
|
|
bitfld.long 0x00 26. "RTIE,Receiver timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 21.--25. "DEA,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "DED,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "OVSMOD,Oversampling mode" "0,1"
|
|
bitfld.long 0x00 14. "AMIE,Character match interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "MEN,Mute mode enable" "0,1"
|
|
bitfld.long 0x00 12. "WL,Word length" "0,1"
|
|
bitfld.long 0x00 11. "WM,Receiver wakeup method" "0,1"
|
|
bitfld.long 0x00 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0x00 9. "PM,Parity selection" "0,1"
|
|
bitfld.long 0x00 8. "PERRIE,PE interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TBEIE,interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transmission complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "RBNEIE,RXNE interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "IDLEIE,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0x00 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0x00 1. "UESM,USART enable in Stop mode" "0,1"
|
|
bitfld.long 0x00 0. "UEN,USART enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "ADDR,Address of the USART terminal"
|
|
bitfld.long 0x00 23. "RTEN,Receiver timeout enable" "0,1"
|
|
bitfld.long 0x00 21.--22. "ABDM,Auto baud rate mode" "0,1,2,3"
|
|
bitfld.long 0x00 20. "ABDEN,Auto baud rate enable" "0,1"
|
|
bitfld.long 0x00 19. "MSBF,Most significant bit first" "0,1"
|
|
bitfld.long 0x00 18. "DINV,Data bit level inversion" "0,1"
|
|
bitfld.long 0x00 17. "TINV,TX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 16. "RINV,RX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 15. "STRP,Swap TX/RX pins" "0,1"
|
|
bitfld.long 0x00 14. "LMEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "STB,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x00 11. "CKEN,Clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CPL,Clock polarity" "0,1"
|
|
bitfld.long 0x00 9. "CPH,Clock phase" "0,1"
|
|
bitfld.long 0x00 8. "CLEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x00 6. "LBDIE,LIN break detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "LBLEN,LIN break detection length" "0,1"
|
|
bitfld.long 0x00 4. "ADDM,7-bit Address Detection/4-bit Address Detection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
bitfld.long 0x00 22. "WUIE,Wakeup from Stop mode interrupt enable" "0,1"
|
|
bitfld.long 0x00 20.--21. "WUM,Wakeup from Stop mode interrupt flag selection" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "SCRTNUM,Smartcard auto-retry count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "DEP,Driver enable polarity selection" "0,1"
|
|
bitfld.long 0x00 14. "DEM,Driver enable mode" "0,1"
|
|
bitfld.long 0x00 13. "DDRE,DMA Disable on Reception Error" "0,1"
|
|
bitfld.long 0x00 12. "OVRD,Overrun Disable" "0,1"
|
|
bitfld.long 0x00 11. "OSB,One sample bit method enable" "0,1"
|
|
bitfld.long 0x00 10. "CTSIE,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x00 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x00 7. "DENT,DMA enable transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "DENR,DMA enable receiver" "0,1"
|
|
bitfld.long 0x00 5. "SCEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x00 4. "NKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x00 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x00 2. "IRLP,IrDA low-power" "0,1"
|
|
bitfld.long 0x00 1. "IREN,IrDA mode enable" "0,1"
|
|
bitfld.long 0x00 0. "ERRIE,Error interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BAUD,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. "BRR_INT,integer of baud-rate divider"
|
|
bitfld.long 0x00 0.--3. "BRR_FRA,integer of baud-rate divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GP,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "GUAT,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PSC,Prescaler value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RT,Receiver timeout register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "BL,Block Length"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "RT,Receiver timeout value"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD,Command register"
|
|
bitfld.long 0x00 4. "TXFCMD,Transmit data flush request" "0,1"
|
|
bitfld.long 0x00 3. "RXFCMD,Receive data flush request" "0,1"
|
|
bitfld.long 0x00 2. "MMCMD,Mute mode request" "0,1"
|
|
bitfld.long 0x00 1. "SBKCMD,Send break request" "0,1"
|
|
bitfld.long 0x00 0. "ABDCMD,Auto baud rate request" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STAT,Interrupt & status register"
|
|
bitfld.long 0x00 22. "REA,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 21. "TEA,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 20. "WUF,Wakeup from Stop mode flag" "0,1"
|
|
bitfld.long 0x00 19. "RWU,Receiver wakeup from Mute mode" "0,1"
|
|
bitfld.long 0x00 18. "SBF,Send break flag" "0,1"
|
|
bitfld.long 0x00 17. "AMF,character match flag" "0,1"
|
|
bitfld.long 0x00 16. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 15. "ABDF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x00 14. "ABDE,Auto baud rate error" "0,1"
|
|
bitfld.long 0x00 12. "EBF,End of block flag" "0,1"
|
|
bitfld.long 0x00 11. "RTF,Receiver timeout" "0,1"
|
|
bitfld.long 0x00 10. "CTS,CTS flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CTSF,CTS interrupt flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDF,LIN break detection flag" "0,1"
|
|
bitfld.long 0x00 7. "TBE,Transmit data register empty" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transmission complete" "0,1"
|
|
bitfld.long 0x00 5. "RBNE,Read data register not empty" "0,1"
|
|
bitfld.long 0x00 4. "IDLEF,Idle line detected" "0,1"
|
|
bitfld.long 0x00 3. "ORERR,Overrun error" "0,1"
|
|
bitfld.long 0x00 2. "NERR,Noise detected flag" "0,1"
|
|
bitfld.long 0x00 1. "FERR,Framing error" "0,1"
|
|
bitfld.long 0x00 0. "PERR,Parity error" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. "WUC,Wakeup from Stop mode clear flag" "0,1"
|
|
bitfld.long 0x00 17. "AMC,Character match clear flag" "0,1"
|
|
bitfld.long 0x00 12. "EBC,End of timeout clear flag" "0,1"
|
|
bitfld.long 0x00 11. "RTC,Receiver timeout clear flag" "0,1"
|
|
bitfld.long 0x00 9. "CTSC,CTS clear flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDC,LIN break detection clear flag" "0,1"
|
|
bitfld.long 0x00 6. "TCC,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x00 4. "IDLEC,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x00 3. "OREC,Overrun error clear flag" "0,1"
|
|
bitfld.long 0x00 2. "NEC,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x00 1. "FEC,Frame error clear flag" "0,1"
|
|
bitfld.long 0x00 0. "PEC,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDATA,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "TDATA,Transmit data value"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CHC,coherence control register"
|
|
bitfld.long 0x00 8. "EPERR,Early parity error flag" "0,1"
|
|
bitfld.long 0x00 0. "HCM,Hardware flow control coherence mode" "0,1"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "RFCS,USART receive FIFO control and status register"
|
|
bitfld.long 0x00 15. "RFFINT,Receive FIFO full interrupt flag" "0,1"
|
|
rbitfld.long 0x00 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 11. "RFF,Receive FIFO full flag" "0,1"
|
|
rbitfld.long 0x00 10. "RFE,Receive FIFO empty flag" "0,1"
|
|
bitfld.long 0x00 9. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "RFEN,Receive FIFO enable" "0,1"
|
|
bitfld.long 0x00 0. "ELNACK,Early NKEN when smartcard mode is selected" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "USB_FS (USB on the go full speed device)"
|
|
tree "FS_DEVICE"
|
|
base ad:0x49000800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DCFG,device configuration register (DCFG)"
|
|
bitfld.long 0x00 11.--12. "EOPFT,end of periodic frame time" "0,1,2,3"
|
|
hexmask.long.byte 0x00 4.--10. 1. "DAR,Device address"
|
|
bitfld.long 0x00 2. "NZLSOH,Non-zero-length status OUT handshake" "0,1"
|
|
bitfld.long 0x00 0.--1. "DS,Device speed" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DCTL,device control register (DCTL)"
|
|
bitfld.long 0x00 11. "POIF,Power-on initialization flag" "0,1"
|
|
bitfld.long 0x00 10. "CGONAK,Clear global OUT NAK" "0,1"
|
|
bitfld.long 0x00 9. "SGONAK,Set global OUT NAK" "0,1"
|
|
bitfld.long 0x00 8. "CGINAK,Clear global IN NAK" "0,1"
|
|
bitfld.long 0x00 7. "SGINAK,Set global IN NAK" "0,1"
|
|
rbitfld.long 0x00 3. "GONS,Global OUT NAK status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 2. "GINS,Global IN NAK status" "0,1"
|
|
bitfld.long 0x00 1. "SD,Soft disconnect" "0,1"
|
|
bitfld.long 0x00 0. "RWKUP,Remote wakeup" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "DSTAT,device status register (DSTAT)"
|
|
hexmask.long.word 0x00 8.--21. 1. "FNRSOF,Frame number of the received SOF"
|
|
bitfld.long 0x00 1.--2. "ES,Enumerated speed" "0,1,2,3"
|
|
bitfld.long 0x00 0. "SPST,Suspend status" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DIEPINTEN,device IN endpoint common interrupt mask register (DIEPINTEN)"
|
|
bitfld.long 0x00 6. "IEPNEEN,IN endpoint NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUDEN,Endpoint Tx FIFO underrun interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "CITOEN,Control IN timeout condition interrupt enable (Non-isochronous endpoints)" "0,1"
|
|
bitfld.long 0x00 1. "EPDISEN,Endpoint disabled interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFEN,Transfer finished interrupt enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DOEPINTEN,device OUT endpoint common interrupt enable register (DOEPINTEN)"
|
|
bitfld.long 0x00 6. "BTBSTPEN,Back-to-back SETUP packets interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVREN,Endpoint Rx FIFO overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STPFEN,SETUP phase finished interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "EPDISEN,Endpoint disabled interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFEN,Transfer finished interrupt enable" "0,1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DAEPINT,device all endpoints interrupt register (DAEPINT)"
|
|
bitfld.long 0x00 16.--19. "OEPITB,Device all OUT endpoint interrupt bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "IEPITB,Device all IN endpoint interrupt bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DAEPINTEN,Device all endpoints interrupt enable register (DAEPINTEN)"
|
|
bitfld.long 0x00 16.--19. "OEPIE,OUT endpoint interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "IEPIE,IN EP interrupt interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DVBUSDT,device VBUS discharge time register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DVBUSDT,Device VBUS discharge time"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DVBUSPT,device VBUS pulsing time register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DVBUSPT,Device VBUS pulsing time"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DIEPFEINTEN,device IN endpoint FIFO empty interrupt enable register"
|
|
bitfld.long 0x00 0.--3. "IEPTXFEIE,IN EP Tx FIFO empty interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DIEP0CTL,device IN endpoint 0 control register (DIEP0CTL)"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 22.--25. "TXFNUM,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 15. "EPACT,endpoint active" "0,1"
|
|
bitfld.long 0x00 0.--1. "MPL,Maximum packet length" "0,1,2,3"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "DIEP1CTL,device in endpoint-1 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DIEP2CTL,device endpoint-2 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "DIEP3CTL,device endpoint-3 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "DOEP0CTL,device endpoint-0 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
rbitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
rbitfld.long 0x00 0.--1. "MPL,Maximum packet length" "0,1,2,3"
|
|
group.long 0x320++0x03
|
|
line.long 0x00 "DOEP1CTL,device endpoint-1 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "DOEP2CTL,device endpoint-2 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x360++0x03
|
|
line.long 0x00 "DOEP3CTL,device endpoint-3 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "DIEP0INTF,device endpoint-0 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "DIEP1INTF,device endpoint-1 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "DIEP2INTF,device endpoint-2 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "DIEP3INTF,device endpoint-3 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "DOEP0INTF,device out endpoint-0 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x328++0x03
|
|
line.long 0x00 "DOEP1INTF,device out endpoint-1 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x348++0x03
|
|
line.long 0x00 "DOEP2INTF,device out endpoint-2 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x368++0x03
|
|
line.long 0x00 "DOEP3INTF,device out endpoint-3 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DIEP0LEN,device IN endpoint-0 transfer length register"
|
|
bitfld.long 0x00 19.--20. "PCNT,Packet count" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TLEN,Transfer length"
|
|
group.long 0x310++0x03
|
|
line.long 0x00 "DOEP0LEN,device OUT endpoint-0 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT,SETUP packet count" "0,1,2,3"
|
|
bitfld.long 0x00 19. "PCNT,Packet count" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TLEN,Transfer length"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "DIEP1LEN,device IN endpoint-1 transfer length register"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "DIEP2LEN,device IN endpoint-2 transfer length register"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "DIEP3LEN,device IN endpoint-3 transfer length register"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x330++0x03
|
|
line.long 0x00 "DOEP1LEN,device OUT endpoint-1 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x350++0x03
|
|
line.long 0x00 "DOEP2LEN,device OUT endpoint-2 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x370++0x03
|
|
line.long 0x00 "DOEP3LEN,device OUT endpoint-3 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "DIEP0TFSTAT,device IN endpoint 0 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x138++0x03
|
|
line.long 0x00 "DIEP1TFSTAT,device IN endpoint 1 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x158++0x03
|
|
line.long 0x00 "DIEP2TFSTAT,device IN endpoint 2 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x178++0x03
|
|
line.long 0x00 "DIEP3TFSTAT,device IN endpoint 3 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
tree.end
|
|
tree "FS_GLOBAL"
|
|
base ad:0x49000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GOTGCS,Global OTG control and status register (USBFS_GOTGCS)"
|
|
rbitfld.long 0x00 19. "BSV,B-session valid" "0,1"
|
|
rbitfld.long 0x00 18. "ASV,A-session valid" "0,1"
|
|
rbitfld.long 0x00 17. "DI,Debounce interval" "0,1"
|
|
rbitfld.long 0x00 16. "IDPS,ID pin status" "0,1"
|
|
bitfld.long 0x00 11. "DHNPEN,Device HNP enabled" "0,1"
|
|
bitfld.long 0x00 10. "HHNPEN,Host HNP enable" "0,1"
|
|
bitfld.long 0x00 9. "HNPREQ,HNP request" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "HNPS,Host success" "0,1"
|
|
bitfld.long 0x00 1. "SRPREQ,SRP request" "0,1"
|
|
rbitfld.long 0x00 0. "SRPS,SRP success" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GOTGINTF,Global OTG interrupt flag register (OTG_FS_GOTGINTF)"
|
|
bitfld.long 0x00 19. "DF,Debounce finish" "0,1"
|
|
bitfld.long 0x00 18. "ADTO,A-device timeout" "0,1"
|
|
bitfld.long 0x00 17. "HNPDET,Host negotiation request detected" "0,1"
|
|
bitfld.long 0x00 9. "HNPEND,HNP end" "0,1"
|
|
bitfld.long 0x00 8. "SRPEND,Session request success status change" "0,1"
|
|
bitfld.long 0x00 2. "SESEND,Session end" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GAHBCS,Global AHB control and status register (USBFS_GAHBCS)"
|
|
bitfld.long 0x00 8. "PTXFTH,Periodic Tx FIFO threshold" "0,1"
|
|
bitfld.long 0x00 7. "TXFTH,Tx FIFO threshold" "0,1"
|
|
bitfld.long 0x00 0. "GINTEN,Global interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "GUSBCS,Global USB control and status register (OTG_FS_GUSBCSR)"
|
|
bitfld.long 0x00 30. "FDM,Force device mode" "0,1"
|
|
bitfld.long 0x00 29. "FHM,Force host mode" "0,1"
|
|
bitfld.long 0x00 10.--13. "UTT,USB turnaround time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 9. "HNPCEN,HNP capability enable" "0,1"
|
|
bitfld.long 0x00 8. "SRPCEN,SRP capability enable" "0,1"
|
|
bitfld.long 0x00 0.--2. "TOC,Timeout calibration" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GRSTCTL,Global reset control register (USBFS_GRSTCTL)"
|
|
bitfld.long 0x00 6.--10. "TXFNUM,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. "TXFF,TxFIFO flush" "0,1"
|
|
bitfld.long 0x00 4. "RXFF,RxFIFO flush" "0,1"
|
|
bitfld.long 0x00 2. "HFCRST,Host frame counter reset" "0,1"
|
|
bitfld.long 0x00 1. "HCSRST,HCLK soft reset" "0,1"
|
|
bitfld.long 0x00 0. "CSRST,Core soft reset" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GINTF,Global interrupt flag register (USBFS_GINTF)"
|
|
bitfld.long 0x00 31. "WKUPIF,Wakeup interrupt flag" "0,1"
|
|
bitfld.long 0x00 30. "SESIF,Session interrupt flag" "0,1"
|
|
bitfld.long 0x00 29. "DISCIF,Disconnect interrupt flag" "0,1"
|
|
bitfld.long 0x00 28. "IDPSC,ID pin status change" "0,1"
|
|
rbitfld.long 0x00 26. "PTXFEIF,Periodic TxFIFO empty interrupt flag" "0,1"
|
|
rbitfld.long 0x00 25. "HCIF,Host channels interrupt flag" "0,1"
|
|
rbitfld.long 0x00 24. "HPIF,Host port interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PXNCIF_ISOONCIF,periodic transfer not complete interrupt flag(Host mode)/isochronous OUT transfer not complete interrupt flag(Device mode)" "0,1"
|
|
bitfld.long 0x00 20. "ISOINCIF,Isochronous IN transfer Not Complete Interrupt Flag" "0,1"
|
|
rbitfld.long 0x00 19. "OEPIF,OUT endpoint interrupt flag" "0,1"
|
|
rbitfld.long 0x00 18. "IEPIF,IN endpoint interrupt flag" "0,1"
|
|
bitfld.long 0x00 15. "EOPFIF,End of periodic frame interrupt flag" "0,1"
|
|
bitfld.long 0x00 14. "ISOOPDIF,Isochronous OUT packet dropped interrupt" "0,1"
|
|
bitfld.long 0x00 13. "ENUMF,Enumeration finished" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RST,USB reset" "0,1"
|
|
bitfld.long 0x00 11. "SP,USB suspend" "0,1"
|
|
bitfld.long 0x00 10. "ESP,Early suspend" "0,1"
|
|
rbitfld.long 0x00 7. "GONAK,Global OUT NAK effective" "0,1"
|
|
rbitfld.long 0x00 6. "GNPINAK,Global Non-Periodic IN NAK effective" "0,1"
|
|
rbitfld.long 0x00 5. "NPTXFEIF,Non-periodic TxFIFO empty interrupt flag" "0,1"
|
|
rbitfld.long 0x00 4. "RXFNEIF,RxFIFO non-empty interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SOF,Start of frame" "0,1"
|
|
rbitfld.long 0x00 2. "OTGIF,OTG interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "MFIF,Mode fault interrupt flag" "0,1"
|
|
rbitfld.long 0x00 0. "COPM,Current operation mode" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GINTEN,Global interrupt enable register (USBFS_GINTEN)"
|
|
bitfld.long 0x00 31. "WKUPIE,Wakeup interrupt enable" "0,1"
|
|
bitfld.long 0x00 30. "SESIE,Session interrupt enable" "0,1"
|
|
bitfld.long 0x00 29. "DISCIE,Disconnect interrupt enable" "0,1"
|
|
bitfld.long 0x00 28. "IDPSCIE,ID pin status change interrupt enable" "0,1"
|
|
bitfld.long 0x00 26. "PTXFEIE,Periodic TxFIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 25. "HCIE,Host channels interrupt enable" "0,1"
|
|
rbitfld.long 0x00 24. "HPIE,Host port interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PXNCIE_ISOONCIE,periodic transfer not compelete Interrupt enable(Host mode)/isochronous OUT transfer not complete interrupt enable(Device mode)" "0,1"
|
|
bitfld.long 0x00 20. "ISOINCIE,isochronous IN transfer not complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 19. "OEPIE,OUT endpoints interrupt enable" "0,1"
|
|
bitfld.long 0x00 18. "IEPIE,IN endpoints interrupt enable" "0,1"
|
|
bitfld.long 0x00 15. "EOPFIE,End of periodic frame interrupt enable" "0,1"
|
|
bitfld.long 0x00 14. "ISOOPDIE,Isochronous OUT packet dropped interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "ENUMFIE,Enumeration finish interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RSTIE,USB reset interrupt enable" "0,1"
|
|
bitfld.long 0x00 11. "SPIE,USB suspend interrupt enable" "0,1"
|
|
bitfld.long 0x00 10. "ESPIE,Early suspend interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "GONAKIE,Global OUT NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "GNPINAKIE,Global non-periodic IN NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "NPTXFEIE,Non-periodic TxFIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "RXFNEIE,Receive FIFO non-empty interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SOFIE,Start of frame interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "OTGIE,OTG interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "MFIE,Mode fault interrupt enable" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "GRSTATR_Device,Global Receive status read(Device mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Recieve packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "GRSTATR_Host,Global Receive status read(Host mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Reivece packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "CNUM,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GRSTATP_Device,Global Receive status pop(Device mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Recieve packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GRSTATP_Host,Global Receive status pop(Host mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Reivece packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "CNUM,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GRFLEN,Global Receive FIFO size register (USBFS_GRFLEN)"
|
|
hexmask.long.word 0x00 0.--15. 1. "RXFD,Rx FIFO depth"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "HNPTFLEN,Host non-periodic transmit FIFO length register (Host mode)"
|
|
hexmask.long.word 0x00 16.--31. 1. "HNPTXFD,host non-periodic TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "HNPTXRSAR,host non-periodic transmit Tx RAM start address"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DIEP0TFLEN,Device IN endpoint 0 transmit FIFO length (Device mode)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEP0TXRSAR,in endpoint 0 Tx RAM start address"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEP0TXFD,in endpoint 0 Tx FIFO depth"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "HNPTFQSTAT,Host non-periodic transmit FIFO/queue status register (HNPTFQSTAT)"
|
|
hexmask.long.byte 0x00 24.--30. 1. "NPTXRQTOP,Top of the non-periodic transmit request queue"
|
|
hexmask.long.byte 0x00 16.--23. 1. "NPTXRQS,Non-periodic transmit request queue space"
|
|
hexmask.long.word 0x00 0.--15. 1. "NPTXFS,Non-periodic TxFIFO space"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "GCCFG,Global core configuration register (USBFS_GCCFG)"
|
|
bitfld.long 0x00 21. "VBUSIG,VBUS ignored" "0,1"
|
|
bitfld.long 0x00 20. "SOFOEN,SOF output enable" "0,1"
|
|
bitfld.long 0x00 19. "VBUSBCEN,The VBUS B-device Comparer enable" "0,1"
|
|
bitfld.long 0x00 18. "VBUSACEN,The VBUS A-device Comparer enable" "0,1"
|
|
bitfld.long 0x00 16. "PWRON,Power on" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CID,core ID register"
|
|
hexmask.long 0x00 0.--31. 1. "CID,Core ID"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "HPTFLEN,Host periodic transmit FIFO length register (HPTFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "HPTXFD,Host periodic TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "HPTXFSAR,Host periodic TxFIFO start address"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "DIEP1TFLEN,device IN endpoint transmit FIFO size register (DIEP1TFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO transmit RAM start address"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "DIEP2TFLEN,device IN endpoint transmit FIFO size register (DIEP2TFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO transmit RAM start address"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "DIEP3TFLEN,device IN endpoint transmit FIFO size register (FS_DIEP3TXFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO4 transmit RAM start address"
|
|
tree.end
|
|
tree "FS_HOST"
|
|
base ad:0x49000400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "HCTL,host configuration register (HCTL)"
|
|
bitfld.long 0x00 0.--1. "CLKSEL,clock select for USB clock" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "HFT,Host frame interval register"
|
|
hexmask.long.word 0x00 0.--15. 1. "FRI,Frame interval"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "HFINFR,OTG_FS host frame number/frame time remaining register (HFINFR)"
|
|
hexmask.long.word 0x00 16.--31. 1. "FRT,Frame remaining time"
|
|
hexmask.long.word 0x00 0.--15. 1. "FRNUM,Frame number"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "HPTFQSTAT,Host periodic transmit FIFO/queue status register (HPTFQSTAT)"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PTXREQT,Top of the periodic transmit request queue"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PTXREQS,Periodic transmit request queue space available"
|
|
hexmask.long.word 0x00 0.--15. 1. "PTXFS,Periodic transmit data FIFO space available"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "HACHINT,Host all channels interrupt register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "HACHINT,Host all channel interrupts"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "HACHINTEN,host all channels interrupt mask register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CINTEN,Channel interrupt enable"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "HPCS,Host port control and status register (USBFS_HPCS)"
|
|
rbitfld.long 0x00 17.--18. "PS,Port speed" "0,1,2,3"
|
|
bitfld.long 0x00 12. "PP,Port power" "0,1"
|
|
rbitfld.long 0x00 10.--11. "PLST,Port line status" "0,1,2,3"
|
|
bitfld.long 0x00 8. "PRST,Port reset" "0,1"
|
|
bitfld.long 0x00 7. "PSP,Port suspend" "0,1"
|
|
bitfld.long 0x00 6. "PREM,Port resume" "0,1"
|
|
bitfld.long 0x00 3. "PEDC,Port enable/disable change" "0,1"
|
|
bitfld.long 0x00 2. "PE,Port enable" "0,1"
|
|
bitfld.long 0x00 1. "PCD,Port connect detected" "0,1"
|
|
rbitfld.long 0x00 0. "PCST,Port connect status" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "HCH0CTL,host channel-0 characteristics register (HCH0CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "HCH1CTL,host channel-1 characteristics register (HCH1CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "HCH2CTL,host channel-2 characteristics register (HCH2CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "HCH3CTL,host channel-3 characteristics register (HCH3CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "HCH4CTL,host channel-4 characteristics register (HCH4CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "HCH5CTL,host channel-5 characteristics register (HCH5CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "HCH6CTL,host channel-6 characteristics register (HCH6CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "HCH7CTL,host channel-7 characteristics register (HCH7CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "HCH0INTF,host channel-0 interrupt register (USBFS_HCHxINTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "HCH1INTF,host channel-1 interrupt register (HCH1INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "HCH2INTF,host channel-2 interrupt register (HCH2INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "HCH3INTF,host channel-3 interrupt register (HCH3INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "HCH4INTF,host channel-4 interrupt register (HCH4INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "HCH5INTF,host channel-5 interrupt register (HCH5INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "HCH6INTF,host channel-6 interrupt register (HCH6INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1E8++0x03
|
|
line.long 0x00 "HCH7INTF,host channel-7 interrupt register (HCH7INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "HCH0INTEN,host channel-0 interrupt enable register (HCH0INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "HCH1INTEN,host channel-1 interrupt enable register (HCH1INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "HCH2INTEN,host channel-2 interrupt enable register (HCH2INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "HCH3INTEN,host channel-3 interrupt enable register (HCH3INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "HCH4INTEN,host channel-4 interrupt enable register (HCH4INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "HCH5INTEN,host channel-5 interrupt enable register (HCH5INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "HCH6INTEN,host channel-6 interrupt enable register (HCH6INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x1EC++0x03
|
|
line.long 0x00 "HCH7INTEN,host channel-7 interrupt enable register (HCH7INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "HCH0LEN,host channel-0 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "HCH1LEN,host channel-1 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "HCH2LEN,host channel-2 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "HCH3LEN,host channel-3 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "HCH4LEN,host channel-4 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "HCH5LEN,host channel-5 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "HCH6LEN,host channel-6 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1F0++0x03
|
|
line.long 0x00 "HCH7LEN,host channel-7 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
tree.end
|
|
tree "FS_PWRCLK"
|
|
base ad:0x49000E00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWRCLKCTL,power and clock gating control register (PWRCLKCTL)"
|
|
bitfld.long 0x00 1. "SHCLK,Stop HCLK" "0,1"
|
|
bitfld.long 0x00 0. "SUCLK,Stop the USB clock" "0,1"
|
|
tree.end
|
|
tree "SEC_FS_DEVICE"
|
|
base ad:0x59000800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DCFG,device configuration register (DCFG)"
|
|
bitfld.long 0x00 11.--12. "EOPFT,end of periodic frame time" "0,1,2,3"
|
|
hexmask.long.byte 0x00 4.--10. 1. "DAR,Device address"
|
|
bitfld.long 0x00 2. "NZLSOH,Non-zero-length status OUT handshake" "0,1"
|
|
bitfld.long 0x00 0.--1. "DS,Device speed" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DCTL,device control register (DCTL)"
|
|
bitfld.long 0x00 11. "POIF,Power-on initialization flag" "0,1"
|
|
bitfld.long 0x00 10. "CGONAK,Clear global OUT NAK" "0,1"
|
|
bitfld.long 0x00 9. "SGONAK,Set global OUT NAK" "0,1"
|
|
bitfld.long 0x00 8. "CGINAK,Clear global IN NAK" "0,1"
|
|
bitfld.long 0x00 7. "SGINAK,Set global IN NAK" "0,1"
|
|
rbitfld.long 0x00 3. "GONS,Global OUT NAK status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 2. "GINS,Global IN NAK status" "0,1"
|
|
bitfld.long 0x00 1. "SD,Soft disconnect" "0,1"
|
|
bitfld.long 0x00 0. "RWKUP,Remote wakeup" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "DSTAT,device status register (DSTAT)"
|
|
hexmask.long.word 0x00 8.--21. 1. "FNRSOF,Frame number of the received SOF"
|
|
bitfld.long 0x00 1.--2. "ES,Enumerated speed" "0,1,2,3"
|
|
bitfld.long 0x00 0. "SPST,Suspend status" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DIEPINTEN,device IN endpoint common interrupt mask register (DIEPINTEN)"
|
|
bitfld.long 0x00 6. "IEPNEEN,IN endpoint NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUDEN,Endpoint Tx FIFO underrun interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "CITOEN,Control IN timeout condition interrupt enable (Non-isochronous endpoints)" "0,1"
|
|
bitfld.long 0x00 1. "EPDISEN,Endpoint disabled interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFEN,Transfer finished interrupt enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DOEPINTEN,device OUT endpoint common interrupt enable register (DOEPINTEN)"
|
|
bitfld.long 0x00 6. "BTBSTPEN,Back-to-back SETUP packets interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVREN,Endpoint Rx FIFO overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STPFEN,SETUP phase finished interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "EPDISEN,Endpoint disabled interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFEN,Transfer finished interrupt enable" "0,1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DAEPINT,device all endpoints interrupt register (DAEPINT)"
|
|
bitfld.long 0x00 16.--19. "OEPITB,Device all OUT endpoint interrupt bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "IEPITB,Device all IN endpoint interrupt bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DAEPINTEN,Device all endpoints interrupt enable register (DAEPINTEN)"
|
|
bitfld.long 0x00 16.--19. "OEPIE,OUT endpoint interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "IEPIE,IN EP interrupt interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DVBUSDT,device VBUS discharge time register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DVBUSDT,Device VBUS discharge time"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DVBUSPT,device VBUS pulsing time register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DVBUSPT,Device VBUS pulsing time"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DIEPFEINTEN,device IN endpoint FIFO empty interrupt enable register"
|
|
bitfld.long 0x00 0.--3. "IEPTXFEIE,IN EP Tx FIFO empty interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DIEP0CTL,device IN endpoint 0 control register (DIEP0CTL)"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 22.--25. "TXFNUM,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 15. "EPACT,endpoint active" "0,1"
|
|
bitfld.long 0x00 0.--1. "MPL,Maximum packet length" "0,1,2,3"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "DIEP1CTL,device in endpoint-1 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DIEP2CTL,device endpoint-2 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "DIEP3CTL,device endpoint-3 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "DOEP0CTL,device endpoint-0 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
rbitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
rbitfld.long 0x00 0.--1. "MPL,Maximum packet length" "0,1,2,3"
|
|
group.long 0x320++0x03
|
|
line.long 0x00 "DOEP1CTL,device endpoint-1 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "DOEP2CTL,device endpoint-2 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x360++0x03
|
|
line.long 0x00 "DOEP3CTL,device endpoint-3 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "DIEP0INTF,device endpoint-0 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "DIEP1INTF,device endpoint-1 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "DIEP2INTF,device endpoint-2 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "DIEP3INTF,device endpoint-3 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "DOEP0INTF,device out endpoint-0 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x328++0x03
|
|
line.long 0x00 "DOEP1INTF,device out endpoint-1 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x348++0x03
|
|
line.long 0x00 "DOEP2INTF,device out endpoint-2 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x368++0x03
|
|
line.long 0x00 "DOEP3INTF,device out endpoint-3 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DIEP0LEN,device IN endpoint-0 transfer length register"
|
|
bitfld.long 0x00 19.--20. "PCNT,Packet count" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TLEN,Transfer length"
|
|
group.long 0x310++0x03
|
|
line.long 0x00 "DOEP0LEN,device OUT endpoint-0 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT,SETUP packet count" "0,1,2,3"
|
|
bitfld.long 0x00 19. "PCNT,Packet count" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TLEN,Transfer length"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "DIEP1LEN,device IN endpoint-1 transfer length register"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "DIEP2LEN,device IN endpoint-2 transfer length register"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "DIEP3LEN,device IN endpoint-3 transfer length register"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x330++0x03
|
|
line.long 0x00 "DOEP1LEN,device OUT endpoint-1 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x350++0x03
|
|
line.long 0x00 "DOEP2LEN,device OUT endpoint-2 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x370++0x03
|
|
line.long 0x00 "DOEP3LEN,device OUT endpoint-3 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "DIEP0TFSTAT,device IN endpoint 0 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x138++0x03
|
|
line.long 0x00 "DIEP1TFSTAT,device IN endpoint 1 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x158++0x03
|
|
line.long 0x00 "DIEP2TFSTAT,device IN endpoint 2 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x178++0x03
|
|
line.long 0x00 "DIEP3TFSTAT,device IN endpoint 3 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
tree.end
|
|
tree "SEC_FS_GLOBAL"
|
|
base ad:0x59000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GOTGCS,Global OTG control and status register (USBFS_GOTGCS)"
|
|
rbitfld.long 0x00 19. "BSV,B-session valid" "0,1"
|
|
rbitfld.long 0x00 18. "ASV,A-session valid" "0,1"
|
|
rbitfld.long 0x00 17. "DI,Debounce interval" "0,1"
|
|
rbitfld.long 0x00 16. "IDPS,ID pin status" "0,1"
|
|
bitfld.long 0x00 11. "DHNPEN,Device HNP enabled" "0,1"
|
|
bitfld.long 0x00 10. "HHNPEN,Host HNP enable" "0,1"
|
|
bitfld.long 0x00 9. "HNPREQ,HNP request" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "HNPS,Host success" "0,1"
|
|
bitfld.long 0x00 1. "SRPREQ,SRP request" "0,1"
|
|
rbitfld.long 0x00 0. "SRPS,SRP success" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GOTGINTF,Global OTG interrupt flag register (OTG_FS_GOTGINTF)"
|
|
bitfld.long 0x00 19. "DF,Debounce finish" "0,1"
|
|
bitfld.long 0x00 18. "ADTO,A-device timeout" "0,1"
|
|
bitfld.long 0x00 17. "HNPDET,Host negotiation request detected" "0,1"
|
|
bitfld.long 0x00 9. "HNPEND,HNP end" "0,1"
|
|
bitfld.long 0x00 8. "SRPEND,Session request success status change" "0,1"
|
|
bitfld.long 0x00 2. "SESEND,Session end" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GAHBCS,Global AHB control and status register (USBFS_GAHBCS)"
|
|
bitfld.long 0x00 8. "PTXFTH,Periodic Tx FIFO threshold" "0,1"
|
|
bitfld.long 0x00 7. "TXFTH,Tx FIFO threshold" "0,1"
|
|
bitfld.long 0x00 0. "GINTEN,Global interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "GUSBCS,Global USB control and status register (OTG_FS_GUSBCSR)"
|
|
bitfld.long 0x00 30. "FDM,Force device mode" "0,1"
|
|
bitfld.long 0x00 29. "FHM,Force host mode" "0,1"
|
|
bitfld.long 0x00 10.--13. "UTT,USB turnaround time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 9. "HNPCEN,HNP capability enable" "0,1"
|
|
bitfld.long 0x00 8. "SRPCEN,SRP capability enable" "0,1"
|
|
bitfld.long 0x00 0.--2. "TOC,Timeout calibration" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GRSTCTL,Global reset control register (USBFS_GRSTCTL)"
|
|
bitfld.long 0x00 6.--10. "TXFNUM,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. "TXFF,TxFIFO flush" "0,1"
|
|
bitfld.long 0x00 4. "RXFF,RxFIFO flush" "0,1"
|
|
bitfld.long 0x00 2. "HFCRST,Host frame counter reset" "0,1"
|
|
bitfld.long 0x00 1. "HCSRST,HCLK soft reset" "0,1"
|
|
bitfld.long 0x00 0. "CSRST,Core soft reset" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GINTF,Global interrupt flag register (USBFS_GINTF)"
|
|
bitfld.long 0x00 31. "WKUPIF,Wakeup interrupt flag" "0,1"
|
|
bitfld.long 0x00 30. "SESIF,Session interrupt flag" "0,1"
|
|
bitfld.long 0x00 29. "DISCIF,Disconnect interrupt flag" "0,1"
|
|
bitfld.long 0x00 28. "IDPSC,ID pin status change" "0,1"
|
|
rbitfld.long 0x00 26. "PTXFEIF,Periodic TxFIFO empty interrupt flag" "0,1"
|
|
rbitfld.long 0x00 25. "HCIF,Host channels interrupt flag" "0,1"
|
|
rbitfld.long 0x00 24. "HPIF,Host port interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PXNCIF_ISOONCIF,periodic transfer not complete interrupt flag(Host mode)/isochronous OUT transfer not complete interrupt flag(Device mode)" "0,1"
|
|
bitfld.long 0x00 20. "ISOINCIF,Isochronous IN transfer Not Complete Interrupt Flag" "0,1"
|
|
rbitfld.long 0x00 19. "OEPIF,OUT endpoint interrupt flag" "0,1"
|
|
rbitfld.long 0x00 18. "IEPIF,IN endpoint interrupt flag" "0,1"
|
|
bitfld.long 0x00 15. "EOPFIF,End of periodic frame interrupt flag" "0,1"
|
|
bitfld.long 0x00 14. "ISOOPDIF,Isochronous OUT packet dropped interrupt" "0,1"
|
|
bitfld.long 0x00 13. "ENUMF,Enumeration finished" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RST,USB reset" "0,1"
|
|
bitfld.long 0x00 11. "SP,USB suspend" "0,1"
|
|
bitfld.long 0x00 10. "ESP,Early suspend" "0,1"
|
|
rbitfld.long 0x00 7. "GONAK,Global OUT NAK effective" "0,1"
|
|
rbitfld.long 0x00 6. "GNPINAK,Global Non-Periodic IN NAK effective" "0,1"
|
|
rbitfld.long 0x00 5. "NPTXFEIF,Non-periodic TxFIFO empty interrupt flag" "0,1"
|
|
rbitfld.long 0x00 4. "RXFNEIF,RxFIFO non-empty interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SOF,Start of frame" "0,1"
|
|
rbitfld.long 0x00 2. "OTGIF,OTG interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "MFIF,Mode fault interrupt flag" "0,1"
|
|
rbitfld.long 0x00 0. "COPM,Current operation mode" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GINTEN,Global interrupt enable register (USBFS_GINTEN)"
|
|
bitfld.long 0x00 31. "WKUPIE,Wakeup interrupt enable" "0,1"
|
|
bitfld.long 0x00 30. "SESIE,Session interrupt enable" "0,1"
|
|
bitfld.long 0x00 29. "DISCIE,Disconnect interrupt enable" "0,1"
|
|
bitfld.long 0x00 28. "IDPSCIE,ID pin status change interrupt enable" "0,1"
|
|
bitfld.long 0x00 26. "PTXFEIE,Periodic TxFIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 25. "HCIE,Host channels interrupt enable" "0,1"
|
|
rbitfld.long 0x00 24. "HPIE,Host port interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PXNCIE_ISOONCIE,periodic transfer not compelete Interrupt enable(Host mode)/isochronous OUT transfer not complete interrupt enable(Device mode)" "0,1"
|
|
bitfld.long 0x00 20. "ISOINCIE,isochronous IN transfer not complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 19. "OEPIE,OUT endpoints interrupt enable" "0,1"
|
|
bitfld.long 0x00 18. "IEPIE,IN endpoints interrupt enable" "0,1"
|
|
bitfld.long 0x00 15. "EOPFIE,End of periodic frame interrupt enable" "0,1"
|
|
bitfld.long 0x00 14. "ISOOPDIE,Isochronous OUT packet dropped interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "ENUMFIE,Enumeration finish interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RSTIE,USB reset interrupt enable" "0,1"
|
|
bitfld.long 0x00 11. "SPIE,USB suspend interrupt enable" "0,1"
|
|
bitfld.long 0x00 10. "ESPIE,Early suspend interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "GONAKIE,Global OUT NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "GNPINAKIE,Global non-periodic IN NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "NPTXFEIE,Non-periodic TxFIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "RXFNEIE,Receive FIFO non-empty interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SOFIE,Start of frame interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "OTGIE,OTG interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "MFIE,Mode fault interrupt enable" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "GRSTATR_Device,Global Receive status read(Device mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Recieve packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "GRSTATR_Host,Global Receive status read(Host mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Reivece packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "CNUM,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GRSTATP_Device,Global Receive status pop(Device mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Recieve packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GRSTATP_Host,Global Receive status pop(Host mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Reivece packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "CNUM,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GRFLEN,Global Receive FIFO size register (USBFS_GRFLEN)"
|
|
hexmask.long.word 0x00 0.--15. 1. "RXFD,Rx FIFO depth"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "HNPTFLEN,Host non-periodic transmit FIFO length register (Host mode)"
|
|
hexmask.long.word 0x00 16.--31. 1. "HNPTXFD,host non-periodic TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "HNPTXRSAR,host non-periodic transmit Tx RAM start address"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DIEP0TFLEN,Device IN endpoint 0 transmit FIFO length (Device mode)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEP0TXRSAR,in endpoint 0 Tx RAM start address"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEP0TXFD,in endpoint 0 Tx FIFO depth"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "HNPTFQSTAT,Host non-periodic transmit FIFO/queue status register (HNPTFQSTAT)"
|
|
hexmask.long.byte 0x00 24.--30. 1. "NPTXRQTOP,Top of the non-periodic transmit request queue"
|
|
hexmask.long.byte 0x00 16.--23. 1. "NPTXRQS,Non-periodic transmit request queue space"
|
|
hexmask.long.word 0x00 0.--15. 1. "NPTXFS,Non-periodic TxFIFO space"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "GCCFG,Global core configuration register (USBFS_GCCFG)"
|
|
bitfld.long 0x00 21. "VBUSIG,VBUS ignored" "0,1"
|
|
bitfld.long 0x00 20. "SOFOEN,SOF output enable" "0,1"
|
|
bitfld.long 0x00 19. "VBUSBCEN,The VBUS B-device Comparer enable" "0,1"
|
|
bitfld.long 0x00 18. "VBUSACEN,The VBUS A-device Comparer enable" "0,1"
|
|
bitfld.long 0x00 16. "PWRON,Power on" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CID,core ID register"
|
|
hexmask.long 0x00 0.--31. 1. "CID,Core ID"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "HPTFLEN,Host periodic transmit FIFO length register (HPTFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "HPTXFD,Host periodic TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "HPTXFSAR,Host periodic TxFIFO start address"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "DIEP1TFLEN,device IN endpoint transmit FIFO size register (DIEP1TFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO transmit RAM start address"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "DIEP2TFLEN,device IN endpoint transmit FIFO size register (DIEP2TFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO transmit RAM start address"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "DIEP3TFLEN,device IN endpoint transmit FIFO size register (FS_DIEP3TXFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO4 transmit RAM start address"
|
|
tree.end
|
|
tree "SEC_FS_HOST"
|
|
base ad:0x59000400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "HCTL,host configuration register (HCTL)"
|
|
bitfld.long 0x00 0.--1. "CLKSEL,clock select for USB clock" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "HFT,Host frame interval register"
|
|
hexmask.long.word 0x00 0.--15. 1. "FRI,Frame interval"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "HFINFR,OTG_FS host frame number/frame time remaining register (HFINFR)"
|
|
hexmask.long.word 0x00 16.--31. 1. "FRT,Frame remaining time"
|
|
hexmask.long.word 0x00 0.--15. 1. "FRNUM,Frame number"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "HPTFQSTAT,Host periodic transmit FIFO/queue status register (HPTFQSTAT)"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PTXREQT,Top of the periodic transmit request queue"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PTXREQS,Periodic transmit request queue space available"
|
|
hexmask.long.word 0x00 0.--15. 1. "PTXFS,Periodic transmit data FIFO space available"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "HACHINT,Host all channels interrupt register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "HACHINT,Host all channel interrupts"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "HACHINTEN,host all channels interrupt mask register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CINTEN,Channel interrupt enable"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "HPCS,Host port control and status register (USBFS_HPCS)"
|
|
rbitfld.long 0x00 17.--18. "PS,Port speed" "0,1,2,3"
|
|
bitfld.long 0x00 12. "PP,Port power" "0,1"
|
|
rbitfld.long 0x00 10.--11. "PLST,Port line status" "0,1,2,3"
|
|
bitfld.long 0x00 8. "PRST,Port reset" "0,1"
|
|
bitfld.long 0x00 7. "PSP,Port suspend" "0,1"
|
|
bitfld.long 0x00 6. "PREM,Port resume" "0,1"
|
|
bitfld.long 0x00 3. "PEDC,Port enable/disable change" "0,1"
|
|
bitfld.long 0x00 2. "PE,Port enable" "0,1"
|
|
bitfld.long 0x00 1. "PCD,Port connect detected" "0,1"
|
|
rbitfld.long 0x00 0. "PCST,Port connect status" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "HCH0CTL,host channel-0 characteristics register (HCH0CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "HCH1CTL,host channel-1 characteristics register (HCH1CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "HCH2CTL,host channel-2 characteristics register (HCH2CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "HCH3CTL,host channel-3 characteristics register (HCH3CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "HCH4CTL,host channel-4 characteristics register (HCH4CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "HCH5CTL,host channel-5 characteristics register (HCH5CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "HCH6CTL,host channel-6 characteristics register (HCH6CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "HCH7CTL,host channel-7 characteristics register (HCH7CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "HCH0INTF,host channel-0 interrupt register (USBFS_HCHxINTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "HCH1INTF,host channel-1 interrupt register (HCH1INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "HCH2INTF,host channel-2 interrupt register (HCH2INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "HCH3INTF,host channel-3 interrupt register (HCH3INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "HCH4INTF,host channel-4 interrupt register (HCH4INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "HCH5INTF,host channel-5 interrupt register (HCH5INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "HCH6INTF,host channel-6 interrupt register (HCH6INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1E8++0x03
|
|
line.long 0x00 "HCH7INTF,host channel-7 interrupt register (HCH7INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "HCH0INTEN,host channel-0 interrupt enable register (HCH0INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "HCH1INTEN,host channel-1 interrupt enable register (HCH1INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "HCH2INTEN,host channel-2 interrupt enable register (HCH2INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "HCH3INTEN,host channel-3 interrupt enable register (HCH3INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "HCH4INTEN,host channel-4 interrupt enable register (HCH4INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "HCH5INTEN,host channel-5 interrupt enable register (HCH5INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "HCH6INTEN,host channel-6 interrupt enable register (HCH6INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x1EC++0x03
|
|
line.long 0x00 "HCH7INTEN,host channel-7 interrupt enable register (HCH7INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "HCH0LEN,host channel-0 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "HCH1LEN,host channel-1 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "HCH2LEN,host channel-2 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "HCH3LEN,host channel-3 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "HCH4LEN,host channel-4 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "HCH5LEN,host channel-5 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "HCH6LEN,host channel-6 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1F0++0x03
|
|
line.long 0x00 "HCH7LEN,host channel-7 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
tree.end
|
|
tree "SEC_FS_PWRCLK"
|
|
base ad:0x59000E00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWRCLKCTL,power and clock gating control register (PWRCLKCTL)"
|
|
bitfld.long 0x00 1. "SHCLK,Stop HCLK" "0,1"
|
|
bitfld.long 0x00 0. "SUCLK,Stop the USB clock" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "WWDGT (Window watchdog timer)"
|
|
tree "SEC_WWDGT"
|
|
base ad:0x50002C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 7. "WDGTEN,Activation bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "CNT,7-bit counter"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CFG,Configuration register"
|
|
bitfld.long 0x00 9. "EWIE,Early wakeup interrupt" "0,1"
|
|
bitfld.long 0x00 7.--8. "PSC,Prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--6. 1. "WIN,7-bit window value"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 0. "EWIF,Early wakeup interrupt flag" "0,1"
|
|
tree.end
|
|
tree "WWDGT"
|
|
base ad:0x40002C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 7. "WDGTEN,Activation bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "CNT,7-bit counter"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CFG,Configuration register"
|
|
bitfld.long 0x00 9. "EWIE,Early wakeup interrupt" "0,1"
|
|
bitfld.long 0x00 7.--8. "PSC,Prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--6. 1. "WIN,7-bit window value"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 0. "EWIF,Early wakeup interrupt flag" "0,1"
|
|
tree.end
|
|
tree.end
|
|
autoindent.off
|
|
newline
|